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ALSA: hda: Add STAC92HD83XXX_PWR_REF quirk
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
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38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
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45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
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48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
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MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
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61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
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69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
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75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
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79 STAC_92HD73XX_MODELS
80};
81
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82enum {
83 STAC_92HD83XXX_REF,
32ed3f46 84 STAC_92HD83XXX_PWR_REF,
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85 STAC_92HD83XXX_MODELS
86};
87
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88enum {
89 STAC_92HD71BXX_REF,
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90 STAC_DELL_M4_1,
91 STAC_DELL_M4_2,
3a7abfd2 92 STAC_DELL_M4_3,
6a14f585 93 STAC_HP_M4,
1b0652eb 94 STAC_HP_DV5,
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95 STAC_92HD71BXX_MODELS
96};
97
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98enum {
99 STAC_925x_REF,
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100 STAC_M1,
101 STAC_M1_2,
102 STAC_M2,
8e21c34c 103 STAC_M2_2,
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104 STAC_M3,
105 STAC_M5,
106 STAC_M6,
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107 STAC_925x_MODELS
108};
109
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TI
110enum {
111 STAC_D945_REF,
112 STAC_D945GTP3,
113 STAC_D945GTP5,
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114 STAC_INTEL_MAC_V1,
115 STAC_INTEL_MAC_V2,
116 STAC_INTEL_MAC_V3,
117 STAC_INTEL_MAC_V4,
118 STAC_INTEL_MAC_V5,
536319af
NB
119 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
120 * is given, one of the above models will be
121 * chosen according to the subsystem id. */
dfe495d0 122 /* for backward compatibility */
f5fcc13c 123 STAC_MACMINI,
3fc24d85 124 STAC_MACBOOK,
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NB
125 STAC_MACBOOK_PRO_V1,
126 STAC_MACBOOK_PRO_V2,
f16928fb 127 STAC_IMAC_INTEL,
0dae0f83 128 STAC_IMAC_INTEL_20,
8c650087 129 STAC_ECS_202,
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130 STAC_922X_DELL_D81,
131 STAC_922X_DELL_D82,
132 STAC_922X_DELL_M81,
133 STAC_922X_DELL_M82,
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134 STAC_922X_MODELS
135};
136
137enum {
e28d8322 138 STAC_D965_REF_NO_JD, /* no jack-detection */
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139 STAC_D965_REF,
140 STAC_D965_3ST,
141 STAC_D965_5ST,
4ff076e5 142 STAC_DELL_3ST,
8e9068b1 143 STAC_DELL_BIOS,
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144 STAC_927X_MODELS
145};
403d1944 146
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147struct sigmatel_event {
148 hda_nid_t nid;
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149 unsigned char type;
150 unsigned char tag;
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151 int data;
152};
153
154struct sigmatel_jack {
155 hda_nid_t nid;
156 int type;
157 struct snd_jack *jack;
158};
159
2f2f4251 160struct sigmatel_spec {
c8b6bf9b 161 struct snd_kcontrol_new *mixers[4];
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162 unsigned int num_mixers;
163
403d1944 164 int board_config;
c0cea0d0 165 unsigned int eapd_switch: 1;
c7d4b2fa 166 unsigned int surr_switch: 1;
3cc08dc6 167 unsigned int alt_switch: 1;
82bc955f 168 unsigned int hp_detect: 1;
00ef50c2 169 unsigned int spdif_mute: 1;
c7d4b2fa 170
4fe5195c 171 /* gpio lines */
0fc9dec4 172 unsigned int eapd_mask;
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173 unsigned int gpio_mask;
174 unsigned int gpio_dir;
175 unsigned int gpio_data;
176 unsigned int gpio_mute;
177
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178 /* stream */
179 unsigned int stream_delay;
180
4fe5195c 181 /* analog loopback */
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182 unsigned char aloopback_mask;
183 unsigned char aloopback_shift;
8259980e 184
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185 /* power management */
186 unsigned int num_pwrs;
d0513fc6 187 unsigned int *pwr_mapping;
a64135a2 188 hda_nid_t *pwr_nids;
b76c850f 189 hda_nid_t *dac_list;
a64135a2 190
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191 /* jack detection */
192 struct snd_array jacks;
193
194 /* events */
195 struct snd_array events;
196
2f2f4251 197 /* playback */
b22b4821 198 struct hda_input_mux *mono_mux;
89385035 199 struct hda_input_mux *amp_mux;
b22b4821 200 unsigned int cur_mmux;
2f2f4251 201 struct hda_multi_out multiout;
3cc08dc6 202 hda_nid_t dac_nids[5];
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203 hda_nid_t hp_dacs[5];
204 hda_nid_t speaker_dacs[5];
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205
206 /* capture */
207 hda_nid_t *adc_nids;
2f2f4251 208 unsigned int num_adcs;
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209 hda_nid_t *mux_nids;
210 unsigned int num_muxes;
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211 hda_nid_t *dmic_nids;
212 unsigned int num_dmics;
e1f0d669 213 hda_nid_t *dmux_nids;
1697055e 214 unsigned int num_dmuxes;
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215 hda_nid_t *smux_nids;
216 unsigned int num_smuxes;
65973632 217 const char **spdif_labels;
d9737751 218
dabbed6f 219 hda_nid_t dig_in_nid;
b22b4821 220 hda_nid_t mono_nid;
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221 hda_nid_t anabeep_nid;
222 hda_nid_t digbeep_nid;
2f2f4251 223
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224 /* pin widgets */
225 hda_nid_t *pin_nids;
226 unsigned int num_pins;
2f2f4251 227 unsigned int *pin_configs;
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228
229 /* codec specific stuff */
230 struct hda_verb *init;
c8b6bf9b 231 struct snd_kcontrol_new *mixer;
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232
233 /* capture source */
8b65727b 234 struct hda_input_mux *dinput_mux;
e1f0d669 235 unsigned int cur_dmux[2];
c7d4b2fa 236 struct hda_input_mux *input_mux;
3cc08dc6 237 unsigned int cur_mux[3];
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238 struct hda_input_mux *sinput_mux;
239 unsigned int cur_smux[2];
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240 unsigned int cur_amux;
241 hda_nid_t *amp_nids;
242 unsigned int num_amps;
8daaaa97 243 unsigned int powerdown_adcs;
2f2f4251 244
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245 /* i/o switches */
246 unsigned int io_switch[2];
0fb87bb4 247 unsigned int clfe_swap;
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TI
248 hda_nid_t line_switch; /* shared line-in for input and output */
249 hda_nid_t mic_switch; /* shared mic-in for input and output */
250 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 251 unsigned int aloopback;
2f2f4251 252
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M
253 struct hda_pcm pcm_rec[2]; /* PCM information */
254
255 /* dynamic controls and input_mux */
256 struct auto_pin_cfg autocfg;
603c4019 257 struct snd_array kctls;
8b65727b 258 struct hda_input_mux private_dimux;
c7d4b2fa 259 struct hda_input_mux private_imux;
d9737751 260 struct hda_input_mux private_smux;
89385035 261 struct hda_input_mux private_amp_mux;
b22b4821 262 struct hda_input_mux private_mono_mux;
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263};
264
265static hda_nid_t stac9200_adc_nids[1] = {
266 0x03,
267};
268
269static hda_nid_t stac9200_mux_nids[1] = {
270 0x0c,
271};
272
273static hda_nid_t stac9200_dac_nids[1] = {
274 0x02,
275};
276
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MR
277static hda_nid_t stac92hd73xx_pwr_nids[8] = {
278 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
279 0x0f, 0x10, 0x11
280};
281
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282static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
283 0x26, 0,
284};
285
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286static hda_nid_t stac92hd73xx_adc_nids[2] = {
287 0x1a, 0x1b
288};
289
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290#define DELL_M6_AMP 2
291static hda_nid_t stac92hd73xx_amp_nids[3] = {
292 0x0b, 0x0c, 0x0e
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293};
294
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295#define STAC92HD73XX_NUM_DMICS 2
296static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
297 0x13, 0x14, 0
298};
299
300#define STAC92HD73_DAC_COUNT 5
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301
302static hda_nid_t stac92hd73xx_mux_nids[4] = {
303 0x28, 0x29, 0x2a, 0x2b,
304};
305
306static hda_nid_t stac92hd73xx_dmux_nids[2] = {
307 0x20, 0x21,
308};
309
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310static hda_nid_t stac92hd73xx_smux_nids[2] = {
311 0x22, 0x23,
312};
313
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314#define STAC92HD83XXX_NUM_DMICS 2
315static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
316 0x11, 0x12, 0
317};
318
d0513fc6 319#define STAC92HD83_DAC_COUNT 3
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MR
320
321static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
322 0x17, 0x18,
323};
324
325static hda_nid_t stac92hd83xxx_adc_nids[2] = {
326 0x15, 0x16,
327};
328
329static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
330 0xa, 0xb, 0xd, 0xe,
331};
332
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MR
333static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
334 0x1e, 0,
335};
336
d0513fc6 337static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 338 0x03, 0x0c, 0x20, 0x40,
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339};
340
9248f269 341static hda_nid_t stac92hd83xxx_amp_nids[1] = {
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342 0xc,
343};
344
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345static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
346 0x0a, 0x0d, 0x0f
347};
348
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349static hda_nid_t stac92hd71bxx_adc_nids[2] = {
350 0x12, 0x13,
351};
352
353static hda_nid_t stac92hd71bxx_mux_nids[2] = {
354 0x1a, 0x1b
355};
356
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357static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
358 0x1c, 0x1d,
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359};
360
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361static hda_nid_t stac92hd71bxx_smux_nids[2] = {
362 0x24, 0x25,
363};
364
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365#define STAC92HD71BXX_NUM_DMICS 2
366static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
367 0x18, 0x19, 0
368};
369
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370static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
371 0x22, 0
372};
373
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TD
374static hda_nid_t stac925x_adc_nids[1] = {
375 0x03,
376};
377
378static hda_nid_t stac925x_mux_nids[1] = {
379 0x0f,
380};
381
382static hda_nid_t stac925x_dac_nids[1] = {
383 0x02,
384};
385
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TI
386#define STAC925X_NUM_DMICS 1
387static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
388 0x15, 0
2c11f955
TD
389};
390
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TI
391static hda_nid_t stac925x_dmux_nids[1] = {
392 0x14,
393};
394
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395static hda_nid_t stac922x_adc_nids[2] = {
396 0x06, 0x07,
397};
398
399static hda_nid_t stac922x_mux_nids[2] = {
400 0x12, 0x13,
401};
402
3cc08dc6
MP
403static hda_nid_t stac927x_adc_nids[3] = {
404 0x07, 0x08, 0x09
405};
406
407static hda_nid_t stac927x_mux_nids[3] = {
408 0x15, 0x16, 0x17
409};
410
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411static hda_nid_t stac927x_smux_nids[1] = {
412 0x21,
413};
414
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415static hda_nid_t stac927x_dac_nids[6] = {
416 0x02, 0x03, 0x04, 0x05, 0x06, 0
417};
418
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419static hda_nid_t stac927x_dmux_nids[1] = {
420 0x1b,
421};
422
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423#define STAC927X_NUM_DMICS 2
424static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
425 0x13, 0x14, 0
426};
427
65973632
MR
428static const char *stac927x_spdif_labels[5] = {
429 "Digital Playback", "ADAT", "Analog Mux 1",
430 "Analog Mux 2", "Analog Mux 3"
431};
432
f3302a59
MP
433static hda_nid_t stac9205_adc_nids[2] = {
434 0x12, 0x13
435};
436
437static hda_nid_t stac9205_mux_nids[2] = {
438 0x19, 0x1a
439};
440
e1f0d669 441static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 442 0x1d,
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443};
444
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445static hda_nid_t stac9205_smux_nids[1] = {
446 0x21,
447};
448
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449#define STAC9205_NUM_DMICS 2
450static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
451 0x17, 0x18, 0
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MP
452};
453
c7d4b2fa 454static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
455 0x08, 0x09, 0x0d, 0x0e,
456 0x0f, 0x10, 0x11, 0x12,
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457};
458
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TD
459static hda_nid_t stac925x_pin_nids[8] = {
460 0x07, 0x08, 0x0a, 0x0b,
461 0x0c, 0x0d, 0x10, 0x11,
462};
463
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464static hda_nid_t stac922x_pin_nids[10] = {
465 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
466 0x0f, 0x10, 0x11, 0x15, 0x1b,
467};
468
a7662640 469static hda_nid_t stac92hd73xx_pin_nids[13] = {
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470 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
471 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 472 0x14, 0x22, 0x23
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473};
474
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475static hda_nid_t stac92hd83xxx_pin_nids[14] = {
476 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
477 0x0f, 0x10, 0x11, 0x12, 0x13,
478 0x1d, 0x1e, 0x1f, 0x20
479};
0ffa9807 480static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
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481 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
482 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 483 0x1f,
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484};
485
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MP
486static hda_nid_t stac927x_pin_nids[14] = {
487 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
488 0x0f, 0x10, 0x11, 0x12, 0x13,
489 0x14, 0x21, 0x22, 0x23,
490};
491
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MP
492static hda_nid_t stac9205_pin_nids[12] = {
493 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
494 0x0f, 0x14, 0x16, 0x17, 0x18,
495 0x21, 0x22,
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496};
497
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498#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
499
500static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
501 struct snd_ctl_elem_value *ucontrol)
502{
503 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
504 struct sigmatel_spec *spec = codec->spec;
505 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
506
507 kcontrol->private_value ^= get_amp_nid(kcontrol);
508 kcontrol->private_value |= nid;
509
510 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
511}
512
513static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
514 struct snd_ctl_elem_value *ucontrol)
515{
516 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
517 struct sigmatel_spec *spec = codec->spec;
518 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
519
520 kcontrol->private_value ^= get_amp_nid(kcontrol);
521 kcontrol->private_value |= nid;
522
523 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
524}
525
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MP
526static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
531 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
532}
533
534static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_value *ucontrol)
536{
537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
538 struct sigmatel_spec *spec = codec->spec;
e1f0d669 539 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 540
e1f0d669 541 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
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MP
542 return 0;
543}
544
545static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
e1f0d669 550 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
551
552 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 553 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
554}
555
d9737751
MR
556static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
557 struct snd_ctl_elem_info *uinfo)
558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
561 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
562}
563
564static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *ucontrol)
566{
567 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
568 struct sigmatel_spec *spec = codec->spec;
569 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
570
571 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
572 return 0;
573}
574
575static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
576 struct snd_ctl_elem_value *ucontrol)
577{
578 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
579 struct sigmatel_spec *spec = codec->spec;
00ef50c2 580 struct hda_input_mux *smux = &spec->private_smux;
d9737751 581 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
582 int err, val;
583 hda_nid_t nid;
d9737751 584
00ef50c2 585 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 586 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
587 if (err < 0)
588 return err;
589
590 if (spec->spdif_mute) {
591 if (smux_idx == 0)
592 nid = spec->multiout.dig_out_nid;
593 else
594 nid = codec->slave_dig_outs[smux_idx - 1];
595 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 596 val = HDA_AMP_MUTE;
00ef50c2 597 else
c9b46f91 598 val = 0;
00ef50c2 599 /* un/mute SPDIF out */
c9b46f91
TI
600 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
601 HDA_AMP_MUTE, val);
00ef50c2
MR
602 }
603 return 0;
d9737751
MR
604}
605
c8b6bf9b 606static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
607{
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 610 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
611}
612
c8b6bf9b 613static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
614{
615 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
616 struct sigmatel_spec *spec = codec->spec;
617 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
618
619 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
620 return 0;
621}
622
c8b6bf9b 623static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
627 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
628
c7d4b2fa 629 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
630 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
631}
632
b22b4821
MR
633static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_info *uinfo)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
639}
640
641static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646
647 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
648 return 0;
649}
650
651static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
655 struct sigmatel_spec *spec = codec->spec;
656
657 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
658 spec->mono_nid, &spec->cur_mmux);
659}
660
89385035
MR
661static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
662 struct snd_ctl_elem_info *uinfo)
663{
664 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
665 struct sigmatel_spec *spec = codec->spec;
666 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
667}
668
669static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
670 struct snd_ctl_elem_value *ucontrol)
671{
672 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
673 struct sigmatel_spec *spec = codec->spec;
674
675 ucontrol->value.enumerated.item[0] = spec->cur_amux;
676 return 0;
677}
678
679static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
680 struct snd_ctl_elem_value *ucontrol)
681{
682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
683 struct sigmatel_spec *spec = codec->spec;
684 struct snd_kcontrol *ctl =
685 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
686 if (!ctl)
687 return -EINVAL;
688
689 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
690 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
691
692 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
693 0, &spec->cur_amux);
694}
695
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ML
696#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
697
698static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
699 struct snd_ctl_elem_value *ucontrol)
700{
701 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 702 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
703 struct sigmatel_spec *spec = codec->spec;
704
e1f0d669
MR
705 ucontrol->value.integer.value[0] = !!(spec->aloopback &
706 (spec->aloopback_mask << idx));
5f10c4a9
ML
707 return 0;
708}
709
710static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
711 struct snd_ctl_elem_value *ucontrol)
712{
713 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
714 struct sigmatel_spec *spec = codec->spec;
e1f0d669 715 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 716 unsigned int dac_mode;
e1f0d669 717 unsigned int val, idx_val;
5f10c4a9 718
e1f0d669
MR
719 idx_val = spec->aloopback_mask << idx;
720 if (ucontrol->value.integer.value[0])
721 val = spec->aloopback | idx_val;
722 else
723 val = spec->aloopback & ~idx_val;
68ea7b2f 724 if (spec->aloopback == val)
5f10c4a9
ML
725 return 0;
726
68ea7b2f 727 spec->aloopback = val;
5f10c4a9 728
e1f0d669
MR
729 /* Only return the bits defined by the shift value of the
730 * first two bytes of the mask
731 */
5f10c4a9 732 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
733 kcontrol->private_value & 0xFFFF, 0x0);
734 dac_mode >>= spec->aloopback_shift;
5f10c4a9 735
e1f0d669 736 if (spec->aloopback & idx_val) {
5f10c4a9 737 snd_hda_power_up(codec);
e1f0d669 738 dac_mode |= idx_val;
5f10c4a9
ML
739 } else {
740 snd_hda_power_down(codec);
e1f0d669 741 dac_mode &= ~idx_val;
5f10c4a9
ML
742 }
743
744 snd_hda_codec_write_cache(codec, codec->afg, 0,
745 kcontrol->private_value >> 16, dac_mode);
746
747 return 1;
748}
749
c7d4b2fa 750static struct hda_verb stac9200_core_init[] = {
2f2f4251 751 /* set dac0mux for dac converter */
c7d4b2fa 752 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
753 {}
754};
755
1194b5b7
TI
756static struct hda_verb stac9200_eapd_init[] = {
757 /* set dac0mux for dac converter */
758 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
759 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
760 {}
761};
762
e1f0d669
MR
763static struct hda_verb stac92hd73xx_6ch_core_init[] = {
764 /* set master volume and direct control */
765 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
766 /* setup adcs to point to mixer */
767 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
768 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
769 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 /* setup import muxs */
773 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
777 {}
778};
779
d654a660
MR
780static struct hda_verb dell_eq_core_init[] = {
781 /* set master volume to max value without distortion
782 * and direct control */
783 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
784 /* setup adcs to point to mixer */
785 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
787 /* setup import muxs */
788 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
792 {}
793};
794
52fe0f9d 795static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 796 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
797 /* setup adcs to point to mixer */
798 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
799 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
800 /* setup import muxs */
801 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
803 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
804 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
805 {}
806};
807
e1f0d669
MR
808static struct hda_verb stac92hd73xx_8ch_core_init[] = {
809 /* set master volume and direct control */
810 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
811 /* setup adcs to point to mixer */
812 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
813 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
814 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 /* setup import muxs */
818 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
822 {}
823};
824
825static struct hda_verb stac92hd73xx_10ch_core_init[] = {
826 /* set master volume and direct control */
827 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
828 /* dac3 is connected to import3 mux */
829 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
830 /* setup adcs to point to mixer */
831 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
832 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
833 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 /* setup import muxs */
837 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
841 {}
842};
843
d0513fc6 844static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
845 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
846 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
847 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
848
849 /* power state controls amps */
850 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 851 {}
d0513fc6
MR
852};
853
e035b841 854static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
855 /* set master volume and direct control */
856 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR
857 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
858 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
859 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
860 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 861 {}
541eee87
MR
862};
863
4b33c767 864#define HD_DISABLE_PORTF 2
541eee87 865static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
866 /* start of config #1 */
867
868 /* connect port 0f to audio mixer */
869 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
870 /* unmute right and left channels for node 0x0f */
871 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
872 /* start of config #2 */
873
e035b841
MR
874 /* set master volume and direct control */
875 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 876 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR
877 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
878 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
879 {}
880};
881
8e21c34c
TD
882static struct hda_verb stac925x_core_init[] = {
883 /* set dac0mux for dac converter */
884 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
885 /* mute the master volume */
886 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
887 {}
888};
889
c7d4b2fa 890static struct hda_verb stac922x_core_init[] = {
2f2f4251 891 /* set master volume and direct control */
c7d4b2fa 892 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
893 {}
894};
895
93ed1503 896static struct hda_verb d965_core_init[] = {
19039bd0 897 /* set master volume and direct control */
93ed1503 898 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
899 /* unmute node 0x1b */
900 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
901 /* select node 0x03 as DAC */
902 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
903 {}
904};
905
3cc08dc6
MP
906static struct hda_verb stac927x_core_init[] = {
907 /* set master volume and direct control */
908 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
909 /* enable analog pc beep path */
910 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
911 {}
912};
913
f3302a59
MP
914static struct hda_verb stac9205_core_init[] = {
915 /* set master volume and direct control */
916 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
917 /* enable analog pc beep path */
918 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
919 {}
920};
921
b22b4821
MR
922#define STAC_MONO_MUX \
923 { \
924 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
925 .name = "Mono Mux", \
926 .count = 1, \
927 .info = stac92xx_mono_mux_enum_info, \
928 .get = stac92xx_mono_mux_enum_get, \
929 .put = stac92xx_mono_mux_enum_put, \
930 }
931
89385035
MR
932#define STAC_AMP_MUX \
933 { \
934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
935 .name = "Amp Selector Capture Switch", \
936 .count = 1, \
937 .info = stac92xx_amp_mux_enum_info, \
938 .get = stac92xx_amp_mux_enum_get, \
939 .put = stac92xx_amp_mux_enum_put, \
940 }
941
942#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
943 { \
944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
945 .name = xname, \
946 .index = 0, \
947 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
948 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
949 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
950 .info = stac92xx_amp_volume_info, \
951 .get = stac92xx_amp_volume_get, \
952 .put = stac92xx_amp_volume_put, \
953 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
954 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
955 }
956
9e05b7a3 957#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML
958 { \
959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
960 .name = "Input Source", \
9e05b7a3 961 .count = cnt, \
ca7c5a8b
ML
962 .info = stac92xx_mux_enum_info, \
963 .get = stac92xx_mux_enum_get, \
964 .put = stac92xx_mux_enum_put, \
965 }
966
e1f0d669 967#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Analog Loopback", \
e1f0d669 971 .count = cnt, \
5f10c4a9
ML
972 .info = stac92xx_aloopback_info, \
973 .get = stac92xx_aloopback_get, \
974 .put = stac92xx_aloopback_put, \
975 .private_value = verb_read | (verb_write << 16), \
976 }
977
c8b6bf9b 978static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
979 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
980 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 981 STAC_INPUT_SOURCE(1),
2f2f4251
M
982 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
983 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
984 { } /* end */
985};
986
2a9c7816 987#define DELL_M6_MIXER 6
e1f0d669 988static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 989 /* start of config #1 */
e1f0d669
MR
990 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
991 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
992
e1f0d669
MR
993 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
994 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
995
2a9c7816
MR
996 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
997 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
998
999 /* start of config #2 */
1000 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1001 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1002
e1f0d669
MR
1003 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1004 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1005
2a9c7816
MR
1006 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1007
1008 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1009 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1013
e1f0d669
MR
1014 { } /* end */
1015};
1016
1017static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1019
e1f0d669
MR
1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1022
1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1027 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1028
1029 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1030 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1033 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1036 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1039 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1040 { } /* end */
1041};
1042
1043static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1044 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1045
e1f0d669
MR
1046 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1047 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1048
1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1053 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1054
1055 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1056 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1059 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1062 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1065 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1066 { } /* end */
1067};
1068
d0513fc6
MR
1069
1070static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1071 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1072 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1073
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1076
74b7ff48
MR
1077 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1078 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1079
74b7ff48
MR
1080 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1082
74b7ff48
MR
1083 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1084 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1085
74b7ff48
MR
1086 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1087 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1088
1089 /*
74b7ff48
MR
1090 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1091 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1092 */
1093 { } /* end */
1094};
1095
541eee87 1096static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1097 STAC_INPUT_SOURCE(2),
4b33c767 1098 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1099
9b35947f
MR
1100 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1101 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1102
1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1105 /* analog pc-beep replaced with digital beep support */
1106 /*
f7c5dda2
MR
1107 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1108 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1109 */
f7c5dda2 1110
687cb98e
MR
1111 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1112 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1113
687cb98e
MR
1114 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1115 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1116
1117 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1118 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1119
1120 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1121 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1122 { } /* end */
1123};
1124
541eee87 1125static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1126 STAC_INPUT_SOURCE(2),
1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1128
541eee87
MR
1129 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1130 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1131
1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1134 { } /* end */
1135};
1136
8e21c34c 1137static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1138 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1139 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1140 STAC_INPUT_SOURCE(1),
8e21c34c 1141 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1142 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1143 { } /* end */
1144};
1145
9e05b7a3 1146static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1147 STAC_INPUT_SOURCE(2),
e1f0d669 1148 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1149
1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1155 { } /* end */
1156};
1157
19039bd0 1158/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML
1159static struct snd_kcontrol_new stac922x_mixer[] = {
1160 STAC_INPUT_SOURCE(2),
9e05b7a3
ML
1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1166 { } /* end */
1167};
1168
9e05b7a3 1169
d1d985f0 1170static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1171 STAC_INPUT_SOURCE(3),
e1f0d669 1172 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1173
9e05b7a3
ML
1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1176
1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1182 { } /* end */
1183};
1184
1697055e
TI
1185static struct snd_kcontrol_new stac_dmux_mixer = {
1186 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1187 .name = "Digital Input Source",
1188 /* count set later */
1189 .info = stac92xx_dmux_enum_info,
1190 .get = stac92xx_dmux_enum_get,
1191 .put = stac92xx_dmux_enum_put,
1192};
1193
d9737751
MR
1194static struct snd_kcontrol_new stac_smux_mixer = {
1195 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1196 .name = "IEC958 Playback Source",
d9737751
MR
1197 /* count set later */
1198 .info = stac92xx_smux_enum_info,
1199 .get = stac92xx_smux_enum_get,
1200 .put = stac92xx_smux_enum_put,
1201};
1202
2134ea4f
TI
1203static const char *slave_vols[] = {
1204 "Front Playback Volume",
1205 "Surround Playback Volume",
1206 "Center Playback Volume",
1207 "LFE Playback Volume",
1208 "Side Playback Volume",
1209 "Headphone Playback Volume",
1210 "Headphone Playback Volume",
1211 "Speaker Playback Volume",
1212 "External Speaker Playback Volume",
1213 "Speaker2 Playback Volume",
1214 NULL
1215};
1216
1217static const char *slave_sws[] = {
1218 "Front Playback Switch",
1219 "Surround Playback Switch",
1220 "Center Playback Switch",
1221 "LFE Playback Switch",
1222 "Side Playback Switch",
1223 "Headphone Playback Switch",
1224 "Headphone Playback Switch",
1225 "Speaker Playback Switch",
1226 "External Speaker Playback Switch",
1227 "Speaker2 Playback Switch",
edb54a55 1228 "IEC958 Playback Switch",
2134ea4f
TI
1229 NULL
1230};
1231
603c4019 1232static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1233static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1234
2f2f4251
M
1235static int stac92xx_build_controls(struct hda_codec *codec)
1236{
1237 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1238 struct auto_pin_cfg *cfg = &spec->autocfg;
1239 hda_nid_t nid;
2f2f4251 1240 int err;
c7d4b2fa 1241 int i;
2f2f4251
M
1242
1243 err = snd_hda_add_new_ctls(codec, spec->mixer);
1244 if (err < 0)
1245 return err;
c7d4b2fa
M
1246
1247 for (i = 0; i < spec->num_mixers; i++) {
1248 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1249 if (err < 0)
1250 return err;
1251 }
1697055e
TI
1252 if (spec->num_dmuxes > 0) {
1253 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1254 err = snd_hda_ctl_add(codec,
1697055e
TI
1255 snd_ctl_new1(&stac_dmux_mixer, codec));
1256 if (err < 0)
1257 return err;
1258 }
d9737751 1259 if (spec->num_smuxes > 0) {
00ef50c2
MR
1260 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1261 struct hda_input_mux *smux = &spec->private_smux;
1262 /* check for mute support on SPDIF out */
1263 if (wcaps & AC_WCAP_OUT_AMP) {
1264 smux->items[smux->num_items].label = "Off";
1265 smux->items[smux->num_items].index = 0;
1266 smux->num_items++;
1267 spec->spdif_mute = 1;
1268 }
d9737751 1269 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1270 err = snd_hda_ctl_add(codec,
d9737751
MR
1271 snd_ctl_new1(&stac_smux_mixer, codec));
1272 if (err < 0)
1273 return err;
1274 }
c7d4b2fa 1275
dabbed6f
M
1276 if (spec->multiout.dig_out_nid) {
1277 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1278 if (err < 0)
1279 return err;
9a08160b
TI
1280 err = snd_hda_create_spdif_share_sw(codec,
1281 &spec->multiout);
1282 if (err < 0)
1283 return err;
1284 spec->multiout.share_spdif = 1;
dabbed6f 1285 }
da74ae3e 1286 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1287 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1288 if (err < 0)
1289 return err;
1290 }
2134ea4f
TI
1291
1292 /* if we have no master control, let's create it */
1293 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1294 unsigned int vmaster_tlv[4];
2134ea4f 1295 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1296 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1297 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1298 vmaster_tlv, slave_vols);
2134ea4f
TI
1299 if (err < 0)
1300 return err;
1301 }
1302 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1303 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1304 NULL, slave_sws);
1305 if (err < 0)
1306 return err;
1307 }
1308
603c4019 1309 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1310
1311 /* create jack input elements */
1312 if (spec->hp_detect) {
1313 for (i = 0; i < cfg->hp_outs; i++) {
1314 int type = SND_JACK_HEADPHONE;
1315 nid = cfg->hp_pins[i];
1316 /* jack detection */
1317 if (cfg->hp_outs == i)
1318 type |= SND_JACK_LINEOUT;
1319 err = stac92xx_add_jack(codec, nid, type);
1320 if (err < 0)
1321 return err;
1322 }
1323 }
1324 for (i = 0; i < cfg->line_outs; i++) {
1325 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1326 SND_JACK_LINEOUT);
1327 if (err < 0)
1328 return err;
1329 }
1330 for (i = 0; i < AUTO_PIN_LAST; i++) {
1331 nid = cfg->input_pins[i];
1332 if (nid) {
1333 err = stac92xx_add_jack(codec, nid,
1334 SND_JACK_MICROPHONE);
1335 if (err < 0)
1336 return err;
1337 }
1338 }
1339
dabbed6f 1340 return 0;
2f2f4251
M
1341}
1342
403d1944 1343static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1344 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1345 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1346};
1347
58eec423
MCC
1348static unsigned int gateway9200_m4_pin_configs[8] = {
1349 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1350 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1351};
1352static unsigned int gateway9200_m4_2_pin_configs[8] = {
1353 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1354 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1355};
1356
1357/*
dfe495d0
TI
1358 STAC 9200 pin configs for
1359 102801A8
1360 102801DE
1361 102801E8
1362*/
1363static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1364 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1365 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1366};
1367
1368/*
1369 STAC 9200 pin configs for
1370 102801C0
1371 102801C1
1372*/
1373static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1374 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1375 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1376};
1377
1378/*
1379 STAC 9200 pin configs for
1380 102801C4 (Dell Dimension E310)
1381 102801C5
1382 102801C7
1383 102801D9
1384 102801DA
1385 102801E3
1386*/
1387static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1388 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1389 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1390};
1391
1392
1393/*
1394 STAC 9200-32 pin configs for
1395 102801B5 (Dell Inspiron 630m)
1396 102801D8 (Dell Inspiron 640m)
1397*/
1398static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1399 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1400 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1401};
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801C2 (Dell Latitude D620)
1406 102801C8
1407 102801CC (Dell Latitude D820)
1408 102801D4
1409 102801D6
1410*/
1411static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1412 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1413 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1414};
1415
1416/*
1417 STAC 9200-32 pin configs for
1418 102801CE (Dell XPS M1710)
1419 102801CF (Dell Precision M90)
1420*/
1421static unsigned int dell9200_m23_pin_configs[8] = {
1422 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1423 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801C9
1429 102801CA
1430 102801CB (Dell Latitude 120L)
1431 102801D3
1432*/
1433static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1434 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1435 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1436};
1437
1438/*
1439 STAC 9200-32 pin configs for
1440 102801BD (Dell Inspiron E1505n)
1441 102801EE
1442 102801EF
1443*/
1444static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1445 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1446 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1447};
1448
1449/*
1450 STAC 9200-32 pin configs for
1451 102801F5 (Dell Inspiron 1501)
1452 102801F6
1453*/
1454static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1455 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1456 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1457};
1458
1459/*
1460 STAC 9200-32
1461 102801CD (Dell Inspiron E1705/9400)
1462*/
1463static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1464 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1465 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1466};
1467
bf277785
TD
1468static unsigned int oqo9200_pin_configs[8] = {
1469 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1470 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1471};
1472
dfe495d0 1473
f5fcc13c
TI
1474static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1475 [STAC_REF] = ref9200_pin_configs,
bf277785 1476 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1477 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1478 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1479 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1480 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1481 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1482 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1483 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1484 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1485 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1486 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1487 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1488 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1489 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1490};
1491
f5fcc13c
TI
1492static const char *stac9200_models[STAC_9200_MODELS] = {
1493 [STAC_REF] = "ref",
bf277785 1494 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1495 [STAC_9200_DELL_D21] = "dell-d21",
1496 [STAC_9200_DELL_D22] = "dell-d22",
1497 [STAC_9200_DELL_D23] = "dell-d23",
1498 [STAC_9200_DELL_M21] = "dell-m21",
1499 [STAC_9200_DELL_M22] = "dell-m22",
1500 [STAC_9200_DELL_M23] = "dell-m23",
1501 [STAC_9200_DELL_M24] = "dell-m24",
1502 [STAC_9200_DELL_M25] = "dell-m25",
1503 [STAC_9200_DELL_M26] = "dell-m26",
1504 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1505 [STAC_9200_M4] = "gateway-m4",
1506 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1507 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1508};
1509
1510static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1511 /* SigmaTel reference board */
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1513 "DFI LanParty", STAC_REF),
e7377071 1514 /* Dell laptops have BIOS problem */
dfe495d0
TI
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1516 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1518 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1520 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1522 "unknown Dell", STAC_9200_DELL_D22),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1524 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1526 "Dell Latitude D620", STAC_9200_DELL_M22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1528 "unknown Dell", STAC_9200_DELL_D23),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1530 "unknown Dell", STAC_9200_DELL_D23),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1532 "unknown Dell", STAC_9200_DELL_M22),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1534 "unknown Dell", STAC_9200_DELL_M24),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1536 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1538 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1540 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1542 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1544 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1546 "Dell Precision M90", STAC_9200_DELL_M23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1548 "unknown Dell", STAC_9200_DELL_M22),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1550 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1552 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1554 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1558 "unknown Dell", STAC_9200_DELL_D23),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1560 "unknown Dell", STAC_9200_DELL_D21),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1564 "unknown Dell", STAC_9200_DELL_D21),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1566 "unknown Dell", STAC_9200_DELL_M25),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1568 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1570 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1572 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1573 /* Panasonic */
117f257d 1574 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1575 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1576 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1577 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1578 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1579 /* OQO Mobile */
1580 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1581 {} /* terminator */
1582};
1583
8e21c34c
TD
1584static unsigned int ref925x_pin_configs[8] = {
1585 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1586 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1587};
1588
9cb36c2a
MCC
1589static unsigned int stac925xM1_pin_configs[8] = {
1590 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1591 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1592};
1593
9cb36c2a
MCC
1594static unsigned int stac925xM1_2_pin_configs[8] = {
1595 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1596 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1597};
58eec423 1598
9cb36c2a
MCC
1599static unsigned int stac925xM2_pin_configs[8] = {
1600 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1601 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1602};
1603
8e21c34c 1604static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1605 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1606 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1607};
1608
9cb36c2a
MCC
1609static unsigned int stac925xM3_pin_configs[8] = {
1610 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1611 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1612};
58eec423 1613
9cb36c2a
MCC
1614static unsigned int stac925xM5_pin_configs[8] = {
1615 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1616 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1617};
1618
9cb36c2a
MCC
1619static unsigned int stac925xM6_pin_configs[8] = {
1620 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1621 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1622};
1623
1624static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1625 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1626 [STAC_M1] = stac925xM1_pin_configs,
1627 [STAC_M1_2] = stac925xM1_2_pin_configs,
1628 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1629 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1630 [STAC_M3] = stac925xM3_pin_configs,
1631 [STAC_M5] = stac925xM5_pin_configs,
1632 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1633};
1634
1635static const char *stac925x_models[STAC_925x_MODELS] = {
1636 [STAC_REF] = "ref",
9cb36c2a
MCC
1637 [STAC_M1] = "m1",
1638 [STAC_M1_2] = "m1-2",
1639 [STAC_M2] = "m2",
8e21c34c 1640 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1641 [STAC_M3] = "m3",
1642 [STAC_M5] = "m5",
1643 [STAC_M6] = "m6",
8e21c34c
TD
1644};
1645
9cb36c2a 1646static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1647 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1648 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1649 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1650 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1651 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1652 /* Not sure about the brand name for those */
1653 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1654 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1655 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1656 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1657 {} /* terminator */
8e21c34c
TD
1658};
1659
1660static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1661 /* SigmaTel reference board */
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1663 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1664
1665 /* Default table for unknown ID */
1666 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1667
8e21c34c
TD
1668 {} /* terminator */
1669};
1670
a7662640 1671static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1672 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1673 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1674 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1675 0x01452050,
1676};
1677
1678static unsigned int dell_m6_pin_configs[13] = {
1679 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1680 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1681 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1682 0x4f0000f0,
e1f0d669
MR
1683};
1684
1685static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1686 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1687 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1688 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1689 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1690 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1691};
1692
1693static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1694 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1695 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1696 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1697 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1698 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1699 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1700};
1701
1702static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1703 /* SigmaTel reference board */
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR
1705 "DFI LanParty", STAC_92HD73XX_REF),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1707 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1719 "unknown Dell", STAC_DELL_M6_DMIC),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1721 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1723 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1725 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1726 {} /* terminator */
1727};
1728
d0513fc6
MR
1729static unsigned int ref92hd83xxx_pin_configs[14] = {
1730 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1731 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1732 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1733 0x01451160, 0x98560170,
1734};
1735
1736static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1737 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1738 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR
1739};
1740
1741static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1742 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1743 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR
1744};
1745
1746static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1747 /* SigmaTel reference board */
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1749 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1750 {} /* terminator */
d0513fc6
MR
1751};
1752
0ffa9807 1753static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1754 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1755 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1756 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR
1757};
1758
0ffa9807 1759static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1760 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1761 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1762 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1763};
1764
0ffa9807 1765static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR
1766 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1767 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1768 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR
1769};
1770
3a7abfd2
MR
1771static unsigned int dell_m4_3_pin_configs[11] = {
1772 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1773 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1774 0x40f000f0, 0x044413b0, 0x044413b0,
1775};
1776
e035b841
MR
1777static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1778 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1779 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1780 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1781 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1782 [STAC_HP_M4] = NULL,
1b0652eb 1783 [STAC_HP_DV5] = NULL,
e035b841
MR
1784};
1785
1786static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1787 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1788 [STAC_DELL_M4_1] = "dell-m4-1",
1789 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1790 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1791 [STAC_HP_M4] = "hp-m4",
1b0652eb 1792 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR
1793};
1794
1795static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1796 /* SigmaTel reference board */
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1798 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1800 "HP dv5", STAC_HP_M4),
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1802 "HP dv7", STAC_HP_M4),
e0c0e943
TI
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1804 "HP dv4", STAC_HP_DV5),
69dfaefe
TI
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1806 "HP dv7", STAC_HP_M4),
dafb70ce 1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1808 "HP dv5", STAC_HP_DV5),
9a9e2359
MR
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1810 "unknown HP", STAC_HP_M4),
a7662640
MR
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1812 "unknown Dell", STAC_DELL_M4_1),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1824 "unknown Dell", STAC_DELL_M4_1),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1826 "unknown Dell", STAC_DELL_M4_2),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1828 "unknown Dell", STAC_DELL_M4_2),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1830 "unknown Dell", STAC_DELL_M4_2),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1832 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1834 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1835 {} /* terminator */
1836};
1837
403d1944
MP
1838static unsigned int ref922x_pin_configs[10] = {
1839 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1840 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1841 0x40000100, 0x40000100,
1842};
1843
dfe495d0
TI
1844/*
1845 STAC 922X pin configs for
1846 102801A7
1847 102801AB
1848 102801A9
1849 102801D1
1850 102801D2
1851*/
1852static unsigned int dell_922x_d81_pin_configs[10] = {
1853 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1854 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1855 0x01813122, 0x400001f2,
1856};
1857
1858/*
1859 STAC 922X pin configs for
1860 102801AC
1861 102801D0
1862*/
1863static unsigned int dell_922x_d82_pin_configs[10] = {
1864 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1865 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1866 0x01813122, 0x400001f1,
1867};
1868
1869/*
1870 STAC 922X pin configs for
1871 102801BF
1872*/
1873static unsigned int dell_922x_m81_pin_configs[10] = {
1874 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1875 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1876 0x40C003f1, 0x405003f0,
1877};
1878
1879/*
1880 STAC 9221 A1 pin configs for
1881 102801D7 (Dell XPS M1210)
1882*/
1883static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1884 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1885 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1886 0x508003f3, 0x405003f4,
1887};
1888
403d1944 1889static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1890 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1891 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1892 0x02a19120, 0x40000100,
1893};
1894
1895static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1896 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1897 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1898 0x02a19320, 0x40000100,
1899};
1900
5d5d3bc3
IZ
1901static unsigned int intel_mac_v1_pin_configs[10] = {
1902 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1903 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1904 0x400000fc, 0x400000fb,
1905};
1906
1907static unsigned int intel_mac_v2_pin_configs[10] = {
1908 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1909 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1910 0x400000fc, 0x400000fb,
6f0778d8
NB
1911};
1912
5d5d3bc3
IZ
1913static unsigned int intel_mac_v3_pin_configs[10] = {
1914 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1915 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1916 0x400000fc, 0x400000fb,
1917};
1918
5d5d3bc3
IZ
1919static unsigned int intel_mac_v4_pin_configs[10] = {
1920 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1921 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1922 0x400000fc, 0x400000fb,
1923};
1924
5d5d3bc3
IZ
1925static unsigned int intel_mac_v5_pin_configs[10] = {
1926 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1927 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1928 0x400000fc, 0x400000fb,
0dae0f83
TI
1929};
1930
8c650087
MCC
1931static unsigned int ecs202_pin_configs[10] = {
1932 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1933 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1934 0x9037012e, 0x40e000f2,
1935};
76c08828 1936
19039bd0 1937static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1938 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1939 [STAC_D945GTP3] = d945gtp3_pin_configs,
1940 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1941 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1942 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1943 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1944 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1945 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1946 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1947 /* for backward compatibility */
5d5d3bc3
IZ
1948 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1949 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1950 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1951 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1952 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1953 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1954 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1955 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1956 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1957 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1958 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1959};
1960
f5fcc13c
TI
1961static const char *stac922x_models[STAC_922X_MODELS] = {
1962 [STAC_D945_REF] = "ref",
1963 [STAC_D945GTP5] = "5stack",
1964 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1965 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1966 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1967 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1968 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1969 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1970 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1971 /* for backward compatibility */
f5fcc13c 1972 [STAC_MACMINI] = "macmini",
3fc24d85 1973 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1974 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1975 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1976 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1977 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1978 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1979 [STAC_922X_DELL_D81] = "dell-d81",
1980 [STAC_922X_DELL_D82] = "dell-d82",
1981 [STAC_922X_DELL_M81] = "dell-m81",
1982 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1983};
1984
1985static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1986 /* SigmaTel reference board */
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1988 "DFI LanParty", STAC_D945_REF),
1989 /* Intel 945G based systems */
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2019 "Intel D945G", STAC_D945GTP3),
2020 /* Intel D945G 5-stack systems */
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2022 "Intel D945G", STAC_D945GTP5),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2024 "Intel D945G", STAC_D945GTP5),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2026 "Intel D945G", STAC_D945GTP5),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2028 "Intel D945G", STAC_D945GTP5),
2029 /* Intel 945P based systems */
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2031 "Intel D945P", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2035 "Intel D945P", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2041 "Intel D945P", STAC_D945GTP5),
2042 /* other systems */
536319af 2043 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2044 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2045 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2046 /* Dell systems */
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2048 "unknown Dell", STAC_922X_DELL_D81),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2050 "unknown Dell", STAC_922X_DELL_D81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2052 "unknown Dell", STAC_922X_DELL_D81),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2054 "unknown Dell", STAC_922X_DELL_D82),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2056 "unknown Dell", STAC_922X_DELL_M81),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2058 "unknown Dell", STAC_922X_DELL_D82),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2060 "unknown Dell", STAC_922X_DELL_D81),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2062 "unknown Dell", STAC_922X_DELL_D81),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2064 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2065 /* ECS/PC Chips boards */
2066 SND_PCI_QUIRK(0x1019, 0x2144,
2067 "ECS/PC chips", STAC_ECS_202),
2068 SND_PCI_QUIRK(0x1019, 0x2608,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2633,
2071 "ECS/PC chips P17G/1333", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2811,
2073 "ECS/PC chips", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2812,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2813,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2814,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2815,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2816,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2817,
2085 "ECS/PC chips", STAC_ECS_202),
2086 SND_PCI_QUIRK(0x1019, 0x2818,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2819,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2820,
2091 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2092 {} /* terminator */
2093};
2094
3cc08dc6 2095static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2096 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2097 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2098 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2099 0x01c42190, 0x40000100,
3cc08dc6
MP
2100};
2101
93ed1503 2102static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2103 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2104 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2105 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2106 0x40000100, 0x40000100
2107};
2108
93ed1503
TD
2109static unsigned int d965_5st_pin_configs[14] = {
2110 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2111 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2112 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2113 0x40000100, 0x40000100
2114};
2115
4ff076e5
TD
2116static unsigned int dell_3st_pin_configs[14] = {
2117 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2118 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2119 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2120 0x40c003fc, 0x40000100
2121};
2122
93ed1503 2123static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2124 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2125 [STAC_D965_REF] = ref927x_pin_configs,
2126 [STAC_D965_3ST] = d965_3st_pin_configs,
2127 [STAC_D965_5ST] = d965_5st_pin_configs,
2128 [STAC_DELL_3ST] = dell_3st_pin_configs,
2129 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2130};
2131
f5fcc13c 2132static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2133 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2134 [STAC_D965_REF] = "ref",
2135 [STAC_D965_3ST] = "3stack",
2136 [STAC_D965_5ST] = "5stack",
2137 [STAC_DELL_3ST] = "dell-3stack",
2138 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2139};
2140
2141static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2142 /* SigmaTel reference board */
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2144 "DFI LanParty", STAC_D965_REF),
81d3dbde 2145 /* Intel 946 based systems */
f5fcc13c
TI
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2148 /* 965 based 3 stack systems */
f5fcc13c
TI
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2165 /* Dell 3 stack systems */
8e9068b1 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2170 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2179 /* 965 based 5 stack systems */
f5fcc13c
TI
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2189 {} /* terminator */
2190};
2191
f3302a59
MP
2192static unsigned int ref9205_pin_configs[12] = {
2193 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2194 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2195 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2196};
2197
dfe495d0
TI
2198/*
2199 STAC 9205 pin configs for
2200 102801F1
2201 102801F2
2202 102801FC
2203 102801FD
2204 10280204
2205 1028021F
3fa2ef74 2206 10280228 (Dell Vostro 1500)
dfe495d0
TI
2207*/
2208static unsigned int dell_9205_m42_pin_configs[12] = {
2209 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2210 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2211 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2212};
2213
2214/*
2215 STAC 9205 pin configs for
2216 102801F9
2217 102801FA
2218 102801FE
2219 102801FF (Dell Precision M4300)
2220 10280206
2221 10280200
2222 10280201
2223*/
2224static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2225 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2226 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2227 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2228};
2229
dfe495d0 2230static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2231 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2232 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2233 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2234};
2235
f5fcc13c 2236static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2237 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2238 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2239 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2240 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP
2241};
2242
f5fcc13c
TI
2243static const char *stac9205_models[STAC_9205_MODELS] = {
2244 [STAC_9205_REF] = "ref",
dfe495d0 2245 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2246 [STAC_9205_DELL_M43] = "dell-m43",
2247 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI
2248};
2249
2250static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2251 /* SigmaTel reference board */
2252 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2253 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2255 "unknown Dell", STAC_9205_DELL_M42),
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2257 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2259 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2261 "Dell Precision", STAC_9205_DELL_M43),
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2263 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2265 "unknown Dell", STAC_9205_DELL_M42),
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2267 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2269 "Dell Precision", STAC_9205_DELL_M43),
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2271 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2273 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2275 "Dell Precision", STAC_9205_DELL_M43),
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2277 "Dell Precision", STAC_9205_DELL_M43),
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2279 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2281 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2283 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP
2284 {} /* terminator */
2285};
2286
11b44bbd
RF
2287static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2288{
2289 int i;
2290 struct sigmatel_spec *spec = codec->spec;
2291
af9f341a
TI
2292 kfree(spec->pin_configs);
2293 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2294 GFP_KERNEL);
2295 if (!spec->pin_configs)
2296 return -ENOMEM;
11b44bbd
RF
2297
2298 for (i = 0; i < spec->num_pins; i++) {
2299 hda_nid_t nid = spec->pin_nids[i];
2300 unsigned int pin_cfg;
2301
2302 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2303 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2304 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2305 nid, pin_cfg);
af9f341a 2306 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2307 }
2308
2309 return 0;
2310}
2311
87d48363
MR
2312static void stac92xx_set_config_reg(struct hda_codec *codec,
2313 hda_nid_t pin_nid, unsigned int pin_config)
2314{
2315 int i;
2316 snd_hda_codec_write(codec, pin_nid, 0,
2317 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2318 pin_config & 0x000000ff);
2319 snd_hda_codec_write(codec, pin_nid, 0,
2320 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2321 (pin_config & 0x0000ff00) >> 8);
2322 snd_hda_codec_write(codec, pin_nid, 0,
2323 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2324 (pin_config & 0x00ff0000) >> 16);
2325 snd_hda_codec_write(codec, pin_nid, 0,
2326 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2327 pin_config >> 24);
2328 i = snd_hda_codec_read(codec, pin_nid, 0,
2329 AC_VERB_GET_CONFIG_DEFAULT,
2330 0x00);
2331 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2332 pin_nid, i);
2333}
2334
2f2f4251
M
2335static void stac92xx_set_config_regs(struct hda_codec *codec)
2336{
2337 int i;
2338 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2339
87d48363
MR
2340 if (!spec->pin_configs)
2341 return;
11b44bbd 2342
87d48363
MR
2343 for (i = 0; i < spec->num_pins; i++)
2344 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2345 spec->pin_configs[i]);
2f2f4251 2346}
2f2f4251 2347
af9f341a
TI
2348static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2349{
2350 struct sigmatel_spec *spec = codec->spec;
2351
2352 if (!pins)
2353 return stac92xx_save_bios_config_regs(codec);
2354
2355 kfree(spec->pin_configs);
2356 spec->pin_configs = kmemdup(pins,
2357 spec->num_pins * sizeof(*pins),
2358 GFP_KERNEL);
2359 if (!spec->pin_configs)
2360 return -ENOMEM;
2361
2362 stac92xx_set_config_regs(codec);
2363 return 0;
2364}
2365
2366static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2367 unsigned int cfg)
2368{
2369 struct sigmatel_spec *spec = codec->spec;
2370 int i;
2371
2372 for (i = 0; i < spec->num_pins; i++) {
2373 if (spec->pin_nids[i] == nid) {
2374 spec->pin_configs[i] = cfg;
2375 stac92xx_set_config_reg(codec, nid, cfg);
2376 break;
2377 }
2378 }
2379}
2380
dabbed6f 2381/*
c7d4b2fa 2382 * Analog playback callbacks
dabbed6f 2383 */
c7d4b2fa
M
2384static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2385 struct hda_codec *codec,
c8b6bf9b 2386 struct snd_pcm_substream *substream)
2f2f4251 2387{
dabbed6f 2388 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2389 if (spec->stream_delay)
2390 msleep(spec->stream_delay);
9a08160b
TI
2391 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2392 hinfo);
2f2f4251
M
2393}
2394
2f2f4251
M
2395static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2396 struct hda_codec *codec,
2397 unsigned int stream_tag,
2398 unsigned int format,
c8b6bf9b 2399 struct snd_pcm_substream *substream)
2f2f4251
M
2400{
2401 struct sigmatel_spec *spec = codec->spec;
403d1944 2402 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2403}
2404
2405static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2406 struct hda_codec *codec,
c8b6bf9b 2407 struct snd_pcm_substream *substream)
2f2f4251
M
2408{
2409 struct sigmatel_spec *spec = codec->spec;
2410 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2411}
2412
dabbed6f
M
2413/*
2414 * Digital playback callbacks
2415 */
2416static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2417 struct hda_codec *codec,
c8b6bf9b 2418 struct snd_pcm_substream *substream)
dabbed6f
M
2419{
2420 struct sigmatel_spec *spec = codec->spec;
2421 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2422}
2423
2424static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2425 struct hda_codec *codec,
c8b6bf9b 2426 struct snd_pcm_substream *substream)
dabbed6f
M
2427{
2428 struct sigmatel_spec *spec = codec->spec;
2429 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2430}
2431
6b97eb45
TI
2432static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2433 struct hda_codec *codec,
2434 unsigned int stream_tag,
2435 unsigned int format,
2436 struct snd_pcm_substream *substream)
2437{
2438 struct sigmatel_spec *spec = codec->spec;
2439 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2440 stream_tag, format, substream);
2441}
2442
dabbed6f 2443
2f2f4251
M
2444/*
2445 * Analog capture callbacks
2446 */
2447static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2448 struct hda_codec *codec,
2449 unsigned int stream_tag,
2450 unsigned int format,
c8b6bf9b 2451 struct snd_pcm_substream *substream)
2f2f4251
M
2452{
2453 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2454 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2455
8daaaa97
MR
2456 if (spec->powerdown_adcs) {
2457 msleep(40);
8c2f767b 2458 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2459 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2460 }
2461 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2462 return 0;
2463}
2464
2465static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2466 struct hda_codec *codec,
c8b6bf9b 2467 struct snd_pcm_substream *substream)
2f2f4251
M
2468{
2469 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2470 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2471
8daaaa97
MR
2472 snd_hda_codec_cleanup_stream(codec, nid);
2473 if (spec->powerdown_adcs)
8c2f767b 2474 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2475 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2476 return 0;
2477}
2478
dabbed6f
M
2479static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2480 .substreams = 1,
2481 .channels_min = 2,
2482 .channels_max = 2,
2483 /* NID is set in stac92xx_build_pcms */
2484 .ops = {
2485 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2486 .close = stac92xx_dig_playback_pcm_close,
2487 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2488 },
2489};
2490
2491static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2492 .substreams = 1,
2493 .channels_min = 2,
2494 .channels_max = 2,
2495 /* NID is set in stac92xx_build_pcms */
2496};
2497
2f2f4251
M
2498static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2499 .substreams = 1,
2500 .channels_min = 2,
c7d4b2fa 2501 .channels_max = 8,
2f2f4251
M
2502 .nid = 0x02, /* NID to query formats and rates */
2503 .ops = {
2504 .open = stac92xx_playback_pcm_open,
2505 .prepare = stac92xx_playback_pcm_prepare,
2506 .cleanup = stac92xx_playback_pcm_cleanup
2507 },
2508};
2509
3cc08dc6
MP
2510static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2511 .substreams = 1,
2512 .channels_min = 2,
2513 .channels_max = 2,
2514 .nid = 0x06, /* NID to query formats and rates */
2515 .ops = {
2516 .open = stac92xx_playback_pcm_open,
2517 .prepare = stac92xx_playback_pcm_prepare,
2518 .cleanup = stac92xx_playback_pcm_cleanup
2519 },
2520};
2521
2f2f4251 2522static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2523 .channels_min = 2,
2524 .channels_max = 2,
9e05b7a3 2525 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2526 .ops = {
2527 .prepare = stac92xx_capture_pcm_prepare,
2528 .cleanup = stac92xx_capture_pcm_cleanup
2529 },
2530};
2531
2532static int stac92xx_build_pcms(struct hda_codec *codec)
2533{
2534 struct sigmatel_spec *spec = codec->spec;
2535 struct hda_pcm *info = spec->pcm_rec;
2536
2537 codec->num_pcms = 1;
2538 codec->pcm_info = info;
2539
c7d4b2fa 2540 info->name = "STAC92xx Analog";
2f2f4251 2541 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2542 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2543 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2544 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2545
2546 if (spec->alt_switch) {
2547 codec->num_pcms++;
2548 info++;
2549 info->name = "STAC92xx Analog Alt";
2550 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2551 }
2f2f4251 2552
dabbed6f
M
2553 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2554 codec->num_pcms++;
2555 info++;
2556 info->name = "STAC92xx Digital";
7ba72ba1 2557 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M
2558 if (spec->multiout.dig_out_nid) {
2559 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2560 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2561 }
2562 if (spec->dig_in_nid) {
2563 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2564 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2565 }
2566 }
2567
2f2f4251
M
2568 return 0;
2569}
2570
c960a03b
TI
2571static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2572{
2573 unsigned int pincap = snd_hda_param_read(codec, nid,
2574 AC_PAR_PIN_CAP);
2575 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2576 if (pincap & AC_PINCAP_VREF_100)
2577 return AC_PINCTL_VREF_100;
2578 if (pincap & AC_PINCAP_VREF_80)
2579 return AC_PINCTL_VREF_80;
2580 if (pincap & AC_PINCAP_VREF_50)
2581 return AC_PINCTL_VREF_50;
2582 if (pincap & AC_PINCAP_VREF_GRD)
2583 return AC_PINCTL_VREF_GRD;
2584 return 0;
2585}
2586
403d1944
MP
2587static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2588
2589{
82beb8fd
TI
2590 snd_hda_codec_write_cache(codec, nid, 0,
2591 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2592}
2593
7c2ba97b
MR
2594#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2595
2596static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2597 struct snd_ctl_elem_value *ucontrol)
2598{
2599 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2600 struct sigmatel_spec *spec = codec->spec;
2601
d7a89436 2602 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2603 return 0;
2604}
2605
c6e4c666
TI
2606static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2607 unsigned char type);
2608
7c2ba97b
MR
2609static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2610 struct snd_ctl_elem_value *ucontrol)
2611{
2612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2613 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2614 int nid = kcontrol->private_value;
2615
2616 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2617
2618 /* check to be sure that the ports are upto date with
2619 * switch changes
2620 */
c6e4c666 2621 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2622
2623 return 1;
2624}
2625
a5ce8890 2626#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2627
2628static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2629{
2630 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2631 struct sigmatel_spec *spec = codec->spec;
2632 int io_idx = kcontrol-> private_value & 0xff;
2633
2634 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2635 return 0;
2636}
2637
2638static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2639{
2640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2641 struct sigmatel_spec *spec = codec->spec;
2642 hda_nid_t nid = kcontrol->private_value >> 8;
2643 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2644 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2645
2646 spec->io_switch[io_idx] = val;
2647
2648 if (val)
2649 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2650 else {
2651 unsigned int pinctl = AC_PINCTL_IN_EN;
2652 if (io_idx) /* set VREF for mic */
2653 pinctl |= stac92xx_get_vref(codec, nid);
2654 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2655 }
40c1d308
JZ
2656
2657 /* check the auto-mute again: we need to mute/unmute the speaker
2658 * appropriately according to the pin direction
2659 */
2660 if (spec->hp_detect)
c6e4c666 2661 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2662
403d1944
MP
2663 return 1;
2664}
2665
0fb87bb4
ML
2666#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2667
2668static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2669 struct snd_ctl_elem_value *ucontrol)
2670{
2671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2672 struct sigmatel_spec *spec = codec->spec;
2673
2674 ucontrol->value.integer.value[0] = spec->clfe_swap;
2675 return 0;
2676}
2677
2678static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2679 struct snd_ctl_elem_value *ucontrol)
2680{
2681 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2682 struct sigmatel_spec *spec = codec->spec;
2683 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2684 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2685
68ea7b2f 2686 if (spec->clfe_swap == val)
0fb87bb4
ML
2687 return 0;
2688
68ea7b2f 2689 spec->clfe_swap = val;
0fb87bb4
ML
2690
2691 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2692 spec->clfe_swap ? 0x4 : 0x0);
2693
2694 return 1;
2695}
2696
7c2ba97b
MR
2697#define STAC_CODEC_HP_SWITCH(xname) \
2698 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2699 .name = xname, \
2700 .index = 0, \
2701 .info = stac92xx_hp_switch_info, \
2702 .get = stac92xx_hp_switch_get, \
2703 .put = stac92xx_hp_switch_put, \
2704 }
2705
403d1944
MP
2706#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2707 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2708 .name = xname, \
2709 .index = 0, \
2710 .info = stac92xx_io_switch_info, \
2711 .get = stac92xx_io_switch_get, \
2712 .put = stac92xx_io_switch_put, \
2713 .private_value = xpval, \
2714 }
2715
0fb87bb4
ML
2716#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2717 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2718 .name = xname, \
2719 .index = 0, \
2720 .info = stac92xx_clfe_switch_info, \
2721 .get = stac92xx_clfe_switch_get, \
2722 .put = stac92xx_clfe_switch_put, \
2723 .private_value = xpval, \
2724 }
403d1944 2725
c7d4b2fa
M
2726enum {
2727 STAC_CTL_WIDGET_VOL,
2728 STAC_CTL_WIDGET_MUTE,
09a99959 2729 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2730 STAC_CTL_WIDGET_AMP_MUX,
2731 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2732 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2733 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2734 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2735};
2736
c8b6bf9b 2737static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2738 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2739 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2740 STAC_MONO_MUX,
89385035
MR
2741 STAC_AMP_MUX,
2742 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2743 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2744 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2745 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2746};
2747
2748/* add dynamic controls */
4d4e9bb3
TI
2749static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2750 struct snd_kcontrol_new *ktemp,
2751 int idx, const char *name,
2752 unsigned long val)
c7d4b2fa 2753{
c8b6bf9b 2754 struct snd_kcontrol_new *knew;
c7d4b2fa 2755
603c4019
TI
2756 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2757 knew = snd_array_new(&spec->kctls);
2758 if (!knew)
2759 return -ENOMEM;
4d4e9bb3 2760 *knew = *ktemp;
4682eee0 2761 knew->index = idx;
82fe0c58 2762 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2763 if (!knew->name)
c7d4b2fa
M
2764 return -ENOMEM;
2765 knew->private_value = val;
c7d4b2fa
M
2766 return 0;
2767}
2768
4d4e9bb3
TI
2769static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2770 int type, int idx, const char *name,
2771 unsigned long val)
2772{
2773 return stac92xx_add_control_temp(spec,
2774 &stac92xx_control_templates[type],
2775 idx, name, val);
2776}
2777
4682eee0
MR
2778
2779/* add dynamic controls */
4d4e9bb3
TI
2780static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2781 const char *name, unsigned long val)
4682eee0
MR
2782{
2783 return stac92xx_add_control_idx(spec, type, 0, name, val);
2784}
2785
c21ca4a8
TI
2786/* check whether the line-input can be used as line-out */
2787static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2788{
2789 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2790 struct auto_pin_cfg *cfg = &spec->autocfg;
2791 hda_nid_t nid;
2792 unsigned int pincap;
8e9068b1 2793
c21ca4a8
TI
2794 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2795 return 0;
2796 nid = cfg->input_pins[AUTO_PIN_LINE];
2797 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2798 if (pincap & AC_PINCAP_OUT)
2799 return nid;
2800 return 0;
2801}
403d1944 2802
c21ca4a8
TI
2803/* check whether the mic-input can be used as line-out */
2804static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2805{
2806 struct sigmatel_spec *spec = codec->spec;
2807 struct auto_pin_cfg *cfg = &spec->autocfg;
2808 unsigned int def_conf, pincap;
2809 unsigned int mic_pin;
2810
2811 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2812 return 0;
2813 mic_pin = AUTO_PIN_MIC;
2814 for (;;) {
2815 hda_nid_t nid = cfg->input_pins[mic_pin];
2816 def_conf = snd_hda_codec_read(codec, nid, 0,
2817 AC_VERB_GET_CONFIG_DEFAULT, 0);
2818 /* some laptops have an internal analog microphone
2819 * which can't be used as a output */
2820 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2821 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2822 if (pincap & AC_PINCAP_OUT)
2823 return nid;
403d1944 2824 }
c21ca4a8
TI
2825 if (mic_pin == AUTO_PIN_MIC)
2826 mic_pin = AUTO_PIN_FRONT_MIC;
2827 else
2828 break;
403d1944 2829 }
403d1944
MP
2830 return 0;
2831}
2832
7b043899
SL
2833static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2834{
2835 int i;
2836
2837 for (i = 0; i < spec->multiout.num_dacs; i++) {
2838 if (spec->multiout.dac_nids[i] == nid)
2839 return 1;
2840 }
2841
2842 return 0;
2843}
2844
c21ca4a8
TI
2845static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2846{
2847 int i;
2848 if (is_in_dac_nids(spec, nid))
2849 return 1;
2850 for (i = 0; i < spec->autocfg.hp_outs; i++)
2851 if (spec->hp_dacs[i] == nid)
2852 return 1;
2853 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2854 if (spec->speaker_dacs[i] == nid)
2855 return 1;
2856 return 0;
2857}
2858
2859static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2860{
2861 struct sigmatel_spec *spec = codec->spec;
2862 int j, conn_len;
2863 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2864 unsigned int wcaps, wtype;
2865
2866 conn_len = snd_hda_get_connections(codec, nid, conn,
2867 HDA_MAX_CONNECTIONS);
2868 for (j = 0; j < conn_len; j++) {
2869 wcaps = snd_hda_param_read(codec, conn[j],
2870 AC_PAR_AUDIO_WIDGET_CAP);
2871 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2872 /* we check only analog outputs */
2873 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2874 continue;
2875 /* if this route has a free DAC, assign it */
2876 if (!check_all_dac_nids(spec, conn[j])) {
2877 if (conn_len > 1) {
2878 /* select this DAC in the pin's input mux */
2879 snd_hda_codec_write_cache(codec, nid, 0,
2880 AC_VERB_SET_CONNECT_SEL, j);
2881 }
2882 return conn[j];
2883 }
2884 }
2885 return 0;
2886}
2887
2888static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2889static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2890
3cc08dc6 2891/*
7b043899
SL
2892 * Fill in the dac_nids table from the parsed pin configuration
2893 * This function only works when every pin in line_out_pins[]
2894 * contains atleast one DAC in its connection list. Some 92xx
2895 * codecs are not connected directly to a DAC, such as the 9200
2896 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2897 */
c21ca4a8 2898static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2899{
2900 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2901 struct auto_pin_cfg *cfg = &spec->autocfg;
2902 int i;
2903 hda_nid_t nid, dac;
7b043899 2904
c7d4b2fa
M
2905 for (i = 0; i < cfg->line_outs; i++) {
2906 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2907 dac = get_unassigned_dac(codec, nid);
2908 if (!dac) {
df802952
TI
2909 if (spec->multiout.num_dacs > 0) {
2910 /* we have already working output pins,
2911 * so let's drop the broken ones again
2912 */
2913 cfg->line_outs = spec->multiout.num_dacs;
2914 break;
2915 }
7b043899
SL
2916 /* error out, no available DAC found */
2917 snd_printk(KERN_ERR
2918 "%s: No available DAC for pin 0x%x\n",
2919 __func__, nid);
2920 return -ENODEV;
2921 }
c21ca4a8
TI
2922 add_spec_dacs(spec, dac);
2923 }
7b043899 2924
c21ca4a8
TI
2925 /* add line-in as output */
2926 nid = check_line_out_switch(codec);
2927 if (nid) {
2928 dac = get_unassigned_dac(codec, nid);
2929 if (dac) {
2930 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2931 nid, cfg->line_outs);
2932 cfg->line_out_pins[cfg->line_outs] = nid;
2933 cfg->line_outs++;
2934 spec->line_switch = nid;
2935 add_spec_dacs(spec, dac);
2936 }
2937 }
2938 /* add mic as output */
2939 nid = check_mic_out_switch(codec);
2940 if (nid) {
2941 dac = get_unassigned_dac(codec, nid);
2942 if (dac) {
2943 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2944 nid, cfg->line_outs);
2945 cfg->line_out_pins[cfg->line_outs] = nid;
2946 cfg->line_outs++;
2947 spec->mic_switch = nid;
2948 add_spec_dacs(spec, dac);
2949 }
2950 }
c7d4b2fa 2951
c21ca4a8
TI
2952 for (i = 0; i < cfg->hp_outs; i++) {
2953 nid = cfg->hp_pins[i];
2954 dac = get_unassigned_dac(codec, nid);
2955 if (dac) {
2956 if (!spec->multiout.hp_nid)
2957 spec->multiout.hp_nid = dac;
2958 else
2959 add_spec_extra_dacs(spec, dac);
7b043899 2960 }
c21ca4a8
TI
2961 spec->hp_dacs[i] = dac;
2962 }
2963
2964 for (i = 0; i < cfg->speaker_outs; i++) {
2965 nid = cfg->speaker_pins[i];
2966 dac = get_unassigned_dac(codec, nid);
2967 if (dac)
2968 add_spec_extra_dacs(spec, dac);
2969 spec->speaker_dacs[i] = dac;
7b043899 2970 }
c7d4b2fa 2971
c21ca4a8 2972 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2973 spec->multiout.num_dacs,
2974 spec->multiout.dac_nids[0],
2975 spec->multiout.dac_nids[1],
2976 spec->multiout.dac_nids[2],
2977 spec->multiout.dac_nids[3],
2978 spec->multiout.dac_nids[4]);
c21ca4a8 2979
c7d4b2fa
M
2980 return 0;
2981}
2982
eb06ed8f
TI
2983/* create volume control/switch for the given prefx type */
2984static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2985{
2986 char name[32];
2987 int err;
2988
2989 sprintf(name, "%s Playback Volume", pfx);
2990 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2991 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2992 if (err < 0)
2993 return err;
2994 sprintf(name, "%s Playback Switch", pfx);
2995 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2996 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2997 if (err < 0)
2998 return err;
2999 return 0;
3000}
3001
ae0afd81
MR
3002static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3003{
c21ca4a8 3004 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3005 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3006 return 1;
3007 } else {
3008 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3009 spec->multiout.num_dacs++;
3010 }
3011 return 0;
3012}
3013
c21ca4a8 3014static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3015{
c21ca4a8
TI
3016 int i;
3017 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3018 if (!spec->multiout.extra_out_nid[i]) {
3019 spec->multiout.extra_out_nid[i] = nid;
3020 return 0;
3021 }
3022 }
3023 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3024 return 1;
ae0afd81
MR
3025}
3026
76624534
TI
3027static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3028{
3029 int i;
3030
3031 if (spec->autocfg.line_outs != 1)
3032 return 0;
3033 if (spec->multiout.hp_nid == nid)
3034 return 0;
3035 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3036 if (spec->multiout.extra_out_nid[i] == nid)
3037 return 0;
3038 return 1;
3039}
3040
c7d4b2fa 3041/* add playback controls from the parsed DAC table */
0fb87bb4 3042static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3043 const struct auto_pin_cfg *cfg)
c7d4b2fa 3044{
76624534 3045 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3046 static const char *chname[4] = {
3047 "Front", "Surround", NULL /*CLFE*/, "Side"
3048 };
d21995e3 3049 hda_nid_t nid = 0;
91589232
TI
3050 int i, err;
3051 unsigned int wid_caps;
0fb87bb4 3052
c21ca4a8 3053 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3054 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3055 if (i == 2) {
3056 /* Center/LFE */
eb06ed8f
TI
3057 err = create_controls(spec, "Center", nid, 1);
3058 if (err < 0)
c7d4b2fa 3059 return err;
eb06ed8f
TI
3060 err = create_controls(spec, "LFE", nid, 2);
3061 if (err < 0)
c7d4b2fa 3062 return err;
0fb87bb4
ML
3063
3064 wid_caps = get_wcaps(codec, nid);
3065
3066 if (wid_caps & AC_WCAP_LR_SWAP) {
3067 err = stac92xx_add_control(spec,
3068 STAC_CTL_WIDGET_CLFE_SWITCH,
3069 "Swap Center/LFE Playback Switch", nid);
3070
3071 if (err < 0)
3072 return err;
3073 }
3074
c7d4b2fa 3075 } else {
76624534
TI
3076 const char *name = chname[i];
3077 /* if it's a single DAC, assign a better name */
3078 if (!i && is_unique_dac(spec, nid)) {
3079 switch (cfg->line_out_type) {
3080 case AUTO_PIN_HP_OUT:
3081 name = "Headphone";
3082 break;
3083 case AUTO_PIN_SPEAKER_OUT:
3084 name = "Speaker";
3085 break;
3086 }
3087 }
3088 err = create_controls(spec, name, nid, 3);
eb06ed8f 3089 if (err < 0)
c7d4b2fa
M
3090 return err;
3091 }
3092 }
3093
a9cb5c90 3094 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3095 err = stac92xx_add_control(spec,
3096 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3097 "Headphone as Line Out Switch",
3098 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3099 if (err < 0)
3100 return err;
3101 }
3102
b5895dc8 3103 if (spec->line_switch) {
c21ca4a8
TI
3104 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3105 "Line In as Output Switch",
3106 spec->line_switch << 8);
3107 if (err < 0)
3108 return err;
b5895dc8 3109 }
403d1944 3110
b5895dc8 3111 if (spec->mic_switch) {
c21ca4a8
TI
3112 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3113 "Mic as Output Switch",
3114 (spec->mic_switch << 8) | 1);
3115 if (err < 0)
3116 return err;
b5895dc8 3117 }
403d1944 3118
c7d4b2fa
M
3119 return 0;
3120}
3121
eb06ed8f
TI
3122/* add playback controls for Speaker and HP outputs */
3123static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3124 struct auto_pin_cfg *cfg)
3125{
3126 struct sigmatel_spec *spec = codec->spec;
3127 hda_nid_t nid;
c21ca4a8 3128 int i, err, nums;
eb06ed8f 3129
c21ca4a8 3130 nums = 0;
eb06ed8f 3131 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3132 static const char *pfxs[] = {
3133 "Headphone", "Headphone2", "Headphone3",
3134 };
eb06ed8f
TI
3135 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3136 if (wid_caps & AC_WCAP_UNSOL_CAP)
3137 spec->hp_detect = 1;
c21ca4a8 3138 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3139 continue;
c21ca4a8
TI
3140 nid = spec->hp_dacs[i];
3141 if (!nid)
eb06ed8f 3142 continue;
c21ca4a8
TI
3143 err = create_controls(spec, pfxs[nums++], nid, 3);
3144 if (err < 0)
3145 return err;
1b290a51 3146 }
c21ca4a8
TI
3147 nums = 0;
3148 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3149 static const char *pfxs[] = {
3150 "Speaker", "External Speaker", "Speaker2",
3151 };
c21ca4a8
TI
3152 if (nums >= ARRAY_SIZE(pfxs))
3153 continue;
3154 nid = spec->speaker_dacs[i];
3155 if (!nid)
3156 continue;
3157 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3158 if (err < 0)
3159 return err;
3160 }
c7d4b2fa
M
3161 return 0;
3162}
3163
b22b4821 3164/* labels for mono mux outputs */
d0513fc6
MR
3165static const char *stac92xx_mono_labels[4] = {
3166 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3167};
3168
3169/* create mono mux for mono out on capable codecs */
3170static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3171{
3172 struct sigmatel_spec *spec = codec->spec;
3173 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3174 int i, num_cons;
3175 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3176
3177 num_cons = snd_hda_get_connections(codec,
3178 spec->mono_nid,
3179 con_lst,
3180 HDA_MAX_NUM_INPUTS);
3181 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3182 return -EINVAL;
3183
3184 for (i = 0; i < num_cons; i++) {
3185 mono_mux->items[mono_mux->num_items].label =
3186 stac92xx_mono_labels[i];
3187 mono_mux->items[mono_mux->num_items].index = i;
3188 mono_mux->num_items++;
3189 }
09a99959
MR
3190
3191 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3192 "Mono Mux", spec->mono_nid);
b22b4821
MR
3193}
3194
89385035
MR
3195/* labels for amp mux outputs */
3196static const char *stac92xx_amp_labels[3] = {
4b33c767 3197 "Front Microphone", "Microphone", "Line In",
89385035
MR
3198};
3199
3200/* create amp out controls mux on capable codecs */
3201static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3202{
3203 struct sigmatel_spec *spec = codec->spec;
3204 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3205 int i, err;
3206
2a9c7816 3207 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3208 amp_mux->items[amp_mux->num_items].label =
3209 stac92xx_amp_labels[i];
3210 amp_mux->items[amp_mux->num_items].index = i;
3211 amp_mux->num_items++;
3212 }
3213
2a9c7816
MR
3214 if (spec->num_amps > 1) {
3215 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3216 "Amp Selector Capture Switch", 0);
3217 if (err < 0)
3218 return err;
3219 }
89385035
MR
3220 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3221 "Amp Capture Volume",
3222 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3223}
3224
3225
1cd2224c
MR
3226/* create PC beep volume controls */
3227static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3228 hda_nid_t nid)
3229{
3230 struct sigmatel_spec *spec = codec->spec;
3231 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3232 int err;
3233
3234 /* check for mute support for the the amp */
3235 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3236 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3237 "PC Beep Playback Switch",
3238 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3239 if (err < 0)
3240 return err;
3241 }
3242
3243 /* check to see if there is volume support for the amp */
3244 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3245 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3246 "PC Beep Playback Volume",
3247 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3248 if (err < 0)
3249 return err;
3250 }
3251 return 0;
3252}
3253
4d4e9bb3
TI
3254#ifdef CONFIG_SND_HDA_INPUT_BEEP
3255#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3256
3257static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3258 struct snd_ctl_elem_value *ucontrol)
3259{
3260 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3261 ucontrol->value.integer.value[0] = codec->beep->enabled;
3262 return 0;
3263}
3264
3265static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3266 struct snd_ctl_elem_value *ucontrol)
3267{
3268 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3269 int enabled = !!ucontrol->value.integer.value[0];
3270 if (codec->beep->enabled != enabled) {
3271 codec->beep->enabled = enabled;
3272 return 1;
3273 }
3274 return 0;
3275}
3276
3277static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3278 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3279 .info = stac92xx_dig_beep_switch_info,
3280 .get = stac92xx_dig_beep_switch_get,
3281 .put = stac92xx_dig_beep_switch_put,
3282};
3283
3284static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3285{
3286 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3287 0, "PC Beep Playback Switch", 0);
3288}
3289#endif
3290
4682eee0
MR
3291static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3292{
3293 struct sigmatel_spec *spec = codec->spec;
3294 int wcaps, nid, i, err = 0;
3295
3296 for (i = 0; i < spec->num_muxes; i++) {
3297 nid = spec->mux_nids[i];
3298 wcaps = get_wcaps(codec, nid);
3299
3300 if (wcaps & AC_WCAP_OUT_AMP) {
3301 err = stac92xx_add_control_idx(spec,
3302 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3303 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3304 if (err < 0)
3305 return err;
3306 }
3307 }
3308 return 0;
3309};
3310
d9737751 3311static const char *stac92xx_spdif_labels[3] = {
65973632 3312 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3313};
3314
3315static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3316{
3317 struct sigmatel_spec *spec = codec->spec;
3318 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3319 const char **labels = spec->spdif_labels;
d9737751 3320 int i, num_cons;
65973632 3321 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3322
3323 num_cons = snd_hda_get_connections(codec,
3324 spec->smux_nids[0],
3325 con_lst,
3326 HDA_MAX_NUM_INPUTS);
65973632 3327 if (!num_cons)
d9737751
MR
3328 return -EINVAL;
3329
65973632
MR
3330 if (!labels)
3331 labels = stac92xx_spdif_labels;
3332
d9737751 3333 for (i = 0; i < num_cons; i++) {
65973632 3334 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3335 spdif_mux->items[spdif_mux->num_items].index = i;
3336 spdif_mux->num_items++;
3337 }
3338
3339 return 0;
3340}
3341
8b65727b 3342/* labels for dmic mux inputs */
ddc2cec4 3343static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3344 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3345 "Digital Mic 3", "Digital Mic 4"
3346};
3347
3348/* create playback/capture controls for input pins on dmic capable codecs */
3349static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3350 const struct auto_pin_cfg *cfg)
3351{
3352 struct sigmatel_spec *spec = codec->spec;
3353 struct hda_input_mux *dimux = &spec->private_dimux;
3354 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3355 int err, i, j;
3356 char name[32];
8b65727b
MP
3357
3358 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3359 dimux->items[dimux->num_items].index = 0;
3360 dimux->num_items++;
3361
3362 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3363 hda_nid_t nid;
8b65727b
MP
3364 int index;
3365 int num_cons;
0678accd 3366 unsigned int wcaps;
8b65727b
MP
3367 unsigned int def_conf;
3368
3369 def_conf = snd_hda_codec_read(codec,
3370 spec->dmic_nids[i],
3371 0,
3372 AC_VERB_GET_CONFIG_DEFAULT,
3373 0);
3374 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3375 continue;
3376
0678accd 3377 nid = spec->dmic_nids[i];
8b65727b 3378 num_cons = snd_hda_get_connections(codec,
e1f0d669 3379 spec->dmux_nids[0],
8b65727b
MP
3380 con_lst,
3381 HDA_MAX_NUM_INPUTS);
3382 for (j = 0; j < num_cons; j++)
0678accd 3383 if (con_lst[j] == nid) {
8b65727b
MP
3384 index = j;
3385 goto found;
3386 }
3387 continue;
3388found:
d0513fc6
MR
3389 wcaps = get_wcaps(codec, nid) &
3390 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3391
d0513fc6 3392 if (wcaps) {
0678accd
MR
3393 sprintf(name, "%s Capture Volume",
3394 stac92xx_dmic_labels[dimux->num_items]);
3395
3396 err = stac92xx_add_control(spec,
3397 STAC_CTL_WIDGET_VOL,
3398 name,
d0513fc6
MR
3399 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3400 (wcaps & AC_WCAP_OUT_AMP) ?
3401 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3402 if (err < 0)
3403 return err;
3404 }
3405
8b65727b
MP
3406 dimux->items[dimux->num_items].label =
3407 stac92xx_dmic_labels[dimux->num_items];
3408 dimux->items[dimux->num_items].index = index;
3409 dimux->num_items++;
3410 }
3411
3412 return 0;
3413}
3414
c7d4b2fa
M
3415/* create playback/capture controls for input pins */
3416static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3417{
3418 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3419 struct hda_input_mux *imux = &spec->private_imux;
3420 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3421 int i, j, k;
3422
3423 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3424 int index;
3425
3426 if (!cfg->input_pins[i])
3427 continue;
3428 index = -1;
3429 for (j = 0; j < spec->num_muxes; j++) {
3430 int num_cons;
3431 num_cons = snd_hda_get_connections(codec,
3432 spec->mux_nids[j],
3433 con_lst,
3434 HDA_MAX_NUM_INPUTS);
3435 for (k = 0; k < num_cons; k++)
3436 if (con_lst[k] == cfg->input_pins[i]) {
3437 index = k;
3438 goto found;
3439 }
c7d4b2fa 3440 }
314634bc
TI
3441 continue;
3442 found:
3443 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3444 imux->items[imux->num_items].index = index;
3445 imux->num_items++;
c7d4b2fa
M
3446 }
3447
7b043899 3448 if (imux->num_items) {
62fe78e9
SR
3449 /*
3450 * Set the current input for the muxes.
3451 * The STAC9221 has two input muxes with identical source
3452 * NID lists. Hopefully this won't get confused.
3453 */
3454 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3455 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3456 AC_VERB_SET_CONNECT_SEL,
3457 imux->items[0].index);
62fe78e9
SR
3458 }
3459 }
3460
c7d4b2fa
M
3461 return 0;
3462}
3463
c7d4b2fa
M
3464static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3465{
3466 struct sigmatel_spec *spec = codec->spec;
3467 int i;
3468
3469 for (i = 0; i < spec->autocfg.line_outs; i++) {
3470 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3471 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3472 }
3473}
3474
3475static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3476{
3477 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3478 int i;
c7d4b2fa 3479
eb06ed8f
TI
3480 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3481 hda_nid_t pin;
3482 pin = spec->autocfg.hp_pins[i];
3483 if (pin) /* connect to front */
3484 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3485 }
3486 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3487 hda_nid_t pin;
3488 pin = spec->autocfg.speaker_pins[i];
3489 if (pin) /* connect to front */
3490 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3491 }
c7d4b2fa
M
3492}
3493
3cc08dc6 3494static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3495{
3496 struct sigmatel_spec *spec = codec->spec;
3497 int err;
3498
8b65727b
MP
3499 if ((err = snd_hda_parse_pin_def_config(codec,
3500 &spec->autocfg,
3501 spec->dmic_nids)) < 0)
c7d4b2fa 3502 return err;
82bc955f 3503 if (! spec->autocfg.line_outs)
869264c4 3504 return 0; /* can't find valid pin config */
19039bd0 3505
bcecd9bd
JZ
3506 /* If we have no real line-out pin and multiple hp-outs, HPs should
3507 * be set up as multi-channel outputs.
3508 */
3509 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3510 spec->autocfg.hp_outs > 1) {
3511 /* Copy hp_outs to line_outs, backup line_outs in
3512 * speaker_outs so that the following routines can handle
3513 * HP pins as primary outputs.
3514 */
c21ca4a8 3515 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3516 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3517 sizeof(spec->autocfg.line_out_pins));
3518 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3519 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3520 sizeof(spec->autocfg.hp_pins));
3521 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3522 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3523 spec->autocfg.hp_outs = 0;
bcecd9bd 3524 }
09a99959 3525 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3526 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3527 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3528 u32 caps = query_amp_caps(codec,
3529 spec->autocfg.mono_out_pin, dir);
3530 hda_nid_t conn_list[1];
3531
3532 /* get the mixer node and then the mono mux if it exists */
3533 if (snd_hda_get_connections(codec,
3534 spec->autocfg.mono_out_pin, conn_list, 1) &&
3535 snd_hda_get_connections(codec, conn_list[0],
3536 conn_list, 1)) {
3537
3538 int wcaps = get_wcaps(codec, conn_list[0]);
3539 int wid_type = (wcaps & AC_WCAP_TYPE)
3540 >> AC_WCAP_TYPE_SHIFT;
3541 /* LR swap check, some stac925x have a mux that
3542 * changes the DACs output path instead of the
3543 * mono-mux path.
3544 */
3545 if (wid_type == AC_WID_AUD_SEL &&
3546 !(wcaps & AC_WCAP_LR_SWAP))
3547 spec->mono_nid = conn_list[0];
3548 }
d0513fc6
MR
3549 if (dir) {
3550 hda_nid_t nid = spec->autocfg.mono_out_pin;
3551
3552 /* most mono outs have a least a mute/unmute switch */
3553 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3554 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3555 "Mono Playback Switch",
3556 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3557 if (err < 0)
3558 return err;
d0513fc6
MR
3559 /* check for volume support for the amp */
3560 if ((caps & AC_AMPCAP_NUM_STEPS)
3561 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3562 err = stac92xx_add_control(spec,
3563 STAC_CTL_WIDGET_VOL,
3564 "Mono Playback Volume",
3565 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3566 if (err < 0)
3567 return err;
3568 }
09a99959
MR
3569 }
3570
3571 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3572 AC_PINCTL_OUT_EN);
3573 }
bcecd9bd 3574
c21ca4a8
TI
3575 if (!spec->multiout.num_dacs) {
3576 err = stac92xx_auto_fill_dac_nids(codec);
3577 if (err < 0)
19039bd0 3578 return err;
c9280d68
TI
3579 err = stac92xx_auto_create_multi_out_ctls(codec,
3580 &spec->autocfg);
3581 if (err < 0)
3582 return err;
c21ca4a8 3583 }
c7d4b2fa 3584
1cd2224c
MR
3585 /* setup analog beep controls */
3586 if (spec->anabeep_nid > 0) {
3587 err = stac92xx_auto_create_beep_ctls(codec,
3588 spec->anabeep_nid);
3589 if (err < 0)
3590 return err;
3591 }
3592
3593 /* setup digital beep controls and input device */
3594#ifdef CONFIG_SND_HDA_INPUT_BEEP
3595 if (spec->digbeep_nid > 0) {
3596 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3597 unsigned int caps;
1cd2224c
MR
3598
3599 err = stac92xx_auto_create_beep_ctls(codec, nid);
3600 if (err < 0)
3601 return err;
3602 err = snd_hda_attach_beep_device(codec, nid);
3603 if (err < 0)
3604 return err;
4d4e9bb3
TI
3605 /* if no beep switch is available, make its own one */
3606 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3607 if (codec->beep &&
3608 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3609 err = stac92xx_beep_switch_ctl(codec);
3610 if (err < 0)
3611 return err;
3612 }
1cd2224c
MR
3613 }
3614#endif
3615
0fb87bb4
ML
3616 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3617
3618 if (err < 0)
3619 return err;
3620
3621 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3622
3623 if (err < 0)
c7d4b2fa
M
3624 return err;
3625
b22b4821
MR
3626 if (spec->mono_nid > 0) {
3627 err = stac92xx_auto_create_mono_output_ctls(codec);
3628 if (err < 0)
3629 return err;
3630 }
2a9c7816 3631 if (spec->num_amps > 0) {
89385035
MR
3632 err = stac92xx_auto_create_amp_output_ctls(codec);
3633 if (err < 0)
3634 return err;
3635 }
2a9c7816 3636 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3637 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3638 &spec->autocfg)) < 0)
3639 return err;
4682eee0
MR
3640 if (spec->num_muxes > 0) {
3641 err = stac92xx_auto_create_mux_input_ctls(codec);
3642 if (err < 0)
3643 return err;
3644 }
d9737751
MR
3645 if (spec->num_smuxes > 0) {
3646 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3647 if (err < 0)
3648 return err;
3649 }
8b65727b 3650
c7d4b2fa 3651 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3652 if (spec->multiout.max_channels > 2)
c7d4b2fa 3653 spec->surr_switch = 1;
c7d4b2fa 3654
82bc955f 3655 if (spec->autocfg.dig_out_pin)
3cc08dc6 3656 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3657 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3658 spec->dig_in_nid = dig_in;
c7d4b2fa 3659
603c4019
TI
3660 if (spec->kctls.list)
3661 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3662
3663 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3664 if (!spec->dinput_mux)
3665 spec->dinput_mux = &spec->private_dimux;
d9737751 3666 spec->sinput_mux = &spec->private_smux;
b22b4821 3667 spec->mono_mux = &spec->private_mono_mux;
89385035 3668 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3669 return 1;
3670}
3671
82bc955f
TI
3672/* add playback controls for HP output */
3673static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3674 struct auto_pin_cfg *cfg)
3675{
3676 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3677 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3678 unsigned int wid_caps;
3679
3680 if (! pin)
3681 return 0;
3682
3683 wid_caps = get_wcaps(codec, pin);
505cb341 3684 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3685 spec->hp_detect = 1;
82bc955f
TI
3686
3687 return 0;
3688}
3689
160ea0dc
RF
3690/* add playback controls for LFE output */
3691static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3692 struct auto_pin_cfg *cfg)
3693{
3694 struct sigmatel_spec *spec = codec->spec;
3695 int err;
3696 hda_nid_t lfe_pin = 0x0;
3697 int i;
3698
3699 /*
3700 * search speaker outs and line outs for a mono speaker pin
3701 * with an amp. If one is found, add LFE controls
3702 * for it.
3703 */
3704 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3705 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3706 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3707 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3708 if (wcaps == AC_WCAP_OUT_AMP)
3709 /* found a mono speaker with an amp, must be lfe */
3710 lfe_pin = pin;
3711 }
3712
3713 /* if speaker_outs is 0, then speakers may be in line_outs */
3714 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3715 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3716 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3717 unsigned int defcfg;
8b551785 3718 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3719 AC_VERB_GET_CONFIG_DEFAULT,
3720 0x00);
8b551785 3721 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3722 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3723 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3724 if (wcaps == AC_WCAP_OUT_AMP)
3725 /* found a mono speaker with an amp,
3726 must be lfe */
3727 lfe_pin = pin;
3728 }
3729 }
3730 }
3731
3732 if (lfe_pin) {
eb06ed8f 3733 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF
3734 if (err < 0)
3735 return err;
3736 }
3737
3738 return 0;
3739}
3740
c7d4b2fa
M
3741static int stac9200_parse_auto_config(struct hda_codec *codec)
3742{
3743 struct sigmatel_spec *spec = codec->spec;
3744 int err;
3745
df694daa 3746 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3747 return err;
3748
3749 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3750 return err;
3751
82bc955f
TI
3752 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3753 return err;
3754
160ea0dc
RF
3755 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3756 return err;
3757
355a0ec4
TI
3758 if (spec->num_muxes > 0) {
3759 err = stac92xx_auto_create_mux_input_ctls(codec);
3760 if (err < 0)
3761 return err;
3762 }
3763
82bc955f 3764 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3765 spec->multiout.dig_out_nid = 0x05;
82bc955f 3766 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3767 spec->dig_in_nid = 0x04;
c7d4b2fa 3768
603c4019
TI
3769 if (spec->kctls.list)
3770 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3771
3772 spec->input_mux = &spec->private_imux;
8b65727b 3773 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3774
3775 return 1;
3776}
3777
62fe78e9
SR
3778/*
3779 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3780 * funky external mute control using GPIO pins.
3781 */
3782
76e1ddfb 3783static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3784 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3785{
3786 unsigned int gpiostate, gpiomask, gpiodir;
3787
3788 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3789 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3790 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3791
3792 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3793 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3794 gpiomask |= mask;
62fe78e9
SR
3795
3796 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3797 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3798 gpiodir |= dir_mask;
62fe78e9 3799
76e1ddfb 3800 /* Configure GPIOx as CMOS */
62fe78e9
SR
3801 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3802
3803 snd_hda_codec_write(codec, codec->afg, 0,
3804 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3805 snd_hda_codec_read(codec, codec->afg, 0,
3806 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3807
3808 msleep(1);
3809
76e1ddfb
TI
3810 snd_hda_codec_read(codec, codec->afg, 0,
3811 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3812}
3813
74aeaabc
MR
3814static int stac92xx_add_jack(struct hda_codec *codec,
3815 hda_nid_t nid, int type)
3816{
e4973e1e 3817#ifdef CONFIG_SND_JACK
74aeaabc
MR
3818 struct sigmatel_spec *spec = codec->spec;
3819 struct sigmatel_jack *jack;
3820 int def_conf = snd_hda_codec_read(codec, nid,
3821 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3822 int connectivity = get_defcfg_connect(def_conf);
3823 char name[32];
3824
3825 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3826 return 0;
3827
3828 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3829 jack = snd_array_new(&spec->jacks);
3830 if (!jack)
3831 return -ENOMEM;
3832 jack->nid = nid;
3833 jack->type = type;
3834
3835 sprintf(name, "%s at %s %s Jack",
3836 snd_hda_get_jack_type(def_conf),
3837 snd_hda_get_jack_connectivity(def_conf),
3838 snd_hda_get_jack_location(def_conf));
3839
3840 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3841#else
3842 return 0;
3843#endif
74aeaabc
MR
3844}
3845
c6e4c666
TI
3846static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3847 unsigned char type, int data)
74aeaabc
MR
3848{
3849 struct sigmatel_event *event;
3850
3851 snd_array_init(&spec->events, sizeof(*event), 32);
3852 event = snd_array_new(&spec->events);
3853 if (!event)
3854 return -ENOMEM;
3855 event->nid = nid;
c6e4c666
TI
3856 event->type = type;
3857 event->tag = spec->events.used;
74aeaabc
MR
3858 event->data = data;
3859
c6e4c666 3860 return event->tag;
74aeaabc
MR
3861}
3862
c6e4c666
TI
3863static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3864 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3865{
3866 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3867 struct sigmatel_event *event = spec->events.list;
3868 int i;
3869
3870 for (i = 0; i < spec->events.used; i++, event++) {
3871 if (event->nid == nid && event->type == type)
3872 return event;
74aeaabc 3873 }
c6e4c666 3874 return NULL;
74aeaabc
MR
3875}
3876
c6e4c666
TI
3877static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3878 unsigned char tag)
314634bc 3879{
c6e4c666
TI
3880 struct sigmatel_spec *spec = codec->spec;
3881 struct sigmatel_event *event = spec->events.list;
3882 int i;
3883
3884 for (i = 0; i < spec->events.used; i++, event++) {
3885 if (event->tag == tag)
3886 return event;
74aeaabc 3887 }
c6e4c666
TI
3888 return NULL;
3889}
3890
3891static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3892 unsigned int type)
3893{
3894 struct sigmatel_event *event;
3895 int tag;
3896
3897 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3898 return;
3899 event = stac_get_event(codec, nid, type);
3900 if (event)
3901 tag = event->tag;
3902 else
3903 tag = stac_add_event(codec->spec, nid, type, 0);
3904 if (tag < 0)
3905 return;
3906 snd_hda_codec_write_cache(codec, nid, 0,
3907 AC_VERB_SET_UNSOLICITED_ENABLE,
3908 AC_USRSP_EN | tag);
314634bc
TI
3909}
3910
a64135a2
MR
3911static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3912{
3913 int i;
3914 for (i = 0; i < cfg->hp_outs; i++)
3915 if (cfg->hp_pins[i] == nid)
3916 return 1; /* nid is a HP-Out */
3917
3918 return 0; /* nid is not a HP-Out */
3919};
3920
b76c850f
MR
3921static void stac92xx_power_down(struct hda_codec *codec)
3922{
3923 struct sigmatel_spec *spec = codec->spec;
3924
3925 /* power down inactive DACs */
3926 hda_nid_t *dac;
3927 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3928 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3929 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
3930 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3931}
3932
f73d3585
TI
3933static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3934 int enable);
3935
c7d4b2fa
M
3936static int stac92xx_init(struct hda_codec *codec)
3937{
3938 struct sigmatel_spec *spec = codec->spec;
82bc955f 3939 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3940 unsigned int gpio;
e4973e1e 3941 int i;
c7d4b2fa 3942
c7d4b2fa
M
3943 snd_hda_sequence_write(codec, spec->init);
3944
8daaaa97
MR
3945 /* power down adcs initially */
3946 if (spec->powerdown_adcs)
3947 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3948 snd_hda_codec_write(codec,
8daaaa97
MR
3949 spec->adc_nids[i], 0,
3950 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
3951
3952 /* set up GPIO */
3953 gpio = spec->gpio_data;
3954 /* turn on EAPD statically when spec->eapd_switch isn't set.
3955 * otherwise, unsol event will turn it on/off dynamically
3956 */
3957 if (!spec->eapd_switch)
3958 gpio |= spec->eapd_mask;
3959 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3960
82bc955f
TI
3961 /* set up pins */
3962 if (spec->hp_detect) {
505cb341 3963 /* Enable unsolicited responses on the HP widget */
74aeaabc 3964 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3965 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3966 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3967 }
0a07acaf
TI
3968 /* force to enable the first line-out; the others are set up
3969 * in unsol_event
3970 */
3971 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3972 AC_PINCTL_OUT_EN);
82bc955f 3973 /* fake event to set up pins */
c6e4c666
TI
3974 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3975 STAC_HP_EVENT);
82bc955f
TI
3976 } else {
3977 stac92xx_auto_init_multi_out(codec);
3978 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
3979 for (i = 0; i < cfg->hp_outs; i++)
3980 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
3981 }
3982 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
3983 hda_nid_t nid = cfg->input_pins[i];
3984 if (nid) {
12dde4c6 3985 unsigned int pinctl, conf;
4f1e6bc3
TI
3986 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3987 /* for mic pins, force to initialize */
3988 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
3989 pinctl |= AC_PINCTL_IN_EN;
3990 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
3991 } else {
3992 pinctl = snd_hda_codec_read(codec, nid, 0,
3993 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3994 /* if PINCTL already set then skip */
12dde4c6
TI
3995 if (!(pinctl & AC_PINCTL_IN_EN)) {
3996 pinctl |= AC_PINCTL_IN_EN;
3997 stac92xx_auto_set_pinctl(codec, nid,
3998 pinctl);
3999 }
4000 }
4001 conf = snd_hda_codec_read(codec, nid, 0,
4002 AC_VERB_GET_CONFIG_DEFAULT, 0);
4003 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4004 enable_pin_detect(codec, nid,
4005 STAC_INSERT_EVENT);
4006 stac_issue_unsol_event(codec, nid,
4007 STAC_INSERT_EVENT);
4f1e6bc3 4008 }
c960a03b 4009 }
82bc955f 4010 }
a64135a2
MR
4011 for (i = 0; i < spec->num_dmics; i++)
4012 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4013 AC_PINCTL_IN_EN);
f73d3585
TI
4014 if (cfg->dig_out_pin)
4015 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4016 AC_PINCTL_OUT_EN);
4017 if (cfg->dig_in_pin)
4018 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4019 AC_PINCTL_IN_EN);
a64135a2 4020 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4021 hda_nid_t nid = spec->pwr_nids[i];
4022 int pinctl, def_conf;
f73d3585 4023
eb632128
TI
4024 /* power on when no jack detection is available */
4025 if (!spec->hp_detect) {
4026 stac_toggle_power_map(codec, nid, 1);
4027 continue;
4028 }
4029
4030 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4031 continue; /* already has an unsol event */
4032
4033 pinctl = snd_hda_codec_read(codec, nid, 0,
4034 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4035 /* outputs are only ports capable of power management
4036 * any attempts on powering down a input port cause the
4037 * referenced VREF to act quirky.
4038 */
eb632128
TI
4039 if (pinctl & AC_PINCTL_IN_EN) {
4040 stac_toggle_power_map(codec, nid, 1);
a64135a2 4041 continue;
eb632128 4042 }
f73d3585
TI
4043 def_conf = snd_hda_codec_read(codec, nid, 0,
4044 AC_VERB_GET_CONFIG_DEFAULT, 0);
4045 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4046 /* skip any ports that don't have jacks since presence
4047 * detection is useless */
f73d3585
TI
4048 if (def_conf != AC_JACK_PORT_COMPLEX) {
4049 if (def_conf != AC_JACK_PORT_NONE)
4050 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4051 continue;
f73d3585 4052 }
12dde4c6
TI
4053 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4054 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4055 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4056 }
a64135a2 4057 }
b76c850f
MR
4058 if (spec->dac_list)
4059 stac92xx_power_down(codec);
c7d4b2fa
M
4060 return 0;
4061}
4062
74aeaabc
MR
4063static void stac92xx_free_jacks(struct hda_codec *codec)
4064{
e4973e1e 4065#ifdef CONFIG_SND_JACK
b94d3539 4066 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4067 struct sigmatel_spec *spec = codec->spec;
b94d3539 4068 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4069 struct sigmatel_jack *jacks = spec->jacks.list;
4070 int i;
4071 for (i = 0; i < spec->jacks.used; i++)
4072 snd_device_free(codec->bus->card, &jacks[i].jack);
4073 }
4074 snd_array_free(&spec->jacks);
e4973e1e 4075#endif
74aeaabc
MR
4076}
4077
603c4019
TI
4078static void stac92xx_free_kctls(struct hda_codec *codec)
4079{
4080 struct sigmatel_spec *spec = codec->spec;
4081
4082 if (spec->kctls.list) {
4083 struct snd_kcontrol_new *kctl = spec->kctls.list;
4084 int i;
4085 for (i = 0; i < spec->kctls.used; i++)
4086 kfree(kctl[i].name);
4087 }
4088 snd_array_free(&spec->kctls);
4089}
4090
2f2f4251
M
4091static void stac92xx_free(struct hda_codec *codec)
4092{
c7d4b2fa 4093 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4094
4095 if (! spec)
4096 return;
4097
af9f341a 4098 kfree(spec->pin_configs);
74aeaabc
MR
4099 stac92xx_free_jacks(codec);
4100 snd_array_free(&spec->events);
11b44bbd 4101
c7d4b2fa 4102 kfree(spec);
1cd2224c 4103 snd_hda_detach_beep_device(codec);
2f2f4251
M
4104}
4105
4e55096e
M
4106static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4107 unsigned int flag)
4108{
4109 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4110 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4111
f9acba43
TI
4112 if (pin_ctl & AC_PINCTL_IN_EN) {
4113 /*
4114 * we need to check the current set-up direction of
4115 * shared input pins since they can be switched via
4116 * "xxx as Output" mixer switch
4117 */
4118 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4119 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4120 return;
4121 }
4122
7b043899
SL
4123 /* if setting pin direction bits, clear the current
4124 direction bits first */
4125 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4126 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4127
82beb8fd 4128 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4129 AC_VERB_SET_PIN_WIDGET_CONTROL,
4130 pin_ctl | flag);
4131}
4132
4133static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4134 unsigned int flag)
4135{
4136 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4137 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4138 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4139 AC_VERB_SET_PIN_WIDGET_CONTROL,
4140 pin_ctl & ~flag);
4141}
4142
e6e3ea25 4143static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4144{
4145 if (!nid)
4146 return 0;
4147 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4148 & (1 << 31))
4149 return 1;
314634bc
TI
4150 return 0;
4151}
4152
d7a89436
TI
4153/* return non-zero if the hp-pin of the given array index isn't
4154 * a jack-detection target
4155 */
4156static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4157{
4158 struct auto_pin_cfg *cfg = &spec->autocfg;
4159
4160 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4161 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4162 return 1;
c21ca4a8 4163 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4164 return 1;
4165 /* ignore if the pin is set as line-out */
4166 if (cfg->hp_pins[i] == spec->hp_switch)
4167 return 1;
4168 return 0;
4169}
4170
c6e4c666 4171static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4172{
4173 struct sigmatel_spec *spec = codec->spec;
4174 struct auto_pin_cfg *cfg = &spec->autocfg;
4175 int i, presence;
4176
eb06ed8f 4177 presence = 0;
4fe5195c
MR
4178 if (spec->gpio_mute)
4179 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4180 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4181
eb06ed8f 4182 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4183 if (presence)
4184 break;
d7a89436
TI
4185 if (no_hp_sensing(spec, i))
4186 continue;
e6e3ea25
TI
4187 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4188 if (presence) {
4189 unsigned int pinctl;
4190 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4191 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4192 if (pinctl & AC_PINCTL_IN_EN)
4193 presence = 0; /* mic- or line-input */
4194 }
eb06ed8f 4195 }
4e55096e
M
4196
4197 if (presence) {
d7a89436 4198 /* disable lineouts */
7c2ba97b 4199 if (spec->hp_switch)
d7a89436
TI
4200 stac92xx_reset_pinctl(codec, spec->hp_switch,
4201 AC_PINCTL_OUT_EN);
4e55096e
M
4202 for (i = 0; i < cfg->line_outs; i++)
4203 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4204 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4205 for (i = 0; i < cfg->speaker_outs; i++)
4206 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4207 AC_PINCTL_OUT_EN);
c0cea0d0 4208 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4209 stac_gpio_set(codec, spec->gpio_mask,
4210 spec->gpio_dir, spec->gpio_data &
4211 ~spec->eapd_mask);
4e55096e 4212 } else {
d7a89436 4213 /* enable lineouts */
7c2ba97b 4214 if (spec->hp_switch)
d7a89436
TI
4215 stac92xx_set_pinctl(codec, spec->hp_switch,
4216 AC_PINCTL_OUT_EN);
4e55096e
M
4217 for (i = 0; i < cfg->line_outs; i++)
4218 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4219 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4220 for (i = 0; i < cfg->speaker_outs; i++)
4221 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4222 AC_PINCTL_OUT_EN);
c0cea0d0 4223 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4224 stac_gpio_set(codec, spec->gpio_mask,
4225 spec->gpio_dir, spec->gpio_data |
4226 spec->eapd_mask);
4e55096e 4227 }
d7a89436
TI
4228 /* toggle hp outs */
4229 for (i = 0; i < cfg->hp_outs; i++) {
4230 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4231 if (no_hp_sensing(spec, i))
4232 continue;
4233 if (presence)
4234 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4235#if 0 /* FIXME */
4236/* Resetting the pinctl like below may lead to (a sort of) regressions
4237 * on some devices since they use the HP pin actually for line/speaker
4238 * outs although the default pin config shows a different pin (that is
4239 * wrong and useless).
4240 *
4241 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4242 * But, disabling the code below just works around it, and I'm too tired of
4243 * bug reports with such devices...
4244 */
d7a89436
TI
4245 else
4246 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4247#endif /* FIXME */
d7a89436 4248 }
4e55096e
M
4249}
4250
f73d3585
TI
4251static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4252 int enable)
a64135a2
MR
4253{
4254 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4255 unsigned int idx, val;
4256
4257 for (idx = 0; idx < spec->num_pwrs; idx++) {
4258 if (spec->pwr_nids[idx] == nid)
4259 break;
4260 }
4261 if (idx >= spec->num_pwrs)
4262 return;
d0513fc6
MR
4263
4264 /* several codecs have two power down bits */
4265 if (spec->pwr_mapping)
4266 idx = spec->pwr_mapping[idx];
4267 else
4268 idx = 1 << idx;
a64135a2 4269
f73d3585
TI
4270 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4271 if (enable)
a64135a2
MR
4272 val &= ~idx;
4273 else
4274 val |= idx;
4275
4276 /* power down unused output ports */
4277 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4278}
4279
f73d3585
TI
4280static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4281{
e6e3ea25 4282 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4283}
a64135a2 4284
74aeaabc
MR
4285static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4286{
4287 struct sigmatel_spec *spec = codec->spec;
4288 struct sigmatel_jack *jacks = spec->jacks.list;
4289
4290 if (jacks) {
4291 int i;
4292 for (i = 0; i < spec->jacks.used; i++) {
4293 if (jacks->nid == nid) {
4294 unsigned int pin_ctl =
4295 snd_hda_codec_read(codec, nid,
4296 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4297 0x00);
4298 int type = jacks->type;
4299 if (type == (SND_JACK_LINEOUT
4300 | SND_JACK_HEADPHONE))
4301 type = (pin_ctl & AC_PINCTL_HP_EN)
4302 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4303 snd_jack_report(jacks->jack,
e6e3ea25 4304 get_pin_presence(codec, nid)
74aeaabc
MR
4305 ? type : 0);
4306 }
4307 jacks++;
4308 }
4309 }
4310}
a64135a2 4311
c6e4c666
TI
4312static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4313 unsigned char type)
4314{
4315 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4316 if (!event)
4317 return;
4318 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4319}
4320
314634bc
TI
4321static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4322{
a64135a2 4323 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4324 struct sigmatel_event *event;
4325 int tag, data;
a64135a2 4326
c6e4c666
TI
4327 tag = (res >> 26) & 0x7f;
4328 event = stac_get_event_from_tag(codec, tag);
4329 if (!event)
4330 return;
4331
4332 switch (event->type) {
314634bc 4333 case STAC_HP_EVENT:
c6e4c666 4334 stac92xx_hp_detect(codec);
a64135a2 4335 /* fallthru */
74aeaabc 4336 case STAC_INSERT_EVENT:
a64135a2 4337 case STAC_PWR_EVENT:
c6e4c666
TI
4338 if (spec->num_pwrs > 0)
4339 stac92xx_pin_sense(codec, event->nid);
4340 stac92xx_report_jack(codec, event->nid);
72474be6 4341 break;
c6e4c666
TI
4342 case STAC_VREF_EVENT:
4343 data = snd_hda_codec_read(codec, codec->afg, 0,
4344 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4345 /* toggle VREF state based on GPIOx status */
4346 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4347 !!(data & (1 << event->data)));
72474be6 4348 break;
314634bc
TI
4349 }
4350}
4351
2d34e1b3
TI
4352#ifdef CONFIG_PROC_FS
4353static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4354 struct hda_codec *codec, hda_nid_t nid)
4355{
4356 if (nid == codec->afg)
4357 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4358 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4359}
4360
4361static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4362 struct hda_codec *codec,
4363 unsigned int verb)
4364{
4365 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4366 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4367}
4368
4369/* stac92hd71bxx, stac92hd73xx */
4370static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4371 struct hda_codec *codec, hda_nid_t nid)
4372{
4373 stac92hd_proc_hook(buffer, codec, nid);
4374 if (nid == codec->afg)
4375 analog_loop_proc_hook(buffer, codec, 0xfa0);
4376}
4377
4378static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4379 struct hda_codec *codec, hda_nid_t nid)
4380{
4381 if (nid == codec->afg)
4382 analog_loop_proc_hook(buffer, codec, 0xfe0);
4383}
4384
4385static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4386 struct hda_codec *codec, hda_nid_t nid)
4387{
4388 if (nid == codec->afg)
4389 analog_loop_proc_hook(buffer, codec, 0xfeb);
4390}
4391#else
4392#define stac92hd_proc_hook NULL
4393#define stac92hd7x_proc_hook NULL
4394#define stac9205_proc_hook NULL
4395#define stac927x_proc_hook NULL
4396#endif
4397
cb53c626 4398#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4399static int stac92xx_resume(struct hda_codec *codec)
4400{
dc81bed1
TI
4401 struct sigmatel_spec *spec = codec->spec;
4402
11b44bbd 4403 stac92xx_set_config_regs(codec);
2c885878 4404 stac92xx_init(codec);
82beb8fd
TI
4405 snd_hda_codec_resume_amp(codec);
4406 snd_hda_codec_resume_cache(codec);
2c885878 4407 /* fake event to set up pins again to override cached values */
dc81bed1 4408 if (spec->hp_detect)
c6e4c666
TI
4409 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4410 STAC_HP_EVENT);
ff6fdc37
M
4411 return 0;
4412}
c6798d2b
MR
4413
4414static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4415{
4416 struct sigmatel_spec *spec = codec->spec;
4417 if (spec->eapd_mask)
4418 stac_gpio_set(codec, spec->gpio_mask,
4419 spec->gpio_dir, spec->gpio_data &
4420 ~spec->eapd_mask);
4421 return 0;
4422}
ff6fdc37
M
4423#endif
4424
2f2f4251
M
4425static struct hda_codec_ops stac92xx_patch_ops = {
4426 .build_controls = stac92xx_build_controls,
4427 .build_pcms = stac92xx_build_pcms,
4428 .init = stac92xx_init,
4429 .free = stac92xx_free,
4e55096e 4430 .unsol_event = stac92xx_unsol_event,
cb53c626 4431#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4432 .suspend = stac92xx_suspend,
ff6fdc37
M
4433 .resume = stac92xx_resume,
4434#endif
2f2f4251
M
4435};
4436
4437static int patch_stac9200(struct hda_codec *codec)
4438{
4439 struct sigmatel_spec *spec;
c7d4b2fa 4440 int err;
2f2f4251 4441
e560d8d8 4442 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4443 if (spec == NULL)
4444 return -ENOMEM;
4445
4446 codec->spec = spec;
a4eed138 4447 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4448 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4449 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4450 stac9200_models,
4451 stac9200_cfg_tbl);
11b44bbd
RF
4452 if (spec->board_config < 0) {
4453 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4454 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4455 } else
4456 err = stac_save_pin_cfgs(codec,
4457 stac9200_brd_tbl[spec->board_config]);
4458 if (err < 0) {
4459 stac92xx_free(codec);
4460 return err;
403d1944 4461 }
2f2f4251
M
4462
4463 spec->multiout.max_channels = 2;
4464 spec->multiout.num_dacs = 1;
4465 spec->multiout.dac_nids = stac9200_dac_nids;
4466 spec->adc_nids = stac9200_adc_nids;
4467 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4468 spec->num_muxes = 1;
8b65727b 4469 spec->num_dmics = 0;
9e05b7a3 4470 spec->num_adcs = 1;
a64135a2 4471 spec->num_pwrs = 0;
c7d4b2fa 4472
58eec423
MCC
4473 if (spec->board_config == STAC_9200_M4 ||
4474 spec->board_config == STAC_9200_M4_2 ||
bf277785 4475 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4476 spec->init = stac9200_eapd_init;
4477 else
4478 spec->init = stac9200_core_init;
2f2f4251 4479 spec->mixer = stac9200_mixer;
c7d4b2fa 4480
117f257d
TI
4481 if (spec->board_config == STAC_9200_PANASONIC) {
4482 spec->gpio_mask = spec->gpio_dir = 0x09;
4483 spec->gpio_data = 0x00;
4484 }
4485
c7d4b2fa
M
4486 err = stac9200_parse_auto_config(codec);
4487 if (err < 0) {
4488 stac92xx_free(codec);
4489 return err;
4490 }
2f2f4251 4491
2acc9dcb
TI
4492 /* CF-74 has no headphone detection, and the driver should *NOT*
4493 * do detection and HP/speaker toggle because the hardware does it.
4494 */
4495 if (spec->board_config == STAC_9200_PANASONIC)
4496 spec->hp_detect = 0;
4497
2f2f4251
M
4498 codec->patch_ops = stac92xx_patch_ops;
4499
4500 return 0;
4501}
4502
8e21c34c
TD
4503static int patch_stac925x(struct hda_codec *codec)
4504{
4505 struct sigmatel_spec *spec;
4506 int err;
4507
4508 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4509 if (spec == NULL)
4510 return -ENOMEM;
4511
4512 codec->spec = spec;
a4eed138 4513 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4514 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4515
4516 /* Check first for codec ID */
4517 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4518 STAC_925x_MODELS,
4519 stac925x_models,
4520 stac925x_codec_id_cfg_tbl);
4521
4522 /* Now checks for PCI ID, if codec ID is not found */
4523 if (spec->board_config < 0)
4524 spec->board_config = snd_hda_check_board_config(codec,
4525 STAC_925x_MODELS,
8e21c34c
TD
4526 stac925x_models,
4527 stac925x_cfg_tbl);
9e507abd 4528 again:
8e21c34c 4529 if (spec->board_config < 0) {
9cb36c2a 4530 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4531 "using BIOS defaults\n");
8e21c34c 4532 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4533 } else
4534 err = stac_save_pin_cfgs(codec,
4535 stac925x_brd_tbl[spec->board_config]);
4536 if (err < 0) {
4537 stac92xx_free(codec);
4538 return err;
8e21c34c
TD
4539 }
4540
4541 spec->multiout.max_channels = 2;
4542 spec->multiout.num_dacs = 1;
4543 spec->multiout.dac_nids = stac925x_dac_nids;
4544 spec->adc_nids = stac925x_adc_nids;
4545 spec->mux_nids = stac925x_mux_nids;
4546 spec->num_muxes = 1;
9e05b7a3 4547 spec->num_adcs = 1;
a64135a2 4548 spec->num_pwrs = 0;
2c11f955
TD
4549 switch (codec->vendor_id) {
4550 case 0x83847632: /* STAC9202 */
4551 case 0x83847633: /* STAC9202D */
4552 case 0x83847636: /* STAC9251 */
4553 case 0x83847637: /* STAC9251D */
f6e9852a 4554 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4555 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4556 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4557 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4558 break;
4559 default:
4560 spec->num_dmics = 0;
4561 break;
4562 }
8e21c34c
TD
4563
4564 spec->init = stac925x_core_init;
4565 spec->mixer = stac925x_mixer;
4566
4567 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4568 if (!err) {
4569 if (spec->board_config < 0) {
4570 printk(KERN_WARNING "hda_codec: No auto-config is "
4571 "available, default to model=ref\n");
4572 spec->board_config = STAC_925x_REF;
4573 goto again;
4574 }
4575 err = -EINVAL;
4576 }
8e21c34c
TD
4577 if (err < 0) {
4578 stac92xx_free(codec);
4579 return err;
4580 }
4581
4582 codec->patch_ops = stac92xx_patch_ops;
4583
4584 return 0;
4585}
4586
e1f0d669
MR
4587static struct hda_input_mux stac92hd73xx_dmux = {
4588 .num_items = 4,
4589 .items = {
4590 { "Analog Inputs", 0x0b },
e1f0d669
MR
4591 { "Digital Mic 1", 0x09 },
4592 { "Digital Mic 2", 0x0a },
2a9c7816 4593 { "CD", 0x08 },
e1f0d669
MR
4594 }
4595};
4596
4597static int patch_stac92hd73xx(struct hda_codec *codec)
4598{
4599 struct sigmatel_spec *spec;
4600 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4601 int err = 0;
c21ca4a8 4602 int num_dacs;
e1f0d669
MR
4603
4604 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4605 if (spec == NULL)
4606 return -ENOMEM;
4607
4608 codec->spec = spec;
e99d32b3 4609 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4610 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4611 spec->pin_nids = stac92hd73xx_pin_nids;
4612 spec->board_config = snd_hda_check_board_config(codec,
4613 STAC_92HD73XX_MODELS,
4614 stac92hd73xx_models,
4615 stac92hd73xx_cfg_tbl);
4616again:
4617 if (spec->board_config < 0) {
4618 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4619 " STAC92HD73XX, using BIOS defaults\n");
4620 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4621 } else
4622 err = stac_save_pin_cfgs(codec,
4623 stac92hd73xx_brd_tbl[spec->board_config]);
4624 if (err < 0) {
4625 stac92xx_free(codec);
4626 return err;
e1f0d669
MR
4627 }
4628
c21ca4a8 4629 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4630 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4631
c21ca4a8 4632 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4633 printk(KERN_WARNING "hda_codec: Could not determine "
4634 "number of channels defaulting to DAC count\n");
c21ca4a8 4635 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4636 }
c21ca4a8 4637 switch (num_dacs) {
e1f0d669
MR
4638 case 0x3: /* 6 Channel */
4639 spec->mixer = stac92hd73xx_6ch_mixer;
4640 spec->init = stac92hd73xx_6ch_core_init;
4641 break;
4642 case 0x4: /* 8 Channel */
e1f0d669
MR
4643 spec->mixer = stac92hd73xx_8ch_mixer;
4644 spec->init = stac92hd73xx_8ch_core_init;
4645 break;
4646 case 0x5: /* 10 Channel */
e1f0d669
MR
4647 spec->mixer = stac92hd73xx_10ch_mixer;
4648 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4649 }
4650 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4651
e1f0d669
MR
4652 spec->aloopback_mask = 0x01;
4653 spec->aloopback_shift = 8;
4654
1cd2224c 4655 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4656 spec->mux_nids = stac92hd73xx_mux_nids;
4657 spec->adc_nids = stac92hd73xx_adc_nids;
4658 spec->dmic_nids = stac92hd73xx_dmic_nids;
4659 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4660 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4661 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4662 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4663
4664 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4665 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4666 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4667 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4668 sizeof(stac92hd73xx_dmux));
4669
a7662640 4670 switch (spec->board_config) {
6b3ab21e 4671 case STAC_DELL_EQ:
d654a660 4672 spec->init = dell_eq_core_init;
6b3ab21e 4673 /* fallthru */
661cd8fb
TI
4674 case STAC_DELL_M6_AMIC:
4675 case STAC_DELL_M6_DMIC:
4676 case STAC_DELL_M6_BOTH:
2a9c7816 4677 spec->num_smuxes = 0;
2a9c7816
MR
4678 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4679 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4680 spec->eapd_switch = 0;
2a9c7816 4681 spec->num_amps = 1;
6b3ab21e 4682
c21ca4a8 4683 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4684 spec->init = dell_m6_core_init;
661cd8fb
TI
4685 switch (spec->board_config) {
4686 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4687 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4688 spec->num_dmics = 0;
2a9c7816 4689 spec->private_dimux.num_items = 1;
a7662640 4690 break;
661cd8fb 4691 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4692 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4693 spec->num_dmics = 1;
2a9c7816 4694 spec->private_dimux.num_items = 2;
a7662640 4695 break;
661cd8fb 4696 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4697 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4698 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4699 spec->num_dmics = 1;
2a9c7816 4700 spec->private_dimux.num_items = 2;
a7662640
MR
4701 break;
4702 }
4703 break;
4704 default:
4705 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4706 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4707 spec->eapd_switch = 1;
a7662640 4708 }
b2c4f4d7
MR
4709 if (spec->board_config > STAC_92HD73XX_REF) {
4710 /* GPIO0 High = Enable EAPD */
4711 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4712 spec->gpio_data = 0x01;
4713 }
2a9c7816 4714 spec->dinput_mux = &spec->private_dimux;
a7662640 4715
a64135a2
MR
4716 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4717 spec->pwr_nids = stac92hd73xx_pwr_nids;
4718
d9737751 4719 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4720
4721 if (!err) {
4722 if (spec->board_config < 0) {
4723 printk(KERN_WARNING "hda_codec: No auto-config is "
4724 "available, default to model=ref\n");
4725 spec->board_config = STAC_92HD73XX_REF;
4726 goto again;
4727 }
4728 err = -EINVAL;
4729 }
4730
4731 if (err < 0) {
4732 stac92xx_free(codec);
4733 return err;
4734 }
4735
9e43f0de
TI
4736 if (spec->board_config == STAC_92HD73XX_NO_JD)
4737 spec->hp_detect = 0;
4738
e1f0d669
MR
4739 codec->patch_ops = stac92xx_patch_ops;
4740
2d34e1b3
TI
4741 codec->proc_widget_hook = stac92hd7x_proc_hook;
4742
e1f0d669
MR
4743 return 0;
4744}
4745
d0513fc6
MR
4746static struct hda_input_mux stac92hd83xxx_dmux = {
4747 .num_items = 3,
4748 .items = {
4749 { "Analog Inputs", 0x03 },
4750 { "Digital Mic 1", 0x04 },
4751 { "Digital Mic 2", 0x05 },
4752 }
4753};
4754
4755static int patch_stac92hd83xxx(struct hda_codec *codec)
4756{
4757 struct sigmatel_spec *spec;
65557f35 4758 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4759 int err;
65557f35 4760 int num_dacs;
d0513fc6
MR
4761
4762 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4763 if (spec == NULL)
4764 return -ENOMEM;
4765
4766 codec->spec = spec;
0ffa9807 4767 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4768 spec->mono_nid = 0x19;
4769 spec->digbeep_nid = 0x21;
4770 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4771 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4772 spec->adc_nids = stac92hd83xxx_adc_nids;
4773 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4774 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4775 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4776 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4777 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4778
65557f35
MR
4779
4780 /* set port 0xe to select the last DAC
4781 */
4782 num_dacs = snd_hda_get_connections(codec, 0x0e,
4783 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4784
4785 snd_hda_codec_write_cache(codec, 0xe, 0,
4786 AC_VERB_SET_CONNECT_SEL, num_dacs);
4787
d0513fc6 4788 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR
4789 spec->mixer = stac92hd83xxx_mixer;
4790 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4791 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4792 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4793 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4794 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4795 spec->dinput_mux = &stac92hd83xxx_dmux;
4796 spec->pin_nids = stac92hd83xxx_pin_nids;
4797 spec->board_config = snd_hda_check_board_config(codec,
4798 STAC_92HD83XXX_MODELS,
4799 stac92hd83xxx_models,
4800 stac92hd83xxx_cfg_tbl);
4801again:
4802 if (spec->board_config < 0) {
4803 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4804 " STAC92HD83XXX, using BIOS defaults\n");
4805 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4806 } else
4807 err = stac_save_pin_cfgs(codec,
4808 stac92hd83xxx_brd_tbl[spec->board_config]);
4809 if (err < 0) {
4810 stac92xx_free(codec);
4811 return err;
d0513fc6
MR
4812 }
4813
32ed3f46
MR
4814 switch (codec->vendor_id) {
4815 case 0x111d7604:
4816 case 0x111d7605:
4817 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4818 break;
4819 spec->num_pwrs = 0;
4820 break;
4821 }
4822
d0513fc6
MR
4823 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4824 if (!err) {
4825 if (spec->board_config < 0) {
4826 printk(KERN_WARNING "hda_codec: No auto-config is "
4827 "available, default to model=ref\n");
4828 spec->board_config = STAC_92HD83XXX_REF;
4829 goto again;
4830 }
4831 err = -EINVAL;
4832 }
4833
4834 if (err < 0) {
4835 stac92xx_free(codec);
4836 return err;
4837 }
4838
4839 codec->patch_ops = stac92xx_patch_ops;
4840
2d34e1b3
TI
4841 codec->proc_widget_hook = stac92hd_proc_hook;
4842
d0513fc6
MR
4843 return 0;
4844}
4845
4b33c767
MR
4846static struct hda_input_mux stac92hd71bxx_dmux = {
4847 .num_items = 4,
4848 .items = {
4849 { "Analog Inputs", 0x00 },
4850 { "Mixer", 0x01 },
4851 { "Digital Mic 1", 0x02 },
4852 { "Digital Mic 2", 0x03 },
4853 }
4854};
4855
e035b841
MR
4856static int patch_stac92hd71bxx(struct hda_codec *codec)
4857{
4858 struct sigmatel_spec *spec;
4859 int err = 0;
4860
4861 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4862 if (spec == NULL)
4863 return -ENOMEM;
4864
4865 codec->spec = spec;
8daaaa97 4866 codec->patch_ops = stac92xx_patch_ops;
e035b841 4867 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4868 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4869 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR
4870 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4871 sizeof(stac92hd71bxx_dmux));
e035b841
MR
4872 spec->board_config = snd_hda_check_board_config(codec,
4873 STAC_92HD71BXX_MODELS,
4874 stac92hd71bxx_models,
4875 stac92hd71bxx_cfg_tbl);
4876again:
4877 if (spec->board_config < 0) {
4878 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4879 " STAC92HD71BXX, using BIOS defaults\n");
4880 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4881 } else
4882 err = stac_save_pin_cfgs(codec,
4883 stac92hd71bxx_brd_tbl[spec->board_config]);
4884 if (err < 0) {
4885 stac92xx_free(codec);
4886 return err;
e035b841
MR
4887 }
4888
41c3b648
TI
4889 if (spec->board_config > STAC_92HD71BXX_REF) {
4890 /* GPIO0 = EAPD */
4891 spec->gpio_mask = 0x01;
4892 spec->gpio_dir = 0x01;
4893 spec->gpio_data = 0x01;
4894 }
4895
541eee87
MR
4896 switch (codec->vendor_id) {
4897 case 0x111d76b6: /* 4 Port without Analog Mixer */
4898 case 0x111d76b7:
4899 case 0x111d76b4: /* 6 Port without Analog Mixer */
4900 case 0x111d76b5:
4901 spec->mixer = stac92hd71bxx_mixer;
4902 spec->init = stac92hd71bxx_core_init;
0ffa9807 4903 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4904 break;
aafc4412 4905 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
4906 switch (spec->board_config) {
4907 case STAC_HP_M4:
72474be6 4908 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
4909 err = stac_add_event(spec, codec->afg,
4910 STAC_VREF_EVENT, 0x02);
4911 if (err < 0)
4912 return err;
c5d08bb5 4913 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
4914 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4915 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4916 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4917 AC_USRSP_EN | err);
72474be6
MR
4918 spec->gpio_mask |= 0x02;
4919 break;
4920 }
8daaaa97 4921 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4922 (codec->revision_id & 0xf) == 1)
8daaaa97 4923 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4924
aafc4412
MR
4925 /* no output amps */
4926 spec->num_pwrs = 0;
4927 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4928 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
4929
4930 /* disable VSW */
4931 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4932 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR
4933 break;
4934 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4935 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4936 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4937
aafc4412
MR
4938 /* no output amps */
4939 spec->num_pwrs = 0;
4940 /* fallthru */
541eee87 4941 default:
4b33c767 4942 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
4943 spec->mixer = stac92hd71bxx_analog_mixer;
4944 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4945 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR
4946 }
4947
4b33c767 4948 spec->aloopback_mask = 0x50;
541eee87
MR
4949 spec->aloopback_shift = 0;
4950
8daaaa97 4951 spec->powerdown_adcs = 1;
1cd2224c 4952 spec->digbeep_nid = 0x26;
e035b841
MR
4953 spec->mux_nids = stac92hd71bxx_mux_nids;
4954 spec->adc_nids = stac92hd71bxx_adc_nids;
4955 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4956 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4957 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4958 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
4959
4960 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4961 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4962
6a14f585
MR
4963 switch (spec->board_config) {
4964 case STAC_HP_M4:
6a14f585 4965 /* enable internal microphone */
af9f341a 4966 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
4967 stac92xx_auto_set_pinctl(codec, 0x0e,
4968 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
4969 /* fallthru */
4970 case STAC_DELL_M4_2:
4971 spec->num_dmics = 0;
4972 spec->num_smuxes = 0;
4973 spec->num_dmuxes = 0;
4974 break;
4975 case STAC_DELL_M4_1:
4976 case STAC_DELL_M4_3:
4977 spec->num_dmics = 1;
4978 spec->num_smuxes = 0;
4979 spec->num_dmuxes = 0;
6a14f585
MR
4980 break;
4981 default:
4982 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4983 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4984 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4985 };
4986
c21ca4a8 4987 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR
4988 if (spec->dinput_mux)
4989 spec->private_dimux.num_items +=
4990 spec->num_dmics -
4991 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR
4992
4993 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4994 if (!err) {
4995 if (spec->board_config < 0) {
4996 printk(KERN_WARNING "hda_codec: No auto-config is "
4997 "available, default to model=ref\n");
4998 spec->board_config = STAC_92HD71BXX_REF;
4999 goto again;
5000 }
5001 err = -EINVAL;
5002 }
5003
5004 if (err < 0) {
5005 stac92xx_free(codec);
5006 return err;
5007 }
5008
2d34e1b3
TI
5009 codec->proc_widget_hook = stac92hd7x_proc_hook;
5010
e035b841
MR
5011 return 0;
5012};
5013
2f2f4251
M
5014static int patch_stac922x(struct hda_codec *codec)
5015{
5016 struct sigmatel_spec *spec;
c7d4b2fa 5017 int err;
2f2f4251 5018
e560d8d8 5019 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5020 if (spec == NULL)
5021 return -ENOMEM;
5022
5023 codec->spec = spec;
a4eed138 5024 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5025 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5026 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5027 stac922x_models,
5028 stac922x_cfg_tbl);
536319af 5029 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5030 spec->gpio_mask = spec->gpio_dir = 0x03;
5031 spec->gpio_data = 0x03;
3fc24d85
TI
5032 /* Intel Macs have all same PCI SSID, so we need to check
5033 * codec SSID to distinguish the exact models
5034 */
6f0778d8 5035 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5036 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5037
5038 case 0x106b0800:
5039 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5040 break;
5d5d3bc3
IZ
5041 case 0x106b0600:
5042 case 0x106b0700:
5043 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5044 break;
5d5d3bc3
IZ
5045 case 0x106b0e00:
5046 case 0x106b0f00:
5047 case 0x106b1600:
5048 case 0x106b1700:
5049 case 0x106b0200:
5050 case 0x106b1e00:
5051 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5052 break;
5d5d3bc3
IZ
5053 case 0x106b1a00:
5054 case 0x00000100:
5055 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5056 break;
5d5d3bc3
IZ
5057 case 0x106b0a00:
5058 case 0x106b2200:
5059 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5060 break;
536319af
NB
5061 default:
5062 spec->board_config = STAC_INTEL_MAC_V3;
5063 break;
3fc24d85
TI
5064 }
5065 }
5066
9e507abd 5067 again:
11b44bbd
RF
5068 if (spec->board_config < 0) {
5069 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5070 "using BIOS defaults\n");
5071 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5072 } else
5073 err = stac_save_pin_cfgs(codec,
5074 stac922x_brd_tbl[spec->board_config]);
5075 if (err < 0) {
5076 stac92xx_free(codec);
5077 return err;
403d1944 5078 }
2f2f4251 5079
c7d4b2fa
M
5080 spec->adc_nids = stac922x_adc_nids;
5081 spec->mux_nids = stac922x_mux_nids;
2549413e 5082 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5083 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5084 spec->num_dmics = 0;
a64135a2 5085 spec->num_pwrs = 0;
c7d4b2fa
M
5086
5087 spec->init = stac922x_core_init;
2f2f4251 5088 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5089
5090 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5091
3cc08dc6 5092 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5093 if (!err) {
5094 if (spec->board_config < 0) {
5095 printk(KERN_WARNING "hda_codec: No auto-config is "
5096 "available, default to model=ref\n");
5097 spec->board_config = STAC_D945_REF;
5098 goto again;
5099 }
5100 err = -EINVAL;
5101 }
3cc08dc6
MP
5102 if (err < 0) {
5103 stac92xx_free(codec);
5104 return err;
5105 }
5106
5107 codec->patch_ops = stac92xx_patch_ops;
5108
807a4636
TI
5109 /* Fix Mux capture level; max to 2 */
5110 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5111 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5112 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5113 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5114 (0 << AC_AMPCAP_MUTE_SHIFT));
5115
3cc08dc6
MP
5116 return 0;
5117}
5118
5119static int patch_stac927x(struct hda_codec *codec)
5120{
5121 struct sigmatel_spec *spec;
5122 int err;
5123
5124 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5125 if (spec == NULL)
5126 return -ENOMEM;
5127
5128 codec->spec = spec;
a4eed138 5129 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5130 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5131 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5132 stac927x_models,
5133 stac927x_cfg_tbl);
9e507abd 5134 again:
8e9068b1
MR
5135 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5136 if (spec->board_config < 0)
5137 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5138 "STAC927x, using BIOS defaults\n");
11b44bbd 5139 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5140 } else
5141 err = stac_save_pin_cfgs(codec,
5142 stac927x_brd_tbl[spec->board_config]);
5143 if (err < 0) {
5144 stac92xx_free(codec);
5145 return err;
3cc08dc6
MP
5146 }
5147
1cd2224c 5148 spec->digbeep_nid = 0x23;
8e9068b1
MR
5149 spec->adc_nids = stac927x_adc_nids;
5150 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5151 spec->mux_nids = stac927x_mux_nids;
5152 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5153 spec->smux_nids = stac927x_smux_nids;
5154 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5155 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5156 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5157 spec->multiout.dac_nids = spec->dac_nids;
5158
81d3dbde 5159 switch (spec->board_config) {
93ed1503 5160 case STAC_D965_3ST:
93ed1503 5161 case STAC_D965_5ST:
8e9068b1 5162 /* GPIO0 High = Enable EAPD */
0fc9dec4 5163 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5164 spec->gpio_data = 0x01;
8e9068b1
MR
5165 spec->num_dmics = 0;
5166
93ed1503 5167 spec->init = d965_core_init;
9e05b7a3 5168 spec->mixer = stac927x_mixer;
81d3dbde 5169 break;
8e9068b1 5170 case STAC_DELL_BIOS:
780c8be4
MR
5171 switch (codec->subsystem_id) {
5172 case 0x10280209:
5173 case 0x1028022e:
5174 /* correct the device field to SPDIF out */
af9f341a 5175 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5176 break;
5177 };
03d7ca17 5178 /* configure the analog microphone on some laptops */
af9f341a 5179 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5180 /* correct the front output jack as a hp out */
af9f341a 5181 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5182 /* correct the front input jack as a mic */
af9f341a 5183 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5184 /* fallthru */
8e9068b1
MR
5185 case STAC_DELL_3ST:
5186 /* GPIO2 High = Enable EAPD */
0fc9dec4 5187 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5188 spec->gpio_data = 0x04;
7f16859a
MR
5189 spec->dmic_nids = stac927x_dmic_nids;
5190 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5191
8e9068b1
MR
5192 spec->init = d965_core_init;
5193 spec->mixer = stac927x_mixer;
5194 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5195 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5196 break;
5197 default:
b2c4f4d7
MR
5198 if (spec->board_config > STAC_D965_REF) {
5199 /* GPIO0 High = Enable EAPD */
5200 spec->eapd_mask = spec->gpio_mask = 0x01;
5201 spec->gpio_dir = spec->gpio_data = 0x01;
5202 }
8e9068b1
MR
5203 spec->num_dmics = 0;
5204
5205 spec->init = stac927x_core_init;
5206 spec->mixer = stac927x_mixer;
7f16859a
MR
5207 }
5208
a64135a2 5209 spec->num_pwrs = 0;
e1f0d669
MR
5210 spec->aloopback_mask = 0x40;
5211 spec->aloopback_shift = 0;
c0cea0d0 5212 spec->eapd_switch = 1;
8e9068b1 5213
3cc08dc6 5214 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5215 if (!err) {
5216 if (spec->board_config < 0) {
5217 printk(KERN_WARNING "hda_codec: No auto-config is "
5218 "available, default to model=ref\n");
5219 spec->board_config = STAC_D965_REF;
5220 goto again;
5221 }
5222 err = -EINVAL;
5223 }
c7d4b2fa
M
5224 if (err < 0) {
5225 stac92xx_free(codec);
5226 return err;
5227 }
2f2f4251
M
5228
5229 codec->patch_ops = stac92xx_patch_ops;
5230
2d34e1b3
TI
5231 codec->proc_widget_hook = stac927x_proc_hook;
5232
52987656
TI
5233 /*
5234 * !!FIXME!!
5235 * The STAC927x seem to require fairly long delays for certain
5236 * command sequences. With too short delays (even if the answer
5237 * is set to RIRB properly), it results in the silence output
5238 * on some hardwares like Dell.
5239 *
5240 * The below flag enables the longer delay (see get_response
5241 * in hda_intel.c).
5242 */
5243 codec->bus->needs_damn_long_delay = 1;
5244
e28d8322
TI
5245 /* no jack detecion for ref-no-jd model */
5246 if (spec->board_config == STAC_D965_REF_NO_JD)
5247 spec->hp_detect = 0;
5248
2f2f4251
M
5249 return 0;
5250}
5251
f3302a59
MP
5252static int patch_stac9205(struct hda_codec *codec)
5253{
5254 struct sigmatel_spec *spec;
8259980e 5255 int err;
f3302a59
MP
5256
5257 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5258 if (spec == NULL)
5259 return -ENOMEM;
5260
5261 codec->spec = spec;
a4eed138 5262 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5263 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5264 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5265 stac9205_models,
5266 stac9205_cfg_tbl);
9e507abd 5267 again:
11b44bbd
RF
5268 if (spec->board_config < 0) {
5269 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5270 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5271 } else
5272 err = stac_save_pin_cfgs(codec,
5273 stac9205_brd_tbl[spec->board_config]);
5274 if (err < 0) {
5275 stac92xx_free(codec);
5276 return err;
f3302a59
MP
5277 }
5278
1cd2224c 5279 spec->digbeep_nid = 0x23;
f3302a59 5280 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5281 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5282 spec->mux_nids = stac9205_mux_nids;
2549413e 5283 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5284 spec->smux_nids = stac9205_smux_nids;
5285 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5286 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5287 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5288 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5289 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5290 spec->num_pwrs = 0;
f3302a59
MP
5291
5292 spec->init = stac9205_core_init;
5293 spec->mixer = stac9205_mixer;
5294
e1f0d669
MR
5295 spec->aloopback_mask = 0x40;
5296 spec->aloopback_shift = 0;
c0cea0d0 5297 spec->eapd_switch = 1;
f3302a59 5298 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5299
ae0a8ed8 5300 switch (spec->board_config){
ae0a8ed8 5301 case STAC_9205_DELL_M43:
87d48363 5302 /* Enable SPDIF in/out */
af9f341a
TI
5303 stac_change_pin_config(codec, 0x1f, 0x01441030);
5304 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5305
4fe5195c 5306 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5307 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5308 if (err < 0)
5309 return err;
c5d08bb5 5310 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5311 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5312 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5313 AC_VERB_SET_UNSOLICITED_ENABLE,
5314 AC_USRSP_EN | err);
4fe5195c
MR
5315
5316 spec->gpio_dir = 0x0b;
0fc9dec4 5317 spec->eapd_mask = 0x01;
4fe5195c
MR
5318 spec->gpio_mask = 0x1b;
5319 spec->gpio_mute = 0x10;
e2e7d624 5320 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5321 * GPIO3 Low = DRM
87d48363 5322 */
4fe5195c 5323 spec->gpio_data = 0x01;
ae0a8ed8 5324 break;
b2c4f4d7
MR
5325 case STAC_9205_REF:
5326 /* SPDIF-In enabled */
5327 break;
ae0a8ed8
TD
5328 default:
5329 /* GPIO0 High = EAPD */
0fc9dec4 5330 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5331 spec->gpio_data = 0x01;
ae0a8ed8
TD
5332 break;
5333 }
33382403 5334
f3302a59 5335 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5336 if (!err) {
5337 if (spec->board_config < 0) {
5338 printk(KERN_WARNING "hda_codec: No auto-config is "
5339 "available, default to model=ref\n");
5340 spec->board_config = STAC_9205_REF;
5341 goto again;
5342 }
5343 err = -EINVAL;
5344 }
f3302a59
MP
5345 if (err < 0) {
5346 stac92xx_free(codec);
5347 return err;
5348 }
5349
5350 codec->patch_ops = stac92xx_patch_ops;
5351
2d34e1b3
TI
5352 codec->proc_widget_hook = stac9205_proc_hook;
5353
f3302a59
MP
5354 return 0;
5355}
5356
db064e50 5357/*
6d859065 5358 * STAC9872 hack
db064e50
TI
5359 */
5360
99ccc560 5361/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI
5362static hda_nid_t vaio_dacs[] = { 0x2 };
5363#define VAIO_HP_DAC 0x5
5364static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5365static hda_nid_t vaio_mux_nids[] = { 0x15 };
5366
5367static struct hda_input_mux vaio_mux = {
a3a2f429 5368 .num_items = 3,
db064e50 5369 .items = {
d773781c 5370 /* { "HP", 0x0 }, */
1624cb9a
TI
5371 { "Mic Jack", 0x1 },
5372 { "Internal Mic", 0x2 },
db064e50
TI
5373 { "PCM", 0x3 },
5374 }
5375};
5376
5377static struct hda_verb vaio_init[] = {
5378 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5379 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI
5380 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5381 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5382 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5383 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5384 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI
5385 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5386 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5387 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5388 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5389 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5390 {}
5391};
5392
6d859065
GM
5393static struct hda_verb vaio_ar_init[] = {
5394 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5395 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5396 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5397 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5398/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5399 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5400 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5401 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5402 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5403/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5404 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5405 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5406 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5407 {}
5408};
5409
db064e50 5410static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI
5411 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5412 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5413 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5414 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI
5415 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5416 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5417 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5418 {
5419 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5420 .name = "Capture Source",
5421 .count = 1,
5422 .info = stac92xx_mux_enum_info,
5423 .get = stac92xx_mux_enum_get,
5424 .put = stac92xx_mux_enum_put,
5425 },
5426 {}
5427};
5428
6d859065 5429static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI
5430 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5431 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5432 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5433 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM
5434 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5435 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5436 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5437 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5438 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5439 {
5440 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5441 .name = "Capture Source",
5442 .count = 1,
5443 .info = stac92xx_mux_enum_info,
5444 .get = stac92xx_mux_enum_get,
5445 .put = stac92xx_mux_enum_put,
5446 },
5447 {}
5448};
5449
5450static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI
5451 .build_controls = stac92xx_build_controls,
5452 .build_pcms = stac92xx_build_pcms,
5453 .init = stac92xx_init,
5454 .free = stac92xx_free,
cb53c626 5455#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI
5456 .resume = stac92xx_resume,
5457#endif
5458};
5459
72e7b0dd
TI
5460static int stac9872_vaio_init(struct hda_codec *codec)
5461{
5462 int err;
5463
5464 err = stac92xx_init(codec);
5465 if (err < 0)
5466 return err;
5467 if (codec->patch_ops.unsol_event)
5468 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5469 return 0;
5470}
5471
5472static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5473{
e6e3ea25 5474 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI
5475 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5476 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5477 } else {
5478 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5479 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5480 }
5481}
5482
5483static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5484{
5485 switch (res >> 26) {
5486 case STAC_HP_EVENT:
5487 stac9872_vaio_hp_detect(codec, res);
5488 break;
5489 }
5490}
5491
5492static struct hda_codec_ops stac9872_vaio_patch_ops = {
5493 .build_controls = stac92xx_build_controls,
5494 .build_pcms = stac92xx_build_pcms,
5495 .init = stac9872_vaio_init,
5496 .free = stac92xx_free,
5497 .unsol_event = stac9872_vaio_unsol_event,
5498#ifdef CONFIG_PM
5499 .resume = stac92xx_resume,
5500#endif
5501};
5502
6d859065
GM
5503enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5504 CXD9872RD_VAIO,
5505 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5506 STAC9872AK_VAIO,
5507 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5508 STAC9872K_VAIO,
5509 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI
5510 CXD9872AKD_VAIO,
5511 STAC_9872_MODELS,
5512};
5513
5514static const char *stac9872_models[STAC_9872_MODELS] = {
5515 [CXD9872RD_VAIO] = "vaio",
5516 [CXD9872AKD_VAIO] = "vaio-ar",
5517};
5518
5519static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5520 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5521 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5522 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5523 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI
5524 {}
5525};
5526
6d859065 5527static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5528{
5529 struct sigmatel_spec *spec;
5530 int board_config;
5531
f5fcc13c
TI
5532 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5533 stac9872_models,
5534 stac9872_cfg_tbl);
db064e50
TI
5535 if (board_config < 0)
5536 /* unknown config, let generic-parser do its job... */
5537 return snd_hda_parse_generic_codec(codec);
5538
5539 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5540 if (spec == NULL)
5541 return -ENOMEM;
5542
5543 codec->spec = spec;
5544 switch (board_config) {
6d859065
GM
5545 case CXD9872RD_VAIO:
5546 case STAC9872AK_VAIO:
5547 case STAC9872K_VAIO:
db064e50
TI
5548 spec->mixer = vaio_mixer;
5549 spec->init = vaio_init;
5550 spec->multiout.max_channels = 2;
5551 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5552 spec->multiout.dac_nids = vaio_dacs;
5553 spec->multiout.hp_nid = VAIO_HP_DAC;
5554 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5555 spec->adc_nids = vaio_adcs;
a64135a2 5556 spec->num_pwrs = 0;
db064e50
TI
5557 spec->input_mux = &vaio_mux;
5558 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5559 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5560 break;
6d859065
GM
5561
5562 case CXD9872AKD_VAIO:
5563 spec->mixer = vaio_ar_mixer;
5564 spec->init = vaio_ar_init;
5565 spec->multiout.max_channels = 2;
5566 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5567 spec->multiout.dac_nids = vaio_dacs;
5568 spec->multiout.hp_nid = VAIO_HP_DAC;
5569 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5570 spec->num_pwrs = 0;
6d859065
GM
5571 spec->adc_nids = vaio_adcs;
5572 spec->input_mux = &vaio_mux;
5573 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5574 codec->patch_ops = stac9872_patch_ops;
6d859065 5575 break;
db064e50
TI
5576 }
5577
db064e50
TI
5578 return 0;
5579}
5580
5581
2f2f4251
M
5582/*
5583 * patch entries
5584 */
1289e9e8 5585static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5586 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5587 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5588 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5589 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5590 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5591 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5592 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5593 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5594 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5595 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5596 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5597 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5598 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5599 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5600 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5601 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5602 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5603 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5604 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5605 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5606 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5607 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5608 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5609 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5610 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5611 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5612 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5613 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5614 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5615 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5616 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5617 /* The following does not take into account .id=0x83847661 when subsys =
5618 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5619 * currently not fully supported.
5620 */
5621 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5622 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5623 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5624 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5625 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5626 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5627 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5628 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5629 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5630 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5631 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5632 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5633 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5634 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5635 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5636 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5637 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5638 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5639 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5640 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5641 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5642 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5643 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5644 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5645 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5646 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5647 {} /* terminator */
5648};
1289e9e8
TI
5649
5650MODULE_ALIAS("snd-hda-codec-id:8384*");
5651MODULE_ALIAS("snd-hda-codec-id:111d*");
5652
5653MODULE_LICENSE("GPL");
5654MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5655
5656static struct hda_codec_preset_list sigmatel_list = {
5657 .preset = snd_hda_preset_sigmatel,
5658 .owner = THIS_MODULE,
5659};
5660
5661static int __init patch_sigmatel_init(void)
5662{
5663 return snd_hda_add_codec_preset(&sigmatel_list);
5664}
5665
5666static void __exit patch_sigmatel_exit(void)
5667{
5668 snd_hda_delete_codec_preset(&sigmatel_list);
5669}
5670
5671module_init(patch_sigmatel_init)
5672module_exit(patch_sigmatel_exit)