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[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
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2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
6a14f585 83 STAC_HP_M4,
e035b841
MR		 84 STAC_92HD71BXX_MODELS
85};
86
8e21c34c
TD		 87enum {
88 STAC_925x_REF,
89 STAC_M2_2,
90 STAC_MA6,
2c11f955 91 STAC_PA6,
8e21c34c
TD		 92 STAC_925x_MODELS
93};
94
f5fcc13c
TI		 95enum {
96 STAC_D945_REF,
97 STAC_D945GTP3,
98 STAC_D945GTP5,
5d5d3bc3
IZ		 99 STAC_INTEL_MAC_V1,
100 STAC_INTEL_MAC_V2,
101 STAC_INTEL_MAC_V3,
102 STAC_INTEL_MAC_V4,
103 STAC_INTEL_MAC_V5,
536319af
NB		 104 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
105 * is given, one of the above models will be
106 * chosen according to the subsystem id. */
dfe495d0 107 /* for backward compatibility */
f5fcc13c 108 STAC_MACMINI,
3fc24d85 109 STAC_MACBOOK,
6f0778d8
NB		 110 STAC_MACBOOK_PRO_V1,
111 STAC_MACBOOK_PRO_V2,
f16928fb 112 STAC_IMAC_INTEL,
0dae0f83 113 STAC_IMAC_INTEL_20,
8c650087 114 STAC_ECS_202,
dfe495d0
TI		 115 STAC_922X_DELL_D81,
116 STAC_922X_DELL_D82,
117 STAC_922X_DELL_M81,
118 STAC_922X_DELL_M82,
f5fcc13c
TI		 119 STAC_922X_MODELS
120};
121
122enum {
123 STAC_D965_REF,
124 STAC_D965_3ST,
125 STAC_D965_5ST,
4ff076e5 126 STAC_DELL_3ST,
8e9068b1 127 STAC_DELL_BIOS,
f5fcc13c
TI		 128 STAC_927X_MODELS
129};
403d1944 130
2f2f4251 131struct sigmatel_spec {
c8b6bf9b 132 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 133 unsigned int num_mixers;
134
403d1944 135 int board_config;
c7d4b2fa 136 unsigned int surr_switch: 1;
403d1944
MP		 137 unsigned int line_switch: 1;
138 unsigned int mic_switch: 1;
3cc08dc6 139 unsigned int alt_switch: 1;
82bc955f 140 unsigned int hp_detect: 1;
c7d4b2fa 141
4fe5195c 142 /* gpio lines */
0fc9dec4 143 unsigned int eapd_mask;
4fe5195c
MR		 144 unsigned int gpio_mask;
145 unsigned int gpio_dir;
146 unsigned int gpio_data;
147 unsigned int gpio_mute;
148
8daaaa97
MR		 149 /* stream */
150 unsigned int stream_delay;
151
4fe5195c 152 /* analog loopback */
e1f0d669
MR		 153 unsigned char aloopback_mask;
154 unsigned char aloopback_shift;
8259980e 155
a64135a2
MR		 156 /* power management */
157 unsigned int num_pwrs;
d0513fc6 158 unsigned int *pwr_mapping;
a64135a2 159 hda_nid_t *pwr_nids;
b76c850f 160 hda_nid_t *dac_list;
a64135a2 161
2f2f4251 162 /* playback */
b22b4821 163 struct hda_input_mux *mono_mux;
89385035 164 struct hda_input_mux *amp_mux;
b22b4821 165 unsigned int cur_mmux;
2f2f4251 166 struct hda_multi_out multiout;
3cc08dc6 167 hda_nid_t dac_nids[5];
2f2f4251
M		 168
169 /* capture */
170 hda_nid_t *adc_nids;
2f2f4251 171 unsigned int num_adcs;
dabbed6f
M		 172 hda_nid_t *mux_nids;
173 unsigned int num_muxes;
8b65727b
MP		 174 hda_nid_t *dmic_nids;
175 unsigned int num_dmics;
e1f0d669 176 hda_nid_t *dmux_nids;
1697055e 177 unsigned int num_dmuxes;
d9737751
MR		 178 hda_nid_t *smux_nids;
179 unsigned int num_smuxes;
180
dabbed6f 181 hda_nid_t dig_in_nid;
b22b4821 182 hda_nid_t mono_nid;
1cd2224c
MR		 183 hda_nid_t anabeep_nid;
184 hda_nid_t digbeep_nid;
2f2f4251 185
2f2f4251
M		 186 /* pin widgets */
187 hda_nid_t *pin_nids;
188 unsigned int num_pins;
2f2f4251 189 unsigned int *pin_configs;
11b44bbd 190 unsigned int *bios_pin_configs;
2f2f4251
M		 191
192 /* codec specific stuff */
193 struct hda_verb *init;
c8b6bf9b 194 struct snd_kcontrol_new *mixer;
2f2f4251
M		 195
196 /* capture source */
8b65727b 197 struct hda_input_mux *dinput_mux;
e1f0d669 198 unsigned int cur_dmux[2];
c7d4b2fa 199 struct hda_input_mux *input_mux;
3cc08dc6 200 unsigned int cur_mux[3];
d9737751
MR		 201 struct hda_input_mux *sinput_mux;
202 unsigned int cur_smux[2];
2a9c7816
MR		 203 unsigned int cur_amux;
204 hda_nid_t *amp_nids;
205 unsigned int num_amps;
8daaaa97 206 unsigned int powerdown_adcs;
2f2f4251 207
403d1944
MP		 208 /* i/o switches */
209 unsigned int io_switch[2];
0fb87bb4 210 unsigned int clfe_swap;
7c2ba97b 211 unsigned int hp_switch;
5f10c4a9 212 unsigned int aloopback;
2f2f4251 213
c7d4b2fa
M		 214 struct hda_pcm pcm_rec[2]; /* PCM information */
215
216 /* dynamic controls and input_mux */
217 struct auto_pin_cfg autocfg;
218 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 219 struct snd_kcontrol_new *kctl_alloc;
8b65727b 220 struct hda_input_mux private_dimux;
c7d4b2fa 221 struct hda_input_mux private_imux;
d9737751 222 struct hda_input_mux private_smux;
89385035 223 struct hda_input_mux private_amp_mux;
b22b4821 224 struct hda_input_mux private_mono_mux;
2f2f4251
M		 225};
226
227static hda_nid_t stac9200_adc_nids[1] = {
228 0x03,
229};
230
231static hda_nid_t stac9200_mux_nids[1] = {
232 0x0c,
233};
234
235static hda_nid_t stac9200_dac_nids[1] = {
236 0x02,
237};
238
a64135a2
MR		 239static hda_nid_t stac92hd73xx_pwr_nids[8] = {
240 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
241 0x0f, 0x10, 0x11
242};
243
0ffa9807
MR		 244static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
245 0x26, 0,
246};
247
e1f0d669
MR		 248static hda_nid_t stac92hd73xx_adc_nids[2] = {
249 0x1a, 0x1b
250};
251
2a9c7816
MR		 252#define DELL_M6_AMP 2
253static hda_nid_t stac92hd73xx_amp_nids[3] = {
254 0x0b, 0x0c, 0x0e
89385035
MR		 255};
256
e1f0d669
MR		 257#define STAC92HD73XX_NUM_DMICS 2
258static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
259 0x13, 0x14, 0
260};
261
262#define STAC92HD73_DAC_COUNT 5
263static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
264 0x15, 0x16, 0x17, 0x18, 0x19,
265};
266
267static hda_nid_t stac92hd73xx_mux_nids[4] = {
268 0x28, 0x29, 0x2a, 0x2b,
269};
270
271static hda_nid_t stac92hd73xx_dmux_nids[2] = {
272 0x20, 0x21,
273};
274
d9737751
MR		 275static hda_nid_t stac92hd73xx_smux_nids[2] = {
276 0x22, 0x23,
277};
278
d0513fc6
MR		 279#define STAC92HD83XXX_NUM_DMICS 2
280static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
281 0x11, 0x12, 0
282};
283
284#define STAC92HD81_DAC_COUNT 2
285#define STAC92HD83_DAC_COUNT 3
286static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
287 0x13, 0x14, 0x22,
288};
289
290static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
291 0x17, 0x18,
292};
293
294static hda_nid_t stac92hd83xxx_adc_nids[2] = {
295 0x15, 0x16,
296};
297
298static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
299 0xa, 0xb, 0xd, 0xe,
300};
301
0ffa9807
MR		 302static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
303 0x1e, 0,
304};
305
d0513fc6
MR		 306static unsigned int stac92hd83xxx_pwr_mapping[4] = {
307 0x03, 0x0c, 0x10, 0x40,
308};
309
a64135a2
MR		 310static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
311 0x0a, 0x0d, 0x0f
312};
313
e035b841
MR		 314static hda_nid_t stac92hd71bxx_adc_nids[2] = {
315 0x12, 0x13,
316};
317
318static hda_nid_t stac92hd71bxx_mux_nids[2] = {
319 0x1a, 0x1b
320};
321
e1f0d669
MR		 322static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
323 0x1c,
324};
325
d9737751
MR		 326static hda_nid_t stac92hd71bxx_smux_nids[2] = {
327 0x24, 0x25,
328};
329
aea7bb0a 330static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 331 0x10, /*0x11, */
332};
333
334#define STAC92HD71BXX_NUM_DMICS 2
335static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
336 0x18, 0x19, 0
337};
338
0ffa9807
MR		 339static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
340 0x22, 0
341};
342
8e21c34c
TD		 343static hda_nid_t stac925x_adc_nids[1] = {
344 0x03,
345};
346
347static hda_nid_t stac925x_mux_nids[1] = {
348 0x0f,
349};
350
351static hda_nid_t stac925x_dac_nids[1] = {
352 0x02,
353};
354
f6e9852a
TI		 355#define STAC925X_NUM_DMICS 1
356static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
357 0x15, 0
2c11f955
TD		 358};
359
1697055e
TI		 360static hda_nid_t stac925x_dmux_nids[1] = {
361 0x14,
362};
363
2f2f4251
M		 364static hda_nid_t stac922x_adc_nids[2] = {
365 0x06, 0x07,
366};
367
368static hda_nid_t stac922x_mux_nids[2] = {
369 0x12, 0x13,
370};
371
3cc08dc6
MP		 372static hda_nid_t stac927x_adc_nids[3] = {
373 0x07, 0x08, 0x09
374};
375
376static hda_nid_t stac927x_mux_nids[3] = {
377 0x15, 0x16, 0x17
378};
379
d9737751
MR		 380static hda_nid_t stac927x_smux_nids[1] = {
381 0x21,
382};
383
b76c850f
MR		 384static hda_nid_t stac927x_dac_nids[6] = {
385 0x02, 0x03, 0x04, 0x05, 0x06, 0
386};
387
e1f0d669
MR		 388static hda_nid_t stac927x_dmux_nids[1] = {
389 0x1b,
390};
391
7f16859a
MR		 392#define STAC927X_NUM_DMICS 2
393static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
394 0x13, 0x14, 0
395};
396
f3302a59
MP		 397static hda_nid_t stac9205_adc_nids[2] = {
398 0x12, 0x13
399};
400
401static hda_nid_t stac9205_mux_nids[2] = {
402 0x19, 0x1a
403};
404
e1f0d669 405static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 406 0x1d,
e1f0d669
MR		 407};
408
d9737751
MR		 409static hda_nid_t stac9205_smux_nids[1] = {
410 0x21,
411};
412
f6e9852a
TI		 413#define STAC9205_NUM_DMICS 2
414static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
415 0x17, 0x18, 0
8b65727b
MP		 416};
417
c7d4b2fa 418static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 419 0x08, 0x09, 0x0d, 0x0e,
420 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 421};
422
8e21c34c
TD		 423static hda_nid_t stac925x_pin_nids[8] = {
424 0x07, 0x08, 0x0a, 0x0b,
425 0x0c, 0x0d, 0x10, 0x11,
426};
427
2f2f4251
M		 428static hda_nid_t stac922x_pin_nids[10] = {
429 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
430 0x0f, 0x10, 0x11, 0x15, 0x1b,
431};
432
a7662640 433static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 434 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
435 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 436 0x14, 0x22, 0x23
e1f0d669
MR		 437};
438
d0513fc6
MR		 439static hda_nid_t stac92hd83xxx_pin_nids[14] = {
440 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
441 0x0f, 0x10, 0x11, 0x12, 0x13,
442 0x1d, 0x1e, 0x1f, 0x20
443};
0ffa9807 444static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 445 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
446 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 447 0x1f,
e035b841
MR		 448};
449
3cc08dc6
MP		 450static hda_nid_t stac927x_pin_nids[14] = {
451 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
452 0x0f, 0x10, 0x11, 0x12, 0x13,
453 0x14, 0x21, 0x22, 0x23,
454};
455
f3302a59
MP		 456static hda_nid_t stac9205_pin_nids[12] = {
457 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
458 0x0f, 0x14, 0x16, 0x17, 0x18,
459 0x21, 0x22,
f3302a59
MP		 460};
461
89385035
MR		 462#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
463
464static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
465 struct snd_ctl_elem_value *ucontrol)
466{
467 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
468 struct sigmatel_spec *spec = codec->spec;
469 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
470
471 kcontrol->private_value ^= get_amp_nid(kcontrol);
472 kcontrol->private_value |= nid;
473
474 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
475}
476
477static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
478 struct snd_ctl_elem_value *ucontrol)
479{
480 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
481 struct sigmatel_spec *spec = codec->spec;
482 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
483
484 kcontrol->private_value ^= get_amp_nid(kcontrol);
485 kcontrol->private_value |= nid;
486
487 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
488}
489
8b65727b
MP		 490static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
491 struct snd_ctl_elem_info *uinfo)
492{
493 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
494 struct sigmatel_spec *spec = codec->spec;
495 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
496}
497
498static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
499 struct snd_ctl_elem_value *ucontrol)
500{
501 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
502 struct sigmatel_spec *spec = codec->spec;
e1f0d669 503 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 504
e1f0d669 505 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 506 return 0;
507}
508
509static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
510 struct snd_ctl_elem_value *ucontrol)
511{
512 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
513 struct sigmatel_spec *spec = codec->spec;
e1f0d669 514 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 515
516 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 517 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 518}
519
d9737751
MR		 520static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
521 struct snd_ctl_elem_info *uinfo)
522{
523 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
524 struct sigmatel_spec *spec = codec->spec;
525 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
526}
527
528static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_value *ucontrol)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
533 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
534
535 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
536 return 0;
537}
538
539static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_value *ucontrol)
541{
542 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
543 struct sigmatel_spec *spec = codec->spec;
544 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
545
546 return snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
547 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
548}
549
c8b6bf9b 550static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 551{
552 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
553 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 554 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 555}
556
c8b6bf9b 557static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
561 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
562
563 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
564 return 0;
565}
566
c8b6bf9b 567static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 568{
569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
570 struct sigmatel_spec *spec = codec->spec;
571 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
572
c7d4b2fa 573 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 574 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
575}
576
b22b4821
MR		 577static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_info *uinfo)
579{
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct sigmatel_spec *spec = codec->spec;
582 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
583}
584
585static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
586 struct snd_ctl_elem_value *ucontrol)
587{
588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
589 struct sigmatel_spec *spec = codec->spec;
590
591 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
592 return 0;
593}
594
595static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
596 struct snd_ctl_elem_value *ucontrol)
597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 struct sigmatel_spec *spec = codec->spec;
600
601 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
602 spec->mono_nid, &spec->cur_mmux);
603}
604
89385035
MR		 605static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
606 struct snd_ctl_elem_info *uinfo)
607{
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
610 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
611}
612
613static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 struct sigmatel_spec *spec = codec->spec;
618
619 ucontrol->value.enumerated.item[0] = spec->cur_amux;
620 return 0;
621}
622
623static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
624 struct snd_ctl_elem_value *ucontrol)
625{
626 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
627 struct sigmatel_spec *spec = codec->spec;
628 struct snd_kcontrol *ctl =
629 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
630 if (!ctl)
631 return -EINVAL;
632
633 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
634 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
635
636 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
637 0, &spec->cur_amux);
638}
639
5f10c4a9
ML		 640#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
641
642static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 646 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 647 struct sigmatel_spec *spec = codec->spec;
648
e1f0d669
MR		 649 ucontrol->value.integer.value[0] = !!(spec->aloopback &
650 (spec->aloopback_mask << idx));
5f10c4a9
ML		 651 return 0;
652}
653
654static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
655 struct snd_ctl_elem_value *ucontrol)
656{
657 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
658 struct sigmatel_spec *spec = codec->spec;
e1f0d669 659 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 660 unsigned int dac_mode;
e1f0d669 661 unsigned int val, idx_val;
5f10c4a9 662
e1f0d669
MR		 663 idx_val = spec->aloopback_mask << idx;
664 if (ucontrol->value.integer.value[0])
665 val = spec->aloopback | idx_val;
666 else
667 val = spec->aloopback & ~idx_val;
68ea7b2f 668 if (spec->aloopback == val)
5f10c4a9
ML		 669 return 0;
670
68ea7b2f 671 spec->aloopback = val;
5f10c4a9 672
e1f0d669
MR		 673 /* Only return the bits defined by the shift value of the
674 * first two bytes of the mask
675 */
5f10c4a9 676 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 677 kcontrol->private_value & 0xFFFF, 0x0);
678 dac_mode >>= spec->aloopback_shift;
5f10c4a9 679
e1f0d669 680 if (spec->aloopback & idx_val) {
5f10c4a9 681 snd_hda_power_up(codec);
e1f0d669 682 dac_mode |= idx_val;
5f10c4a9
ML		 683 } else {
684 snd_hda_power_down(codec);
e1f0d669 685 dac_mode &= ~idx_val;
5f10c4a9
ML		 686 }
687
688 snd_hda_codec_write_cache(codec, codec->afg, 0,
689 kcontrol->private_value >> 16, dac_mode);
690
691 return 1;
692}
693
c7d4b2fa 694static struct hda_verb stac9200_core_init[] = {
2f2f4251 695 /* set dac0mux for dac converter */
c7d4b2fa 696 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 697 {}
698};
699
1194b5b7
TI		 700static struct hda_verb stac9200_eapd_init[] = {
701 /* set dac0mux for dac converter */
702 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
703 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
704 {}
705};
706
e1f0d669
MR		 707static struct hda_verb stac92hd73xx_6ch_core_init[] = {
708 /* set master volume and direct control */
709 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
710 /* setup audio connections */
711 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
712 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
713 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
714 /* setup adcs to point to mixer */
715 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
716 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 717 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
718 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
719 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
720 /* setup import muxs */
721 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
722 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
723 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
724 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
725 {}
726};
727
d654a660
MR		 728static struct hda_verb dell_eq_core_init[] = {
729 /* set master volume to max value without distortion
730 * and direct control */
731 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
732 /* setup audio connections */
733 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 734 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
735 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 736 /* setup adcs to point to mixer */
737 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
738 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
739 /* setup import muxs */
740 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
741 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
742 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
743 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
744 {}
745};
746
52fe0f9d 747static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 748 /* set master volume to max value without distortion
749 * and direct control */
750 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 751 /* setup audio connections */
7747ecce
MR		 752 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
753 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 754 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
755 /* setup adcs to point to mixer */
756 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
757 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
758 /* setup import muxs */
759 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
761 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
762 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
763 {}
764};
765
e1f0d669
MR		 766static struct hda_verb stac92hd73xx_8ch_core_init[] = {
767 /* set master volume and direct control */
768 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
769 /* setup audio connections */
770 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
771 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
772 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
773 /* connect hp ports to dac3 */
774 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
775 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
776 /* setup adcs to point to mixer */
777 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
778 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 779 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
780 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
781 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
782 /* setup import muxs */
783 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
784 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
785 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
786 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
787 {}
788};
789
790static struct hda_verb stac92hd73xx_10ch_core_init[] = {
791 /* set master volume and direct control */
792 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
793 /* setup audio connections */
794 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
795 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
796 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
797 /* dac3 is connected to import3 mux */
798 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
799 /* connect hp ports to dac4 */
800 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
801 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
802 /* setup adcs to point to mixer */
803 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
804 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 805 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
806 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
807 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
808 /* setup import muxs */
809 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
810 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
811 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
813 {}
814};
815
d0513fc6
MR		 816static struct hda_verb stac92hd83xxx_core_init[] = {
817 /* start of config #1 */
818 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
819
820 /* start of config #2 */
821 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
822 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
823 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
824
825 /* power state controls amps */
826 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
827};
828
e035b841 829static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 830 /* set master volume and direct control */
831 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
832 /* connect headphone jack to dac1 */
833 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
834 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
835 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
836 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
837 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
838 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 839};
840
aafc4412 841#define HD_DISABLE_PORTF 3
541eee87 842static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 843 /* start of config #1 */
844
845 /* connect port 0f to audio mixer */
846 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
847 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
848 /* unmute right and left channels for node 0x0f */
849 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
850 /* start of config #2 */
851
e035b841
MR		 852 /* set master volume and direct control */
853 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
854 /* connect headphone jack to dac1 */
855 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 856 /* connect port 0d to audio mixer */
9b35947f 857 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 858 /* unmute dac0 input in audio mixer */
859 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 860 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 861 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
862 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 863 {}
864};
865
8e21c34c
TD		 866static struct hda_verb stac925x_core_init[] = {
867 /* set dac0mux for dac converter */
868 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
869 {}
870};
871
c7d4b2fa 872static struct hda_verb stac922x_core_init[] = {
2f2f4251 873 /* set master volume and direct control */
c7d4b2fa 874 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 875 {}
876};
877
93ed1503 878static struct hda_verb d965_core_init[] = {
19039bd0 879 /* set master volume and direct control */
93ed1503 880 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 881 /* unmute node 0x1b */
882 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
883 /* select node 0x03 as DAC */
884 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
885 {}
886};
887
3cc08dc6
MP		 888static struct hda_verb stac927x_core_init[] = {
889 /* set master volume and direct control */
890 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 891 /* enable analog pc beep path */
892 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 893 {}
894};
895
f3302a59
MP		 896static struct hda_verb stac9205_core_init[] = {
897 /* set master volume and direct control */
898 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 899 /* enable analog pc beep path */
900 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 901 {}
902};
903
b22b4821
MR		 904#define STAC_MONO_MUX \
905 { \
906 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
907 .name = "Mono Mux", \
908 .count = 1, \
909 .info = stac92xx_mono_mux_enum_info, \
910 .get = stac92xx_mono_mux_enum_get, \
911 .put = stac92xx_mono_mux_enum_put, \
912 }
913
89385035
MR		 914#define STAC_AMP_MUX \
915 { \
916 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
917 .name = "Amp Selector Capture Switch", \
918 .count = 1, \
919 .info = stac92xx_amp_mux_enum_info, \
920 .get = stac92xx_amp_mux_enum_get, \
921 .put = stac92xx_amp_mux_enum_put, \
922 }
923
924#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
925 { \
926 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
927 .name = xname, \
928 .index = 0, \
929 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
930 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
931 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
932 .info = stac92xx_amp_volume_info, \
933 .get = stac92xx_amp_volume_get, \
934 .put = stac92xx_amp_volume_put, \
935 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
936 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
937 }
938
9e05b7a3 939#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 940 { \
941 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
942 .name = "Input Source", \
9e05b7a3 943 .count = cnt, \
ca7c5a8b
ML		 944 .info = stac92xx_mux_enum_info, \
945 .get = stac92xx_mux_enum_get, \
946 .put = stac92xx_mux_enum_put, \
947 }
948
e1f0d669 949#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 950 { \
951 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
952 .name = "Analog Loopback", \
e1f0d669 953 .count = cnt, \
5f10c4a9
ML		 954 .info = stac92xx_aloopback_info, \
955 .get = stac92xx_aloopback_get, \
956 .put = stac92xx_aloopback_put, \
957 .private_value = verb_read | (verb_write << 16), \
958 }
959
c8b6bf9b 960static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 961 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
962 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 963 STAC_INPUT_SOURCE(1),
2f2f4251
M		 964 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
965 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 966 { } /* end */
967};
968
2a9c7816 969#define DELL_M6_MIXER 6
e1f0d669 970static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 971 /* start of config #1 */
e1f0d669
MR		 972 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
973 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
974
e1f0d669
MR		 975 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
976 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
977
2a9c7816
MR		 978 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
979 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
980
981 /* start of config #2 */
982 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
983 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
984
e1f0d669
MR		 985 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
986 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
987
2a9c7816
MR		 988 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
989
990 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
991 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
992
993 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
994 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
995
e1f0d669
MR		 996 { } /* end */
997};
998
999static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1000 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1001
e1f0d669
MR		 1002 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1003 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1004
1005 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1006 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1007
1008 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1009 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1010
1011 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1012 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1013
1014 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1015 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1016
1017 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1018 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1019
1020 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1021 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1022 { } /* end */
1023};
1024
1025static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1026 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1027
e1f0d669
MR		 1028 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1029 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1030
1031 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1032 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1033
1034 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1035 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1036
1037 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1038 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1041 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1042
1043 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1044 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1045
1046 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1047 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1048 { } /* end */
1049};
1050
d0513fc6
MR		 1051
1052static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1053 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1054 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1055
1056 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1057 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1058
1059 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1060 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1063 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1066 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1069 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1070
1071 /*
1072 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1073 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1074 */
1075 { } /* end */
1076};
1077
541eee87 1078static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1079 STAC_INPUT_SOURCE(2),
e035b841 1080
9b35947f
MR		 1081 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1082 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1083
1084 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1085 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1086 /* analog pc-beep replaced with digital beep support */
1087 /*
f7c5dda2
MR		 1088 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1089 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1090 */
f7c5dda2 1091
9b35947f
MR		 1092 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
1093 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1094 { } /* end */
1095};
1096
541eee87 1097static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1098 STAC_INPUT_SOURCE(2),
1099 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1100
541eee87
MR		 1101 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1102 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1103
1104 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1105 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1106 { } /* end */
1107};
1108
8e21c34c 1109static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1110 STAC_INPUT_SOURCE(1),
8e21c34c 1111 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1112 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1113 { } /* end */
1114};
1115
9e05b7a3 1116static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1117 STAC_INPUT_SOURCE(2),
e1f0d669 1118 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1119
1120 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1121 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1122
1123 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1124 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1125 { } /* end */
1126};
1127
19039bd0 1128/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1129static struct snd_kcontrol_new stac922x_mixer[] = {
1130 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1131 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1132 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1133
1134 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1135 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1136 { } /* end */
1137};
1138
9e05b7a3 1139
d1d985f0 1140static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1141 STAC_INPUT_SOURCE(3),
e1f0d669 1142 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1143
9e05b7a3
ML		 1144 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1145 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1146
1147 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1148 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1149
1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1152 { } /* end */
1153};
1154
1697055e
TI		 1155static struct snd_kcontrol_new stac_dmux_mixer = {
1156 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1157 .name = "Digital Input Source",
1158 /* count set later */
1159 .info = stac92xx_dmux_enum_info,
1160 .get = stac92xx_dmux_enum_get,
1161 .put = stac92xx_dmux_enum_put,
1162};
1163
d9737751
MR		 1164static struct snd_kcontrol_new stac_smux_mixer = {
1165 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1166 .name = "IEC958 Playback Source",
d9737751
MR		 1167 /* count set later */
1168 .info = stac92xx_smux_enum_info,
1169 .get = stac92xx_smux_enum_get,
1170 .put = stac92xx_smux_enum_put,
1171};
1172
2134ea4f
TI		 1173static const char *slave_vols[] = {
1174 "Front Playback Volume",
1175 "Surround Playback Volume",
1176 "Center Playback Volume",
1177 "LFE Playback Volume",
1178 "Side Playback Volume",
1179 "Headphone Playback Volume",
1180 "Headphone Playback Volume",
1181 "Speaker Playback Volume",
1182 "External Speaker Playback Volume",
1183 "Speaker2 Playback Volume",
1184 NULL
1185};
1186
1187static const char *slave_sws[] = {
1188 "Front Playback Switch",
1189 "Surround Playback Switch",
1190 "Center Playback Switch",
1191 "LFE Playback Switch",
1192 "Side Playback Switch",
1193 "Headphone Playback Switch",
1194 "Headphone Playback Switch",
1195 "Speaker Playback Switch",
1196 "External Speaker Playback Switch",
1197 "Speaker2 Playback Switch",
edb54a55 1198 "IEC958 Playback Switch",
2134ea4f
TI		 1199 NULL
1200};
1201
2f2f4251
M		 1202static int stac92xx_build_controls(struct hda_codec *codec)
1203{
1204 struct sigmatel_spec *spec = codec->spec;
1205 int err;
c7d4b2fa 1206 int i;
2f2f4251
M		 1207
1208 err = snd_hda_add_new_ctls(codec, spec->mixer);
1209 if (err < 0)
1210 return err;
c7d4b2fa
M		 1211
1212 for (i = 0; i < spec->num_mixers; i++) {
1213 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1214 if (err < 0)
1215 return err;
1216 }
1697055e
TI		 1217 if (spec->num_dmuxes > 0) {
1218 stac_dmux_mixer.count = spec->num_dmuxes;
1219 err = snd_ctl_add(codec->bus->card,
1220 snd_ctl_new1(&stac_dmux_mixer, codec));
1221 if (err < 0)
1222 return err;
1223 }
d9737751
MR		 1224 if (spec->num_smuxes > 0) {
1225 stac_smux_mixer.count = spec->num_smuxes;
1226 err = snd_ctl_add(codec->bus->card,
1227 snd_ctl_new1(&stac_smux_mixer, codec));
1228 if (err < 0)
1229 return err;
1230 }
c7d4b2fa 1231
dabbed6f
M		 1232 if (spec->multiout.dig_out_nid) {
1233 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1234 if (err < 0)
1235 return err;
9a08160b
TI		 1236 err = snd_hda_create_spdif_share_sw(codec,
1237 &spec->multiout);
1238 if (err < 0)
1239 return err;
1240 spec->multiout.share_spdif = 1;
dabbed6f
M		 1241 }
1242 if (spec->dig_in_nid) {
1243 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1244 if (err < 0)
1245 return err;
1246 }
2134ea4f
TI		 1247
1248 /* if we have no master control, let's create it */
1249 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1250 unsigned int vmaster_tlv[4];
2134ea4f 1251 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1252 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1253 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1254 vmaster_tlv, slave_vols);
2134ea4f
TI		 1255 if (err < 0)
1256 return err;
1257 }
1258 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1259 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1260 NULL, slave_sws);
1261 if (err < 0)
1262 return err;
1263 }
1264
dabbed6f 1265 return 0;
2f2f4251
M		 1266}
1267
403d1944 1268static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1269 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1270 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1271};
1272
dfe495d0
TI		 1273/*
1274 STAC 9200 pin configs for
1275 102801A8
1276 102801DE
1277 102801E8
1278*/
1279static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1280 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1281 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1282};
1283
1284/*
1285 STAC 9200 pin configs for
1286 102801C0
1287 102801C1
1288*/
1289static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1290 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1291 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1292};
1293
1294/*
1295 STAC 9200 pin configs for
1296 102801C4 (Dell Dimension E310)
1297 102801C5
1298 102801C7
1299 102801D9
1300 102801DA
1301 102801E3
1302*/
1303static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1304 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1305 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1306};
1307
1308
1309/*
1310 STAC 9200-32 pin configs for
1311 102801B5 (Dell Inspiron 630m)
1312 102801D8 (Dell Inspiron 640m)
1313*/
1314static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1315 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1316 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1317};
1318
1319/*
1320 STAC 9200-32 pin configs for
1321 102801C2 (Dell Latitude D620)
1322 102801C8
1323 102801CC (Dell Latitude D820)
1324 102801D4
1325 102801D6
1326*/
1327static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1328 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1329 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1330};
1331
1332/*
1333 STAC 9200-32 pin configs for
1334 102801CE (Dell XPS M1710)
1335 102801CF (Dell Precision M90)
1336*/
1337static unsigned int dell9200_m23_pin_configs[8] = {
1338 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1339 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1340};
1341
1342/*
1343 STAC 9200-32 pin configs for
1344 102801C9
1345 102801CA
1346 102801CB (Dell Latitude 120L)
1347 102801D3
1348*/
1349static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1350 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1351 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1352};
1353
1354/*
1355 STAC 9200-32 pin configs for
1356 102801BD (Dell Inspiron E1505n)
1357 102801EE
1358 102801EF
1359*/
1360static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1361 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1362 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1363};
1364
1365/*
1366 STAC 9200-32 pin configs for
1367 102801F5 (Dell Inspiron 1501)
1368 102801F6
1369*/
1370static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1371 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1372 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1373};
1374
1375/*
1376 STAC 9200-32
1377 102801CD (Dell Inspiron E1705/9400)
1378*/
1379static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1380 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1381 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1382};
1383
bf277785
TD		 1384static unsigned int oqo9200_pin_configs[8] = {
1385 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1386 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1387};
1388
dfe495d0 1389
f5fcc13c
TI		 1390static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1391 [STAC_REF] = ref9200_pin_configs,
bf277785 1392 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1393 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1394 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1395 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1396 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1397 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1398 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1399 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1400 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1401 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1402 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1403 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1404};
1405
f5fcc13c
TI		 1406static const char *stac9200_models[STAC_9200_MODELS] = {
1407 [STAC_REF] = "ref",
bf277785 1408 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1409 [STAC_9200_DELL_D21] = "dell-d21",
1410 [STAC_9200_DELL_D22] = "dell-d22",
1411 [STAC_9200_DELL_D23] = "dell-d23",
1412 [STAC_9200_DELL_M21] = "dell-m21",
1413 [STAC_9200_DELL_M22] = "dell-m22",
1414 [STAC_9200_DELL_M23] = "dell-m23",
1415 [STAC_9200_DELL_M24] = "dell-m24",
1416 [STAC_9200_DELL_M25] = "dell-m25",
1417 [STAC_9200_DELL_M26] = "dell-m26",
1418 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1419 [STAC_9200_GATEWAY] = "gateway",
117f257d 1420 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1421};
1422
1423static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1424 /* SigmaTel reference board */
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1426 "DFI LanParty", STAC_REF),
e7377071 1427 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1428 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1429 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1430 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1431 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1432 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1433 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1434 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1435 "unknown Dell", STAC_9200_DELL_D22),
1436 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1437 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1438 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1439 "Dell Latitude D620", STAC_9200_DELL_M22),
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1441 "unknown Dell", STAC_9200_DELL_D23),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1443 "unknown Dell", STAC_9200_DELL_D23),
1444 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1445 "unknown Dell", STAC_9200_DELL_M22),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1447 "unknown Dell", STAC_9200_DELL_M24),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1449 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1450 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1451 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1452 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1453 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1454 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1455 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1456 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1457 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1458 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1459 "Dell Precision M90", STAC_9200_DELL_M23),
1460 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1461 "unknown Dell", STAC_9200_DELL_M22),
1462 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1463 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1464 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1465 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1466 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1467 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1468 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1469 "unknown Dell", STAC_9200_DELL_D23),
1470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1471 "unknown Dell", STAC_9200_DELL_D23),
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1473 "unknown Dell", STAC_9200_DELL_D21),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1475 "unknown Dell", STAC_9200_DELL_D23),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1477 "unknown Dell", STAC_9200_DELL_D21),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1479 "unknown Dell", STAC_9200_DELL_M25),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1481 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1483 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1485 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1486 /* Panasonic */
117f257d 1487 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1488 /* Gateway machines needs EAPD to be set on resume */
1489 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1490 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1491 STAC_9200_GATEWAY),
1492 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1493 STAC_9200_GATEWAY),
bf277785
TD		 1494 /* OQO Mobile */
1495 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1496 {} /* terminator */
1497};
1498
8e21c34c
TD		 1499static unsigned int ref925x_pin_configs[8] = {
1500 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1501 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1502};
1503
1504static unsigned int stac925x_MA6_pin_configs[8] = {
1505 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1506 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1507};
1508
2c11f955
TD		 1509static unsigned int stac925x_PA6_pin_configs[8] = {
1510 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1511 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1512};
1513
8e21c34c 1514static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1515 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1516 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1517};
1518
1519static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1520 [STAC_REF] = ref925x_pin_configs,
1521 [STAC_M2_2] = stac925xM2_2_pin_configs,
1522 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1523 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1524};
1525
1526static const char *stac925x_models[STAC_925x_MODELS] = {
1527 [STAC_REF] = "ref",
1528 [STAC_M2_2] = "m2-2",
1529 [STAC_MA6] = "m6",
2c11f955 1530 [STAC_PA6] = "pa6",
8e21c34c
TD		 1531};
1532
1533static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1534 /* SigmaTel reference board */
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1536 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1537 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1538 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1539 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1540 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1541 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1542 {} /* terminator */
1543};
1544
a7662640 1545static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1546 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1547 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1548 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1549 0x01452050,
1550};
1551
1552static unsigned int dell_m6_pin_configs[13] = {
1553 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1554 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1555 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1556 0x4f0000f0,
e1f0d669
MR		 1557};
1558
1559static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1560 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1561 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1562};
1563
1564static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1565 [STAC_92HD73XX_REF] = "ref",
a7662640 1566 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1567};
1568
1569static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1570 /* SigmaTel reference board */
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1572 "DFI LanParty", STAC_92HD73XX_REF),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1574 "unknown Dell", STAC_DELL_M6),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1576 "unknown Dell", STAC_DELL_M6),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1578 "unknown Dell", STAC_DELL_M6),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1580 "unknown Dell", STAC_DELL_M6),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1582 "unknown Dell", STAC_DELL_M6),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1584 "unknown Dell", STAC_DELL_M6),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1586 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1587 {} /* terminator */
1588};
1589
d0513fc6
MR		 1590static unsigned int ref92hd83xxx_pin_configs[14] = {
1591 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1592 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1593 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1594 0x01451160, 0x98560170,
1595};
1596
1597static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1598 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1599};
1600
1601static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1602 [STAC_92HD83XXX_REF] = "ref",
1603};
1604
1605static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1606 /* SigmaTel reference board */
1607 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1608 "DFI LanParty", STAC_92HD71BXX_REF),
1609};
1610
0ffa9807 1611static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1612 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1613 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
0ffa9807 1614 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1615};
1616
0ffa9807 1617static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1618 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1619 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1620 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1621};
1622
0ffa9807 1623static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1624 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1625 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1626 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1627};
1628
e035b841
MR		 1629static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1630 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1631 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1632 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1633 [STAC_HP_M4] = NULL,
e035b841
MR		 1634};
1635
1636static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1637 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1638 [STAC_DELL_M4_1] = "dell-m4-1",
1639 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1640 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1641};
1642
1643static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1644 /* SigmaTel reference board */
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1646 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1648 "unknown Dell", STAC_DELL_M4_1),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1650 "unknown Dell", STAC_DELL_M4_1),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1652 "unknown Dell", STAC_DELL_M4_1),
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1654 "unknown Dell", STAC_DELL_M4_1),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1656 "unknown Dell", STAC_DELL_M4_1),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1658 "unknown Dell", STAC_DELL_M4_1),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1660 "unknown Dell", STAC_DELL_M4_1),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1662 "unknown Dell", STAC_DELL_M4_2),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1664 "unknown Dell", STAC_DELL_M4_2),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1666 "unknown Dell", STAC_DELL_M4_2),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1668 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1669 {} /* terminator */
1670};
1671
403d1944
MP		 1672static unsigned int ref922x_pin_configs[10] = {
1673 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1674 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1675 0x40000100, 0x40000100,
1676};
1677
dfe495d0
TI		 1678/*
1679 STAC 922X pin configs for
1680 102801A7
1681 102801AB
1682 102801A9
1683 102801D1
1684 102801D2
1685*/
1686static unsigned int dell_922x_d81_pin_configs[10] = {
1687 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1688 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1689 0x01813122, 0x400001f2,
1690};
1691
1692/*
1693 STAC 922X pin configs for
1694 102801AC
1695 102801D0
1696*/
1697static unsigned int dell_922x_d82_pin_configs[10] = {
1698 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1699 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1700 0x01813122, 0x400001f1,
1701};
1702
1703/*
1704 STAC 922X pin configs for
1705 102801BF
1706*/
1707static unsigned int dell_922x_m81_pin_configs[10] = {
1708 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1709 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1710 0x40C003f1, 0x405003f0,
1711};
1712
1713/*
1714 STAC 9221 A1 pin configs for
1715 102801D7 (Dell XPS M1210)
1716*/
1717static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1718 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1719 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1720 0x508003f3, 0x405003f4,
1721};
1722
403d1944 1723static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1724 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1725 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1726 0x02a19120, 0x40000100,
1727};
1728
1729static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1730 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1731 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1732 0x02a19320, 0x40000100,
1733};
1734
5d5d3bc3
IZ		 1735static unsigned int intel_mac_v1_pin_configs[10] = {
1736 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1737 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1738 0x400000fc, 0x400000fb,
1739};
1740
1741static unsigned int intel_mac_v2_pin_configs[10] = {
1742 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1743 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1744 0x400000fc, 0x400000fb,
6f0778d8
NB		 1745};
1746
5d5d3bc3
IZ		 1747static unsigned int intel_mac_v3_pin_configs[10] = {
1748 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1749 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1750 0x400000fc, 0x400000fb,
1751};
1752
5d5d3bc3
IZ		 1753static unsigned int intel_mac_v4_pin_configs[10] = {
1754 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1755 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1756 0x400000fc, 0x400000fb,
1757};
1758
5d5d3bc3
IZ		 1759static unsigned int intel_mac_v5_pin_configs[10] = {
1760 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1761 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1762 0x400000fc, 0x400000fb,
0dae0f83
TI		 1763};
1764
8c650087
MCC		 1765static unsigned int ecs202_pin_configs[10] = {
1766 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1767 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1768 0x9037012e, 0x40e000f2,
1769};
76c08828 1770
19039bd0 1771static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1772 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1773 [STAC_D945GTP3] = d945gtp3_pin_configs,
1774 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1775 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1776 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1777 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1778 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1779 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1780 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1781 /* for backward compatibility */
5d5d3bc3
IZ		 1782 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1783 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1784 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1785 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1786 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1787 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1788 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1789 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1790 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1791 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1792 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1793};
1794
f5fcc13c
TI		 1795static const char *stac922x_models[STAC_922X_MODELS] = {
1796 [STAC_D945_REF] = "ref",
1797 [STAC_D945GTP5] = "5stack",
1798 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1799 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1800 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1801 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1802 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1803 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1804 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1805 /* for backward compatibility */
f5fcc13c 1806 [STAC_MACMINI] = "macmini",
3fc24d85 1807 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1808 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1809 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1810 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1811 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1812 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1813 [STAC_922X_DELL_D81] = "dell-d81",
1814 [STAC_922X_DELL_D82] = "dell-d82",
1815 [STAC_922X_DELL_M81] = "dell-m81",
1816 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1817};
1818
1819static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1820 /* SigmaTel reference board */
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1822 "DFI LanParty", STAC_D945_REF),
1823 /* Intel 945G based systems */
1824 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1825 "Intel D945G", STAC_D945GTP3),
1826 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1827 "Intel D945G", STAC_D945GTP3),
1828 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1829 "Intel D945G", STAC_D945GTP3),
1830 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1831 "Intel D945G", STAC_D945GTP3),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1833 "Intel D945G", STAC_D945GTP3),
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1835 "Intel D945G", STAC_D945GTP3),
1836 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1837 "Intel D945G", STAC_D945GTP3),
1838 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1839 "Intel D945G", STAC_D945GTP3),
1840 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1841 "Intel D945G", STAC_D945GTP3),
1842 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1843 "Intel D945G", STAC_D945GTP3),
1844 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1845 "Intel D945G", STAC_D945GTP3),
1846 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1847 "Intel D945G", STAC_D945GTP3),
1848 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1849 "Intel D945G", STAC_D945GTP3),
1850 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1851 "Intel D945G", STAC_D945GTP3),
1852 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1853 "Intel D945G", STAC_D945GTP3),
1854 /* Intel D945G 5-stack systems */
1855 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1856 "Intel D945G", STAC_D945GTP5),
1857 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1858 "Intel D945G", STAC_D945GTP5),
1859 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1860 "Intel D945G", STAC_D945GTP5),
1861 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1862 "Intel D945G", STAC_D945GTP5),
1863 /* Intel 945P based systems */
1864 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1865 "Intel D945P", STAC_D945GTP3),
1866 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1867 "Intel D945P", STAC_D945GTP3),
1868 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1869 "Intel D945P", STAC_D945GTP3),
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1871 "Intel D945P", STAC_D945GTP3),
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1873 "Intel D945P", STAC_D945GTP3),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1875 "Intel D945P", STAC_D945GTP5),
1876 /* other systems */
536319af 1877 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1878 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1879 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1880 /* Dell systems */
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1882 "unknown Dell", STAC_922X_DELL_D81),
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1884 "unknown Dell", STAC_922X_DELL_D81),
1885 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1886 "unknown Dell", STAC_922X_DELL_D81),
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1888 "unknown Dell", STAC_922X_DELL_D82),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1890 "unknown Dell", STAC_922X_DELL_M81),
1891 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1892 "unknown Dell", STAC_922X_DELL_D82),
1893 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1894 "unknown Dell", STAC_922X_DELL_D81),
1895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1896 "unknown Dell", STAC_922X_DELL_D81),
1897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1898 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1899 /* ECS/PC Chips boards */
1900 SND_PCI_QUIRK(0x1019, 0x2144,
1901 "ECS/PC chips", STAC_ECS_202),
1902 SND_PCI_QUIRK(0x1019, 0x2608,
1903 "ECS/PC chips", STAC_ECS_202),
1904 SND_PCI_QUIRK(0x1019, 0x2633,
1905 "ECS/PC chips P17G/1333", STAC_ECS_202),
1906 SND_PCI_QUIRK(0x1019, 0x2811,
1907 "ECS/PC chips", STAC_ECS_202),
1908 SND_PCI_QUIRK(0x1019, 0x2812,
1909 "ECS/PC chips", STAC_ECS_202),
1910 SND_PCI_QUIRK(0x1019, 0x2813,
1911 "ECS/PC chips", STAC_ECS_202),
1912 SND_PCI_QUIRK(0x1019, 0x2814,
1913 "ECS/PC chips", STAC_ECS_202),
1914 SND_PCI_QUIRK(0x1019, 0x2815,
1915 "ECS/PC chips", STAC_ECS_202),
1916 SND_PCI_QUIRK(0x1019, 0x2816,
1917 "ECS/PC chips", STAC_ECS_202),
1918 SND_PCI_QUIRK(0x1019, 0x2817,
1919 "ECS/PC chips", STAC_ECS_202),
1920 SND_PCI_QUIRK(0x1019, 0x2818,
1921 "ECS/PC chips", STAC_ECS_202),
1922 SND_PCI_QUIRK(0x1019, 0x2819,
1923 "ECS/PC chips", STAC_ECS_202),
1924 SND_PCI_QUIRK(0x1019, 0x2820,
1925 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1926 {} /* terminator */
1927};
1928
3cc08dc6 1929static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1930 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1931 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1932 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1933 0x01c42190, 0x40000100,
3cc08dc6
MP		 1934};
1935
93ed1503 1936static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1937 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1938 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1939 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1940 0x40000100, 0x40000100
1941};
1942
93ed1503
TD		 1943static unsigned int d965_5st_pin_configs[14] = {
1944 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1945 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1946 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1947 0x40000100, 0x40000100
1948};
1949
4ff076e5
TD		 1950static unsigned int dell_3st_pin_configs[14] = {
1951 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1952 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1953 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1954 0x40c003fc, 0x40000100
1955};
1956
93ed1503 1957static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1958 [STAC_D965_REF] = ref927x_pin_configs,
1959 [STAC_D965_3ST] = d965_3st_pin_configs,
1960 [STAC_D965_5ST] = d965_5st_pin_configs,
1961 [STAC_DELL_3ST] = dell_3st_pin_configs,
1962 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1963};
1964
f5fcc13c 1965static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1966 [STAC_D965_REF] = "ref",
1967 [STAC_D965_3ST] = "3stack",
1968 [STAC_D965_5ST] = "5stack",
1969 [STAC_DELL_3ST] = "dell-3stack",
1970 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1971};
1972
1973static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1974 /* SigmaTel reference board */
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1976 "DFI LanParty", STAC_D965_REF),
81d3dbde 1977 /* Intel 946 based systems */
f5fcc13c
TI		 1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1980 /* 965 based 3 stack systems */
f5fcc13c
TI		 1981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1997 /* Dell 3 stack systems */
8e9068b1 1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2002 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2007 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2011 /* 965 based 5 stack systems */
f5fcc13c
TI		 2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2021 {} /* terminator */
2022};
2023
f3302a59
MP		 2024static unsigned int ref9205_pin_configs[12] = {
2025 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2026 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2027 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2028};
2029
dfe495d0
TI		 2030/*
2031 STAC 9205 pin configs for
2032 102801F1
2033 102801F2
2034 102801FC
2035 102801FD
2036 10280204
2037 1028021F
3fa2ef74 2038 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2039*/
2040static unsigned int dell_9205_m42_pin_configs[12] = {
2041 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2042 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2043 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2044};
2045
2046/*
2047 STAC 9205 pin configs for
2048 102801F9
2049 102801FA
2050 102801FE
2051 102801FF (Dell Precision M4300)
2052 10280206
2053 10280200
2054 10280201
2055*/
2056static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2057 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2058 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2059 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2060};
2061
dfe495d0 2062static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2063 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2064 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2065 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2066};
2067
f5fcc13c 2068static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2069 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2070 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2071 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2072 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2073};
2074
f5fcc13c
TI		 2075static const char *stac9205_models[STAC_9205_MODELS] = {
2076 [STAC_9205_REF] = "ref",
dfe495d0 2077 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2078 [STAC_9205_DELL_M43] = "dell-m43",
2079 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2080};
2081
2082static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2083 /* SigmaTel reference board */
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2085 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2087 "unknown Dell", STAC_9205_DELL_M42),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2089 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2091 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2093 "Dell Precision", STAC_9205_DELL_M43),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2095 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2097 "unknown Dell", STAC_9205_DELL_M42),
2098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2099 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2101 "Dell Precision", STAC_9205_DELL_M43),
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2103 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2105 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2107 "Dell Precision", STAC_9205_DELL_M43),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2109 "Dell Precision", STAC_9205_DELL_M43),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2111 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2113 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2115 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2116 {} /* terminator */
2117};
2118
11b44bbd
RF		 2119static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2120{
2121 int i;
2122 struct sigmatel_spec *spec = codec->spec;
2123
2124 if (! spec->bios_pin_configs) {
2125 spec->bios_pin_configs = kcalloc(spec->num_pins,
2126 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2127 if (! spec->bios_pin_configs)
2128 return -ENOMEM;
2129 }
2130
2131 for (i = 0; i < spec->num_pins; i++) {
2132 hda_nid_t nid = spec->pin_nids[i];
2133 unsigned int pin_cfg;
2134
2135 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2136 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2137 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2138 nid, pin_cfg);
2139 spec->bios_pin_configs[i] = pin_cfg;
2140 }
2141
2142 return 0;
2143}
2144
87d48363
MR		 2145static void stac92xx_set_config_reg(struct hda_codec *codec,
2146 hda_nid_t pin_nid, unsigned int pin_config)
2147{
2148 int i;
2149 snd_hda_codec_write(codec, pin_nid, 0,
2150 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2151 pin_config & 0x000000ff);
2152 snd_hda_codec_write(codec, pin_nid, 0,
2153 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2154 (pin_config & 0x0000ff00) >> 8);
2155 snd_hda_codec_write(codec, pin_nid, 0,
2156 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2157 (pin_config & 0x00ff0000) >> 16);
2158 snd_hda_codec_write(codec, pin_nid, 0,
2159 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2160 pin_config >> 24);
2161 i = snd_hda_codec_read(codec, pin_nid, 0,
2162 AC_VERB_GET_CONFIG_DEFAULT,
2163 0x00);
2164 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2165 pin_nid, i);
2166}
2167
2f2f4251
M		 2168static void stac92xx_set_config_regs(struct hda_codec *codec)
2169{
2170 int i;
2171 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2172
87d48363
MR		 2173 if (!spec->pin_configs)
2174 return;
11b44bbd 2175
87d48363
MR		 2176 for (i = 0; i < spec->num_pins; i++)
2177 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2178 spec->pin_configs[i]);
2f2f4251 2179}
2f2f4251 2180
dabbed6f 2181/*
c7d4b2fa 2182 * Analog playback callbacks
dabbed6f 2183 */
c7d4b2fa
M		 2184static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2185 struct hda_codec *codec,
c8b6bf9b 2186 struct snd_pcm_substream *substream)
2f2f4251 2187{
dabbed6f 2188 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2189 if (spec->stream_delay)
2190 msleep(spec->stream_delay);
9a08160b
TI		 2191 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2192 hinfo);
2f2f4251
M		 2193}
2194
2f2f4251
M		 2195static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2196 struct hda_codec *codec,
2197 unsigned int stream_tag,
2198 unsigned int format,
c8b6bf9b 2199 struct snd_pcm_substream *substream)
2f2f4251
M		 2200{
2201 struct sigmatel_spec *spec = codec->spec;
403d1944 2202 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2203}
2204
2205static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2206 struct hda_codec *codec,
c8b6bf9b 2207 struct snd_pcm_substream *substream)
2f2f4251
M		 2208{
2209 struct sigmatel_spec *spec = codec->spec;
2210 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2211}
2212
dabbed6f
M		 2213/*
2214 * Digital playback callbacks
2215 */
2216static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2217 struct hda_codec *codec,
c8b6bf9b 2218 struct snd_pcm_substream *substream)
dabbed6f
M		 2219{
2220 struct sigmatel_spec *spec = codec->spec;
2221 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2222}
2223
2224static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2225 struct hda_codec *codec,
c8b6bf9b 2226 struct snd_pcm_substream *substream)
dabbed6f
M		 2227{
2228 struct sigmatel_spec *spec = codec->spec;
2229 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2230}
2231
6b97eb45
TI		 2232static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2233 struct hda_codec *codec,
2234 unsigned int stream_tag,
2235 unsigned int format,
2236 struct snd_pcm_substream *substream)
2237{
2238 struct sigmatel_spec *spec = codec->spec;
2239 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2240 stream_tag, format, substream);
2241}
2242
dabbed6f 2243
2f2f4251
M		 2244/*
2245 * Analog capture callbacks
2246 */
2247static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2248 struct hda_codec *codec,
2249 unsigned int stream_tag,
2250 unsigned int format,
c8b6bf9b 2251 struct snd_pcm_substream *substream)
2f2f4251
M		 2252{
2253 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2254 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2255
8daaaa97
MR		 2256 if (spec->powerdown_adcs) {
2257 msleep(40);
2258 snd_hda_codec_write_cache(codec, nid, 0,
2259 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2260 }
2261 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2262 return 0;
2263}
2264
2265static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2266 struct hda_codec *codec,
c8b6bf9b 2267 struct snd_pcm_substream *substream)
2f2f4251
M		 2268{
2269 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2270 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2271
8daaaa97
MR		 2272 snd_hda_codec_cleanup_stream(codec, nid);
2273 if (spec->powerdown_adcs)
2274 snd_hda_codec_write_cache(codec, nid, 0,
2275 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2276 return 0;
2277}
2278
dabbed6f
M		 2279static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2280 .substreams = 1,
2281 .channels_min = 2,
2282 .channels_max = 2,
2283 /* NID is set in stac92xx_build_pcms */
2284 .ops = {
2285 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2286 .close = stac92xx_dig_playback_pcm_close,
2287 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2288 },
2289};
2290
2291static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2292 .substreams = 1,
2293 .channels_min = 2,
2294 .channels_max = 2,
2295 /* NID is set in stac92xx_build_pcms */
2296};
2297
2f2f4251
M		 2298static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2299 .substreams = 1,
2300 .channels_min = 2,
c7d4b2fa 2301 .channels_max = 8,
2f2f4251
M		 2302 .nid = 0x02, /* NID to query formats and rates */
2303 .ops = {
2304 .open = stac92xx_playback_pcm_open,
2305 .prepare = stac92xx_playback_pcm_prepare,
2306 .cleanup = stac92xx_playback_pcm_cleanup
2307 },
2308};
2309
3cc08dc6
MP		 2310static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2311 .substreams = 1,
2312 .channels_min = 2,
2313 .channels_max = 2,
2314 .nid = 0x06, /* NID to query formats and rates */
2315 .ops = {
2316 .open = stac92xx_playback_pcm_open,
2317 .prepare = stac92xx_playback_pcm_prepare,
2318 .cleanup = stac92xx_playback_pcm_cleanup
2319 },
2320};
2321
2f2f4251 2322static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2323 .channels_min = 2,
2324 .channels_max = 2,
9e05b7a3 2325 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2326 .ops = {
2327 .prepare = stac92xx_capture_pcm_prepare,
2328 .cleanup = stac92xx_capture_pcm_cleanup
2329 },
2330};
2331
2332static int stac92xx_build_pcms(struct hda_codec *codec)
2333{
2334 struct sigmatel_spec *spec = codec->spec;
2335 struct hda_pcm *info = spec->pcm_rec;
2336
2337 codec->num_pcms = 1;
2338 codec->pcm_info = info;
2339
c7d4b2fa 2340 info->name = "STAC92xx Analog";
2f2f4251 2341 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2342 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2343 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2344 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2345
2346 if (spec->alt_switch) {
2347 codec->num_pcms++;
2348 info++;
2349 info->name = "STAC92xx Analog Alt";
2350 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2351 }
2f2f4251 2352
dabbed6f
M		 2353 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2354 codec->num_pcms++;
2355 info++;
2356 info->name = "STAC92xx Digital";
7ba72ba1 2357 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2358 if (spec->multiout.dig_out_nid) {
2359 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2360 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2361 }
2362 if (spec->dig_in_nid) {
2363 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2364 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2365 }
2366 }
2367
2f2f4251
M		 2368 return 0;
2369}
2370
c960a03b
TI		 2371static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2372{
2373 unsigned int pincap = snd_hda_param_read(codec, nid,
2374 AC_PAR_PIN_CAP);
2375 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2376 if (pincap & AC_PINCAP_VREF_100)
2377 return AC_PINCTL_VREF_100;
2378 if (pincap & AC_PINCAP_VREF_80)
2379 return AC_PINCTL_VREF_80;
2380 if (pincap & AC_PINCAP_VREF_50)
2381 return AC_PINCTL_VREF_50;
2382 if (pincap & AC_PINCAP_VREF_GRD)
2383 return AC_PINCTL_VREF_GRD;
2384 return 0;
2385}
2386
403d1944
MP		 2387static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2388
2389{
82beb8fd
TI		 2390 snd_hda_codec_write_cache(codec, nid, 0,
2391 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2392}
2393
7c2ba97b
MR		 2394#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2395
2396static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2397 struct snd_ctl_elem_value *ucontrol)
2398{
2399 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2400 struct sigmatel_spec *spec = codec->spec;
2401
2402 ucontrol->value.integer.value[0] = spec->hp_switch;
2403 return 0;
2404}
2405
2406static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2407 struct snd_ctl_elem_value *ucontrol)
2408{
2409 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2410 struct sigmatel_spec *spec = codec->spec;
2411
2412 spec->hp_switch = ucontrol->value.integer.value[0];
2413
2414 /* check to be sure that the ports are upto date with
2415 * switch changes
2416 */
2417 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2418
2419 return 1;
2420}
2421
a5ce8890 2422#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2423
2424static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2425{
2426 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2427 struct sigmatel_spec *spec = codec->spec;
2428 int io_idx = kcontrol-> private_value & 0xff;
2429
2430 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2431 return 0;
2432}
2433
2434static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2435{
2436 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2437 struct sigmatel_spec *spec = codec->spec;
2438 hda_nid_t nid = kcontrol->private_value >> 8;
2439 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2440 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2441
2442 spec->io_switch[io_idx] = val;
2443
2444 if (val)
2445 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2446 else {
2447 unsigned int pinctl = AC_PINCTL_IN_EN;
2448 if (io_idx) /* set VREF for mic */
2449 pinctl |= stac92xx_get_vref(codec, nid);
2450 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2451 }
40c1d308
JZ		 2452
2453 /* check the auto-mute again: we need to mute/unmute the speaker
2454 * appropriately according to the pin direction
2455 */
2456 if (spec->hp_detect)
2457 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2458
403d1944
MP		 2459 return 1;
2460}
2461
0fb87bb4
ML		 2462#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2463
2464static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2465 struct snd_ctl_elem_value *ucontrol)
2466{
2467 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2468 struct sigmatel_spec *spec = codec->spec;
2469
2470 ucontrol->value.integer.value[0] = spec->clfe_swap;
2471 return 0;
2472}
2473
2474static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2475 struct snd_ctl_elem_value *ucontrol)
2476{
2477 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2478 struct sigmatel_spec *spec = codec->spec;
2479 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2480 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2481
68ea7b2f 2482 if (spec->clfe_swap == val)
0fb87bb4
ML		 2483 return 0;
2484
68ea7b2f 2485 spec->clfe_swap = val;
0fb87bb4
ML		 2486
2487 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2488 spec->clfe_swap ? 0x4 : 0x0);
2489
2490 return 1;
2491}
2492
7c2ba97b
MR		 2493#define STAC_CODEC_HP_SWITCH(xname) \
2494 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2495 .name = xname, \
2496 .index = 0, \
2497 .info = stac92xx_hp_switch_info, \
2498 .get = stac92xx_hp_switch_get, \
2499 .put = stac92xx_hp_switch_put, \
2500 }
2501
403d1944
MP		 2502#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2503 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2504 .name = xname, \
2505 .index = 0, \
2506 .info = stac92xx_io_switch_info, \
2507 .get = stac92xx_io_switch_get, \
2508 .put = stac92xx_io_switch_put, \
2509 .private_value = xpval, \
2510 }
2511
0fb87bb4
ML		 2512#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2513 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2514 .name = xname, \
2515 .index = 0, \
2516 .info = stac92xx_clfe_switch_info, \
2517 .get = stac92xx_clfe_switch_get, \
2518 .put = stac92xx_clfe_switch_put, \
2519 .private_value = xpval, \
2520 }
403d1944 2521
c7d4b2fa
M		 2522enum {
2523 STAC_CTL_WIDGET_VOL,
2524 STAC_CTL_WIDGET_MUTE,
09a99959 2525 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2526 STAC_CTL_WIDGET_AMP_MUX,
2527 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2528 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2529 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2530 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2531};
2532
c8b6bf9b 2533static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2534 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2535 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2536 STAC_MONO_MUX,
89385035
MR		 2537 STAC_AMP_MUX,
2538 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2539 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2540 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2541 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2542};
2543
2544/* add dynamic controls */
4682eee0
MR		 2545static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2546 int idx, const char *name, unsigned long val)
c7d4b2fa 2547{
c8b6bf9b 2548 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2549
2550 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2551 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2552
2553 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2554 if (! knew)
2555 return -ENOMEM;
2556 if (spec->kctl_alloc) {
2557 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2558 kfree(spec->kctl_alloc);
2559 }
2560 spec->kctl_alloc = knew;
2561 spec->num_kctl_alloc = num;
2562 }
2563
2564 knew = &spec->kctl_alloc[spec->num_kctl_used];
2565 *knew = stac92xx_control_templates[type];
4682eee0 2566 knew->index = idx;
82fe0c58 2567 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2568 if (! knew->name)
2569 return -ENOMEM;
2570 knew->private_value = val;
2571 spec->num_kctl_used++;
2572 return 0;
2573}
2574
4682eee0
MR		 2575
2576/* add dynamic controls */
2577static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2578 const char *name, unsigned long val)
2579{
2580 return stac92xx_add_control_idx(spec, type, 0, name, val);
2581}
2582
403d1944
MP		 2583/* flag inputs as additional dynamic lineouts */
2584static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2585{
2586 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2587 unsigned int wcaps, wtype;
2588 int i, num_dacs = 0;
2589
2590 /* use the wcaps cache to count all DACs available for line-outs */
2591 for (i = 0; i < codec->num_nodes; i++) {
2592 wcaps = codec->wcaps[i];
2593 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2594
7b043899
SL		 2595 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2596 num_dacs++;
2597 }
403d1944 2598
7b043899
SL		 2599 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2600
403d1944
MP		 2601 switch (cfg->line_outs) {
2602 case 3:
2603 /* add line-in as side */
7b043899 2604 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2605 cfg->line_out_pins[cfg->line_outs] =
2606 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2607 spec->line_switch = 1;
2608 cfg->line_outs++;
2609 }
2610 break;
2611 case 2:
2612 /* add line-in as clfe and mic as side */
7b043899 2613 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2614 cfg->line_out_pins[cfg->line_outs] =
2615 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2616 spec->line_switch = 1;
2617 cfg->line_outs++;
2618 }
7b043899 2619 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2620 cfg->line_out_pins[cfg->line_outs] =
2621 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2622 spec->mic_switch = 1;
2623 cfg->line_outs++;
2624 }
2625 break;
2626 case 1:
2627 /* add line-in as surr and mic as clfe */
7b043899 2628 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2629 cfg->line_out_pins[cfg->line_outs] =
2630 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2631 spec->line_switch = 1;
2632 cfg->line_outs++;
2633 }
7b043899 2634 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2635 cfg->line_out_pins[cfg->line_outs] =
2636 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2637 spec->mic_switch = 1;
2638 cfg->line_outs++;
2639 }
2640 break;
2641 }
2642
2643 return 0;
2644}
2645
7b043899
SL		 2646
2647static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2648{
2649 int i;
2650
2651 for (i = 0; i < spec->multiout.num_dacs; i++) {
2652 if (spec->multiout.dac_nids[i] == nid)
2653 return 1;
2654 }
2655
2656 return 0;
2657}
2658
3cc08dc6 2659/*
7b043899
SL		 2660 * Fill in the dac_nids table from the parsed pin configuration
2661 * This function only works when every pin in line_out_pins[]
2662 * contains atleast one DAC in its connection list. Some 92xx
2663 * codecs are not connected directly to a DAC, such as the 9200
2664 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2665 */
19039bd0 2666static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2667 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2668{
2669 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2670 int i, j, conn_len = 0;
2671 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2672 unsigned int wcaps, wtype;
2673
c7d4b2fa
M		 2674 for (i = 0; i < cfg->line_outs; i++) {
2675 nid = cfg->line_out_pins[i];
7b043899
SL		 2676 conn_len = snd_hda_get_connections(codec, nid, conn,
2677 HDA_MAX_CONNECTIONS);
2678 for (j = 0; j < conn_len; j++) {
2679 wcaps = snd_hda_param_read(codec, conn[j],
2680 AC_PAR_AUDIO_WIDGET_CAP);
2681 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2682 if (wtype != AC_WID_AUD_OUT ||
2683 (wcaps & AC_WCAP_DIGITAL))
2684 continue;
2685 /* conn[j] is a DAC routed to this line-out */
2686 if (!is_in_dac_nids(spec, conn[j]))
2687 break;
2688 }
2689
2690 if (j == conn_len) {
df802952
TI		 2691 if (spec->multiout.num_dacs > 0) {
2692 /* we have already working output pins,
2693 * so let's drop the broken ones again
2694 */
2695 cfg->line_outs = spec->multiout.num_dacs;
2696 break;
2697 }
7b043899
SL		 2698 /* error out, no available DAC found */
2699 snd_printk(KERN_ERR
2700 "%s: No available DAC for pin 0x%x\n",
2701 __func__, nid);
2702 return -ENODEV;
2703 }
2704
2705 spec->multiout.dac_nids[i] = conn[j];
2706 spec->multiout.num_dacs++;
2707 if (conn_len > 1) {
2708 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2709 snd_hda_codec_write_cache(codec, nid, 0,
2710 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2711
7b043899
SL		 2712 }
2713 }
c7d4b2fa 2714
7b043899
SL		 2715 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2716 spec->multiout.num_dacs,
2717 spec->multiout.dac_nids[0],
2718 spec->multiout.dac_nids[1],
2719 spec->multiout.dac_nids[2],
2720 spec->multiout.dac_nids[3],
2721 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2722 return 0;
2723}
2724
eb06ed8f
TI		 2725/* create volume control/switch for the given prefx type */
2726static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2727{
2728 char name[32];
2729 int err;
2730
2731 sprintf(name, "%s Playback Volume", pfx);
2732 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2733 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2734 if (err < 0)
2735 return err;
2736 sprintf(name, "%s Playback Switch", pfx);
2737 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2738 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2739 if (err < 0)
2740 return err;
2741 return 0;
2742}
2743
ae0afd81
MR		 2744static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2745{
2746 if (!spec->multiout.hp_nid)
2747 spec->multiout.hp_nid = nid;
2748 else if (spec->multiout.num_dacs > 4) {
2749 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2750 return 1;
2751 } else {
2752 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2753 spec->multiout.num_dacs++;
2754 }
2755 return 0;
2756}
2757
2758static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2759{
2760 if (is_in_dac_nids(spec, nid))
2761 return 1;
2762 if (spec->multiout.hp_nid == nid)
2763 return 1;
2764 return 0;
2765}
2766
c7d4b2fa 2767/* add playback controls from the parsed DAC table */
0fb87bb4 2768static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2769 const struct auto_pin_cfg *cfg)
c7d4b2fa 2770{
19039bd0
TI		 2771 static const char *chname[4] = {
2772 "Front", "Surround", NULL /*CLFE*/, "Side"
2773 };
c7d4b2fa
M		 2774 hda_nid_t nid;
2775 int i, err;
2776
0fb87bb4 2777 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2778 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2779
2780
40ac8c4f 2781 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2782 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2783 continue;
2784
2785 nid = spec->multiout.dac_nids[i];
2786
2787 if (i == 2) {
2788 /* Center/LFE */
eb06ed8f
TI		 2789 err = create_controls(spec, "Center", nid, 1);
2790 if (err < 0)
c7d4b2fa 2791 return err;
eb06ed8f
TI		 2792 err = create_controls(spec, "LFE", nid, 2);
2793 if (err < 0)
c7d4b2fa 2794 return err;
0fb87bb4
ML		 2795
2796 wid_caps = get_wcaps(codec, nid);
2797
2798 if (wid_caps & AC_WCAP_LR_SWAP) {
2799 err = stac92xx_add_control(spec,
2800 STAC_CTL_WIDGET_CLFE_SWITCH,
2801 "Swap Center/LFE Playback Switch", nid);
2802
2803 if (err < 0)
2804 return err;
2805 }
2806
c7d4b2fa 2807 } else {
eb06ed8f
TI		 2808 err = create_controls(spec, chname[i], nid, 3);
2809 if (err < 0)
c7d4b2fa
M		 2810 return err;
2811 }
2812 }
2813
7c2ba97b
MR		 2814 if (cfg->hp_outs > 1) {
2815 err = stac92xx_add_control(spec,
2816 STAC_CTL_WIDGET_HP_SWITCH,
2817 "Headphone as Line Out Switch", 0);
2818 if (err < 0)
2819 return err;
2820 }
2821
b5895dc8
MR		 2822 if (spec->line_switch) {
2823 nid = cfg->input_pins[AUTO_PIN_LINE];
2824 pincap = snd_hda_param_read(codec, nid,
2825 AC_PAR_PIN_CAP);
2826 if (pincap & AC_PINCAP_OUT) {
2827 err = stac92xx_add_control(spec,
2828 STAC_CTL_WIDGET_IO_SWITCH,
2829 "Line In as Output Switch", nid << 8);
2830 if (err < 0)
2831 return err;
2832 }
2833 }
403d1944 2834
b5895dc8 2835 if (spec->mic_switch) {
cace16f1 2836 unsigned int def_conf;
ae0afd81
MR		 2837 unsigned int mic_pin = AUTO_PIN_MIC;
2838again:
2839 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2840 def_conf = snd_hda_codec_read(codec, nid, 0,
2841 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2842 /* some laptops have an internal analog microphone
2843 * which can't be used as a output */
2844 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2845 pincap = snd_hda_param_read(codec, nid,
2846 AC_PAR_PIN_CAP);
2847 if (pincap & AC_PINCAP_OUT) {
2848 err = stac92xx_add_control(spec,
2849 STAC_CTL_WIDGET_IO_SWITCH,
2850 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2851 nid = snd_hda_codec_read(codec, nid, 0,
2852 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2853 if (!check_in_dac_nids(spec, nid))
2854 add_spec_dacs(spec, nid);
cace16f1
MR		 2855 if (err < 0)
2856 return err;
2857 }
ae0afd81
MR		 2858 } else if (mic_pin == AUTO_PIN_MIC) {
2859 mic_pin = AUTO_PIN_FRONT_MIC;
2860 goto again;
b5895dc8
MR		 2861 }
2862 }
403d1944 2863
c7d4b2fa
M		 2864 return 0;
2865}
2866
eb06ed8f
TI		 2867/* add playback controls for Speaker and HP outputs */
2868static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2869 struct auto_pin_cfg *cfg)
2870{
2871 struct sigmatel_spec *spec = codec->spec;
2872 hda_nid_t nid;
2873 int i, old_num_dacs, err;
2874
2875 old_num_dacs = spec->multiout.num_dacs;
2876 for (i = 0; i < cfg->hp_outs; i++) {
2877 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2878 if (wid_caps & AC_WCAP_UNSOL_CAP)
2879 spec->hp_detect = 1;
2880 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2881 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2882 if (check_in_dac_nids(spec, nid))
2883 nid = 0;
2884 if (! nid)
c7d4b2fa 2885 continue;
eb06ed8f
TI		 2886 add_spec_dacs(spec, nid);
2887 }
2888 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2889 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2890 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2891 if (check_in_dac_nids(spec, nid))
2892 nid = 0;
eb06ed8f
TI		 2893 if (! nid)
2894 continue;
2895 add_spec_dacs(spec, nid);
c7d4b2fa 2896 }
1b290a51
MR		 2897 for (i = 0; i < cfg->line_outs; i++) {
2898 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2899 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2900 if (check_in_dac_nids(spec, nid))
2901 nid = 0;
2902 if (! nid)
2903 continue;
2904 add_spec_dacs(spec, nid);
2905 }
eb06ed8f
TI		 2906 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2907 static const char *pfxs[] = {
2908 "Speaker", "External Speaker", "Speaker2",
2909 };
2910 err = create_controls(spec, pfxs[i - old_num_dacs],
2911 spec->multiout.dac_nids[i], 3);
2912 if (err < 0)
2913 return err;
2914 }
2915 if (spec->multiout.hp_nid) {
2626a263
TI		 2916 err = create_controls(spec, "Headphone",
2917 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2918 if (err < 0)
2919 return err;
2920 }
c7d4b2fa
M		 2921
2922 return 0;
2923}
2924
b22b4821 2925/* labels for mono mux outputs */
d0513fc6
MR		 2926static const char *stac92xx_mono_labels[4] = {
2927 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2928};
2929
2930/* create mono mux for mono out on capable codecs */
2931static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2932{
2933 struct sigmatel_spec *spec = codec->spec;
2934 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2935 int i, num_cons;
2936 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2937
2938 num_cons = snd_hda_get_connections(codec,
2939 spec->mono_nid,
2940 con_lst,
2941 HDA_MAX_NUM_INPUTS);
2942 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2943 return -EINVAL;
2944
2945 for (i = 0; i < num_cons; i++) {
2946 mono_mux->items[mono_mux->num_items].label =
2947 stac92xx_mono_labels[i];
2948 mono_mux->items[mono_mux->num_items].index = i;
2949 mono_mux->num_items++;
2950 }
09a99959
MR		 2951
2952 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2953 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2954}
2955
89385035
MR		 2956/* labels for amp mux outputs */
2957static const char *stac92xx_amp_labels[3] = {
2958 "Front Microphone", "Microphone", "Line In"
2959};
2960
2961/* create amp out controls mux on capable codecs */
2962static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
2963{
2964 struct sigmatel_spec *spec = codec->spec;
2965 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
2966 int i, err;
2967
2a9c7816 2968 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 2969 amp_mux->items[amp_mux->num_items].label =
2970 stac92xx_amp_labels[i];
2971 amp_mux->items[amp_mux->num_items].index = i;
2972 amp_mux->num_items++;
2973 }
2974
2a9c7816
MR		 2975 if (spec->num_amps > 1) {
2976 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
2977 "Amp Selector Capture Switch", 0);
2978 if (err < 0)
2979 return err;
2980 }
89385035
MR		 2981 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
2982 "Amp Capture Volume",
2983 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
2984}
2985
2986
1cd2224c
MR		 2987/* create PC beep volume controls */
2988static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
2989 hda_nid_t nid)
2990{
2991 struct sigmatel_spec *spec = codec->spec;
2992 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2993 int err;
2994
2995 /* check for mute support for the the amp */
2996 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
2997 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2998 "PC Beep Playback Switch",
2999 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3000 if (err < 0)
3001 return err;
3002 }
3003
3004 /* check to see if there is volume support for the amp */
3005 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3006 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3007 "PC Beep Playback Volume",
3008 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3009 if (err < 0)
3010 return err;
3011 }
3012 return 0;
3013}
3014
4682eee0
MR		 3015static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3016{
3017 struct sigmatel_spec *spec = codec->spec;
3018 int wcaps, nid, i, err = 0;
3019
3020 for (i = 0; i < spec->num_muxes; i++) {
3021 nid = spec->mux_nids[i];
3022 wcaps = get_wcaps(codec, nid);
3023
3024 if (wcaps & AC_WCAP_OUT_AMP) {
3025 err = stac92xx_add_control_idx(spec,
3026 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3027 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3028 if (err < 0)
3029 return err;
3030 }
3031 }
3032 return 0;
3033};
3034
d9737751
MR		 3035static const char *stac92xx_spdif_labels[3] = {
3036 "Digital Playback", "Analog Mux 1", "Analog Mux 2"
3037};
3038
3039static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3040{
3041 struct sigmatel_spec *spec = codec->spec;
3042 struct hda_input_mux *spdif_mux = &spec->private_smux;
3043 int i, num_cons;
3044 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_spdif_labels)];
3045
3046 num_cons = snd_hda_get_connections(codec,
3047 spec->smux_nids[0],
3048 con_lst,
3049 HDA_MAX_NUM_INPUTS);
3050 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_spdif_labels))
3051 return -EINVAL;
3052
3053 for (i = 0; i < num_cons; i++) {
3054 spdif_mux->items[spdif_mux->num_items].label =
3055 stac92xx_spdif_labels[i];
3056 spdif_mux->items[spdif_mux->num_items].index = i;
3057 spdif_mux->num_items++;
3058 }
3059
3060 return 0;
3061}
3062
8b65727b 3063/* labels for dmic mux inputs */
ddc2cec4 3064static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3065 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3066 "Digital Mic 3", "Digital Mic 4"
3067};
3068
3069/* create playback/capture controls for input pins on dmic capable codecs */
3070static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3071 const struct auto_pin_cfg *cfg)
3072{
3073 struct sigmatel_spec *spec = codec->spec;
3074 struct hda_input_mux *dimux = &spec->private_dimux;
3075 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3076 int err, i, j;
3077 char name[32];
8b65727b
MP		 3078
3079 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3080 dimux->items[dimux->num_items].index = 0;
3081 dimux->num_items++;
3082
3083 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3084 hda_nid_t nid;
8b65727b
MP		 3085 int index;
3086 int num_cons;
0678accd 3087 unsigned int wcaps;
8b65727b
MP		 3088 unsigned int def_conf;
3089
3090 def_conf = snd_hda_codec_read(codec,
3091 spec->dmic_nids[i],
3092 0,
3093 AC_VERB_GET_CONFIG_DEFAULT,
3094 0);
3095 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3096 continue;
3097
0678accd 3098 nid = spec->dmic_nids[i];
8b65727b 3099 num_cons = snd_hda_get_connections(codec,
e1f0d669 3100 spec->dmux_nids[0],
8b65727b
MP		 3101 con_lst,
3102 HDA_MAX_NUM_INPUTS);
3103 for (j = 0; j < num_cons; j++)
0678accd 3104 if (con_lst[j] == nid) {
8b65727b
MP		 3105 index = j;
3106 goto found;
3107 }
3108 continue;
3109found:
d0513fc6
MR		 3110 wcaps = get_wcaps(codec, nid) &
3111 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3112
d0513fc6 3113 if (wcaps) {
0678accd
MR		 3114 sprintf(name, "%s Capture Volume",
3115 stac92xx_dmic_labels[dimux->num_items]);
3116
3117 err = stac92xx_add_control(spec,
3118 STAC_CTL_WIDGET_VOL,
3119 name,
d0513fc6
MR		 3120 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3121 (wcaps & AC_WCAP_OUT_AMP) ?
3122 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3123 if (err < 0)
3124 return err;
3125 }
3126
8b65727b
MP		 3127 dimux->items[dimux->num_items].label =
3128 stac92xx_dmic_labels[dimux->num_items];
3129 dimux->items[dimux->num_items].index = index;
3130 dimux->num_items++;
3131 }
3132
3133 return 0;
3134}
3135
c7d4b2fa
M		 3136/* create playback/capture controls for input pins */
3137static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3138{
3139 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3140 struct hda_input_mux *imux = &spec->private_imux;
3141 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3142 int i, j, k;
3143
3144 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3145 int index;
3146
3147 if (!cfg->input_pins[i])
3148 continue;
3149 index = -1;
3150 for (j = 0; j < spec->num_muxes; j++) {
3151 int num_cons;
3152 num_cons = snd_hda_get_connections(codec,
3153 spec->mux_nids[j],
3154 con_lst,
3155 HDA_MAX_NUM_INPUTS);
3156 for (k = 0; k < num_cons; k++)
3157 if (con_lst[k] == cfg->input_pins[i]) {
3158 index = k;
3159 goto found;
3160 }
c7d4b2fa 3161 }
314634bc
TI		 3162 continue;
3163 found:
3164 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3165 imux->items[imux->num_items].index = index;
3166 imux->num_items++;
c7d4b2fa
M		 3167 }
3168
7b043899 3169 if (imux->num_items) {
62fe78e9
SR		 3170 /*
3171 * Set the current input for the muxes.
3172 * The STAC9221 has two input muxes with identical source
3173 * NID lists. Hopefully this won't get confused.
3174 */
3175 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3176 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3177 AC_VERB_SET_CONNECT_SEL,
3178 imux->items[0].index);
62fe78e9
SR		 3179 }
3180 }
3181
c7d4b2fa
M		 3182 return 0;
3183}
3184
c7d4b2fa
M		 3185static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3186{
3187 struct sigmatel_spec *spec = codec->spec;
3188 int i;
3189
3190 for (i = 0; i < spec->autocfg.line_outs; i++) {
3191 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3192 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3193 }
3194}
3195
3196static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3197{
3198 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3199 int i;
c7d4b2fa 3200
eb06ed8f
TI		 3201 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3202 hda_nid_t pin;
3203 pin = spec->autocfg.hp_pins[i];
3204 if (pin) /* connect to front */
3205 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3206 }
3207 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3208 hda_nid_t pin;
3209 pin = spec->autocfg.speaker_pins[i];
3210 if (pin) /* connect to front */
3211 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3212 }
c7d4b2fa
M		 3213}
3214
3cc08dc6 3215static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3216{
3217 struct sigmatel_spec *spec = codec->spec;
3218 int err;
bcecd9bd 3219 int hp_speaker_swap = 0;
c7d4b2fa 3220
8b65727b
MP		 3221 if ((err = snd_hda_parse_pin_def_config(codec,
3222 &spec->autocfg,
3223 spec->dmic_nids)) < 0)
c7d4b2fa 3224 return err;
82bc955f 3225 if (! spec->autocfg.line_outs)
869264c4 3226 return 0; /* can't find valid pin config */
19039bd0 3227
bcecd9bd
JZ		 3228 /* If we have no real line-out pin and multiple hp-outs, HPs should
3229 * be set up as multi-channel outputs.
3230 */
3231 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3232 spec->autocfg.hp_outs > 1) {
3233 /* Copy hp_outs to line_outs, backup line_outs in
3234 * speaker_outs so that the following routines can handle
3235 * HP pins as primary outputs.
3236 */
3237 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3238 sizeof(spec->autocfg.line_out_pins));
3239 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3240 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3241 sizeof(spec->autocfg.hp_pins));
3242 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3243 hp_speaker_swap = 1;
3244 }
09a99959 3245 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3246 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3247 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3248 u32 caps = query_amp_caps(codec,
3249 spec->autocfg.mono_out_pin, dir);
3250 hda_nid_t conn_list[1];
3251
3252 /* get the mixer node and then the mono mux if it exists */
3253 if (snd_hda_get_connections(codec,
3254 spec->autocfg.mono_out_pin, conn_list, 1) &&
3255 snd_hda_get_connections(codec, conn_list[0],
3256 conn_list, 1)) {
3257
3258 int wcaps = get_wcaps(codec, conn_list[0]);
3259 int wid_type = (wcaps & AC_WCAP_TYPE)
3260 >> AC_WCAP_TYPE_SHIFT;
3261 /* LR swap check, some stac925x have a mux that
3262 * changes the DACs output path instead of the
3263 * mono-mux path.
3264 */
3265 if (wid_type == AC_WID_AUD_SEL &&
3266 !(wcaps & AC_WCAP_LR_SWAP))
3267 spec->mono_nid = conn_list[0];
3268 }
d0513fc6
MR		 3269 if (dir) {
3270 hda_nid_t nid = spec->autocfg.mono_out_pin;
3271
3272 /* most mono outs have a least a mute/unmute switch */
3273 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3274 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3275 "Mono Playback Switch",
3276 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3277 if (err < 0)
3278 return err;
d0513fc6
MR		 3279 /* check for volume support for the amp */
3280 if ((caps & AC_AMPCAP_NUM_STEPS)
3281 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3282 err = stac92xx_add_control(spec,
3283 STAC_CTL_WIDGET_VOL,
3284 "Mono Playback Volume",
3285 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3286 if (err < 0)
3287 return err;
3288 }
09a99959
MR		 3289 }
3290
3291 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3292 AC_PINCTL_OUT_EN);
3293 }
bcecd9bd 3294
403d1944
MP		 3295 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3296 return err;
19039bd0
TI		 3297 if (spec->multiout.num_dacs == 0)
3298 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3299 return err;
c7d4b2fa 3300
0fb87bb4
ML		 3301 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3302
3303 if (err < 0)
3304 return err;
3305
1cd2224c
MR		 3306 /* setup analog beep controls */
3307 if (spec->anabeep_nid > 0) {
3308 err = stac92xx_auto_create_beep_ctls(codec,
3309 spec->anabeep_nid);
3310 if (err < 0)
3311 return err;
3312 }
3313
3314 /* setup digital beep controls and input device */
3315#ifdef CONFIG_SND_HDA_INPUT_BEEP
3316 if (spec->digbeep_nid > 0) {
3317 hda_nid_t nid = spec->digbeep_nid;
3318
3319 err = stac92xx_auto_create_beep_ctls(codec, nid);
3320 if (err < 0)
3321 return err;
3322 err = snd_hda_attach_beep_device(codec, nid);
3323 if (err < 0)
3324 return err;
3325 }
3326#endif
3327
bcecd9bd
JZ		 3328 if (hp_speaker_swap == 1) {
3329 /* Restore the hp_outs and line_outs */
3330 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3331 sizeof(spec->autocfg.line_out_pins));
3332 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3333 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3334 sizeof(spec->autocfg.speaker_pins));
3335 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3336 memset(spec->autocfg.speaker_pins, 0,
3337 sizeof(spec->autocfg.speaker_pins));
3338 spec->autocfg.speaker_outs = 0;
3339 }
3340
0fb87bb4
ML		 3341 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3342
3343 if (err < 0)
3344 return err;
3345
3346 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3347
3348 if (err < 0)
c7d4b2fa
M		 3349 return err;
3350
b22b4821
MR		 3351 if (spec->mono_nid > 0) {
3352 err = stac92xx_auto_create_mono_output_ctls(codec);
3353 if (err < 0)
3354 return err;
3355 }
2a9c7816 3356 if (spec->num_amps > 0) {
89385035
MR		 3357 err = stac92xx_auto_create_amp_output_ctls(codec);
3358 if (err < 0)
3359 return err;
3360 }
2a9c7816 3361 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3362 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3363 &spec->autocfg)) < 0)
3364 return err;
4682eee0
MR		 3365 if (spec->num_muxes > 0) {
3366 err = stac92xx_auto_create_mux_input_ctls(codec);
3367 if (err < 0)
3368 return err;
3369 }
d9737751
MR		 3370 if (spec->num_smuxes > 0) {
3371 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3372 if (err < 0)
3373 return err;
3374 }
8b65727b 3375
c7d4b2fa 3376 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3377 if (spec->multiout.max_channels > 2)
c7d4b2fa 3378 spec->surr_switch = 1;
c7d4b2fa 3379
82bc955f 3380 if (spec->autocfg.dig_out_pin)
3cc08dc6 3381 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3382 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3383 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3384
3385 if (spec->kctl_alloc)
3386 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3387
3388 spec->input_mux = &spec->private_imux;
2a9c7816 3389 spec->dinput_mux = &spec->private_dimux;
d9737751 3390 spec->sinput_mux = &spec->private_smux;
b22b4821 3391 spec->mono_mux = &spec->private_mono_mux;
89385035 3392 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3393 return 1;
3394}
3395
82bc955f
TI		 3396/* add playback controls for HP output */
3397static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3398 struct auto_pin_cfg *cfg)
3399{
3400 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3401 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3402 unsigned int wid_caps;
3403
3404 if (! pin)
3405 return 0;
3406
3407 wid_caps = get_wcaps(codec, pin);
505cb341 3408 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3409 spec->hp_detect = 1;
82bc955f
TI		 3410
3411 return 0;
3412}
3413
160ea0dc
RF		 3414/* add playback controls for LFE output */
3415static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3416 struct auto_pin_cfg *cfg)
3417{
3418 struct sigmatel_spec *spec = codec->spec;
3419 int err;
3420 hda_nid_t lfe_pin = 0x0;
3421 int i;
3422
3423 /*
3424 * search speaker outs and line outs for a mono speaker pin
3425 * with an amp. If one is found, add LFE controls
3426 * for it.
3427 */
3428 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3429 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3430 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3431 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3432 if (wcaps == AC_WCAP_OUT_AMP)
3433 /* found a mono speaker with an amp, must be lfe */
3434 lfe_pin = pin;
3435 }
3436
3437 /* if speaker_outs is 0, then speakers may be in line_outs */
3438 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3439 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3440 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3441 unsigned int defcfg;
8b551785 3442 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3443 AC_VERB_GET_CONFIG_DEFAULT,
3444 0x00);
8b551785 3445 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3446 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3447 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3448 if (wcaps == AC_WCAP_OUT_AMP)
3449 /* found a mono speaker with an amp,
3450 must be lfe */
3451 lfe_pin = pin;
3452 }
3453 }
3454 }
3455
3456 if (lfe_pin) {
eb06ed8f 3457 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3458 if (err < 0)
3459 return err;
3460 }
3461
3462 return 0;
3463}
3464
c7d4b2fa
M		 3465static int stac9200_parse_auto_config(struct hda_codec *codec)
3466{
3467 struct sigmatel_spec *spec = codec->spec;
3468 int err;
3469
df694daa 3470 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3471 return err;
3472
3473 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3474 return err;
3475
82bc955f
TI		 3476 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3477 return err;
3478
160ea0dc
RF		 3479 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3480 return err;
3481
82bc955f 3482 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3483 spec->multiout.dig_out_nid = 0x05;
82bc955f 3484 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3485 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3486
3487 if (spec->kctl_alloc)
3488 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3489
3490 spec->input_mux = &spec->private_imux;
8b65727b 3491 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3492
3493 return 1;
3494}
3495
62fe78e9
SR		 3496/*
3497 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3498 * funky external mute control using GPIO pins.
3499 */
3500
76e1ddfb 3501static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3502 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3503{
3504 unsigned int gpiostate, gpiomask, gpiodir;
3505
3506 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3507 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3508 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3509
3510 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3511 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3512 gpiomask |= mask;
62fe78e9
SR		 3513
3514 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3515 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3516 gpiodir |= dir_mask;
62fe78e9 3517
76e1ddfb 3518 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3519 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3520
3521 snd_hda_codec_write(codec, codec->afg, 0,
3522 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3523 snd_hda_codec_read(codec, codec->afg, 0,
3524 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3525
3526 msleep(1);
3527
76e1ddfb
TI		 3528 snd_hda_codec_read(codec, codec->afg, 0,
3529 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3530}
3531
314634bc
TI		 3532static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3533 unsigned int event)
3534{
3535 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3536 snd_hda_codec_write_cache(codec, nid, 0,
3537 AC_VERB_SET_UNSOLICITED_ENABLE,
3538 (AC_USRSP_EN | event));
314634bc
TI		 3539}
3540
a64135a2
MR		 3541static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3542{
3543 int i;
3544 for (i = 0; i < cfg->hp_outs; i++)
3545 if (cfg->hp_pins[i] == nid)
3546 return 1; /* nid is a HP-Out */
3547
3548 return 0; /* nid is not a HP-Out */
3549};
3550
b76c850f
MR		 3551static void stac92xx_power_down(struct hda_codec *codec)
3552{
3553 struct sigmatel_spec *spec = codec->spec;
3554
3555 /* power down inactive DACs */
3556 hda_nid_t *dac;
3557 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3558 if (!is_in_dac_nids(spec, *dac) &&
3559 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3560 snd_hda_codec_write_cache(codec, *dac, 0,
3561 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3562}
3563
c7d4b2fa
M		 3564static int stac92xx_init(struct hda_codec *codec)
3565{
3566 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3567 struct auto_pin_cfg *cfg = &spec->autocfg;
3568 int i;
c7d4b2fa 3569
c7d4b2fa
M		 3570 snd_hda_sequence_write(codec, spec->init);
3571
8daaaa97
MR		 3572 /* power down adcs initially */
3573 if (spec->powerdown_adcs)
3574 for (i = 0; i < spec->num_adcs; i++)
3575 snd_hda_codec_write_cache(codec,
3576 spec->adc_nids[i], 0,
3577 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3578 /* set up pins */
3579 if (spec->hp_detect) {
505cb341 3580 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3581 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3582 enable_pin_detect(codec, cfg->hp_pins[i],
3583 STAC_HP_EVENT);
0a07acaf
TI		 3584 /* force to enable the first line-out; the others are set up
3585 * in unsol_event
3586 */
3587 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3588 AC_PINCTL_OUT_EN);
eb995a8c 3589 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3590 /* fake event to set up pins */
3591 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3592 } else {
3593 stac92xx_auto_init_multi_out(codec);
3594 stac92xx_auto_init_hp_out(codec);
3595 }
3596 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3597 hda_nid_t nid = cfg->input_pins[i];
3598 if (nid) {
3599 unsigned int pinctl = AC_PINCTL_IN_EN;
3600 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3601 pinctl |= stac92xx_get_vref(codec, nid);
3602 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3603 }
82bc955f 3604 }
a64135a2
MR		 3605 for (i = 0; i < spec->num_dmics; i++)
3606 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3607 AC_PINCTL_IN_EN);
3608 for (i = 0; i < spec->num_pwrs; i++) {
3609 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3610 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3611 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3612 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3613 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3614 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3615 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3616 /* outputs are only ports capable of power management
3617 * any attempts on powering down a input port cause the
3618 * referenced VREF to act quirky.
3619 */
3620 if (pinctl & AC_PINCTL_IN_EN)
3621 continue;
aafc4412
MR		 3622 /* skip any ports that don't have jacks since presence
3623 * detection is useless */
3624 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3625 continue;
a64135a2
MR		 3626 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3627 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3628 }
b76c850f
MR		 3629 if (spec->dac_list)
3630 stac92xx_power_down(codec);
82bc955f
TI		 3631 if (cfg->dig_out_pin)
3632 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3633 AC_PINCTL_OUT_EN);
3634 if (cfg->dig_in_pin)
3635 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3636 AC_PINCTL_IN_EN);
3637
4fe5195c
MR		 3638 stac_gpio_set(codec, spec->gpio_mask,
3639 spec->gpio_dir, spec->gpio_data);
62fe78e9 3640
c7d4b2fa
M		 3641 return 0;
3642}
3643
2f2f4251
M		 3644static void stac92xx_free(struct hda_codec *codec)
3645{
c7d4b2fa
M		 3646 struct sigmatel_spec *spec = codec->spec;
3647 int i;
3648
3649 if (! spec)
3650 return;
3651
3652 if (spec->kctl_alloc) {
3653 for (i = 0; i < spec->num_kctl_used; i++)
3654 kfree(spec->kctl_alloc[i].name);
3655 kfree(spec->kctl_alloc);
3656 }
3657
11b44bbd
RF		 3658 if (spec->bios_pin_configs)
3659 kfree(spec->bios_pin_configs);
3660
c7d4b2fa 3661 kfree(spec);
1cd2224c 3662 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3663}
3664
4e55096e
M		 3665static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3666 unsigned int flag)
3667{
3668 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3669 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3670
f9acba43
TI		 3671 if (pin_ctl & AC_PINCTL_IN_EN) {
3672 /*
3673 * we need to check the current set-up direction of
3674 * shared input pins since they can be switched via
3675 * "xxx as Output" mixer switch
3676 */
3677 struct sigmatel_spec *spec = codec->spec;
3678 struct auto_pin_cfg *cfg = &spec->autocfg;
3679 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3680 spec->line_switch) ||
3681 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3682 spec->mic_switch))
3683 return;
3684 }
3685
7b043899
SL		 3686 /* if setting pin direction bits, clear the current
3687 direction bits first */
3688 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3689 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3690
82beb8fd 3691 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3692 AC_VERB_SET_PIN_WIDGET_CONTROL,
3693 pin_ctl | flag);
3694}
3695
3696static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3697 unsigned int flag)
3698{
3699 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3700 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3701 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3702 AC_VERB_SET_PIN_WIDGET_CONTROL,
3703 pin_ctl & ~flag);
3704}
3705
40c1d308 3706static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3707{
3708 if (!nid)
3709 return 0;
3710 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3711 & (1 << 31)) {
3712 unsigned int pinctl;
3713 pinctl = snd_hda_codec_read(codec, nid, 0,
3714 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3715 if (pinctl & AC_PINCTL_IN_EN)
3716 return 0; /* mic- or line-input */
3717 else
3718 return 1; /* HP-output */
3719 }
314634bc
TI		 3720 return 0;
3721}
3722
3723static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3724{
3725 struct sigmatel_spec *spec = codec->spec;
3726 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3727 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3728 int i, presence;
3729
eb06ed8f 3730 presence = 0;
4fe5195c
MR		 3731 if (spec->gpio_mute)
3732 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3733 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3734
eb06ed8f 3735 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3736 if (presence)
3737 break;
7c2ba97b
MR		 3738 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3739 break;
4fe5195c 3740 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3741 }
4e55096e
M		 3742
3743 if (presence) {
3744 /* disable lineouts, enable hp */
7c2ba97b
MR		 3745 if (spec->hp_switch)
3746 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3747 for (i = 0; i < cfg->line_outs; i++)
3748 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3749 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3750 for (i = 0; i < cfg->speaker_outs; i++)
3751 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3752 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3753 if (spec->eapd_mask)
3754 stac_gpio_set(codec, spec->gpio_mask,
3755 spec->gpio_dir, spec->gpio_data &
3756 ~spec->eapd_mask);
4e55096e
M		 3757 } else {
3758 /* enable lineouts, disable hp */
7c2ba97b
MR		 3759 if (spec->hp_switch)
3760 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3761 for (i = 0; i < cfg->line_outs; i++)
3762 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3763 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3764 for (i = 0; i < cfg->speaker_outs; i++)
3765 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3766 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3767 if (spec->eapd_mask)
3768 stac_gpio_set(codec, spec->gpio_mask,
3769 spec->gpio_dir, spec->gpio_data |
3770 spec->eapd_mask);
4e55096e 3771 }
7c2ba97b
MR		 3772 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3773 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3774}
3775
a64135a2
MR		 3776static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3777{
3778 struct sigmatel_spec *spec = codec->spec;
3779 hda_nid_t nid = spec->pwr_nids[idx];
3780 int presence, val;
3781 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3782 & 0x000000ff;
3783 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3784
3785 /* several codecs have two power down bits */
3786 if (spec->pwr_mapping)
3787 idx = spec->pwr_mapping[idx];
3788 else
3789 idx = 1 << idx;
a64135a2
MR		 3790
3791 if (presence)
3792 val &= ~idx;
3793 else
3794 val |= idx;
3795
3796 /* power down unused output ports */
3797 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3798};
3799
314634bc
TI		 3800static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3801{
a64135a2
MR		 3802 struct sigmatel_spec *spec = codec->spec;
3803 int idx = res >> 26 & 0x0f;
3804
3805 switch ((res >> 26) & 0x30) {
314634bc
TI		 3806 case STAC_HP_EVENT:
3807 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3808 /* fallthru */
3809 case STAC_PWR_EVENT:
3810 if (spec->num_pwrs > 0)
3811 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3812 }
3813}
3814
cb53c626 3815#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3816static int stac92xx_resume(struct hda_codec *codec)
3817{
dc81bed1
TI		 3818 struct sigmatel_spec *spec = codec->spec;
3819
11b44bbd 3820 stac92xx_set_config_regs(codec);
dc81bed1 3821 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3822 stac_gpio_set(codec, spec->gpio_mask,
3823 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3824 snd_hda_codec_resume_amp(codec);
3825 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3826 /* power down inactive DACs */
3827 if (spec->dac_list)
3828 stac92xx_power_down(codec);
dc81bed1
TI		 3829 /* invoke unsolicited event to reset the HP state */
3830 if (spec->hp_detect)
3831 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3832 return 0;
3833}
3834#endif
3835
2f2f4251
M		 3836static struct hda_codec_ops stac92xx_patch_ops = {
3837 .build_controls = stac92xx_build_controls,
3838 .build_pcms = stac92xx_build_pcms,
3839 .init = stac92xx_init,
3840 .free = stac92xx_free,
4e55096e 3841 .unsol_event = stac92xx_unsol_event,
cb53c626 3842#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3843 .resume = stac92xx_resume,
3844#endif
2f2f4251
M		 3845};
3846
3847static int patch_stac9200(struct hda_codec *codec)
3848{
3849 struct sigmatel_spec *spec;
c7d4b2fa 3850 int err;
2f2f4251 3851
e560d8d8 3852 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3853 if (spec == NULL)
3854 return -ENOMEM;
3855
3856 codec->spec = spec;
a4eed138 3857 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3858 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3859 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3860 stac9200_models,
3861 stac9200_cfg_tbl);
11b44bbd
RF		 3862 if (spec->board_config < 0) {
3863 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3864 err = stac92xx_save_bios_config_regs(codec);
3865 if (err < 0) {
3866 stac92xx_free(codec);
3867 return err;
3868 }
3869 spec->pin_configs = spec->bios_pin_configs;
3870 } else {
403d1944
MP		 3871 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3872 stac92xx_set_config_regs(codec);
3873 }
2f2f4251
M		 3874
3875 spec->multiout.max_channels = 2;
3876 spec->multiout.num_dacs = 1;
3877 spec->multiout.dac_nids = stac9200_dac_nids;
3878 spec->adc_nids = stac9200_adc_nids;
3879 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3880 spec->num_muxes = 1;
8b65727b 3881 spec->num_dmics = 0;
9e05b7a3 3882 spec->num_adcs = 1;
a64135a2 3883 spec->num_pwrs = 0;
c7d4b2fa 3884
bf277785
TD		 3885 if (spec->board_config == STAC_9200_GATEWAY ||
3886 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3887 spec->init = stac9200_eapd_init;
3888 else
3889 spec->init = stac9200_core_init;
2f2f4251 3890 spec->mixer = stac9200_mixer;
c7d4b2fa 3891
117f257d
TI		 3892 if (spec->board_config == STAC_9200_PANASONIC) {
3893 spec->gpio_mask = spec->gpio_dir = 0x09;
3894 spec->gpio_data = 0x00;
3895 }
3896
c7d4b2fa
M		 3897 err = stac9200_parse_auto_config(codec);
3898 if (err < 0) {
3899 stac92xx_free(codec);
3900 return err;
3901 }
2f2f4251
M		 3902
3903 codec->patch_ops = stac92xx_patch_ops;
3904
3905 return 0;
3906}
3907
8e21c34c
TD		 3908static int patch_stac925x(struct hda_codec *codec)
3909{
3910 struct sigmatel_spec *spec;
3911 int err;
3912
3913 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3914 if (spec == NULL)
3915 return -ENOMEM;
3916
3917 codec->spec = spec;
a4eed138 3918 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3919 spec->pin_nids = stac925x_pin_nids;
3920 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3921 stac925x_models,
3922 stac925x_cfg_tbl);
9e507abd 3923 again:
8e21c34c 3924 if (spec->board_config < 0) {
2c11f955
TD		 3925 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3926 "using BIOS defaults\n");
8e21c34c
TD		 3927 err = stac92xx_save_bios_config_regs(codec);
3928 if (err < 0) {
3929 stac92xx_free(codec);
3930 return err;
3931 }
3932 spec->pin_configs = spec->bios_pin_configs;
3933 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3934 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3935 stac92xx_set_config_regs(codec);
3936 }
3937
3938 spec->multiout.max_channels = 2;
3939 spec->multiout.num_dacs = 1;
3940 spec->multiout.dac_nids = stac925x_dac_nids;
3941 spec->adc_nids = stac925x_adc_nids;
3942 spec->mux_nids = stac925x_mux_nids;
3943 spec->num_muxes = 1;
9e05b7a3 3944 spec->num_adcs = 1;
a64135a2 3945 spec->num_pwrs = 0;
2c11f955
TD		 3946 switch (codec->vendor_id) {
3947 case 0x83847632: /* STAC9202 */
3948 case 0x83847633: /* STAC9202D */
3949 case 0x83847636: /* STAC9251 */
3950 case 0x83847637: /* STAC9251D */
f6e9852a 3951 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3952 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3953 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3954 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3955 break;
3956 default:
3957 spec->num_dmics = 0;
3958 break;
3959 }
8e21c34c
TD		 3960
3961 spec->init = stac925x_core_init;
3962 spec->mixer = stac925x_mixer;
3963
3964 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3965 if (!err) {
3966 if (spec->board_config < 0) {
3967 printk(KERN_WARNING "hda_codec: No auto-config is "
3968 "available, default to model=ref\n");
3969 spec->board_config = STAC_925x_REF;
3970 goto again;
3971 }
3972 err = -EINVAL;
3973 }
8e21c34c
TD		 3974 if (err < 0) {
3975 stac92xx_free(codec);
3976 return err;
3977 }
3978
3979 codec->patch_ops = stac92xx_patch_ops;
3980
3981 return 0;
3982}
3983
e1f0d669
MR		 3984static struct hda_input_mux stac92hd73xx_dmux = {
3985 .num_items = 4,
3986 .items = {
3987 { "Analog Inputs", 0x0b },
e1f0d669
MR		 3988 { "Digital Mic 1", 0x09 },
3989 { "Digital Mic 2", 0x0a },
2a9c7816 3990 { "CD", 0x08 },
e1f0d669
MR		 3991 }
3992};
3993
3994static int patch_stac92hd73xx(struct hda_codec *codec)
3995{
3996 struct sigmatel_spec *spec;
3997 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3998 int err = 0;
3999
4000 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4001 if (spec == NULL)
4002 return -ENOMEM;
4003
4004 codec->spec = spec;
e99d32b3 4005 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4006 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4007 spec->pin_nids = stac92hd73xx_pin_nids;
4008 spec->board_config = snd_hda_check_board_config(codec,
4009 STAC_92HD73XX_MODELS,
4010 stac92hd73xx_models,
4011 stac92hd73xx_cfg_tbl);
4012again:
4013 if (spec->board_config < 0) {
4014 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4015 " STAC92HD73XX, using BIOS defaults\n");
4016 err = stac92xx_save_bios_config_regs(codec);
4017 if (err < 0) {
4018 stac92xx_free(codec);
4019 return err;
4020 }
4021 spec->pin_configs = spec->bios_pin_configs;
4022 } else {
4023 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4024 stac92xx_set_config_regs(codec);
4025 }
4026
4027 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4028 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4029
4030 if (spec->multiout.num_dacs < 0) {
4031 printk(KERN_WARNING "hda_codec: Could not determine "
4032 "number of channels defaulting to DAC count\n");
4033 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4034 }
4035
4036 switch (spec->multiout.num_dacs) {
4037 case 0x3: /* 6 Channel */
4038 spec->mixer = stac92hd73xx_6ch_mixer;
4039 spec->init = stac92hd73xx_6ch_core_init;
4040 break;
4041 case 0x4: /* 8 Channel */
e1f0d669
MR		 4042 spec->mixer = stac92hd73xx_8ch_mixer;
4043 spec->init = stac92hd73xx_8ch_core_init;
4044 break;
4045 case 0x5: /* 10 Channel */
e1f0d669
MR		 4046 spec->mixer = stac92hd73xx_10ch_mixer;
4047 spec->init = stac92hd73xx_10ch_core_init;
4048 };
4049
4050 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4051 spec->aloopback_mask = 0x01;
4052 spec->aloopback_shift = 8;
4053
1cd2224c 4054 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4055 spec->mux_nids = stac92hd73xx_mux_nids;
4056 spec->adc_nids = stac92hd73xx_adc_nids;
4057 spec->dmic_nids = stac92hd73xx_dmic_nids;
4058 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4059 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4060 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4061 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4062
4063 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4064 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4065 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4066 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4067 sizeof(stac92hd73xx_dmux));
4068
e1f0d669 4069 /* GPIO0 High = Enable EAPD */
0fc9dec4 4070 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4071 spec->gpio_data = 0x01;
e1f0d669 4072
a7662640
MR		 4073 switch (spec->board_config) {
4074 case STAC_DELL_M6:
d654a660 4075 spec->init = dell_eq_core_init;
2a9c7816
MR		 4076 spec->num_smuxes = 0;
4077 spec->multiout.hp_nid =
4078 spec->multiout.dac_nids[spec->multiout.num_dacs - 1];
4079 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4080 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4081 spec->num_amps = 1;
a7662640
MR		 4082 switch (codec->subsystem_id) {
4083 case 0x1028025e: /* Analog Mics */
4084 case 0x1028025f:
4085 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4086 spec->num_dmics = 0;
2a9c7816 4087 spec->private_dimux.num_items = 1;
a7662640 4088 break;
d654a660 4089 case 0x10280271: /* Digital Mics */
a7662640 4090 case 0x10280272:
d654a660
MR		 4091 spec->init = dell_m6_core_init;
4092 /* fall-through */
4093 case 0x10280254:
4094 case 0x10280255:
a7662640
MR		 4095 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4096 spec->num_dmics = 1;
2a9c7816 4097 spec->private_dimux.num_items = 2;
a7662640
MR		 4098 break;
4099 case 0x10280256: /* Both */
4100 case 0x10280057:
4101 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4102 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4103 spec->num_dmics = 1;
2a9c7816 4104 spec->private_dimux.num_items = 2;
a7662640
MR		 4105 break;
4106 }
4107 break;
4108 default:
4109 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4110 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4111 }
2a9c7816 4112 spec->dinput_mux = &spec->private_dimux;
a7662640 4113
a64135a2
MR		 4114 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4115 spec->pwr_nids = stac92hd73xx_pwr_nids;
4116
d9737751 4117 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4118
4119 if (!err) {
4120 if (spec->board_config < 0) {
4121 printk(KERN_WARNING "hda_codec: No auto-config is "
4122 "available, default to model=ref\n");
4123 spec->board_config = STAC_92HD73XX_REF;
4124 goto again;
4125 }
4126 err = -EINVAL;
4127 }
4128
4129 if (err < 0) {
4130 stac92xx_free(codec);
4131 return err;
4132 }
4133
4134 codec->patch_ops = stac92xx_patch_ops;
4135
4136 return 0;
4137}
4138
d0513fc6
MR		 4139static struct hda_input_mux stac92hd83xxx_dmux = {
4140 .num_items = 3,
4141 .items = {
4142 { "Analog Inputs", 0x03 },
4143 { "Digital Mic 1", 0x04 },
4144 { "Digital Mic 2", 0x05 },
4145 }
4146};
4147
4148static int patch_stac92hd83xxx(struct hda_codec *codec)
4149{
4150 struct sigmatel_spec *spec;
4151 int err;
4152
4153 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4154 if (spec == NULL)
4155 return -ENOMEM;
4156
4157 codec->spec = spec;
0ffa9807 4158 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4159 spec->mono_nid = 0x19;
4160 spec->digbeep_nid = 0x21;
4161 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4162 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4163 spec->adc_nids = stac92hd83xxx_adc_nids;
4164 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4165 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4166 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4167 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4168
4169 spec->init = stac92hd83xxx_core_init;
4170 switch (codec->vendor_id) {
4171 case 0x111d7605:
4172 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4173 break;
4174 default:
4175 spec->num_pwrs--;
4176 spec->init++; /* switch to config #2 */
4177 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4178 }
4179
4180 spec->mixer = stac92hd83xxx_mixer;
4181 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4182 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4183 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4184 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4185 spec->dinput_mux = &stac92hd83xxx_dmux;
4186 spec->pin_nids = stac92hd83xxx_pin_nids;
4187 spec->board_config = snd_hda_check_board_config(codec,
4188 STAC_92HD83XXX_MODELS,
4189 stac92hd83xxx_models,
4190 stac92hd83xxx_cfg_tbl);
4191again:
4192 if (spec->board_config < 0) {
4193 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4194 " STAC92HD83XXX, using BIOS defaults\n");
4195 err = stac92xx_save_bios_config_regs(codec);
4196 if (err < 0) {
4197 stac92xx_free(codec);
4198 return err;
4199 }
4200 spec->pin_configs = spec->bios_pin_configs;
4201 } else {
4202 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4203 stac92xx_set_config_regs(codec);
4204 }
4205
4206 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4207 if (!err) {
4208 if (spec->board_config < 0) {
4209 printk(KERN_WARNING "hda_codec: No auto-config is "
4210 "available, default to model=ref\n");
4211 spec->board_config = STAC_92HD83XXX_REF;
4212 goto again;
4213 }
4214 err = -EINVAL;
4215 }
4216
4217 if (err < 0) {
4218 stac92xx_free(codec);
4219 return err;
4220 }
4221
4222 codec->patch_ops = stac92xx_patch_ops;
4223
4224 return 0;
4225}
4226
8daaaa97
MR		 4227#ifdef SND_HDA_NEEDS_RESUME
4228static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4229{
4230 struct sigmatel_spec *spec = codec->spec;
4231 int i;
4232 snd_hda_codec_write_cache(codec, codec->afg, 0,
4233 AC_VERB_SET_POWER_STATE, pwr);
4234
4235 msleep(1);
4236 for (i = 0; i < spec->num_adcs; i++) {
4237 snd_hda_codec_write_cache(codec,
4238 spec->adc_nids[i], 0,
4239 AC_VERB_SET_POWER_STATE, pwr);
4240 }
4241};
4242
4243static int stac92hd71xx_resume(struct hda_codec *codec)
4244{
4245 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4246 return stac92xx_resume(codec);
4247}
4248
4249static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4250{
4251 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4252 return 0;
4253};
4254
4255#endif
4256
4257static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4258 .build_controls = stac92xx_build_controls,
4259 .build_pcms = stac92xx_build_pcms,
4260 .init = stac92xx_init,
4261 .free = stac92xx_free,
4262 .unsol_event = stac92xx_unsol_event,
4263#ifdef SND_HDA_NEEDS_RESUME
4264 .resume = stac92hd71xx_resume,
4265 .suspend = stac92hd71xx_suspend,
4266#endif
4267};
d0513fc6 4268
e035b841
MR		 4269static int patch_stac92hd71bxx(struct hda_codec *codec)
4270{
4271 struct sigmatel_spec *spec;
4272 int err = 0;
4273
4274 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4275 if (spec == NULL)
4276 return -ENOMEM;
4277
4278 codec->spec = spec;
8daaaa97 4279 codec->patch_ops = stac92xx_patch_ops;
e035b841 4280 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4281 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 4282 spec->pin_nids = stac92hd71bxx_pin_nids;
4283 spec->board_config = snd_hda_check_board_config(codec,
4284 STAC_92HD71BXX_MODELS,
4285 stac92hd71bxx_models,
4286 stac92hd71bxx_cfg_tbl);
4287again:
4288 if (spec->board_config < 0) {
4289 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4290 " STAC92HD71BXX, using BIOS defaults\n");
4291 err = stac92xx_save_bios_config_regs(codec);
4292 if (err < 0) {
4293 stac92xx_free(codec);
4294 return err;
4295 }
4296 spec->pin_configs = spec->bios_pin_configs;
4297 } else {
4298 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4299 stac92xx_set_config_regs(codec);
4300 }
4301
541eee87
MR		 4302 switch (codec->vendor_id) {
4303 case 0x111d76b6: /* 4 Port without Analog Mixer */
4304 case 0x111d76b7:
4305 case 0x111d76b4: /* 6 Port without Analog Mixer */
4306 case 0x111d76b5:
4307 spec->mixer = stac92hd71bxx_mixer;
4308 spec->init = stac92hd71bxx_core_init;
0ffa9807 4309 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4310 break;
aafc4412 4311 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97
MR		 4312 if ((codec->revision_id & 0xf) == 0 ||
4313 (codec->revision_id & 0xf) == 1) {
4314#ifdef SND_HDA_NEEDS_RESUME
4315 codec->patch_ops = stac92hd71bxx_patch_ops;
4316#endif
4317 spec->stream_delay = 40; /* 40 milliseconds */
4318 }
4319
aafc4412
MR		 4320 /* no output amps */
4321 spec->num_pwrs = 0;
4322 spec->mixer = stac92hd71bxx_analog_mixer;
4323
4324 /* disable VSW */
4325 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4326 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4327 break;
4328 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4329 if ((codec->revision_id & 0xf) == 1) {
4330#ifdef SND_HDA_NEEDS_RESUME
4331 codec->patch_ops = stac92hd71bxx_patch_ops;
4332#endif
4333 spec->stream_delay = 40; /* 40 milliseconds */
4334 }
4335
aafc4412
MR		 4336 /* no output amps */
4337 spec->num_pwrs = 0;
4338 /* fallthru */
541eee87
MR		 4339 default:
4340 spec->mixer = stac92hd71bxx_analog_mixer;
4341 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4342 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4343 }
4344
4345 spec->aloopback_mask = 0x20;
4346 spec->aloopback_shift = 0;
4347
4fe5195c 4348 /* GPIO0 High = EAPD */
0fc9dec4
MR		 4349 spec->gpio_mask = 0x01;
4350 spec->gpio_dir = 0x01;
0fc9dec4 4351 spec->gpio_data = 0x01;
e035b841 4352
8daaaa97 4353 spec->powerdown_adcs = 1;
1cd2224c 4354 spec->digbeep_nid = 0x26;
e035b841
MR		 4355 spec->mux_nids = stac92hd71bxx_mux_nids;
4356 spec->adc_nids = stac92hd71bxx_adc_nids;
4357 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4358 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4359 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4360 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4361
4362 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4363 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
1697055e 4364 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 4365
6a14f585
MR		 4366 switch (spec->board_config) {
4367 case STAC_HP_M4:
4368 spec->num_dmics = 0;
4369 spec->num_smuxes = 1;
4370 spec->num_dmuxes = 0;
4371
4372 /* enable internal microphone */
4373 snd_hda_codec_write_cache(codec, 0x0e, 0,
4374 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80);
4375 break;
4376 default:
4377 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4378 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4379 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4380 };
4381
aea7bb0a 4382 spec->multiout.num_dacs = 1;
e035b841
MR		 4383 spec->multiout.hp_nid = 0x11;
4384 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4385
4386 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4387 if (!err) {
4388 if (spec->board_config < 0) {
4389 printk(KERN_WARNING "hda_codec: No auto-config is "
4390 "available, default to model=ref\n");
4391 spec->board_config = STAC_92HD71BXX_REF;
4392 goto again;
4393 }
4394 err = -EINVAL;
4395 }
4396
4397 if (err < 0) {
4398 stac92xx_free(codec);
4399 return err;
4400 }
4401
e035b841
MR		 4402 return 0;
4403};
4404
2f2f4251
M		 4405static int patch_stac922x(struct hda_codec *codec)
4406{
4407 struct sigmatel_spec *spec;
c7d4b2fa 4408 int err;
2f2f4251 4409
e560d8d8 4410 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4411 if (spec == NULL)
4412 return -ENOMEM;
4413
4414 codec->spec = spec;
a4eed138 4415 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4416 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4417 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4418 stac922x_models,
4419 stac922x_cfg_tbl);
536319af 4420 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4421 spec->gpio_mask = spec->gpio_dir = 0x03;
4422 spec->gpio_data = 0x03;
3fc24d85
TI		 4423 /* Intel Macs have all same PCI SSID, so we need to check
4424 * codec SSID to distinguish the exact models
4425 */
6f0778d8 4426 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4427 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4428
4429 case 0x106b0800:
4430 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4431 break;
5d5d3bc3
IZ		 4432 case 0x106b0600:
4433 case 0x106b0700:
4434 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4435 break;
5d5d3bc3
IZ		 4436 case 0x106b0e00:
4437 case 0x106b0f00:
4438 case 0x106b1600:
4439 case 0x106b1700:
4440 case 0x106b0200:
4441 case 0x106b1e00:
4442 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4443 break;
5d5d3bc3
IZ		 4444 case 0x106b1a00:
4445 case 0x00000100:
4446 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4447 break;
5d5d3bc3
IZ		 4448 case 0x106b0a00:
4449 case 0x106b2200:
4450 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4451 break;
536319af
NB		 4452 default:
4453 spec->board_config = STAC_INTEL_MAC_V3;
4454 break;
3fc24d85
TI		 4455 }
4456 }
4457
9e507abd 4458 again:
11b44bbd
RF		 4459 if (spec->board_config < 0) {
4460 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4461 "using BIOS defaults\n");
4462 err = stac92xx_save_bios_config_regs(codec);
4463 if (err < 0) {
4464 stac92xx_free(codec);
4465 return err;
4466 }
4467 spec->pin_configs = spec->bios_pin_configs;
4468 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4469 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4470 stac92xx_set_config_regs(codec);
4471 }
2f2f4251 4472
c7d4b2fa
M		 4473 spec->adc_nids = stac922x_adc_nids;
4474 spec->mux_nids = stac922x_mux_nids;
2549413e 4475 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4476 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4477 spec->num_dmics = 0;
a64135a2 4478 spec->num_pwrs = 0;
c7d4b2fa
M		 4479
4480 spec->init = stac922x_core_init;
2f2f4251 4481 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4482
4483 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4484
3cc08dc6 4485 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4486 if (!err) {
4487 if (spec->board_config < 0) {
4488 printk(KERN_WARNING "hda_codec: No auto-config is "
4489 "available, default to model=ref\n");
4490 spec->board_config = STAC_D945_REF;
4491 goto again;
4492 }
4493 err = -EINVAL;
4494 }
3cc08dc6
MP		 4495 if (err < 0) {
4496 stac92xx_free(codec);
4497 return err;
4498 }
4499
4500 codec->patch_ops = stac92xx_patch_ops;
4501
807a4636
TI		 4502 /* Fix Mux capture level; max to 2 */
4503 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4504 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4505 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4506 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4507 (0 << AC_AMPCAP_MUTE_SHIFT));
4508
3cc08dc6
MP		 4509 return 0;
4510}
4511
4512static int patch_stac927x(struct hda_codec *codec)
4513{
4514 struct sigmatel_spec *spec;
4515 int err;
4516
4517 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4518 if (spec == NULL)
4519 return -ENOMEM;
4520
4521 codec->spec = spec;
a4eed138 4522 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4523 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4524 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4525 stac927x_models,
4526 stac927x_cfg_tbl);
9e507abd 4527 again:
8e9068b1
MR		 4528 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4529 if (spec->board_config < 0)
4530 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4531 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4532 err = stac92xx_save_bios_config_regs(codec);
4533 if (err < 0) {
4534 stac92xx_free(codec);
4535 return err;
4536 }
4537 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4538 } else {
3cc08dc6
MP		 4539 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4540 stac92xx_set_config_regs(codec);
4541 }
4542
1cd2224c 4543 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4544 spec->adc_nids = stac927x_adc_nids;
4545 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4546 spec->mux_nids = stac927x_mux_nids;
4547 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4548 spec->smux_nids = stac927x_smux_nids;
4549 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
b76c850f 4550 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4551 spec->multiout.dac_nids = spec->dac_nids;
4552
81d3dbde 4553 switch (spec->board_config) {
93ed1503 4554 case STAC_D965_3ST:
93ed1503 4555 case STAC_D965_5ST:
8e9068b1 4556 /* GPIO0 High = Enable EAPD */
0fc9dec4 4557 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4558 spec->gpio_data = 0x01;
8e9068b1
MR		 4559 spec->num_dmics = 0;
4560
93ed1503 4561 spec->init = d965_core_init;
9e05b7a3 4562 spec->mixer = stac927x_mixer;
81d3dbde 4563 break;
8e9068b1 4564 case STAC_DELL_BIOS:
780c8be4
MR		 4565 switch (codec->subsystem_id) {
4566 case 0x10280209:
4567 case 0x1028022e:
4568 /* correct the device field to SPDIF out */
4569 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4570 break;
4571 };
03d7ca17
MR		 4572 /* configure the analog microphone on some laptops */
4573 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4574 /* correct the front output jack as a hp out */
7989fba9 4575 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4576 /* correct the front input jack as a mic */
4577 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4578 /* fallthru */
8e9068b1
MR		 4579 case STAC_DELL_3ST:
4580 /* GPIO2 High = Enable EAPD */
0fc9dec4 4581 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4582 spec->gpio_data = 0x04;
7f16859a
MR		 4583 spec->dmic_nids = stac927x_dmic_nids;
4584 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4585
8e9068b1
MR		 4586 spec->init = d965_core_init;
4587 spec->mixer = stac927x_mixer;
4588 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4589 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4590 break;
4591 default:
f1f208d0 4592 /* GPIO0 High = Enable EAPD */
0fc9dec4 4593 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4594 spec->gpio_data = 0x01;
8e9068b1
MR		 4595 spec->num_dmics = 0;
4596
4597 spec->init = stac927x_core_init;
4598 spec->mixer = stac927x_mixer;
7f16859a
MR		 4599 }
4600
a64135a2 4601 spec->num_pwrs = 0;
e1f0d669
MR		 4602 spec->aloopback_mask = 0x40;
4603 spec->aloopback_shift = 0;
8e9068b1 4604
3cc08dc6 4605 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4606 if (!err) {
4607 if (spec->board_config < 0) {
4608 printk(KERN_WARNING "hda_codec: No auto-config is "
4609 "available, default to model=ref\n");
4610 spec->board_config = STAC_D965_REF;
4611 goto again;
4612 }
4613 err = -EINVAL;
4614 }
c7d4b2fa
M		 4615 if (err < 0) {
4616 stac92xx_free(codec);
4617 return err;
4618 }
2f2f4251
M		 4619
4620 codec->patch_ops = stac92xx_patch_ops;
4621
52987656
TI		 4622 /*
4623 * !!FIXME!!
4624 * The STAC927x seem to require fairly long delays for certain
4625 * command sequences. With too short delays (even if the answer
4626 * is set to RIRB properly), it results in the silence output
4627 * on some hardwares like Dell.
4628 *
4629 * The below flag enables the longer delay (see get_response
4630 * in hda_intel.c).
4631 */
4632 codec->bus->needs_damn_long_delay = 1;
4633
2f2f4251
M		 4634 return 0;
4635}
4636
f3302a59
MP		 4637static int patch_stac9205(struct hda_codec *codec)
4638{
4639 struct sigmatel_spec *spec;
8259980e 4640 int err;
f3302a59
MP		 4641
4642 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4643 if (spec == NULL)
4644 return -ENOMEM;
4645
4646 codec->spec = spec;
a4eed138 4647 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4648 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4649 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4650 stac9205_models,
4651 stac9205_cfg_tbl);
9e507abd 4652 again:
11b44bbd
RF		 4653 if (spec->board_config < 0) {
4654 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4655 err = stac92xx_save_bios_config_regs(codec);
4656 if (err < 0) {
4657 stac92xx_free(codec);
4658 return err;
4659 }
4660 spec->pin_configs = spec->bios_pin_configs;
4661 } else {
f3302a59
MP		 4662 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4663 stac92xx_set_config_regs(codec);
4664 }
4665
1cd2224c 4666 spec->digbeep_nid = 0x23;
f3302a59 4667 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4668 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4669 spec->mux_nids = stac9205_mux_nids;
2549413e 4670 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4671 spec->smux_nids = stac9205_smux_nids;
4672 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4673 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4674 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4675 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4676 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4677 spec->num_pwrs = 0;
f3302a59
MP		 4678
4679 spec->init = stac9205_core_init;
4680 spec->mixer = stac9205_mixer;
4681
e1f0d669
MR		 4682 spec->aloopback_mask = 0x40;
4683 spec->aloopback_shift = 0;
f3302a59 4684 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4685
ae0a8ed8 4686 switch (spec->board_config){
ae0a8ed8 4687 case STAC_9205_DELL_M43:
87d48363
MR		 4688 /* Enable SPDIF in/out */
4689 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4690 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4691
4fe5195c
MR		 4692 /* Enable unsol response for GPIO4/Dock HP connection */
4693 snd_hda_codec_write(codec, codec->afg, 0,
4694 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4695 snd_hda_codec_write_cache(codec, codec->afg, 0,
4696 AC_VERB_SET_UNSOLICITED_ENABLE,
4697 (AC_USRSP_EN | STAC_HP_EVENT));
4698
4699 spec->gpio_dir = 0x0b;
0fc9dec4 4700 spec->eapd_mask = 0x01;
4fe5195c
MR		 4701 spec->gpio_mask = 0x1b;
4702 spec->gpio_mute = 0x10;
e2e7d624 4703 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4704 * GPIO3 Low = DRM
87d48363 4705 */
4fe5195c 4706 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4707 break;
4708 default:
4709 /* GPIO0 High = EAPD */
0fc9dec4 4710 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4711 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4712 break;
4713 }
33382403 4714
f3302a59 4715 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4716 if (!err) {
4717 if (spec->board_config < 0) {
4718 printk(KERN_WARNING "hda_codec: No auto-config is "
4719 "available, default to model=ref\n");
4720 spec->board_config = STAC_9205_REF;
4721 goto again;
4722 }
4723 err = -EINVAL;
4724 }
f3302a59
MP		 4725 if (err < 0) {
4726 stac92xx_free(codec);
4727 return err;
4728 }
4729
4730 codec->patch_ops = stac92xx_patch_ops;
4731
4732 return 0;
4733}
4734
db064e50 4735/*
6d859065 4736 * STAC9872 hack
db064e50
TI		 4737 */
4738
99ccc560 4739/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4740static hda_nid_t vaio_dacs[] = { 0x2 };
4741#define VAIO_HP_DAC 0x5
4742static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4743static hda_nid_t vaio_mux_nids[] = { 0x15 };
4744
4745static struct hda_input_mux vaio_mux = {
a3a2f429 4746 .num_items = 3,
db064e50 4747 .items = {
d773781c 4748 /* { "HP", 0x0 }, */
1624cb9a
TI		 4749 { "Mic Jack", 0x1 },
4750 { "Internal Mic", 0x2 },
db064e50
TI		 4751 { "PCM", 0x3 },
4752 }
4753};
4754
4755static struct hda_verb vaio_init[] = {
4756 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4757 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4758 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4759 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4760 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4761 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4762 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4763 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4764 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4765 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4766 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4767 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4768 {}
4769};
4770
6d859065
GM		 4771static struct hda_verb vaio_ar_init[] = {
4772 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4773 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4774 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4775 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4776/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4777 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4778 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4779 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4780 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4781/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4782 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4783 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4784 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4785 {}
4786};
4787
db064e50 4788/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4789static struct hda_bind_ctls vaio_bind_master_vol = {
4790 .ops = &snd_hda_bind_vol,
4791 .values = {
4792 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4793 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4794 0
4795 },
4796};
db064e50
TI		 4797
4798/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4799static struct hda_bind_ctls vaio_bind_master_sw = {
4800 .ops = &snd_hda_bind_sw,
4801 .values = {
4802 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4803 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4804 0,
4805 },
4806};
db064e50
TI		 4807
4808static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4809 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4810 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4811 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4812 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4813 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4814 {
4815 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4816 .name = "Capture Source",
4817 .count = 1,
4818 .info = stac92xx_mux_enum_info,
4819 .get = stac92xx_mux_enum_get,
4820 .put = stac92xx_mux_enum_put,
4821 },
4822 {}
4823};
4824
6d859065 4825static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4826 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4827 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4828 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4829 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4830 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4831 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4832 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4833 {
4834 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4835 .name = "Capture Source",
4836 .count = 1,
4837 .info = stac92xx_mux_enum_info,
4838 .get = stac92xx_mux_enum_get,
4839 .put = stac92xx_mux_enum_put,
4840 },
4841 {}
4842};
4843
4844static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4845 .build_controls = stac92xx_build_controls,
4846 .build_pcms = stac92xx_build_pcms,
4847 .init = stac92xx_init,
4848 .free = stac92xx_free,
cb53c626 4849#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4850 .resume = stac92xx_resume,
4851#endif
4852};
4853
72e7b0dd
TI		 4854static int stac9872_vaio_init(struct hda_codec *codec)
4855{
4856 int err;
4857
4858 err = stac92xx_init(codec);
4859 if (err < 0)
4860 return err;
4861 if (codec->patch_ops.unsol_event)
4862 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4863 return 0;
4864}
4865
4866static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4867{
40c1d308 4868 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4869 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4870 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4871 } else {
4872 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4873 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4874 }
4875}
4876
4877static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4878{
4879 switch (res >> 26) {
4880 case STAC_HP_EVENT:
4881 stac9872_vaio_hp_detect(codec, res);
4882 break;
4883 }
4884}
4885
4886static struct hda_codec_ops stac9872_vaio_patch_ops = {
4887 .build_controls = stac92xx_build_controls,
4888 .build_pcms = stac92xx_build_pcms,
4889 .init = stac9872_vaio_init,
4890 .free = stac92xx_free,
4891 .unsol_event = stac9872_vaio_unsol_event,
4892#ifdef CONFIG_PM
4893 .resume = stac92xx_resume,
4894#endif
4895};
4896
6d859065
GM		 4897enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4898 CXD9872RD_VAIO,
4899 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4900 STAC9872AK_VAIO,
4901 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4902 STAC9872K_VAIO,
4903 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4904 CXD9872AKD_VAIO,
4905 STAC_9872_MODELS,
4906};
4907
4908static const char *stac9872_models[STAC_9872_MODELS] = {
4909 [CXD9872RD_VAIO] = "vaio",
4910 [CXD9872AKD_VAIO] = "vaio-ar",
4911};
4912
4913static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4914 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4915 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4916 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4917 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4918 {}
4919};
4920
6d859065 4921static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4922{
4923 struct sigmatel_spec *spec;
4924 int board_config;
4925
f5fcc13c
TI		 4926 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4927 stac9872_models,
4928 stac9872_cfg_tbl);
db064e50
TI		 4929 if (board_config < 0)
4930 /* unknown config, let generic-parser do its job... */
4931 return snd_hda_parse_generic_codec(codec);
4932
4933 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4934 if (spec == NULL)
4935 return -ENOMEM;
4936
4937 codec->spec = spec;
4938 switch (board_config) {
6d859065
GM		 4939 case CXD9872RD_VAIO:
4940 case STAC9872AK_VAIO:
4941 case STAC9872K_VAIO:
db064e50
TI		 4942 spec->mixer = vaio_mixer;
4943 spec->init = vaio_init;
4944 spec->multiout.max_channels = 2;
4945 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4946 spec->multiout.dac_nids = vaio_dacs;
4947 spec->multiout.hp_nid = VAIO_HP_DAC;
4948 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4949 spec->adc_nids = vaio_adcs;
a64135a2 4950 spec->num_pwrs = 0;
db064e50
TI		 4951 spec->input_mux = &vaio_mux;
4952 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4953 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4954 break;
6d859065
GM		 4955
4956 case CXD9872AKD_VAIO:
4957 spec->mixer = vaio_ar_mixer;
4958 spec->init = vaio_ar_init;
4959 spec->multiout.max_channels = 2;
4960 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4961 spec->multiout.dac_nids = vaio_dacs;
4962 spec->multiout.hp_nid = VAIO_HP_DAC;
4963 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4964 spec->num_pwrs = 0;
6d859065
GM		 4965 spec->adc_nids = vaio_adcs;
4966 spec->input_mux = &vaio_mux;
4967 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4968 codec->patch_ops = stac9872_patch_ops;
6d859065 4969 break;
db064e50
TI		 4970 }
4971
db064e50
TI		 4972 return 0;
4973}
4974
4975
2f2f4251
M		 4976/*
4977 * patch entries
4978 */
4979struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4980 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4981 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4982 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4983 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4984 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4985 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4986 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4987 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4988 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4989 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4990 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4991 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4992 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4993 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4994 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4995 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4996 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4997 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4998 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4999 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5000 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5001 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5002 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5003 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5004 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5005 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5006 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5007 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5008 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5009 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5010 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5011 /* The following does not take into account .id=0x83847661 when subsys =
5012 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5013 * currently not fully supported.
5014 */
5015 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5016 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5017 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5018 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5019 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5020 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5021 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5022 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5023 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5024 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5025 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5026 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5027 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5028 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5029 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5030 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5031 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5032 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5033 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5034 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5035 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5036 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5037 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5038 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5039 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5040 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5041 {} /* terminator */
5042};
Clone of davem's net-next-2.6 tree