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[ALSA] hdsp - Fix zero division
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
8e21c34c
TD		 64enum {
65 STAC_925x_REF,
66 STAC_M2_2,
67 STAC_MA6,
2c11f955 68 STAC_PA6,
8e21c34c
TD		 69 STAC_925x_MODELS
70};
71
f5fcc13c
TI		 72enum {
73 STAC_D945_REF,
74 STAC_D945GTP3,
75 STAC_D945GTP5,
5d5d3bc3
IZ		 76 STAC_INTEL_MAC_V1,
77 STAC_INTEL_MAC_V2,
78 STAC_INTEL_MAC_V3,
79 STAC_INTEL_MAC_V4,
80 STAC_INTEL_MAC_V5,
dfe495d0 81 /* for backward compatibility */
f5fcc13c 82 STAC_MACMINI,
3fc24d85 83 STAC_MACBOOK,
6f0778d8
NB		 84 STAC_MACBOOK_PRO_V1,
85 STAC_MACBOOK_PRO_V2,
f16928fb 86 STAC_IMAC_INTEL,
0dae0f83 87 STAC_IMAC_INTEL_20,
dfe495d0
TI		 88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
f5fcc13c
TI		 92 STAC_922X_MODELS
93};
94
95enum {
96 STAC_D965_REF,
97 STAC_D965_3ST,
98 STAC_D965_5ST,
4ff076e5 99 STAC_DELL_3ST,
f5fcc13c
TI		 100 STAC_927X_MODELS
101};
403d1944 102
2f2f4251 103struct sigmatel_spec {
c8b6bf9b 104 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 105 unsigned int num_mixers;
106
403d1944 107 int board_config;
c7d4b2fa 108 unsigned int surr_switch: 1;
403d1944
MP		 109 unsigned int line_switch: 1;
110 unsigned int mic_switch: 1;
3cc08dc6 111 unsigned int alt_switch: 1;
82bc955f 112 unsigned int hp_detect: 1;
62fe78e9 113 unsigned int gpio_mute: 1;
c7d4b2fa 114
8259980e
TI		 115 unsigned int gpio_mask, gpio_data;
116
2f2f4251
M		 117 /* playback */
118 struct hda_multi_out multiout;
3cc08dc6 119 hda_nid_t dac_nids[5];
2f2f4251
M		 120
121 /* capture */
122 hda_nid_t *adc_nids;
2f2f4251 123 unsigned int num_adcs;
dabbed6f
M		 124 hda_nid_t *mux_nids;
125 unsigned int num_muxes;
8b65727b
MP		 126 hda_nid_t *dmic_nids;
127 unsigned int num_dmics;
128 hda_nid_t dmux_nid;
dabbed6f 129 hda_nid_t dig_in_nid;
2f2f4251 130
2f2f4251
M		 131 /* pin widgets */
132 hda_nid_t *pin_nids;
133 unsigned int num_pins;
2f2f4251 134 unsigned int *pin_configs;
11b44bbd 135 unsigned int *bios_pin_configs;
2f2f4251
M		 136
137 /* codec specific stuff */
138 struct hda_verb *init;
c8b6bf9b 139 struct snd_kcontrol_new *mixer;
2f2f4251
M		 140
141 /* capture source */
8b65727b
MP		 142 struct hda_input_mux *dinput_mux;
143 unsigned int cur_dmux;
c7d4b2fa 144 struct hda_input_mux *input_mux;
3cc08dc6 145 unsigned int cur_mux[3];
2f2f4251 146
403d1944
MP		 147 /* i/o switches */
148 unsigned int io_switch[2];
0fb87bb4 149 unsigned int clfe_swap;
5f10c4a9 150 unsigned int aloopback;
2f2f4251 151
c7d4b2fa
M		 152 struct hda_pcm pcm_rec[2]; /* PCM information */
153
154 /* dynamic controls and input_mux */
155 struct auto_pin_cfg autocfg;
156 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 157 struct snd_kcontrol_new *kctl_alloc;
8b65727b 158 struct hda_input_mux private_dimux;
c7d4b2fa 159 struct hda_input_mux private_imux;
2f2f4251
M		 160};
161
162static hda_nid_t stac9200_adc_nids[1] = {
163 0x03,
164};
165
166static hda_nid_t stac9200_mux_nids[1] = {
167 0x0c,
168};
169
170static hda_nid_t stac9200_dac_nids[1] = {
171 0x02,
172};
173
8e21c34c
TD		 174static hda_nid_t stac925x_adc_nids[1] = {
175 0x03,
176};
177
178static hda_nid_t stac925x_mux_nids[1] = {
179 0x0f,
180};
181
182static hda_nid_t stac925x_dac_nids[1] = {
183 0x02,
184};
185
2c11f955
TD		 186static hda_nid_t stac925x_dmic_nids[1] = {
187 0x15,
188};
189
2f2f4251
M		 190static hda_nid_t stac922x_adc_nids[2] = {
191 0x06, 0x07,
192};
193
194static hda_nid_t stac922x_mux_nids[2] = {
195 0x12, 0x13,
196};
197
3cc08dc6
MP		 198static hda_nid_t stac927x_adc_nids[3] = {
199 0x07, 0x08, 0x09
200};
201
202static hda_nid_t stac927x_mux_nids[3] = {
203 0x15, 0x16, 0x17
204};
205
f3302a59
MP		 206static hda_nid_t stac9205_adc_nids[2] = {
207 0x12, 0x13
208};
209
210static hda_nid_t stac9205_mux_nids[2] = {
211 0x19, 0x1a
212};
213
2549413e
TI		 214static hda_nid_t stac9205_dmic_nids[2] = {
215 0x17, 0x18,
8b65727b
MP		 216};
217
c7d4b2fa 218static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 219 0x08, 0x09, 0x0d, 0x0e,
220 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 221};
222
8e21c34c
TD		 223static hda_nid_t stac925x_pin_nids[8] = {
224 0x07, 0x08, 0x0a, 0x0b,
225 0x0c, 0x0d, 0x10, 0x11,
226};
227
2f2f4251
M		 228static hda_nid_t stac922x_pin_nids[10] = {
229 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
230 0x0f, 0x10, 0x11, 0x15, 0x1b,
231};
232
3cc08dc6
MP		 233static hda_nid_t stac927x_pin_nids[14] = {
234 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
235 0x0f, 0x10, 0x11, 0x12, 0x13,
236 0x14, 0x21, 0x22, 0x23,
237};
238
f3302a59
MP		 239static hda_nid_t stac9205_pin_nids[12] = {
240 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
241 0x0f, 0x14, 0x16, 0x17, 0x18,
242 0x21, 0x22,
f3302a59
MP		 243};
244
8b65727b
MP		 245static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
246 struct snd_ctl_elem_info *uinfo)
247{
248 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
249 struct sigmatel_spec *spec = codec->spec;
250 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
251}
252
253static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
254 struct snd_ctl_elem_value *ucontrol)
255{
256 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
257 struct sigmatel_spec *spec = codec->spec;
258
259 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
260 return 0;
261}
262
263static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
264 struct snd_ctl_elem_value *ucontrol)
265{
266 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
267 struct sigmatel_spec *spec = codec->spec;
268
269 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
270 spec->dmux_nid, &spec->cur_dmux);
271}
272
c8b6bf9b 273static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 274{
275 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
276 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 277 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 278}
279
c8b6bf9b 280static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 281{
282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
283 struct sigmatel_spec *spec = codec->spec;
284 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
285
286 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
287 return 0;
288}
289
c8b6bf9b 290static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 291{
292 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
293 struct sigmatel_spec *spec = codec->spec;
294 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
295
c7d4b2fa 296 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 297 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
298}
299
5f10c4a9
ML		 300#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
301
302static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
303 struct snd_ctl_elem_value *ucontrol)
304{
305 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
306 struct sigmatel_spec *spec = codec->spec;
307
308 ucontrol->value.integer.value[0] = spec->aloopback;
309 return 0;
310}
311
312static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
313 struct snd_ctl_elem_value *ucontrol)
314{
315 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
316 struct sigmatel_spec *spec = codec->spec;
317 unsigned int dac_mode;
318
319 if (spec->aloopback == ucontrol->value.integer.value[0])
320 return 0;
321
322 spec->aloopback = ucontrol->value.integer.value[0];
323
324
325 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
326 kcontrol->private_value & 0xFFFF, 0x0);
327
328 if (spec->aloopback) {
329 snd_hda_power_up(codec);
330 dac_mode |= 0x40;
331 } else {
332 snd_hda_power_down(codec);
333 dac_mode &= ~0x40;
334 }
335
336 snd_hda_codec_write_cache(codec, codec->afg, 0,
337 kcontrol->private_value >> 16, dac_mode);
338
339 return 1;
340}
341
6e6b88ff
ML		 342static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
343 struct snd_ctl_elem_info *uinfo)
344{
345 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
346 uinfo->count = 1;
347 uinfo->value.integer.min = 0;
348 uinfo->value.integer.max = 127;
349 return 0;
350}
351
352static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
353 struct snd_ctl_elem_value *ucontrol)
354{
9066f244 355 ucontrol->value.integer.value[0] = kcontrol->private_value & 0xff;
6e6b88ff
ML		 356 return 0;
357}
358
359static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
9066f244 363 unsigned int val = kcontrol->private_value & 0xff;
6e6b88ff 364
9066f244 365 if (val == ucontrol->value.integer.value[0])
6e6b88ff
ML		 366 return 0;
367
9066f244
TI		 368 val = ucontrol->value.integer.value[0];
369 kcontrol->private_value &= ~0xff;
370 kcontrol->private_value |= val;
6e6b88ff 371
9066f244
TI		 372 snd_hda_codec_write_cache(codec, kcontrol->private_value >> 16, 0,
373 AC_VERB_SET_VOLUME_KNOB_CONTROL, val | 0x80);
6e6b88ff
ML		 374 return 1;
375}
376
5f10c4a9 377
c7d4b2fa 378static struct hda_verb stac9200_core_init[] = {
2f2f4251 379 /* set dac0mux for dac converter */
c7d4b2fa 380 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 381 {}
382};
383
1194b5b7
TI		 384static struct hda_verb stac9200_eapd_init[] = {
385 /* set dac0mux for dac converter */
386 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
387 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
388 {}
389};
390
8e21c34c
TD		 391static struct hda_verb stac925x_core_init[] = {
392 /* set dac0mux for dac converter */
393 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
394 {}
395};
396
c7d4b2fa 397static struct hda_verb stac922x_core_init[] = {
2f2f4251 398 /* set master volume and direct control */
c7d4b2fa 399 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 400 {}
401};
402
93ed1503 403static struct hda_verb d965_core_init[] = {
19039bd0 404 /* set master volume and direct control */
93ed1503 405 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 406 /* unmute node 0x1b */
407 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
408 /* select node 0x03 as DAC */
409 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
410 {}
411};
412
3cc08dc6
MP		 413static struct hda_verb stac927x_core_init[] = {
414 /* set master volume and direct control */
415 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
416 {}
417};
418
f3302a59
MP		 419static struct hda_verb stac9205_core_init[] = {
420 /* set master volume and direct control */
421 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
422 {}
423};
424
9e05b7a3 425#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 426 { \
427 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
428 .name = "Input Source", \
9e05b7a3 429 .count = cnt, \
ca7c5a8b
ML		 430 .info = stac92xx_mux_enum_info, \
431 .get = stac92xx_mux_enum_get, \
432 .put = stac92xx_mux_enum_put, \
433 }
434
5f10c4a9
ML		 435#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
436 { \
437 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
438 .name = "Analog Loopback", \
439 .count = 1, \
440 .info = stac92xx_aloopback_info, \
441 .get = stac92xx_aloopback_get, \
442 .put = stac92xx_aloopback_put, \
443 .private_value = verb_read | (verb_write << 16), \
444 }
445
9066f244 446#define STAC_VOLKNOB(knob_nid) \
6e6b88ff
ML		 447 { \
448 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
449 .name = "Master Playback Volume", \
450 .count = 1, \
451 .info = stac92xx_volknob_info, \
452 .get = stac92xx_volknob_get, \
453 .put = stac92xx_volknob_put, \
9066f244 454 .private_value = 127 | (knob_nid << 16), \
6e6b88ff
ML		 455 }
456
ca7c5a8b 457
c8b6bf9b 458static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 459 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
460 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 461 STAC_INPUT_SOURCE(1),
2f2f4251
M		 462 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
463 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 464 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 465 { } /* end */
466};
467
8e21c34c 468static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 469 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 470 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
471 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
472 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
473 { } /* end */
474};
475
9e05b7a3
ML		 476static struct snd_kcontrol_new stac9205_mixer[] = {
477 {
478 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
479 .name = "Digital Input Source",
480 .count = 1,
481 .info = stac92xx_dmux_enum_info,
482 .get = stac92xx_dmux_enum_get,
483 .put = stac92xx_dmux_enum_put,
484 },
485 STAC_INPUT_SOURCE(2),
486 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
9066f244 487 STAC_VOLKNOB(0x24),
9e05b7a3
ML		 488
489 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
490 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
491 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
492
493 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
494 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
495 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
496
2f2f4251
M		 497 { } /* end */
498};
499
19039bd0 500/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 501static struct snd_kcontrol_new stac922x_mixer[] = {
502 STAC_INPUT_SOURCE(2),
9066f244 503 STAC_VOLKNOB(0x16),
9e05b7a3
ML		 504 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
505 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
506 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
507
508 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
509 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
510 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 511 { } /* end */
512};
513
9e05b7a3 514
d1d985f0 515static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 516 STAC_INPUT_SOURCE(3),
9066f244 517 STAC_VOLKNOB(0x24),
5f10c4a9 518 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
3cc08dc6 519
9e05b7a3
ML		 520 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
521 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
522 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
523
524 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
525 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
526 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
527
528 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
529 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
530 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 531 { } /* end */
532};
533
2f2f4251
M		 534static int stac92xx_build_controls(struct hda_codec *codec)
535{
536 struct sigmatel_spec *spec = codec->spec;
537 int err;
c7d4b2fa 538 int i;
2f2f4251
M		 539
540 err = snd_hda_add_new_ctls(codec, spec->mixer);
541 if (err < 0)
542 return err;
c7d4b2fa
M		 543
544 for (i = 0; i < spec->num_mixers; i++) {
545 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
546 if (err < 0)
547 return err;
548 }
549
dabbed6f
M		 550 if (spec->multiout.dig_out_nid) {
551 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
552 if (err < 0)
553 return err;
554 }
555 if (spec->dig_in_nid) {
556 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
557 if (err < 0)
558 return err;
559 }
560 return 0;
2f2f4251
M		 561}
562
403d1944 563static unsigned int ref9200_pin_configs[8] = {
dabbed6f 564 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 565 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
566};
567
dfe495d0
TI		 568/*
569 STAC 9200 pin configs for
570 102801A8
571 102801DE
572 102801E8
573*/
574static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 575 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
576 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 577};
578
579/*
580 STAC 9200 pin configs for
581 102801C0
582 102801C1
583*/
584static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 585 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
586 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 587};
588
589/*
590 STAC 9200 pin configs for
591 102801C4 (Dell Dimension E310)
592 102801C5
593 102801C7
594 102801D9
595 102801DA
596 102801E3
597*/
598static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 599 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
600 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 601};
602
603
604/*
605 STAC 9200-32 pin configs for
606 102801B5 (Dell Inspiron 630m)
607 102801D8 (Dell Inspiron 640m)
608*/
609static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 610 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
611 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 612};
613
614/*
615 STAC 9200-32 pin configs for
616 102801C2 (Dell Latitude D620)
617 102801C8
618 102801CC (Dell Latitude D820)
619 102801D4
620 102801D6
621*/
622static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 623 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
624 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 625};
626
627/*
628 STAC 9200-32 pin configs for
629 102801CE (Dell XPS M1710)
630 102801CF (Dell Precision M90)
631*/
632static unsigned int dell9200_m23_pin_configs[8] = {
633 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
634 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
635};
636
637/*
638 STAC 9200-32 pin configs for
639 102801C9
640 102801CA
641 102801CB (Dell Latitude 120L)
642 102801D3
643*/
644static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 645 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
646 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 647};
648
649/*
650 STAC 9200-32 pin configs for
651 102801BD (Dell Inspiron E1505n)
652 102801EE
653 102801EF
654*/
655static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 656 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
657 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 658};
659
660/*
661 STAC 9200-32 pin configs for
662 102801F5 (Dell Inspiron 1501)
663 102801F6
664*/
665static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 666 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
667 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 668};
669
670/*
671 STAC 9200-32
672 102801CD (Dell Inspiron E1705/9400)
673*/
674static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 675 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
676 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 677};
678
679
f5fcc13c
TI		 680static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
681 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 682 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
683 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
684 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
685 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
686 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
687 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
688 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
689 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
690 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
691 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 692};
693
f5fcc13c
TI		 694static const char *stac9200_models[STAC_9200_MODELS] = {
695 [STAC_REF] = "ref",
dfe495d0
TI		 696 [STAC_9200_DELL_D21] = "dell-d21",
697 [STAC_9200_DELL_D22] = "dell-d22",
698 [STAC_9200_DELL_D23] = "dell-d23",
699 [STAC_9200_DELL_M21] = "dell-m21",
700 [STAC_9200_DELL_M22] = "dell-m22",
701 [STAC_9200_DELL_M23] = "dell-m23",
702 [STAC_9200_DELL_M24] = "dell-m24",
703 [STAC_9200_DELL_M25] = "dell-m25",
704 [STAC_9200_DELL_M26] = "dell-m26",
705 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 706 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 707};
708
709static struct snd_pci_quirk stac9200_cfg_tbl[] = {
710 /* SigmaTel reference board */
711 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
712 "DFI LanParty", STAC_REF),
e7377071 713 /* Dell laptops have BIOS problem */
dfe495d0
TI		 714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
715 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 717 "Dell Inspiron 630m", STAC_9200_DELL_M21),
718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
719 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
721 "unknown Dell", STAC_9200_DELL_D22),
722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
723 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 725 "Dell Latitude D620", STAC_9200_DELL_M22),
726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
727 "unknown Dell", STAC_9200_DELL_D23),
728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
729 "unknown Dell", STAC_9200_DELL_D23),
730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
731 "unknown Dell", STAC_9200_DELL_M22),
732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
733 "unknown Dell", STAC_9200_DELL_M24),
734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
735 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 737 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 739 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 741 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 743 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 745 "Dell Precision M90", STAC_9200_DELL_M23),
746 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
747 "unknown Dell", STAC_9200_DELL_M22),
748 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
749 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 750 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 751 "unknown Dell", STAC_9200_DELL_M22),
49c605db 752 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 753 "Dell Inspiron 640m", STAC_9200_DELL_M21),
754 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
755 "unknown Dell", STAC_9200_DELL_D23),
756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
757 "unknown Dell", STAC_9200_DELL_D23),
758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
759 "unknown Dell", STAC_9200_DELL_D21),
760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
761 "unknown Dell", STAC_9200_DELL_D23),
762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
763 "unknown Dell", STAC_9200_DELL_D21),
764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
765 "unknown Dell", STAC_9200_DELL_M25),
766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
767 "unknown Dell", STAC_9200_DELL_M25),
49c605db 768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 769 "Dell Inspiron 1501", STAC_9200_DELL_M26),
770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
771 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 772 /* Panasonic */
773 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 774 /* Gateway machines needs EAPD to be set on resume */
775 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
776 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
777 STAC_9200_GATEWAY),
778 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
779 STAC_9200_GATEWAY),
403d1944
MP		 780 {} /* terminator */
781};
782
8e21c34c
TD		 783static unsigned int ref925x_pin_configs[8] = {
784 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
785 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
786};
787
788static unsigned int stac925x_MA6_pin_configs[8] = {
789 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
790 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
791};
792
2c11f955
TD		 793static unsigned int stac925x_PA6_pin_configs[8] = {
794 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
795 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
796};
797
8e21c34c 798static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 799 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
800 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 801};
802
803static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
804 [STAC_REF] = ref925x_pin_configs,
805 [STAC_M2_2] = stac925xM2_2_pin_configs,
806 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 807 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 808};
809
810static const char *stac925x_models[STAC_925x_MODELS] = {
811 [STAC_REF] = "ref",
812 [STAC_M2_2] = "m2-2",
813 [STAC_MA6] = "m6",
2c11f955 814 [STAC_PA6] = "pa6",
8e21c34c
TD		 815};
816
817static struct snd_pci_quirk stac925x_cfg_tbl[] = {
818 /* SigmaTel reference board */
819 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 820 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 821 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
822 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
823 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 824 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 825 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
826 {} /* terminator */
827};
828
403d1944
MP		 829static unsigned int ref922x_pin_configs[10] = {
830 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
831 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 832 0x40000100, 0x40000100,
833};
834
dfe495d0
TI		 835/*
836 STAC 922X pin configs for
837 102801A7
838 102801AB
839 102801A9
840 102801D1
841 102801D2
842*/
843static unsigned int dell_922x_d81_pin_configs[10] = {
844 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
845 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
846 0x01813122, 0x400001f2,
847};
848
849/*
850 STAC 922X pin configs for
851 102801AC
852 102801D0
853*/
854static unsigned int dell_922x_d82_pin_configs[10] = {
855 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
856 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
857 0x01813122, 0x400001f1,
858};
859
860/*
861 STAC 922X pin configs for
862 102801BF
863*/
864static unsigned int dell_922x_m81_pin_configs[10] = {
865 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
866 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
867 0x40C003f1, 0x405003f0,
868};
869
870/*
871 STAC 9221 A1 pin configs for
872 102801D7 (Dell XPS M1210)
873*/
874static unsigned int dell_922x_m82_pin_configs[10] = {
875 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
876 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
877 0x508003f3, 0x405003f4,
878};
879
403d1944 880static unsigned int d945gtp3_pin_configs[10] = {
869264c4 881 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 882 0x40000100, 0x40000100, 0x40000100, 0x40000100,
883 0x02a19120, 0x40000100,
884};
885
886static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 887 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
888 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 889 0x02a19320, 0x40000100,
890};
891
5d5d3bc3
IZ		 892static unsigned int intel_mac_v1_pin_configs[10] = {
893 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
894 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
895 0x400000fc, 0x400000fb,
896};
897
898static unsigned int intel_mac_v2_pin_configs[10] = {
899 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
900 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
901 0x400000fc, 0x400000fb,
6f0778d8
NB		 902};
903
5d5d3bc3
IZ		 904static unsigned int intel_mac_v3_pin_configs[10] = {
905 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
906 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 907 0x400000fc, 0x400000fb,
908};
909
5d5d3bc3
IZ		 910static unsigned int intel_mac_v4_pin_configs[10] = {
911 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
912 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 913 0x400000fc, 0x400000fb,
914};
915
5d5d3bc3
IZ		 916static unsigned int intel_mac_v5_pin_configs[10] = {
917 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
918 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
919 0x400000fc, 0x400000fb,
0dae0f83
TI		 920};
921
76c08828 922
19039bd0 923static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 924 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 925 [STAC_D945GTP3] = d945gtp3_pin_configs,
926 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 927 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
928 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
929 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
930 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
931 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 932 /* for backward compatibility */
5d5d3bc3
IZ		 933 [STAC_MACMINI] = intel_mac_v3_pin_configs,
934 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
935 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
936 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
937 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
938 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 939 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
940 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
941 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
942 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 943};
944
f5fcc13c
TI		 945static const char *stac922x_models[STAC_922X_MODELS] = {
946 [STAC_D945_REF] = "ref",
947 [STAC_D945GTP5] = "5stack",
948 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 949 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
950 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
951 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
952 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
953 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 954 /* for backward compatibility */
f5fcc13c 955 [STAC_MACMINI] = "macmini",
3fc24d85 956 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 957 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
958 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 959 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 960 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 961 [STAC_922X_DELL_D81] = "dell-d81",
962 [STAC_922X_DELL_D82] = "dell-d82",
963 [STAC_922X_DELL_M81] = "dell-m81",
964 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 965};
966
967static struct snd_pci_quirk stac922x_cfg_tbl[] = {
968 /* SigmaTel reference board */
969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
970 "DFI LanParty", STAC_D945_REF),
971 /* Intel 945G based systems */
972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
973 "Intel D945G", STAC_D945GTP3),
974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
975 "Intel D945G", STAC_D945GTP3),
976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
977 "Intel D945G", STAC_D945GTP3),
978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
979 "Intel D945G", STAC_D945GTP3),
980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
981 "Intel D945G", STAC_D945GTP3),
982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
983 "Intel D945G", STAC_D945GTP3),
984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
985 "Intel D945G", STAC_D945GTP3),
986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
987 "Intel D945G", STAC_D945GTP3),
988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
989 "Intel D945G", STAC_D945GTP3),
990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
991 "Intel D945G", STAC_D945GTP3),
992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
993 "Intel D945G", STAC_D945GTP3),
994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
995 "Intel D945G", STAC_D945GTP3),
996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
997 "Intel D945G", STAC_D945GTP3),
998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
999 "Intel D945G", STAC_D945GTP3),
1000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1001 "Intel D945G", STAC_D945GTP3),
1002 /* Intel D945G 5-stack systems */
1003 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1004 "Intel D945G", STAC_D945GTP5),
1005 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1006 "Intel D945G", STAC_D945GTP5),
1007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1008 "Intel D945G", STAC_D945GTP5),
1009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1010 "Intel D945G", STAC_D945GTP5),
1011 /* Intel 945P based systems */
1012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1013 "Intel D945P", STAC_D945GTP3),
1014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1015 "Intel D945P", STAC_D945GTP3),
1016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1017 "Intel D945P", STAC_D945GTP3),
1018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1019 "Intel D945P", STAC_D945GTP3),
1020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1021 "Intel D945P", STAC_D945GTP3),
1022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1023 "Intel D945P", STAC_D945GTP5),
1024 /* other systems */
1025 /* Apple Mac Mini (early 2006) */
1026 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1027 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1028 /* Dell systems */
1029 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1030 "unknown Dell", STAC_922X_DELL_D81),
1031 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1032 "unknown Dell", STAC_922X_DELL_D81),
1033 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1034 "unknown Dell", STAC_922X_DELL_D81),
1035 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1036 "unknown Dell", STAC_922X_DELL_D82),
1037 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1038 "unknown Dell", STAC_922X_DELL_M81),
1039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1040 "unknown Dell", STAC_922X_DELL_D82),
1041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1042 "unknown Dell", STAC_922X_DELL_D81),
1043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1044 "unknown Dell", STAC_922X_DELL_D81),
1045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1046 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1047 {} /* terminator */
1048};
1049
3cc08dc6 1050static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1051 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1052 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1053 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1054 0x01c42190, 0x40000100,
3cc08dc6
MP		 1055};
1056
93ed1503 1057static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1058 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1059 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1060 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1061 0x40000100, 0x40000100
1062};
1063
93ed1503
TD		 1064static unsigned int d965_5st_pin_configs[14] = {
1065 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1066 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1067 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1068 0x40000100, 0x40000100
1069};
1070
4ff076e5
TD		 1071static unsigned int dell_3st_pin_configs[14] = {
1072 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1073 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1074 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1075 0x40c003fc, 0x40000100
1076};
1077
93ed1503 1078static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 1079 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 1080 [STAC_D965_3ST] = d965_3st_pin_configs,
1081 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 1082 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 1083};
1084
f5fcc13c
TI		 1085static const char *stac927x_models[STAC_927X_MODELS] = {
1086 [STAC_D965_REF] = "ref",
1087 [STAC_D965_3ST] = "3stack",
1088 [STAC_D965_5ST] = "5stack",
4ff076e5 1089 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 1090};
1091
1092static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1093 /* SigmaTel reference board */
1094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1095 "DFI LanParty", STAC_D965_REF),
81d3dbde 1096 /* Intel 946 based systems */
f5fcc13c
TI		 1097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1099 /* 965 based 3 stack systems */
f5fcc13c
TI		 1100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1103 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1105 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1108 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1109 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1110 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1111 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1112 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1113 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1114 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1115 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
5e915bb3 1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
4ff076e5 1117 /* Dell 3 stack systems */
dfe495d0 1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1121 /* 965 based 5 stack systems */
5e915bb3 1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
f5fcc13c
TI		 1123 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1124 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1125 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1126 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1127 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1128 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1129 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1131 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1132 {} /* terminator */
1133};
1134
f3302a59
MP		 1135static unsigned int ref9205_pin_configs[12] = {
1136 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1137 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1138 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1139};
1140
dfe495d0
TI		 1141/*
1142 STAC 9205 pin configs for
1143 102801F1
1144 102801F2
1145 102801FC
1146 102801FD
1147 10280204
1148 1028021F
1149*/
1150static unsigned int dell_9205_m42_pin_configs[12] = {
1151 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1152 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1153 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1154};
1155
1156/*
1157 STAC 9205 pin configs for
1158 102801F9
1159 102801FA
1160 102801FE
1161 102801FF (Dell Precision M4300)
1162 10280206
1163 10280200
1164 10280201
1165*/
1166static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1167 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1168 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1169 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1170};
1171
dfe495d0 1172static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1173 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1174 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1175 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1176};
1177
f5fcc13c 1178static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1179 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1180 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1181 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1182 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1183};
1184
f5fcc13c
TI		 1185static const char *stac9205_models[STAC_9205_MODELS] = {
1186 [STAC_9205_REF] = "ref",
dfe495d0 1187 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1188 [STAC_9205_DELL_M43] = "dell-m43",
1189 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1190};
1191
1192static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1193 /* SigmaTel reference board */
1194 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1195 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1197 "unknown Dell", STAC_9205_DELL_M42),
1198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1199 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1201 "Dell Precision", STAC_9205_DELL_M43),
1202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1203 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1205 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1207 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1209 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1211 "unknown Dell", STAC_9205_DELL_M42),
1212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1213 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1215 "Dell Precision", STAC_9205_DELL_M43),
1216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1217 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1219 "Dell Precision", STAC_9205_DELL_M43),
1220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1221 "Dell Inspiron", STAC_9205_DELL_M44),
1222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1223 "Dell Inspiron", STAC_9205_DELL_M44),
1224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1225 "Dell Inspiron", STAC_9205_DELL_M44),
1226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1227 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1228 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1229 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1230 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1231 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1232 {} /* terminator */
1233};
1234
11b44bbd
RF		 1235static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1236{
1237 int i;
1238 struct sigmatel_spec *spec = codec->spec;
1239
1240 if (! spec->bios_pin_configs) {
1241 spec->bios_pin_configs = kcalloc(spec->num_pins,
1242 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1243 if (! spec->bios_pin_configs)
1244 return -ENOMEM;
1245 }
1246
1247 for (i = 0; i < spec->num_pins; i++) {
1248 hda_nid_t nid = spec->pin_nids[i];
1249 unsigned int pin_cfg;
1250
1251 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1252 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1253 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1254 nid, pin_cfg);
1255 spec->bios_pin_configs[i] = pin_cfg;
1256 }
1257
1258 return 0;
1259}
1260
87d48363
MR		 1261static void stac92xx_set_config_reg(struct hda_codec *codec,
1262 hda_nid_t pin_nid, unsigned int pin_config)
1263{
1264 int i;
1265 snd_hda_codec_write(codec, pin_nid, 0,
1266 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1267 pin_config & 0x000000ff);
1268 snd_hda_codec_write(codec, pin_nid, 0,
1269 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1270 (pin_config & 0x0000ff00) >> 8);
1271 snd_hda_codec_write(codec, pin_nid, 0,
1272 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1273 (pin_config & 0x00ff0000) >> 16);
1274 snd_hda_codec_write(codec, pin_nid, 0,
1275 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1276 pin_config >> 24);
1277 i = snd_hda_codec_read(codec, pin_nid, 0,
1278 AC_VERB_GET_CONFIG_DEFAULT,
1279 0x00);
1280 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1281 pin_nid, i);
1282}
1283
2f2f4251
M		 1284static void stac92xx_set_config_regs(struct hda_codec *codec)
1285{
1286 int i;
1287 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1288
87d48363
MR		 1289 if (!spec->pin_configs)
1290 return;
11b44bbd 1291
87d48363
MR		 1292 for (i = 0; i < spec->num_pins; i++)
1293 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1294 spec->pin_configs[i]);
2f2f4251 1295}
2f2f4251 1296
8259980e 1297static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1298{
8259980e 1299 struct sigmatel_spec *spec = codec->spec;
87d48363 1300 /* Configure GPIOx as output */
82beb8fd
TI		 1301 snd_hda_codec_write_cache(codec, codec->afg, 0,
1302 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1303 /* Configure GPIOx as CMOS */
82beb8fd 1304 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1305 /* Assert GPIOx */
82beb8fd
TI		 1306 snd_hda_codec_write_cache(codec, codec->afg, 0,
1307 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1308 /* Enable GPIOx */
82beb8fd
TI		 1309 snd_hda_codec_write_cache(codec, codec->afg, 0,
1310 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1311}
1312
dabbed6f 1313/*
c7d4b2fa 1314 * Analog playback callbacks
dabbed6f 1315 */
c7d4b2fa
M		 1316static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1317 struct hda_codec *codec,
c8b6bf9b 1318 struct snd_pcm_substream *substream)
2f2f4251 1319{
dabbed6f 1320 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1321 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1322}
1323
2f2f4251
M		 1324static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1325 struct hda_codec *codec,
1326 unsigned int stream_tag,
1327 unsigned int format,
c8b6bf9b 1328 struct snd_pcm_substream *substream)
2f2f4251
M		 1329{
1330 struct sigmatel_spec *spec = codec->spec;
403d1944 1331 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1332}
1333
1334static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1335 struct hda_codec *codec,
c8b6bf9b 1336 struct snd_pcm_substream *substream)
2f2f4251
M		 1337{
1338 struct sigmatel_spec *spec = codec->spec;
1339 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1340}
1341
dabbed6f
M		 1342/*
1343 * Digital playback callbacks
1344 */
1345static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1346 struct hda_codec *codec,
c8b6bf9b 1347 struct snd_pcm_substream *substream)
dabbed6f
M		 1348{
1349 struct sigmatel_spec *spec = codec->spec;
1350 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1351}
1352
1353static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1354 struct hda_codec *codec,
c8b6bf9b 1355 struct snd_pcm_substream *substream)
dabbed6f
M		 1356{
1357 struct sigmatel_spec *spec = codec->spec;
1358 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1359}
1360
6b97eb45
TI		 1361static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1362 struct hda_codec *codec,
1363 unsigned int stream_tag,
1364 unsigned int format,
1365 struct snd_pcm_substream *substream)
1366{
1367 struct sigmatel_spec *spec = codec->spec;
1368 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1369 stream_tag, format, substream);
1370}
1371
dabbed6f 1372
2f2f4251
M		 1373/*
1374 * Analog capture callbacks
1375 */
1376static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1377 struct hda_codec *codec,
1378 unsigned int stream_tag,
1379 unsigned int format,
c8b6bf9b 1380 struct snd_pcm_substream *substream)
2f2f4251
M		 1381{
1382 struct sigmatel_spec *spec = codec->spec;
1383
1384 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1385 stream_tag, 0, format);
1386 return 0;
1387}
1388
1389static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1390 struct hda_codec *codec,
c8b6bf9b 1391 struct snd_pcm_substream *substream)
2f2f4251
M		 1392{
1393 struct sigmatel_spec *spec = codec->spec;
1394
1395 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1396 return 0;
1397}
1398
dabbed6f
M		 1399static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1400 .substreams = 1,
1401 .channels_min = 2,
1402 .channels_max = 2,
1403 /* NID is set in stac92xx_build_pcms */
1404 .ops = {
1405 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1406 .close = stac92xx_dig_playback_pcm_close,
1407 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1408 },
1409};
1410
1411static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1412 .substreams = 1,
1413 .channels_min = 2,
1414 .channels_max = 2,
1415 /* NID is set in stac92xx_build_pcms */
1416};
1417
2f2f4251
M		 1418static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1419 .substreams = 1,
1420 .channels_min = 2,
c7d4b2fa 1421 .channels_max = 8,
2f2f4251
M		 1422 .nid = 0x02, /* NID to query formats and rates */
1423 .ops = {
1424 .open = stac92xx_playback_pcm_open,
1425 .prepare = stac92xx_playback_pcm_prepare,
1426 .cleanup = stac92xx_playback_pcm_cleanup
1427 },
1428};
1429
3cc08dc6
MP		 1430static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1431 .substreams = 1,
1432 .channels_min = 2,
1433 .channels_max = 2,
1434 .nid = 0x06, /* NID to query formats and rates */
1435 .ops = {
1436 .open = stac92xx_playback_pcm_open,
1437 .prepare = stac92xx_playback_pcm_prepare,
1438 .cleanup = stac92xx_playback_pcm_cleanup
1439 },
1440};
1441
2f2f4251 1442static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1443 .channels_min = 2,
1444 .channels_max = 2,
9e05b7a3 1445 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1446 .ops = {
1447 .prepare = stac92xx_capture_pcm_prepare,
1448 .cleanup = stac92xx_capture_pcm_cleanup
1449 },
1450};
1451
1452static int stac92xx_build_pcms(struct hda_codec *codec)
1453{
1454 struct sigmatel_spec *spec = codec->spec;
1455 struct hda_pcm *info = spec->pcm_rec;
1456
1457 codec->num_pcms = 1;
1458 codec->pcm_info = info;
1459
c7d4b2fa 1460 info->name = "STAC92xx Analog";
2f2f4251 1461 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1462 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1463 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1464 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1465
1466 if (spec->alt_switch) {
1467 codec->num_pcms++;
1468 info++;
1469 info->name = "STAC92xx Analog Alt";
1470 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1471 }
2f2f4251 1472
dabbed6f
M		 1473 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1474 codec->num_pcms++;
1475 info++;
1476 info->name = "STAC92xx Digital";
1477 if (spec->multiout.dig_out_nid) {
1478 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1479 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1480 }
1481 if (spec->dig_in_nid) {
1482 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1483 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1484 }
1485 }
1486
2f2f4251
M		 1487 return 0;
1488}
1489
c960a03b
TI		 1490static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1491{
1492 unsigned int pincap = snd_hda_param_read(codec, nid,
1493 AC_PAR_PIN_CAP);
1494 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1495 if (pincap & AC_PINCAP_VREF_100)
1496 return AC_PINCTL_VREF_100;
1497 if (pincap & AC_PINCAP_VREF_80)
1498 return AC_PINCTL_VREF_80;
1499 if (pincap & AC_PINCAP_VREF_50)
1500 return AC_PINCTL_VREF_50;
1501 if (pincap & AC_PINCAP_VREF_GRD)
1502 return AC_PINCTL_VREF_GRD;
1503 return 0;
1504}
1505
403d1944
MP		 1506static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1507
1508{
82beb8fd
TI		 1509 snd_hda_codec_write_cache(codec, nid, 0,
1510 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1511}
1512
a5ce8890 1513#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1514
1515static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1516{
1517 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1518 struct sigmatel_spec *spec = codec->spec;
1519 int io_idx = kcontrol-> private_value & 0xff;
1520
1521 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1522 return 0;
1523}
1524
1525static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1526{
1527 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1528 struct sigmatel_spec *spec = codec->spec;
1529 hda_nid_t nid = kcontrol->private_value >> 8;
1530 int io_idx = kcontrol-> private_value & 0xff;
1531 unsigned short val = ucontrol->value.integer.value[0];
1532
1533 spec->io_switch[io_idx] = val;
1534
1535 if (val)
1536 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1537 else {
1538 unsigned int pinctl = AC_PINCTL_IN_EN;
1539 if (io_idx) /* set VREF for mic */
1540 pinctl |= stac92xx_get_vref(codec, nid);
1541 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1542 }
403d1944
MP		 1543 return 1;
1544}
1545
0fb87bb4
ML		 1546#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1547
1548static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1549 struct snd_ctl_elem_value *ucontrol)
1550{
1551 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1552 struct sigmatel_spec *spec = codec->spec;
1553
1554 ucontrol->value.integer.value[0] = spec->clfe_swap;
1555 return 0;
1556}
1557
1558static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1559 struct snd_ctl_elem_value *ucontrol)
1560{
1561 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1562 struct sigmatel_spec *spec = codec->spec;
1563 hda_nid_t nid = kcontrol->private_value & 0xff;
1564
1565 if (spec->clfe_swap == ucontrol->value.integer.value[0])
1566 return 0;
1567
1568 spec->clfe_swap = ucontrol->value.integer.value[0];
1569
1570 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1571 spec->clfe_swap ? 0x4 : 0x0);
1572
1573 return 1;
1574}
1575
403d1944
MP		 1576#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1577 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1578 .name = xname, \
1579 .index = 0, \
1580 .info = stac92xx_io_switch_info, \
1581 .get = stac92xx_io_switch_get, \
1582 .put = stac92xx_io_switch_put, \
1583 .private_value = xpval, \
1584 }
1585
0fb87bb4
ML		 1586#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1587 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1588 .name = xname, \
1589 .index = 0, \
1590 .info = stac92xx_clfe_switch_info, \
1591 .get = stac92xx_clfe_switch_get, \
1592 .put = stac92xx_clfe_switch_put, \
1593 .private_value = xpval, \
1594 }
403d1944 1595
c7d4b2fa
M		 1596enum {
1597 STAC_CTL_WIDGET_VOL,
1598 STAC_CTL_WIDGET_MUTE,
403d1944 1599 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1600 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1601};
1602
c8b6bf9b 1603static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1604 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1605 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1606 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1607 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1608};
1609
1610/* add dynamic controls */
1611static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1612{
c8b6bf9b 1613 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1614
1615 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1616 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1617
1618 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1619 if (! knew)
1620 return -ENOMEM;
1621 if (spec->kctl_alloc) {
1622 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1623 kfree(spec->kctl_alloc);
1624 }
1625 spec->kctl_alloc = knew;
1626 spec->num_kctl_alloc = num;
1627 }
1628
1629 knew = &spec->kctl_alloc[spec->num_kctl_used];
1630 *knew = stac92xx_control_templates[type];
82fe0c58 1631 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1632 if (! knew->name)
1633 return -ENOMEM;
1634 knew->private_value = val;
1635 spec->num_kctl_used++;
1636 return 0;
1637}
1638
403d1944
MP		 1639/* flag inputs as additional dynamic lineouts */
1640static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1641{
1642 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1643 unsigned int wcaps, wtype;
1644 int i, num_dacs = 0;
1645
1646 /* use the wcaps cache to count all DACs available for line-outs */
1647 for (i = 0; i < codec->num_nodes; i++) {
1648 wcaps = codec->wcaps[i];
1649 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1650 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1651 num_dacs++;
1652 }
403d1944 1653
7b043899
SL		 1654 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1655
403d1944
MP		 1656 switch (cfg->line_outs) {
1657 case 3:
1658 /* add line-in as side */
7b043899 1659 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1660 cfg->line_out_pins[cfg->line_outs] =
1661 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1662 spec->line_switch = 1;
1663 cfg->line_outs++;
1664 }
1665 break;
1666 case 2:
1667 /* add line-in as clfe and mic as side */
7b043899 1668 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1669 cfg->line_out_pins[cfg->line_outs] =
1670 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1671 spec->line_switch = 1;
1672 cfg->line_outs++;
1673 }
7b043899 1674 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1675 cfg->line_out_pins[cfg->line_outs] =
1676 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1677 spec->mic_switch = 1;
1678 cfg->line_outs++;
1679 }
1680 break;
1681 case 1:
1682 /* add line-in as surr and mic as clfe */
7b043899 1683 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1684 cfg->line_out_pins[cfg->line_outs] =
1685 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1686 spec->line_switch = 1;
1687 cfg->line_outs++;
1688 }
7b043899 1689 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1690 cfg->line_out_pins[cfg->line_outs] =
1691 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1692 spec->mic_switch = 1;
1693 cfg->line_outs++;
1694 }
1695 break;
1696 }
1697
1698 return 0;
1699}
1700
7b043899
SL		 1701
1702static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1703{
1704 int i;
1705
1706 for (i = 0; i < spec->multiout.num_dacs; i++) {
1707 if (spec->multiout.dac_nids[i] == nid)
1708 return 1;
1709 }
1710
1711 return 0;
1712}
1713
3cc08dc6 1714/*
7b043899
SL		 1715 * Fill in the dac_nids table from the parsed pin configuration
1716 * This function only works when every pin in line_out_pins[]
1717 * contains atleast one DAC in its connection list. Some 92xx
1718 * codecs are not connected directly to a DAC, such as the 9200
1719 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1720 */
19039bd0 1721static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1722 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1723{
1724 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1725 int i, j, conn_len = 0;
1726 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1727 unsigned int wcaps, wtype;
1728
c7d4b2fa
M		 1729 for (i = 0; i < cfg->line_outs; i++) {
1730 nid = cfg->line_out_pins[i];
7b043899
SL		 1731 conn_len = snd_hda_get_connections(codec, nid, conn,
1732 HDA_MAX_CONNECTIONS);
1733 for (j = 0; j < conn_len; j++) {
1734 wcaps = snd_hda_param_read(codec, conn[j],
1735 AC_PAR_AUDIO_WIDGET_CAP);
1736 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1737
1738 if (wtype != AC_WID_AUD_OUT ||
1739 (wcaps & AC_WCAP_DIGITAL))
1740 continue;
1741 /* conn[j] is a DAC routed to this line-out */
1742 if (!is_in_dac_nids(spec, conn[j]))
1743 break;
1744 }
1745
1746 if (j == conn_len) {
df802952
TI		 1747 if (spec->multiout.num_dacs > 0) {
1748 /* we have already working output pins,
1749 * so let's drop the broken ones again
1750 */
1751 cfg->line_outs = spec->multiout.num_dacs;
1752 break;
1753 }
7b043899
SL		 1754 /* error out, no available DAC found */
1755 snd_printk(KERN_ERR
1756 "%s: No available DAC for pin 0x%x\n",
1757 __func__, nid);
1758 return -ENODEV;
1759 }
1760
1761 spec->multiout.dac_nids[i] = conn[j];
1762 spec->multiout.num_dacs++;
1763 if (conn_len > 1) {
1764 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1765 snd_hda_codec_write_cache(codec, nid, 0,
1766 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1767
7b043899
SL		 1768 }
1769 }
c7d4b2fa 1770
7b043899
SL		 1771 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1772 spec->multiout.num_dacs,
1773 spec->multiout.dac_nids[0],
1774 spec->multiout.dac_nids[1],
1775 spec->multiout.dac_nids[2],
1776 spec->multiout.dac_nids[3],
1777 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1778 return 0;
1779}
1780
eb06ed8f
TI		 1781/* create volume control/switch for the given prefx type */
1782static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1783{
1784 char name[32];
1785 int err;
1786
1787 sprintf(name, "%s Playback Volume", pfx);
1788 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1789 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1790 if (err < 0)
1791 return err;
1792 sprintf(name, "%s Playback Switch", pfx);
1793 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1794 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1795 if (err < 0)
1796 return err;
1797 return 0;
1798}
1799
c7d4b2fa 1800/* add playback controls from the parsed DAC table */
0fb87bb4 1801static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 1802 const struct auto_pin_cfg *cfg)
c7d4b2fa 1803{
19039bd0
TI		 1804 static const char *chname[4] = {
1805 "Front", "Surround", NULL /*CLFE*/, "Side"
1806 };
c7d4b2fa
M		 1807 hda_nid_t nid;
1808 int i, err;
1809
0fb87bb4
ML		 1810 struct sigmatel_spec *spec = codec->spec;
1811 unsigned int wid_caps;
1812
1813
c7d4b2fa 1814 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1815 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1816 continue;
1817
1818 nid = spec->multiout.dac_nids[i];
1819
1820 if (i == 2) {
1821 /* Center/LFE */
eb06ed8f
TI		 1822 err = create_controls(spec, "Center", nid, 1);
1823 if (err < 0)
c7d4b2fa 1824 return err;
eb06ed8f
TI		 1825 err = create_controls(spec, "LFE", nid, 2);
1826 if (err < 0)
c7d4b2fa 1827 return err;
0fb87bb4
ML		 1828
1829 wid_caps = get_wcaps(codec, nid);
1830
1831 if (wid_caps & AC_WCAP_LR_SWAP) {
1832 err = stac92xx_add_control(spec,
1833 STAC_CTL_WIDGET_CLFE_SWITCH,
1834 "Swap Center/LFE Playback Switch", nid);
1835
1836 if (err < 0)
1837 return err;
1838 }
1839
c7d4b2fa 1840 } else {
eb06ed8f
TI		 1841 err = create_controls(spec, chname[i], nid, 3);
1842 if (err < 0)
c7d4b2fa
M		 1843 return err;
1844 }
1845 }
1846
403d1944
MP		 1847 if (spec->line_switch)
1848 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1849 return err;
1850
1851 if (spec->mic_switch)
1852 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1853 return err;
1854
c7d4b2fa
M		 1855 return 0;
1856}
1857
eb06ed8f 1858static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1859{
7b043899
SL		 1860 if (is_in_dac_nids(spec, nid))
1861 return 1;
eb06ed8f
TI		 1862 if (spec->multiout.hp_nid == nid)
1863 return 1;
1864 return 0;
1865}
c7d4b2fa 1866
eb06ed8f
TI		 1867static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1868{
1869 if (!spec->multiout.hp_nid)
1870 spec->multiout.hp_nid = nid;
1871 else if (spec->multiout.num_dacs > 4) {
1872 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1873 return 1;
1874 } else {
1875 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1876 spec->multiout.num_dacs++;
1877 }
1878 return 0;
1879}
4e55096e 1880
eb06ed8f
TI		 1881/* add playback controls for Speaker and HP outputs */
1882static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1883 struct auto_pin_cfg *cfg)
1884{
1885 struct sigmatel_spec *spec = codec->spec;
1886 hda_nid_t nid;
1887 int i, old_num_dacs, err;
1888
1889 old_num_dacs = spec->multiout.num_dacs;
1890 for (i = 0; i < cfg->hp_outs; i++) {
1891 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1892 if (wid_caps & AC_WCAP_UNSOL_CAP)
1893 spec->hp_detect = 1;
1894 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1895 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1896 if (check_in_dac_nids(spec, nid))
1897 nid = 0;
1898 if (! nid)
c7d4b2fa 1899 continue;
eb06ed8f
TI		 1900 add_spec_dacs(spec, nid);
1901 }
1902 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1903 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1904 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1905 if (check_in_dac_nids(spec, nid))
1906 nid = 0;
eb06ed8f
TI		 1907 if (! nid)
1908 continue;
1909 add_spec_dacs(spec, nid);
c7d4b2fa 1910 }
1b290a51
MR		 1911 for (i = 0; i < cfg->line_outs; i++) {
1912 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1913 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1914 if (check_in_dac_nids(spec, nid))
1915 nid = 0;
1916 if (! nid)
1917 continue;
1918 add_spec_dacs(spec, nid);
1919 }
eb06ed8f
TI		 1920 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1921 static const char *pfxs[] = {
1922 "Speaker", "External Speaker", "Speaker2",
1923 };
1924 err = create_controls(spec, pfxs[i - old_num_dacs],
1925 spec->multiout.dac_nids[i], 3);
1926 if (err < 0)
1927 return err;
1928 }
1929 if (spec->multiout.hp_nid) {
1930 const char *pfx;
1931 if (old_num_dacs == spec->multiout.num_dacs)
1932 pfx = "Master";
1933 else
1934 pfx = "Headphone";
1935 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1936 if (err < 0)
1937 return err;
1938 }
c7d4b2fa
M		 1939
1940 return 0;
1941}
1942
8b65727b 1943/* labels for dmic mux inputs */
ddc2cec4 1944static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1945 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1946 "Digital Mic 3", "Digital Mic 4"
1947};
1948
1949/* create playback/capture controls for input pins on dmic capable codecs */
1950static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1951 const struct auto_pin_cfg *cfg)
1952{
1953 struct sigmatel_spec *spec = codec->spec;
1954 struct hda_input_mux *dimux = &spec->private_dimux;
1955 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1956 int i, j;
1957
1958 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1959 dimux->items[dimux->num_items].index = 0;
1960 dimux->num_items++;
1961
1962 for (i = 0; i < spec->num_dmics; i++) {
1963 int index;
1964 int num_cons;
1965 unsigned int def_conf;
1966
1967 def_conf = snd_hda_codec_read(codec,
1968 spec->dmic_nids[i],
1969 0,
1970 AC_VERB_GET_CONFIG_DEFAULT,
1971 0);
1972 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1973 continue;
1974
1975 num_cons = snd_hda_get_connections(codec,
1976 spec->dmux_nid,
1977 con_lst,
1978 HDA_MAX_NUM_INPUTS);
1979 for (j = 0; j < num_cons; j++)
1980 if (con_lst[j] == spec->dmic_nids[i]) {
1981 index = j;
1982 goto found;
1983 }
1984 continue;
1985found:
1986 dimux->items[dimux->num_items].label =
1987 stac92xx_dmic_labels[dimux->num_items];
1988 dimux->items[dimux->num_items].index = index;
1989 dimux->num_items++;
1990 }
1991
1992 return 0;
1993}
1994
c7d4b2fa
M		 1995/* create playback/capture controls for input pins */
1996static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1997{
1998 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1999 struct hda_input_mux *imux = &spec->private_imux;
2000 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2001 int i, j, k;
2002
2003 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2004 int index;
2005
2006 if (!cfg->input_pins[i])
2007 continue;
2008 index = -1;
2009 for (j = 0; j < spec->num_muxes; j++) {
2010 int num_cons;
2011 num_cons = snd_hda_get_connections(codec,
2012 spec->mux_nids[j],
2013 con_lst,
2014 HDA_MAX_NUM_INPUTS);
2015 for (k = 0; k < num_cons; k++)
2016 if (con_lst[k] == cfg->input_pins[i]) {
2017 index = k;
2018 goto found;
2019 }
c7d4b2fa 2020 }
314634bc
TI		 2021 continue;
2022 found:
2023 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2024 imux->items[imux->num_items].index = index;
2025 imux->num_items++;
c7d4b2fa
M		 2026 }
2027
7b043899 2028 if (imux->num_items) {
62fe78e9
SR		 2029 /*
2030 * Set the current input for the muxes.
2031 * The STAC9221 has two input muxes with identical source
2032 * NID lists. Hopefully this won't get confused.
2033 */
2034 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2035 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2036 AC_VERB_SET_CONNECT_SEL,
2037 imux->items[0].index);
62fe78e9
SR		 2038 }
2039 }
2040
c7d4b2fa
M		 2041 return 0;
2042}
2043
c7d4b2fa
M		 2044static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2045{
2046 struct sigmatel_spec *spec = codec->spec;
2047 int i;
2048
2049 for (i = 0; i < spec->autocfg.line_outs; i++) {
2050 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2051 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2052 }
2053}
2054
2055static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2056{
2057 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2058 int i;
c7d4b2fa 2059
eb06ed8f
TI		 2060 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2061 hda_nid_t pin;
2062 pin = spec->autocfg.hp_pins[i];
2063 if (pin) /* connect to front */
2064 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2065 }
2066 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2067 hda_nid_t pin;
2068 pin = spec->autocfg.speaker_pins[i];
2069 if (pin) /* connect to front */
2070 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2071 }
c7d4b2fa
M		 2072}
2073
3cc08dc6 2074static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2075{
2076 struct sigmatel_spec *spec = codec->spec;
2077 int err;
2078
8b65727b
MP		 2079 if ((err = snd_hda_parse_pin_def_config(codec,
2080 &spec->autocfg,
2081 spec->dmic_nids)) < 0)
c7d4b2fa 2082 return err;
82bc955f 2083 if (! spec->autocfg.line_outs)
869264c4 2084 return 0; /* can't find valid pin config */
19039bd0 2085
403d1944
MP		 2086 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2087 return err;
19039bd0
TI		 2088 if (spec->multiout.num_dacs == 0)
2089 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2090 return err;
c7d4b2fa 2091
0fb87bb4
ML		 2092 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2093
2094 if (err < 0)
2095 return err;
2096
2097 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2098
2099 if (err < 0)
2100 return err;
2101
2102 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2103
2104 if (err < 0)
c7d4b2fa
M		 2105 return err;
2106
8b65727b
MP		 2107 if (spec->num_dmics > 0)
2108 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2109 &spec->autocfg)) < 0)
2110 return err;
2111
c7d4b2fa 2112 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2113 if (spec->multiout.max_channels > 2)
c7d4b2fa 2114 spec->surr_switch = 1;
c7d4b2fa 2115
82bc955f 2116 if (spec->autocfg.dig_out_pin)
3cc08dc6 2117 spec->multiout.dig_out_nid = dig_out;
82bc955f 2118 if (spec->autocfg.dig_in_pin)
3cc08dc6 2119 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2120
2121 if (spec->kctl_alloc)
2122 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2123
2124 spec->input_mux = &spec->private_imux;
8b65727b 2125 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2126
2127 return 1;
2128}
2129
82bc955f
TI		 2130/* add playback controls for HP output */
2131static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2132 struct auto_pin_cfg *cfg)
2133{
2134 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2135 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2136 unsigned int wid_caps;
2137
2138 if (! pin)
2139 return 0;
2140
2141 wid_caps = get_wcaps(codec, pin);
505cb341 2142 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2143 spec->hp_detect = 1;
82bc955f
TI		 2144
2145 return 0;
2146}
2147
160ea0dc
RF		 2148/* add playback controls for LFE output */
2149static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2150 struct auto_pin_cfg *cfg)
2151{
2152 struct sigmatel_spec *spec = codec->spec;
2153 int err;
2154 hda_nid_t lfe_pin = 0x0;
2155 int i;
2156
2157 /*
2158 * search speaker outs and line outs for a mono speaker pin
2159 * with an amp. If one is found, add LFE controls
2160 * for it.
2161 */
2162 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2163 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2164 unsigned long wcaps = get_wcaps(codec, pin);
2165 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2166 if (wcaps == AC_WCAP_OUT_AMP)
2167 /* found a mono speaker with an amp, must be lfe */
2168 lfe_pin = pin;
2169 }
2170
2171 /* if speaker_outs is 0, then speakers may be in line_outs */
2172 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2173 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2174 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2175 unsigned long cfg;
2176 cfg = snd_hda_codec_read(codec, pin, 0,
2177 AC_VERB_GET_CONFIG_DEFAULT,
2178 0x00);
2179 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2180 unsigned long wcaps = get_wcaps(codec, pin);
2181 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2182 if (wcaps == AC_WCAP_OUT_AMP)
2183 /* found a mono speaker with an amp,
2184 must be lfe */
2185 lfe_pin = pin;
2186 }
2187 }
2188 }
2189
2190 if (lfe_pin) {
eb06ed8f 2191 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2192 if (err < 0)
2193 return err;
2194 }
2195
2196 return 0;
2197}
2198
c7d4b2fa
M		 2199static int stac9200_parse_auto_config(struct hda_codec *codec)
2200{
2201 struct sigmatel_spec *spec = codec->spec;
2202 int err;
2203
df694daa 2204 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2205 return err;
2206
2207 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2208 return err;
2209
82bc955f
TI		 2210 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2211 return err;
2212
160ea0dc
RF		 2213 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2214 return err;
2215
82bc955f 2216 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2217 spec->multiout.dig_out_nid = 0x05;
82bc955f 2218 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2219 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2220
2221 if (spec->kctl_alloc)
2222 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2223
2224 spec->input_mux = &spec->private_imux;
8b65727b 2225 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2226
2227 return 1;
2228}
2229
62fe78e9
SR		 2230/*
2231 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2232 * funky external mute control using GPIO pins.
2233 */
2234
2235static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2236{
2237 unsigned int gpiostate, gpiomask, gpiodir;
2238
2239 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2240 AC_VERB_GET_GPIO_DATA, 0);
2241
2242 if (!muted)
2243 gpiostate |= (1 << pin);
2244 else
2245 gpiostate &= ~(1 << pin);
2246
2247 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2248 AC_VERB_GET_GPIO_MASK, 0);
2249 gpiomask |= (1 << pin);
2250
2251 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2252 AC_VERB_GET_GPIO_DIRECTION, 0);
2253 gpiodir |= (1 << pin);
2254
2255 /* AppleHDA seems to do this -- WTF is this verb?? */
2256 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2257
2258 snd_hda_codec_write(codec, codec->afg, 0,
2259 AC_VERB_SET_GPIO_MASK, gpiomask);
2260 snd_hda_codec_write(codec, codec->afg, 0,
2261 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2262
2263 msleep(1);
2264
2265 snd_hda_codec_write(codec, codec->afg, 0,
2266 AC_VERB_SET_GPIO_DATA, gpiostate);
2267}
2268
314634bc
TI		 2269static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2270 unsigned int event)
2271{
2272 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2273 snd_hda_codec_write_cache(codec, nid, 0,
2274 AC_VERB_SET_UNSOLICITED_ENABLE,
2275 (AC_USRSP_EN | event));
314634bc
TI		 2276}
2277
c7d4b2fa
M		 2278static int stac92xx_init(struct hda_codec *codec)
2279{
2280 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2281 struct auto_pin_cfg *cfg = &spec->autocfg;
2282 int i;
c7d4b2fa 2283
c7d4b2fa
M		 2284 snd_hda_sequence_write(codec, spec->init);
2285
82bc955f
TI		 2286 /* set up pins */
2287 if (spec->hp_detect) {
505cb341 2288 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2289 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2290 enable_pin_detect(codec, cfg->hp_pins[i],
2291 STAC_HP_EVENT);
0a07acaf
TI		 2292 /* force to enable the first line-out; the others are set up
2293 * in unsol_event
2294 */
2295 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2296 AC_PINCTL_OUT_EN);
eb995a8c 2297 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2298 /* fake event to set up pins */
2299 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2300 } else {
2301 stac92xx_auto_init_multi_out(codec);
2302 stac92xx_auto_init_hp_out(codec);
2303 }
2304 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2305 hda_nid_t nid = cfg->input_pins[i];
2306 if (nid) {
2307 unsigned int pinctl = AC_PINCTL_IN_EN;
2308 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2309 pinctl |= stac92xx_get_vref(codec, nid);
2310 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2311 }
82bc955f 2312 }
8b65727b
MP		 2313 if (spec->num_dmics > 0)
2314 for (i = 0; i < spec->num_dmics; i++)
2315 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2316 AC_PINCTL_IN_EN);
2317
82bc955f
TI		 2318 if (cfg->dig_out_pin)
2319 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2320 AC_PINCTL_OUT_EN);
2321 if (cfg->dig_in_pin)
2322 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2323 AC_PINCTL_IN_EN);
2324
62fe78e9
SR		 2325 if (spec->gpio_mute) {
2326 stac922x_gpio_mute(codec, 0, 0);
2327 stac922x_gpio_mute(codec, 1, 0);
2328 }
2329
c7d4b2fa
M		 2330 return 0;
2331}
2332
2f2f4251
M		 2333static void stac92xx_free(struct hda_codec *codec)
2334{
c7d4b2fa
M		 2335 struct sigmatel_spec *spec = codec->spec;
2336 int i;
2337
2338 if (! spec)
2339 return;
2340
2341 if (spec->kctl_alloc) {
2342 for (i = 0; i < spec->num_kctl_used; i++)
2343 kfree(spec->kctl_alloc[i].name);
2344 kfree(spec->kctl_alloc);
2345 }
2346
11b44bbd
RF		 2347 if (spec->bios_pin_configs)
2348 kfree(spec->bios_pin_configs);
2349
c7d4b2fa 2350 kfree(spec);
2f2f4251
M		 2351}
2352
4e55096e
M		 2353static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2354 unsigned int flag)
2355{
2356 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2357 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2358
f9acba43
TI		 2359 if (pin_ctl & AC_PINCTL_IN_EN) {
2360 /*
2361 * we need to check the current set-up direction of
2362 * shared input pins since they can be switched via
2363 * "xxx as Output" mixer switch
2364 */
2365 struct sigmatel_spec *spec = codec->spec;
2366 struct auto_pin_cfg *cfg = &spec->autocfg;
2367 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2368 spec->line_switch) ||
2369 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2370 spec->mic_switch))
2371 return;
2372 }
2373
7b043899
SL		 2374 /* if setting pin direction bits, clear the current
2375 direction bits first */
2376 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2377 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2378
82beb8fd 2379 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2380 AC_VERB_SET_PIN_WIDGET_CONTROL,
2381 pin_ctl | flag);
2382}
2383
2384static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2385 unsigned int flag)
2386{
2387 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2388 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2389 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2390 AC_VERB_SET_PIN_WIDGET_CONTROL,
2391 pin_ctl & ~flag);
2392}
2393
314634bc
TI		 2394static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2395{
2396 if (!nid)
2397 return 0;
2398 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2399 & (1 << 31))
2400 return 1;
2401 return 0;
2402}
2403
2404static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2405{
2406 struct sigmatel_spec *spec = codec->spec;
2407 struct auto_pin_cfg *cfg = &spec->autocfg;
2408 int i, presence;
2409
eb06ed8f
TI		 2410 presence = 0;
2411 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2412 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2413 if (presence)
2414 break;
eb06ed8f 2415 }
4e55096e
M		 2416
2417 if (presence) {
2418 /* disable lineouts, enable hp */
2419 for (i = 0; i < cfg->line_outs; i++)
2420 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2421 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2422 for (i = 0; i < cfg->speaker_outs; i++)
2423 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2424 AC_PINCTL_OUT_EN);
4e55096e
M		 2425 } else {
2426 /* enable lineouts, disable hp */
2427 for (i = 0; i < cfg->line_outs; i++)
2428 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2429 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2430 for (i = 0; i < cfg->speaker_outs; i++)
2431 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2432 AC_PINCTL_OUT_EN);
4e55096e
M		 2433 }
2434}
2435
314634bc
TI		 2436static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2437{
2438 switch (res >> 26) {
2439 case STAC_HP_EVENT:
2440 stac92xx_hp_detect(codec, res);
2441 break;
2442 }
2443}
2444
cb53c626 2445#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2446static int stac92xx_resume(struct hda_codec *codec)
2447{
dc81bed1
TI		 2448 struct sigmatel_spec *spec = codec->spec;
2449
11b44bbd 2450 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2451 snd_hda_sequence_write(codec, spec->init);
2452 if (spec->gpio_mute) {
2453 stac922x_gpio_mute(codec, 0, 0);
2454 stac922x_gpio_mute(codec, 1, 0);
2455 }
82beb8fd
TI		 2456 snd_hda_codec_resume_amp(codec);
2457 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2458 /* invoke unsolicited event to reset the HP state */
2459 if (spec->hp_detect)
2460 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2461 return 0;
2462}
2463#endif
2464
2f2f4251
M		 2465static struct hda_codec_ops stac92xx_patch_ops = {
2466 .build_controls = stac92xx_build_controls,
2467 .build_pcms = stac92xx_build_pcms,
2468 .init = stac92xx_init,
2469 .free = stac92xx_free,
4e55096e 2470 .unsol_event = stac92xx_unsol_event,
cb53c626 2471#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2472 .resume = stac92xx_resume,
2473#endif
2f2f4251
M		 2474};
2475
2476static int patch_stac9200(struct hda_codec *codec)
2477{
2478 struct sigmatel_spec *spec;
c7d4b2fa 2479 int err;
2f2f4251 2480
e560d8d8 2481 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2482 if (spec == NULL)
2483 return -ENOMEM;
2484
2485 codec->spec = spec;
a4eed138 2486 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2487 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2488 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2489 stac9200_models,
2490 stac9200_cfg_tbl);
11b44bbd
RF		 2491 if (spec->board_config < 0) {
2492 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2493 err = stac92xx_save_bios_config_regs(codec);
2494 if (err < 0) {
2495 stac92xx_free(codec);
2496 return err;
2497 }
2498 spec->pin_configs = spec->bios_pin_configs;
2499 } else {
403d1944
MP		 2500 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2501 stac92xx_set_config_regs(codec);
2502 }
2f2f4251
M		 2503
2504 spec->multiout.max_channels = 2;
2505 spec->multiout.num_dacs = 1;
2506 spec->multiout.dac_nids = stac9200_dac_nids;
2507 spec->adc_nids = stac9200_adc_nids;
2508 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2509 spec->num_muxes = 1;
8b65727b 2510 spec->num_dmics = 0;
9e05b7a3 2511 spec->num_adcs = 1;
c7d4b2fa 2512
1194b5b7
TI		 2513 if (spec->board_config == STAC_9200_GATEWAY)
2514 spec->init = stac9200_eapd_init;
2515 else
2516 spec->init = stac9200_core_init;
2f2f4251 2517 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2518
2519 err = stac9200_parse_auto_config(codec);
2520 if (err < 0) {
2521 stac92xx_free(codec);
2522 return err;
2523 }
2f2f4251
M		 2524
2525 codec->patch_ops = stac92xx_patch_ops;
2526
2527 return 0;
2528}
2529
8e21c34c
TD		 2530static int patch_stac925x(struct hda_codec *codec)
2531{
2532 struct sigmatel_spec *spec;
2533 int err;
2534
2535 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2536 if (spec == NULL)
2537 return -ENOMEM;
2538
2539 codec->spec = spec;
a4eed138 2540 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2541 spec->pin_nids = stac925x_pin_nids;
2542 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2543 stac925x_models,
2544 stac925x_cfg_tbl);
9e507abd 2545 again:
8e21c34c 2546 if (spec->board_config < 0) {
2c11f955
TD		 2547 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2548 "using BIOS defaults\n");
8e21c34c
TD		 2549 err = stac92xx_save_bios_config_regs(codec);
2550 if (err < 0) {
2551 stac92xx_free(codec);
2552 return err;
2553 }
2554 spec->pin_configs = spec->bios_pin_configs;
2555 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2556 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2557 stac92xx_set_config_regs(codec);
2558 }
2559
2560 spec->multiout.max_channels = 2;
2561 spec->multiout.num_dacs = 1;
2562 spec->multiout.dac_nids = stac925x_dac_nids;
2563 spec->adc_nids = stac925x_adc_nids;
2564 spec->mux_nids = stac925x_mux_nids;
2565 spec->num_muxes = 1;
9e05b7a3 2566 spec->num_adcs = 1;
2c11f955
TD		 2567 switch (codec->vendor_id) {
2568 case 0x83847632: /* STAC9202 */
2569 case 0x83847633: /* STAC9202D */
2570 case 0x83847636: /* STAC9251 */
2571 case 0x83847637: /* STAC9251D */
2572 spec->num_dmics = 1;
2573 spec->dmic_nids = stac925x_dmic_nids;
2574 break;
2575 default:
2576 spec->num_dmics = 0;
2577 break;
2578 }
8e21c34c
TD		 2579
2580 spec->init = stac925x_core_init;
2581 spec->mixer = stac925x_mixer;
2582
2583 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2584 if (!err) {
2585 if (spec->board_config < 0) {
2586 printk(KERN_WARNING "hda_codec: No auto-config is "
2587 "available, default to model=ref\n");
2588 spec->board_config = STAC_925x_REF;
2589 goto again;
2590 }
2591 err = -EINVAL;
2592 }
8e21c34c
TD		 2593 if (err < 0) {
2594 stac92xx_free(codec);
2595 return err;
2596 }
2597
2598 codec->patch_ops = stac92xx_patch_ops;
2599
2600 return 0;
2601}
2602
2f2f4251
M		 2603static int patch_stac922x(struct hda_codec *codec)
2604{
2605 struct sigmatel_spec *spec;
c7d4b2fa 2606 int err;
2f2f4251 2607
e560d8d8 2608 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2609 if (spec == NULL)
2610 return -ENOMEM;
2611
2612 codec->spec = spec;
a4eed138 2613 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2614 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2615 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2616 stac922x_models,
2617 stac922x_cfg_tbl);
5d5d3bc3 2618 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2619 spec->gpio_mute = 1;
2620 /* Intel Macs have all same PCI SSID, so we need to check
2621 * codec SSID to distinguish the exact models
2622 */
6f0778d8 2623 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2624 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2625
2626 case 0x106b0800:
2627 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2628 break;
5d5d3bc3
IZ		 2629 case 0x106b0600:
2630 case 0x106b0700:
2631 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2632 break;
5d5d3bc3
IZ		 2633 case 0x106b0e00:
2634 case 0x106b0f00:
2635 case 0x106b1600:
2636 case 0x106b1700:
2637 case 0x106b0200:
2638 case 0x106b1e00:
2639 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2640 break;
5d5d3bc3
IZ		 2641 case 0x106b1a00:
2642 case 0x00000100:
2643 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2644 break;
5d5d3bc3
IZ		 2645 case 0x106b0a00:
2646 case 0x106b2200:
2647 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2648 break;
3fc24d85
TI		 2649 }
2650 }
2651
9e507abd 2652 again:
11b44bbd
RF		 2653 if (spec->board_config < 0) {
2654 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2655 "using BIOS defaults\n");
2656 err = stac92xx_save_bios_config_regs(codec);
2657 if (err < 0) {
2658 stac92xx_free(codec);
2659 return err;
2660 }
2661 spec->pin_configs = spec->bios_pin_configs;
2662 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2663 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2664 stac92xx_set_config_regs(codec);
2665 }
2f2f4251 2666
c7d4b2fa
M		 2667 spec->adc_nids = stac922x_adc_nids;
2668 spec->mux_nids = stac922x_mux_nids;
2549413e 2669 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 2670 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 2671 spec->num_dmics = 0;
c7d4b2fa
M		 2672
2673 spec->init = stac922x_core_init;
2f2f4251 2674 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2675
2676 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2677
3cc08dc6 2678 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2679 if (!err) {
2680 if (spec->board_config < 0) {
2681 printk(KERN_WARNING "hda_codec: No auto-config is "
2682 "available, default to model=ref\n");
2683 spec->board_config = STAC_D945_REF;
2684 goto again;
2685 }
2686 err = -EINVAL;
2687 }
3cc08dc6
MP		 2688 if (err < 0) {
2689 stac92xx_free(codec);
2690 return err;
2691 }
2692
2693 codec->patch_ops = stac92xx_patch_ops;
2694
807a4636
TI		 2695 /* Fix Mux capture level; max to 2 */
2696 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2697 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2698 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2699 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2700 (0 << AC_AMPCAP_MUTE_SHIFT));
2701
3cc08dc6
MP		 2702 return 0;
2703}
2704
2705static int patch_stac927x(struct hda_codec *codec)
2706{
2707 struct sigmatel_spec *spec;
2708 int err;
2709
2710 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2711 if (spec == NULL)
2712 return -ENOMEM;
2713
2714 codec->spec = spec;
a4eed138 2715 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2716 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2717 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2718 stac927x_models,
2719 stac927x_cfg_tbl);
9e507abd 2720 again:
11b44bbd 2721 if (spec->board_config < 0) {
3cc08dc6 2722 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2723 err = stac92xx_save_bios_config_regs(codec);
2724 if (err < 0) {
2725 stac92xx_free(codec);
2726 return err;
2727 }
2728 spec->pin_configs = spec->bios_pin_configs;
2729 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2730 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2731 stac92xx_set_config_regs(codec);
2732 }
2733
81d3dbde 2734 switch (spec->board_config) {
93ed1503 2735 case STAC_D965_3ST:
81d3dbde
TD		 2736 spec->adc_nids = stac927x_adc_nids;
2737 spec->mux_nids = stac927x_mux_nids;
2549413e 2738 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2739 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
8b65727b 2740 spec->num_dmics = 0;
93ed1503 2741 spec->init = d965_core_init;
9e05b7a3 2742 spec->mixer = stac927x_mixer;
81d3dbde 2743 break;
93ed1503
TD		 2744 case STAC_D965_5ST:
2745 spec->adc_nids = stac927x_adc_nids;
2746 spec->mux_nids = stac927x_mux_nids;
2549413e 2747 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2748 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
8b65727b 2749 spec->num_dmics = 0;
93ed1503 2750 spec->init = d965_core_init;
9e05b7a3 2751 spec->mixer = stac927x_mixer;
81d3dbde
TD		 2752 break;
2753 default:
2754 spec->adc_nids = stac927x_adc_nids;
2755 spec->mux_nids = stac927x_mux_nids;
2549413e 2756 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2757 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
8b65727b 2758 spec->num_dmics = 0;
81d3dbde
TD		 2759 spec->init = stac927x_core_init;
2760 spec->mixer = stac927x_mixer;
2761 }
3cc08dc6
MP		 2762
2763 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2764 /* GPIO0 High = Enable EAPD */
8259980e
TI		 2765 spec->gpio_mask = spec->gpio_data = 0x00000001;
2766 stac92xx_enable_gpio_mask(codec);
92a22beb 2767
3cc08dc6 2768 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2769 if (!err) {
2770 if (spec->board_config < 0) {
2771 printk(KERN_WARNING "hda_codec: No auto-config is "
2772 "available, default to model=ref\n");
2773 spec->board_config = STAC_D965_REF;
2774 goto again;
2775 }
2776 err = -EINVAL;
2777 }
c7d4b2fa
M		 2778 if (err < 0) {
2779 stac92xx_free(codec);
2780 return err;
2781 }
2f2f4251
M		 2782
2783 codec->patch_ops = stac92xx_patch_ops;
2784
2785 return 0;
2786}
2787
f3302a59
MP		 2788static int patch_stac9205(struct hda_codec *codec)
2789{
2790 struct sigmatel_spec *spec;
8259980e 2791 int err;
f3302a59
MP		 2792
2793 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2794 if (spec == NULL)
2795 return -ENOMEM;
2796
2797 codec->spec = spec;
a4eed138 2798 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2799 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2800 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2801 stac9205_models,
2802 stac9205_cfg_tbl);
9e507abd 2803 again:
11b44bbd
RF		 2804 if (spec->board_config < 0) {
2805 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2806 err = stac92xx_save_bios_config_regs(codec);
2807 if (err < 0) {
2808 stac92xx_free(codec);
2809 return err;
2810 }
2811 spec->pin_configs = spec->bios_pin_configs;
2812 } else {
f3302a59
MP		 2813 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2814 stac92xx_set_config_regs(codec);
2815 }
2816
2817 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 2818 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 2819 spec->mux_nids = stac9205_mux_nids;
2549413e 2820 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2821 spec->dmic_nids = stac9205_dmic_nids;
2549413e 2822 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
8b65727b 2823 spec->dmux_nid = 0x1d;
f3302a59
MP		 2824
2825 spec->init = stac9205_core_init;
2826 spec->mixer = stac9205_mixer;
2827
2828 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2829
ae0a8ed8 2830 switch (spec->board_config){
ae0a8ed8 2831 case STAC_9205_DELL_M43:
87d48363
MR		 2832 /* Enable SPDIF in/out */
2833 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2834 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2835
8259980e 2836 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2837 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2838 * GPIO2 High = Headphone Mute
2839 */
8259980e 2840 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2841 break;
2842 default:
2843 /* GPIO0 High = EAPD */
2844 spec->gpio_mask = spec->gpio_data = 0x00000001;
2845 break;
2846 }
33382403 2847
8259980e 2848 stac92xx_enable_gpio_mask(codec);
f3302a59 2849 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2850 if (!err) {
2851 if (spec->board_config < 0) {
2852 printk(KERN_WARNING "hda_codec: No auto-config is "
2853 "available, default to model=ref\n");
2854 spec->board_config = STAC_9205_REF;
2855 goto again;
2856 }
2857 err = -EINVAL;
2858 }
f3302a59
MP		 2859 if (err < 0) {
2860 stac92xx_free(codec);
2861 return err;
2862 }
2863
2864 codec->patch_ops = stac92xx_patch_ops;
2865
2866 return 0;
2867}
2868
db064e50 2869/*
6d859065 2870 * STAC9872 hack
db064e50
TI		 2871 */
2872
99ccc560 2873/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2874static hda_nid_t vaio_dacs[] = { 0x2 };
2875#define VAIO_HP_DAC 0x5
2876static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2877static hda_nid_t vaio_mux_nids[] = { 0x15 };
2878
2879static struct hda_input_mux vaio_mux = {
a3a2f429 2880 .num_items = 3,
db064e50 2881 .items = {
d773781c 2882 /* { "HP", 0x0 }, */
1624cb9a
TI		 2883 { "Mic Jack", 0x1 },
2884 { "Internal Mic", 0x2 },
db064e50
TI		 2885 { "PCM", 0x3 },
2886 }
2887};
2888
2889static struct hda_verb vaio_init[] = {
2890 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 2891 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 2892 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2893 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2894 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2895 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2896 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2897 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2898 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2899 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2900 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2901 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2902 {}
2903};
2904
6d859065
GM		 2905static struct hda_verb vaio_ar_init[] = {
2906 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2907 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2908 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2909 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2910/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2911 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2912 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2913 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2914 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2915/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2916 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2917 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2918 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2919 {}
2920};
2921
db064e50 2922/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2923static struct hda_bind_ctls vaio_bind_master_vol = {
2924 .ops = &snd_hda_bind_vol,
2925 .values = {
2926 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2927 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2928 0
2929 },
2930};
db064e50
TI		 2931
2932/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2933static struct hda_bind_ctls vaio_bind_master_sw = {
2934 .ops = &snd_hda_bind_sw,
2935 .values = {
2936 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2937 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2938 0,
2939 },
2940};
db064e50
TI		 2941
2942static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2943 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2944 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2945 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2946 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2947 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2948 {
2949 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2950 .name = "Capture Source",
2951 .count = 1,
2952 .info = stac92xx_mux_enum_info,
2953 .get = stac92xx_mux_enum_get,
2954 .put = stac92xx_mux_enum_put,
2955 },
2956 {}
2957};
2958
6d859065 2959static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2960 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2961 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2962 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2963 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2964 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2965 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2966 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2967 {
2968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2969 .name = "Capture Source",
2970 .count = 1,
2971 .info = stac92xx_mux_enum_info,
2972 .get = stac92xx_mux_enum_get,
2973 .put = stac92xx_mux_enum_put,
2974 },
2975 {}
2976};
2977
2978static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2979 .build_controls = stac92xx_build_controls,
2980 .build_pcms = stac92xx_build_pcms,
2981 .init = stac92xx_init,
2982 .free = stac92xx_free,
cb53c626 2983#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2984 .resume = stac92xx_resume,
2985#endif
2986};
2987
72e7b0dd
TI		 2988static int stac9872_vaio_init(struct hda_codec *codec)
2989{
2990 int err;
2991
2992 err = stac92xx_init(codec);
2993 if (err < 0)
2994 return err;
2995 if (codec->patch_ops.unsol_event)
2996 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2997 return 0;
2998}
2999
3000static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3001{
3002 if (get_pin_presence(codec, 0x0a)) {
3003 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3004 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3005 } else {
3006 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3007 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3008 }
3009}
3010
3011static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3012{
3013 switch (res >> 26) {
3014 case STAC_HP_EVENT:
3015 stac9872_vaio_hp_detect(codec, res);
3016 break;
3017 }
3018}
3019
3020static struct hda_codec_ops stac9872_vaio_patch_ops = {
3021 .build_controls = stac92xx_build_controls,
3022 .build_pcms = stac92xx_build_pcms,
3023 .init = stac9872_vaio_init,
3024 .free = stac92xx_free,
3025 .unsol_event = stac9872_vaio_unsol_event,
3026#ifdef CONFIG_PM
3027 .resume = stac92xx_resume,
3028#endif
3029};
3030
6d859065
GM		 3031enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3032 CXD9872RD_VAIO,
3033 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3034 STAC9872AK_VAIO,
3035 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3036 STAC9872K_VAIO,
3037 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3038 CXD9872AKD_VAIO,
3039 STAC_9872_MODELS,
3040};
3041
3042static const char *stac9872_models[STAC_9872_MODELS] = {
3043 [CXD9872RD_VAIO] = "vaio",
3044 [CXD9872AKD_VAIO] = "vaio-ar",
3045};
3046
3047static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3048 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3049 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3050 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3051 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3052 {}
3053};
3054
6d859065 3055static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3056{
3057 struct sigmatel_spec *spec;
3058 int board_config;
3059
f5fcc13c
TI		 3060 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3061 stac9872_models,
3062 stac9872_cfg_tbl);
db064e50
TI		 3063 if (board_config < 0)
3064 /* unknown config, let generic-parser do its job... */
3065 return snd_hda_parse_generic_codec(codec);
3066
3067 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3068 if (spec == NULL)
3069 return -ENOMEM;
3070
3071 codec->spec = spec;
3072 switch (board_config) {
6d859065
GM		 3073 case CXD9872RD_VAIO:
3074 case STAC9872AK_VAIO:
3075 case STAC9872K_VAIO:
db064e50
TI		 3076 spec->mixer = vaio_mixer;
3077 spec->init = vaio_init;
3078 spec->multiout.max_channels = 2;
3079 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3080 spec->multiout.dac_nids = vaio_dacs;
3081 spec->multiout.hp_nid = VAIO_HP_DAC;
3082 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3083 spec->adc_nids = vaio_adcs;
3084 spec->input_mux = &vaio_mux;
3085 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3086 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3087 break;
6d859065
GM		 3088
3089 case CXD9872AKD_VAIO:
3090 spec->mixer = vaio_ar_mixer;
3091 spec->init = vaio_ar_init;
3092 spec->multiout.max_channels = 2;
3093 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3094 spec->multiout.dac_nids = vaio_dacs;
3095 spec->multiout.hp_nid = VAIO_HP_DAC;
3096 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3097 spec->adc_nids = vaio_adcs;
3098 spec->input_mux = &vaio_mux;
3099 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3100 codec->patch_ops = stac9872_patch_ops;
6d859065 3101 break;
db064e50
TI		 3102 }
3103
db064e50
TI		 3104 return 0;
3105}
3106
3107
2f2f4251
M		 3108/*
3109 * patch entries
3110 */
3111struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3112 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3113 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3114 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3115 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3116 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3117 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3118 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3119 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3120 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3121 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3122 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3123 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3124 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3125 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3126 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3127 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3128 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3129 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3130 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3131 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3132 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3133 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3134 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3135 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3136 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3137 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3138 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3139 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3140 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3141 /* The following does not take into account .id=0x83847661 when subsys =
3142 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3143 * currently not fully supported.
3144 */
3145 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3146 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3147 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3148 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3149 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3150 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3151 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3152 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3153 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3154 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3155 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 3156 {} /* terminator */
3157};
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