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ALSA: hda - Add extra volume offset to standard volume amp macros
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
f5fcc13c
TI		 69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
e1f0d669
MR		 79 STAC_92HD73XX_MODELS
80};
81
d0513fc6
MR		 82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
e035b841
MR		 87enum {
88 STAC_92HD71BXX_REF,
a7662640
MR		 89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
1b0652eb 93 STAC_HP_DV5,
e035b841
MR		 94 STAC_92HD71BXX_MODELS
95};
96
8e21c34c
TD		 97enum {
98 STAC_925x_REF,
9cb36c2a
MCC		 99 STAC_M1,
100 STAC_M1_2,
101 STAC_M2,
8e21c34c 102 STAC_M2_2,
9cb36c2a
MCC		 103 STAC_M3,
104 STAC_M5,
105 STAC_M6,
8e21c34c
TD		 106 STAC_925x_MODELS
107};
108
f5fcc13c
TI		 109enum {
110 STAC_D945_REF,
111 STAC_D945GTP3,
112 STAC_D945GTP5,
5d5d3bc3
IZ		 113 STAC_INTEL_MAC_V1,
114 STAC_INTEL_MAC_V2,
115 STAC_INTEL_MAC_V3,
116 STAC_INTEL_MAC_V4,
117 STAC_INTEL_MAC_V5,
536319af
NB		 118 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
119 * is given, one of the above models will be
120 * chosen according to the subsystem id. */
dfe495d0 121 /* for backward compatibility */
f5fcc13c 122 STAC_MACMINI,
3fc24d85 123 STAC_MACBOOK,
6f0778d8
NB		 124 STAC_MACBOOK_PRO_V1,
125 STAC_MACBOOK_PRO_V2,
f16928fb 126 STAC_IMAC_INTEL,
0dae0f83 127 STAC_IMAC_INTEL_20,
8c650087 128 STAC_ECS_202,
dfe495d0
TI		 129 STAC_922X_DELL_D81,
130 STAC_922X_DELL_D82,
131 STAC_922X_DELL_M81,
132 STAC_922X_DELL_M82,
f5fcc13c
TI		 133 STAC_922X_MODELS
134};
135
136enum {
e28d8322 137 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 138 STAC_D965_REF,
139 STAC_D965_3ST,
140 STAC_D965_5ST,
4ff076e5 141 STAC_DELL_3ST,
8e9068b1 142 STAC_DELL_BIOS,
f5fcc13c
TI		 143 STAC_927X_MODELS
144};
403d1944 145
74aeaabc
MR		 146struct sigmatel_event {
147 hda_nid_t nid;
c6e4c666
TI		 148 unsigned char type;
149 unsigned char tag;
74aeaabc
MR		 150 int data;
151};
152
153struct sigmatel_jack {
154 hda_nid_t nid;
155 int type;
156 struct snd_jack *jack;
157};
158
2f2f4251 159struct sigmatel_spec {
c8b6bf9b 160 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 161 unsigned int num_mixers;
162
403d1944 163 int board_config;
c0cea0d0 164 unsigned int eapd_switch: 1;
c7d4b2fa 165 unsigned int surr_switch: 1;
3cc08dc6 166 unsigned int alt_switch: 1;
82bc955f 167 unsigned int hp_detect: 1;
00ef50c2 168 unsigned int spdif_mute: 1;
c7d4b2fa 169
4fe5195c 170 /* gpio lines */
0fc9dec4 171 unsigned int eapd_mask;
4fe5195c
MR		 172 unsigned int gpio_mask;
173 unsigned int gpio_dir;
174 unsigned int gpio_data;
175 unsigned int gpio_mute;
176
8daaaa97
MR		 177 /* stream */
178 unsigned int stream_delay;
179
4fe5195c 180 /* analog loopback */
e1f0d669
MR		 181 unsigned char aloopback_mask;
182 unsigned char aloopback_shift;
8259980e 183
a64135a2
MR		 184 /* power management */
185 unsigned int num_pwrs;
d0513fc6 186 unsigned int *pwr_mapping;
a64135a2 187 hda_nid_t *pwr_nids;
b76c850f 188 hda_nid_t *dac_list;
a64135a2 189
74aeaabc
MR		 190 /* jack detection */
191 struct snd_array jacks;
192
193 /* events */
194 struct snd_array events;
195
2f2f4251 196 /* playback */
b22b4821 197 struct hda_input_mux *mono_mux;
89385035 198 struct hda_input_mux *amp_mux;
b22b4821 199 unsigned int cur_mmux;
2f2f4251 200 struct hda_multi_out multiout;
3cc08dc6 201 hda_nid_t dac_nids[5];
c21ca4a8
TI		 202 hda_nid_t hp_dacs[5];
203 hda_nid_t speaker_dacs[5];
2f2f4251
M		 204
205 /* capture */
206 hda_nid_t *adc_nids;
2f2f4251 207 unsigned int num_adcs;
dabbed6f
M		 208 hda_nid_t *mux_nids;
209 unsigned int num_muxes;
8b65727b
MP		 210 hda_nid_t *dmic_nids;
211 unsigned int num_dmics;
e1f0d669 212 hda_nid_t *dmux_nids;
1697055e 213 unsigned int num_dmuxes;
d9737751
MR		 214 hda_nid_t *smux_nids;
215 unsigned int num_smuxes;
65973632 216 const char **spdif_labels;
d9737751 217
dabbed6f 218 hda_nid_t dig_in_nid;
b22b4821 219 hda_nid_t mono_nid;
1cd2224c
MR		 220 hda_nid_t anabeep_nid;
221 hda_nid_t digbeep_nid;
2f2f4251 222
2f2f4251
M		 223 /* pin widgets */
224 hda_nid_t *pin_nids;
225 unsigned int num_pins;
2f2f4251 226 unsigned int *pin_configs;
2f2f4251
M		 227
228 /* codec specific stuff */
229 struct hda_verb *init;
c8b6bf9b 230 struct snd_kcontrol_new *mixer;
2f2f4251
M		 231
232 /* capture source */
8b65727b 233 struct hda_input_mux *dinput_mux;
e1f0d669 234 unsigned int cur_dmux[2];
c7d4b2fa 235 struct hda_input_mux *input_mux;
3cc08dc6 236 unsigned int cur_mux[3];
d9737751
MR		 237 struct hda_input_mux *sinput_mux;
238 unsigned int cur_smux[2];
2a9c7816
MR		 239 unsigned int cur_amux;
240 hda_nid_t *amp_nids;
241 unsigned int num_amps;
8daaaa97 242 unsigned int powerdown_adcs;
2f2f4251 243
403d1944
MP		 244 /* i/o switches */
245 unsigned int io_switch[2];
0fb87bb4 246 unsigned int clfe_swap;
c21ca4a8
TI		 247 hda_nid_t line_switch; /* shared line-in for input and output */
248 hda_nid_t mic_switch; /* shared mic-in for input and output */
249 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 250 unsigned int aloopback;
2f2f4251 251
c7d4b2fa
M		 252 struct hda_pcm pcm_rec[2]; /* PCM information */
253
254 /* dynamic controls and input_mux */
255 struct auto_pin_cfg autocfg;
603c4019 256 struct snd_array kctls;
8b65727b 257 struct hda_input_mux private_dimux;
c7d4b2fa 258 struct hda_input_mux private_imux;
d9737751 259 struct hda_input_mux private_smux;
89385035 260 struct hda_input_mux private_amp_mux;
b22b4821 261 struct hda_input_mux private_mono_mux;
2f2f4251
M		 262};
263
264static hda_nid_t stac9200_adc_nids[1] = {
265 0x03,
266};
267
268static hda_nid_t stac9200_mux_nids[1] = {
269 0x0c,
270};
271
272static hda_nid_t stac9200_dac_nids[1] = {
273 0x02,
274};
275
a64135a2
MR		 276static hda_nid_t stac92hd73xx_pwr_nids[8] = {
277 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
278 0x0f, 0x10, 0x11
279};
280
0ffa9807
MR		 281static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
282 0x26, 0,
283};
284
e1f0d669
MR		 285static hda_nid_t stac92hd73xx_adc_nids[2] = {
286 0x1a, 0x1b
287};
288
2a9c7816
MR		 289#define DELL_M6_AMP 2
290static hda_nid_t stac92hd73xx_amp_nids[3] = {
291 0x0b, 0x0c, 0x0e
89385035
MR		 292};
293
e1f0d669
MR		 294#define STAC92HD73XX_NUM_DMICS 2
295static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
296 0x13, 0x14, 0
297};
298
299#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 300
301static hda_nid_t stac92hd73xx_mux_nids[4] = {
302 0x28, 0x29, 0x2a, 0x2b,
303};
304
305static hda_nid_t stac92hd73xx_dmux_nids[2] = {
306 0x20, 0x21,
307};
308
d9737751
MR		 309static hda_nid_t stac92hd73xx_smux_nids[2] = {
310 0x22, 0x23,
311};
312
d0513fc6
MR		 313#define STAC92HD83XXX_NUM_DMICS 2
314static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
315 0x11, 0x12, 0
316};
317
d0513fc6 318#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 319
320static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
321 0x17, 0x18,
322};
323
324static hda_nid_t stac92hd83xxx_adc_nids[2] = {
325 0x15, 0x16,
326};
327
328static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
329 0xa, 0xb, 0xd, 0xe,
330};
331
0ffa9807
MR		 332static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
333 0x1e, 0,
334};
335
d0513fc6 336static unsigned int stac92hd83xxx_pwr_mapping[4] = {
989738c4 337 0x03, 0x0c, 0x20, 0x80,
d0513fc6
MR		 338};
339
9248f269 340static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR		 341 0xc,
342};
343
a64135a2
MR		 344static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
345 0x0a, 0x0d, 0x0f
346};
347
e035b841
MR		 348static hda_nid_t stac92hd71bxx_adc_nids[2] = {
349 0x12, 0x13,
350};
351
352static hda_nid_t stac92hd71bxx_mux_nids[2] = {
353 0x1a, 0x1b
354};
355
4b33c767
MR		 356static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
357 0x1c, 0x1d,
e1f0d669
MR		 358};
359
d9737751
MR		 360static hda_nid_t stac92hd71bxx_smux_nids[2] = {
361 0x24, 0x25,
362};
363
e035b841
MR		 364#define STAC92HD71BXX_NUM_DMICS 2
365static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
366 0x18, 0x19, 0
367};
368
0ffa9807
MR		 369static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
370 0x22, 0
371};
372
8e21c34c
TD		 373static hda_nid_t stac925x_adc_nids[1] = {
374 0x03,
375};
376
377static hda_nid_t stac925x_mux_nids[1] = {
378 0x0f,
379};
380
381static hda_nid_t stac925x_dac_nids[1] = {
382 0x02,
383};
384
f6e9852a
TI		 385#define STAC925X_NUM_DMICS 1
386static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
387 0x15, 0
2c11f955
TD		 388};
389
1697055e
TI		 390static hda_nid_t stac925x_dmux_nids[1] = {
391 0x14,
392};
393
2f2f4251
M		 394static hda_nid_t stac922x_adc_nids[2] = {
395 0x06, 0x07,
396};
397
398static hda_nid_t stac922x_mux_nids[2] = {
399 0x12, 0x13,
400};
401
3cc08dc6
MP		 402static hda_nid_t stac927x_adc_nids[3] = {
403 0x07, 0x08, 0x09
404};
405
406static hda_nid_t stac927x_mux_nids[3] = {
407 0x15, 0x16, 0x17
408};
409
d9737751
MR		 410static hda_nid_t stac927x_smux_nids[1] = {
411 0x21,
412};
413
b76c850f
MR		 414static hda_nid_t stac927x_dac_nids[6] = {
415 0x02, 0x03, 0x04, 0x05, 0x06, 0
416};
417
e1f0d669
MR		 418static hda_nid_t stac927x_dmux_nids[1] = {
419 0x1b,
420};
421
7f16859a
MR		 422#define STAC927X_NUM_DMICS 2
423static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
424 0x13, 0x14, 0
425};
426
65973632
MR		 427static const char *stac927x_spdif_labels[5] = {
428 "Digital Playback", "ADAT", "Analog Mux 1",
429 "Analog Mux 2", "Analog Mux 3"
430};
431
f3302a59
MP		 432static hda_nid_t stac9205_adc_nids[2] = {
433 0x12, 0x13
434};
435
436static hda_nid_t stac9205_mux_nids[2] = {
437 0x19, 0x1a
438};
439
e1f0d669 440static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 441 0x1d,
e1f0d669
MR		 442};
443
d9737751
MR		 444static hda_nid_t stac9205_smux_nids[1] = {
445 0x21,
446};
447
f6e9852a
TI		 448#define STAC9205_NUM_DMICS 2
449static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
450 0x17, 0x18, 0
8b65727b
MP		 451};
452
c7d4b2fa 453static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 454 0x08, 0x09, 0x0d, 0x0e,
455 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 456};
457
8e21c34c
TD		 458static hda_nid_t stac925x_pin_nids[8] = {
459 0x07, 0x08, 0x0a, 0x0b,
460 0x0c, 0x0d, 0x10, 0x11,
461};
462
2f2f4251
M		 463static hda_nid_t stac922x_pin_nids[10] = {
464 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
465 0x0f, 0x10, 0x11, 0x15, 0x1b,
466};
467
a7662640 468static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 469 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
470 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 471 0x14, 0x22, 0x23
e1f0d669
MR		 472};
473
d0513fc6
MR		 474static hda_nid_t stac92hd83xxx_pin_nids[14] = {
475 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
476 0x0f, 0x10, 0x11, 0x12, 0x13,
477 0x1d, 0x1e, 0x1f, 0x20
478};
0ffa9807 479static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 480 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
481 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 482 0x1f,
e035b841
MR		 483};
484
3cc08dc6
MP		 485static hda_nid_t stac927x_pin_nids[14] = {
486 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
487 0x0f, 0x10, 0x11, 0x12, 0x13,
488 0x14, 0x21, 0x22, 0x23,
489};
490
f3302a59
MP		 491static hda_nid_t stac9205_pin_nids[12] = {
492 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
493 0x0f, 0x14, 0x16, 0x17, 0x18,
494 0x21, 0x22,
f3302a59
MP		 495};
496
89385035
MR		 497#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
498
499static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
500 struct snd_ctl_elem_value *ucontrol)
501{
502 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
503 struct sigmatel_spec *spec = codec->spec;
504 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
505
506 kcontrol->private_value ^= get_amp_nid(kcontrol);
507 kcontrol->private_value |= nid;
508
509 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
510}
511
512static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
513 struct snd_ctl_elem_value *ucontrol)
514{
515 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
516 struct sigmatel_spec *spec = codec->spec;
517 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
518
519 kcontrol->private_value ^= get_amp_nid(kcontrol);
520 kcontrol->private_value |= nid;
521
522 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
523}
524
8b65727b
MP		 525static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_info *uinfo)
527{
528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
529 struct sigmatel_spec *spec = codec->spec;
530 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
531}
532
533static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_value *ucontrol)
535{
536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
537 struct sigmatel_spec *spec = codec->spec;
e1f0d669 538 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 539
e1f0d669 540 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 541 return 0;
542}
543
544static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
545 struct snd_ctl_elem_value *ucontrol)
546{
547 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
548 struct sigmatel_spec *spec = codec->spec;
e1f0d669 549 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 550
551 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 552 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 553}
554
d9737751
MR		 555static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_info *uinfo)
557{
558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct sigmatel_spec *spec = codec->spec;
560 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
561}
562
563static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
564 struct snd_ctl_elem_value *ucontrol)
565{
566 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
567 struct sigmatel_spec *spec = codec->spec;
568 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
569
570 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
571 return 0;
572}
573
574static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
575 struct snd_ctl_elem_value *ucontrol)
576{
577 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
578 struct sigmatel_spec *spec = codec->spec;
00ef50c2 579 struct hda_input_mux *smux = &spec->private_smux;
d9737751 580 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 581 int err, val;
582 hda_nid_t nid;
d9737751 583
00ef50c2 584 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 585 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 586 if (err < 0)
587 return err;
588
589 if (spec->spdif_mute) {
590 if (smux_idx == 0)
591 nid = spec->multiout.dig_out_nid;
592 else
593 nid = codec->slave_dig_outs[smux_idx - 1];
594 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 595 val = HDA_AMP_MUTE;
00ef50c2 596 else
c9b46f91 597 val = 0;
00ef50c2 598 /* un/mute SPDIF out */
c9b46f91
TI		 599 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
600 HDA_AMP_MUTE, val);
00ef50c2
MR		 601 }
602 return 0;
d9737751
MR		 603}
604
c8b6bf9b 605static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 606{
607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
608 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 609 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 610}
611
c8b6bf9b 612static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 613{
614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
615 struct sigmatel_spec *spec = codec->spec;
616 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
617
618 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
619 return 0;
620}
621
c8b6bf9b 622static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 623{
624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
625 struct sigmatel_spec *spec = codec->spec;
626 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
627
c7d4b2fa 628 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 629 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
630}
631
b22b4821
MR		 632static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_info *uinfo)
634{
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
638}
639
640static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *ucontrol)
642{
643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
644 struct sigmatel_spec *spec = codec->spec;
645
646 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
647 return 0;
648}
649
650static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
655
656 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
657 spec->mono_nid, &spec->cur_mmux);
658}
659
89385035
MR		 660static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_info *uinfo)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
665 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
666}
667
668static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
669 struct snd_ctl_elem_value *ucontrol)
670{
671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
672 struct sigmatel_spec *spec = codec->spec;
673
674 ucontrol->value.enumerated.item[0] = spec->cur_amux;
675 return 0;
676}
677
678static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
679 struct snd_ctl_elem_value *ucontrol)
680{
681 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
682 struct sigmatel_spec *spec = codec->spec;
683 struct snd_kcontrol *ctl =
684 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
685 if (!ctl)
686 return -EINVAL;
687
688 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
689 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
690
691 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
692 0, &spec->cur_amux);
693}
694
5f10c4a9
ML		 695#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
696
697static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
698 struct snd_ctl_elem_value *ucontrol)
699{
700 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 701 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 702 struct sigmatel_spec *spec = codec->spec;
703
e1f0d669
MR		 704 ucontrol->value.integer.value[0] = !!(spec->aloopback &
705 (spec->aloopback_mask << idx));
5f10c4a9
ML		 706 return 0;
707}
708
709static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
710 struct snd_ctl_elem_value *ucontrol)
711{
712 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
713 struct sigmatel_spec *spec = codec->spec;
e1f0d669 714 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 715 unsigned int dac_mode;
e1f0d669 716 unsigned int val, idx_val;
5f10c4a9 717
e1f0d669
MR		 718 idx_val = spec->aloopback_mask << idx;
719 if (ucontrol->value.integer.value[0])
720 val = spec->aloopback | idx_val;
721 else
722 val = spec->aloopback & ~idx_val;
68ea7b2f 723 if (spec->aloopback == val)
5f10c4a9
ML		 724 return 0;
725
68ea7b2f 726 spec->aloopback = val;
5f10c4a9 727
e1f0d669
MR		 728 /* Only return the bits defined by the shift value of the
729 * first two bytes of the mask
730 */
5f10c4a9 731 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 732 kcontrol->private_value & 0xFFFF, 0x0);
733 dac_mode >>= spec->aloopback_shift;
5f10c4a9 734
e1f0d669 735 if (spec->aloopback & idx_val) {
5f10c4a9 736 snd_hda_power_up(codec);
e1f0d669 737 dac_mode |= idx_val;
5f10c4a9
ML		 738 } else {
739 snd_hda_power_down(codec);
e1f0d669 740 dac_mode &= ~idx_val;
5f10c4a9
ML		 741 }
742
743 snd_hda_codec_write_cache(codec, codec->afg, 0,
744 kcontrol->private_value >> 16, dac_mode);
745
746 return 1;
747}
748
c7d4b2fa 749static struct hda_verb stac9200_core_init[] = {
2f2f4251 750 /* set dac0mux for dac converter */
c7d4b2fa 751 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 752 {}
753};
754
1194b5b7
TI		 755static struct hda_verb stac9200_eapd_init[] = {
756 /* set dac0mux for dac converter */
757 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
758 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
759 {}
760};
761
e1f0d669
MR		 762static struct hda_verb stac92hd73xx_6ch_core_init[] = {
763 /* set master volume and direct control */
764 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 765 /* setup adcs to point to mixer */
766 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
767 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 768 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
769 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 /* setup import muxs */
772 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
773 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
776 {}
777};
778
d654a660
MR		 779static struct hda_verb dell_eq_core_init[] = {
780 /* set master volume to max value without distortion
781 * and direct control */
782 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 783 /* setup adcs to point to mixer */
784 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 /* setup import muxs */
787 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
791 {}
792};
793
52fe0f9d 794static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 795 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 796 /* setup adcs to point to mixer */
797 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
798 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
799 /* setup import muxs */
800 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
803 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
804 {}
805};
806
e1f0d669
MR		 807static struct hda_verb stac92hd73xx_8ch_core_init[] = {
808 /* set master volume and direct control */
809 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 810 /* setup adcs to point to mixer */
811 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
812 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 813 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 /* setup import muxs */
817 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
821 {}
822};
823
824static struct hda_verb stac92hd73xx_10ch_core_init[] = {
825 /* set master volume and direct control */
826 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 827 /* dac3 is connected to import3 mux */
828 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 829 /* setup adcs to point to mixer */
830 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
831 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 832 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
833 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 /* setup import muxs */
836 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
837 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
840 {}
841};
842
d0513fc6
MR		 843static struct hda_verb stac92hd83xxx_core_init[] = {
844 /* start of config #1 */
845 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
846
847 /* start of config #2 */
848 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
849 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
851
852 /* power state controls amps */
853 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 854 {}
d0513fc6
MR		 855};
856
e035b841 857static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 858 /* set master volume and direct control */
859 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 860 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
861 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
862 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
863 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 864 {}
541eee87
MR		 865};
866
4b33c767 867#define HD_DISABLE_PORTF 2
541eee87 868static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 869 /* start of config #1 */
870
871 /* connect port 0f to audio mixer */
872 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 873 /* unmute right and left channels for node 0x0f */
874 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
875 /* start of config #2 */
876
e035b841
MR		 877 /* set master volume and direct control */
878 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 879 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 880 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
881 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 882 {}
883};
884
8e21c34c
TD		 885static struct hda_verb stac925x_core_init[] = {
886 /* set dac0mux for dac converter */
887 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 888 /* mute the master volume */
889 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 890 {}
891};
892
c7d4b2fa 893static struct hda_verb stac922x_core_init[] = {
2f2f4251 894 /* set master volume and direct control */
c7d4b2fa 895 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 896 {}
897};
898
93ed1503 899static struct hda_verb d965_core_init[] = {
19039bd0 900 /* set master volume and direct control */
93ed1503 901 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 902 /* unmute node 0x1b */
903 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
904 /* select node 0x03 as DAC */
905 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
906 {}
907};
908
3cc08dc6
MP		 909static struct hda_verb stac927x_core_init[] = {
910 /* set master volume and direct control */
911 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 912 /* enable analog pc beep path */
913 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 914 {}
915};
916
f3302a59
MP		 917static struct hda_verb stac9205_core_init[] = {
918 /* set master volume and direct control */
919 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 920 /* enable analog pc beep path */
921 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 922 {}
923};
924
b22b4821
MR		 925#define STAC_MONO_MUX \
926 { \
927 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
928 .name = "Mono Mux", \
929 .count = 1, \
930 .info = stac92xx_mono_mux_enum_info, \
931 .get = stac92xx_mono_mux_enum_get, \
932 .put = stac92xx_mono_mux_enum_put, \
933 }
934
89385035
MR		 935#define STAC_AMP_MUX \
936 { \
937 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
938 .name = "Amp Selector Capture Switch", \
939 .count = 1, \
940 .info = stac92xx_amp_mux_enum_info, \
941 .get = stac92xx_amp_mux_enum_get, \
942 .put = stac92xx_amp_mux_enum_put, \
943 }
944
945#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
946 { \
947 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
948 .name = xname, \
949 .index = 0, \
950 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
951 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
953 .info = stac92xx_amp_volume_info, \
954 .get = stac92xx_amp_volume_get, \
955 .put = stac92xx_amp_volume_put, \
956 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
957 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
958 }
959
9e05b7a3 960#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 961 { \
962 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
963 .name = "Input Source", \
9e05b7a3 964 .count = cnt, \
ca7c5a8b
ML		 965 .info = stac92xx_mux_enum_info, \
966 .get = stac92xx_mux_enum_get, \
967 .put = stac92xx_mux_enum_put, \
968 }
969
e1f0d669 970#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 971 { \
972 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
973 .name = "Analog Loopback", \
e1f0d669 974 .count = cnt, \
5f10c4a9
ML		 975 .info = stac92xx_aloopback_info, \
976 .get = stac92xx_aloopback_get, \
977 .put = stac92xx_aloopback_put, \
978 .private_value = verb_read | (verb_write << 16), \
979 }
980
c8b6bf9b 981static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 982 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
983 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 984 STAC_INPUT_SOURCE(1),
2f2f4251
M		 985 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
986 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 987 { } /* end */
988};
989
2a9c7816 990#define DELL_M6_MIXER 6
e1f0d669 991static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 992 /* start of config #1 */
e1f0d669
MR		 993 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
994 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
995
e1f0d669
MR		 996 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
997 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
998
2a9c7816
MR		 999 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1000 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1001
1002 /* start of config #2 */
1003 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1004 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1005
e1f0d669
MR		 1006 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1007 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1008
2a9c7816
MR		 1009 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013
1014 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1015 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016
e1f0d669
MR		 1017 { } /* end */
1018};
1019
1020static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1021 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1022
e1f0d669
MR		 1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1027 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028
1029 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1030 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1033 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1036 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1039 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1040
1041 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1042 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1043 { } /* end */
1044};
1045
1046static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1047 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1048
e1f0d669
MR		 1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1053 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054
1055 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1056 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1059 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1062 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1065 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1066
1067 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1068 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1069 { } /* end */
1070};
1071
d0513fc6
MR		 1072
1073static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076
1077 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1078 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079
74b7ff48
MR		 1080 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1082
74b7ff48
MR		 1083 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1084 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1085
74b7ff48
MR		 1086 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1087 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1088
74b7ff48
MR		 1089 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1090 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1091
1092 /*
74b7ff48
MR		 1093 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1094 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1095 */
1096 { } /* end */
1097};
1098
541eee87 1099static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1100 STAC_INPUT_SOURCE(2),
4b33c767 1101 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1102
9b35947f
MR		 1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1105
1106 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1107 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1108 /* analog pc-beep replaced with digital beep support */
1109 /*
f7c5dda2
MR		 1110 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1111 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1112 */
f7c5dda2 1113
687cb98e
MR		 1114 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1115 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1116
687cb98e
MR		 1117 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1118 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1119
1120 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1121 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1122
1123 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1124 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1125 { } /* end */
1126};
1127
541eee87 1128static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1129 STAC_INPUT_SOURCE(2),
1130 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1131
541eee87
MR		 1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1134
1135 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1136 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1137 { } /* end */
1138};
1139
8e21c34c 1140static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1141 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1142 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1143 STAC_INPUT_SOURCE(1),
8e21c34c 1144 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1145 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1146 { } /* end */
1147};
1148
9e05b7a3 1149static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1150 STAC_INPUT_SOURCE(2),
e1f0d669 1151 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1155
1156 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1157 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1158 { } /* end */
1159};
1160
19039bd0 1161/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1162static struct snd_kcontrol_new stac922x_mixer[] = {
1163 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1166
1167 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1168 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1169 { } /* end */
1170};
1171
9e05b7a3 1172
d1d985f0 1173static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1174 STAC_INPUT_SOURCE(3),
e1f0d669 1175 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1176
9e05b7a3
ML		 1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1182
1183 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1184 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1185 { } /* end */
1186};
1187
1697055e
TI		 1188static struct snd_kcontrol_new stac_dmux_mixer = {
1189 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1190 .name = "Digital Input Source",
1191 /* count set later */
1192 .info = stac92xx_dmux_enum_info,
1193 .get = stac92xx_dmux_enum_get,
1194 .put = stac92xx_dmux_enum_put,
1195};
1196
d9737751
MR		 1197static struct snd_kcontrol_new stac_smux_mixer = {
1198 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1199 .name = "IEC958 Playback Source",
d9737751
MR		 1200 /* count set later */
1201 .info = stac92xx_smux_enum_info,
1202 .get = stac92xx_smux_enum_get,
1203 .put = stac92xx_smux_enum_put,
1204};
1205
2134ea4f
TI		 1206static const char *slave_vols[] = {
1207 "Front Playback Volume",
1208 "Surround Playback Volume",
1209 "Center Playback Volume",
1210 "LFE Playback Volume",
1211 "Side Playback Volume",
1212 "Headphone Playback Volume",
1213 "Headphone Playback Volume",
1214 "Speaker Playback Volume",
1215 "External Speaker Playback Volume",
1216 "Speaker2 Playback Volume",
1217 NULL
1218};
1219
1220static const char *slave_sws[] = {
1221 "Front Playback Switch",
1222 "Surround Playback Switch",
1223 "Center Playback Switch",
1224 "LFE Playback Switch",
1225 "Side Playback Switch",
1226 "Headphone Playback Switch",
1227 "Headphone Playback Switch",
1228 "Speaker Playback Switch",
1229 "External Speaker Playback Switch",
1230 "Speaker2 Playback Switch",
edb54a55 1231 "IEC958 Playback Switch",
2134ea4f
TI		 1232 NULL
1233};
1234
603c4019 1235static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1236static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1237
2f2f4251
M		 1238static int stac92xx_build_controls(struct hda_codec *codec)
1239{
1240 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1241 struct auto_pin_cfg *cfg = &spec->autocfg;
1242 hda_nid_t nid;
2f2f4251 1243 int err;
c7d4b2fa 1244 int i;
2f2f4251
M		 1245
1246 err = snd_hda_add_new_ctls(codec, spec->mixer);
1247 if (err < 0)
1248 return err;
c7d4b2fa
M		 1249
1250 for (i = 0; i < spec->num_mixers; i++) {
1251 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1252 if (err < 0)
1253 return err;
1254 }
1697055e
TI		 1255 if (spec->num_dmuxes > 0) {
1256 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1257 err = snd_hda_ctl_add(codec,
1697055e
TI		 1258 snd_ctl_new1(&stac_dmux_mixer, codec));
1259 if (err < 0)
1260 return err;
1261 }
d9737751 1262 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1263 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1264 struct hda_input_mux *smux = &spec->private_smux;
1265 /* check for mute support on SPDIF out */
1266 if (wcaps & AC_WCAP_OUT_AMP) {
1267 smux->items[smux->num_items].label = "Off";
1268 smux->items[smux->num_items].index = 0;
1269 smux->num_items++;
1270 spec->spdif_mute = 1;
1271 }
d9737751 1272 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1273 err = snd_hda_ctl_add(codec,
d9737751
MR		 1274 snd_ctl_new1(&stac_smux_mixer, codec));
1275 if (err < 0)
1276 return err;
1277 }
c7d4b2fa 1278
dabbed6f
M		 1279 if (spec->multiout.dig_out_nid) {
1280 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1281 if (err < 0)
1282 return err;
9a08160b
TI		 1283 err = snd_hda_create_spdif_share_sw(codec,
1284 &spec->multiout);
1285 if (err < 0)
1286 return err;
1287 spec->multiout.share_spdif = 1;
dabbed6f 1288 }
da74ae3e 1289 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1290 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1291 if (err < 0)
1292 return err;
1293 }
2134ea4f
TI		 1294
1295 /* if we have no master control, let's create it */
1296 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1297 unsigned int vmaster_tlv[4];
2134ea4f 1298 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1299 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1300 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1301 vmaster_tlv, slave_vols);
2134ea4f
TI		 1302 if (err < 0)
1303 return err;
1304 }
1305 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1306 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1307 NULL, slave_sws);
1308 if (err < 0)
1309 return err;
1310 }
1311
603c4019 1312 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1313
1314 /* create jack input elements */
1315 if (spec->hp_detect) {
1316 for (i = 0; i < cfg->hp_outs; i++) {
1317 int type = SND_JACK_HEADPHONE;
1318 nid = cfg->hp_pins[i];
1319 /* jack detection */
1320 if (cfg->hp_outs == i)
1321 type |= SND_JACK_LINEOUT;
1322 err = stac92xx_add_jack(codec, nid, type);
1323 if (err < 0)
1324 return err;
1325 }
1326 }
1327 for (i = 0; i < cfg->line_outs; i++) {
1328 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1329 SND_JACK_LINEOUT);
1330 if (err < 0)
1331 return err;
1332 }
1333 for (i = 0; i < AUTO_PIN_LAST; i++) {
1334 nid = cfg->input_pins[i];
1335 if (nid) {
1336 err = stac92xx_add_jack(codec, nid,
1337 SND_JACK_MICROPHONE);
1338 if (err < 0)
1339 return err;
1340 }
1341 }
1342
dabbed6f 1343 return 0;
2f2f4251
M		 1344}
1345
403d1944 1346static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1347 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1348 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1349};
1350
58eec423
MCC		 1351static unsigned int gateway9200_m4_pin_configs[8] = {
1352 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1353 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1354};
1355static unsigned int gateway9200_m4_2_pin_configs[8] = {
1356 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1357 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1358};
1359
1360/*
dfe495d0
TI		 1361 STAC 9200 pin configs for
1362 102801A8
1363 102801DE
1364 102801E8
1365*/
1366static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1367 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1368 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1369};
1370
1371/*
1372 STAC 9200 pin configs for
1373 102801C0
1374 102801C1
1375*/
1376static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1377 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1378 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1379};
1380
1381/*
1382 STAC 9200 pin configs for
1383 102801C4 (Dell Dimension E310)
1384 102801C5
1385 102801C7
1386 102801D9
1387 102801DA
1388 102801E3
1389*/
1390static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1391 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1392 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1393};
1394
1395
1396/*
1397 STAC 9200-32 pin configs for
1398 102801B5 (Dell Inspiron 630m)
1399 102801D8 (Dell Inspiron 640m)
1400*/
1401static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1402 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1403 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1404};
1405
1406/*
1407 STAC 9200-32 pin configs for
1408 102801C2 (Dell Latitude D620)
1409 102801C8
1410 102801CC (Dell Latitude D820)
1411 102801D4
1412 102801D6
1413*/
1414static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1415 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1416 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1417};
1418
1419/*
1420 STAC 9200-32 pin configs for
1421 102801CE (Dell XPS M1710)
1422 102801CF (Dell Precision M90)
1423*/
1424static unsigned int dell9200_m23_pin_configs[8] = {
1425 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1426 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1427};
1428
1429/*
1430 STAC 9200-32 pin configs for
1431 102801C9
1432 102801CA
1433 102801CB (Dell Latitude 120L)
1434 102801D3
1435*/
1436static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1437 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1438 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1439};
1440
1441/*
1442 STAC 9200-32 pin configs for
1443 102801BD (Dell Inspiron E1505n)
1444 102801EE
1445 102801EF
1446*/
1447static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1448 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1449 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1450};
1451
1452/*
1453 STAC 9200-32 pin configs for
1454 102801F5 (Dell Inspiron 1501)
1455 102801F6
1456*/
1457static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1458 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1459 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1460};
1461
1462/*
1463 STAC 9200-32
1464 102801CD (Dell Inspiron E1705/9400)
1465*/
1466static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1467 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1468 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1469};
1470
bf277785
TD		 1471static unsigned int oqo9200_pin_configs[8] = {
1472 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1473 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1474};
1475
dfe495d0 1476
f5fcc13c
TI		 1477static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1478 [STAC_REF] = ref9200_pin_configs,
bf277785 1479 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1480 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1481 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1482 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1483 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1484 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1485 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1486 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1487 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1488 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1489 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1490 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1491 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1492 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1493};
1494
f5fcc13c
TI		 1495static const char *stac9200_models[STAC_9200_MODELS] = {
1496 [STAC_REF] = "ref",
bf277785 1497 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1498 [STAC_9200_DELL_D21] = "dell-d21",
1499 [STAC_9200_DELL_D22] = "dell-d22",
1500 [STAC_9200_DELL_D23] = "dell-d23",
1501 [STAC_9200_DELL_M21] = "dell-m21",
1502 [STAC_9200_DELL_M22] = "dell-m22",
1503 [STAC_9200_DELL_M23] = "dell-m23",
1504 [STAC_9200_DELL_M24] = "dell-m24",
1505 [STAC_9200_DELL_M25] = "dell-m25",
1506 [STAC_9200_DELL_M26] = "dell-m26",
1507 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1508 [STAC_9200_M4] = "gateway-m4",
1509 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1510 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1511};
1512
1513static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1514 /* SigmaTel reference board */
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1516 "DFI LanParty", STAC_REF),
e7377071 1517 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1519 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1521 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1523 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1525 "unknown Dell", STAC_9200_DELL_D22),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1527 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1529 "Dell Latitude D620", STAC_9200_DELL_M22),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1531 "unknown Dell", STAC_9200_DELL_D23),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1533 "unknown Dell", STAC_9200_DELL_D23),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1535 "unknown Dell", STAC_9200_DELL_M22),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1537 "unknown Dell", STAC_9200_DELL_M24),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1539 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1541 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1543 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1545 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1547 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1549 "Dell Precision M90", STAC_9200_DELL_M23),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1551 "unknown Dell", STAC_9200_DELL_M22),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1553 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1555 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1557 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1559 "unknown Dell", STAC_9200_DELL_D23),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1561 "unknown Dell", STAC_9200_DELL_D23),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1563 "unknown Dell", STAC_9200_DELL_D21),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1565 "unknown Dell", STAC_9200_DELL_D23),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1567 "unknown Dell", STAC_9200_DELL_D21),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1569 "unknown Dell", STAC_9200_DELL_M25),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1571 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1573 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1575 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1576 /* Panasonic */
117f257d 1577 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1578 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1579 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1580 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1581 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1582 /* OQO Mobile */
1583 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1584 {} /* terminator */
1585};
1586
8e21c34c
TD		 1587static unsigned int ref925x_pin_configs[8] = {
1588 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1589 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1590};
1591
9cb36c2a
MCC		 1592static unsigned int stac925xM1_pin_configs[8] = {
1593 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1594 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1595};
1596
9cb36c2a
MCC		 1597static unsigned int stac925xM1_2_pin_configs[8] = {
1598 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1599 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1600};
58eec423 1601
9cb36c2a
MCC		 1602static unsigned int stac925xM2_pin_configs[8] = {
1603 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1604 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1605};
1606
8e21c34c 1607static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1608 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1609 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1610};
1611
9cb36c2a
MCC		 1612static unsigned int stac925xM3_pin_configs[8] = {
1613 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1614 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1615};
58eec423 1616
9cb36c2a
MCC		 1617static unsigned int stac925xM5_pin_configs[8] = {
1618 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1619 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1620};
1621
9cb36c2a
MCC		 1622static unsigned int stac925xM6_pin_configs[8] = {
1623 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1624 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1625};
1626
1627static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1628 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1629 [STAC_M1] = stac925xM1_pin_configs,
1630 [STAC_M1_2] = stac925xM1_2_pin_configs,
1631 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1632 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1633 [STAC_M3] = stac925xM3_pin_configs,
1634 [STAC_M5] = stac925xM5_pin_configs,
1635 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1636};
1637
1638static const char *stac925x_models[STAC_925x_MODELS] = {
1639 [STAC_REF] = "ref",
9cb36c2a
MCC		 1640 [STAC_M1] = "m1",
1641 [STAC_M1_2] = "m1-2",
1642 [STAC_M2] = "m2",
8e21c34c 1643 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1644 [STAC_M3] = "m3",
1645 [STAC_M5] = "m5",
1646 [STAC_M6] = "m6",
8e21c34c
TD		 1647};
1648
9cb36c2a 1649static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1650 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1651 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1652 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1653 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1654 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1655 /* Not sure about the brand name for those */
1656 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1657 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1658 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1659 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1660 {} /* terminator */
8e21c34c
TD		 1661};
1662
1663static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1664 /* SigmaTel reference board */
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1666 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1667
1668 /* Default table for unknown ID */
1669 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1670
8e21c34c
TD		 1671 {} /* terminator */
1672};
1673
a7662640 1674static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1675 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1676 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1677 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1678 0x01452050,
1679};
1680
1681static unsigned int dell_m6_pin_configs[13] = {
1682 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1683 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1684 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1685 0x4f0000f0,
e1f0d669
MR		 1686};
1687
1688static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1689 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1690 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1691 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1692 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1693 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1694};
1695
1696static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1697 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1698 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1699 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1700 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1701 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1702 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1703};
1704
1705static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1706 /* SigmaTel reference board */
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1708 "DFI LanParty", STAC_92HD73XX_REF),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1710 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1712 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1714 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1716 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1718 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1720 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1722 "unknown Dell", STAC_DELL_M6_DMIC),
1723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1724 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1726 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1728 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1729 {} /* terminator */
1730};
1731
d0513fc6
MR		 1732static unsigned int ref92hd83xxx_pin_configs[14] = {
1733 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1734 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1735 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1736 0x01451160, 0x98560170,
1737};
1738
1739static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1740 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1741};
1742
1743static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1744 [STAC_92HD83XXX_REF] = "ref",
1745};
1746
1747static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1748 /* SigmaTel reference board */
1749 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1750 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1751 {} /* terminator */
d0513fc6
MR		 1752};
1753
0ffa9807 1754static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1755 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1756 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1757 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1758};
1759
0ffa9807 1760static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1761 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1762 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1763 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1764};
1765
0ffa9807 1766static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1767 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1768 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1769 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1770};
1771
3a7abfd2
MR		 1772static unsigned int dell_m4_3_pin_configs[11] = {
1773 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1774 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1775 0x40f000f0, 0x044413b0, 0x044413b0,
1776};
1777
e035b841
MR		 1778static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1779 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1780 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1781 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1782 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1783 [STAC_HP_M4] = NULL,
1b0652eb 1784 [STAC_HP_DV5] = NULL,
e035b841
MR		 1785};
1786
1787static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1788 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1789 [STAC_DELL_M4_1] = "dell-m4-1",
1790 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1791 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1792 [STAC_HP_M4] = "hp-m4",
1b0652eb 1793 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR		 1794};
1795
1796static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1797 /* SigmaTel reference board */
1798 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1799 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1801 "HP dv5", STAC_HP_M4),
1802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1803 "HP dv7", STAC_HP_M4),
69dfaefe
TI		 1804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1805 "HP dv7", STAC_HP_M4),
dafb70ce 1806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1807 "HP dv5", STAC_HP_DV5),
9a9e2359
MR		 1808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1809 "unknown HP", STAC_HP_M4),
a7662640
MR		 1810 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1811 "unknown Dell", STAC_DELL_M4_1),
1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1813 "unknown Dell", STAC_DELL_M4_1),
1814 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1815 "unknown Dell", STAC_DELL_M4_1),
1816 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1817 "unknown Dell", STAC_DELL_M4_1),
1818 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1819 "unknown Dell", STAC_DELL_M4_1),
1820 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1821 "unknown Dell", STAC_DELL_M4_1),
1822 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1823 "unknown Dell", STAC_DELL_M4_1),
1824 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1825 "unknown Dell", STAC_DELL_M4_2),
1826 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1827 "unknown Dell", STAC_DELL_M4_2),
1828 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1829 "unknown Dell", STAC_DELL_M4_2),
1830 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1831 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1832 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1833 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1834 {} /* terminator */
1835};
1836
403d1944
MP		 1837static unsigned int ref922x_pin_configs[10] = {
1838 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1839 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1840 0x40000100, 0x40000100,
1841};
1842
dfe495d0
TI		 1843/*
1844 STAC 922X pin configs for
1845 102801A7
1846 102801AB
1847 102801A9
1848 102801D1
1849 102801D2
1850*/
1851static unsigned int dell_922x_d81_pin_configs[10] = {
1852 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1853 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1854 0x01813122, 0x400001f2,
1855};
1856
1857/*
1858 STAC 922X pin configs for
1859 102801AC
1860 102801D0
1861*/
1862static unsigned int dell_922x_d82_pin_configs[10] = {
1863 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1864 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1865 0x01813122, 0x400001f1,
1866};
1867
1868/*
1869 STAC 922X pin configs for
1870 102801BF
1871*/
1872static unsigned int dell_922x_m81_pin_configs[10] = {
1873 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1874 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1875 0x40C003f1, 0x405003f0,
1876};
1877
1878/*
1879 STAC 9221 A1 pin configs for
1880 102801D7 (Dell XPS M1210)
1881*/
1882static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1883 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1884 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1885 0x508003f3, 0x405003f4,
1886};
1887
403d1944 1888static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1889 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1890 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1891 0x02a19120, 0x40000100,
1892};
1893
1894static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1895 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1896 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1897 0x02a19320, 0x40000100,
1898};
1899
5d5d3bc3
IZ		 1900static unsigned int intel_mac_v1_pin_configs[10] = {
1901 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1902 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1903 0x400000fc, 0x400000fb,
1904};
1905
1906static unsigned int intel_mac_v2_pin_configs[10] = {
1907 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1908 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1909 0x400000fc, 0x400000fb,
6f0778d8
NB		 1910};
1911
5d5d3bc3
IZ		 1912static unsigned int intel_mac_v3_pin_configs[10] = {
1913 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1914 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1915 0x400000fc, 0x400000fb,
1916};
1917
5d5d3bc3
IZ		 1918static unsigned int intel_mac_v4_pin_configs[10] = {
1919 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1920 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1921 0x400000fc, 0x400000fb,
1922};
1923
5d5d3bc3
IZ		 1924static unsigned int intel_mac_v5_pin_configs[10] = {
1925 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1926 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1927 0x400000fc, 0x400000fb,
0dae0f83
TI		 1928};
1929
8c650087
MCC		 1930static unsigned int ecs202_pin_configs[10] = {
1931 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1932 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1933 0x9037012e, 0x40e000f2,
1934};
76c08828 1935
19039bd0 1936static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1937 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1938 [STAC_D945GTP3] = d945gtp3_pin_configs,
1939 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1940 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1941 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1942 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1943 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1944 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1945 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1946 /* for backward compatibility */
5d5d3bc3
IZ		 1947 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1948 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1949 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1950 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1951 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1952 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1953 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1954 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1955 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1956 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1957 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1958};
1959
f5fcc13c
TI		 1960static const char *stac922x_models[STAC_922X_MODELS] = {
1961 [STAC_D945_REF] = "ref",
1962 [STAC_D945GTP5] = "5stack",
1963 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1964 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1965 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1966 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1967 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1968 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1969 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1970 /* for backward compatibility */
f5fcc13c 1971 [STAC_MACMINI] = "macmini",
3fc24d85 1972 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1973 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1974 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1975 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1976 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1977 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1978 [STAC_922X_DELL_D81] = "dell-d81",
1979 [STAC_922X_DELL_D82] = "dell-d82",
1980 [STAC_922X_DELL_M81] = "dell-m81",
1981 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1982};
1983
1984static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1985 /* SigmaTel reference board */
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1987 "DFI LanParty", STAC_D945_REF),
1988 /* Intel 945G based systems */
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1990 "Intel D945G", STAC_D945GTP3),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1992 "Intel D945G", STAC_D945GTP3),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1994 "Intel D945G", STAC_D945GTP3),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1996 "Intel D945G", STAC_D945GTP3),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1998 "Intel D945G", STAC_D945GTP3),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2000 "Intel D945G", STAC_D945GTP3),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2002 "Intel D945G", STAC_D945GTP3),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2004 "Intel D945G", STAC_D945GTP3),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2006 "Intel D945G", STAC_D945GTP3),
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2008 "Intel D945G", STAC_D945GTP3),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2010 "Intel D945G", STAC_D945GTP3),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2012 "Intel D945G", STAC_D945GTP3),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2014 "Intel D945G", STAC_D945GTP3),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2016 "Intel D945G", STAC_D945GTP3),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2018 "Intel D945G", STAC_D945GTP3),
2019 /* Intel D945G 5-stack systems */
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2021 "Intel D945G", STAC_D945GTP5),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2023 "Intel D945G", STAC_D945GTP5),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2025 "Intel D945G", STAC_D945GTP5),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2027 "Intel D945G", STAC_D945GTP5),
2028 /* Intel 945P based systems */
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2030 "Intel D945P", STAC_D945GTP3),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2032 "Intel D945P", STAC_D945GTP3),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2034 "Intel D945P", STAC_D945GTP3),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2036 "Intel D945P", STAC_D945GTP3),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2038 "Intel D945P", STAC_D945GTP3),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2040 "Intel D945P", STAC_D945GTP5),
2041 /* other systems */
536319af 2042 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2043 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2044 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2045 /* Dell systems */
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2047 "unknown Dell", STAC_922X_DELL_D81),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2049 "unknown Dell", STAC_922X_DELL_D81),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2051 "unknown Dell", STAC_922X_DELL_D81),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2053 "unknown Dell", STAC_922X_DELL_D82),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2055 "unknown Dell", STAC_922X_DELL_M81),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2057 "unknown Dell", STAC_922X_DELL_D82),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2059 "unknown Dell", STAC_922X_DELL_D81),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2061 "unknown Dell", STAC_922X_DELL_D81),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2063 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2064 /* ECS/PC Chips boards */
2065 SND_PCI_QUIRK(0x1019, 0x2144,
2066 "ECS/PC chips", STAC_ECS_202),
2067 SND_PCI_QUIRK(0x1019, 0x2608,
2068 "ECS/PC chips", STAC_ECS_202),
2069 SND_PCI_QUIRK(0x1019, 0x2633,
2070 "ECS/PC chips P17G/1333", STAC_ECS_202),
2071 SND_PCI_QUIRK(0x1019, 0x2811,
2072 "ECS/PC chips", STAC_ECS_202),
2073 SND_PCI_QUIRK(0x1019, 0x2812,
2074 "ECS/PC chips", STAC_ECS_202),
2075 SND_PCI_QUIRK(0x1019, 0x2813,
2076 "ECS/PC chips", STAC_ECS_202),
2077 SND_PCI_QUIRK(0x1019, 0x2814,
2078 "ECS/PC chips", STAC_ECS_202),
2079 SND_PCI_QUIRK(0x1019, 0x2815,
2080 "ECS/PC chips", STAC_ECS_202),
2081 SND_PCI_QUIRK(0x1019, 0x2816,
2082 "ECS/PC chips", STAC_ECS_202),
2083 SND_PCI_QUIRK(0x1019, 0x2817,
2084 "ECS/PC chips", STAC_ECS_202),
2085 SND_PCI_QUIRK(0x1019, 0x2818,
2086 "ECS/PC chips", STAC_ECS_202),
2087 SND_PCI_QUIRK(0x1019, 0x2819,
2088 "ECS/PC chips", STAC_ECS_202),
2089 SND_PCI_QUIRK(0x1019, 0x2820,
2090 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2091 {} /* terminator */
2092};
2093
3cc08dc6 2094static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2095 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2096 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2097 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2098 0x01c42190, 0x40000100,
3cc08dc6
MP		 2099};
2100
93ed1503 2101static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2102 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2103 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2104 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2105 0x40000100, 0x40000100
2106};
2107
93ed1503
TD		 2108static unsigned int d965_5st_pin_configs[14] = {
2109 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2110 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2111 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2112 0x40000100, 0x40000100
2113};
2114
4ff076e5
TD		 2115static unsigned int dell_3st_pin_configs[14] = {
2116 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2117 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2118 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2119 0x40c003fc, 0x40000100
2120};
2121
93ed1503 2122static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2123 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2124 [STAC_D965_REF] = ref927x_pin_configs,
2125 [STAC_D965_3ST] = d965_3st_pin_configs,
2126 [STAC_D965_5ST] = d965_5st_pin_configs,
2127 [STAC_DELL_3ST] = dell_3st_pin_configs,
2128 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2129};
2130
f5fcc13c 2131static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2132 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2133 [STAC_D965_REF] = "ref",
2134 [STAC_D965_3ST] = "3stack",
2135 [STAC_D965_5ST] = "5stack",
2136 [STAC_DELL_3ST] = "dell-3stack",
2137 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2138};
2139
2140static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2141 /* SigmaTel reference board */
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2143 "DFI LanParty", STAC_D965_REF),
81d3dbde 2144 /* Intel 946 based systems */
f5fcc13c
TI		 2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2147 /* 965 based 3 stack systems */
f5fcc13c
TI		 2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2164 /* Dell 3 stack systems */
8e9068b1 2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2169 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2178 /* 965 based 5 stack systems */
f5fcc13c
TI		 2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2188 {} /* terminator */
2189};
2190
f3302a59
MP		 2191static unsigned int ref9205_pin_configs[12] = {
2192 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2193 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2194 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2195};
2196
dfe495d0
TI		 2197/*
2198 STAC 9205 pin configs for
2199 102801F1
2200 102801F2
2201 102801FC
2202 102801FD
2203 10280204
2204 1028021F
3fa2ef74 2205 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2206*/
2207static unsigned int dell_9205_m42_pin_configs[12] = {
2208 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2209 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2210 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2211};
2212
2213/*
2214 STAC 9205 pin configs for
2215 102801F9
2216 102801FA
2217 102801FE
2218 102801FF (Dell Precision M4300)
2219 10280206
2220 10280200
2221 10280201
2222*/
2223static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2224 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2225 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2226 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2227};
2228
dfe495d0 2229static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2230 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2231 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2232 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2233};
2234
f5fcc13c 2235static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2236 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2237 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2238 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2239 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2240};
2241
f5fcc13c
TI		 2242static const char *stac9205_models[STAC_9205_MODELS] = {
2243 [STAC_9205_REF] = "ref",
dfe495d0 2244 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2245 [STAC_9205_DELL_M43] = "dell-m43",
2246 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2247};
2248
2249static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2250 /* SigmaTel reference board */
2251 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2252 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2253 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2254 "unknown Dell", STAC_9205_DELL_M42),
2255 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2256 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2257 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2258 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2260 "Dell Precision", STAC_9205_DELL_M43),
2261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2262 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2264 "unknown Dell", STAC_9205_DELL_M42),
2265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2266 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2268 "Dell Precision", STAC_9205_DELL_M43),
2269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2270 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2272 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2274 "Dell Precision", STAC_9205_DELL_M43),
2275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2276 "Dell Precision", STAC_9205_DELL_M43),
2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2278 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2280 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2282 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2283 {} /* terminator */
2284};
2285
11b44bbd
RF		 2286static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2287{
2288 int i;
2289 struct sigmatel_spec *spec = codec->spec;
2290
af9f341a
TI		 2291 kfree(spec->pin_configs);
2292 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2293 GFP_KERNEL);
2294 if (!spec->pin_configs)
2295 return -ENOMEM;
11b44bbd
RF		 2296
2297 for (i = 0; i < spec->num_pins; i++) {
2298 hda_nid_t nid = spec->pin_nids[i];
2299 unsigned int pin_cfg;
2300
2301 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2302 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2303 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2304 nid, pin_cfg);
af9f341a 2305 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2306 }
2307
2308 return 0;
2309}
2310
87d48363
MR		 2311static void stac92xx_set_config_reg(struct hda_codec *codec,
2312 hda_nid_t pin_nid, unsigned int pin_config)
2313{
2314 int i;
2315 snd_hda_codec_write(codec, pin_nid, 0,
2316 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2317 pin_config & 0x000000ff);
2318 snd_hda_codec_write(codec, pin_nid, 0,
2319 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2320 (pin_config & 0x0000ff00) >> 8);
2321 snd_hda_codec_write(codec, pin_nid, 0,
2322 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2323 (pin_config & 0x00ff0000) >> 16);
2324 snd_hda_codec_write(codec, pin_nid, 0,
2325 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2326 pin_config >> 24);
2327 i = snd_hda_codec_read(codec, pin_nid, 0,
2328 AC_VERB_GET_CONFIG_DEFAULT,
2329 0x00);
2330 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2331 pin_nid, i);
2332}
2333
2f2f4251
M		 2334static void stac92xx_set_config_regs(struct hda_codec *codec)
2335{
2336 int i;
2337 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2338
87d48363
MR		 2339 if (!spec->pin_configs)
2340 return;
11b44bbd 2341
87d48363
MR		 2342 for (i = 0; i < spec->num_pins; i++)
2343 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2344 spec->pin_configs[i]);
2f2f4251 2345}
2f2f4251 2346
af9f341a
TI		 2347static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2348{
2349 struct sigmatel_spec *spec = codec->spec;
2350
2351 if (!pins)
2352 return stac92xx_save_bios_config_regs(codec);
2353
2354 kfree(spec->pin_configs);
2355 spec->pin_configs = kmemdup(pins,
2356 spec->num_pins * sizeof(*pins),
2357 GFP_KERNEL);
2358 if (!spec->pin_configs)
2359 return -ENOMEM;
2360
2361 stac92xx_set_config_regs(codec);
2362 return 0;
2363}
2364
2365static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2366 unsigned int cfg)
2367{
2368 struct sigmatel_spec *spec = codec->spec;
2369 int i;
2370
2371 for (i = 0; i < spec->num_pins; i++) {
2372 if (spec->pin_nids[i] == nid) {
2373 spec->pin_configs[i] = cfg;
2374 stac92xx_set_config_reg(codec, nid, cfg);
2375 break;
2376 }
2377 }
2378}
2379
dabbed6f 2380/*
c7d4b2fa 2381 * Analog playback callbacks
dabbed6f 2382 */
c7d4b2fa
M		 2383static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2384 struct hda_codec *codec,
c8b6bf9b 2385 struct snd_pcm_substream *substream)
2f2f4251 2386{
dabbed6f 2387 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2388 if (spec->stream_delay)
2389 msleep(spec->stream_delay);
9a08160b
TI		 2390 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2391 hinfo);
2f2f4251
M		 2392}
2393
2f2f4251
M		 2394static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2395 struct hda_codec *codec,
2396 unsigned int stream_tag,
2397 unsigned int format,
c8b6bf9b 2398 struct snd_pcm_substream *substream)
2f2f4251
M		 2399{
2400 struct sigmatel_spec *spec = codec->spec;
403d1944 2401 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2402}
2403
2404static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2405 struct hda_codec *codec,
c8b6bf9b 2406 struct snd_pcm_substream *substream)
2f2f4251
M		 2407{
2408 struct sigmatel_spec *spec = codec->spec;
2409 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2410}
2411
dabbed6f
M		 2412/*
2413 * Digital playback callbacks
2414 */
2415static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2416 struct hda_codec *codec,
c8b6bf9b 2417 struct snd_pcm_substream *substream)
dabbed6f
M		 2418{
2419 struct sigmatel_spec *spec = codec->spec;
2420 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2421}
2422
2423static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2424 struct hda_codec *codec,
c8b6bf9b 2425 struct snd_pcm_substream *substream)
dabbed6f
M		 2426{
2427 struct sigmatel_spec *spec = codec->spec;
2428 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2429}
2430
6b97eb45
TI		 2431static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2432 struct hda_codec *codec,
2433 unsigned int stream_tag,
2434 unsigned int format,
2435 struct snd_pcm_substream *substream)
2436{
2437 struct sigmatel_spec *spec = codec->spec;
2438 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2439 stream_tag, format, substream);
2440}
2441
dabbed6f 2442
2f2f4251
M		 2443/*
2444 * Analog capture callbacks
2445 */
2446static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2447 struct hda_codec *codec,
2448 unsigned int stream_tag,
2449 unsigned int format,
c8b6bf9b 2450 struct snd_pcm_substream *substream)
2f2f4251
M		 2451{
2452 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2453 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2454
8daaaa97
MR		 2455 if (spec->powerdown_adcs) {
2456 msleep(40);
8c2f767b 2457 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2458 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2459 }
2460 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2461 return 0;
2462}
2463
2464static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2465 struct hda_codec *codec,
c8b6bf9b 2466 struct snd_pcm_substream *substream)
2f2f4251
M		 2467{
2468 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2469 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2470
8daaaa97
MR		 2471 snd_hda_codec_cleanup_stream(codec, nid);
2472 if (spec->powerdown_adcs)
8c2f767b 2473 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2474 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2475 return 0;
2476}
2477
dabbed6f
M		 2478static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2479 .substreams = 1,
2480 .channels_min = 2,
2481 .channels_max = 2,
2482 /* NID is set in stac92xx_build_pcms */
2483 .ops = {
2484 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2485 .close = stac92xx_dig_playback_pcm_close,
2486 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2487 },
2488};
2489
2490static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2491 .substreams = 1,
2492 .channels_min = 2,
2493 .channels_max = 2,
2494 /* NID is set in stac92xx_build_pcms */
2495};
2496
2f2f4251
M		 2497static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2498 .substreams = 1,
2499 .channels_min = 2,
c7d4b2fa 2500 .channels_max = 8,
2f2f4251
M		 2501 .nid = 0x02, /* NID to query formats and rates */
2502 .ops = {
2503 .open = stac92xx_playback_pcm_open,
2504 .prepare = stac92xx_playback_pcm_prepare,
2505 .cleanup = stac92xx_playback_pcm_cleanup
2506 },
2507};
2508
3cc08dc6
MP		 2509static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2510 .substreams = 1,
2511 .channels_min = 2,
2512 .channels_max = 2,
2513 .nid = 0x06, /* NID to query formats and rates */
2514 .ops = {
2515 .open = stac92xx_playback_pcm_open,
2516 .prepare = stac92xx_playback_pcm_prepare,
2517 .cleanup = stac92xx_playback_pcm_cleanup
2518 },
2519};
2520
2f2f4251 2521static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2522 .channels_min = 2,
2523 .channels_max = 2,
9e05b7a3 2524 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2525 .ops = {
2526 .prepare = stac92xx_capture_pcm_prepare,
2527 .cleanup = stac92xx_capture_pcm_cleanup
2528 },
2529};
2530
2531static int stac92xx_build_pcms(struct hda_codec *codec)
2532{
2533 struct sigmatel_spec *spec = codec->spec;
2534 struct hda_pcm *info = spec->pcm_rec;
2535
2536 codec->num_pcms = 1;
2537 codec->pcm_info = info;
2538
c7d4b2fa 2539 info->name = "STAC92xx Analog";
2f2f4251 2540 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2541 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2542 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2543 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2544
2545 if (spec->alt_switch) {
2546 codec->num_pcms++;
2547 info++;
2548 info->name = "STAC92xx Analog Alt";
2549 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2550 }
2f2f4251 2551
dabbed6f
M		 2552 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2553 codec->num_pcms++;
2554 info++;
2555 info->name = "STAC92xx Digital";
7ba72ba1 2556 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2557 if (spec->multiout.dig_out_nid) {
2558 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2559 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2560 }
2561 if (spec->dig_in_nid) {
2562 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2563 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2564 }
2565 }
2566
2f2f4251
M		 2567 return 0;
2568}
2569
c960a03b
TI		 2570static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2571{
2572 unsigned int pincap = snd_hda_param_read(codec, nid,
2573 AC_PAR_PIN_CAP);
2574 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2575 if (pincap & AC_PINCAP_VREF_100)
2576 return AC_PINCTL_VREF_100;
2577 if (pincap & AC_PINCAP_VREF_80)
2578 return AC_PINCTL_VREF_80;
2579 if (pincap & AC_PINCAP_VREF_50)
2580 return AC_PINCTL_VREF_50;
2581 if (pincap & AC_PINCAP_VREF_GRD)
2582 return AC_PINCTL_VREF_GRD;
2583 return 0;
2584}
2585
403d1944
MP		 2586static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2587
2588{
82beb8fd
TI		 2589 snd_hda_codec_write_cache(codec, nid, 0,
2590 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2591}
2592
7c2ba97b
MR		 2593#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2594
2595static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol)
2597{
2598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2599 struct sigmatel_spec *spec = codec->spec;
2600
d7a89436 2601 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2602 return 0;
2603}
2604
c6e4c666
TI		 2605static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2606 unsigned char type);
2607
7c2ba97b
MR		 2608static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2609 struct snd_ctl_elem_value *ucontrol)
2610{
2611 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2612 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2613 int nid = kcontrol->private_value;
2614
2615 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2616
2617 /* check to be sure that the ports are upto date with
2618 * switch changes
2619 */
c6e4c666 2620 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2621
2622 return 1;
2623}
2624
a5ce8890 2625#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2626
2627static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2628{
2629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2630 struct sigmatel_spec *spec = codec->spec;
2631 int io_idx = kcontrol-> private_value & 0xff;
2632
2633 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2634 return 0;
2635}
2636
2637static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2640 struct sigmatel_spec *spec = codec->spec;
2641 hda_nid_t nid = kcontrol->private_value >> 8;
2642 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2643 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2644
2645 spec->io_switch[io_idx] = val;
2646
2647 if (val)
2648 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2649 else {
2650 unsigned int pinctl = AC_PINCTL_IN_EN;
2651 if (io_idx) /* set VREF for mic */
2652 pinctl |= stac92xx_get_vref(codec, nid);
2653 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2654 }
40c1d308
JZ		 2655
2656 /* check the auto-mute again: we need to mute/unmute the speaker
2657 * appropriately according to the pin direction
2658 */
2659 if (spec->hp_detect)
c6e4c666 2660 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2661
403d1944
MP		 2662 return 1;
2663}
2664
0fb87bb4
ML		 2665#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2666
2667static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2668 struct snd_ctl_elem_value *ucontrol)
2669{
2670 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2671 struct sigmatel_spec *spec = codec->spec;
2672
2673 ucontrol->value.integer.value[0] = spec->clfe_swap;
2674 return 0;
2675}
2676
2677static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2678 struct snd_ctl_elem_value *ucontrol)
2679{
2680 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2681 struct sigmatel_spec *spec = codec->spec;
2682 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2683 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2684
68ea7b2f 2685 if (spec->clfe_swap == val)
0fb87bb4
ML		 2686 return 0;
2687
68ea7b2f 2688 spec->clfe_swap = val;
0fb87bb4
ML		 2689
2690 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2691 spec->clfe_swap ? 0x4 : 0x0);
2692
2693 return 1;
2694}
2695
7c2ba97b
MR		 2696#define STAC_CODEC_HP_SWITCH(xname) \
2697 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2698 .name = xname, \
2699 .index = 0, \
2700 .info = stac92xx_hp_switch_info, \
2701 .get = stac92xx_hp_switch_get, \
2702 .put = stac92xx_hp_switch_put, \
2703 }
2704
403d1944
MP		 2705#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2706 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2707 .name = xname, \
2708 .index = 0, \
2709 .info = stac92xx_io_switch_info, \
2710 .get = stac92xx_io_switch_get, \
2711 .put = stac92xx_io_switch_put, \
2712 .private_value = xpval, \
2713 }
2714
0fb87bb4
ML		 2715#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2716 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2717 .name = xname, \
2718 .index = 0, \
2719 .info = stac92xx_clfe_switch_info, \
2720 .get = stac92xx_clfe_switch_get, \
2721 .put = stac92xx_clfe_switch_put, \
2722 .private_value = xpval, \
2723 }
403d1944 2724
c7d4b2fa
M		 2725enum {
2726 STAC_CTL_WIDGET_VOL,
2727 STAC_CTL_WIDGET_MUTE,
09a99959 2728 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2729 STAC_CTL_WIDGET_AMP_MUX,
2730 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2731 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2732 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2733 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2734};
2735
c8b6bf9b 2736static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2737 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2738 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2739 STAC_MONO_MUX,
89385035
MR		 2740 STAC_AMP_MUX,
2741 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2742 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2743 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2744 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2745};
2746
2747/* add dynamic controls */
4d4e9bb3
TI		 2748static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2749 struct snd_kcontrol_new *ktemp,
2750 int idx, const char *name,
2751 unsigned long val)
c7d4b2fa 2752{
c8b6bf9b 2753 struct snd_kcontrol_new *knew;
c7d4b2fa 2754
603c4019
TI		 2755 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2756 knew = snd_array_new(&spec->kctls);
2757 if (!knew)
2758 return -ENOMEM;
4d4e9bb3 2759 *knew = *ktemp;
4682eee0 2760 knew->index = idx;
82fe0c58 2761 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2762 if (!knew->name)
c7d4b2fa
M		 2763 return -ENOMEM;
2764 knew->private_value = val;
c7d4b2fa
M		 2765 return 0;
2766}
2767
4d4e9bb3
TI		 2768static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2769 int type, int idx, const char *name,
2770 unsigned long val)
2771{
2772 return stac92xx_add_control_temp(spec,
2773 &stac92xx_control_templates[type],
2774 idx, name, val);
2775}
2776
4682eee0
MR		 2777
2778/* add dynamic controls */
4d4e9bb3
TI		 2779static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2780 const char *name, unsigned long val)
4682eee0
MR		 2781{
2782 return stac92xx_add_control_idx(spec, type, 0, name, val);
2783}
2784
c21ca4a8
TI		 2785/* check whether the line-input can be used as line-out */
2786static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2787{
2788 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2789 struct auto_pin_cfg *cfg = &spec->autocfg;
2790 hda_nid_t nid;
2791 unsigned int pincap;
8e9068b1 2792
c21ca4a8
TI		 2793 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2794 return 0;
2795 nid = cfg->input_pins[AUTO_PIN_LINE];
2796 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2797 if (pincap & AC_PINCAP_OUT)
2798 return nid;
2799 return 0;
2800}
403d1944 2801
c21ca4a8
TI		 2802/* check whether the mic-input can be used as line-out */
2803static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2804{
2805 struct sigmatel_spec *spec = codec->spec;
2806 struct auto_pin_cfg *cfg = &spec->autocfg;
2807 unsigned int def_conf, pincap;
2808 unsigned int mic_pin;
2809
2810 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2811 return 0;
2812 mic_pin = AUTO_PIN_MIC;
2813 for (;;) {
2814 hda_nid_t nid = cfg->input_pins[mic_pin];
2815 def_conf = snd_hda_codec_read(codec, nid, 0,
2816 AC_VERB_GET_CONFIG_DEFAULT, 0);
2817 /* some laptops have an internal analog microphone
2818 * which can't be used as a output */
2819 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2820 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2821 if (pincap & AC_PINCAP_OUT)
2822 return nid;
403d1944 2823 }
c21ca4a8
TI		 2824 if (mic_pin == AUTO_PIN_MIC)
2825 mic_pin = AUTO_PIN_FRONT_MIC;
2826 else
2827 break;
403d1944 2828 }
403d1944
MP		 2829 return 0;
2830}
2831
7b043899
SL		 2832static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2833{
2834 int i;
2835
2836 for (i = 0; i < spec->multiout.num_dacs; i++) {
2837 if (spec->multiout.dac_nids[i] == nid)
2838 return 1;
2839 }
2840
2841 return 0;
2842}
2843
c21ca4a8
TI		 2844static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2845{
2846 int i;
2847 if (is_in_dac_nids(spec, nid))
2848 return 1;
2849 for (i = 0; i < spec->autocfg.hp_outs; i++)
2850 if (spec->hp_dacs[i] == nid)
2851 return 1;
2852 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2853 if (spec->speaker_dacs[i] == nid)
2854 return 1;
2855 return 0;
2856}
2857
2858static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2859{
2860 struct sigmatel_spec *spec = codec->spec;
2861 int j, conn_len;
2862 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2863 unsigned int wcaps, wtype;
2864
2865 conn_len = snd_hda_get_connections(codec, nid, conn,
2866 HDA_MAX_CONNECTIONS);
2867 for (j = 0; j < conn_len; j++) {
2868 wcaps = snd_hda_param_read(codec, conn[j],
2869 AC_PAR_AUDIO_WIDGET_CAP);
2870 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2871 /* we check only analog outputs */
2872 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2873 continue;
2874 /* if this route has a free DAC, assign it */
2875 if (!check_all_dac_nids(spec, conn[j])) {
2876 if (conn_len > 1) {
2877 /* select this DAC in the pin's input mux */
2878 snd_hda_codec_write_cache(codec, nid, 0,
2879 AC_VERB_SET_CONNECT_SEL, j);
2880 }
2881 return conn[j];
2882 }
2883 }
2884 return 0;
2885}
2886
2887static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2888static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2889
3cc08dc6 2890/*
7b043899
SL		 2891 * Fill in the dac_nids table from the parsed pin configuration
2892 * This function only works when every pin in line_out_pins[]
2893 * contains atleast one DAC in its connection list. Some 92xx
2894 * codecs are not connected directly to a DAC, such as the 9200
2895 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2896 */
c21ca4a8 2897static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2898{
2899 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2900 struct auto_pin_cfg *cfg = &spec->autocfg;
2901 int i;
2902 hda_nid_t nid, dac;
7b043899 2903
c7d4b2fa
M		 2904 for (i = 0; i < cfg->line_outs; i++) {
2905 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2906 dac = get_unassigned_dac(codec, nid);
2907 if (!dac) {
df802952
TI		 2908 if (spec->multiout.num_dacs > 0) {
2909 /* we have already working output pins,
2910 * so let's drop the broken ones again
2911 */
2912 cfg->line_outs = spec->multiout.num_dacs;
2913 break;
2914 }
7b043899
SL		 2915 /* error out, no available DAC found */
2916 snd_printk(KERN_ERR
2917 "%s: No available DAC for pin 0x%x\n",
2918 __func__, nid);
2919 return -ENODEV;
2920 }
c21ca4a8
TI		 2921 add_spec_dacs(spec, dac);
2922 }
7b043899 2923
c21ca4a8
TI		 2924 /* add line-in as output */
2925 nid = check_line_out_switch(codec);
2926 if (nid) {
2927 dac = get_unassigned_dac(codec, nid);
2928 if (dac) {
2929 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2930 nid, cfg->line_outs);
2931 cfg->line_out_pins[cfg->line_outs] = nid;
2932 cfg->line_outs++;
2933 spec->line_switch = nid;
2934 add_spec_dacs(spec, dac);
2935 }
2936 }
2937 /* add mic as output */
2938 nid = check_mic_out_switch(codec);
2939 if (nid) {
2940 dac = get_unassigned_dac(codec, nid);
2941 if (dac) {
2942 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2943 nid, cfg->line_outs);
2944 cfg->line_out_pins[cfg->line_outs] = nid;
2945 cfg->line_outs++;
2946 spec->mic_switch = nid;
2947 add_spec_dacs(spec, dac);
2948 }
2949 }
c7d4b2fa 2950
c21ca4a8
TI		 2951 for (i = 0; i < cfg->hp_outs; i++) {
2952 nid = cfg->hp_pins[i];
2953 dac = get_unassigned_dac(codec, nid);
2954 if (dac) {
2955 if (!spec->multiout.hp_nid)
2956 spec->multiout.hp_nid = dac;
2957 else
2958 add_spec_extra_dacs(spec, dac);
7b043899 2959 }
c21ca4a8
TI		 2960 spec->hp_dacs[i] = dac;
2961 }
2962
2963 for (i = 0; i < cfg->speaker_outs; i++) {
2964 nid = cfg->speaker_pins[i];
2965 dac = get_unassigned_dac(codec, nid);
2966 if (dac)
2967 add_spec_extra_dacs(spec, dac);
2968 spec->speaker_dacs[i] = dac;
7b043899 2969 }
c7d4b2fa 2970
c21ca4a8 2971 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2972 spec->multiout.num_dacs,
2973 spec->multiout.dac_nids[0],
2974 spec->multiout.dac_nids[1],
2975 spec->multiout.dac_nids[2],
2976 spec->multiout.dac_nids[3],
2977 spec->multiout.dac_nids[4]);
c21ca4a8 2978
c7d4b2fa
M		 2979 return 0;
2980}
2981
eb06ed8f
TI		 2982/* create volume control/switch for the given prefx type */
2983static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2984{
2985 char name[32];
2986 int err;
2987
2988 sprintf(name, "%s Playback Volume", pfx);
2989 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2990 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2991 if (err < 0)
2992 return err;
2993 sprintf(name, "%s Playback Switch", pfx);
2994 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2995 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2996 if (err < 0)
2997 return err;
2998 return 0;
2999}
3000
ae0afd81
MR		 3001static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3002{
c21ca4a8 3003 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3004 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3005 return 1;
3006 } else {
3007 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3008 spec->multiout.num_dacs++;
3009 }
3010 return 0;
3011}
3012
c21ca4a8 3013static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3014{
c21ca4a8
TI		 3015 int i;
3016 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3017 if (!spec->multiout.extra_out_nid[i]) {
3018 spec->multiout.extra_out_nid[i] = nid;
3019 return 0;
3020 }
3021 }
3022 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3023 return 1;
ae0afd81
MR		 3024}
3025
76624534
TI		 3026static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3027{
3028 int i;
3029
3030 if (spec->autocfg.line_outs != 1)
3031 return 0;
3032 if (spec->multiout.hp_nid == nid)
3033 return 0;
3034 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3035 if (spec->multiout.extra_out_nid[i] == nid)
3036 return 0;
3037 return 1;
3038}
3039
c7d4b2fa 3040/* add playback controls from the parsed DAC table */
0fb87bb4 3041static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3042 const struct auto_pin_cfg *cfg)
c7d4b2fa 3043{
76624534 3044 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3045 static const char *chname[4] = {
3046 "Front", "Surround", NULL /*CLFE*/, "Side"
3047 };
d21995e3 3048 hda_nid_t nid = 0;
91589232
TI		 3049 int i, err;
3050 unsigned int wid_caps;
0fb87bb4 3051
c21ca4a8 3052 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3053 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3054 if (i == 2) {
3055 /* Center/LFE */
eb06ed8f
TI		 3056 err = create_controls(spec, "Center", nid, 1);
3057 if (err < 0)
c7d4b2fa 3058 return err;
eb06ed8f
TI		 3059 err = create_controls(spec, "LFE", nid, 2);
3060 if (err < 0)
c7d4b2fa 3061 return err;
0fb87bb4
ML		 3062
3063 wid_caps = get_wcaps(codec, nid);
3064
3065 if (wid_caps & AC_WCAP_LR_SWAP) {
3066 err = stac92xx_add_control(spec,
3067 STAC_CTL_WIDGET_CLFE_SWITCH,
3068 "Swap Center/LFE Playback Switch", nid);
3069
3070 if (err < 0)
3071 return err;
3072 }
3073
c7d4b2fa 3074 } else {
76624534
TI		 3075 const char *name = chname[i];
3076 /* if it's a single DAC, assign a better name */
3077 if (!i && is_unique_dac(spec, nid)) {
3078 switch (cfg->line_out_type) {
3079 case AUTO_PIN_HP_OUT:
3080 name = "Headphone";
3081 break;
3082 case AUTO_PIN_SPEAKER_OUT:
3083 name = "Speaker";
3084 break;
3085 }
3086 }
3087 err = create_controls(spec, name, nid, 3);
eb06ed8f 3088 if (err < 0)
c7d4b2fa
M		 3089 return err;
3090 }
3091 }
3092
a9cb5c90 3093 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3094 err = stac92xx_add_control(spec,
3095 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3096 "Headphone as Line Out Switch",
3097 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3098 if (err < 0)
3099 return err;
3100 }
3101
b5895dc8 3102 if (spec->line_switch) {
c21ca4a8
TI		 3103 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3104 "Line In as Output Switch",
3105 spec->line_switch << 8);
3106 if (err < 0)
3107 return err;
b5895dc8 3108 }
403d1944 3109
b5895dc8 3110 if (spec->mic_switch) {
c21ca4a8
TI		 3111 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3112 "Mic as Output Switch",
3113 (spec->mic_switch << 8) | 1);
3114 if (err < 0)
3115 return err;
b5895dc8 3116 }
403d1944 3117
c7d4b2fa
M		 3118 return 0;
3119}
3120
eb06ed8f
TI		 3121/* add playback controls for Speaker and HP outputs */
3122static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3123 struct auto_pin_cfg *cfg)
3124{
3125 struct sigmatel_spec *spec = codec->spec;
3126 hda_nid_t nid;
c21ca4a8 3127 int i, err, nums;
eb06ed8f 3128
c21ca4a8 3129 nums = 0;
eb06ed8f 3130 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3131 static const char *pfxs[] = {
3132 "Headphone", "Headphone2", "Headphone3",
3133 };
eb06ed8f
TI		 3134 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3135 if (wid_caps & AC_WCAP_UNSOL_CAP)
3136 spec->hp_detect = 1;
c21ca4a8 3137 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3138 continue;
c21ca4a8
TI		 3139 nid = spec->hp_dacs[i];
3140 if (!nid)
eb06ed8f 3141 continue;
c21ca4a8
TI		 3142 err = create_controls(spec, pfxs[nums++], nid, 3);
3143 if (err < 0)
3144 return err;
1b290a51 3145 }
c21ca4a8
TI		 3146 nums = 0;
3147 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3148 static const char *pfxs[] = {
3149 "Speaker", "External Speaker", "Speaker2",
3150 };
c21ca4a8
TI		 3151 if (nums >= ARRAY_SIZE(pfxs))
3152 continue;
3153 nid = spec->speaker_dacs[i];
3154 if (!nid)
3155 continue;
3156 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3157 if (err < 0)
3158 return err;
3159 }
c7d4b2fa
M		 3160 return 0;
3161}
3162
b22b4821 3163/* labels for mono mux outputs */
d0513fc6
MR		 3164static const char *stac92xx_mono_labels[4] = {
3165 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3166};
3167
3168/* create mono mux for mono out on capable codecs */
3169static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3170{
3171 struct sigmatel_spec *spec = codec->spec;
3172 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3173 int i, num_cons;
3174 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3175
3176 num_cons = snd_hda_get_connections(codec,
3177 spec->mono_nid,
3178 con_lst,
3179 HDA_MAX_NUM_INPUTS);
3180 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3181 return -EINVAL;
3182
3183 for (i = 0; i < num_cons; i++) {
3184 mono_mux->items[mono_mux->num_items].label =
3185 stac92xx_mono_labels[i];
3186 mono_mux->items[mono_mux->num_items].index = i;
3187 mono_mux->num_items++;
3188 }
09a99959
MR		 3189
3190 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3191 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3192}
3193
89385035
MR		 3194/* labels for amp mux outputs */
3195static const char *stac92xx_amp_labels[3] = {
4b33c767 3196 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3197};
3198
3199/* create amp out controls mux on capable codecs */
3200static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3201{
3202 struct sigmatel_spec *spec = codec->spec;
3203 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3204 int i, err;
3205
2a9c7816 3206 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3207 amp_mux->items[amp_mux->num_items].label =
3208 stac92xx_amp_labels[i];
3209 amp_mux->items[amp_mux->num_items].index = i;
3210 amp_mux->num_items++;
3211 }
3212
2a9c7816
MR		 3213 if (spec->num_amps > 1) {
3214 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3215 "Amp Selector Capture Switch", 0);
3216 if (err < 0)
3217 return err;
3218 }
89385035
MR		 3219 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3220 "Amp Capture Volume",
3221 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3222}
3223
3224
1cd2224c
MR		 3225/* create PC beep volume controls */
3226static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3227 hda_nid_t nid)
3228{
3229 struct sigmatel_spec *spec = codec->spec;
3230 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3231 int err;
3232
3233 /* check for mute support for the the amp */
3234 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3235 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3236 "PC Beep Playback Switch",
3237 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3238 if (err < 0)
3239 return err;
3240 }
3241
3242 /* check to see if there is volume support for the amp */
3243 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3244 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3245 "PC Beep Playback Volume",
3246 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3247 if (err < 0)
3248 return err;
3249 }
3250 return 0;
3251}
3252
4d4e9bb3
TI		 3253#ifdef CONFIG_SND_HDA_INPUT_BEEP
3254#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3255
3256static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3257 struct snd_ctl_elem_value *ucontrol)
3258{
3259 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3260 ucontrol->value.integer.value[0] = codec->beep->enabled;
3261 return 0;
3262}
3263
3264static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3265 struct snd_ctl_elem_value *ucontrol)
3266{
3267 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3268 int enabled = !!ucontrol->value.integer.value[0];
3269 if (codec->beep->enabled != enabled) {
3270 codec->beep->enabled = enabled;
3271 return 1;
3272 }
3273 return 0;
3274}
3275
3276static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3277 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3278 .info = stac92xx_dig_beep_switch_info,
3279 .get = stac92xx_dig_beep_switch_get,
3280 .put = stac92xx_dig_beep_switch_put,
3281};
3282
3283static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3284{
3285 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3286 0, "PC Beep Playback Switch", 0);
3287}
3288#endif
3289
4682eee0
MR		 3290static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3291{
3292 struct sigmatel_spec *spec = codec->spec;
3293 int wcaps, nid, i, err = 0;
3294
3295 for (i = 0; i < spec->num_muxes; i++) {
3296 nid = spec->mux_nids[i];
3297 wcaps = get_wcaps(codec, nid);
3298
3299 if (wcaps & AC_WCAP_OUT_AMP) {
3300 err = stac92xx_add_control_idx(spec,
3301 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3302 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3303 if (err < 0)
3304 return err;
3305 }
3306 }
3307 return 0;
3308};
3309
d9737751 3310static const char *stac92xx_spdif_labels[3] = {
65973632 3311 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3312};
3313
3314static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3315{
3316 struct sigmatel_spec *spec = codec->spec;
3317 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3318 const char **labels = spec->spdif_labels;
d9737751 3319 int i, num_cons;
65973632 3320 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3321
3322 num_cons = snd_hda_get_connections(codec,
3323 spec->smux_nids[0],
3324 con_lst,
3325 HDA_MAX_NUM_INPUTS);
65973632 3326 if (!num_cons)
d9737751
MR		 3327 return -EINVAL;
3328
65973632
MR		 3329 if (!labels)
3330 labels = stac92xx_spdif_labels;
3331
d9737751 3332 for (i = 0; i < num_cons; i++) {
65973632 3333 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3334 spdif_mux->items[spdif_mux->num_items].index = i;
3335 spdif_mux->num_items++;
3336 }
3337
3338 return 0;
3339}
3340
8b65727b 3341/* labels for dmic mux inputs */
ddc2cec4 3342static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3343 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3344 "Digital Mic 3", "Digital Mic 4"
3345};
3346
3347/* create playback/capture controls for input pins on dmic capable codecs */
3348static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3349 const struct auto_pin_cfg *cfg)
3350{
3351 struct sigmatel_spec *spec = codec->spec;
3352 struct hda_input_mux *dimux = &spec->private_dimux;
3353 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3354 int err, i, j;
3355 char name[32];
8b65727b
MP		 3356
3357 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3358 dimux->items[dimux->num_items].index = 0;
3359 dimux->num_items++;
3360
3361 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3362 hda_nid_t nid;
8b65727b
MP		 3363 int index;
3364 int num_cons;
0678accd 3365 unsigned int wcaps;
8b65727b
MP		 3366 unsigned int def_conf;
3367
3368 def_conf = snd_hda_codec_read(codec,
3369 spec->dmic_nids[i],
3370 0,
3371 AC_VERB_GET_CONFIG_DEFAULT,
3372 0);
3373 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3374 continue;
3375
0678accd 3376 nid = spec->dmic_nids[i];
8b65727b 3377 num_cons = snd_hda_get_connections(codec,
e1f0d669 3378 spec->dmux_nids[0],
8b65727b
MP		 3379 con_lst,
3380 HDA_MAX_NUM_INPUTS);
3381 for (j = 0; j < num_cons; j++)
0678accd 3382 if (con_lst[j] == nid) {
8b65727b
MP		 3383 index = j;
3384 goto found;
3385 }
3386 continue;
3387found:
d0513fc6
MR		 3388 wcaps = get_wcaps(codec, nid) &
3389 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3390
d0513fc6 3391 if (wcaps) {
0678accd
MR		 3392 sprintf(name, "%s Capture Volume",
3393 stac92xx_dmic_labels[dimux->num_items]);
3394
3395 err = stac92xx_add_control(spec,
3396 STAC_CTL_WIDGET_VOL,
3397 name,
d0513fc6
MR		 3398 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3399 (wcaps & AC_WCAP_OUT_AMP) ?
3400 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3401 if (err < 0)
3402 return err;
3403 }
3404
8b65727b
MP		 3405 dimux->items[dimux->num_items].label =
3406 stac92xx_dmic_labels[dimux->num_items];
3407 dimux->items[dimux->num_items].index = index;
3408 dimux->num_items++;
3409 }
3410
3411 return 0;
3412}
3413
c7d4b2fa
M		 3414/* create playback/capture controls for input pins */
3415static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3416{
3417 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3418 struct hda_input_mux *imux = &spec->private_imux;
3419 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3420 int i, j, k;
3421
3422 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3423 int index;
3424
3425 if (!cfg->input_pins[i])
3426 continue;
3427 index = -1;
3428 for (j = 0; j < spec->num_muxes; j++) {
3429 int num_cons;
3430 num_cons = snd_hda_get_connections(codec,
3431 spec->mux_nids[j],
3432 con_lst,
3433 HDA_MAX_NUM_INPUTS);
3434 for (k = 0; k < num_cons; k++)
3435 if (con_lst[k] == cfg->input_pins[i]) {
3436 index = k;
3437 goto found;
3438 }
c7d4b2fa 3439 }
314634bc
TI		 3440 continue;
3441 found:
3442 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3443 imux->items[imux->num_items].index = index;
3444 imux->num_items++;
c7d4b2fa
M		 3445 }
3446
7b043899 3447 if (imux->num_items) {
62fe78e9
SR		 3448 /*
3449 * Set the current input for the muxes.
3450 * The STAC9221 has two input muxes with identical source
3451 * NID lists. Hopefully this won't get confused.
3452 */
3453 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3454 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3455 AC_VERB_SET_CONNECT_SEL,
3456 imux->items[0].index);
62fe78e9
SR		 3457 }
3458 }
3459
c7d4b2fa
M		 3460 return 0;
3461}
3462
c7d4b2fa
M		 3463static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3464{
3465 struct sigmatel_spec *spec = codec->spec;
3466 int i;
3467
3468 for (i = 0; i < spec->autocfg.line_outs; i++) {
3469 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3470 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3471 }
3472}
3473
3474static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3475{
3476 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3477 int i;
c7d4b2fa 3478
eb06ed8f
TI		 3479 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3480 hda_nid_t pin;
3481 pin = spec->autocfg.hp_pins[i];
3482 if (pin) /* connect to front */
3483 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3484 }
3485 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3486 hda_nid_t pin;
3487 pin = spec->autocfg.speaker_pins[i];
3488 if (pin) /* connect to front */
3489 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3490 }
c7d4b2fa
M		 3491}
3492
3cc08dc6 3493static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3494{
3495 struct sigmatel_spec *spec = codec->spec;
3496 int err;
3497
8b65727b
MP		 3498 if ((err = snd_hda_parse_pin_def_config(codec,
3499 &spec->autocfg,
3500 spec->dmic_nids)) < 0)
c7d4b2fa 3501 return err;
82bc955f 3502 if (! spec->autocfg.line_outs)
869264c4 3503 return 0; /* can't find valid pin config */
19039bd0 3504
bcecd9bd
JZ		 3505 /* If we have no real line-out pin and multiple hp-outs, HPs should
3506 * be set up as multi-channel outputs.
3507 */
3508 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3509 spec->autocfg.hp_outs > 1) {
3510 /* Copy hp_outs to line_outs, backup line_outs in
3511 * speaker_outs so that the following routines can handle
3512 * HP pins as primary outputs.
3513 */
c21ca4a8 3514 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3515 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3516 sizeof(spec->autocfg.line_out_pins));
3517 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3518 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3519 sizeof(spec->autocfg.hp_pins));
3520 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3521 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3522 spec->autocfg.hp_outs = 0;
bcecd9bd 3523 }
09a99959 3524 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3525 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3526 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3527 u32 caps = query_amp_caps(codec,
3528 spec->autocfg.mono_out_pin, dir);
3529 hda_nid_t conn_list[1];
3530
3531 /* get the mixer node and then the mono mux if it exists */
3532 if (snd_hda_get_connections(codec,
3533 spec->autocfg.mono_out_pin, conn_list, 1) &&
3534 snd_hda_get_connections(codec, conn_list[0],
3535 conn_list, 1)) {
3536
3537 int wcaps = get_wcaps(codec, conn_list[0]);
3538 int wid_type = (wcaps & AC_WCAP_TYPE)
3539 >> AC_WCAP_TYPE_SHIFT;
3540 /* LR swap check, some stac925x have a mux that
3541 * changes the DACs output path instead of the
3542 * mono-mux path.
3543 */
3544 if (wid_type == AC_WID_AUD_SEL &&
3545 !(wcaps & AC_WCAP_LR_SWAP))
3546 spec->mono_nid = conn_list[0];
3547 }
d0513fc6
MR		 3548 if (dir) {
3549 hda_nid_t nid = spec->autocfg.mono_out_pin;
3550
3551 /* most mono outs have a least a mute/unmute switch */
3552 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3553 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3554 "Mono Playback Switch",
3555 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3556 if (err < 0)
3557 return err;
d0513fc6
MR		 3558 /* check for volume support for the amp */
3559 if ((caps & AC_AMPCAP_NUM_STEPS)
3560 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3561 err = stac92xx_add_control(spec,
3562 STAC_CTL_WIDGET_VOL,
3563 "Mono Playback Volume",
3564 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3565 if (err < 0)
3566 return err;
3567 }
09a99959
MR		 3568 }
3569
3570 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3571 AC_PINCTL_OUT_EN);
3572 }
bcecd9bd 3573
c21ca4a8
TI		 3574 if (!spec->multiout.num_dacs) {
3575 err = stac92xx_auto_fill_dac_nids(codec);
3576 if (err < 0)
19039bd0 3577 return err;
c9280d68
TI		 3578 err = stac92xx_auto_create_multi_out_ctls(codec,
3579 &spec->autocfg);
3580 if (err < 0)
3581 return err;
c21ca4a8 3582 }
c7d4b2fa 3583
1cd2224c
MR		 3584 /* setup analog beep controls */
3585 if (spec->anabeep_nid > 0) {
3586 err = stac92xx_auto_create_beep_ctls(codec,
3587 spec->anabeep_nid);
3588 if (err < 0)
3589 return err;
3590 }
3591
3592 /* setup digital beep controls and input device */
3593#ifdef CONFIG_SND_HDA_INPUT_BEEP
3594 if (spec->digbeep_nid > 0) {
3595 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3596 unsigned int caps;
1cd2224c
MR		 3597
3598 err = stac92xx_auto_create_beep_ctls(codec, nid);
3599 if (err < 0)
3600 return err;
3601 err = snd_hda_attach_beep_device(codec, nid);
3602 if (err < 0)
3603 return err;
4d4e9bb3
TI		 3604 /* if no beep switch is available, make its own one */
3605 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3606 if (codec->beep &&
3607 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3608 err = stac92xx_beep_switch_ctl(codec);
3609 if (err < 0)
3610 return err;
3611 }
1cd2224c
MR		 3612 }
3613#endif
3614
0fb87bb4
ML		 3615 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3616
3617 if (err < 0)
3618 return err;
3619
3620 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3621
3622 if (err < 0)
c7d4b2fa
M		 3623 return err;
3624
b22b4821
MR		 3625 if (spec->mono_nid > 0) {
3626 err = stac92xx_auto_create_mono_output_ctls(codec);
3627 if (err < 0)
3628 return err;
3629 }
2a9c7816 3630 if (spec->num_amps > 0) {
89385035
MR		 3631 err = stac92xx_auto_create_amp_output_ctls(codec);
3632 if (err < 0)
3633 return err;
3634 }
2a9c7816 3635 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3636 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3637 &spec->autocfg)) < 0)
3638 return err;
4682eee0
MR		 3639 if (spec->num_muxes > 0) {
3640 err = stac92xx_auto_create_mux_input_ctls(codec);
3641 if (err < 0)
3642 return err;
3643 }
d9737751
MR		 3644 if (spec->num_smuxes > 0) {
3645 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3646 if (err < 0)
3647 return err;
3648 }
8b65727b 3649
c7d4b2fa 3650 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3651 if (spec->multiout.max_channels > 2)
c7d4b2fa 3652 spec->surr_switch = 1;
c7d4b2fa 3653
82bc955f 3654 if (spec->autocfg.dig_out_pin)
3cc08dc6 3655 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3656 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3657 spec->dig_in_nid = dig_in;
c7d4b2fa 3658
603c4019
TI		 3659 if (spec->kctls.list)
3660 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3661
3662 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3663 if (!spec->dinput_mux)
3664 spec->dinput_mux = &spec->private_dimux;
d9737751 3665 spec->sinput_mux = &spec->private_smux;
b22b4821 3666 spec->mono_mux = &spec->private_mono_mux;
89385035 3667 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3668 return 1;
3669}
3670
82bc955f
TI		 3671/* add playback controls for HP output */
3672static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3673 struct auto_pin_cfg *cfg)
3674{
3675 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3676 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3677 unsigned int wid_caps;
3678
3679 if (! pin)
3680 return 0;
3681
3682 wid_caps = get_wcaps(codec, pin);
505cb341 3683 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3684 spec->hp_detect = 1;
82bc955f
TI		 3685
3686 return 0;
3687}
3688
160ea0dc
RF		 3689/* add playback controls for LFE output */
3690static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3691 struct auto_pin_cfg *cfg)
3692{
3693 struct sigmatel_spec *spec = codec->spec;
3694 int err;
3695 hda_nid_t lfe_pin = 0x0;
3696 int i;
3697
3698 /*
3699 * search speaker outs and line outs for a mono speaker pin
3700 * with an amp. If one is found, add LFE controls
3701 * for it.
3702 */
3703 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3704 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3705 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3706 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3707 if (wcaps == AC_WCAP_OUT_AMP)
3708 /* found a mono speaker with an amp, must be lfe */
3709 lfe_pin = pin;
3710 }
3711
3712 /* if speaker_outs is 0, then speakers may be in line_outs */
3713 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3714 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3715 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3716 unsigned int defcfg;
8b551785 3717 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3718 AC_VERB_GET_CONFIG_DEFAULT,
3719 0x00);
8b551785 3720 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3721 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3722 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3723 if (wcaps == AC_WCAP_OUT_AMP)
3724 /* found a mono speaker with an amp,
3725 must be lfe */
3726 lfe_pin = pin;
3727 }
3728 }
3729 }
3730
3731 if (lfe_pin) {
eb06ed8f 3732 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3733 if (err < 0)
3734 return err;
3735 }
3736
3737 return 0;
3738}
3739
c7d4b2fa
M		 3740static int stac9200_parse_auto_config(struct hda_codec *codec)
3741{
3742 struct sigmatel_spec *spec = codec->spec;
3743 int err;
3744
df694daa 3745 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3746 return err;
3747
3748 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3749 return err;
3750
82bc955f
TI		 3751 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3752 return err;
3753
160ea0dc
RF		 3754 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3755 return err;
3756
355a0ec4
TI		 3757 if (spec->num_muxes > 0) {
3758 err = stac92xx_auto_create_mux_input_ctls(codec);
3759 if (err < 0)
3760 return err;
3761 }
3762
82bc955f 3763 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3764 spec->multiout.dig_out_nid = 0x05;
82bc955f 3765 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3766 spec->dig_in_nid = 0x04;
c7d4b2fa 3767
603c4019
TI		 3768 if (spec->kctls.list)
3769 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3770
3771 spec->input_mux = &spec->private_imux;
8b65727b 3772 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3773
3774 return 1;
3775}
3776
62fe78e9
SR		 3777/*
3778 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3779 * funky external mute control using GPIO pins.
3780 */
3781
76e1ddfb 3782static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3783 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3784{
3785 unsigned int gpiostate, gpiomask, gpiodir;
3786
3787 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3788 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3789 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3790
3791 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3792 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3793 gpiomask |= mask;
62fe78e9
SR		 3794
3795 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3796 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3797 gpiodir |= dir_mask;
62fe78e9 3798
76e1ddfb 3799 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3800 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3801
3802 snd_hda_codec_write(codec, codec->afg, 0,
3803 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3804 snd_hda_codec_read(codec, codec->afg, 0,
3805 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3806
3807 msleep(1);
3808
76e1ddfb
TI		 3809 snd_hda_codec_read(codec, codec->afg, 0,
3810 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3811}
3812
74aeaabc
MR		 3813static int stac92xx_add_jack(struct hda_codec *codec,
3814 hda_nid_t nid, int type)
3815{
e4973e1e 3816#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3817 struct sigmatel_spec *spec = codec->spec;
3818 struct sigmatel_jack *jack;
3819 int def_conf = snd_hda_codec_read(codec, nid,
3820 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3821 int connectivity = get_defcfg_connect(def_conf);
3822 char name[32];
3823
3824 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3825 return 0;
3826
3827 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3828 jack = snd_array_new(&spec->jacks);
3829 if (!jack)
3830 return -ENOMEM;
3831 jack->nid = nid;
3832 jack->type = type;
3833
3834 sprintf(name, "%s at %s %s Jack",
3835 snd_hda_get_jack_type(def_conf),
3836 snd_hda_get_jack_connectivity(def_conf),
3837 snd_hda_get_jack_location(def_conf));
3838
3839 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3840#else
3841 return 0;
3842#endif
74aeaabc
MR		 3843}
3844
c6e4c666
TI		 3845static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3846 unsigned char type, int data)
74aeaabc
MR		 3847{
3848 struct sigmatel_event *event;
3849
3850 snd_array_init(&spec->events, sizeof(*event), 32);
3851 event = snd_array_new(&spec->events);
3852 if (!event)
3853 return -ENOMEM;
3854 event->nid = nid;
c6e4c666
TI		 3855 event->type = type;
3856 event->tag = spec->events.used;
74aeaabc
MR		 3857 event->data = data;
3858
c6e4c666 3859 return event->tag;
74aeaabc
MR		 3860}
3861
c6e4c666
TI		 3862static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3863 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3864{
3865 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3866 struct sigmatel_event *event = spec->events.list;
3867 int i;
3868
3869 for (i = 0; i < spec->events.used; i++, event++) {
3870 if (event->nid == nid && event->type == type)
3871 return event;
74aeaabc 3872 }
c6e4c666 3873 return NULL;
74aeaabc
MR		 3874}
3875
c6e4c666
TI		 3876static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3877 unsigned char tag)
314634bc 3878{
c6e4c666
TI		 3879 struct sigmatel_spec *spec = codec->spec;
3880 struct sigmatel_event *event = spec->events.list;
3881 int i;
3882
3883 for (i = 0; i < spec->events.used; i++, event++) {
3884 if (event->tag == tag)
3885 return event;
74aeaabc 3886 }
c6e4c666
TI		 3887 return NULL;
3888}
3889
3890static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3891 unsigned int type)
3892{
3893 struct sigmatel_event *event;
3894 int tag;
3895
3896 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3897 return;
3898 event = stac_get_event(codec, nid, type);
3899 if (event)
3900 tag = event->tag;
3901 else
3902 tag = stac_add_event(codec->spec, nid, type, 0);
3903 if (tag < 0)
3904 return;
3905 snd_hda_codec_write_cache(codec, nid, 0,
3906 AC_VERB_SET_UNSOLICITED_ENABLE,
3907 AC_USRSP_EN | tag);
314634bc
TI		 3908}
3909
a64135a2
MR		 3910static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3911{
3912 int i;
3913 for (i = 0; i < cfg->hp_outs; i++)
3914 if (cfg->hp_pins[i] == nid)
3915 return 1; /* nid is a HP-Out */
3916
3917 return 0; /* nid is not a HP-Out */
3918};
3919
b76c850f
MR		 3920static void stac92xx_power_down(struct hda_codec *codec)
3921{
3922 struct sigmatel_spec *spec = codec->spec;
3923
3924 /* power down inactive DACs */
3925 hda_nid_t *dac;
3926 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3927 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3928 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3929 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3930}
3931
f73d3585
TI		 3932static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3933 int enable);
3934
c7d4b2fa
M		 3935static int stac92xx_init(struct hda_codec *codec)
3936{
3937 struct sigmatel_spec *spec = codec->spec;
82bc955f 3938 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3939 unsigned int gpio;
e4973e1e 3940 int i;
c7d4b2fa 3941
c7d4b2fa
M		 3942 snd_hda_sequence_write(codec, spec->init);
3943
8daaaa97
MR		 3944 /* power down adcs initially */
3945 if (spec->powerdown_adcs)
3946 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3947 snd_hda_codec_write(codec,
8daaaa97
MR		 3948 spec->adc_nids[i], 0,
3949 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3950
3951 /* set up GPIO */
3952 gpio = spec->gpio_data;
3953 /* turn on EAPD statically when spec->eapd_switch isn't set.
3954 * otherwise, unsol event will turn it on/off dynamically
3955 */
3956 if (!spec->eapd_switch)
3957 gpio |= spec->eapd_mask;
3958 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3959
82bc955f
TI		 3960 /* set up pins */
3961 if (spec->hp_detect) {
505cb341 3962 /* Enable unsolicited responses on the HP widget */
74aeaabc 3963 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3964 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3965 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3966 }
0a07acaf
TI		 3967 /* force to enable the first line-out; the others are set up
3968 * in unsol_event
3969 */
3970 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3971 AC_PINCTL_OUT_EN);
82bc955f 3972 /* fake event to set up pins */
c6e4c666
TI		 3973 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3974 STAC_HP_EVENT);
82bc955f
TI		 3975 } else {
3976 stac92xx_auto_init_multi_out(codec);
3977 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 3978 for (i = 0; i < cfg->hp_outs; i++)
3979 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 3980 }
3981 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3982 hda_nid_t nid = cfg->input_pins[i];
3983 if (nid) {
12dde4c6 3984 unsigned int pinctl, conf;
4f1e6bc3
TI		 3985 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3986 /* for mic pins, force to initialize */
3987 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 3988 pinctl |= AC_PINCTL_IN_EN;
3989 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 3990 } else {
3991 pinctl = snd_hda_codec_read(codec, nid, 0,
3992 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3993 /* if PINCTL already set then skip */
12dde4c6
TI		 3994 if (!(pinctl & AC_PINCTL_IN_EN)) {
3995 pinctl |= AC_PINCTL_IN_EN;
3996 stac92xx_auto_set_pinctl(codec, nid,
3997 pinctl);
3998 }
3999 }
4000 conf = snd_hda_codec_read(codec, nid, 0,
4001 AC_VERB_GET_CONFIG_DEFAULT, 0);
4002 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4003 enable_pin_detect(codec, nid,
4004 STAC_INSERT_EVENT);
4005 stac_issue_unsol_event(codec, nid,
4006 STAC_INSERT_EVENT);
4f1e6bc3 4007 }
c960a03b 4008 }
82bc955f 4009 }
a64135a2
MR		 4010 for (i = 0; i < spec->num_dmics; i++)
4011 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4012 AC_PINCTL_IN_EN);
f73d3585
TI		 4013 if (cfg->dig_out_pin)
4014 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4015 AC_PINCTL_OUT_EN);
4016 if (cfg->dig_in_pin)
4017 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4018 AC_PINCTL_IN_EN);
a64135a2 4019 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4020 hda_nid_t nid = spec->pwr_nids[i];
4021 int pinctl, def_conf;
f73d3585 4022
eb632128
TI		 4023 /* power on when no jack detection is available */
4024 if (!spec->hp_detect) {
4025 stac_toggle_power_map(codec, nid, 1);
4026 continue;
4027 }
4028
4029 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4030 continue; /* already has an unsol event */
4031
4032 pinctl = snd_hda_codec_read(codec, nid, 0,
4033 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4034 /* outputs are only ports capable of power management
4035 * any attempts on powering down a input port cause the
4036 * referenced VREF to act quirky.
4037 */
eb632128
TI		 4038 if (pinctl & AC_PINCTL_IN_EN) {
4039 stac_toggle_power_map(codec, nid, 1);
a64135a2 4040 continue;
eb632128 4041 }
f73d3585
TI		 4042 def_conf = snd_hda_codec_read(codec, nid, 0,
4043 AC_VERB_GET_CONFIG_DEFAULT, 0);
4044 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4045 /* skip any ports that don't have jacks since presence
4046 * detection is useless */
f73d3585
TI		 4047 if (def_conf != AC_JACK_PORT_COMPLEX) {
4048 if (def_conf != AC_JACK_PORT_NONE)
4049 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4050 continue;
f73d3585 4051 }
12dde4c6
TI		 4052 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4053 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4054 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4055 }
a64135a2 4056 }
b76c850f
MR		 4057 if (spec->dac_list)
4058 stac92xx_power_down(codec);
c7d4b2fa
M		 4059 return 0;
4060}
4061
74aeaabc
MR		 4062static void stac92xx_free_jacks(struct hda_codec *codec)
4063{
e4973e1e 4064#ifdef CONFIG_SND_JACK
b94d3539 4065 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4066 struct sigmatel_spec *spec = codec->spec;
b94d3539 4067 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4068 struct sigmatel_jack *jacks = spec->jacks.list;
4069 int i;
4070 for (i = 0; i < spec->jacks.used; i++)
4071 snd_device_free(codec->bus->card, &jacks[i].jack);
4072 }
4073 snd_array_free(&spec->jacks);
e4973e1e 4074#endif
74aeaabc
MR		 4075}
4076
603c4019
TI		 4077static void stac92xx_free_kctls(struct hda_codec *codec)
4078{
4079 struct sigmatel_spec *spec = codec->spec;
4080
4081 if (spec->kctls.list) {
4082 struct snd_kcontrol_new *kctl = spec->kctls.list;
4083 int i;
4084 for (i = 0; i < spec->kctls.used; i++)
4085 kfree(kctl[i].name);
4086 }
4087 snd_array_free(&spec->kctls);
4088}
4089
2f2f4251
M		 4090static void stac92xx_free(struct hda_codec *codec)
4091{
c7d4b2fa 4092 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4093
4094 if (! spec)
4095 return;
4096
af9f341a 4097 kfree(spec->pin_configs);
74aeaabc
MR		 4098 stac92xx_free_jacks(codec);
4099 snd_array_free(&spec->events);
11b44bbd 4100
c7d4b2fa 4101 kfree(spec);
1cd2224c 4102 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4103}
4104
4e55096e
M		 4105static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4106 unsigned int flag)
4107{
4108 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4109 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4110
f9acba43
TI		 4111 if (pin_ctl & AC_PINCTL_IN_EN) {
4112 /*
4113 * we need to check the current set-up direction of
4114 * shared input pins since they can be switched via
4115 * "xxx as Output" mixer switch
4116 */
4117 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4118 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4119 return;
4120 }
4121
7b043899
SL		 4122 /* if setting pin direction bits, clear the current
4123 direction bits first */
4124 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4125 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4126
82beb8fd 4127 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4128 AC_VERB_SET_PIN_WIDGET_CONTROL,
4129 pin_ctl | flag);
4130}
4131
4132static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4133 unsigned int flag)
4134{
4135 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4136 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4137 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4138 AC_VERB_SET_PIN_WIDGET_CONTROL,
4139 pin_ctl & ~flag);
4140}
4141
e6e3ea25 4142static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4143{
4144 if (!nid)
4145 return 0;
4146 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4147 & (1 << 31))
4148 return 1;
314634bc
TI		 4149 return 0;
4150}
4151
d7a89436
TI		 4152/* return non-zero if the hp-pin of the given array index isn't
4153 * a jack-detection target
4154 */
4155static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4156{
4157 struct auto_pin_cfg *cfg = &spec->autocfg;
4158
4159 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4160 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4161 return 1;
c21ca4a8 4162 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4163 return 1;
4164 /* ignore if the pin is set as line-out */
4165 if (cfg->hp_pins[i] == spec->hp_switch)
4166 return 1;
4167 return 0;
4168}
4169
c6e4c666 4170static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4171{
4172 struct sigmatel_spec *spec = codec->spec;
4173 struct auto_pin_cfg *cfg = &spec->autocfg;
4174 int i, presence;
4175
eb06ed8f 4176 presence = 0;
4fe5195c
MR		 4177 if (spec->gpio_mute)
4178 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4179 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4180
eb06ed8f 4181 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4182 if (presence)
4183 break;
d7a89436
TI		 4184 if (no_hp_sensing(spec, i))
4185 continue;
e6e3ea25
TI		 4186 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4187 if (presence) {
4188 unsigned int pinctl;
4189 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4190 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4191 if (pinctl & AC_PINCTL_IN_EN)
4192 presence = 0; /* mic- or line-input */
4193 }
eb06ed8f 4194 }
4e55096e
M		 4195
4196 if (presence) {
d7a89436 4197 /* disable lineouts */
7c2ba97b 4198 if (spec->hp_switch)
d7a89436
TI		 4199 stac92xx_reset_pinctl(codec, spec->hp_switch,
4200 AC_PINCTL_OUT_EN);
4e55096e
M		 4201 for (i = 0; i < cfg->line_outs; i++)
4202 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4203 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4204 for (i = 0; i < cfg->speaker_outs; i++)
4205 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4206 AC_PINCTL_OUT_EN);
c0cea0d0 4207 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4208 stac_gpio_set(codec, spec->gpio_mask,
4209 spec->gpio_dir, spec->gpio_data &
4210 ~spec->eapd_mask);
4e55096e 4211 } else {
d7a89436 4212 /* enable lineouts */
7c2ba97b 4213 if (spec->hp_switch)
d7a89436
TI		 4214 stac92xx_set_pinctl(codec, spec->hp_switch,
4215 AC_PINCTL_OUT_EN);
4e55096e
M		 4216 for (i = 0; i < cfg->line_outs; i++)
4217 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4218 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4219 for (i = 0; i < cfg->speaker_outs; i++)
4220 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4221 AC_PINCTL_OUT_EN);
c0cea0d0 4222 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4223 stac_gpio_set(codec, spec->gpio_mask,
4224 spec->gpio_dir, spec->gpio_data |
4225 spec->eapd_mask);
4e55096e 4226 }
d7a89436
TI		 4227 /* toggle hp outs */
4228 for (i = 0; i < cfg->hp_outs; i++) {
4229 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4230 if (no_hp_sensing(spec, i))
4231 continue;
4232 if (presence)
4233 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4234#if 0 /* FIXME */
4235/* Resetting the pinctl like below may lead to (a sort of) regressions
4236 * on some devices since they use the HP pin actually for line/speaker
4237 * outs although the default pin config shows a different pin (that is
4238 * wrong and useless).
4239 *
4240 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4241 * But, disabling the code below just works around it, and I'm too tired of
4242 * bug reports with such devices...
4243 */
d7a89436
TI		 4244 else
4245 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4246#endif /* FIXME */
d7a89436 4247 }
4e55096e
M		 4248}
4249
f73d3585
TI		 4250static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4251 int enable)
a64135a2
MR		 4252{
4253 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4254 unsigned int idx, val;
4255
4256 for (idx = 0; idx < spec->num_pwrs; idx++) {
4257 if (spec->pwr_nids[idx] == nid)
4258 break;
4259 }
4260 if (idx >= spec->num_pwrs)
4261 return;
d0513fc6
MR		 4262
4263 /* several codecs have two power down bits */
4264 if (spec->pwr_mapping)
4265 idx = spec->pwr_mapping[idx];
4266 else
4267 idx = 1 << idx;
a64135a2 4268
f73d3585
TI		 4269 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4270 if (enable)
a64135a2
MR		 4271 val &= ~idx;
4272 else
4273 val |= idx;
4274
4275 /* power down unused output ports */
4276 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4277}
4278
f73d3585
TI		 4279static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4280{
e6e3ea25 4281 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4282}
a64135a2 4283
74aeaabc
MR		 4284static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4285{
4286 struct sigmatel_spec *spec = codec->spec;
4287 struct sigmatel_jack *jacks = spec->jacks.list;
4288
4289 if (jacks) {
4290 int i;
4291 for (i = 0; i < spec->jacks.used; i++) {
4292 if (jacks->nid == nid) {
4293 unsigned int pin_ctl =
4294 snd_hda_codec_read(codec, nid,
4295 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4296 0x00);
4297 int type = jacks->type;
4298 if (type == (SND_JACK_LINEOUT
4299 | SND_JACK_HEADPHONE))
4300 type = (pin_ctl & AC_PINCTL_HP_EN)
4301 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4302 snd_jack_report(jacks->jack,
e6e3ea25 4303 get_pin_presence(codec, nid)
74aeaabc
MR		 4304 ? type : 0);
4305 }
4306 jacks++;
4307 }
4308 }
4309}
a64135a2 4310
c6e4c666
TI		 4311static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4312 unsigned char type)
4313{
4314 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4315 if (!event)
4316 return;
4317 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4318}
4319
314634bc
TI		 4320static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4321{
a64135a2 4322 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4323 struct sigmatel_event *event;
4324 int tag, data;
a64135a2 4325
c6e4c666
TI		 4326 tag = (res >> 26) & 0x7f;
4327 event = stac_get_event_from_tag(codec, tag);
4328 if (!event)
4329 return;
4330
4331 switch (event->type) {
314634bc 4332 case STAC_HP_EVENT:
c6e4c666 4333 stac92xx_hp_detect(codec);
a64135a2 4334 /* fallthru */
74aeaabc 4335 case STAC_INSERT_EVENT:
a64135a2 4336 case STAC_PWR_EVENT:
c6e4c666
TI		 4337 if (spec->num_pwrs > 0)
4338 stac92xx_pin_sense(codec, event->nid);
4339 stac92xx_report_jack(codec, event->nid);
72474be6 4340 break;
c6e4c666
TI		 4341 case STAC_VREF_EVENT:
4342 data = snd_hda_codec_read(codec, codec->afg, 0,
4343 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4344 /* toggle VREF state based on GPIOx status */
4345 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4346 !!(data & (1 << event->data)));
72474be6 4347 break;
314634bc
TI		 4348 }
4349}
4350
2d34e1b3
TI		 4351#ifdef CONFIG_PROC_FS
4352static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4353 struct hda_codec *codec, hda_nid_t nid)
4354{
4355 if (nid == codec->afg)
4356 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4357 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4358}
4359
4360static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4361 struct hda_codec *codec,
4362 unsigned int verb)
4363{
4364 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4365 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4366}
4367
4368/* stac92hd71bxx, stac92hd73xx */
4369static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4370 struct hda_codec *codec, hda_nid_t nid)
4371{
4372 stac92hd_proc_hook(buffer, codec, nid);
4373 if (nid == codec->afg)
4374 analog_loop_proc_hook(buffer, codec, 0xfa0);
4375}
4376
4377static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4378 struct hda_codec *codec, hda_nid_t nid)
4379{
4380 if (nid == codec->afg)
4381 analog_loop_proc_hook(buffer, codec, 0xfe0);
4382}
4383
4384static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4385 struct hda_codec *codec, hda_nid_t nid)
4386{
4387 if (nid == codec->afg)
4388 analog_loop_proc_hook(buffer, codec, 0xfeb);
4389}
4390#else
4391#define stac92hd_proc_hook NULL
4392#define stac92hd7x_proc_hook NULL
4393#define stac9205_proc_hook NULL
4394#define stac927x_proc_hook NULL
4395#endif
4396
cb53c626 4397#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4398static int stac92xx_resume(struct hda_codec *codec)
4399{
dc81bed1
TI		 4400 struct sigmatel_spec *spec = codec->spec;
4401
11b44bbd 4402 stac92xx_set_config_regs(codec);
2c885878 4403 stac92xx_init(codec);
82beb8fd
TI		 4404 snd_hda_codec_resume_amp(codec);
4405 snd_hda_codec_resume_cache(codec);
2c885878 4406 /* fake event to set up pins again to override cached values */
dc81bed1 4407 if (spec->hp_detect)
c6e4c666
TI		 4408 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4409 STAC_HP_EVENT);
ff6fdc37
M		 4410 return 0;
4411}
c6798d2b
MR		 4412
4413static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4414{
4415 struct sigmatel_spec *spec = codec->spec;
4416 if (spec->eapd_mask)
4417 stac_gpio_set(codec, spec->gpio_mask,
4418 spec->gpio_dir, spec->gpio_data &
4419 ~spec->eapd_mask);
4420 return 0;
4421}
ff6fdc37
M		 4422#endif
4423
2f2f4251
M		 4424static struct hda_codec_ops stac92xx_patch_ops = {
4425 .build_controls = stac92xx_build_controls,
4426 .build_pcms = stac92xx_build_pcms,
4427 .init = stac92xx_init,
4428 .free = stac92xx_free,
4e55096e 4429 .unsol_event = stac92xx_unsol_event,
cb53c626 4430#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4431 .suspend = stac92xx_suspend,
ff6fdc37
M		 4432 .resume = stac92xx_resume,
4433#endif
2f2f4251
M		 4434};
4435
4436static int patch_stac9200(struct hda_codec *codec)
4437{
4438 struct sigmatel_spec *spec;
c7d4b2fa 4439 int err;
2f2f4251 4440
e560d8d8 4441 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4442 if (spec == NULL)
4443 return -ENOMEM;
4444
4445 codec->spec = spec;
a4eed138 4446 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4447 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4448 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4449 stac9200_models,
4450 stac9200_cfg_tbl);
11b44bbd
RF		 4451 if (spec->board_config < 0) {
4452 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4453 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4454 } else
4455 err = stac_save_pin_cfgs(codec,
4456 stac9200_brd_tbl[spec->board_config]);
4457 if (err < 0) {
4458 stac92xx_free(codec);
4459 return err;
403d1944 4460 }
2f2f4251
M		 4461
4462 spec->multiout.max_channels = 2;
4463 spec->multiout.num_dacs = 1;
4464 spec->multiout.dac_nids = stac9200_dac_nids;
4465 spec->adc_nids = stac9200_adc_nids;
4466 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4467 spec->num_muxes = 1;
8b65727b 4468 spec->num_dmics = 0;
9e05b7a3 4469 spec->num_adcs = 1;
a64135a2 4470 spec->num_pwrs = 0;
c7d4b2fa 4471
58eec423
MCC		 4472 if (spec->board_config == STAC_9200_M4 ||
4473 spec->board_config == STAC_9200_M4_2 ||
bf277785 4474 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4475 spec->init = stac9200_eapd_init;
4476 else
4477 spec->init = stac9200_core_init;
2f2f4251 4478 spec->mixer = stac9200_mixer;
c7d4b2fa 4479
117f257d
TI		 4480 if (spec->board_config == STAC_9200_PANASONIC) {
4481 spec->gpio_mask = spec->gpio_dir = 0x09;
4482 spec->gpio_data = 0x00;
4483 }
4484
c7d4b2fa
M		 4485 err = stac9200_parse_auto_config(codec);
4486 if (err < 0) {
4487 stac92xx_free(codec);
4488 return err;
4489 }
2f2f4251 4490
2acc9dcb
TI		 4491 /* CF-74 has no headphone detection, and the driver should *NOT*
4492 * do detection and HP/speaker toggle because the hardware does it.
4493 */
4494 if (spec->board_config == STAC_9200_PANASONIC)
4495 spec->hp_detect = 0;
4496
2f2f4251
M		 4497 codec->patch_ops = stac92xx_patch_ops;
4498
4499 return 0;
4500}
4501
8e21c34c
TD		 4502static int patch_stac925x(struct hda_codec *codec)
4503{
4504 struct sigmatel_spec *spec;
4505 int err;
4506
4507 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4508 if (spec == NULL)
4509 return -ENOMEM;
4510
4511 codec->spec = spec;
a4eed138 4512 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4513 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4514
4515 /* Check first for codec ID */
4516 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4517 STAC_925x_MODELS,
4518 stac925x_models,
4519 stac925x_codec_id_cfg_tbl);
4520
4521 /* Now checks for PCI ID, if codec ID is not found */
4522 if (spec->board_config < 0)
4523 spec->board_config = snd_hda_check_board_config(codec,
4524 STAC_925x_MODELS,
8e21c34c
TD		 4525 stac925x_models,
4526 stac925x_cfg_tbl);
9e507abd 4527 again:
8e21c34c 4528 if (spec->board_config < 0) {
9cb36c2a 4529 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4530 "using BIOS defaults\n");
8e21c34c 4531 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4532 } else
4533 err = stac_save_pin_cfgs(codec,
4534 stac925x_brd_tbl[spec->board_config]);
4535 if (err < 0) {
4536 stac92xx_free(codec);
4537 return err;
8e21c34c
TD		 4538 }
4539
4540 spec->multiout.max_channels = 2;
4541 spec->multiout.num_dacs = 1;
4542 spec->multiout.dac_nids = stac925x_dac_nids;
4543 spec->adc_nids = stac925x_adc_nids;
4544 spec->mux_nids = stac925x_mux_nids;
4545 spec->num_muxes = 1;
9e05b7a3 4546 spec->num_adcs = 1;
a64135a2 4547 spec->num_pwrs = 0;
2c11f955
TD		 4548 switch (codec->vendor_id) {
4549 case 0x83847632: /* STAC9202 */
4550 case 0x83847633: /* STAC9202D */
4551 case 0x83847636: /* STAC9251 */
4552 case 0x83847637: /* STAC9251D */
f6e9852a 4553 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4554 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4555 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4556 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4557 break;
4558 default:
4559 spec->num_dmics = 0;
4560 break;
4561 }
8e21c34c
TD		 4562
4563 spec->init = stac925x_core_init;
4564 spec->mixer = stac925x_mixer;
4565
4566 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4567 if (!err) {
4568 if (spec->board_config < 0) {
4569 printk(KERN_WARNING "hda_codec: No auto-config is "
4570 "available, default to model=ref\n");
4571 spec->board_config = STAC_925x_REF;
4572 goto again;
4573 }
4574 err = -EINVAL;
4575 }
8e21c34c
TD		 4576 if (err < 0) {
4577 stac92xx_free(codec);
4578 return err;
4579 }
4580
4581 codec->patch_ops = stac92xx_patch_ops;
4582
4583 return 0;
4584}
4585
e1f0d669
MR		 4586static struct hda_input_mux stac92hd73xx_dmux = {
4587 .num_items = 4,
4588 .items = {
4589 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4590 { "Digital Mic 1", 0x09 },
4591 { "Digital Mic 2", 0x0a },
2a9c7816 4592 { "CD", 0x08 },
e1f0d669
MR		 4593 }
4594};
4595
4596static int patch_stac92hd73xx(struct hda_codec *codec)
4597{
4598 struct sigmatel_spec *spec;
4599 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4600 int err = 0;
c21ca4a8 4601 int num_dacs;
e1f0d669
MR		 4602
4603 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4604 if (spec == NULL)
4605 return -ENOMEM;
4606
4607 codec->spec = spec;
e99d32b3 4608 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4609 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4610 spec->pin_nids = stac92hd73xx_pin_nids;
4611 spec->board_config = snd_hda_check_board_config(codec,
4612 STAC_92HD73XX_MODELS,
4613 stac92hd73xx_models,
4614 stac92hd73xx_cfg_tbl);
4615again:
4616 if (spec->board_config < 0) {
4617 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4618 " STAC92HD73XX, using BIOS defaults\n");
4619 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4620 } else
4621 err = stac_save_pin_cfgs(codec,
4622 stac92hd73xx_brd_tbl[spec->board_config]);
4623 if (err < 0) {
4624 stac92xx_free(codec);
4625 return err;
e1f0d669
MR		 4626 }
4627
c21ca4a8 4628 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4629 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4630
c21ca4a8 4631 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4632 printk(KERN_WARNING "hda_codec: Could not determine "
4633 "number of channels defaulting to DAC count\n");
c21ca4a8 4634 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4635 }
c21ca4a8 4636 switch (num_dacs) {
e1f0d669
MR		 4637 case 0x3: /* 6 Channel */
4638 spec->mixer = stac92hd73xx_6ch_mixer;
4639 spec->init = stac92hd73xx_6ch_core_init;
4640 break;
4641 case 0x4: /* 8 Channel */
e1f0d669
MR		 4642 spec->mixer = stac92hd73xx_8ch_mixer;
4643 spec->init = stac92hd73xx_8ch_core_init;
4644 break;
4645 case 0x5: /* 10 Channel */
e1f0d669
MR		 4646 spec->mixer = stac92hd73xx_10ch_mixer;
4647 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4648 }
4649 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4650
e1f0d669
MR		 4651 spec->aloopback_mask = 0x01;
4652 spec->aloopback_shift = 8;
4653
1cd2224c 4654 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4655 spec->mux_nids = stac92hd73xx_mux_nids;
4656 spec->adc_nids = stac92hd73xx_adc_nids;
4657 spec->dmic_nids = stac92hd73xx_dmic_nids;
4658 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4659 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4660 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4661 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4662
4663 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4664 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4665 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4666 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4667 sizeof(stac92hd73xx_dmux));
4668
a7662640 4669 switch (spec->board_config) {
6b3ab21e 4670 case STAC_DELL_EQ:
d654a660 4671 spec->init = dell_eq_core_init;
6b3ab21e 4672 /* fallthru */
661cd8fb
TI		 4673 case STAC_DELL_M6_AMIC:
4674 case STAC_DELL_M6_DMIC:
4675 case STAC_DELL_M6_BOTH:
2a9c7816 4676 spec->num_smuxes = 0;
2a9c7816
MR		 4677 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4678 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4679 spec->eapd_switch = 0;
2a9c7816 4680 spec->num_amps = 1;
6b3ab21e 4681
c21ca4a8 4682 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4683 spec->init = dell_m6_core_init;
661cd8fb
TI		 4684 switch (spec->board_config) {
4685 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4686 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4687 spec->num_dmics = 0;
2a9c7816 4688 spec->private_dimux.num_items = 1;
a7662640 4689 break;
661cd8fb 4690 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4691 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4692 spec->num_dmics = 1;
2a9c7816 4693 spec->private_dimux.num_items = 2;
a7662640 4694 break;
661cd8fb 4695 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4696 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4697 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4698 spec->num_dmics = 1;
2a9c7816 4699 spec->private_dimux.num_items = 2;
a7662640
MR		 4700 break;
4701 }
4702 break;
4703 default:
4704 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4705 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4706 spec->eapd_switch = 1;
a7662640 4707 }
b2c4f4d7
MR		 4708 if (spec->board_config > STAC_92HD73XX_REF) {
4709 /* GPIO0 High = Enable EAPD */
4710 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4711 spec->gpio_data = 0x01;
4712 }
2a9c7816 4713 spec->dinput_mux = &spec->private_dimux;
a7662640 4714
a64135a2
MR		 4715 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4716 spec->pwr_nids = stac92hd73xx_pwr_nids;
4717
d9737751 4718 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4719
4720 if (!err) {
4721 if (spec->board_config < 0) {
4722 printk(KERN_WARNING "hda_codec: No auto-config is "
4723 "available, default to model=ref\n");
4724 spec->board_config = STAC_92HD73XX_REF;
4725 goto again;
4726 }
4727 err = -EINVAL;
4728 }
4729
4730 if (err < 0) {
4731 stac92xx_free(codec);
4732 return err;
4733 }
4734
9e43f0de
TI		 4735 if (spec->board_config == STAC_92HD73XX_NO_JD)
4736 spec->hp_detect = 0;
4737
e1f0d669
MR		 4738 codec->patch_ops = stac92xx_patch_ops;
4739
2d34e1b3
TI		 4740 codec->proc_widget_hook = stac92hd7x_proc_hook;
4741
e1f0d669
MR		 4742 return 0;
4743}
4744
d0513fc6
MR		 4745static struct hda_input_mux stac92hd83xxx_dmux = {
4746 .num_items = 3,
4747 .items = {
4748 { "Analog Inputs", 0x03 },
4749 { "Digital Mic 1", 0x04 },
4750 { "Digital Mic 2", 0x05 },
4751 }
4752};
4753
4754static int patch_stac92hd83xxx(struct hda_codec *codec)
4755{
4756 struct sigmatel_spec *spec;
4757 int err;
4758
4759 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4760 if (spec == NULL)
4761 return -ENOMEM;
4762
4763 codec->spec = spec;
0ffa9807 4764 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4765 spec->mono_nid = 0x19;
4766 spec->digbeep_nid = 0x21;
4767 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4768 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4769 spec->adc_nids = stac92hd83xxx_adc_nids;
4770 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4771 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR		 4772 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4773 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4774 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 4775
4776 spec->init = stac92hd83xxx_core_init;
4777 switch (codec->vendor_id) {
4778 case 0x111d7605:
d0513fc6
MR		 4779 break;
4780 default:
4781 spec->num_pwrs--;
4782 spec->init++; /* switch to config #2 */
d0513fc6
MR		 4783 }
4784
4785 spec->mixer = stac92hd83xxx_mixer;
4786 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4787 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4788 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4789 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR		 4790 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4791 spec->dinput_mux = &stac92hd83xxx_dmux;
4792 spec->pin_nids = stac92hd83xxx_pin_nids;
4793 spec->board_config = snd_hda_check_board_config(codec,
4794 STAC_92HD83XXX_MODELS,
4795 stac92hd83xxx_models,
4796 stac92hd83xxx_cfg_tbl);
4797again:
4798 if (spec->board_config < 0) {
4799 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4800 " STAC92HD83XXX, using BIOS defaults\n");
4801 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4802 } else
4803 err = stac_save_pin_cfgs(codec,
4804 stac92hd83xxx_brd_tbl[spec->board_config]);
4805 if (err < 0) {
4806 stac92xx_free(codec);
4807 return err;
d0513fc6
MR		 4808 }
4809
4810 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4811 if (!err) {
4812 if (spec->board_config < 0) {
4813 printk(KERN_WARNING "hda_codec: No auto-config is "
4814 "available, default to model=ref\n");
4815 spec->board_config = STAC_92HD83XXX_REF;
4816 goto again;
4817 }
4818 err = -EINVAL;
4819 }
4820
4821 if (err < 0) {
4822 stac92xx_free(codec);
4823 return err;
4824 }
4825
4826 codec->patch_ops = stac92xx_patch_ops;
4827
2d34e1b3
TI		 4828 codec->proc_widget_hook = stac92hd_proc_hook;
4829
d0513fc6
MR		 4830 return 0;
4831}
4832
4b33c767
MR		 4833static struct hda_input_mux stac92hd71bxx_dmux = {
4834 .num_items = 4,
4835 .items = {
4836 { "Analog Inputs", 0x00 },
4837 { "Mixer", 0x01 },
4838 { "Digital Mic 1", 0x02 },
4839 { "Digital Mic 2", 0x03 },
4840 }
4841};
4842
e035b841
MR		 4843static int patch_stac92hd71bxx(struct hda_codec *codec)
4844{
4845 struct sigmatel_spec *spec;
4846 int err = 0;
4847
4848 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4849 if (spec == NULL)
4850 return -ENOMEM;
4851
4852 codec->spec = spec;
8daaaa97 4853 codec->patch_ops = stac92xx_patch_ops;
e035b841 4854 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4855 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4856 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4857 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4858 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4859 spec->board_config = snd_hda_check_board_config(codec,
4860 STAC_92HD71BXX_MODELS,
4861 stac92hd71bxx_models,
4862 stac92hd71bxx_cfg_tbl);
4863again:
4864 if (spec->board_config < 0) {
4865 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4866 " STAC92HD71BXX, using BIOS defaults\n");
4867 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4868 } else
4869 err = stac_save_pin_cfgs(codec,
4870 stac92hd71bxx_brd_tbl[spec->board_config]);
4871 if (err < 0) {
4872 stac92xx_free(codec);
4873 return err;
e035b841
MR		 4874 }
4875
41c3b648
TI		 4876 if (spec->board_config > STAC_92HD71BXX_REF) {
4877 /* GPIO0 = EAPD */
4878 spec->gpio_mask = 0x01;
4879 spec->gpio_dir = 0x01;
4880 spec->gpio_data = 0x01;
4881 }
4882
541eee87
MR		 4883 switch (codec->vendor_id) {
4884 case 0x111d76b6: /* 4 Port without Analog Mixer */
4885 case 0x111d76b7:
4886 case 0x111d76b4: /* 6 Port without Analog Mixer */
4887 case 0x111d76b5:
4888 spec->mixer = stac92hd71bxx_mixer;
4889 spec->init = stac92hd71bxx_core_init;
0ffa9807 4890 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4891 break;
aafc4412 4892 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4893 switch (spec->board_config) {
4894 case STAC_HP_M4:
72474be6 4895 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4896 err = stac_add_event(spec, codec->afg,
4897 STAC_VREF_EVENT, 0x02);
4898 if (err < 0)
4899 return err;
c5d08bb5 4900 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4901 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4902 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4903 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4904 AC_USRSP_EN | err);
72474be6
MR		 4905 spec->gpio_mask |= 0x02;
4906 break;
4907 }
8daaaa97 4908 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4909 (codec->revision_id & 0xf) == 1)
8daaaa97 4910 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4911
aafc4412
MR		 4912 /* no output amps */
4913 spec->num_pwrs = 0;
4914 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4915 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4916
4917 /* disable VSW */
4918 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4919 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4920 break;
4921 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4922 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4923 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4924
aafc4412
MR		 4925 /* no output amps */
4926 spec->num_pwrs = 0;
4927 /* fallthru */
541eee87 4928 default:
4b33c767 4929 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4930 spec->mixer = stac92hd71bxx_analog_mixer;
4931 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4932 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4933 }
4934
4b33c767 4935 spec->aloopback_mask = 0x50;
541eee87
MR		 4936 spec->aloopback_shift = 0;
4937
8daaaa97 4938 spec->powerdown_adcs = 1;
1cd2224c 4939 spec->digbeep_nid = 0x26;
e035b841
MR		 4940 spec->mux_nids = stac92hd71bxx_mux_nids;
4941 spec->adc_nids = stac92hd71bxx_adc_nids;
4942 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4943 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4944 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4945 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4946
4947 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4948 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4949
6a14f585
MR		 4950 switch (spec->board_config) {
4951 case STAC_HP_M4:
6a14f585 4952 /* enable internal microphone */
af9f341a 4953 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4954 stac92xx_auto_set_pinctl(codec, 0x0e,
4955 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4956 /* fallthru */
4957 case STAC_DELL_M4_2:
4958 spec->num_dmics = 0;
4959 spec->num_smuxes = 0;
4960 spec->num_dmuxes = 0;
4961 break;
4962 case STAC_DELL_M4_1:
4963 case STAC_DELL_M4_3:
4964 spec->num_dmics = 1;
4965 spec->num_smuxes = 0;
4966 spec->num_dmuxes = 0;
6a14f585
MR		 4967 break;
4968 default:
4969 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4970 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4971 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4972 };
4973
c21ca4a8 4974 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 4975 if (spec->dinput_mux)
4976 spec->private_dimux.num_items +=
4977 spec->num_dmics -
4978 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4979
4980 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4981 if (!err) {
4982 if (spec->board_config < 0) {
4983 printk(KERN_WARNING "hda_codec: No auto-config is "
4984 "available, default to model=ref\n");
4985 spec->board_config = STAC_92HD71BXX_REF;
4986 goto again;
4987 }
4988 err = -EINVAL;
4989 }
4990
4991 if (err < 0) {
4992 stac92xx_free(codec);
4993 return err;
4994 }
4995
2d34e1b3
TI		 4996 codec->proc_widget_hook = stac92hd7x_proc_hook;
4997
e035b841
MR		 4998 return 0;
4999};
5000
2f2f4251
M		 5001static int patch_stac922x(struct hda_codec *codec)
5002{
5003 struct sigmatel_spec *spec;
c7d4b2fa 5004 int err;
2f2f4251 5005
e560d8d8 5006 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5007 if (spec == NULL)
5008 return -ENOMEM;
5009
5010 codec->spec = spec;
a4eed138 5011 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5012 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5013 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5014 stac922x_models,
5015 stac922x_cfg_tbl);
536319af 5016 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5017 spec->gpio_mask = spec->gpio_dir = 0x03;
5018 spec->gpio_data = 0x03;
3fc24d85
TI		 5019 /* Intel Macs have all same PCI SSID, so we need to check
5020 * codec SSID to distinguish the exact models
5021 */
6f0778d8 5022 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5023 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5024
5025 case 0x106b0800:
5026 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5027 break;
5d5d3bc3
IZ		 5028 case 0x106b0600:
5029 case 0x106b0700:
5030 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5031 break;
5d5d3bc3
IZ		 5032 case 0x106b0e00:
5033 case 0x106b0f00:
5034 case 0x106b1600:
5035 case 0x106b1700:
5036 case 0x106b0200:
5037 case 0x106b1e00:
5038 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5039 break;
5d5d3bc3
IZ		 5040 case 0x106b1a00:
5041 case 0x00000100:
5042 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5043 break;
5d5d3bc3
IZ		 5044 case 0x106b0a00:
5045 case 0x106b2200:
5046 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5047 break;
536319af
NB		 5048 default:
5049 spec->board_config = STAC_INTEL_MAC_V3;
5050 break;
3fc24d85
TI		 5051 }
5052 }
5053
9e507abd 5054 again:
11b44bbd
RF		 5055 if (spec->board_config < 0) {
5056 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5057 "using BIOS defaults\n");
5058 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5059 } else
5060 err = stac_save_pin_cfgs(codec,
5061 stac922x_brd_tbl[spec->board_config]);
5062 if (err < 0) {
5063 stac92xx_free(codec);
5064 return err;
403d1944 5065 }
2f2f4251 5066
c7d4b2fa
M		 5067 spec->adc_nids = stac922x_adc_nids;
5068 spec->mux_nids = stac922x_mux_nids;
2549413e 5069 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5070 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5071 spec->num_dmics = 0;
a64135a2 5072 spec->num_pwrs = 0;
c7d4b2fa
M		 5073
5074 spec->init = stac922x_core_init;
2f2f4251 5075 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5076
5077 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5078
3cc08dc6 5079 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5080 if (!err) {
5081 if (spec->board_config < 0) {
5082 printk(KERN_WARNING "hda_codec: No auto-config is "
5083 "available, default to model=ref\n");
5084 spec->board_config = STAC_D945_REF;
5085 goto again;
5086 }
5087 err = -EINVAL;
5088 }
3cc08dc6
MP		 5089 if (err < 0) {
5090 stac92xx_free(codec);
5091 return err;
5092 }
5093
5094 codec->patch_ops = stac92xx_patch_ops;
5095
807a4636
TI		 5096 /* Fix Mux capture level; max to 2 */
5097 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5098 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5099 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5100 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5101 (0 << AC_AMPCAP_MUTE_SHIFT));
5102
3cc08dc6
MP		 5103 return 0;
5104}
5105
5106static int patch_stac927x(struct hda_codec *codec)
5107{
5108 struct sigmatel_spec *spec;
5109 int err;
5110
5111 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5112 if (spec == NULL)
5113 return -ENOMEM;
5114
5115 codec->spec = spec;
a4eed138 5116 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5117 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5118 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5119 stac927x_models,
5120 stac927x_cfg_tbl);
9e507abd 5121 again:
8e9068b1
MR		 5122 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5123 if (spec->board_config < 0)
5124 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5125 "STAC927x, using BIOS defaults\n");
11b44bbd 5126 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5127 } else
5128 err = stac_save_pin_cfgs(codec,
5129 stac927x_brd_tbl[spec->board_config]);
5130 if (err < 0) {
5131 stac92xx_free(codec);
5132 return err;
3cc08dc6
MP		 5133 }
5134
1cd2224c 5135 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5136 spec->adc_nids = stac927x_adc_nids;
5137 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5138 spec->mux_nids = stac927x_mux_nids;
5139 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5140 spec->smux_nids = stac927x_smux_nids;
5141 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5142 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5143 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5144 spec->multiout.dac_nids = spec->dac_nids;
5145
81d3dbde 5146 switch (spec->board_config) {
93ed1503 5147 case STAC_D965_3ST:
93ed1503 5148 case STAC_D965_5ST:
8e9068b1 5149 /* GPIO0 High = Enable EAPD */
0fc9dec4 5150 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5151 spec->gpio_data = 0x01;
8e9068b1
MR		 5152 spec->num_dmics = 0;
5153
93ed1503 5154 spec->init = d965_core_init;
9e05b7a3 5155 spec->mixer = stac927x_mixer;
81d3dbde 5156 break;
8e9068b1 5157 case STAC_DELL_BIOS:
780c8be4
MR		 5158 switch (codec->subsystem_id) {
5159 case 0x10280209:
5160 case 0x1028022e:
5161 /* correct the device field to SPDIF out */
af9f341a 5162 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5163 break;
5164 };
03d7ca17 5165 /* configure the analog microphone on some laptops */
af9f341a 5166 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5167 /* correct the front output jack as a hp out */
af9f341a 5168 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5169 /* correct the front input jack as a mic */
af9f341a 5170 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5171 /* fallthru */
8e9068b1
MR		 5172 case STAC_DELL_3ST:
5173 /* GPIO2 High = Enable EAPD */
0fc9dec4 5174 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5175 spec->gpio_data = 0x04;
7f16859a
MR		 5176 spec->dmic_nids = stac927x_dmic_nids;
5177 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5178
8e9068b1
MR		 5179 spec->init = d965_core_init;
5180 spec->mixer = stac927x_mixer;
5181 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5182 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5183 break;
5184 default:
b2c4f4d7
MR		 5185 if (spec->board_config > STAC_D965_REF) {
5186 /* GPIO0 High = Enable EAPD */
5187 spec->eapd_mask = spec->gpio_mask = 0x01;
5188 spec->gpio_dir = spec->gpio_data = 0x01;
5189 }
8e9068b1
MR		 5190 spec->num_dmics = 0;
5191
5192 spec->init = stac927x_core_init;
5193 spec->mixer = stac927x_mixer;
7f16859a
MR		 5194 }
5195
a64135a2 5196 spec->num_pwrs = 0;
e1f0d669
MR		 5197 spec->aloopback_mask = 0x40;
5198 spec->aloopback_shift = 0;
c0cea0d0 5199 spec->eapd_switch = 1;
8e9068b1 5200
3cc08dc6 5201 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5202 if (!err) {
5203 if (spec->board_config < 0) {
5204 printk(KERN_WARNING "hda_codec: No auto-config is "
5205 "available, default to model=ref\n");
5206 spec->board_config = STAC_D965_REF;
5207 goto again;
5208 }
5209 err = -EINVAL;
5210 }
c7d4b2fa
M		 5211 if (err < 0) {
5212 stac92xx_free(codec);
5213 return err;
5214 }
2f2f4251
M		 5215
5216 codec->patch_ops = stac92xx_patch_ops;
5217
2d34e1b3
TI		 5218 codec->proc_widget_hook = stac927x_proc_hook;
5219
52987656
TI		 5220 /*
5221 * !!FIXME!!
5222 * The STAC927x seem to require fairly long delays for certain
5223 * command sequences. With too short delays (even if the answer
5224 * is set to RIRB properly), it results in the silence output
5225 * on some hardwares like Dell.
5226 *
5227 * The below flag enables the longer delay (see get_response
5228 * in hda_intel.c).
5229 */
5230 codec->bus->needs_damn_long_delay = 1;
5231
e28d8322
TI		 5232 /* no jack detecion for ref-no-jd model */
5233 if (spec->board_config == STAC_D965_REF_NO_JD)
5234 spec->hp_detect = 0;
5235
2f2f4251
M		 5236 return 0;
5237}
5238
f3302a59
MP		 5239static int patch_stac9205(struct hda_codec *codec)
5240{
5241 struct sigmatel_spec *spec;
8259980e 5242 int err;
f3302a59
MP		 5243
5244 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5245 if (spec == NULL)
5246 return -ENOMEM;
5247
5248 codec->spec = spec;
a4eed138 5249 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5250 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5251 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5252 stac9205_models,
5253 stac9205_cfg_tbl);
9e507abd 5254 again:
11b44bbd
RF		 5255 if (spec->board_config < 0) {
5256 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5257 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5258 } else
5259 err = stac_save_pin_cfgs(codec,
5260 stac9205_brd_tbl[spec->board_config]);
5261 if (err < 0) {
5262 stac92xx_free(codec);
5263 return err;
f3302a59
MP		 5264 }
5265
1cd2224c 5266 spec->digbeep_nid = 0x23;
f3302a59 5267 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5268 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5269 spec->mux_nids = stac9205_mux_nids;
2549413e 5270 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5271 spec->smux_nids = stac9205_smux_nids;
5272 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5273 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5274 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5275 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5276 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5277 spec->num_pwrs = 0;
f3302a59
MP		 5278
5279 spec->init = stac9205_core_init;
5280 spec->mixer = stac9205_mixer;
5281
e1f0d669
MR		 5282 spec->aloopback_mask = 0x40;
5283 spec->aloopback_shift = 0;
c0cea0d0 5284 spec->eapd_switch = 1;
f3302a59 5285 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5286
ae0a8ed8 5287 switch (spec->board_config){
ae0a8ed8 5288 case STAC_9205_DELL_M43:
87d48363 5289 /* Enable SPDIF in/out */
af9f341a
TI		 5290 stac_change_pin_config(codec, 0x1f, 0x01441030);
5291 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5292
4fe5195c 5293 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5294 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5295 if (err < 0)
5296 return err;
c5d08bb5 5297 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5298 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5299 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5300 AC_VERB_SET_UNSOLICITED_ENABLE,
5301 AC_USRSP_EN | err);
4fe5195c
MR		 5302
5303 spec->gpio_dir = 0x0b;
0fc9dec4 5304 spec->eapd_mask = 0x01;
4fe5195c
MR		 5305 spec->gpio_mask = 0x1b;
5306 spec->gpio_mute = 0x10;
e2e7d624 5307 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5308 * GPIO3 Low = DRM
87d48363 5309 */
4fe5195c 5310 spec->gpio_data = 0x01;
ae0a8ed8 5311 break;
b2c4f4d7
MR		 5312 case STAC_9205_REF:
5313 /* SPDIF-In enabled */
5314 break;
ae0a8ed8
TD		 5315 default:
5316 /* GPIO0 High = EAPD */
0fc9dec4 5317 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5318 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5319 break;
5320 }
33382403 5321
f3302a59 5322 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5323 if (!err) {
5324 if (spec->board_config < 0) {
5325 printk(KERN_WARNING "hda_codec: No auto-config is "
5326 "available, default to model=ref\n");
5327 spec->board_config = STAC_9205_REF;
5328 goto again;
5329 }
5330 err = -EINVAL;
5331 }
f3302a59
MP		 5332 if (err < 0) {
5333 stac92xx_free(codec);
5334 return err;
5335 }
5336
5337 codec->patch_ops = stac92xx_patch_ops;
5338
2d34e1b3
TI		 5339 codec->proc_widget_hook = stac9205_proc_hook;
5340
f3302a59
MP		 5341 return 0;
5342}
5343
db064e50 5344/*
6d859065 5345 * STAC9872 hack
db064e50
TI		 5346 */
5347
99ccc560 5348/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5349static hda_nid_t vaio_dacs[] = { 0x2 };
5350#define VAIO_HP_DAC 0x5
5351static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5352static hda_nid_t vaio_mux_nids[] = { 0x15 };
5353
5354static struct hda_input_mux vaio_mux = {
a3a2f429 5355 .num_items = 3,
db064e50 5356 .items = {
d773781c 5357 /* { "HP", 0x0 }, */
1624cb9a
TI		 5358 { "Mic Jack", 0x1 },
5359 { "Internal Mic", 0x2 },
db064e50
TI		 5360 { "PCM", 0x3 },
5361 }
5362};
5363
5364static struct hda_verb vaio_init[] = {
5365 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5366 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5367 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5368 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5369 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5370 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5371 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5372 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5373 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5374 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5375 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5376 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5377 {}
5378};
5379
6d859065
GM		 5380static struct hda_verb vaio_ar_init[] = {
5381 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5382 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5383 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5384 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5385/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5386 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5387 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5388 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5389 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5390/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5391 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5392 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5393 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5394 {}
5395};
5396
db064e50 5397static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5398 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5399 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5400 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5401 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5402 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5403 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5404 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5405 {
5406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5407 .name = "Capture Source",
5408 .count = 1,
5409 .info = stac92xx_mux_enum_info,
5410 .get = stac92xx_mux_enum_get,
5411 .put = stac92xx_mux_enum_put,
5412 },
5413 {}
5414};
5415
6d859065 5416static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5417 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5418 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5419 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5420 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5421 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5422 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5423 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5424 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5425 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5426 {
5427 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5428 .name = "Capture Source",
5429 .count = 1,
5430 .info = stac92xx_mux_enum_info,
5431 .get = stac92xx_mux_enum_get,
5432 .put = stac92xx_mux_enum_put,
5433 },
5434 {}
5435};
5436
5437static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5438 .build_controls = stac92xx_build_controls,
5439 .build_pcms = stac92xx_build_pcms,
5440 .init = stac92xx_init,
5441 .free = stac92xx_free,
cb53c626 5442#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5443 .resume = stac92xx_resume,
5444#endif
5445};
5446
72e7b0dd
TI		 5447static int stac9872_vaio_init(struct hda_codec *codec)
5448{
5449 int err;
5450
5451 err = stac92xx_init(codec);
5452 if (err < 0)
5453 return err;
5454 if (codec->patch_ops.unsol_event)
5455 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5456 return 0;
5457}
5458
5459static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5460{
e6e3ea25 5461 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5462 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5463 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5464 } else {
5465 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5466 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5467 }
5468}
5469
5470static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5471{
5472 switch (res >> 26) {
5473 case STAC_HP_EVENT:
5474 stac9872_vaio_hp_detect(codec, res);
5475 break;
5476 }
5477}
5478
5479static struct hda_codec_ops stac9872_vaio_patch_ops = {
5480 .build_controls = stac92xx_build_controls,
5481 .build_pcms = stac92xx_build_pcms,
5482 .init = stac9872_vaio_init,
5483 .free = stac92xx_free,
5484 .unsol_event = stac9872_vaio_unsol_event,
5485#ifdef CONFIG_PM
5486 .resume = stac92xx_resume,
5487#endif
5488};
5489
6d859065
GM		 5490enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5491 CXD9872RD_VAIO,
5492 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5493 STAC9872AK_VAIO,
5494 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5495 STAC9872K_VAIO,
5496 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5497 CXD9872AKD_VAIO,
5498 STAC_9872_MODELS,
5499};
5500
5501static const char *stac9872_models[STAC_9872_MODELS] = {
5502 [CXD9872RD_VAIO] = "vaio",
5503 [CXD9872AKD_VAIO] = "vaio-ar",
5504};
5505
5506static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5507 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5508 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5509 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5510 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5511 {}
5512};
5513
6d859065 5514static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5515{
5516 struct sigmatel_spec *spec;
5517 int board_config;
5518
f5fcc13c
TI		 5519 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5520 stac9872_models,
5521 stac9872_cfg_tbl);
db064e50
TI		 5522 if (board_config < 0)
5523 /* unknown config, let generic-parser do its job... */
5524 return snd_hda_parse_generic_codec(codec);
5525
5526 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5527 if (spec == NULL)
5528 return -ENOMEM;
5529
5530 codec->spec = spec;
5531 switch (board_config) {
6d859065
GM		 5532 case CXD9872RD_VAIO:
5533 case STAC9872AK_VAIO:
5534 case STAC9872K_VAIO:
db064e50
TI		 5535 spec->mixer = vaio_mixer;
5536 spec->init = vaio_init;
5537 spec->multiout.max_channels = 2;
5538 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5539 spec->multiout.dac_nids = vaio_dacs;
5540 spec->multiout.hp_nid = VAIO_HP_DAC;
5541 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5542 spec->adc_nids = vaio_adcs;
a64135a2 5543 spec->num_pwrs = 0;
db064e50
TI		 5544 spec->input_mux = &vaio_mux;
5545 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5546 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5547 break;
6d859065
GM		 5548
5549 case CXD9872AKD_VAIO:
5550 spec->mixer = vaio_ar_mixer;
5551 spec->init = vaio_ar_init;
5552 spec->multiout.max_channels = 2;
5553 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5554 spec->multiout.dac_nids = vaio_dacs;
5555 spec->multiout.hp_nid = VAIO_HP_DAC;
5556 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5557 spec->num_pwrs = 0;
6d859065
GM		 5558 spec->adc_nids = vaio_adcs;
5559 spec->input_mux = &vaio_mux;
5560 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5561 codec->patch_ops = stac9872_patch_ops;
6d859065 5562 break;
db064e50
TI		 5563 }
5564
db064e50
TI		 5565 return 0;
5566}
5567
5568
2f2f4251
M		 5569/*
5570 * patch entries
5571 */
1289e9e8 5572static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5573 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5574 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5575 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5576 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5577 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5578 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5579 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5580 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5581 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5582 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5583 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5584 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5585 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5586 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5587 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5588 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5589 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5590 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5591 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5592 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5593 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5594 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5595 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5596 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5597 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5598 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5599 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5600 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5601 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5602 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5603 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5604 /* The following does not take into account .id=0x83847661 when subsys =
5605 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5606 * currently not fully supported.
5607 */
5608 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5609 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5610 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5611 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5612 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5613 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5614 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5615 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5616 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5617 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5618 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5619 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5620 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5621 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5622 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5623 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5624 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5625 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5626 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5627 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5628 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5629 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5630 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5631 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5632 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5633 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5634 {} /* terminator */
5635};
1289e9e8
TI		 5636
5637MODULE_ALIAS("snd-hda-codec-id:8384*");
5638MODULE_ALIAS("snd-hda-codec-id:111d*");
5639
5640MODULE_LICENSE("GPL");
5641MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5642
5643static struct hda_codec_preset_list sigmatel_list = {
5644 .preset = snd_hda_preset_sigmatel,
5645 .owner = THIS_MODULE,
5646};
5647
5648static int __init patch_sigmatel_init(void)
5649{
5650 return snd_hda_add_codec_preset(&sigmatel_list);
5651}
5652
5653static void __exit patch_sigmatel_exit(void)
5654{
5655 snd_hda_delete_codec_preset(&sigmatel_list);
5656}
5657
5658module_init(patch_sigmatel_init)
5659module_exit(patch_sigmatel_exit)
Clone of davem's net-next-2.6 tree