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Commit | Line | Data |
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2f2f4251 M |
1 | /* |
2 | * Universal Interface for Intel High Definition Audio Codec | |
3 | * | |
4 | * HD audio interface patch for SigmaTel STAC92xx | |
5 | * | |
6 | * Copyright (c) 2005 Embedded Alley Solutions, Inc. | |
403d1944 | 7 | * Matt Porter <mporter@embeddedalley.com> |
2f2f4251 M |
8 | * |
9 | * Based on patch_cmedia.c and patch_realtek.c | |
10 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
11 | * | |
12 | * This driver is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This driver is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
2f2f4251 M |
27 | #include <linux/init.h> |
28 | #include <linux/delay.h> | |
29 | #include <linux/slab.h> | |
30 | #include <linux/pci.h> | |
31 | #include <sound/core.h> | |
c7d4b2fa | 32 | #include <sound/asoundef.h> |
45a6ac16 | 33 | #include <sound/jack.h> |
2f2f4251 M |
34 | #include "hda_codec.h" |
35 | #include "hda_local.h" | |
1cd2224c | 36 | #include "hda_beep.h" |
2f2f4251 | 37 | |
c6e4c666 TI |
38 | enum { |
39 | STAC_VREF_EVENT = 1, | |
40 | STAC_INSERT_EVENT, | |
41 | STAC_PWR_EVENT, | |
42 | STAC_HP_EVENT, | |
43 | }; | |
4e55096e | 44 | |
f5fcc13c TI |
45 | enum { |
46 | STAC_REF, | |
bf277785 | 47 | STAC_9200_OQO, |
dfe495d0 TI |
48 | STAC_9200_DELL_D21, |
49 | STAC_9200_DELL_D22, | |
50 | STAC_9200_DELL_D23, | |
51 | STAC_9200_DELL_M21, | |
52 | STAC_9200_DELL_M22, | |
53 | STAC_9200_DELL_M23, | |
54 | STAC_9200_DELL_M24, | |
55 | STAC_9200_DELL_M25, | |
56 | STAC_9200_DELL_M26, | |
57 | STAC_9200_DELL_M27, | |
58eec423 MCC |
58 | STAC_9200_M4, |
59 | STAC_9200_M4_2, | |
117f257d | 60 | STAC_9200_PANASONIC, |
f5fcc13c TI |
61 | STAC_9200_MODELS |
62 | }; | |
63 | ||
64 | enum { | |
65 | STAC_9205_REF, | |
dfe495d0 | 66 | STAC_9205_DELL_M42, |
ae0a8ed8 TD |
67 | STAC_9205_DELL_M43, |
68 | STAC_9205_DELL_M44, | |
d9a4268e | 69 | STAC_9205_EAPD, |
f5fcc13c TI |
70 | STAC_9205_MODELS |
71 | }; | |
72 | ||
e1f0d669 | 73 | enum { |
9e43f0de | 74 | STAC_92HD73XX_NO_JD, /* no jack-detection */ |
e1f0d669 | 75 | STAC_92HD73XX_REF, |
661cd8fb TI |
76 | STAC_DELL_M6_AMIC, |
77 | STAC_DELL_M6_DMIC, | |
78 | STAC_DELL_M6_BOTH, | |
6b3ab21e | 79 | STAC_DELL_EQ, |
e1f0d669 MR |
80 | STAC_92HD73XX_MODELS |
81 | }; | |
82 | ||
d0513fc6 MR |
83 | enum { |
84 | STAC_92HD83XXX_REF, | |
32ed3f46 | 85 | STAC_92HD83XXX_PWR_REF, |
d0513fc6 MR |
86 | STAC_92HD83XXX_MODELS |
87 | }; | |
88 | ||
e035b841 MR |
89 | enum { |
90 | STAC_92HD71BXX_REF, | |
a7662640 MR |
91 | STAC_DELL_M4_1, |
92 | STAC_DELL_M4_2, | |
3a7abfd2 | 93 | STAC_DELL_M4_3, |
6a14f585 | 94 | STAC_HP_M4, |
1b0652eb | 95 | STAC_HP_DV5, |
e035b841 MR |
96 | STAC_92HD71BXX_MODELS |
97 | }; | |
98 | ||
8e21c34c TD |
99 | enum { |
100 | STAC_925x_REF, | |
9cb36c2a MCC |
101 | STAC_M1, |
102 | STAC_M1_2, | |
103 | STAC_M2, | |
8e21c34c | 104 | STAC_M2_2, |
9cb36c2a MCC |
105 | STAC_M3, |
106 | STAC_M5, | |
107 | STAC_M6, | |
8e21c34c TD |
108 | STAC_925x_MODELS |
109 | }; | |
110 | ||
f5fcc13c TI |
111 | enum { |
112 | STAC_D945_REF, | |
113 | STAC_D945GTP3, | |
114 | STAC_D945GTP5, | |
5d5d3bc3 IZ |
115 | STAC_INTEL_MAC_V1, |
116 | STAC_INTEL_MAC_V2, | |
117 | STAC_INTEL_MAC_V3, | |
118 | STAC_INTEL_MAC_V4, | |
119 | STAC_INTEL_MAC_V5, | |
536319af NB |
120 | STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter |
121 | * is given, one of the above models will be | |
122 | * chosen according to the subsystem id. */ | |
dfe495d0 | 123 | /* for backward compatibility */ |
f5fcc13c | 124 | STAC_MACMINI, |
3fc24d85 | 125 | STAC_MACBOOK, |
6f0778d8 NB |
126 | STAC_MACBOOK_PRO_V1, |
127 | STAC_MACBOOK_PRO_V2, | |
f16928fb | 128 | STAC_IMAC_INTEL, |
0dae0f83 | 129 | STAC_IMAC_INTEL_20, |
8c650087 | 130 | STAC_ECS_202, |
dfe495d0 TI |
131 | STAC_922X_DELL_D81, |
132 | STAC_922X_DELL_D82, | |
133 | STAC_922X_DELL_M81, | |
134 | STAC_922X_DELL_M82, | |
f5fcc13c TI |
135 | STAC_922X_MODELS |
136 | }; | |
137 | ||
138 | enum { | |
e28d8322 | 139 | STAC_D965_REF_NO_JD, /* no jack-detection */ |
f5fcc13c TI |
140 | STAC_D965_REF, |
141 | STAC_D965_3ST, | |
142 | STAC_D965_5ST, | |
4ff076e5 | 143 | STAC_DELL_3ST, |
8e9068b1 | 144 | STAC_DELL_BIOS, |
f5fcc13c TI |
145 | STAC_927X_MODELS |
146 | }; | |
403d1944 | 147 | |
74aeaabc MR |
148 | struct sigmatel_event { |
149 | hda_nid_t nid; | |
c6e4c666 TI |
150 | unsigned char type; |
151 | unsigned char tag; | |
74aeaabc MR |
152 | int data; |
153 | }; | |
154 | ||
155 | struct sigmatel_jack { | |
156 | hda_nid_t nid; | |
157 | int type; | |
158 | struct snd_jack *jack; | |
159 | }; | |
160 | ||
2f2f4251 | 161 | struct sigmatel_spec { |
c8b6bf9b | 162 | struct snd_kcontrol_new *mixers[4]; |
c7d4b2fa M |
163 | unsigned int num_mixers; |
164 | ||
403d1944 | 165 | int board_config; |
c0cea0d0 | 166 | unsigned int eapd_switch: 1; |
c7d4b2fa | 167 | unsigned int surr_switch: 1; |
3cc08dc6 | 168 | unsigned int alt_switch: 1; |
82bc955f | 169 | unsigned int hp_detect: 1; |
00ef50c2 | 170 | unsigned int spdif_mute: 1; |
7c7767eb | 171 | unsigned int check_volume_offset:1; |
c7d4b2fa | 172 | |
4fe5195c | 173 | /* gpio lines */ |
0fc9dec4 | 174 | unsigned int eapd_mask; |
4fe5195c MR |
175 | unsigned int gpio_mask; |
176 | unsigned int gpio_dir; | |
177 | unsigned int gpio_data; | |
178 | unsigned int gpio_mute; | |
179 | ||
8daaaa97 MR |
180 | /* stream */ |
181 | unsigned int stream_delay; | |
182 | ||
4fe5195c | 183 | /* analog loopback */ |
e1f0d669 MR |
184 | unsigned char aloopback_mask; |
185 | unsigned char aloopback_shift; | |
8259980e | 186 | |
a64135a2 MR |
187 | /* power management */ |
188 | unsigned int num_pwrs; | |
d0513fc6 | 189 | unsigned int *pwr_mapping; |
a64135a2 | 190 | hda_nid_t *pwr_nids; |
b76c850f | 191 | hda_nid_t *dac_list; |
a64135a2 | 192 | |
74aeaabc MR |
193 | /* jack detection */ |
194 | struct snd_array jacks; | |
195 | ||
196 | /* events */ | |
197 | struct snd_array events; | |
198 | ||
2f2f4251 | 199 | /* playback */ |
b22b4821 | 200 | struct hda_input_mux *mono_mux; |
89385035 | 201 | struct hda_input_mux *amp_mux; |
b22b4821 | 202 | unsigned int cur_mmux; |
2f2f4251 | 203 | struct hda_multi_out multiout; |
3cc08dc6 | 204 | hda_nid_t dac_nids[5]; |
c21ca4a8 TI |
205 | hda_nid_t hp_dacs[5]; |
206 | hda_nid_t speaker_dacs[5]; | |
2f2f4251 | 207 | |
7c7767eb TI |
208 | int volume_offset; |
209 | ||
2f2f4251 M |
210 | /* capture */ |
211 | hda_nid_t *adc_nids; | |
2f2f4251 | 212 | unsigned int num_adcs; |
dabbed6f M |
213 | hda_nid_t *mux_nids; |
214 | unsigned int num_muxes; | |
8b65727b MP |
215 | hda_nid_t *dmic_nids; |
216 | unsigned int num_dmics; | |
e1f0d669 | 217 | hda_nid_t *dmux_nids; |
1697055e | 218 | unsigned int num_dmuxes; |
d9737751 MR |
219 | hda_nid_t *smux_nids; |
220 | unsigned int num_smuxes; | |
65973632 | 221 | const char **spdif_labels; |
d9737751 | 222 | |
dabbed6f | 223 | hda_nid_t dig_in_nid; |
b22b4821 | 224 | hda_nid_t mono_nid; |
1cd2224c MR |
225 | hda_nid_t anabeep_nid; |
226 | hda_nid_t digbeep_nid; | |
2f2f4251 | 227 | |
2f2f4251 M |
228 | /* pin widgets */ |
229 | hda_nid_t *pin_nids; | |
230 | unsigned int num_pins; | |
2f2f4251 | 231 | unsigned int *pin_configs; |
2f2f4251 M |
232 | |
233 | /* codec specific stuff */ | |
234 | struct hda_verb *init; | |
c8b6bf9b | 235 | struct snd_kcontrol_new *mixer; |
2f2f4251 M |
236 | |
237 | /* capture source */ | |
8b65727b | 238 | struct hda_input_mux *dinput_mux; |
e1f0d669 | 239 | unsigned int cur_dmux[2]; |
c7d4b2fa | 240 | struct hda_input_mux *input_mux; |
3cc08dc6 | 241 | unsigned int cur_mux[3]; |
d9737751 MR |
242 | struct hda_input_mux *sinput_mux; |
243 | unsigned int cur_smux[2]; | |
2a9c7816 MR |
244 | unsigned int cur_amux; |
245 | hda_nid_t *amp_nids; | |
246 | unsigned int num_amps; | |
8daaaa97 | 247 | unsigned int powerdown_adcs; |
2f2f4251 | 248 | |
403d1944 MP |
249 | /* i/o switches */ |
250 | unsigned int io_switch[2]; | |
0fb87bb4 | 251 | unsigned int clfe_swap; |
c21ca4a8 TI |
252 | hda_nid_t line_switch; /* shared line-in for input and output */ |
253 | hda_nid_t mic_switch; /* shared mic-in for input and output */ | |
254 | hda_nid_t hp_switch; /* NID of HP as line-out */ | |
5f10c4a9 | 255 | unsigned int aloopback; |
2f2f4251 | 256 | |
c7d4b2fa M |
257 | struct hda_pcm pcm_rec[2]; /* PCM information */ |
258 | ||
259 | /* dynamic controls and input_mux */ | |
260 | struct auto_pin_cfg autocfg; | |
603c4019 | 261 | struct snd_array kctls; |
8b65727b | 262 | struct hda_input_mux private_dimux; |
c7d4b2fa | 263 | struct hda_input_mux private_imux; |
d9737751 | 264 | struct hda_input_mux private_smux; |
89385035 | 265 | struct hda_input_mux private_amp_mux; |
b22b4821 | 266 | struct hda_input_mux private_mono_mux; |
2f2f4251 M |
267 | }; |
268 | ||
269 | static hda_nid_t stac9200_adc_nids[1] = { | |
270 | 0x03, | |
271 | }; | |
272 | ||
273 | static hda_nid_t stac9200_mux_nids[1] = { | |
274 | 0x0c, | |
275 | }; | |
276 | ||
277 | static hda_nid_t stac9200_dac_nids[1] = { | |
278 | 0x02, | |
279 | }; | |
280 | ||
a64135a2 MR |
281 | static hda_nid_t stac92hd73xx_pwr_nids[8] = { |
282 | 0x0a, 0x0b, 0x0c, 0xd, 0x0e, | |
283 | 0x0f, 0x10, 0x11 | |
284 | }; | |
285 | ||
0ffa9807 MR |
286 | static hda_nid_t stac92hd73xx_slave_dig_outs[2] = { |
287 | 0x26, 0, | |
288 | }; | |
289 | ||
e1f0d669 MR |
290 | static hda_nid_t stac92hd73xx_adc_nids[2] = { |
291 | 0x1a, 0x1b | |
292 | }; | |
293 | ||
2a9c7816 MR |
294 | #define DELL_M6_AMP 2 |
295 | static hda_nid_t stac92hd73xx_amp_nids[3] = { | |
296 | 0x0b, 0x0c, 0x0e | |
89385035 MR |
297 | }; |
298 | ||
e1f0d669 MR |
299 | #define STAC92HD73XX_NUM_DMICS 2 |
300 | static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = { | |
301 | 0x13, 0x14, 0 | |
302 | }; | |
303 | ||
304 | #define STAC92HD73_DAC_COUNT 5 | |
e1f0d669 MR |
305 | |
306 | static hda_nid_t stac92hd73xx_mux_nids[4] = { | |
307 | 0x28, 0x29, 0x2a, 0x2b, | |
308 | }; | |
309 | ||
310 | static hda_nid_t stac92hd73xx_dmux_nids[2] = { | |
311 | 0x20, 0x21, | |
312 | }; | |
313 | ||
d9737751 MR |
314 | static hda_nid_t stac92hd73xx_smux_nids[2] = { |
315 | 0x22, 0x23, | |
316 | }; | |
317 | ||
d0513fc6 MR |
318 | #define STAC92HD83XXX_NUM_DMICS 2 |
319 | static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = { | |
320 | 0x11, 0x12, 0 | |
321 | }; | |
322 | ||
d0513fc6 | 323 | #define STAC92HD83_DAC_COUNT 3 |
d0513fc6 MR |
324 | |
325 | static hda_nid_t stac92hd83xxx_dmux_nids[2] = { | |
326 | 0x17, 0x18, | |
327 | }; | |
328 | ||
329 | static hda_nid_t stac92hd83xxx_adc_nids[2] = { | |
330 | 0x15, 0x16, | |
331 | }; | |
332 | ||
333 | static hda_nid_t stac92hd83xxx_pwr_nids[4] = { | |
334 | 0xa, 0xb, 0xd, 0xe, | |
335 | }; | |
336 | ||
0ffa9807 MR |
337 | static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = { |
338 | 0x1e, 0, | |
339 | }; | |
340 | ||
d0513fc6 | 341 | static unsigned int stac92hd83xxx_pwr_mapping[4] = { |
87e88a74 | 342 | 0x03, 0x0c, 0x20, 0x40, |
d0513fc6 MR |
343 | }; |
344 | ||
9248f269 | 345 | static hda_nid_t stac92hd83xxx_amp_nids[1] = { |
c15c5060 MR |
346 | 0xc, |
347 | }; | |
348 | ||
a64135a2 MR |
349 | static hda_nid_t stac92hd71bxx_pwr_nids[3] = { |
350 | 0x0a, 0x0d, 0x0f | |
351 | }; | |
352 | ||
e035b841 MR |
353 | static hda_nid_t stac92hd71bxx_adc_nids[2] = { |
354 | 0x12, 0x13, | |
355 | }; | |
356 | ||
357 | static hda_nid_t stac92hd71bxx_mux_nids[2] = { | |
358 | 0x1a, 0x1b | |
359 | }; | |
360 | ||
4b33c767 MR |
361 | static hda_nid_t stac92hd71bxx_dmux_nids[2] = { |
362 | 0x1c, 0x1d, | |
e1f0d669 MR |
363 | }; |
364 | ||
d9737751 MR |
365 | static hda_nid_t stac92hd71bxx_smux_nids[2] = { |
366 | 0x24, 0x25, | |
367 | }; | |
368 | ||
e035b841 MR |
369 | #define STAC92HD71BXX_NUM_DMICS 2 |
370 | static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = { | |
371 | 0x18, 0x19, 0 | |
372 | }; | |
373 | ||
0ffa9807 MR |
374 | static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = { |
375 | 0x22, 0 | |
376 | }; | |
377 | ||
8e21c34c TD |
378 | static hda_nid_t stac925x_adc_nids[1] = { |
379 | 0x03, | |
380 | }; | |
381 | ||
382 | static hda_nid_t stac925x_mux_nids[1] = { | |
383 | 0x0f, | |
384 | }; | |
385 | ||
386 | static hda_nid_t stac925x_dac_nids[1] = { | |
387 | 0x02, | |
388 | }; | |
389 | ||
f6e9852a TI |
390 | #define STAC925X_NUM_DMICS 1 |
391 | static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = { | |
392 | 0x15, 0 | |
2c11f955 TD |
393 | }; |
394 | ||
1697055e TI |
395 | static hda_nid_t stac925x_dmux_nids[1] = { |
396 | 0x14, | |
397 | }; | |
398 | ||
2f2f4251 M |
399 | static hda_nid_t stac922x_adc_nids[2] = { |
400 | 0x06, 0x07, | |
401 | }; | |
402 | ||
403 | static hda_nid_t stac922x_mux_nids[2] = { | |
404 | 0x12, 0x13, | |
405 | }; | |
406 | ||
3cc08dc6 MP |
407 | static hda_nid_t stac927x_adc_nids[3] = { |
408 | 0x07, 0x08, 0x09 | |
409 | }; | |
410 | ||
411 | static hda_nid_t stac927x_mux_nids[3] = { | |
412 | 0x15, 0x16, 0x17 | |
413 | }; | |
414 | ||
d9737751 MR |
415 | static hda_nid_t stac927x_smux_nids[1] = { |
416 | 0x21, | |
417 | }; | |
418 | ||
b76c850f MR |
419 | static hda_nid_t stac927x_dac_nids[6] = { |
420 | 0x02, 0x03, 0x04, 0x05, 0x06, 0 | |
421 | }; | |
422 | ||
e1f0d669 MR |
423 | static hda_nid_t stac927x_dmux_nids[1] = { |
424 | 0x1b, | |
425 | }; | |
426 | ||
7f16859a MR |
427 | #define STAC927X_NUM_DMICS 2 |
428 | static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = { | |
429 | 0x13, 0x14, 0 | |
430 | }; | |
431 | ||
65973632 MR |
432 | static const char *stac927x_spdif_labels[5] = { |
433 | "Digital Playback", "ADAT", "Analog Mux 1", | |
434 | "Analog Mux 2", "Analog Mux 3" | |
435 | }; | |
436 | ||
f3302a59 MP |
437 | static hda_nid_t stac9205_adc_nids[2] = { |
438 | 0x12, 0x13 | |
439 | }; | |
440 | ||
441 | static hda_nid_t stac9205_mux_nids[2] = { | |
442 | 0x19, 0x1a | |
443 | }; | |
444 | ||
e1f0d669 | 445 | static hda_nid_t stac9205_dmux_nids[1] = { |
1697055e | 446 | 0x1d, |
e1f0d669 MR |
447 | }; |
448 | ||
d9737751 MR |
449 | static hda_nid_t stac9205_smux_nids[1] = { |
450 | 0x21, | |
451 | }; | |
452 | ||
f6e9852a TI |
453 | #define STAC9205_NUM_DMICS 2 |
454 | static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = { | |
455 | 0x17, 0x18, 0 | |
8b65727b MP |
456 | }; |
457 | ||
c7d4b2fa | 458 | static hda_nid_t stac9200_pin_nids[8] = { |
93ed1503 TD |
459 | 0x08, 0x09, 0x0d, 0x0e, |
460 | 0x0f, 0x10, 0x11, 0x12, | |
2f2f4251 M |
461 | }; |
462 | ||
8e21c34c TD |
463 | static hda_nid_t stac925x_pin_nids[8] = { |
464 | 0x07, 0x08, 0x0a, 0x0b, | |
465 | 0x0c, 0x0d, 0x10, 0x11, | |
466 | }; | |
467 | ||
2f2f4251 M |
468 | static hda_nid_t stac922x_pin_nids[10] = { |
469 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
470 | 0x0f, 0x10, 0x11, 0x15, 0x1b, | |
471 | }; | |
472 | ||
a7662640 | 473 | static hda_nid_t stac92hd73xx_pin_nids[13] = { |
e1f0d669 MR |
474 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
475 | 0x0f, 0x10, 0x11, 0x12, 0x13, | |
d9737751 | 476 | 0x14, 0x22, 0x23 |
e1f0d669 MR |
477 | }; |
478 | ||
d0513fc6 MR |
479 | static hda_nid_t stac92hd83xxx_pin_nids[14] = { |
480 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
481 | 0x0f, 0x10, 0x11, 0x12, 0x13, | |
482 | 0x1d, 0x1e, 0x1f, 0x20 | |
483 | }; | |
616f89e7 HRK |
484 | |
485 | #define STAC92HD71BXX_NUM_PINS 13 | |
486 | static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = { | |
487 | 0x0a, 0x0b, 0x0c, 0x0d, 0x00, | |
488 | 0x00, 0x14, 0x18, 0x19, 0x1e, | |
489 | 0x1f, 0x20, 0x27 | |
490 | }; | |
491 | static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = { | |
e035b841 MR |
492 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
493 | 0x0f, 0x14, 0x18, 0x19, 0x1e, | |
616f89e7 | 494 | 0x1f, 0x20, 0x27 |
e035b841 MR |
495 | }; |
496 | ||
3cc08dc6 MP |
497 | static hda_nid_t stac927x_pin_nids[14] = { |
498 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
499 | 0x0f, 0x10, 0x11, 0x12, 0x13, | |
500 | 0x14, 0x21, 0x22, 0x23, | |
501 | }; | |
502 | ||
f3302a59 MP |
503 | static hda_nid_t stac9205_pin_nids[12] = { |
504 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
505 | 0x0f, 0x14, 0x16, 0x17, 0x18, | |
506 | 0x21, 0x22, | |
f3302a59 MP |
507 | }; |
508 | ||
89385035 MR |
509 | #define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info |
510 | ||
511 | static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol, | |
512 | struct snd_ctl_elem_value *ucontrol) | |
513 | { | |
514 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
515 | struct sigmatel_spec *spec = codec->spec; | |
516 | hda_nid_t nid = spec->amp_nids[spec->cur_amux]; | |
517 | ||
518 | kcontrol->private_value ^= get_amp_nid(kcontrol); | |
519 | kcontrol->private_value |= nid; | |
520 | ||
521 | return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol); | |
522 | } | |
523 | ||
524 | static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol, | |
525 | struct snd_ctl_elem_value *ucontrol) | |
526 | { | |
527 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
528 | struct sigmatel_spec *spec = codec->spec; | |
529 | hda_nid_t nid = spec->amp_nids[spec->cur_amux]; | |
530 | ||
531 | kcontrol->private_value ^= get_amp_nid(kcontrol); | |
532 | kcontrol->private_value |= nid; | |
533 | ||
534 | return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol); | |
535 | } | |
536 | ||
8b65727b MP |
537 | static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol, |
538 | struct snd_ctl_elem_info *uinfo) | |
539 | { | |
540 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
541 | struct sigmatel_spec *spec = codec->spec; | |
542 | return snd_hda_input_mux_info(spec->dinput_mux, uinfo); | |
543 | } | |
544 | ||
545 | static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol, | |
546 | struct snd_ctl_elem_value *ucontrol) | |
547 | { | |
548 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
549 | struct sigmatel_spec *spec = codec->spec; | |
e1f0d669 | 550 | unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
8b65727b | 551 | |
e1f0d669 | 552 | ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx]; |
8b65727b MP |
553 | return 0; |
554 | } | |
555 | ||
556 | static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol, | |
557 | struct snd_ctl_elem_value *ucontrol) | |
558 | { | |
559 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
560 | struct sigmatel_spec *spec = codec->spec; | |
e1f0d669 | 561 | unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
8b65727b MP |
562 | |
563 | return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol, | |
e1f0d669 | 564 | spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]); |
8b65727b MP |
565 | } |
566 | ||
d9737751 MR |
567 | static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol, |
568 | struct snd_ctl_elem_info *uinfo) | |
569 | { | |
570 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
571 | struct sigmatel_spec *spec = codec->spec; | |
572 | return snd_hda_input_mux_info(spec->sinput_mux, uinfo); | |
573 | } | |
574 | ||
575 | static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol, | |
576 | struct snd_ctl_elem_value *ucontrol) | |
577 | { | |
578 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
579 | struct sigmatel_spec *spec = codec->spec; | |
580 | unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
581 | ||
582 | ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; | |
583 | return 0; | |
584 | } | |
585 | ||
586 | static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol, | |
587 | struct snd_ctl_elem_value *ucontrol) | |
588 | { | |
589 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
590 | struct sigmatel_spec *spec = codec->spec; | |
00ef50c2 | 591 | struct hda_input_mux *smux = &spec->private_smux; |
d9737751 | 592 | unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
00ef50c2 MR |
593 | int err, val; |
594 | hda_nid_t nid; | |
d9737751 | 595 | |
00ef50c2 | 596 | err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol, |
d9737751 | 597 | spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]); |
00ef50c2 MR |
598 | if (err < 0) |
599 | return err; | |
600 | ||
601 | if (spec->spdif_mute) { | |
602 | if (smux_idx == 0) | |
603 | nid = spec->multiout.dig_out_nid; | |
604 | else | |
605 | nid = codec->slave_dig_outs[smux_idx - 1]; | |
606 | if (spec->cur_smux[smux_idx] == smux->num_items - 1) | |
c9b46f91 | 607 | val = HDA_AMP_MUTE; |
00ef50c2 | 608 | else |
c9b46f91 | 609 | val = 0; |
00ef50c2 | 610 | /* un/mute SPDIF out */ |
c9b46f91 TI |
611 | snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0, |
612 | HDA_AMP_MUTE, val); | |
00ef50c2 MR |
613 | } |
614 | return 0; | |
d9737751 MR |
615 | } |
616 | ||
c8b6bf9b | 617 | static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
2f2f4251 M |
618 | { |
619 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
620 | struct sigmatel_spec *spec = codec->spec; | |
c7d4b2fa | 621 | return snd_hda_input_mux_info(spec->input_mux, uinfo); |
2f2f4251 M |
622 | } |
623 | ||
c8b6bf9b | 624 | static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
2f2f4251 M |
625 | { |
626 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
627 | struct sigmatel_spec *spec = codec->spec; | |
628 | unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
629 | ||
630 | ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx]; | |
631 | return 0; | |
632 | } | |
633 | ||
c8b6bf9b | 634 | static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
2f2f4251 M |
635 | { |
636 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
637 | struct sigmatel_spec *spec = codec->spec; | |
638 | unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
639 | ||
c7d4b2fa | 640 | return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, |
2f2f4251 M |
641 | spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]); |
642 | } | |
643 | ||
b22b4821 MR |
644 | static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol, |
645 | struct snd_ctl_elem_info *uinfo) | |
646 | { | |
647 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
648 | struct sigmatel_spec *spec = codec->spec; | |
649 | return snd_hda_input_mux_info(spec->mono_mux, uinfo); | |
650 | } | |
651 | ||
652 | static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol, | |
653 | struct snd_ctl_elem_value *ucontrol) | |
654 | { | |
655 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
656 | struct sigmatel_spec *spec = codec->spec; | |
657 | ||
658 | ucontrol->value.enumerated.item[0] = spec->cur_mmux; | |
659 | return 0; | |
660 | } | |
661 | ||
662 | static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol, | |
663 | struct snd_ctl_elem_value *ucontrol) | |
664 | { | |
665 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
666 | struct sigmatel_spec *spec = codec->spec; | |
667 | ||
668 | return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol, | |
669 | spec->mono_nid, &spec->cur_mmux); | |
670 | } | |
671 | ||
89385035 MR |
672 | static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol, |
673 | struct snd_ctl_elem_info *uinfo) | |
674 | { | |
675 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
676 | struct sigmatel_spec *spec = codec->spec; | |
677 | return snd_hda_input_mux_info(spec->amp_mux, uinfo); | |
678 | } | |
679 | ||
680 | static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol, | |
681 | struct snd_ctl_elem_value *ucontrol) | |
682 | { | |
683 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
684 | struct sigmatel_spec *spec = codec->spec; | |
685 | ||
686 | ucontrol->value.enumerated.item[0] = spec->cur_amux; | |
687 | return 0; | |
688 | } | |
689 | ||
690 | static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol, | |
691 | struct snd_ctl_elem_value *ucontrol) | |
692 | { | |
693 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
694 | struct sigmatel_spec *spec = codec->spec; | |
695 | struct snd_kcontrol *ctl = | |
696 | snd_hda_find_mixer_ctl(codec, "Amp Capture Volume"); | |
697 | if (!ctl) | |
698 | return -EINVAL; | |
699 | ||
700 | snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE | | |
701 | SNDRV_CTL_EVENT_MASK_INFO, &ctl->id); | |
702 | ||
703 | return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol, | |
704 | 0, &spec->cur_amux); | |
705 | } | |
706 | ||
5f10c4a9 ML |
707 | #define stac92xx_aloopback_info snd_ctl_boolean_mono_info |
708 | ||
709 | static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol, | |
710 | struct snd_ctl_elem_value *ucontrol) | |
711 | { | |
712 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
e1f0d669 | 713 | unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
5f10c4a9 ML |
714 | struct sigmatel_spec *spec = codec->spec; |
715 | ||
e1f0d669 MR |
716 | ucontrol->value.integer.value[0] = !!(spec->aloopback & |
717 | (spec->aloopback_mask << idx)); | |
5f10c4a9 ML |
718 | return 0; |
719 | } | |
720 | ||
721 | static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol, | |
722 | struct snd_ctl_elem_value *ucontrol) | |
723 | { | |
724 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
725 | struct sigmatel_spec *spec = codec->spec; | |
e1f0d669 | 726 | unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
5f10c4a9 | 727 | unsigned int dac_mode; |
e1f0d669 | 728 | unsigned int val, idx_val; |
5f10c4a9 | 729 | |
e1f0d669 MR |
730 | idx_val = spec->aloopback_mask << idx; |
731 | if (ucontrol->value.integer.value[0]) | |
732 | val = spec->aloopback | idx_val; | |
733 | else | |
734 | val = spec->aloopback & ~idx_val; | |
68ea7b2f | 735 | if (spec->aloopback == val) |
5f10c4a9 ML |
736 | return 0; |
737 | ||
68ea7b2f | 738 | spec->aloopback = val; |
5f10c4a9 | 739 | |
e1f0d669 MR |
740 | /* Only return the bits defined by the shift value of the |
741 | * first two bytes of the mask | |
742 | */ | |
5f10c4a9 | 743 | dac_mode = snd_hda_codec_read(codec, codec->afg, 0, |
e1f0d669 MR |
744 | kcontrol->private_value & 0xFFFF, 0x0); |
745 | dac_mode >>= spec->aloopback_shift; | |
5f10c4a9 | 746 | |
e1f0d669 | 747 | if (spec->aloopback & idx_val) { |
5f10c4a9 | 748 | snd_hda_power_up(codec); |
e1f0d669 | 749 | dac_mode |= idx_val; |
5f10c4a9 ML |
750 | } else { |
751 | snd_hda_power_down(codec); | |
e1f0d669 | 752 | dac_mode &= ~idx_val; |
5f10c4a9 ML |
753 | } |
754 | ||
755 | snd_hda_codec_write_cache(codec, codec->afg, 0, | |
756 | kcontrol->private_value >> 16, dac_mode); | |
757 | ||
758 | return 1; | |
759 | } | |
760 | ||
c7d4b2fa | 761 | static struct hda_verb stac9200_core_init[] = { |
2f2f4251 | 762 | /* set dac0mux for dac converter */ |
c7d4b2fa | 763 | { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, |
2f2f4251 M |
764 | {} |
765 | }; | |
766 | ||
1194b5b7 TI |
767 | static struct hda_verb stac9200_eapd_init[] = { |
768 | /* set dac0mux for dac converter */ | |
769 | {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
770 | {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, | |
771 | {} | |
772 | }; | |
773 | ||
e1f0d669 MR |
774 | static struct hda_verb stac92hd73xx_6ch_core_init[] = { |
775 | /* set master volume and direct control */ | |
776 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
e1f0d669 MR |
777 | /* setup adcs to point to mixer */ |
778 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
779 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
e1f0d669 MR |
780 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
781 | { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
782 | { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
783 | /* setup import muxs */ | |
784 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
785 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
786 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
787 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
788 | {} | |
789 | }; | |
790 | ||
d654a660 MR |
791 | static struct hda_verb dell_eq_core_init[] = { |
792 | /* set master volume to max value without distortion | |
793 | * and direct control */ | |
794 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, | |
d654a660 MR |
795 | /* setup adcs to point to mixer */ |
796 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
797 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
798 | /* setup import muxs */ | |
799 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
800 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
801 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
802 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
803 | {} | |
804 | }; | |
805 | ||
52fe0f9d | 806 | static struct hda_verb dell_m6_core_init[] = { |
6b3ab21e | 807 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
52fe0f9d MR |
808 | /* setup adcs to point to mixer */ |
809 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
810 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
811 | /* setup import muxs */ | |
812 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
813 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
814 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
815 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
816 | {} | |
817 | }; | |
818 | ||
e1f0d669 MR |
819 | static struct hda_verb stac92hd73xx_8ch_core_init[] = { |
820 | /* set master volume and direct control */ | |
821 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
e1f0d669 MR |
822 | /* setup adcs to point to mixer */ |
823 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
824 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
e1f0d669 MR |
825 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
826 | { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
827 | { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
828 | /* setup import muxs */ | |
829 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
830 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
831 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
832 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03}, | |
833 | {} | |
834 | }; | |
835 | ||
836 | static struct hda_verb stac92hd73xx_10ch_core_init[] = { | |
837 | /* set master volume and direct control */ | |
838 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
e1f0d669 MR |
839 | /* dac3 is connected to import3 mux */ |
840 | { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f}, | |
e1f0d669 MR |
841 | /* setup adcs to point to mixer */ |
842 | { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
843 | { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b}, | |
e1f0d669 MR |
844 | { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
845 | { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
846 | { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, | |
847 | /* setup import muxs */ | |
848 | { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
849 | { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
850 | { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
851 | { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03}, | |
852 | {} | |
853 | }; | |
854 | ||
d0513fc6 | 855 | static struct hda_verb stac92hd83xxx_core_init[] = { |
d0513fc6 MR |
856 | { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0}, |
857 | { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0}, | |
858 | { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1}, | |
859 | ||
860 | /* power state controls amps */ | |
861 | { 0x01, AC_VERB_SET_EAPD, 1 << 2}, | |
574f3c4f | 862 | {} |
d0513fc6 MR |
863 | }; |
864 | ||
e035b841 | 865 | static struct hda_verb stac92hd71bxx_core_init[] = { |
541eee87 MR |
866 | /* set master volume and direct control */ |
867 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
574f3c4f | 868 | {} |
541eee87 MR |
869 | }; |
870 | ||
ca8d33fc | 871 | #define HD_DISABLE_PORTF 1 |
541eee87 | 872 | static struct hda_verb stac92hd71bxx_analog_core_init[] = { |
aafc4412 MR |
873 | /* start of config #1 */ |
874 | ||
875 | /* connect port 0f to audio mixer */ | |
876 | { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2}, | |
aafc4412 MR |
877 | /* start of config #2 */ |
878 | ||
e035b841 MR |
879 | /* set master volume and direct control */ |
880 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
ca8d33fc MR |
881 | {} |
882 | }; | |
883 | ||
884 | static struct hda_verb stac92hd71bxx_unmute_core_init[] = { | |
885 | /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ | |
886 | { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
e035b841 MR |
887 | { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, |
888 | { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
e035b841 MR |
889 | {} |
890 | }; | |
891 | ||
8e21c34c TD |
892 | static struct hda_verb stac925x_core_init[] = { |
893 | /* set dac0mux for dac converter */ | |
894 | { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
c9280d68 TI |
895 | /* mute the master volume */ |
896 | { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, | |
8e21c34c TD |
897 | {} |
898 | }; | |
899 | ||
c7d4b2fa | 900 | static struct hda_verb stac922x_core_init[] = { |
2f2f4251 | 901 | /* set master volume and direct control */ |
c7d4b2fa | 902 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
2f2f4251 M |
903 | {} |
904 | }; | |
905 | ||
93ed1503 | 906 | static struct hda_verb d965_core_init[] = { |
19039bd0 | 907 | /* set master volume and direct control */ |
93ed1503 | 908 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
19039bd0 TI |
909 | /* unmute node 0x1b */ |
910 | { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, | |
911 | /* select node 0x03 as DAC */ | |
912 | { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
913 | {} | |
914 | }; | |
915 | ||
3cc08dc6 MP |
916 | static struct hda_verb stac927x_core_init[] = { |
917 | /* set master volume and direct control */ | |
918 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
1cd2224c MR |
919 | /* enable analog pc beep path */ |
920 | { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, | |
3cc08dc6 MP |
921 | {} |
922 | }; | |
923 | ||
f3302a59 MP |
924 | static struct hda_verb stac9205_core_init[] = { |
925 | /* set master volume and direct control */ | |
926 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
d0513fc6 MR |
927 | /* enable analog pc beep path */ |
928 | { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, | |
f3302a59 MP |
929 | {} |
930 | }; | |
931 | ||
b22b4821 MR |
932 | #define STAC_MONO_MUX \ |
933 | { \ | |
934 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
935 | .name = "Mono Mux", \ | |
936 | .count = 1, \ | |
937 | .info = stac92xx_mono_mux_enum_info, \ | |
938 | .get = stac92xx_mono_mux_enum_get, \ | |
939 | .put = stac92xx_mono_mux_enum_put, \ | |
940 | } | |
941 | ||
89385035 MR |
942 | #define STAC_AMP_MUX \ |
943 | { \ | |
944 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
945 | .name = "Amp Selector Capture Switch", \ | |
946 | .count = 1, \ | |
947 | .info = stac92xx_amp_mux_enum_info, \ | |
948 | .get = stac92xx_amp_mux_enum_get, \ | |
949 | .put = stac92xx_amp_mux_enum_put, \ | |
950 | } | |
951 | ||
952 | #define STAC_AMP_VOL(xname, nid, chs, idx, dir) \ | |
953 | { \ | |
954 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
955 | .name = xname, \ | |
956 | .index = 0, \ | |
957 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ | |
958 | SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
959 | SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \ | |
960 | .info = stac92xx_amp_volume_info, \ | |
961 | .get = stac92xx_amp_volume_get, \ | |
962 | .put = stac92xx_amp_volume_put, \ | |
963 | .tlv = { .c = snd_hda_mixer_amp_tlv }, \ | |
964 | .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \ | |
965 | } | |
966 | ||
e1f0d669 | 967 | #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ |
5f10c4a9 ML |
968 | { \ |
969 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
970 | .name = "Analog Loopback", \ | |
e1f0d669 | 971 | .count = cnt, \ |
5f10c4a9 ML |
972 | .info = stac92xx_aloopback_info, \ |
973 | .get = stac92xx_aloopback_get, \ | |
974 | .put = stac92xx_aloopback_put, \ | |
975 | .private_value = verb_read | (verb_write << 16), \ | |
976 | } | |
977 | ||
c8b6bf9b | 978 | static struct snd_kcontrol_new stac9200_mixer[] = { |
2f2f4251 M |
979 | HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT), |
980 | HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT), | |
2f2f4251 M |
981 | HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT), |
982 | HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT), | |
2f2f4251 M |
983 | { } /* end */ |
984 | }; | |
985 | ||
2a9c7816 | 986 | #define DELL_M6_MIXER 6 |
e1f0d669 | 987 | static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = { |
2a9c7816 | 988 | /* start of config #1 */ |
e1f0d669 MR |
989 | HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT), |
990 | HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT), | |
991 | ||
e1f0d669 MR |
992 | HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT), |
993 | HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT), | |
994 | ||
2a9c7816 MR |
995 | HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT), |
996 | HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT), | |
997 | ||
998 | /* start of config #2 */ | |
999 | HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT), | |
1000 | HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT), | |
1001 | ||
e1f0d669 MR |
1002 | HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT), |
1003 | HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT), | |
1004 | ||
2a9c7816 MR |
1005 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3), |
1006 | ||
1007 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
1008 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
1009 | ||
1010 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
1011 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
1012 | ||
e1f0d669 MR |
1013 | { } /* end */ |
1014 | }; | |
1015 | ||
1016 | static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = { | |
e1f0d669 MR |
1017 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4), |
1018 | ||
e1f0d669 MR |
1019 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT), |
1020 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
1021 | ||
1022 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
1023 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
1024 | ||
1025 | HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT), | |
1026 | HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT), | |
1027 | ||
1028 | HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT), | |
1029 | HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT), | |
1030 | ||
1031 | HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT), | |
1032 | HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT), | |
1033 | ||
1034 | HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT), | |
1035 | HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT), | |
1036 | ||
1037 | HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT), | |
1038 | HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT), | |
1039 | { } /* end */ | |
1040 | }; | |
1041 | ||
1042 | static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = { | |
e1f0d669 MR |
1043 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5), |
1044 | ||
e1f0d669 MR |
1045 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT), |
1046 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT), | |
1047 | ||
1048 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
1049 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT), | |
1050 | ||
1051 | HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT), | |
1052 | HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT), | |
1053 | ||
1054 | HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT), | |
1055 | HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT), | |
1056 | ||
1057 | HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT), | |
1058 | HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT), | |
1059 | ||
1060 | HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT), | |
1061 | HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT), | |
1062 | ||
1063 | HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT), | |
1064 | HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT), | |
1065 | { } /* end */ | |
1066 | }; | |
1067 | ||
d0513fc6 MR |
1068 | |
1069 | static struct snd_kcontrol_new stac92hd83xxx_mixer[] = { | |
1070 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT), | |
1071 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT), | |
1072 | ||
1073 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT), | |
1074 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT), | |
1075 | ||
74b7ff48 MR |
1076 | HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT), |
1077 | HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT), | |
d0513fc6 | 1078 | |
74b7ff48 MR |
1079 | HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT), |
1080 | HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT), | |
d0513fc6 | 1081 | |
74b7ff48 MR |
1082 | HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT), |
1083 | HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT), | |
d0513fc6 | 1084 | |
74b7ff48 MR |
1085 | HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT), |
1086 | HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT), | |
d0513fc6 MR |
1087 | |
1088 | /* | |
74b7ff48 MR |
1089 | HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT), |
1090 | HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT), | |
d0513fc6 MR |
1091 | */ |
1092 | { } /* end */ | |
1093 | }; | |
1094 | ||
541eee87 | 1095 | static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = { |
4b33c767 | 1096 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2), |
e035b841 | 1097 | |
9b35947f MR |
1098 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT), |
1099 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT), | |
9b35947f MR |
1100 | |
1101 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
1102 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
1cd2224c MR |
1103 | /* analog pc-beep replaced with digital beep support */ |
1104 | /* | |
f7c5dda2 MR |
1105 | HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT), |
1106 | HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT), | |
1cd2224c | 1107 | */ |
f7c5dda2 | 1108 | |
687cb98e MR |
1109 | HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT), |
1110 | HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT), | |
4b33c767 | 1111 | |
687cb98e MR |
1112 | HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT), |
1113 | HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT), | |
4b33c767 MR |
1114 | |
1115 | HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT), | |
1116 | HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT), | |
1117 | ||
1118 | HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT), | |
1119 | HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT), | |
e035b841 MR |
1120 | { } /* end */ |
1121 | }; | |
1122 | ||
541eee87 | 1123 | static struct snd_kcontrol_new stac92hd71bxx_mixer[] = { |
541eee87 MR |
1124 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2), |
1125 | ||
541eee87 MR |
1126 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT), |
1127 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT), | |
541eee87 MR |
1128 | |
1129 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
1130 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
541eee87 MR |
1131 | { } /* end */ |
1132 | }; | |
1133 | ||
8e21c34c | 1134 | static struct snd_kcontrol_new stac925x_mixer[] = { |
c9280d68 TI |
1135 | HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT), |
1136 | HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT), | |
8e21c34c | 1137 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT), |
587755f1 | 1138 | HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT), |
8e21c34c TD |
1139 | { } /* end */ |
1140 | }; | |
1141 | ||
9e05b7a3 | 1142 | static struct snd_kcontrol_new stac9205_mixer[] = { |
e1f0d669 | 1143 | STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1), |
9e05b7a3 ML |
1144 | |
1145 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT), | |
1146 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT), | |
9e05b7a3 ML |
1147 | |
1148 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT), | |
1149 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT), | |
2f2f4251 M |
1150 | { } /* end */ |
1151 | }; | |
1152 | ||
19039bd0 | 1153 | /* This needs to be generated dynamically based on sequence */ |
9e05b7a3 | 1154 | static struct snd_kcontrol_new stac922x_mixer[] = { |
9e05b7a3 ML |
1155 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT), |
1156 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT), | |
9e05b7a3 ML |
1157 | |
1158 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT), | |
1159 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT), | |
19039bd0 TI |
1160 | { } /* end */ |
1161 | }; | |
1162 | ||
9e05b7a3 | 1163 | |
d1d985f0 | 1164 | static struct snd_kcontrol_new stac927x_mixer[] = { |
e1f0d669 | 1165 | STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1), |
3cc08dc6 | 1166 | |
9e05b7a3 ML |
1167 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT), |
1168 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT), | |
9e05b7a3 ML |
1169 | |
1170 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT), | |
1171 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT), | |
9e05b7a3 ML |
1172 | |
1173 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT), | |
1174 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT), | |
f3302a59 MP |
1175 | { } /* end */ |
1176 | }; | |
1177 | ||
1697055e TI |
1178 | static struct snd_kcontrol_new stac_dmux_mixer = { |
1179 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1180 | .name = "Digital Input Source", | |
1181 | /* count set later */ | |
1182 | .info = stac92xx_dmux_enum_info, | |
1183 | .get = stac92xx_dmux_enum_get, | |
1184 | .put = stac92xx_dmux_enum_put, | |
1185 | }; | |
1186 | ||
d9737751 MR |
1187 | static struct snd_kcontrol_new stac_smux_mixer = { |
1188 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
e3487970 | 1189 | .name = "IEC958 Playback Source", |
d9737751 MR |
1190 | /* count set later */ |
1191 | .info = stac92xx_smux_enum_info, | |
1192 | .get = stac92xx_smux_enum_get, | |
1193 | .put = stac92xx_smux_enum_put, | |
1194 | }; | |
1195 | ||
2134ea4f TI |
1196 | static const char *slave_vols[] = { |
1197 | "Front Playback Volume", | |
1198 | "Surround Playback Volume", | |
1199 | "Center Playback Volume", | |
1200 | "LFE Playback Volume", | |
1201 | "Side Playback Volume", | |
1202 | "Headphone Playback Volume", | |
1203 | "Headphone Playback Volume", | |
1204 | "Speaker Playback Volume", | |
1205 | "External Speaker Playback Volume", | |
1206 | "Speaker2 Playback Volume", | |
1207 | NULL | |
1208 | }; | |
1209 | ||
1210 | static const char *slave_sws[] = { | |
1211 | "Front Playback Switch", | |
1212 | "Surround Playback Switch", | |
1213 | "Center Playback Switch", | |
1214 | "LFE Playback Switch", | |
1215 | "Side Playback Switch", | |
1216 | "Headphone Playback Switch", | |
1217 | "Headphone Playback Switch", | |
1218 | "Speaker Playback Switch", | |
1219 | "External Speaker Playback Switch", | |
1220 | "Speaker2 Playback Switch", | |
edb54a55 | 1221 | "IEC958 Playback Switch", |
2134ea4f TI |
1222 | NULL |
1223 | }; | |
1224 | ||
603c4019 | 1225 | static void stac92xx_free_kctls(struct hda_codec *codec); |
e4973e1e | 1226 | static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type); |
603c4019 | 1227 | |
2f2f4251 M |
1228 | static int stac92xx_build_controls(struct hda_codec *codec) |
1229 | { | |
1230 | struct sigmatel_spec *spec = codec->spec; | |
e4973e1e TI |
1231 | struct auto_pin_cfg *cfg = &spec->autocfg; |
1232 | hda_nid_t nid; | |
2f2f4251 | 1233 | int err; |
c7d4b2fa | 1234 | int i; |
2f2f4251 M |
1235 | |
1236 | err = snd_hda_add_new_ctls(codec, spec->mixer); | |
1237 | if (err < 0) | |
1238 | return err; | |
c7d4b2fa M |
1239 | |
1240 | for (i = 0; i < spec->num_mixers; i++) { | |
1241 | err = snd_hda_add_new_ctls(codec, spec->mixers[i]); | |
1242 | if (err < 0) | |
1243 | return err; | |
1244 | } | |
1697055e TI |
1245 | if (spec->num_dmuxes > 0) { |
1246 | stac_dmux_mixer.count = spec->num_dmuxes; | |
d13bd412 | 1247 | err = snd_hda_ctl_add(codec, |
1697055e TI |
1248 | snd_ctl_new1(&stac_dmux_mixer, codec)); |
1249 | if (err < 0) | |
1250 | return err; | |
1251 | } | |
d9737751 | 1252 | if (spec->num_smuxes > 0) { |
00ef50c2 MR |
1253 | int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid); |
1254 | struct hda_input_mux *smux = &spec->private_smux; | |
1255 | /* check for mute support on SPDIF out */ | |
1256 | if (wcaps & AC_WCAP_OUT_AMP) { | |
1257 | smux->items[smux->num_items].label = "Off"; | |
1258 | smux->items[smux->num_items].index = 0; | |
1259 | smux->num_items++; | |
1260 | spec->spdif_mute = 1; | |
1261 | } | |
d9737751 | 1262 | stac_smux_mixer.count = spec->num_smuxes; |
4f2d23e1 | 1263 | err = snd_hda_ctl_add(codec, |
d9737751 MR |
1264 | snd_ctl_new1(&stac_smux_mixer, codec)); |
1265 | if (err < 0) | |
1266 | return err; | |
1267 | } | |
c7d4b2fa | 1268 | |
dabbed6f M |
1269 | if (spec->multiout.dig_out_nid) { |
1270 | err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid); | |
1271 | if (err < 0) | |
1272 | return err; | |
9a08160b TI |
1273 | err = snd_hda_create_spdif_share_sw(codec, |
1274 | &spec->multiout); | |
1275 | if (err < 0) | |
1276 | return err; | |
1277 | spec->multiout.share_spdif = 1; | |
dabbed6f | 1278 | } |
da74ae3e | 1279 | if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) { |
dabbed6f M |
1280 | err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid); |
1281 | if (err < 0) | |
1282 | return err; | |
1283 | } | |
2134ea4f TI |
1284 | |
1285 | /* if we have no master control, let's create it */ | |
1286 | if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) { | |
1c82ed1b | 1287 | unsigned int vmaster_tlv[4]; |
2134ea4f | 1288 | snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0], |
1c82ed1b | 1289 | HDA_OUTPUT, vmaster_tlv); |
7c7767eb TI |
1290 | /* correct volume offset */ |
1291 | vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset; | |
2134ea4f | 1292 | err = snd_hda_add_vmaster(codec, "Master Playback Volume", |
1c82ed1b | 1293 | vmaster_tlv, slave_vols); |
2134ea4f TI |
1294 | if (err < 0) |
1295 | return err; | |
1296 | } | |
1297 | if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) { | |
1298 | err = snd_hda_add_vmaster(codec, "Master Playback Switch", | |
1299 | NULL, slave_sws); | |
1300 | if (err < 0) | |
1301 | return err; | |
1302 | } | |
1303 | ||
603c4019 | 1304 | stac92xx_free_kctls(codec); /* no longer needed */ |
e4973e1e TI |
1305 | |
1306 | /* create jack input elements */ | |
1307 | if (spec->hp_detect) { | |
1308 | for (i = 0; i < cfg->hp_outs; i++) { | |
1309 | int type = SND_JACK_HEADPHONE; | |
1310 | nid = cfg->hp_pins[i]; | |
1311 | /* jack detection */ | |
1312 | if (cfg->hp_outs == i) | |
1313 | type |= SND_JACK_LINEOUT; | |
1314 | err = stac92xx_add_jack(codec, nid, type); | |
1315 | if (err < 0) | |
1316 | return err; | |
1317 | } | |
1318 | } | |
1319 | for (i = 0; i < cfg->line_outs; i++) { | |
1320 | err = stac92xx_add_jack(codec, cfg->line_out_pins[i], | |
1321 | SND_JACK_LINEOUT); | |
1322 | if (err < 0) | |
1323 | return err; | |
1324 | } | |
1325 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
1326 | nid = cfg->input_pins[i]; | |
1327 | if (nid) { | |
1328 | err = stac92xx_add_jack(codec, nid, | |
1329 | SND_JACK_MICROPHONE); | |
1330 | if (err < 0) | |
1331 | return err; | |
1332 | } | |
1333 | } | |
1334 | ||
dabbed6f | 1335 | return 0; |
2f2f4251 M |
1336 | } |
1337 | ||
403d1944 | 1338 | static unsigned int ref9200_pin_configs[8] = { |
dabbed6f | 1339 | 0x01c47010, 0x01447010, 0x0221401f, 0x01114010, |
2f2f4251 M |
1340 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, |
1341 | }; | |
1342 | ||
58eec423 MCC |
1343 | static unsigned int gateway9200_m4_pin_configs[8] = { |
1344 | 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010, | |
1345 | 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3, | |
1346 | }; | |
1347 | static unsigned int gateway9200_m4_2_pin_configs[8] = { | |
1348 | 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010, | |
1349 | 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3, | |
1350 | }; | |
1351 | ||
1352 | /* | |
dfe495d0 TI |
1353 | STAC 9200 pin configs for |
1354 | 102801A8 | |
1355 | 102801DE | |
1356 | 102801E8 | |
1357 | */ | |
1358 | static unsigned int dell9200_d21_pin_configs[8] = { | |
af6c016e TI |
1359 | 0x400001f0, 0x400001f1, 0x02214030, 0x01014010, |
1360 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, | |
dfe495d0 TI |
1361 | }; |
1362 | ||
1363 | /* | |
1364 | STAC 9200 pin configs for | |
1365 | 102801C0 | |
1366 | 102801C1 | |
1367 | */ | |
1368 | static unsigned int dell9200_d22_pin_configs[8] = { | |
af6c016e TI |
1369 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
1370 | 0x01813020, 0x02a19021, 0x90100140, 0x400001f2, | |
dfe495d0 TI |
1371 | }; |
1372 | ||
1373 | /* | |
1374 | STAC 9200 pin configs for | |
1375 | 102801C4 (Dell Dimension E310) | |
1376 | 102801C5 | |
1377 | 102801C7 | |
1378 | 102801D9 | |
1379 | 102801DA | |
1380 | 102801E3 | |
1381 | */ | |
1382 | static unsigned int dell9200_d23_pin_configs[8] = { | |
af6c016e TI |
1383 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
1384 | 0x01813020, 0x01a19021, 0x90100140, 0x400001f2, | |
dfe495d0 TI |
1385 | }; |
1386 | ||
1387 | ||
1388 | /* | |
1389 | STAC 9200-32 pin configs for | |
1390 | 102801B5 (Dell Inspiron 630m) | |
1391 | 102801D8 (Dell Inspiron 640m) | |
1392 | */ | |
1393 | static unsigned int dell9200_m21_pin_configs[8] = { | |
af6c016e TI |
1394 | 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310, |
1395 | 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd, | |
dfe495d0 TI |
1396 | }; |
1397 | ||
1398 | /* | |
1399 | STAC 9200-32 pin configs for | |
1400 | 102801C2 (Dell Latitude D620) | |
1401 | 102801C8 | |
1402 | 102801CC (Dell Latitude D820) | |
1403 | 102801D4 | |
1404 | 102801D6 | |
1405 | */ | |
1406 | static unsigned int dell9200_m22_pin_configs[8] = { | |
af6c016e TI |
1407 | 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310, |
1408 | 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc, | |
dfe495d0 TI |
1409 | }; |
1410 | ||
1411 | /* | |
1412 | STAC 9200-32 pin configs for | |
1413 | 102801CE (Dell XPS M1710) | |
1414 | 102801CF (Dell Precision M90) | |
1415 | */ | |
1416 | static unsigned int dell9200_m23_pin_configs[8] = { | |
1417 | 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310, | |
1418 | 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc, | |
1419 | }; | |
1420 | ||
1421 | /* | |
1422 | STAC 9200-32 pin configs for | |
1423 | 102801C9 | |
1424 | 102801CA | |
1425 | 102801CB (Dell Latitude 120L) | |
1426 | 102801D3 | |
1427 | */ | |
1428 | static unsigned int dell9200_m24_pin_configs[8] = { | |
af6c016e TI |
1429 | 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310, |
1430 | 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe, | |
dfe495d0 TI |
1431 | }; |
1432 | ||
1433 | /* | |
1434 | STAC 9200-32 pin configs for | |
1435 | 102801BD (Dell Inspiron E1505n) | |
1436 | 102801EE | |
1437 | 102801EF | |
1438 | */ | |
1439 | static unsigned int dell9200_m25_pin_configs[8] = { | |
af6c016e TI |
1440 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
1441 | 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd, | |
dfe495d0 TI |
1442 | }; |
1443 | ||
1444 | /* | |
1445 | STAC 9200-32 pin configs for | |
1446 | 102801F5 (Dell Inspiron 1501) | |
1447 | 102801F6 | |
1448 | */ | |
1449 | static unsigned int dell9200_m26_pin_configs[8] = { | |
af6c016e TI |
1450 | 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310, |
1451 | 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe, | |
dfe495d0 TI |
1452 | }; |
1453 | ||
1454 | /* | |
1455 | STAC 9200-32 | |
1456 | 102801CD (Dell Inspiron E1705/9400) | |
1457 | */ | |
1458 | static unsigned int dell9200_m27_pin_configs[8] = { | |
af6c016e TI |
1459 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
1460 | 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc, | |
dfe495d0 TI |
1461 | }; |
1462 | ||
bf277785 TD |
1463 | static unsigned int oqo9200_pin_configs[8] = { |
1464 | 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210, | |
1465 | 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3, | |
1466 | }; | |
1467 | ||
dfe495d0 | 1468 | |
f5fcc13c TI |
1469 | static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { |
1470 | [STAC_REF] = ref9200_pin_configs, | |
bf277785 | 1471 | [STAC_9200_OQO] = oqo9200_pin_configs, |
dfe495d0 TI |
1472 | [STAC_9200_DELL_D21] = dell9200_d21_pin_configs, |
1473 | [STAC_9200_DELL_D22] = dell9200_d22_pin_configs, | |
1474 | [STAC_9200_DELL_D23] = dell9200_d23_pin_configs, | |
1475 | [STAC_9200_DELL_M21] = dell9200_m21_pin_configs, | |
1476 | [STAC_9200_DELL_M22] = dell9200_m22_pin_configs, | |
1477 | [STAC_9200_DELL_M23] = dell9200_m23_pin_configs, | |
1478 | [STAC_9200_DELL_M24] = dell9200_m24_pin_configs, | |
1479 | [STAC_9200_DELL_M25] = dell9200_m25_pin_configs, | |
1480 | [STAC_9200_DELL_M26] = dell9200_m26_pin_configs, | |
1481 | [STAC_9200_DELL_M27] = dell9200_m27_pin_configs, | |
58eec423 MCC |
1482 | [STAC_9200_M4] = gateway9200_m4_pin_configs, |
1483 | [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs, | |
117f257d | 1484 | [STAC_9200_PANASONIC] = ref9200_pin_configs, |
403d1944 MP |
1485 | }; |
1486 | ||
f5fcc13c TI |
1487 | static const char *stac9200_models[STAC_9200_MODELS] = { |
1488 | [STAC_REF] = "ref", | |
bf277785 | 1489 | [STAC_9200_OQO] = "oqo", |
dfe495d0 TI |
1490 | [STAC_9200_DELL_D21] = "dell-d21", |
1491 | [STAC_9200_DELL_D22] = "dell-d22", | |
1492 | [STAC_9200_DELL_D23] = "dell-d23", | |
1493 | [STAC_9200_DELL_M21] = "dell-m21", | |
1494 | [STAC_9200_DELL_M22] = "dell-m22", | |
1495 | [STAC_9200_DELL_M23] = "dell-m23", | |
1496 | [STAC_9200_DELL_M24] = "dell-m24", | |
1497 | [STAC_9200_DELL_M25] = "dell-m25", | |
1498 | [STAC_9200_DELL_M26] = "dell-m26", | |
1499 | [STAC_9200_DELL_M27] = "dell-m27", | |
58eec423 MCC |
1500 | [STAC_9200_M4] = "gateway-m4", |
1501 | [STAC_9200_M4_2] = "gateway-m4-2", | |
117f257d | 1502 | [STAC_9200_PANASONIC] = "panasonic", |
f5fcc13c TI |
1503 | }; |
1504 | ||
1505 | static struct snd_pci_quirk stac9200_cfg_tbl[] = { | |
1506 | /* SigmaTel reference board */ | |
1507 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1508 | "DFI LanParty", STAC_REF), | |
577aa2c1 MR |
1509 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
1510 | "DFI LanParty", STAC_REF), | |
e7377071 | 1511 | /* Dell laptops have BIOS problem */ |
dfe495d0 TI |
1512 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, |
1513 | "unknown Dell", STAC_9200_DELL_D21), | |
f5fcc13c | 1514 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, |
dfe495d0 TI |
1515 | "Dell Inspiron 630m", STAC_9200_DELL_M21), |
1516 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, | |
1517 | "Dell Inspiron E1505n", STAC_9200_DELL_M25), | |
1518 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, | |
1519 | "unknown Dell", STAC_9200_DELL_D22), | |
1520 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, | |
1521 | "unknown Dell", STAC_9200_DELL_D22), | |
f5fcc13c | 1522 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, |
dfe495d0 TI |
1523 | "Dell Latitude D620", STAC_9200_DELL_M22), |
1524 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, | |
1525 | "unknown Dell", STAC_9200_DELL_D23), | |
1526 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, | |
1527 | "unknown Dell", STAC_9200_DELL_D23), | |
1528 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, | |
1529 | "unknown Dell", STAC_9200_DELL_M22), | |
1530 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, | |
1531 | "unknown Dell", STAC_9200_DELL_M24), | |
1532 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, | |
1533 | "unknown Dell", STAC_9200_DELL_M24), | |
f5fcc13c | 1534 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, |
dfe495d0 | 1535 | "Dell Latitude 120L", STAC_9200_DELL_M24), |
877b866d | 1536 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, |
dfe495d0 | 1537 | "Dell Latitude D820", STAC_9200_DELL_M22), |
46f02ca3 | 1538 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, |
dfe495d0 | 1539 | "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), |
46f02ca3 | 1540 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, |
dfe495d0 | 1541 | "Dell XPS M1710", STAC_9200_DELL_M23), |
f0f96745 | 1542 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, |
dfe495d0 TI |
1543 | "Dell Precision M90", STAC_9200_DELL_M23), |
1544 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, | |
1545 | "unknown Dell", STAC_9200_DELL_M22), | |
1546 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, | |
1547 | "unknown Dell", STAC_9200_DELL_M22), | |
8286c53e | 1548 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, |
dfe495d0 | 1549 | "unknown Dell", STAC_9200_DELL_M22), |
49c605db | 1550 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, |
dfe495d0 TI |
1551 | "Dell Inspiron 640m", STAC_9200_DELL_M21), |
1552 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, | |
1553 | "unknown Dell", STAC_9200_DELL_D23), | |
1554 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, | |
1555 | "unknown Dell", STAC_9200_DELL_D23), | |
1556 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, | |
1557 | "unknown Dell", STAC_9200_DELL_D21), | |
1558 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, | |
1559 | "unknown Dell", STAC_9200_DELL_D23), | |
1560 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, | |
1561 | "unknown Dell", STAC_9200_DELL_D21), | |
1562 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, | |
1563 | "unknown Dell", STAC_9200_DELL_M25), | |
1564 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, | |
1565 | "unknown Dell", STAC_9200_DELL_M25), | |
49c605db | 1566 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, |
dfe495d0 TI |
1567 | "Dell Inspiron 1501", STAC_9200_DELL_M26), |
1568 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, | |
1569 | "unknown Dell", STAC_9200_DELL_M26), | |
49c605db | 1570 | /* Panasonic */ |
117f257d | 1571 | SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), |
1194b5b7 | 1572 | /* Gateway machines needs EAPD to be set on resume */ |
58eec423 MCC |
1573 | SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), |
1574 | SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), | |
1575 | SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), | |
bf277785 TD |
1576 | /* OQO Mobile */ |
1577 | SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), | |
403d1944 MP |
1578 | {} /* terminator */ |
1579 | }; | |
1580 | ||
8e21c34c TD |
1581 | static unsigned int ref925x_pin_configs[8] = { |
1582 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
09a99959 | 1583 | 0x90a70320, 0x02214210, 0x01019020, 0x9033032e, |
8e21c34c TD |
1584 | }; |
1585 | ||
9cb36c2a MCC |
1586 | static unsigned int stac925xM1_pin_configs[8] = { |
1587 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | |
1588 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | |
8e21c34c TD |
1589 | }; |
1590 | ||
9cb36c2a MCC |
1591 | static unsigned int stac925xM1_2_pin_configs[8] = { |
1592 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | |
1593 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | |
1594 | }; | |
58eec423 | 1595 | |
9cb36c2a MCC |
1596 | static unsigned int stac925xM2_pin_configs[8] = { |
1597 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | |
1598 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | |
2c11f955 TD |
1599 | }; |
1600 | ||
8e21c34c | 1601 | static unsigned int stac925xM2_2_pin_configs[8] = { |
58eec423 MCC |
1602 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1603 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | |
1604 | }; | |
1605 | ||
9cb36c2a MCC |
1606 | static unsigned int stac925xM3_pin_configs[8] = { |
1607 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | |
1608 | 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3, | |
1609 | }; | |
58eec423 | 1610 | |
9cb36c2a MCC |
1611 | static unsigned int stac925xM5_pin_configs[8] = { |
1612 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | |
1613 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | |
1614 | }; | |
1615 | ||
9cb36c2a MCC |
1616 | static unsigned int stac925xM6_pin_configs[8] = { |
1617 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | |
1618 | 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320, | |
8e21c34c TD |
1619 | }; |
1620 | ||
1621 | static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = { | |
1622 | [STAC_REF] = ref925x_pin_configs, | |
9cb36c2a MCC |
1623 | [STAC_M1] = stac925xM1_pin_configs, |
1624 | [STAC_M1_2] = stac925xM1_2_pin_configs, | |
1625 | [STAC_M2] = stac925xM2_pin_configs, | |
8e21c34c | 1626 | [STAC_M2_2] = stac925xM2_2_pin_configs, |
9cb36c2a MCC |
1627 | [STAC_M3] = stac925xM3_pin_configs, |
1628 | [STAC_M5] = stac925xM5_pin_configs, | |
1629 | [STAC_M6] = stac925xM6_pin_configs, | |
8e21c34c TD |
1630 | }; |
1631 | ||
1632 | static const char *stac925x_models[STAC_925x_MODELS] = { | |
1633 | [STAC_REF] = "ref", | |
9cb36c2a MCC |
1634 | [STAC_M1] = "m1", |
1635 | [STAC_M1_2] = "m1-2", | |
1636 | [STAC_M2] = "m2", | |
8e21c34c | 1637 | [STAC_M2_2] = "m2-2", |
9cb36c2a MCC |
1638 | [STAC_M3] = "m3", |
1639 | [STAC_M5] = "m5", | |
1640 | [STAC_M6] = "m6", | |
8e21c34c TD |
1641 | }; |
1642 | ||
9cb36c2a | 1643 | static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = { |
58eec423 MCC |
1644 | SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), |
1645 | SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), | |
1646 | SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), | |
1647 | SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), | |
9cb36c2a | 1648 | SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), |
9cb36c2a MCC |
1649 | /* Not sure about the brand name for those */ |
1650 | SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), | |
1651 | SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), | |
1652 | SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), | |
1653 | SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), | |
9cb36c2a | 1654 | {} /* terminator */ |
8e21c34c TD |
1655 | }; |
1656 | ||
1657 | static struct snd_pci_quirk stac925x_cfg_tbl[] = { | |
1658 | /* SigmaTel reference board */ | |
1659 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), | |
577aa2c1 | 1660 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), |
2c11f955 | 1661 | SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), |
9cb36c2a MCC |
1662 | |
1663 | /* Default table for unknown ID */ | |
1664 | SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), | |
1665 | ||
8e21c34c TD |
1666 | {} /* terminator */ |
1667 | }; | |
1668 | ||
a7662640 | 1669 | static unsigned int ref92hd73xx_pin_configs[13] = { |
e1f0d669 MR |
1670 | 0x02214030, 0x02a19040, 0x01a19020, 0x02214030, |
1671 | 0x0181302e, 0x01014010, 0x01014020, 0x01014030, | |
1672 | 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050, | |
a7662640 MR |
1673 | 0x01452050, |
1674 | }; | |
1675 | ||
1676 | static unsigned int dell_m6_pin_configs[13] = { | |
1677 | 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110, | |
7c2ba97b | 1678 | 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0, |
a7662640 MR |
1679 | 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0, |
1680 | 0x4f0000f0, | |
e1f0d669 MR |
1681 | }; |
1682 | ||
1683 | static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = { | |
a7662640 | 1684 | [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs, |
661cd8fb TI |
1685 | [STAC_DELL_M6_AMIC] = dell_m6_pin_configs, |
1686 | [STAC_DELL_M6_DMIC] = dell_m6_pin_configs, | |
1687 | [STAC_DELL_M6_BOTH] = dell_m6_pin_configs, | |
6b3ab21e | 1688 | [STAC_DELL_EQ] = dell_m6_pin_configs, |
e1f0d669 MR |
1689 | }; |
1690 | ||
1691 | static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = { | |
9e43f0de | 1692 | [STAC_92HD73XX_NO_JD] = "no-jd", |
e1f0d669 | 1693 | [STAC_92HD73XX_REF] = "ref", |
661cd8fb TI |
1694 | [STAC_DELL_M6_AMIC] = "dell-m6-amic", |
1695 | [STAC_DELL_M6_DMIC] = "dell-m6-dmic", | |
1696 | [STAC_DELL_M6_BOTH] = "dell-m6", | |
6b3ab21e | 1697 | [STAC_DELL_EQ] = "dell-eq", |
e1f0d669 MR |
1698 | }; |
1699 | ||
1700 | static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = { | |
1701 | /* SigmaTel reference board */ | |
1702 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
a7662640 | 1703 | "DFI LanParty", STAC_92HD73XX_REF), |
577aa2c1 MR |
1704 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
1705 | "DFI LanParty", STAC_92HD73XX_REF), | |
a7662640 | 1706 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, |
661cd8fb | 1707 | "Dell Studio 1535", STAC_DELL_M6_DMIC), |
a7662640 | 1708 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, |
661cd8fb | 1709 | "unknown Dell", STAC_DELL_M6_DMIC), |
a7662640 | 1710 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, |
661cd8fb | 1711 | "unknown Dell", STAC_DELL_M6_BOTH), |
a7662640 | 1712 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, |
661cd8fb | 1713 | "unknown Dell", STAC_DELL_M6_BOTH), |
a7662640 | 1714 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, |
661cd8fb | 1715 | "unknown Dell", STAC_DELL_M6_AMIC), |
a7662640 | 1716 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, |
661cd8fb | 1717 | "unknown Dell", STAC_DELL_M6_AMIC), |
a7662640 | 1718 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, |
661cd8fb TI |
1719 | "unknown Dell", STAC_DELL_M6_DMIC), |
1720 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, | |
1721 | "unknown Dell", STAC_DELL_M6_DMIC), | |
b0fc5e04 | 1722 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, |
661cd8fb | 1723 | "Dell Studio 1537", STAC_DELL_M6_DMIC), |
fa620e97 JS |
1724 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, |
1725 | "Dell Studio 17", STAC_DELL_M6_DMIC), | |
e1f0d669 MR |
1726 | {} /* terminator */ |
1727 | }; | |
1728 | ||
d0513fc6 MR |
1729 | static unsigned int ref92hd83xxx_pin_configs[14] = { |
1730 | 0x02214030, 0x02211010, 0x02a19020, 0x02170130, | |
1731 | 0x01014050, 0x01819040, 0x01014020, 0x90a3014e, | |
1732 | 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0, | |
1733 | 0x01451160, 0x98560170, | |
1734 | }; | |
1735 | ||
1736 | static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = { | |
1737 | [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs, | |
32ed3f46 | 1738 | [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs, |
d0513fc6 MR |
1739 | }; |
1740 | ||
1741 | static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = { | |
1742 | [STAC_92HD83XXX_REF] = "ref", | |
32ed3f46 | 1743 | [STAC_92HD83XXX_PWR_REF] = "mic-ref", |
d0513fc6 MR |
1744 | }; |
1745 | ||
1746 | static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = { | |
1747 | /* SigmaTel reference board */ | |
1748 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
f9d088b2 | 1749 | "DFI LanParty", STAC_92HD83XXX_REF), |
577aa2c1 MR |
1750 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
1751 | "DFI LanParty", STAC_92HD83XXX_REF), | |
574f3c4f | 1752 | {} /* terminator */ |
d0513fc6 MR |
1753 | }; |
1754 | ||
616f89e7 | 1755 | static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
e035b841 | 1756 | 0x02214030, 0x02a19040, 0x01a19020, 0x01014010, |
4b33c767 | 1757 | 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0, |
616f89e7 HRK |
1758 | 0x90a000f0, 0x01452050, 0x01452050, 0x00000000, |
1759 | 0x00000000 | |
e035b841 MR |
1760 | }; |
1761 | ||
616f89e7 | 1762 | static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
a7662640 | 1763 | 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110, |
07bcb316 | 1764 | 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0, |
616f89e7 HRK |
1765 | 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000, |
1766 | 0x00000000 | |
a7662640 MR |
1767 | }; |
1768 | ||
616f89e7 | 1769 | static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
a7662640 MR |
1770 | 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110, |
1771 | 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0, | |
616f89e7 HRK |
1772 | 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000, |
1773 | 0x00000000 | |
a7662640 MR |
1774 | }; |
1775 | ||
616f89e7 | 1776 | static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
3a7abfd2 MR |
1777 | 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110, |
1778 | 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0, | |
616f89e7 HRK |
1779 | 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000, |
1780 | 0x00000000 | |
3a7abfd2 MR |
1781 | }; |
1782 | ||
e035b841 MR |
1783 | static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = { |
1784 | [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs, | |
a7662640 MR |
1785 | [STAC_DELL_M4_1] = dell_m4_1_pin_configs, |
1786 | [STAC_DELL_M4_2] = dell_m4_2_pin_configs, | |
3a7abfd2 | 1787 | [STAC_DELL_M4_3] = dell_m4_3_pin_configs, |
6a14f585 | 1788 | [STAC_HP_M4] = NULL, |
1b0652eb | 1789 | [STAC_HP_DV5] = NULL, |
e035b841 MR |
1790 | }; |
1791 | ||
1792 | static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = { | |
1793 | [STAC_92HD71BXX_REF] = "ref", | |
a7662640 MR |
1794 | [STAC_DELL_M4_1] = "dell-m4-1", |
1795 | [STAC_DELL_M4_2] = "dell-m4-2", | |
3a7abfd2 | 1796 | [STAC_DELL_M4_3] = "dell-m4-3", |
6a14f585 | 1797 | [STAC_HP_M4] = "hp-m4", |
1b0652eb | 1798 | [STAC_HP_DV5] = "hp-dv5", |
e035b841 MR |
1799 | }; |
1800 | ||
1801 | static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { | |
1802 | /* SigmaTel reference board */ | |
1803 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1804 | "DFI LanParty", STAC_92HD71BXX_REF), | |
577aa2c1 MR |
1805 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
1806 | "DFI LanParty", STAC_92HD71BXX_REF), | |
80bf2724 TI |
1807 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2, |
1808 | "HP dv5", STAC_HP_M4), | |
1809 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4, | |
1810 | "HP dv7", STAC_HP_M4), | |
e0c0e943 TI |
1811 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7, |
1812 | "HP dv4", STAC_HP_DV5), | |
69dfaefe TI |
1813 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc, |
1814 | "HP dv7", STAC_HP_M4), | |
42de55cb TI |
1815 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3600, |
1816 | "HP dv5", STAC_HP_DV5), | |
dafb70ce | 1817 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603, |
1b0652eb | 1818 | "HP dv5", STAC_HP_DV5), |
9a9e2359 MR |
1819 | SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, |
1820 | "unknown HP", STAC_HP_M4), | |
a7662640 MR |
1821 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, |
1822 | "unknown Dell", STAC_DELL_M4_1), | |
1823 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, | |
1824 | "unknown Dell", STAC_DELL_M4_1), | |
1825 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, | |
1826 | "unknown Dell", STAC_DELL_M4_1), | |
1827 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, | |
1828 | "unknown Dell", STAC_DELL_M4_1), | |
1829 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, | |
1830 | "unknown Dell", STAC_DELL_M4_1), | |
1831 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, | |
1832 | "unknown Dell", STAC_DELL_M4_1), | |
1833 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, | |
1834 | "unknown Dell", STAC_DELL_M4_1), | |
1835 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, | |
1836 | "unknown Dell", STAC_DELL_M4_2), | |
1837 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, | |
1838 | "unknown Dell", STAC_DELL_M4_2), | |
1839 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, | |
1840 | "unknown Dell", STAC_DELL_M4_2), | |
1841 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, | |
1842 | "unknown Dell", STAC_DELL_M4_2), | |
3a7abfd2 MR |
1843 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, |
1844 | "unknown Dell", STAC_DELL_M4_3), | |
e035b841 MR |
1845 | {} /* terminator */ |
1846 | }; | |
1847 | ||
403d1944 MP |
1848 | static unsigned int ref922x_pin_configs[10] = { |
1849 | 0x01014010, 0x01016011, 0x01012012, 0x0221401f, | |
1850 | 0x01813122, 0x01011014, 0x01441030, 0x01c41030, | |
2f2f4251 M |
1851 | 0x40000100, 0x40000100, |
1852 | }; | |
1853 | ||
dfe495d0 TI |
1854 | /* |
1855 | STAC 922X pin configs for | |
1856 | 102801A7 | |
1857 | 102801AB | |
1858 | 102801A9 | |
1859 | 102801D1 | |
1860 | 102801D2 | |
1861 | */ | |
1862 | static unsigned int dell_922x_d81_pin_configs[10] = { | |
1863 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | |
1864 | 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1, | |
1865 | 0x01813122, 0x400001f2, | |
1866 | }; | |
1867 | ||
1868 | /* | |
1869 | STAC 922X pin configs for | |
1870 | 102801AC | |
1871 | 102801D0 | |
1872 | */ | |
1873 | static unsigned int dell_922x_d82_pin_configs[10] = { | |
1874 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | |
1875 | 0x02a19020, 0x01117011, 0x01451140, 0x400001f0, | |
1876 | 0x01813122, 0x400001f1, | |
1877 | }; | |
1878 | ||
1879 | /* | |
1880 | STAC 922X pin configs for | |
1881 | 102801BF | |
1882 | */ | |
1883 | static unsigned int dell_922x_m81_pin_configs[10] = { | |
1884 | 0x0321101f, 0x01112024, 0x01111222, 0x91174220, | |
1885 | 0x03a11050, 0x01116221, 0x90a70330, 0x01452340, | |
1886 | 0x40C003f1, 0x405003f0, | |
1887 | }; | |
1888 | ||
1889 | /* | |
1890 | STAC 9221 A1 pin configs for | |
1891 | 102801D7 (Dell XPS M1210) | |
1892 | */ | |
1893 | static unsigned int dell_922x_m82_pin_configs[10] = { | |
7f9310c1 JZ |
1894 | 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310, |
1895 | 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2, | |
dfe495d0 TI |
1896 | 0x508003f3, 0x405003f4, |
1897 | }; | |
1898 | ||
403d1944 | 1899 | static unsigned int d945gtp3_pin_configs[10] = { |
869264c4 | 1900 | 0x0221401f, 0x01a19022, 0x01813021, 0x01014010, |
403d1944 MP |
1901 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, |
1902 | 0x02a19120, 0x40000100, | |
1903 | }; | |
1904 | ||
1905 | static unsigned int d945gtp5_pin_configs[10] = { | |
869264c4 MP |
1906 | 0x0221401f, 0x01011012, 0x01813024, 0x01014010, |
1907 | 0x01a19021, 0x01016011, 0x01452130, 0x40000100, | |
403d1944 MP |
1908 | 0x02a19320, 0x40000100, |
1909 | }; | |
1910 | ||
5d5d3bc3 IZ |
1911 | static unsigned int intel_mac_v1_pin_configs[10] = { |
1912 | 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd, | |
1913 | 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240, | |
1914 | 0x400000fc, 0x400000fb, | |
1915 | }; | |
1916 | ||
1917 | static unsigned int intel_mac_v2_pin_configs[10] = { | |
1918 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | |
1919 | 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa, | |
1920 | 0x400000fc, 0x400000fb, | |
6f0778d8 NB |
1921 | }; |
1922 | ||
5d5d3bc3 IZ |
1923 | static unsigned int intel_mac_v3_pin_configs[10] = { |
1924 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | |
1925 | 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240, | |
3fc24d85 TI |
1926 | 0x400000fc, 0x400000fb, |
1927 | }; | |
1928 | ||
5d5d3bc3 IZ |
1929 | static unsigned int intel_mac_v4_pin_configs[10] = { |
1930 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | |
1931 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | |
f16928fb SF |
1932 | 0x400000fc, 0x400000fb, |
1933 | }; | |
1934 | ||
5d5d3bc3 IZ |
1935 | static unsigned int intel_mac_v5_pin_configs[10] = { |
1936 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | |
1937 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | |
1938 | 0x400000fc, 0x400000fb, | |
0dae0f83 TI |
1939 | }; |
1940 | ||
8c650087 MCC |
1941 | static unsigned int ecs202_pin_configs[10] = { |
1942 | 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010, | |
1943 | 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1, | |
1944 | 0x9037012e, 0x40e000f2, | |
1945 | }; | |
76c08828 | 1946 | |
19039bd0 | 1947 | static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { |
f5fcc13c | 1948 | [STAC_D945_REF] = ref922x_pin_configs, |
19039bd0 TI |
1949 | [STAC_D945GTP3] = d945gtp3_pin_configs, |
1950 | [STAC_D945GTP5] = d945gtp5_pin_configs, | |
5d5d3bc3 IZ |
1951 | [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs, |
1952 | [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs, | |
1953 | [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs, | |
1954 | [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs, | |
1955 | [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs, | |
536319af | 1956 | [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs, |
dfe495d0 | 1957 | /* for backward compatibility */ |
5d5d3bc3 IZ |
1958 | [STAC_MACMINI] = intel_mac_v3_pin_configs, |
1959 | [STAC_MACBOOK] = intel_mac_v5_pin_configs, | |
1960 | [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs, | |
1961 | [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs, | |
1962 | [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs, | |
1963 | [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs, | |
8c650087 | 1964 | [STAC_ECS_202] = ecs202_pin_configs, |
dfe495d0 TI |
1965 | [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs, |
1966 | [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs, | |
1967 | [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs, | |
1968 | [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs, | |
403d1944 MP |
1969 | }; |
1970 | ||
f5fcc13c TI |
1971 | static const char *stac922x_models[STAC_922X_MODELS] = { |
1972 | [STAC_D945_REF] = "ref", | |
1973 | [STAC_D945GTP5] = "5stack", | |
1974 | [STAC_D945GTP3] = "3stack", | |
5d5d3bc3 IZ |
1975 | [STAC_INTEL_MAC_V1] = "intel-mac-v1", |
1976 | [STAC_INTEL_MAC_V2] = "intel-mac-v2", | |
1977 | [STAC_INTEL_MAC_V3] = "intel-mac-v3", | |
1978 | [STAC_INTEL_MAC_V4] = "intel-mac-v4", | |
1979 | [STAC_INTEL_MAC_V5] = "intel-mac-v5", | |
536319af | 1980 | [STAC_INTEL_MAC_AUTO] = "intel-mac-auto", |
dfe495d0 | 1981 | /* for backward compatibility */ |
f5fcc13c | 1982 | [STAC_MACMINI] = "macmini", |
3fc24d85 | 1983 | [STAC_MACBOOK] = "macbook", |
6f0778d8 NB |
1984 | [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1", |
1985 | [STAC_MACBOOK_PRO_V2] = "macbook-pro", | |
f16928fb | 1986 | [STAC_IMAC_INTEL] = "imac-intel", |
0dae0f83 | 1987 | [STAC_IMAC_INTEL_20] = "imac-intel-20", |
8c650087 | 1988 | [STAC_ECS_202] = "ecs202", |
dfe495d0 TI |
1989 | [STAC_922X_DELL_D81] = "dell-d81", |
1990 | [STAC_922X_DELL_D82] = "dell-d82", | |
1991 | [STAC_922X_DELL_M81] = "dell-m81", | |
1992 | [STAC_922X_DELL_M82] = "dell-m82", | |
f5fcc13c TI |
1993 | }; |
1994 | ||
1995 | static struct snd_pci_quirk stac922x_cfg_tbl[] = { | |
1996 | /* SigmaTel reference board */ | |
1997 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1998 | "DFI LanParty", STAC_D945_REF), | |
577aa2c1 MR |
1999 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
2000 | "DFI LanParty", STAC_D945_REF), | |
f5fcc13c TI |
2001 | /* Intel 945G based systems */ |
2002 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, | |
2003 | "Intel D945G", STAC_D945GTP3), | |
2004 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, | |
2005 | "Intel D945G", STAC_D945GTP3), | |
2006 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, | |
2007 | "Intel D945G", STAC_D945GTP3), | |
2008 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, | |
2009 | "Intel D945G", STAC_D945GTP3), | |
2010 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, | |
2011 | "Intel D945G", STAC_D945GTP3), | |
2012 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, | |
2013 | "Intel D945G", STAC_D945GTP3), | |
2014 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, | |
2015 | "Intel D945G", STAC_D945GTP3), | |
2016 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, | |
2017 | "Intel D945G", STAC_D945GTP3), | |
2018 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, | |
2019 | "Intel D945G", STAC_D945GTP3), | |
2020 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, | |
2021 | "Intel D945G", STAC_D945GTP3), | |
2022 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, | |
2023 | "Intel D945G", STAC_D945GTP3), | |
2024 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, | |
2025 | "Intel D945G", STAC_D945GTP3), | |
2026 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, | |
2027 | "Intel D945G", STAC_D945GTP3), | |
2028 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, | |
2029 | "Intel D945G", STAC_D945GTP3), | |
2030 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, | |
2031 | "Intel D945G", STAC_D945GTP3), | |
2032 | /* Intel D945G 5-stack systems */ | |
2033 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, | |
2034 | "Intel D945G", STAC_D945GTP5), | |
2035 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, | |
2036 | "Intel D945G", STAC_D945GTP5), | |
2037 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, | |
2038 | "Intel D945G", STAC_D945GTP5), | |
2039 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, | |
2040 | "Intel D945G", STAC_D945GTP5), | |
2041 | /* Intel 945P based systems */ | |
2042 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, | |
2043 | "Intel D945P", STAC_D945GTP3), | |
2044 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, | |
2045 | "Intel D945P", STAC_D945GTP3), | |
2046 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, | |
2047 | "Intel D945P", STAC_D945GTP3), | |
2048 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, | |
2049 | "Intel D945P", STAC_D945GTP3), | |
2050 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, | |
2051 | "Intel D945P", STAC_D945GTP3), | |
2052 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, | |
2053 | "Intel D945P", STAC_D945GTP5), | |
8056d47e TI |
2054 | /* other intel */ |
2055 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, | |
2056 | "Intel D945", STAC_D945_REF), | |
f5fcc13c | 2057 | /* other systems */ |
536319af | 2058 | /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ |
f5fcc13c | 2059 | SND_PCI_QUIRK(0x8384, 0x7680, |
536319af | 2060 | "Mac", STAC_INTEL_MAC_AUTO), |
dfe495d0 TI |
2061 | /* Dell systems */ |
2062 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, | |
2063 | "unknown Dell", STAC_922X_DELL_D81), | |
2064 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, | |
2065 | "unknown Dell", STAC_922X_DELL_D81), | |
2066 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, | |
2067 | "unknown Dell", STAC_922X_DELL_D81), | |
2068 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, | |
2069 | "unknown Dell", STAC_922X_DELL_D82), | |
2070 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, | |
2071 | "unknown Dell", STAC_922X_DELL_M81), | |
2072 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, | |
2073 | "unknown Dell", STAC_922X_DELL_D82), | |
2074 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, | |
2075 | "unknown Dell", STAC_922X_DELL_D81), | |
2076 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, | |
2077 | "unknown Dell", STAC_922X_DELL_D81), | |
2078 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, | |
2079 | "Dell XPS M1210", STAC_922X_DELL_M82), | |
8c650087 MCC |
2080 | /* ECS/PC Chips boards */ |
2081 | SND_PCI_QUIRK(0x1019, 0x2144, | |
2082 | "ECS/PC chips", STAC_ECS_202), | |
2083 | SND_PCI_QUIRK(0x1019, 0x2608, | |
2084 | "ECS/PC chips", STAC_ECS_202), | |
2085 | SND_PCI_QUIRK(0x1019, 0x2633, | |
2086 | "ECS/PC chips P17G/1333", STAC_ECS_202), | |
2087 | SND_PCI_QUIRK(0x1019, 0x2811, | |
2088 | "ECS/PC chips", STAC_ECS_202), | |
2089 | SND_PCI_QUIRK(0x1019, 0x2812, | |
2090 | "ECS/PC chips", STAC_ECS_202), | |
2091 | SND_PCI_QUIRK(0x1019, 0x2813, | |
2092 | "ECS/PC chips", STAC_ECS_202), | |
2093 | SND_PCI_QUIRK(0x1019, 0x2814, | |
2094 | "ECS/PC chips", STAC_ECS_202), | |
2095 | SND_PCI_QUIRK(0x1019, 0x2815, | |
2096 | "ECS/PC chips", STAC_ECS_202), | |
2097 | SND_PCI_QUIRK(0x1019, 0x2816, | |
2098 | "ECS/PC chips", STAC_ECS_202), | |
2099 | SND_PCI_QUIRK(0x1019, 0x2817, | |
2100 | "ECS/PC chips", STAC_ECS_202), | |
2101 | SND_PCI_QUIRK(0x1019, 0x2818, | |
2102 | "ECS/PC chips", STAC_ECS_202), | |
2103 | SND_PCI_QUIRK(0x1019, 0x2819, | |
2104 | "ECS/PC chips", STAC_ECS_202), | |
2105 | SND_PCI_QUIRK(0x1019, 0x2820, | |
2106 | "ECS/PC chips", STAC_ECS_202), | |
403d1944 MP |
2107 | {} /* terminator */ |
2108 | }; | |
2109 | ||
3cc08dc6 | 2110 | static unsigned int ref927x_pin_configs[14] = { |
93ed1503 TD |
2111 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, |
2112 | 0x01a19040, 0x01011012, 0x01016011, 0x0101201f, | |
2113 | 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070, | |
2114 | 0x01c42190, 0x40000100, | |
3cc08dc6 MP |
2115 | }; |
2116 | ||
93ed1503 | 2117 | static unsigned int d965_3st_pin_configs[14] = { |
81d3dbde TD |
2118 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, |
2119 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, | |
2120 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, | |
2121 | 0x40000100, 0x40000100 | |
2122 | }; | |
2123 | ||
93ed1503 TD |
2124 | static unsigned int d965_5st_pin_configs[14] = { |
2125 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, | |
2126 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, | |
2127 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, | |
2128 | 0x40000100, 0x40000100 | |
2129 | }; | |
2130 | ||
4ff076e5 TD |
2131 | static unsigned int dell_3st_pin_configs[14] = { |
2132 | 0x02211230, 0x02a11220, 0x01a19040, 0x01114210, | |
2133 | 0x01111212, 0x01116211, 0x01813050, 0x01112214, | |
8e9068b1 | 2134 | 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb, |
4ff076e5 TD |
2135 | 0x40c003fc, 0x40000100 |
2136 | }; | |
2137 | ||
93ed1503 | 2138 | static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { |
e28d8322 | 2139 | [STAC_D965_REF_NO_JD] = ref927x_pin_configs, |
8e9068b1 MR |
2140 | [STAC_D965_REF] = ref927x_pin_configs, |
2141 | [STAC_D965_3ST] = d965_3st_pin_configs, | |
2142 | [STAC_D965_5ST] = d965_5st_pin_configs, | |
2143 | [STAC_DELL_3ST] = dell_3st_pin_configs, | |
2144 | [STAC_DELL_BIOS] = NULL, | |
3cc08dc6 MP |
2145 | }; |
2146 | ||
f5fcc13c | 2147 | static const char *stac927x_models[STAC_927X_MODELS] = { |
e28d8322 | 2148 | [STAC_D965_REF_NO_JD] = "ref-no-jd", |
8e9068b1 MR |
2149 | [STAC_D965_REF] = "ref", |
2150 | [STAC_D965_3ST] = "3stack", | |
2151 | [STAC_D965_5ST] = "5stack", | |
2152 | [STAC_DELL_3ST] = "dell-3stack", | |
2153 | [STAC_DELL_BIOS] = "dell-bios", | |
f5fcc13c TI |
2154 | }; |
2155 | ||
2156 | static struct snd_pci_quirk stac927x_cfg_tbl[] = { | |
2157 | /* SigmaTel reference board */ | |
2158 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
2159 | "DFI LanParty", STAC_D965_REF), | |
577aa2c1 MR |
2160 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
2161 | "DFI LanParty", STAC_D965_REF), | |
81d3dbde | 2162 | /* Intel 946 based systems */ |
f5fcc13c TI |
2163 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), |
2164 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), | |
93ed1503 | 2165 | /* 965 based 3 stack systems */ |
f5fcc13c TI |
2166 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST), |
2167 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST), | |
2168 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST), | |
2169 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST), | |
2170 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST), | |
2171 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST), | |
2172 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST), | |
2173 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST), | |
2174 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST), | |
2175 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST), | |
2176 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST), | |
2177 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST), | |
2178 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST), | |
2179 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST), | |
2180 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST), | |
2181 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST), | |
4ff076e5 | 2182 | /* Dell 3 stack systems */ |
8e9068b1 | 2183 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST), |
dfe495d0 | 2184 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), |
4ff076e5 TD |
2185 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), |
2186 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), | |
8e9068b1 | 2187 | /* Dell 3 stack systems with verb table in BIOS */ |
2f32d909 MR |
2188 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), |
2189 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), | |
8e9068b1 | 2190 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS), |
24918b61 | 2191 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST), |
8e9068b1 MR |
2192 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), |
2193 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), | |
2194 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), | |
2195 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS), | |
93ed1503 | 2196 | /* 965 based 5 stack systems */ |
f5fcc13c TI |
2197 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST), |
2198 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST), | |
2199 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST), | |
2200 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST), | |
2201 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST), | |
2202 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST), | |
2203 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST), | |
2204 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST), | |
2205 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST), | |
3cc08dc6 MP |
2206 | {} /* terminator */ |
2207 | }; | |
2208 | ||
f3302a59 MP |
2209 | static unsigned int ref9205_pin_configs[12] = { |
2210 | 0x40000100, 0x40000100, 0x01016011, 0x01014010, | |
09a99959 | 2211 | 0x01813122, 0x01a19021, 0x01019020, 0x40000100, |
8b65727b | 2212 | 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030 |
f3302a59 MP |
2213 | }; |
2214 | ||
dfe495d0 TI |
2215 | /* |
2216 | STAC 9205 pin configs for | |
2217 | 102801F1 | |
2218 | 102801F2 | |
2219 | 102801FC | |
2220 | 102801FD | |
2221 | 10280204 | |
2222 | 1028021F | |
3fa2ef74 | 2223 | 10280228 (Dell Vostro 1500) |
dfe495d0 TI |
2224 | */ |
2225 | static unsigned int dell_9205_m42_pin_configs[12] = { | |
2226 | 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310, | |
2227 | 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9, | |
2228 | 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE, | |
2229 | }; | |
2230 | ||
2231 | /* | |
2232 | STAC 9205 pin configs for | |
2233 | 102801F9 | |
2234 | 102801FA | |
2235 | 102801FE | |
2236 | 102801FF (Dell Precision M4300) | |
2237 | 10280206 | |
2238 | 10280200 | |
2239 | 10280201 | |
2240 | */ | |
2241 | static unsigned int dell_9205_m43_pin_configs[12] = { | |
ae0a8ed8 TD |
2242 | 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310, |
2243 | 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9, | |
2244 | 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8, | |
2245 | }; | |
2246 | ||
dfe495d0 | 2247 | static unsigned int dell_9205_m44_pin_configs[12] = { |
ae0a8ed8 TD |
2248 | 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310, |
2249 | 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9, | |
2250 | 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe, | |
2251 | }; | |
2252 | ||
f5fcc13c | 2253 | static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { |
ae0a8ed8 | 2254 | [STAC_9205_REF] = ref9205_pin_configs, |
dfe495d0 TI |
2255 | [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs, |
2256 | [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs, | |
2257 | [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs, | |
d9a4268e | 2258 | [STAC_9205_EAPD] = NULL, |
f3302a59 MP |
2259 | }; |
2260 | ||
f5fcc13c TI |
2261 | static const char *stac9205_models[STAC_9205_MODELS] = { |
2262 | [STAC_9205_REF] = "ref", | |
dfe495d0 | 2263 | [STAC_9205_DELL_M42] = "dell-m42", |
ae0a8ed8 TD |
2264 | [STAC_9205_DELL_M43] = "dell-m43", |
2265 | [STAC_9205_DELL_M44] = "dell-m44", | |
d9a4268e | 2266 | [STAC_9205_EAPD] = "eapd", |
f5fcc13c TI |
2267 | }; |
2268 | ||
2269 | static struct snd_pci_quirk stac9205_cfg_tbl[] = { | |
2270 | /* SigmaTel reference board */ | |
2271 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
2272 | "DFI LanParty", STAC_9205_REF), | |
577aa2c1 MR |
2273 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, |
2274 | "DFI LanParty", STAC_9205_REF), | |
d9a4268e | 2275 | /* Dell */ |
dfe495d0 TI |
2276 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, |
2277 | "unknown Dell", STAC_9205_DELL_M42), | |
2278 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, | |
2279 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 | 2280 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, |
b44ef2f1 | 2281 | "Dell Precision", STAC_9205_DELL_M43), |
ae0a8ed8 TD |
2282 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, |
2283 | "Dell Precision", STAC_9205_DELL_M43), | |
2284 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, | |
2285 | "Dell Precision", STAC_9205_DELL_M43), | |
dfe495d0 TI |
2286 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, |
2287 | "unknown Dell", STAC_9205_DELL_M42), | |
2288 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, | |
2289 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 TD |
2290 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, |
2291 | "Dell Precision", STAC_9205_DELL_M43), | |
2292 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, | |
dfe495d0 | 2293 | "Dell Precision M4300", STAC_9205_DELL_M43), |
dfe495d0 TI |
2294 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, |
2295 | "unknown Dell", STAC_9205_DELL_M42), | |
4549915c TI |
2296 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, |
2297 | "Dell Precision", STAC_9205_DELL_M43), | |
2298 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, | |
2299 | "Dell Precision", STAC_9205_DELL_M43), | |
2300 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, | |
2301 | "Dell Precision", STAC_9205_DELL_M43), | |
ae0a8ed8 TD |
2302 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, |
2303 | "Dell Inspiron", STAC_9205_DELL_M44), | |
3fa2ef74 MR |
2304 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, |
2305 | "Dell Vostro 1500", STAC_9205_DELL_M42), | |
d9a4268e TI |
2306 | /* Gateway */ |
2307 | SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), | |
f3302a59 MP |
2308 | {} /* terminator */ |
2309 | }; | |
2310 | ||
11b44bbd RF |
2311 | static int stac92xx_save_bios_config_regs(struct hda_codec *codec) |
2312 | { | |
2313 | int i; | |
2314 | struct sigmatel_spec *spec = codec->spec; | |
2315 | ||
af9f341a TI |
2316 | kfree(spec->pin_configs); |
2317 | spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs), | |
2318 | GFP_KERNEL); | |
2319 | if (!spec->pin_configs) | |
2320 | return -ENOMEM; | |
11b44bbd RF |
2321 | |
2322 | for (i = 0; i < spec->num_pins; i++) { | |
2323 | hda_nid_t nid = spec->pin_nids[i]; | |
2324 | unsigned int pin_cfg; | |
616f89e7 HRK |
2325 | |
2326 | if (!nid) | |
2327 | continue; | |
11b44bbd RF |
2328 | pin_cfg = snd_hda_codec_read(codec, nid, 0, |
2329 | AC_VERB_GET_CONFIG_DEFAULT, 0x00); | |
2330 | snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n", | |
2331 | nid, pin_cfg); | |
af9f341a | 2332 | spec->pin_configs[i] = pin_cfg; |
11b44bbd RF |
2333 | } |
2334 | ||
2335 | return 0; | |
2336 | } | |
2337 | ||
87d48363 MR |
2338 | static void stac92xx_set_config_reg(struct hda_codec *codec, |
2339 | hda_nid_t pin_nid, unsigned int pin_config) | |
2340 | { | |
2341 | int i; | |
2342 | snd_hda_codec_write(codec, pin_nid, 0, | |
2343 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_0, | |
2344 | pin_config & 0x000000ff); | |
2345 | snd_hda_codec_write(codec, pin_nid, 0, | |
2346 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_1, | |
2347 | (pin_config & 0x0000ff00) >> 8); | |
2348 | snd_hda_codec_write(codec, pin_nid, 0, | |
2349 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_2, | |
2350 | (pin_config & 0x00ff0000) >> 16); | |
2351 | snd_hda_codec_write(codec, pin_nid, 0, | |
2352 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, | |
2353 | pin_config >> 24); | |
2354 | i = snd_hda_codec_read(codec, pin_nid, 0, | |
2355 | AC_VERB_GET_CONFIG_DEFAULT, | |
2356 | 0x00); | |
2357 | snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n", | |
2358 | pin_nid, i); | |
2359 | } | |
2360 | ||
2f2f4251 M |
2361 | static void stac92xx_set_config_regs(struct hda_codec *codec) |
2362 | { | |
2363 | int i; | |
2364 | struct sigmatel_spec *spec = codec->spec; | |
2f2f4251 | 2365 | |
87d48363 MR |
2366 | if (!spec->pin_configs) |
2367 | return; | |
11b44bbd | 2368 | |
87d48363 | 2369 | for (i = 0; i < spec->num_pins; i++) |
616f89e7 HRK |
2370 | if (spec->pin_nids[i] && spec->pin_configs[i]) |
2371 | stac92xx_set_config_reg(codec, spec->pin_nids[i], | |
2372 | spec->pin_configs[i]); | |
2f2f4251 | 2373 | } |
2f2f4251 | 2374 | |
af9f341a TI |
2375 | static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins) |
2376 | { | |
2377 | struct sigmatel_spec *spec = codec->spec; | |
2378 | ||
2379 | if (!pins) | |
2380 | return stac92xx_save_bios_config_regs(codec); | |
2381 | ||
2382 | kfree(spec->pin_configs); | |
2383 | spec->pin_configs = kmemdup(pins, | |
2384 | spec->num_pins * sizeof(*pins), | |
2385 | GFP_KERNEL); | |
2386 | if (!spec->pin_configs) | |
2387 | return -ENOMEM; | |
2388 | ||
2389 | stac92xx_set_config_regs(codec); | |
2390 | return 0; | |
2391 | } | |
2392 | ||
2393 | static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid, | |
2394 | unsigned int cfg) | |
2395 | { | |
2396 | struct sigmatel_spec *spec = codec->spec; | |
2397 | int i; | |
2398 | ||
2399 | for (i = 0; i < spec->num_pins; i++) { | |
2400 | if (spec->pin_nids[i] == nid) { | |
2401 | spec->pin_configs[i] = cfg; | |
2402 | stac92xx_set_config_reg(codec, nid, cfg); | |
2403 | break; | |
2404 | } | |
2405 | } | |
2406 | } | |
2407 | ||
dabbed6f | 2408 | /* |
c7d4b2fa | 2409 | * Analog playback callbacks |
dabbed6f | 2410 | */ |
c7d4b2fa M |
2411 | static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo, |
2412 | struct hda_codec *codec, | |
c8b6bf9b | 2413 | struct snd_pcm_substream *substream) |
2f2f4251 | 2414 | { |
dabbed6f | 2415 | struct sigmatel_spec *spec = codec->spec; |
8daaaa97 MR |
2416 | if (spec->stream_delay) |
2417 | msleep(spec->stream_delay); | |
9a08160b TI |
2418 | return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream, |
2419 | hinfo); | |
2f2f4251 M |
2420 | } |
2421 | ||
2f2f4251 M |
2422 | static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
2423 | struct hda_codec *codec, | |
2424 | unsigned int stream_tag, | |
2425 | unsigned int format, | |
c8b6bf9b | 2426 | struct snd_pcm_substream *substream) |
2f2f4251 M |
2427 | { |
2428 | struct sigmatel_spec *spec = codec->spec; | |
403d1944 | 2429 | return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream); |
2f2f4251 M |
2430 | } |
2431 | ||
2432 | static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, | |
2433 | struct hda_codec *codec, | |
c8b6bf9b | 2434 | struct snd_pcm_substream *substream) |
2f2f4251 M |
2435 | { |
2436 | struct sigmatel_spec *spec = codec->spec; | |
2437 | return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout); | |
2438 | } | |
2439 | ||
dabbed6f M |
2440 | /* |
2441 | * Digital playback callbacks | |
2442 | */ | |
2443 | static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo, | |
2444 | struct hda_codec *codec, | |
c8b6bf9b | 2445 | struct snd_pcm_substream *substream) |
dabbed6f M |
2446 | { |
2447 | struct sigmatel_spec *spec = codec->spec; | |
2448 | return snd_hda_multi_out_dig_open(codec, &spec->multiout); | |
2449 | } | |
2450 | ||
2451 | static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo, | |
2452 | struct hda_codec *codec, | |
c8b6bf9b | 2453 | struct snd_pcm_substream *substream) |
dabbed6f M |
2454 | { |
2455 | struct sigmatel_spec *spec = codec->spec; | |
2456 | return snd_hda_multi_out_dig_close(codec, &spec->multiout); | |
2457 | } | |
2458 | ||
6b97eb45 TI |
2459 | static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
2460 | struct hda_codec *codec, | |
2461 | unsigned int stream_tag, | |
2462 | unsigned int format, | |
2463 | struct snd_pcm_substream *substream) | |
2464 | { | |
2465 | struct sigmatel_spec *spec = codec->spec; | |
2466 | return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, | |
2467 | stream_tag, format, substream); | |
2468 | } | |
2469 | ||
dabbed6f | 2470 | |
2f2f4251 M |
2471 | /* |
2472 | * Analog capture callbacks | |
2473 | */ | |
2474 | static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo, | |
2475 | struct hda_codec *codec, | |
2476 | unsigned int stream_tag, | |
2477 | unsigned int format, | |
c8b6bf9b | 2478 | struct snd_pcm_substream *substream) |
2f2f4251 M |
2479 | { |
2480 | struct sigmatel_spec *spec = codec->spec; | |
8daaaa97 | 2481 | hda_nid_t nid = spec->adc_nids[substream->number]; |
2f2f4251 | 2482 | |
8daaaa97 MR |
2483 | if (spec->powerdown_adcs) { |
2484 | msleep(40); | |
8c2f767b | 2485 | snd_hda_codec_write(codec, nid, 0, |
8daaaa97 MR |
2486 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); |
2487 | } | |
2488 | snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format); | |
2f2f4251 M |
2489 | return 0; |
2490 | } | |
2491 | ||
2492 | static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, | |
2493 | struct hda_codec *codec, | |
c8b6bf9b | 2494 | struct snd_pcm_substream *substream) |
2f2f4251 M |
2495 | { |
2496 | struct sigmatel_spec *spec = codec->spec; | |
8daaaa97 | 2497 | hda_nid_t nid = spec->adc_nids[substream->number]; |
2f2f4251 | 2498 | |
8daaaa97 MR |
2499 | snd_hda_codec_cleanup_stream(codec, nid); |
2500 | if (spec->powerdown_adcs) | |
8c2f767b | 2501 | snd_hda_codec_write(codec, nid, 0, |
8daaaa97 | 2502 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); |
2f2f4251 M |
2503 | return 0; |
2504 | } | |
2505 | ||
dabbed6f M |
2506 | static struct hda_pcm_stream stac92xx_pcm_digital_playback = { |
2507 | .substreams = 1, | |
2508 | .channels_min = 2, | |
2509 | .channels_max = 2, | |
2510 | /* NID is set in stac92xx_build_pcms */ | |
2511 | .ops = { | |
2512 | .open = stac92xx_dig_playback_pcm_open, | |
6b97eb45 TI |
2513 | .close = stac92xx_dig_playback_pcm_close, |
2514 | .prepare = stac92xx_dig_playback_pcm_prepare | |
dabbed6f M |
2515 | }, |
2516 | }; | |
2517 | ||
2518 | static struct hda_pcm_stream stac92xx_pcm_digital_capture = { | |
2519 | .substreams = 1, | |
2520 | .channels_min = 2, | |
2521 | .channels_max = 2, | |
2522 | /* NID is set in stac92xx_build_pcms */ | |
2523 | }; | |
2524 | ||
2f2f4251 M |
2525 | static struct hda_pcm_stream stac92xx_pcm_analog_playback = { |
2526 | .substreams = 1, | |
2527 | .channels_min = 2, | |
c7d4b2fa | 2528 | .channels_max = 8, |
2f2f4251 M |
2529 | .nid = 0x02, /* NID to query formats and rates */ |
2530 | .ops = { | |
2531 | .open = stac92xx_playback_pcm_open, | |
2532 | .prepare = stac92xx_playback_pcm_prepare, | |
2533 | .cleanup = stac92xx_playback_pcm_cleanup | |
2534 | }, | |
2535 | }; | |
2536 | ||
3cc08dc6 MP |
2537 | static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = { |
2538 | .substreams = 1, | |
2539 | .channels_min = 2, | |
2540 | .channels_max = 2, | |
2541 | .nid = 0x06, /* NID to query formats and rates */ | |
2542 | .ops = { | |
2543 | .open = stac92xx_playback_pcm_open, | |
2544 | .prepare = stac92xx_playback_pcm_prepare, | |
2545 | .cleanup = stac92xx_playback_pcm_cleanup | |
2546 | }, | |
2547 | }; | |
2548 | ||
2f2f4251 | 2549 | static struct hda_pcm_stream stac92xx_pcm_analog_capture = { |
2f2f4251 M |
2550 | .channels_min = 2, |
2551 | .channels_max = 2, | |
9e05b7a3 | 2552 | /* NID + .substreams is set in stac92xx_build_pcms */ |
2f2f4251 M |
2553 | .ops = { |
2554 | .prepare = stac92xx_capture_pcm_prepare, | |
2555 | .cleanup = stac92xx_capture_pcm_cleanup | |
2556 | }, | |
2557 | }; | |
2558 | ||
2559 | static int stac92xx_build_pcms(struct hda_codec *codec) | |
2560 | { | |
2561 | struct sigmatel_spec *spec = codec->spec; | |
2562 | struct hda_pcm *info = spec->pcm_rec; | |
2563 | ||
2564 | codec->num_pcms = 1; | |
2565 | codec->pcm_info = info; | |
2566 | ||
c7d4b2fa | 2567 | info->name = "STAC92xx Analog"; |
2f2f4251 | 2568 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback; |
00a602db TI |
2569 | info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = |
2570 | spec->multiout.dac_nids[0]; | |
2f2f4251 | 2571 | info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture; |
3cc08dc6 | 2572 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0]; |
9e05b7a3 | 2573 | info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs; |
3cc08dc6 MP |
2574 | |
2575 | if (spec->alt_switch) { | |
2576 | codec->num_pcms++; | |
2577 | info++; | |
2578 | info->name = "STAC92xx Analog Alt"; | |
2579 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback; | |
2580 | } | |
2f2f4251 | 2581 | |
dabbed6f M |
2582 | if (spec->multiout.dig_out_nid || spec->dig_in_nid) { |
2583 | codec->num_pcms++; | |
2584 | info++; | |
2585 | info->name = "STAC92xx Digital"; | |
8c441982 | 2586 | info->pcm_type = spec->autocfg.dig_out_type; |
dabbed6f M |
2587 | if (spec->multiout.dig_out_nid) { |
2588 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback; | |
2589 | info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid; | |
2590 | } | |
2591 | if (spec->dig_in_nid) { | |
2592 | info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture; | |
2593 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid; | |
2594 | } | |
2595 | } | |
2596 | ||
2f2f4251 M |
2597 | return 0; |
2598 | } | |
2599 | ||
c960a03b TI |
2600 | static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid) |
2601 | { | |
2602 | unsigned int pincap = snd_hda_param_read(codec, nid, | |
2603 | AC_PAR_PIN_CAP); | |
2604 | pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT; | |
2605 | if (pincap & AC_PINCAP_VREF_100) | |
2606 | return AC_PINCTL_VREF_100; | |
2607 | if (pincap & AC_PINCAP_VREF_80) | |
2608 | return AC_PINCTL_VREF_80; | |
2609 | if (pincap & AC_PINCAP_VREF_50) | |
2610 | return AC_PINCTL_VREF_50; | |
2611 | if (pincap & AC_PINCAP_VREF_GRD) | |
2612 | return AC_PINCTL_VREF_GRD; | |
2613 | return 0; | |
2614 | } | |
2615 | ||
403d1944 MP |
2616 | static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type) |
2617 | ||
2618 | { | |
82beb8fd TI |
2619 | snd_hda_codec_write_cache(codec, nid, 0, |
2620 | AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type); | |
403d1944 MP |
2621 | } |
2622 | ||
7c2ba97b MR |
2623 | #define stac92xx_hp_switch_info snd_ctl_boolean_mono_info |
2624 | ||
2625 | static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol, | |
2626 | struct snd_ctl_elem_value *ucontrol) | |
2627 | { | |
2628 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
2629 | struct sigmatel_spec *spec = codec->spec; | |
2630 | ||
d7a89436 | 2631 | ucontrol->value.integer.value[0] = !!spec->hp_switch; |
7c2ba97b MR |
2632 | return 0; |
2633 | } | |
2634 | ||
c6e4c666 TI |
2635 | static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid, |
2636 | unsigned char type); | |
2637 | ||
7c2ba97b MR |
2638 | static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol, |
2639 | struct snd_ctl_elem_value *ucontrol) | |
2640 | { | |
2641 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
2642 | struct sigmatel_spec *spec = codec->spec; | |
d7a89436 TI |
2643 | int nid = kcontrol->private_value; |
2644 | ||
2645 | spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0; | |
7c2ba97b MR |
2646 | |
2647 | /* check to be sure that the ports are upto date with | |
2648 | * switch changes | |
2649 | */ | |
c6e4c666 | 2650 | stac_issue_unsol_event(codec, nid, STAC_HP_EVENT); |
7c2ba97b MR |
2651 | |
2652 | return 1; | |
2653 | } | |
2654 | ||
a5ce8890 | 2655 | #define stac92xx_io_switch_info snd_ctl_boolean_mono_info |
403d1944 MP |
2656 | |
2657 | static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | |
2658 | { | |
2659 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
2660 | struct sigmatel_spec *spec = codec->spec; | |
2661 | int io_idx = kcontrol-> private_value & 0xff; | |
2662 | ||
2663 | ucontrol->value.integer.value[0] = spec->io_switch[io_idx]; | |
2664 | return 0; | |
2665 | } | |
2666 | ||
2667 | static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | |
2668 | { | |
2669 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
2670 | struct sigmatel_spec *spec = codec->spec; | |
2671 | hda_nid_t nid = kcontrol->private_value >> 8; | |
2672 | int io_idx = kcontrol-> private_value & 0xff; | |
68ea7b2f | 2673 | unsigned short val = !!ucontrol->value.integer.value[0]; |
403d1944 MP |
2674 | |
2675 | spec->io_switch[io_idx] = val; | |
2676 | ||
2677 | if (val) | |
2678 | stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN); | |
c960a03b TI |
2679 | else { |
2680 | unsigned int pinctl = AC_PINCTL_IN_EN; | |
2681 | if (io_idx) /* set VREF for mic */ | |
2682 | pinctl |= stac92xx_get_vref(codec, nid); | |
2683 | stac92xx_auto_set_pinctl(codec, nid, pinctl); | |
2684 | } | |
40c1d308 JZ |
2685 | |
2686 | /* check the auto-mute again: we need to mute/unmute the speaker | |
2687 | * appropriately according to the pin direction | |
2688 | */ | |
2689 | if (spec->hp_detect) | |
c6e4c666 | 2690 | stac_issue_unsol_event(codec, nid, STAC_HP_EVENT); |
40c1d308 | 2691 | |
403d1944 MP |
2692 | return 1; |
2693 | } | |
2694 | ||
0fb87bb4 ML |
2695 | #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info |
2696 | ||
2697 | static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol, | |
2698 | struct snd_ctl_elem_value *ucontrol) | |
2699 | { | |
2700 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
2701 | struct sigmatel_spec *spec = codec->spec; | |
2702 | ||
2703 | ucontrol->value.integer.value[0] = spec->clfe_swap; | |
2704 | return 0; | |
2705 | } | |
2706 | ||
2707 | static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol, | |
2708 | struct snd_ctl_elem_value *ucontrol) | |
2709 | { | |
2710 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
2711 | struct sigmatel_spec *spec = codec->spec; | |
2712 | hda_nid_t nid = kcontrol->private_value & 0xff; | |
68ea7b2f | 2713 | unsigned int val = !!ucontrol->value.integer.value[0]; |
0fb87bb4 | 2714 | |
68ea7b2f | 2715 | if (spec->clfe_swap == val) |
0fb87bb4 ML |
2716 | return 0; |
2717 | ||
68ea7b2f | 2718 | spec->clfe_swap = val; |
0fb87bb4 ML |
2719 | |
2720 | snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE, | |
2721 | spec->clfe_swap ? 0x4 : 0x0); | |
2722 | ||
2723 | return 1; | |
2724 | } | |
2725 | ||
7c2ba97b MR |
2726 | #define STAC_CODEC_HP_SWITCH(xname) \ |
2727 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
2728 | .name = xname, \ | |
2729 | .index = 0, \ | |
2730 | .info = stac92xx_hp_switch_info, \ | |
2731 | .get = stac92xx_hp_switch_get, \ | |
2732 | .put = stac92xx_hp_switch_put, \ | |
2733 | } | |
2734 | ||
403d1944 MP |
2735 | #define STAC_CODEC_IO_SWITCH(xname, xpval) \ |
2736 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
2737 | .name = xname, \ | |
2738 | .index = 0, \ | |
2739 | .info = stac92xx_io_switch_info, \ | |
2740 | .get = stac92xx_io_switch_get, \ | |
2741 | .put = stac92xx_io_switch_put, \ | |
2742 | .private_value = xpval, \ | |
2743 | } | |
2744 | ||
0fb87bb4 ML |
2745 | #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \ |
2746 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
2747 | .name = xname, \ | |
2748 | .index = 0, \ | |
2749 | .info = stac92xx_clfe_switch_info, \ | |
2750 | .get = stac92xx_clfe_switch_get, \ | |
2751 | .put = stac92xx_clfe_switch_put, \ | |
2752 | .private_value = xpval, \ | |
2753 | } | |
403d1944 | 2754 | |
c7d4b2fa M |
2755 | enum { |
2756 | STAC_CTL_WIDGET_VOL, | |
2757 | STAC_CTL_WIDGET_MUTE, | |
09a99959 | 2758 | STAC_CTL_WIDGET_MONO_MUX, |
89385035 MR |
2759 | STAC_CTL_WIDGET_AMP_MUX, |
2760 | STAC_CTL_WIDGET_AMP_VOL, | |
7c2ba97b | 2761 | STAC_CTL_WIDGET_HP_SWITCH, |
403d1944 | 2762 | STAC_CTL_WIDGET_IO_SWITCH, |
0fb87bb4 | 2763 | STAC_CTL_WIDGET_CLFE_SWITCH |
c7d4b2fa M |
2764 | }; |
2765 | ||
c8b6bf9b | 2766 | static struct snd_kcontrol_new stac92xx_control_templates[] = { |
c7d4b2fa M |
2767 | HDA_CODEC_VOLUME(NULL, 0, 0, 0), |
2768 | HDA_CODEC_MUTE(NULL, 0, 0, 0), | |
09a99959 | 2769 | STAC_MONO_MUX, |
89385035 MR |
2770 | STAC_AMP_MUX, |
2771 | STAC_AMP_VOL(NULL, 0, 0, 0, 0), | |
7c2ba97b | 2772 | STAC_CODEC_HP_SWITCH(NULL), |
403d1944 | 2773 | STAC_CODEC_IO_SWITCH(NULL, 0), |
0fb87bb4 | 2774 | STAC_CODEC_CLFE_SWITCH(NULL, 0), |
c7d4b2fa M |
2775 | }; |
2776 | ||
2777 | /* add dynamic controls */ | |
e3c75964 TI |
2778 | static struct snd_kcontrol_new * |
2779 | stac_control_new(struct sigmatel_spec *spec, | |
2780 | struct snd_kcontrol_new *ktemp, | |
2781 | const char *name) | |
c7d4b2fa | 2782 | { |
c8b6bf9b | 2783 | struct snd_kcontrol_new *knew; |
c7d4b2fa | 2784 | |
603c4019 TI |
2785 | snd_array_init(&spec->kctls, sizeof(*knew), 32); |
2786 | knew = snd_array_new(&spec->kctls); | |
2787 | if (!knew) | |
e3c75964 | 2788 | return NULL; |
4d4e9bb3 | 2789 | *knew = *ktemp; |
82fe0c58 | 2790 | knew->name = kstrdup(name, GFP_KERNEL); |
e3c75964 TI |
2791 | if (!knew->name) { |
2792 | /* roolback */ | |
2793 | memset(knew, 0, sizeof(*knew)); | |
2794 | spec->kctls.alloced--; | |
2795 | return NULL; | |
2796 | } | |
2797 | return knew; | |
2798 | } | |
2799 | ||
2800 | static int stac92xx_add_control_temp(struct sigmatel_spec *spec, | |
2801 | struct snd_kcontrol_new *ktemp, | |
2802 | int idx, const char *name, | |
2803 | unsigned long val) | |
2804 | { | |
2805 | struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name); | |
2806 | if (!knew) | |
c7d4b2fa | 2807 | return -ENOMEM; |
e3c75964 | 2808 | knew->index = idx; |
c7d4b2fa | 2809 | knew->private_value = val; |
c7d4b2fa M |
2810 | return 0; |
2811 | } | |
2812 | ||
4d4e9bb3 TI |
2813 | static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec, |
2814 | int type, int idx, const char *name, | |
2815 | unsigned long val) | |
2816 | { | |
2817 | return stac92xx_add_control_temp(spec, | |
2818 | &stac92xx_control_templates[type], | |
2819 | idx, name, val); | |
2820 | } | |
2821 | ||
4682eee0 MR |
2822 | |
2823 | /* add dynamic controls */ | |
4d4e9bb3 TI |
2824 | static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type, |
2825 | const char *name, unsigned long val) | |
4682eee0 MR |
2826 | { |
2827 | return stac92xx_add_control_idx(spec, type, 0, name, val); | |
2828 | } | |
2829 | ||
e3c75964 TI |
2830 | static struct snd_kcontrol_new stac_input_src_temp = { |
2831 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
2832 | .name = "Input Source", | |
2833 | .info = stac92xx_mux_enum_info, | |
2834 | .get = stac92xx_mux_enum_get, | |
2835 | .put = stac92xx_mux_enum_put, | |
2836 | }; | |
2837 | ||
2838 | static int stac92xx_add_input_source(struct sigmatel_spec *spec) | |
2839 | { | |
2840 | struct snd_kcontrol_new *knew; | |
2841 | struct hda_input_mux *imux = &spec->private_imux; | |
2842 | ||
2843 | if (!spec->num_adcs || imux->num_items <= 1) | |
2844 | return 0; /* no need for input source control */ | |
2845 | knew = stac_control_new(spec, &stac_input_src_temp, | |
2846 | stac_input_src_temp.name); | |
2847 | if (!knew) | |
2848 | return -ENOMEM; | |
2849 | knew->count = spec->num_adcs; | |
2850 | return 0; | |
2851 | } | |
2852 | ||
c21ca4a8 TI |
2853 | /* check whether the line-input can be used as line-out */ |
2854 | static hda_nid_t check_line_out_switch(struct hda_codec *codec) | |
403d1944 MP |
2855 | { |
2856 | struct sigmatel_spec *spec = codec->spec; | |
c21ca4a8 TI |
2857 | struct auto_pin_cfg *cfg = &spec->autocfg; |
2858 | hda_nid_t nid; | |
2859 | unsigned int pincap; | |
8e9068b1 | 2860 | |
c21ca4a8 TI |
2861 | if (cfg->line_out_type != AUTO_PIN_LINE_OUT) |
2862 | return 0; | |
2863 | nid = cfg->input_pins[AUTO_PIN_LINE]; | |
2864 | pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP); | |
2865 | if (pincap & AC_PINCAP_OUT) | |
2866 | return nid; | |
2867 | return 0; | |
2868 | } | |
403d1944 | 2869 | |
c21ca4a8 TI |
2870 | /* check whether the mic-input can be used as line-out */ |
2871 | static hda_nid_t check_mic_out_switch(struct hda_codec *codec) | |
2872 | { | |
2873 | struct sigmatel_spec *spec = codec->spec; | |
2874 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
2875 | unsigned int def_conf, pincap; | |
2876 | unsigned int mic_pin; | |
2877 | ||
2878 | if (cfg->line_out_type != AUTO_PIN_LINE_OUT) | |
2879 | return 0; | |
2880 | mic_pin = AUTO_PIN_MIC; | |
2881 | for (;;) { | |
2882 | hda_nid_t nid = cfg->input_pins[mic_pin]; | |
2883 | def_conf = snd_hda_codec_read(codec, nid, 0, | |
2884 | AC_VERB_GET_CONFIG_DEFAULT, 0); | |
2885 | /* some laptops have an internal analog microphone | |
2886 | * which can't be used as a output */ | |
2887 | if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) { | |
2888 | pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP); | |
2889 | if (pincap & AC_PINCAP_OUT) | |
2890 | return nid; | |
403d1944 | 2891 | } |
c21ca4a8 TI |
2892 | if (mic_pin == AUTO_PIN_MIC) |
2893 | mic_pin = AUTO_PIN_FRONT_MIC; | |
2894 | else | |
2895 | break; | |
403d1944 | 2896 | } |
403d1944 MP |
2897 | return 0; |
2898 | } | |
2899 | ||
7b043899 SL |
2900 | static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid) |
2901 | { | |
2902 | int i; | |
2903 | ||
2904 | for (i = 0; i < spec->multiout.num_dacs; i++) { | |
2905 | if (spec->multiout.dac_nids[i] == nid) | |
2906 | return 1; | |
2907 | } | |
2908 | ||
2909 | return 0; | |
2910 | } | |
2911 | ||
c21ca4a8 TI |
2912 | static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid) |
2913 | { | |
2914 | int i; | |
2915 | if (is_in_dac_nids(spec, nid)) | |
2916 | return 1; | |
2917 | for (i = 0; i < spec->autocfg.hp_outs; i++) | |
2918 | if (spec->hp_dacs[i] == nid) | |
2919 | return 1; | |
2920 | for (i = 0; i < spec->autocfg.speaker_outs; i++) | |
2921 | if (spec->speaker_dacs[i] == nid) | |
2922 | return 1; | |
2923 | return 0; | |
2924 | } | |
2925 | ||
2926 | static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid) | |
2927 | { | |
2928 | struct sigmatel_spec *spec = codec->spec; | |
2929 | int j, conn_len; | |
2930 | hda_nid_t conn[HDA_MAX_CONNECTIONS]; | |
2931 | unsigned int wcaps, wtype; | |
2932 | ||
2933 | conn_len = snd_hda_get_connections(codec, nid, conn, | |
2934 | HDA_MAX_CONNECTIONS); | |
2935 | for (j = 0; j < conn_len; j++) { | |
2936 | wcaps = snd_hda_param_read(codec, conn[j], | |
2937 | AC_PAR_AUDIO_WIDGET_CAP); | |
2938 | wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT; | |
2939 | /* we check only analog outputs */ | |
2940 | if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL)) | |
2941 | continue; | |
2942 | /* if this route has a free DAC, assign it */ | |
2943 | if (!check_all_dac_nids(spec, conn[j])) { | |
2944 | if (conn_len > 1) { | |
2945 | /* select this DAC in the pin's input mux */ | |
2946 | snd_hda_codec_write_cache(codec, nid, 0, | |
2947 | AC_VERB_SET_CONNECT_SEL, j); | |
2948 | } | |
2949 | return conn[j]; | |
2950 | } | |
2951 | } | |
2952 | return 0; | |
2953 | } | |
2954 | ||
2955 | static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid); | |
2956 | static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid); | |
2957 | ||
3cc08dc6 | 2958 | /* |
7b043899 SL |
2959 | * Fill in the dac_nids table from the parsed pin configuration |
2960 | * This function only works when every pin in line_out_pins[] | |
2961 | * contains atleast one DAC in its connection list. Some 92xx | |
2962 | * codecs are not connected directly to a DAC, such as the 9200 | |
2963 | * and 9202/925x. For those, dac_nids[] must be hard-coded. | |
3cc08dc6 | 2964 | */ |
c21ca4a8 | 2965 | static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec) |
c7d4b2fa M |
2966 | { |
2967 | struct sigmatel_spec *spec = codec->spec; | |
c21ca4a8 TI |
2968 | struct auto_pin_cfg *cfg = &spec->autocfg; |
2969 | int i; | |
2970 | hda_nid_t nid, dac; | |
7b043899 | 2971 | |
c7d4b2fa M |
2972 | for (i = 0; i < cfg->line_outs; i++) { |
2973 | nid = cfg->line_out_pins[i]; | |
c21ca4a8 TI |
2974 | dac = get_unassigned_dac(codec, nid); |
2975 | if (!dac) { | |
df802952 TI |
2976 | if (spec->multiout.num_dacs > 0) { |
2977 | /* we have already working output pins, | |
2978 | * so let's drop the broken ones again | |
2979 | */ | |
2980 | cfg->line_outs = spec->multiout.num_dacs; | |
2981 | break; | |
2982 | } | |
7b043899 SL |
2983 | /* error out, no available DAC found */ |
2984 | snd_printk(KERN_ERR | |
2985 | "%s: No available DAC for pin 0x%x\n", | |
2986 | __func__, nid); | |
2987 | return -ENODEV; | |
2988 | } | |
c21ca4a8 TI |
2989 | add_spec_dacs(spec, dac); |
2990 | } | |
7b043899 | 2991 | |
c21ca4a8 TI |
2992 | /* add line-in as output */ |
2993 | nid = check_line_out_switch(codec); | |
2994 | if (nid) { | |
2995 | dac = get_unassigned_dac(codec, nid); | |
2996 | if (dac) { | |
2997 | snd_printdd("STAC: Add line-in 0x%x as output %d\n", | |
2998 | nid, cfg->line_outs); | |
2999 | cfg->line_out_pins[cfg->line_outs] = nid; | |
3000 | cfg->line_outs++; | |
3001 | spec->line_switch = nid; | |
3002 | add_spec_dacs(spec, dac); | |
3003 | } | |
3004 | } | |
3005 | /* add mic as output */ | |
3006 | nid = check_mic_out_switch(codec); | |
3007 | if (nid) { | |
3008 | dac = get_unassigned_dac(codec, nid); | |
3009 | if (dac) { | |
3010 | snd_printdd("STAC: Add mic-in 0x%x as output %d\n", | |
3011 | nid, cfg->line_outs); | |
3012 | cfg->line_out_pins[cfg->line_outs] = nid; | |
3013 | cfg->line_outs++; | |
3014 | spec->mic_switch = nid; | |
3015 | add_spec_dacs(spec, dac); | |
3016 | } | |
3017 | } | |
c7d4b2fa | 3018 | |
c21ca4a8 TI |
3019 | for (i = 0; i < cfg->hp_outs; i++) { |
3020 | nid = cfg->hp_pins[i]; | |
3021 | dac = get_unassigned_dac(codec, nid); | |
3022 | if (dac) { | |
3023 | if (!spec->multiout.hp_nid) | |
3024 | spec->multiout.hp_nid = dac; | |
3025 | else | |
3026 | add_spec_extra_dacs(spec, dac); | |
7b043899 | 3027 | } |
c21ca4a8 TI |
3028 | spec->hp_dacs[i] = dac; |
3029 | } | |
3030 | ||
3031 | for (i = 0; i < cfg->speaker_outs; i++) { | |
3032 | nid = cfg->speaker_pins[i]; | |
3033 | dac = get_unassigned_dac(codec, nid); | |
3034 | if (dac) | |
3035 | add_spec_extra_dacs(spec, dac); | |
3036 | spec->speaker_dacs[i] = dac; | |
7b043899 | 3037 | } |
c7d4b2fa | 3038 | |
c21ca4a8 | 3039 | snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n", |
7b043899 SL |
3040 | spec->multiout.num_dacs, |
3041 | spec->multiout.dac_nids[0], | |
3042 | spec->multiout.dac_nids[1], | |
3043 | spec->multiout.dac_nids[2], | |
3044 | spec->multiout.dac_nids[3], | |
3045 | spec->multiout.dac_nids[4]); | |
c21ca4a8 | 3046 | |
c7d4b2fa M |
3047 | return 0; |
3048 | } | |
3049 | ||
eb06ed8f | 3050 | /* create volume control/switch for the given prefx type */ |
7c7767eb TI |
3051 | static int create_controls(struct hda_codec *codec, const char *pfx, |
3052 | hda_nid_t nid, int chs) | |
eb06ed8f | 3053 | { |
7c7767eb | 3054 | struct sigmatel_spec *spec = codec->spec; |
eb06ed8f TI |
3055 | char name[32]; |
3056 | int err; | |
3057 | ||
7c7767eb TI |
3058 | if (!spec->check_volume_offset) { |
3059 | unsigned int caps, step, nums, db_scale; | |
3060 | caps = query_amp_caps(codec, nid, HDA_OUTPUT); | |
3061 | step = (caps & AC_AMPCAP_STEP_SIZE) >> | |
3062 | AC_AMPCAP_STEP_SIZE_SHIFT; | |
3063 | step = (step + 1) * 25; /* in .01dB unit */ | |
3064 | nums = (caps & AC_AMPCAP_NUM_STEPS) >> | |
3065 | AC_AMPCAP_NUM_STEPS_SHIFT; | |
3066 | db_scale = nums * step; | |
3067 | /* if dB scale is over -64dB, and finer enough, | |
3068 | * let's reduce it to half | |
3069 | */ | |
3070 | if (db_scale > 6400 && nums >= 0x1f) | |
3071 | spec->volume_offset = nums / 2; | |
3072 | spec->check_volume_offset = 1; | |
3073 | } | |
3074 | ||
eb06ed8f TI |
3075 | sprintf(name, "%s Playback Volume", pfx); |
3076 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name, | |
7c7767eb TI |
3077 | HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT, |
3078 | spec->volume_offset)); | |
eb06ed8f TI |
3079 | if (err < 0) |
3080 | return err; | |
3081 | sprintf(name, "%s Playback Switch", pfx); | |
3082 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name, | |
3083 | HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT)); | |
3084 | if (err < 0) | |
3085 | return err; | |
3086 | return 0; | |
3087 | } | |
3088 | ||
ae0afd81 MR |
3089 | static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid) |
3090 | { | |
c21ca4a8 | 3091 | if (spec->multiout.num_dacs > 4) { |
ae0afd81 MR |
3092 | printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid); |
3093 | return 1; | |
3094 | } else { | |
3095 | spec->multiout.dac_nids[spec->multiout.num_dacs] = nid; | |
3096 | spec->multiout.num_dacs++; | |
3097 | } | |
3098 | return 0; | |
3099 | } | |
3100 | ||
c21ca4a8 | 3101 | static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid) |
ae0afd81 | 3102 | { |
c21ca4a8 TI |
3103 | int i; |
3104 | for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) { | |
3105 | if (!spec->multiout.extra_out_nid[i]) { | |
3106 | spec->multiout.extra_out_nid[i] = nid; | |
3107 | return 0; | |
3108 | } | |
3109 | } | |
3110 | printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid); | |
3111 | return 1; | |
ae0afd81 MR |
3112 | } |
3113 | ||
76624534 TI |
3114 | static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid) |
3115 | { | |
3116 | int i; | |
3117 | ||
3118 | if (spec->autocfg.line_outs != 1) | |
3119 | return 0; | |
3120 | if (spec->multiout.hp_nid == nid) | |
3121 | return 0; | |
3122 | for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) | |
3123 | if (spec->multiout.extra_out_nid[i] == nid) | |
3124 | return 0; | |
3125 | return 1; | |
3126 | } | |
3127 | ||
c7d4b2fa | 3128 | /* add playback controls from the parsed DAC table */ |
0fb87bb4 | 3129 | static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec, |
19039bd0 | 3130 | const struct auto_pin_cfg *cfg) |
c7d4b2fa | 3131 | { |
76624534 | 3132 | struct sigmatel_spec *spec = codec->spec; |
19039bd0 TI |
3133 | static const char *chname[4] = { |
3134 | "Front", "Surround", NULL /*CLFE*/, "Side" | |
3135 | }; | |
d21995e3 | 3136 | hda_nid_t nid = 0; |
91589232 TI |
3137 | int i, err; |
3138 | unsigned int wid_caps; | |
0fb87bb4 | 3139 | |
c21ca4a8 | 3140 | for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) { |
c7d4b2fa | 3141 | nid = spec->multiout.dac_nids[i]; |
c7d4b2fa M |
3142 | if (i == 2) { |
3143 | /* Center/LFE */ | |
7c7767eb | 3144 | err = create_controls(codec, "Center", nid, 1); |
eb06ed8f | 3145 | if (err < 0) |
c7d4b2fa | 3146 | return err; |
7c7767eb | 3147 | err = create_controls(codec, "LFE", nid, 2); |
eb06ed8f | 3148 | if (err < 0) |
c7d4b2fa | 3149 | return err; |
0fb87bb4 ML |
3150 | |
3151 | wid_caps = get_wcaps(codec, nid); | |
3152 | ||
3153 | if (wid_caps & AC_WCAP_LR_SWAP) { | |
3154 | err = stac92xx_add_control(spec, | |
3155 | STAC_CTL_WIDGET_CLFE_SWITCH, | |
3156 | "Swap Center/LFE Playback Switch", nid); | |
3157 | ||
3158 | if (err < 0) | |
3159 | return err; | |
3160 | } | |
3161 | ||
c7d4b2fa | 3162 | } else { |
76624534 TI |
3163 | const char *name = chname[i]; |
3164 | /* if it's a single DAC, assign a better name */ | |
3165 | if (!i && is_unique_dac(spec, nid)) { | |
3166 | switch (cfg->line_out_type) { | |
3167 | case AUTO_PIN_HP_OUT: | |
3168 | name = "Headphone"; | |
3169 | break; | |
3170 | case AUTO_PIN_SPEAKER_OUT: | |
3171 | name = "Speaker"; | |
3172 | break; | |
3173 | } | |
3174 | } | |
7c7767eb | 3175 | err = create_controls(codec, name, nid, 3); |
eb06ed8f | 3176 | if (err < 0) |
c7d4b2fa M |
3177 | return err; |
3178 | } | |
3179 | } | |
3180 | ||
a9cb5c90 | 3181 | if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) { |
7c2ba97b MR |
3182 | err = stac92xx_add_control(spec, |
3183 | STAC_CTL_WIDGET_HP_SWITCH, | |
d7a89436 TI |
3184 | "Headphone as Line Out Switch", |
3185 | cfg->hp_pins[cfg->hp_outs - 1]); | |
7c2ba97b MR |
3186 | if (err < 0) |
3187 | return err; | |
3188 | } | |
3189 | ||
b5895dc8 | 3190 | if (spec->line_switch) { |
c21ca4a8 TI |
3191 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, |
3192 | "Line In as Output Switch", | |
3193 | spec->line_switch << 8); | |
3194 | if (err < 0) | |
3195 | return err; | |
b5895dc8 | 3196 | } |
403d1944 | 3197 | |
b5895dc8 | 3198 | if (spec->mic_switch) { |
c21ca4a8 TI |
3199 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, |
3200 | "Mic as Output Switch", | |
3201 | (spec->mic_switch << 8) | 1); | |
3202 | if (err < 0) | |
3203 | return err; | |
b5895dc8 | 3204 | } |
403d1944 | 3205 | |
c7d4b2fa M |
3206 | return 0; |
3207 | } | |
3208 | ||
eb06ed8f TI |
3209 | /* add playback controls for Speaker and HP outputs */ |
3210 | static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec, | |
3211 | struct auto_pin_cfg *cfg) | |
3212 | { | |
3213 | struct sigmatel_spec *spec = codec->spec; | |
3214 | hda_nid_t nid; | |
c21ca4a8 | 3215 | int i, err, nums; |
eb06ed8f | 3216 | |
c21ca4a8 | 3217 | nums = 0; |
eb06ed8f | 3218 | for (i = 0; i < cfg->hp_outs; i++) { |
c21ca4a8 TI |
3219 | static const char *pfxs[] = { |
3220 | "Headphone", "Headphone2", "Headphone3", | |
3221 | }; | |
eb06ed8f TI |
3222 | unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]); |
3223 | if (wid_caps & AC_WCAP_UNSOL_CAP) | |
3224 | spec->hp_detect = 1; | |
c21ca4a8 | 3225 | if (nums >= ARRAY_SIZE(pfxs)) |
c7d4b2fa | 3226 | continue; |
c21ca4a8 TI |
3227 | nid = spec->hp_dacs[i]; |
3228 | if (!nid) | |
eb06ed8f | 3229 | continue; |
7c7767eb | 3230 | err = create_controls(codec, pfxs[nums++], nid, 3); |
c21ca4a8 TI |
3231 | if (err < 0) |
3232 | return err; | |
1b290a51 | 3233 | } |
c21ca4a8 TI |
3234 | nums = 0; |
3235 | for (i = 0; i < cfg->speaker_outs; i++) { | |
eb06ed8f TI |
3236 | static const char *pfxs[] = { |
3237 | "Speaker", "External Speaker", "Speaker2", | |
3238 | }; | |
c21ca4a8 TI |
3239 | if (nums >= ARRAY_SIZE(pfxs)) |
3240 | continue; | |
3241 | nid = spec->speaker_dacs[i]; | |
3242 | if (!nid) | |
3243 | continue; | |
7c7767eb | 3244 | err = create_controls(codec, pfxs[nums++], nid, 3); |
eb06ed8f TI |
3245 | if (err < 0) |
3246 | return err; | |
3247 | } | |
c7d4b2fa M |
3248 | return 0; |
3249 | } | |
3250 | ||
b22b4821 | 3251 | /* labels for mono mux outputs */ |
d0513fc6 MR |
3252 | static const char *stac92xx_mono_labels[4] = { |
3253 | "DAC0", "DAC1", "Mixer", "DAC2" | |
b22b4821 MR |
3254 | }; |
3255 | ||
3256 | /* create mono mux for mono out on capable codecs */ | |
3257 | static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec) | |
3258 | { | |
3259 | struct sigmatel_spec *spec = codec->spec; | |
3260 | struct hda_input_mux *mono_mux = &spec->private_mono_mux; | |
3261 | int i, num_cons; | |
3262 | hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)]; | |
3263 | ||
3264 | num_cons = snd_hda_get_connections(codec, | |
3265 | spec->mono_nid, | |
3266 | con_lst, | |
3267 | HDA_MAX_NUM_INPUTS); | |
3268 | if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels)) | |
3269 | return -EINVAL; | |
3270 | ||
3271 | for (i = 0; i < num_cons; i++) { | |
3272 | mono_mux->items[mono_mux->num_items].label = | |
3273 | stac92xx_mono_labels[i]; | |
3274 | mono_mux->items[mono_mux->num_items].index = i; | |
3275 | mono_mux->num_items++; | |
3276 | } | |
09a99959 MR |
3277 | |
3278 | return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX, | |
3279 | "Mono Mux", spec->mono_nid); | |
b22b4821 MR |
3280 | } |
3281 | ||
89385035 MR |
3282 | /* labels for amp mux outputs */ |
3283 | static const char *stac92xx_amp_labels[3] = { | |
4b33c767 | 3284 | "Front Microphone", "Microphone", "Line In", |
89385035 MR |
3285 | }; |
3286 | ||
3287 | /* create amp out controls mux on capable codecs */ | |
3288 | static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec) | |
3289 | { | |
3290 | struct sigmatel_spec *spec = codec->spec; | |
3291 | struct hda_input_mux *amp_mux = &spec->private_amp_mux; | |
3292 | int i, err; | |
3293 | ||
2a9c7816 | 3294 | for (i = 0; i < spec->num_amps; i++) { |
89385035 MR |
3295 | amp_mux->items[amp_mux->num_items].label = |
3296 | stac92xx_amp_labels[i]; | |
3297 | amp_mux->items[amp_mux->num_items].index = i; | |
3298 | amp_mux->num_items++; | |
3299 | } | |
3300 | ||
2a9c7816 MR |
3301 | if (spec->num_amps > 1) { |
3302 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX, | |
3303 | "Amp Selector Capture Switch", 0); | |
3304 | if (err < 0) | |
3305 | return err; | |
3306 | } | |
89385035 MR |
3307 | return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL, |
3308 | "Amp Capture Volume", | |
3309 | HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT)); | |
3310 | } | |
3311 | ||
3312 | ||
1cd2224c MR |
3313 | /* create PC beep volume controls */ |
3314 | static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec, | |
3315 | hda_nid_t nid) | |
3316 | { | |
3317 | struct sigmatel_spec *spec = codec->spec; | |
3318 | u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); | |
3319 | int err; | |
3320 | ||
3321 | /* check for mute support for the the amp */ | |
3322 | if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { | |
3323 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, | |
3324 | "PC Beep Playback Switch", | |
3325 | HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT)); | |
3326 | if (err < 0) | |
3327 | return err; | |
3328 | } | |
3329 | ||
3330 | /* check to see if there is volume support for the amp */ | |
3331 | if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { | |
3332 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, | |
3333 | "PC Beep Playback Volume", | |
3334 | HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT)); | |
3335 | if (err < 0) | |
3336 | return err; | |
3337 | } | |
3338 | return 0; | |
3339 | } | |
3340 | ||
4d4e9bb3 TI |
3341 | #ifdef CONFIG_SND_HDA_INPUT_BEEP |
3342 | #define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info | |
3343 | ||
3344 | static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol, | |
3345 | struct snd_ctl_elem_value *ucontrol) | |
3346 | { | |
3347 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
3348 | ucontrol->value.integer.value[0] = codec->beep->enabled; | |
3349 | return 0; | |
3350 | } | |
3351 | ||
3352 | static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol, | |
3353 | struct snd_ctl_elem_value *ucontrol) | |
3354 | { | |
3355 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
3356 | int enabled = !!ucontrol->value.integer.value[0]; | |
3357 | if (codec->beep->enabled != enabled) { | |
3358 | codec->beep->enabled = enabled; | |
3359 | return 1; | |
3360 | } | |
3361 | return 0; | |
3362 | } | |
3363 | ||
3364 | static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = { | |
3365 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
3366 | .info = stac92xx_dig_beep_switch_info, | |
3367 | .get = stac92xx_dig_beep_switch_get, | |
3368 | .put = stac92xx_dig_beep_switch_put, | |
3369 | }; | |
3370 | ||
3371 | static int stac92xx_beep_switch_ctl(struct hda_codec *codec) | |
3372 | { | |
3373 | return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl, | |
3374 | 0, "PC Beep Playback Switch", 0); | |
3375 | } | |
3376 | #endif | |
3377 | ||
4682eee0 MR |
3378 | static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec) |
3379 | { | |
3380 | struct sigmatel_spec *spec = codec->spec; | |
3381 | int wcaps, nid, i, err = 0; | |
3382 | ||
3383 | for (i = 0; i < spec->num_muxes; i++) { | |
3384 | nid = spec->mux_nids[i]; | |
3385 | wcaps = get_wcaps(codec, nid); | |
3386 | ||
3387 | if (wcaps & AC_WCAP_OUT_AMP) { | |
3388 | err = stac92xx_add_control_idx(spec, | |
3389 | STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume", | |
3390 | HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT)); | |
3391 | if (err < 0) | |
3392 | return err; | |
3393 | } | |
3394 | } | |
3395 | return 0; | |
3396 | }; | |
3397 | ||
d9737751 | 3398 | static const char *stac92xx_spdif_labels[3] = { |
65973632 | 3399 | "Digital Playback", "Analog Mux 1", "Analog Mux 2", |
d9737751 MR |
3400 | }; |
3401 | ||
3402 | static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec) | |
3403 | { | |
3404 | struct sigmatel_spec *spec = codec->spec; | |
3405 | struct hda_input_mux *spdif_mux = &spec->private_smux; | |
65973632 | 3406 | const char **labels = spec->spdif_labels; |
d9737751 | 3407 | int i, num_cons; |
65973632 | 3408 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; |
d9737751 MR |
3409 | |
3410 | num_cons = snd_hda_get_connections(codec, | |
3411 | spec->smux_nids[0], | |
3412 | con_lst, | |
3413 | HDA_MAX_NUM_INPUTS); | |
65973632 | 3414 | if (!num_cons) |
d9737751 MR |
3415 | return -EINVAL; |
3416 | ||
65973632 MR |
3417 | if (!labels) |
3418 | labels = stac92xx_spdif_labels; | |
3419 | ||
d9737751 | 3420 | for (i = 0; i < num_cons; i++) { |
65973632 | 3421 | spdif_mux->items[spdif_mux->num_items].label = labels[i]; |
d9737751 MR |
3422 | spdif_mux->items[spdif_mux->num_items].index = i; |
3423 | spdif_mux->num_items++; | |
3424 | } | |
3425 | ||
3426 | return 0; | |
3427 | } | |
3428 | ||
8b65727b | 3429 | /* labels for dmic mux inputs */ |
ddc2cec4 | 3430 | static const char *stac92xx_dmic_labels[5] = { |
8b65727b MP |
3431 | "Analog Inputs", "Digital Mic 1", "Digital Mic 2", |
3432 | "Digital Mic 3", "Digital Mic 4" | |
3433 | }; | |
3434 | ||
3435 | /* create playback/capture controls for input pins on dmic capable codecs */ | |
3436 | static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec, | |
3437 | const struct auto_pin_cfg *cfg) | |
3438 | { | |
3439 | struct sigmatel_spec *spec = codec->spec; | |
3440 | struct hda_input_mux *dimux = &spec->private_dimux; | |
3441 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; | |
0678accd MR |
3442 | int err, i, j; |
3443 | char name[32]; | |
8b65727b MP |
3444 | |
3445 | dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0]; | |
3446 | dimux->items[dimux->num_items].index = 0; | |
3447 | dimux->num_items++; | |
3448 | ||
3449 | for (i = 0; i < spec->num_dmics; i++) { | |
0678accd | 3450 | hda_nid_t nid; |
8b65727b MP |
3451 | int index; |
3452 | int num_cons; | |
0678accd | 3453 | unsigned int wcaps; |
8b65727b MP |
3454 | unsigned int def_conf; |
3455 | ||
3456 | def_conf = snd_hda_codec_read(codec, | |
3457 | spec->dmic_nids[i], | |
3458 | 0, | |
3459 | AC_VERB_GET_CONFIG_DEFAULT, | |
3460 | 0); | |
3461 | if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE) | |
3462 | continue; | |
3463 | ||
0678accd | 3464 | nid = spec->dmic_nids[i]; |
8b65727b | 3465 | num_cons = snd_hda_get_connections(codec, |
e1f0d669 | 3466 | spec->dmux_nids[0], |
8b65727b MP |
3467 | con_lst, |
3468 | HDA_MAX_NUM_INPUTS); | |
3469 | for (j = 0; j < num_cons; j++) | |
0678accd | 3470 | if (con_lst[j] == nid) { |
8b65727b MP |
3471 | index = j; |
3472 | goto found; | |
3473 | } | |
3474 | continue; | |
3475 | found: | |
d0513fc6 MR |
3476 | wcaps = get_wcaps(codec, nid) & |
3477 | (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP); | |
0678accd | 3478 | |
d0513fc6 | 3479 | if (wcaps) { |
0678accd MR |
3480 | sprintf(name, "%s Capture Volume", |
3481 | stac92xx_dmic_labels[dimux->num_items]); | |
3482 | ||
3483 | err = stac92xx_add_control(spec, | |
3484 | STAC_CTL_WIDGET_VOL, | |
3485 | name, | |
d0513fc6 MR |
3486 | HDA_COMPOSE_AMP_VAL(nid, 3, 0, |
3487 | (wcaps & AC_WCAP_OUT_AMP) ? | |
3488 | HDA_OUTPUT : HDA_INPUT)); | |
0678accd MR |
3489 | if (err < 0) |
3490 | return err; | |
3491 | } | |
3492 | ||
8b65727b MP |
3493 | dimux->items[dimux->num_items].label = |
3494 | stac92xx_dmic_labels[dimux->num_items]; | |
3495 | dimux->items[dimux->num_items].index = index; | |
3496 | dimux->num_items++; | |
3497 | } | |
3498 | ||
3499 | return 0; | |
3500 | } | |
3501 | ||
c7d4b2fa M |
3502 | /* create playback/capture controls for input pins */ |
3503 | static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) | |
3504 | { | |
3505 | struct sigmatel_spec *spec = codec->spec; | |
c7d4b2fa M |
3506 | struct hda_input_mux *imux = &spec->private_imux; |
3507 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; | |
3508 | int i, j, k; | |
3509 | ||
3510 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
314634bc TI |
3511 | int index; |
3512 | ||
3513 | if (!cfg->input_pins[i]) | |
3514 | continue; | |
3515 | index = -1; | |
3516 | for (j = 0; j < spec->num_muxes; j++) { | |
3517 | int num_cons; | |
3518 | num_cons = snd_hda_get_connections(codec, | |
3519 | spec->mux_nids[j], | |
3520 | con_lst, | |
3521 | HDA_MAX_NUM_INPUTS); | |
3522 | for (k = 0; k < num_cons; k++) | |
3523 | if (con_lst[k] == cfg->input_pins[i]) { | |
3524 | index = k; | |
3525 | goto found; | |
3526 | } | |
c7d4b2fa | 3527 | } |
314634bc TI |
3528 | continue; |
3529 | found: | |
3530 | imux->items[imux->num_items].label = auto_pin_cfg_labels[i]; | |
3531 | imux->items[imux->num_items].index = index; | |
3532 | imux->num_items++; | |
c7d4b2fa M |
3533 | } |
3534 | ||
7b043899 | 3535 | if (imux->num_items) { |
62fe78e9 SR |
3536 | /* |
3537 | * Set the current input for the muxes. | |
3538 | * The STAC9221 has two input muxes with identical source | |
3539 | * NID lists. Hopefully this won't get confused. | |
3540 | */ | |
3541 | for (i = 0; i < spec->num_muxes; i++) { | |
82beb8fd TI |
3542 | snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0, |
3543 | AC_VERB_SET_CONNECT_SEL, | |
3544 | imux->items[0].index); | |
62fe78e9 SR |
3545 | } |
3546 | } | |
3547 | ||
c7d4b2fa M |
3548 | return 0; |
3549 | } | |
3550 | ||
c7d4b2fa M |
3551 | static void stac92xx_auto_init_multi_out(struct hda_codec *codec) |
3552 | { | |
3553 | struct sigmatel_spec *spec = codec->spec; | |
3554 | int i; | |
3555 | ||
3556 | for (i = 0; i < spec->autocfg.line_outs; i++) { | |
3557 | hda_nid_t nid = spec->autocfg.line_out_pins[i]; | |
3558 | stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN); | |
3559 | } | |
3560 | } | |
3561 | ||
3562 | static void stac92xx_auto_init_hp_out(struct hda_codec *codec) | |
3563 | { | |
3564 | struct sigmatel_spec *spec = codec->spec; | |
eb06ed8f | 3565 | int i; |
c7d4b2fa | 3566 | |
eb06ed8f TI |
3567 | for (i = 0; i < spec->autocfg.hp_outs; i++) { |
3568 | hda_nid_t pin; | |
3569 | pin = spec->autocfg.hp_pins[i]; | |
3570 | if (pin) /* connect to front */ | |
3571 | stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN); | |
3572 | } | |
3573 | for (i = 0; i < spec->autocfg.speaker_outs; i++) { | |
3574 | hda_nid_t pin; | |
3575 | pin = spec->autocfg.speaker_pins[i]; | |
3576 | if (pin) /* connect to front */ | |
3577 | stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN); | |
3578 | } | |
c7d4b2fa M |
3579 | } |
3580 | ||
3cc08dc6 | 3581 | static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in) |
c7d4b2fa M |
3582 | { |
3583 | struct sigmatel_spec *spec = codec->spec; | |
3584 | int err; | |
3585 | ||
8b65727b MP |
3586 | if ((err = snd_hda_parse_pin_def_config(codec, |
3587 | &spec->autocfg, | |
3588 | spec->dmic_nids)) < 0) | |
c7d4b2fa | 3589 | return err; |
82bc955f | 3590 | if (! spec->autocfg.line_outs) |
869264c4 | 3591 | return 0; /* can't find valid pin config */ |
19039bd0 | 3592 | |
bcecd9bd JZ |
3593 | /* If we have no real line-out pin and multiple hp-outs, HPs should |
3594 | * be set up as multi-channel outputs. | |
3595 | */ | |
3596 | if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT && | |
3597 | spec->autocfg.hp_outs > 1) { | |
3598 | /* Copy hp_outs to line_outs, backup line_outs in | |
3599 | * speaker_outs so that the following routines can handle | |
3600 | * HP pins as primary outputs. | |
3601 | */ | |
c21ca4a8 | 3602 | snd_printdd("stac92xx: Enabling multi-HPs workaround\n"); |
bcecd9bd JZ |
3603 | memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins, |
3604 | sizeof(spec->autocfg.line_out_pins)); | |
3605 | spec->autocfg.speaker_outs = spec->autocfg.line_outs; | |
3606 | memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins, | |
3607 | sizeof(spec->autocfg.hp_pins)); | |
3608 | spec->autocfg.line_outs = spec->autocfg.hp_outs; | |
c21ca4a8 TI |
3609 | spec->autocfg.line_out_type = AUTO_PIN_HP_OUT; |
3610 | spec->autocfg.hp_outs = 0; | |
bcecd9bd | 3611 | } |
09a99959 | 3612 | if (spec->autocfg.mono_out_pin) { |
d0513fc6 MR |
3613 | int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) & |
3614 | (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP); | |
09a99959 MR |
3615 | u32 caps = query_amp_caps(codec, |
3616 | spec->autocfg.mono_out_pin, dir); | |
3617 | hda_nid_t conn_list[1]; | |
3618 | ||
3619 | /* get the mixer node and then the mono mux if it exists */ | |
3620 | if (snd_hda_get_connections(codec, | |
3621 | spec->autocfg.mono_out_pin, conn_list, 1) && | |
3622 | snd_hda_get_connections(codec, conn_list[0], | |
3623 | conn_list, 1)) { | |
3624 | ||
3625 | int wcaps = get_wcaps(codec, conn_list[0]); | |
3626 | int wid_type = (wcaps & AC_WCAP_TYPE) | |
3627 | >> AC_WCAP_TYPE_SHIFT; | |
3628 | /* LR swap check, some stac925x have a mux that | |
3629 | * changes the DACs output path instead of the | |
3630 | * mono-mux path. | |
3631 | */ | |
3632 | if (wid_type == AC_WID_AUD_SEL && | |
3633 | !(wcaps & AC_WCAP_LR_SWAP)) | |
3634 | spec->mono_nid = conn_list[0]; | |
3635 | } | |
d0513fc6 MR |
3636 | if (dir) { |
3637 | hda_nid_t nid = spec->autocfg.mono_out_pin; | |
3638 | ||
3639 | /* most mono outs have a least a mute/unmute switch */ | |
3640 | dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT; | |
3641 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, | |
3642 | "Mono Playback Switch", | |
3643 | HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir)); | |
09a99959 MR |
3644 | if (err < 0) |
3645 | return err; | |
d0513fc6 MR |
3646 | /* check for volume support for the amp */ |
3647 | if ((caps & AC_AMPCAP_NUM_STEPS) | |
3648 | >> AC_AMPCAP_NUM_STEPS_SHIFT) { | |
3649 | err = stac92xx_add_control(spec, | |
3650 | STAC_CTL_WIDGET_VOL, | |
3651 | "Mono Playback Volume", | |
3652 | HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir)); | |
3653 | if (err < 0) | |
3654 | return err; | |
3655 | } | |
09a99959 MR |
3656 | } |
3657 | ||
3658 | stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin, | |
3659 | AC_PINCTL_OUT_EN); | |
3660 | } | |
bcecd9bd | 3661 | |
c21ca4a8 TI |
3662 | if (!spec->multiout.num_dacs) { |
3663 | err = stac92xx_auto_fill_dac_nids(codec); | |
3664 | if (err < 0) | |
19039bd0 | 3665 | return err; |
c9280d68 TI |
3666 | err = stac92xx_auto_create_multi_out_ctls(codec, |
3667 | &spec->autocfg); | |
3668 | if (err < 0) | |
3669 | return err; | |
c21ca4a8 | 3670 | } |
c7d4b2fa | 3671 | |
1cd2224c MR |
3672 | /* setup analog beep controls */ |
3673 | if (spec->anabeep_nid > 0) { | |
3674 | err = stac92xx_auto_create_beep_ctls(codec, | |
3675 | spec->anabeep_nid); | |
3676 | if (err < 0) | |
3677 | return err; | |
3678 | } | |
3679 | ||
3680 | /* setup digital beep controls and input device */ | |
3681 | #ifdef CONFIG_SND_HDA_INPUT_BEEP | |
3682 | if (spec->digbeep_nid > 0) { | |
3683 | hda_nid_t nid = spec->digbeep_nid; | |
4d4e9bb3 | 3684 | unsigned int caps; |
1cd2224c MR |
3685 | |
3686 | err = stac92xx_auto_create_beep_ctls(codec, nid); | |
3687 | if (err < 0) | |
3688 | return err; | |
3689 | err = snd_hda_attach_beep_device(codec, nid); | |
3690 | if (err < 0) | |
3691 | return err; | |
4d4e9bb3 TI |
3692 | /* if no beep switch is available, make its own one */ |
3693 | caps = query_amp_caps(codec, nid, HDA_OUTPUT); | |
3694 | if (codec->beep && | |
3695 | !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) { | |
3696 | err = stac92xx_beep_switch_ctl(codec); | |
3697 | if (err < 0) | |
3698 | return err; | |
3699 | } | |
1cd2224c MR |
3700 | } |
3701 | #endif | |
3702 | ||
0fb87bb4 ML |
3703 | err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg); |
3704 | ||
3705 | if (err < 0) | |
3706 | return err; | |
3707 | ||
3708 | err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg); | |
3709 | ||
3710 | if (err < 0) | |
c7d4b2fa M |
3711 | return err; |
3712 | ||
b22b4821 MR |
3713 | if (spec->mono_nid > 0) { |
3714 | err = stac92xx_auto_create_mono_output_ctls(codec); | |
3715 | if (err < 0) | |
3716 | return err; | |
3717 | } | |
2a9c7816 | 3718 | if (spec->num_amps > 0) { |
89385035 MR |
3719 | err = stac92xx_auto_create_amp_output_ctls(codec); |
3720 | if (err < 0) | |
3721 | return err; | |
3722 | } | |
2a9c7816 | 3723 | if (spec->num_dmics > 0 && !spec->dinput_mux) |
8b65727b MP |
3724 | if ((err = stac92xx_auto_create_dmic_input_ctls(codec, |
3725 | &spec->autocfg)) < 0) | |
3726 | return err; | |
4682eee0 MR |
3727 | if (spec->num_muxes > 0) { |
3728 | err = stac92xx_auto_create_mux_input_ctls(codec); | |
3729 | if (err < 0) | |
3730 | return err; | |
3731 | } | |
d9737751 MR |
3732 | if (spec->num_smuxes > 0) { |
3733 | err = stac92xx_auto_create_spdif_mux_ctls(codec); | |
3734 | if (err < 0) | |
3735 | return err; | |
3736 | } | |
8b65727b | 3737 | |
e3c75964 TI |
3738 | err = stac92xx_add_input_source(spec); |
3739 | if (err < 0) | |
3740 | return err; | |
3741 | ||
c7d4b2fa | 3742 | spec->multiout.max_channels = spec->multiout.num_dacs * 2; |
403d1944 | 3743 | if (spec->multiout.max_channels > 2) |
c7d4b2fa | 3744 | spec->surr_switch = 1; |
c7d4b2fa | 3745 | |
82bc955f | 3746 | if (spec->autocfg.dig_out_pin) |
3cc08dc6 | 3747 | spec->multiout.dig_out_nid = dig_out; |
d0513fc6 | 3748 | if (dig_in && spec->autocfg.dig_in_pin) |
3cc08dc6 | 3749 | spec->dig_in_nid = dig_in; |
c7d4b2fa | 3750 | |
603c4019 TI |
3751 | if (spec->kctls.list) |
3752 | spec->mixers[spec->num_mixers++] = spec->kctls.list; | |
c7d4b2fa M |
3753 | |
3754 | spec->input_mux = &spec->private_imux; | |
f8ccbf65 MR |
3755 | if (!spec->dinput_mux) |
3756 | spec->dinput_mux = &spec->private_dimux; | |
d9737751 | 3757 | spec->sinput_mux = &spec->private_smux; |
b22b4821 | 3758 | spec->mono_mux = &spec->private_mono_mux; |
89385035 | 3759 | spec->amp_mux = &spec->private_amp_mux; |
c7d4b2fa M |
3760 | return 1; |
3761 | } | |
3762 | ||
82bc955f TI |
3763 | /* add playback controls for HP output */ |
3764 | static int stac9200_auto_create_hp_ctls(struct hda_codec *codec, | |
3765 | struct auto_pin_cfg *cfg) | |
3766 | { | |
3767 | struct sigmatel_spec *spec = codec->spec; | |
eb06ed8f | 3768 | hda_nid_t pin = cfg->hp_pins[0]; |
82bc955f TI |
3769 | unsigned int wid_caps; |
3770 | ||
3771 | if (! pin) | |
3772 | return 0; | |
3773 | ||
3774 | wid_caps = get_wcaps(codec, pin); | |
505cb341 | 3775 | if (wid_caps & AC_WCAP_UNSOL_CAP) |
82bc955f | 3776 | spec->hp_detect = 1; |
82bc955f TI |
3777 | |
3778 | return 0; | |
3779 | } | |
3780 | ||
160ea0dc RF |
3781 | /* add playback controls for LFE output */ |
3782 | static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec, | |
3783 | struct auto_pin_cfg *cfg) | |
3784 | { | |
3785 | struct sigmatel_spec *spec = codec->spec; | |
3786 | int err; | |
3787 | hda_nid_t lfe_pin = 0x0; | |
3788 | int i; | |
3789 | ||
3790 | /* | |
3791 | * search speaker outs and line outs for a mono speaker pin | |
3792 | * with an amp. If one is found, add LFE controls | |
3793 | * for it. | |
3794 | */ | |
3795 | for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) { | |
3796 | hda_nid_t pin = spec->autocfg.speaker_pins[i]; | |
64ed0dfd | 3797 | unsigned int wcaps = get_wcaps(codec, pin); |
160ea0dc RF |
3798 | wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP); |
3799 | if (wcaps == AC_WCAP_OUT_AMP) | |
3800 | /* found a mono speaker with an amp, must be lfe */ | |
3801 | lfe_pin = pin; | |
3802 | } | |
3803 | ||
3804 | /* if speaker_outs is 0, then speakers may be in line_outs */ | |
3805 | if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) { | |
3806 | for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) { | |
3807 | hda_nid_t pin = spec->autocfg.line_out_pins[i]; | |
64ed0dfd | 3808 | unsigned int defcfg; |
8b551785 | 3809 | defcfg = snd_hda_codec_read(codec, pin, 0, |
160ea0dc RF |
3810 | AC_VERB_GET_CONFIG_DEFAULT, |
3811 | 0x00); | |
8b551785 | 3812 | if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) { |
64ed0dfd | 3813 | unsigned int wcaps = get_wcaps(codec, pin); |
160ea0dc RF |
3814 | wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP); |
3815 | if (wcaps == AC_WCAP_OUT_AMP) | |
3816 | /* found a mono speaker with an amp, | |
3817 | must be lfe */ | |
3818 | lfe_pin = pin; | |
3819 | } | |
3820 | } | |
3821 | } | |
3822 | ||
3823 | if (lfe_pin) { | |
7c7767eb | 3824 | err = create_controls(codec, "LFE", lfe_pin, 1); |
160ea0dc RF |
3825 | if (err < 0) |
3826 | return err; | |
3827 | } | |
3828 | ||
3829 | return 0; | |
3830 | } | |
3831 | ||
c7d4b2fa M |
3832 | static int stac9200_parse_auto_config(struct hda_codec *codec) |
3833 | { | |
3834 | struct sigmatel_spec *spec = codec->spec; | |
3835 | int err; | |
3836 | ||
df694daa | 3837 | if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0) |
c7d4b2fa M |
3838 | return err; |
3839 | ||
3840 | if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0) | |
3841 | return err; | |
3842 | ||
82bc955f TI |
3843 | if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0) |
3844 | return err; | |
3845 | ||
160ea0dc RF |
3846 | if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0) |
3847 | return err; | |
3848 | ||
355a0ec4 TI |
3849 | if (spec->num_muxes > 0) { |
3850 | err = stac92xx_auto_create_mux_input_ctls(codec); | |
3851 | if (err < 0) | |
3852 | return err; | |
3853 | } | |
3854 | ||
e3c75964 TI |
3855 | err = stac92xx_add_input_source(spec); |
3856 | if (err < 0) | |
3857 | return err; | |
3858 | ||
82bc955f | 3859 | if (spec->autocfg.dig_out_pin) |
c7d4b2fa | 3860 | spec->multiout.dig_out_nid = 0x05; |
82bc955f | 3861 | if (spec->autocfg.dig_in_pin) |
c7d4b2fa | 3862 | spec->dig_in_nid = 0x04; |
c7d4b2fa | 3863 | |
603c4019 TI |
3864 | if (spec->kctls.list) |
3865 | spec->mixers[spec->num_mixers++] = spec->kctls.list; | |
c7d4b2fa M |
3866 | |
3867 | spec->input_mux = &spec->private_imux; | |
8b65727b | 3868 | spec->dinput_mux = &spec->private_dimux; |
c7d4b2fa M |
3869 | |
3870 | return 1; | |
3871 | } | |
3872 | ||
62fe78e9 SR |
3873 | /* |
3874 | * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a | |
3875 | * funky external mute control using GPIO pins. | |
3876 | */ | |
3877 | ||
76e1ddfb | 3878 | static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, |
4fe5195c | 3879 | unsigned int dir_mask, unsigned int data) |
62fe78e9 SR |
3880 | { |
3881 | unsigned int gpiostate, gpiomask, gpiodir; | |
3882 | ||
3883 | gpiostate = snd_hda_codec_read(codec, codec->afg, 0, | |
3884 | AC_VERB_GET_GPIO_DATA, 0); | |
4fe5195c | 3885 | gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); |
62fe78e9 SR |
3886 | |
3887 | gpiomask = snd_hda_codec_read(codec, codec->afg, 0, | |
3888 | AC_VERB_GET_GPIO_MASK, 0); | |
76e1ddfb | 3889 | gpiomask |= mask; |
62fe78e9 SR |
3890 | |
3891 | gpiodir = snd_hda_codec_read(codec, codec->afg, 0, | |
3892 | AC_VERB_GET_GPIO_DIRECTION, 0); | |
4fe5195c | 3893 | gpiodir |= dir_mask; |
62fe78e9 | 3894 | |
76e1ddfb | 3895 | /* Configure GPIOx as CMOS */ |
62fe78e9 SR |
3896 | snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); |
3897 | ||
3898 | snd_hda_codec_write(codec, codec->afg, 0, | |
3899 | AC_VERB_SET_GPIO_MASK, gpiomask); | |
76e1ddfb TI |
3900 | snd_hda_codec_read(codec, codec->afg, 0, |
3901 | AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ | |
62fe78e9 SR |
3902 | |
3903 | msleep(1); | |
3904 | ||
76e1ddfb TI |
3905 | snd_hda_codec_read(codec, codec->afg, 0, |
3906 | AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ | |
62fe78e9 SR |
3907 | } |
3908 | ||
74aeaabc MR |
3909 | static int stac92xx_add_jack(struct hda_codec *codec, |
3910 | hda_nid_t nid, int type) | |
3911 | { | |
e4973e1e | 3912 | #ifdef CONFIG_SND_JACK |
74aeaabc MR |
3913 | struct sigmatel_spec *spec = codec->spec; |
3914 | struct sigmatel_jack *jack; | |
3915 | int def_conf = snd_hda_codec_read(codec, nid, | |
3916 | 0, AC_VERB_GET_CONFIG_DEFAULT, 0); | |
3917 | int connectivity = get_defcfg_connect(def_conf); | |
3918 | char name[32]; | |
3919 | ||
3920 | if (connectivity && connectivity != AC_JACK_PORT_FIXED) | |
3921 | return 0; | |
3922 | ||
3923 | snd_array_init(&spec->jacks, sizeof(*jack), 32); | |
3924 | jack = snd_array_new(&spec->jacks); | |
3925 | if (!jack) | |
3926 | return -ENOMEM; | |
3927 | jack->nid = nid; | |
3928 | jack->type = type; | |
3929 | ||
3930 | sprintf(name, "%s at %s %s Jack", | |
3931 | snd_hda_get_jack_type(def_conf), | |
3932 | snd_hda_get_jack_connectivity(def_conf), | |
3933 | snd_hda_get_jack_location(def_conf)); | |
3934 | ||
3935 | return snd_jack_new(codec->bus->card, name, type, &jack->jack); | |
e4973e1e TI |
3936 | #else |
3937 | return 0; | |
3938 | #endif | |
74aeaabc MR |
3939 | } |
3940 | ||
c6e4c666 TI |
3941 | static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid, |
3942 | unsigned char type, int data) | |
74aeaabc MR |
3943 | { |
3944 | struct sigmatel_event *event; | |
3945 | ||
3946 | snd_array_init(&spec->events, sizeof(*event), 32); | |
3947 | event = snd_array_new(&spec->events); | |
3948 | if (!event) | |
3949 | return -ENOMEM; | |
3950 | event->nid = nid; | |
c6e4c666 TI |
3951 | event->type = type; |
3952 | event->tag = spec->events.used; | |
74aeaabc MR |
3953 | event->data = data; |
3954 | ||
c6e4c666 | 3955 | return event->tag; |
74aeaabc MR |
3956 | } |
3957 | ||
c6e4c666 TI |
3958 | static struct sigmatel_event *stac_get_event(struct hda_codec *codec, |
3959 | hda_nid_t nid, unsigned char type) | |
74aeaabc MR |
3960 | { |
3961 | struct sigmatel_spec *spec = codec->spec; | |
c6e4c666 TI |
3962 | struct sigmatel_event *event = spec->events.list; |
3963 | int i; | |
3964 | ||
3965 | for (i = 0; i < spec->events.used; i++, event++) { | |
3966 | if (event->nid == nid && event->type == type) | |
3967 | return event; | |
74aeaabc | 3968 | } |
c6e4c666 | 3969 | return NULL; |
74aeaabc MR |
3970 | } |
3971 | ||
c6e4c666 TI |
3972 | static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec, |
3973 | unsigned char tag) | |
314634bc | 3974 | { |
c6e4c666 TI |
3975 | struct sigmatel_spec *spec = codec->spec; |
3976 | struct sigmatel_event *event = spec->events.list; | |
3977 | int i; | |
3978 | ||
3979 | for (i = 0; i < spec->events.used; i++, event++) { | |
3980 | if (event->tag == tag) | |
3981 | return event; | |
74aeaabc | 3982 | } |
c6e4c666 TI |
3983 | return NULL; |
3984 | } | |
3985 | ||
3986 | static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid, | |
3987 | unsigned int type) | |
3988 | { | |
3989 | struct sigmatel_event *event; | |
3990 | int tag; | |
3991 | ||
3992 | if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)) | |
3993 | return; | |
3994 | event = stac_get_event(codec, nid, type); | |
3995 | if (event) | |
3996 | tag = event->tag; | |
3997 | else | |
3998 | tag = stac_add_event(codec->spec, nid, type, 0); | |
3999 | if (tag < 0) | |
4000 | return; | |
4001 | snd_hda_codec_write_cache(codec, nid, 0, | |
4002 | AC_VERB_SET_UNSOLICITED_ENABLE, | |
4003 | AC_USRSP_EN | tag); | |
314634bc TI |
4004 | } |
4005 | ||
a64135a2 MR |
4006 | static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid) |
4007 | { | |
4008 | int i; | |
4009 | for (i = 0; i < cfg->hp_outs; i++) | |
4010 | if (cfg->hp_pins[i] == nid) | |
4011 | return 1; /* nid is a HP-Out */ | |
4012 | ||
4013 | return 0; /* nid is not a HP-Out */ | |
4014 | }; | |
4015 | ||
b76c850f MR |
4016 | static void stac92xx_power_down(struct hda_codec *codec) |
4017 | { | |
4018 | struct sigmatel_spec *spec = codec->spec; | |
4019 | ||
4020 | /* power down inactive DACs */ | |
4021 | hda_nid_t *dac; | |
4022 | for (dac = spec->dac_list; *dac; dac++) | |
c21ca4a8 | 4023 | if (!check_all_dac_nids(spec, *dac)) |
8c2f767b | 4024 | snd_hda_codec_write(codec, *dac, 0, |
b76c850f MR |
4025 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); |
4026 | } | |
4027 | ||
f73d3585 TI |
4028 | static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, |
4029 | int enable); | |
4030 | ||
c7d4b2fa M |
4031 | static int stac92xx_init(struct hda_codec *codec) |
4032 | { | |
4033 | struct sigmatel_spec *spec = codec->spec; | |
82bc955f | 4034 | struct auto_pin_cfg *cfg = &spec->autocfg; |
f73d3585 | 4035 | unsigned int gpio; |
e4973e1e | 4036 | int i; |
c7d4b2fa | 4037 | |
c7d4b2fa M |
4038 | snd_hda_sequence_write(codec, spec->init); |
4039 | ||
8daaaa97 MR |
4040 | /* power down adcs initially */ |
4041 | if (spec->powerdown_adcs) | |
4042 | for (i = 0; i < spec->num_adcs; i++) | |
8c2f767b | 4043 | snd_hda_codec_write(codec, |
8daaaa97 MR |
4044 | spec->adc_nids[i], 0, |
4045 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | |
f73d3585 TI |
4046 | |
4047 | /* set up GPIO */ | |
4048 | gpio = spec->gpio_data; | |
4049 | /* turn on EAPD statically when spec->eapd_switch isn't set. | |
4050 | * otherwise, unsol event will turn it on/off dynamically | |
4051 | */ | |
4052 | if (!spec->eapd_switch) | |
4053 | gpio |= spec->eapd_mask; | |
4054 | stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio); | |
4055 | ||
82bc955f TI |
4056 | /* set up pins */ |
4057 | if (spec->hp_detect) { | |
505cb341 | 4058 | /* Enable unsolicited responses on the HP widget */ |
74aeaabc | 4059 | for (i = 0; i < cfg->hp_outs; i++) { |
74aeaabc | 4060 | hda_nid_t nid = cfg->hp_pins[i]; |
c6e4c666 | 4061 | enable_pin_detect(codec, nid, STAC_HP_EVENT); |
74aeaabc | 4062 | } |
0a07acaf TI |
4063 | /* force to enable the first line-out; the others are set up |
4064 | * in unsol_event | |
4065 | */ | |
4066 | stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0], | |
74aeaabc | 4067 | AC_PINCTL_OUT_EN); |
82bc955f | 4068 | /* fake event to set up pins */ |
c6e4c666 TI |
4069 | stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0], |
4070 | STAC_HP_EVENT); | |
82bc955f TI |
4071 | } else { |
4072 | stac92xx_auto_init_multi_out(codec); | |
4073 | stac92xx_auto_init_hp_out(codec); | |
12dde4c6 TI |
4074 | for (i = 0; i < cfg->hp_outs; i++) |
4075 | stac_toggle_power_map(codec, cfg->hp_pins[i], 1); | |
82bc955f TI |
4076 | } |
4077 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
c960a03b TI |
4078 | hda_nid_t nid = cfg->input_pins[i]; |
4079 | if (nid) { | |
12dde4c6 | 4080 | unsigned int pinctl, conf; |
4f1e6bc3 TI |
4081 | if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) { |
4082 | /* for mic pins, force to initialize */ | |
4083 | pinctl = stac92xx_get_vref(codec, nid); | |
12dde4c6 TI |
4084 | pinctl |= AC_PINCTL_IN_EN; |
4085 | stac92xx_auto_set_pinctl(codec, nid, pinctl); | |
4f1e6bc3 TI |
4086 | } else { |
4087 | pinctl = snd_hda_codec_read(codec, nid, 0, | |
4088 | AC_VERB_GET_PIN_WIDGET_CONTROL, 0); | |
4089 | /* if PINCTL already set then skip */ | |
12dde4c6 TI |
4090 | if (!(pinctl & AC_PINCTL_IN_EN)) { |
4091 | pinctl |= AC_PINCTL_IN_EN; | |
4092 | stac92xx_auto_set_pinctl(codec, nid, | |
4093 | pinctl); | |
4094 | } | |
4095 | } | |
4096 | conf = snd_hda_codec_read(codec, nid, 0, | |
4097 | AC_VERB_GET_CONFIG_DEFAULT, 0); | |
4098 | if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) { | |
4099 | enable_pin_detect(codec, nid, | |
4100 | STAC_INSERT_EVENT); | |
4101 | stac_issue_unsol_event(codec, nid, | |
4102 | STAC_INSERT_EVENT); | |
4f1e6bc3 | 4103 | } |
c960a03b | 4104 | } |
82bc955f | 4105 | } |
a64135a2 MR |
4106 | for (i = 0; i < spec->num_dmics; i++) |
4107 | stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i], | |
4108 | AC_PINCTL_IN_EN); | |
f73d3585 TI |
4109 | if (cfg->dig_out_pin) |
4110 | stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin, | |
4111 | AC_PINCTL_OUT_EN); | |
4112 | if (cfg->dig_in_pin) | |
4113 | stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin, | |
4114 | AC_PINCTL_IN_EN); | |
a64135a2 | 4115 | for (i = 0; i < spec->num_pwrs; i++) { |
f73d3585 TI |
4116 | hda_nid_t nid = spec->pwr_nids[i]; |
4117 | int pinctl, def_conf; | |
f73d3585 | 4118 | |
eb632128 TI |
4119 | /* power on when no jack detection is available */ |
4120 | if (!spec->hp_detect) { | |
4121 | stac_toggle_power_map(codec, nid, 1); | |
4122 | continue; | |
4123 | } | |
4124 | ||
4125 | if (is_nid_hp_pin(cfg, nid)) | |
f73d3585 TI |
4126 | continue; /* already has an unsol event */ |
4127 | ||
4128 | pinctl = snd_hda_codec_read(codec, nid, 0, | |
4129 | AC_VERB_GET_PIN_WIDGET_CONTROL, 0); | |
a64135a2 MR |
4130 | /* outputs are only ports capable of power management |
4131 | * any attempts on powering down a input port cause the | |
4132 | * referenced VREF to act quirky. | |
4133 | */ | |
eb632128 TI |
4134 | if (pinctl & AC_PINCTL_IN_EN) { |
4135 | stac_toggle_power_map(codec, nid, 1); | |
a64135a2 | 4136 | continue; |
eb632128 | 4137 | } |
f73d3585 TI |
4138 | def_conf = snd_hda_codec_read(codec, nid, 0, |
4139 | AC_VERB_GET_CONFIG_DEFAULT, 0); | |
4140 | def_conf = get_defcfg_connect(def_conf); | |
aafc4412 MR |
4141 | /* skip any ports that don't have jacks since presence |
4142 | * detection is useless */ | |
f73d3585 TI |
4143 | if (def_conf != AC_JACK_PORT_COMPLEX) { |
4144 | if (def_conf != AC_JACK_PORT_NONE) | |
4145 | stac_toggle_power_map(codec, nid, 1); | |
bce6c2b5 | 4146 | continue; |
f73d3585 | 4147 | } |
12dde4c6 TI |
4148 | if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) { |
4149 | enable_pin_detect(codec, nid, STAC_PWR_EVENT); | |
4150 | stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT); | |
4151 | } | |
a64135a2 | 4152 | } |
b76c850f MR |
4153 | if (spec->dac_list) |
4154 | stac92xx_power_down(codec); | |
c7d4b2fa M |
4155 | return 0; |
4156 | } | |
4157 | ||
74aeaabc MR |
4158 | static void stac92xx_free_jacks(struct hda_codec *codec) |
4159 | { | |
e4973e1e | 4160 | #ifdef CONFIG_SND_JACK |
b94d3539 | 4161 | /* free jack instances manually when clearing/reconfiguring */ |
74aeaabc | 4162 | struct sigmatel_spec *spec = codec->spec; |
b94d3539 | 4163 | if (!codec->bus->shutdown && spec->jacks.list) { |
74aeaabc MR |
4164 | struct sigmatel_jack *jacks = spec->jacks.list; |
4165 | int i; | |
4166 | for (i = 0; i < spec->jacks.used; i++) | |
4167 | snd_device_free(codec->bus->card, &jacks[i].jack); | |
4168 | } | |
4169 | snd_array_free(&spec->jacks); | |
e4973e1e | 4170 | #endif |
74aeaabc MR |
4171 | } |
4172 | ||
603c4019 TI |
4173 | static void stac92xx_free_kctls(struct hda_codec *codec) |
4174 | { | |
4175 | struct sigmatel_spec *spec = codec->spec; | |
4176 | ||
4177 | if (spec->kctls.list) { | |
4178 | struct snd_kcontrol_new *kctl = spec->kctls.list; | |
4179 | int i; | |
4180 | for (i = 0; i < spec->kctls.used; i++) | |
4181 | kfree(kctl[i].name); | |
4182 | } | |
4183 | snd_array_free(&spec->kctls); | |
4184 | } | |
4185 | ||
2f2f4251 M |
4186 | static void stac92xx_free(struct hda_codec *codec) |
4187 | { | |
c7d4b2fa | 4188 | struct sigmatel_spec *spec = codec->spec; |
c7d4b2fa M |
4189 | |
4190 | if (! spec) | |
4191 | return; | |
4192 | ||
af9f341a | 4193 | kfree(spec->pin_configs); |
74aeaabc MR |
4194 | stac92xx_free_jacks(codec); |
4195 | snd_array_free(&spec->events); | |
11b44bbd | 4196 | |
c7d4b2fa | 4197 | kfree(spec); |
1cd2224c | 4198 | snd_hda_detach_beep_device(codec); |
2f2f4251 M |
4199 | } |
4200 | ||
4e55096e M |
4201 | static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid, |
4202 | unsigned int flag) | |
4203 | { | |
8ce84198 TI |
4204 | unsigned int old_ctl, pin_ctl; |
4205 | ||
4206 | pin_ctl = snd_hda_codec_read(codec, nid, | |
4e55096e | 4207 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); |
7b043899 | 4208 | |
f9acba43 TI |
4209 | if (pin_ctl & AC_PINCTL_IN_EN) { |
4210 | /* | |
4211 | * we need to check the current set-up direction of | |
4212 | * shared input pins since they can be switched via | |
4213 | * "xxx as Output" mixer switch | |
4214 | */ | |
4215 | struct sigmatel_spec *spec = codec->spec; | |
c21ca4a8 | 4216 | if (nid == spec->line_switch || nid == spec->mic_switch) |
f9acba43 TI |
4217 | return; |
4218 | } | |
4219 | ||
8ce84198 | 4220 | old_ctl = pin_ctl; |
7b043899 SL |
4221 | /* if setting pin direction bits, clear the current |
4222 | direction bits first */ | |
4223 | if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN)) | |
4224 | pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN); | |
4225 | ||
8ce84198 TI |
4226 | pin_ctl |= flag; |
4227 | if (old_ctl != pin_ctl) | |
4228 | snd_hda_codec_write_cache(codec, nid, 0, | |
4229 | AC_VERB_SET_PIN_WIDGET_CONTROL, | |
4230 | pin_ctl); | |
4e55096e M |
4231 | } |
4232 | ||
4233 | static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid, | |
4234 | unsigned int flag) | |
4235 | { | |
4236 | unsigned int pin_ctl = snd_hda_codec_read(codec, nid, | |
4237 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); | |
8ce84198 TI |
4238 | if (pin_ctl & flag) |
4239 | snd_hda_codec_write_cache(codec, nid, 0, | |
4240 | AC_VERB_SET_PIN_WIDGET_CONTROL, | |
4241 | pin_ctl & ~flag); | |
4e55096e M |
4242 | } |
4243 | ||
e6e3ea25 | 4244 | static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid) |
314634bc TI |
4245 | { |
4246 | if (!nid) | |
4247 | return 0; | |
4248 | if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00) | |
e6e3ea25 TI |
4249 | & (1 << 31)) |
4250 | return 1; | |
314634bc TI |
4251 | return 0; |
4252 | } | |
4253 | ||
d7a89436 TI |
4254 | /* return non-zero if the hp-pin of the given array index isn't |
4255 | * a jack-detection target | |
4256 | */ | |
4257 | static int no_hp_sensing(struct sigmatel_spec *spec, int i) | |
4258 | { | |
4259 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
4260 | ||
4261 | /* ignore sensing of shared line and mic jacks */ | |
c21ca4a8 | 4262 | if (cfg->hp_pins[i] == spec->line_switch) |
d7a89436 | 4263 | return 1; |
c21ca4a8 | 4264 | if (cfg->hp_pins[i] == spec->mic_switch) |
d7a89436 TI |
4265 | return 1; |
4266 | /* ignore if the pin is set as line-out */ | |
4267 | if (cfg->hp_pins[i] == spec->hp_switch) | |
4268 | return 1; | |
4269 | return 0; | |
4270 | } | |
4271 | ||
c6e4c666 | 4272 | static void stac92xx_hp_detect(struct hda_codec *codec) |
4e55096e M |
4273 | { |
4274 | struct sigmatel_spec *spec = codec->spec; | |
4275 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
4276 | int i, presence; | |
4277 | ||
eb06ed8f | 4278 | presence = 0; |
4fe5195c MR |
4279 | if (spec->gpio_mute) |
4280 | presence = !(snd_hda_codec_read(codec, codec->afg, 0, | |
4281 | AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); | |
4282 | ||
eb06ed8f | 4283 | for (i = 0; i < cfg->hp_outs; i++) { |
314634bc TI |
4284 | if (presence) |
4285 | break; | |
d7a89436 TI |
4286 | if (no_hp_sensing(spec, i)) |
4287 | continue; | |
e6e3ea25 TI |
4288 | presence = get_pin_presence(codec, cfg->hp_pins[i]); |
4289 | if (presence) { | |
4290 | unsigned int pinctl; | |
4291 | pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0, | |
4292 | AC_VERB_GET_PIN_WIDGET_CONTROL, 0); | |
4293 | if (pinctl & AC_PINCTL_IN_EN) | |
4294 | presence = 0; /* mic- or line-input */ | |
4295 | } | |
eb06ed8f | 4296 | } |
4e55096e M |
4297 | |
4298 | if (presence) { | |
d7a89436 | 4299 | /* disable lineouts */ |
7c2ba97b | 4300 | if (spec->hp_switch) |
d7a89436 TI |
4301 | stac92xx_reset_pinctl(codec, spec->hp_switch, |
4302 | AC_PINCTL_OUT_EN); | |
4e55096e M |
4303 | for (i = 0; i < cfg->line_outs; i++) |
4304 | stac92xx_reset_pinctl(codec, cfg->line_out_pins[i], | |
4305 | AC_PINCTL_OUT_EN); | |
eb06ed8f TI |
4306 | for (i = 0; i < cfg->speaker_outs; i++) |
4307 | stac92xx_reset_pinctl(codec, cfg->speaker_pins[i], | |
4308 | AC_PINCTL_OUT_EN); | |
c0cea0d0 | 4309 | if (spec->eapd_mask && spec->eapd_switch) |
0fc9dec4 MR |
4310 | stac_gpio_set(codec, spec->gpio_mask, |
4311 | spec->gpio_dir, spec->gpio_data & | |
4312 | ~spec->eapd_mask); | |
4e55096e | 4313 | } else { |
d7a89436 | 4314 | /* enable lineouts */ |
7c2ba97b | 4315 | if (spec->hp_switch) |
d7a89436 TI |
4316 | stac92xx_set_pinctl(codec, spec->hp_switch, |
4317 | AC_PINCTL_OUT_EN); | |
4e55096e M |
4318 | for (i = 0; i < cfg->line_outs; i++) |
4319 | stac92xx_set_pinctl(codec, cfg->line_out_pins[i], | |
4320 | AC_PINCTL_OUT_EN); | |
eb06ed8f TI |
4321 | for (i = 0; i < cfg->speaker_outs; i++) |
4322 | stac92xx_set_pinctl(codec, cfg->speaker_pins[i], | |
4323 | AC_PINCTL_OUT_EN); | |
c0cea0d0 | 4324 | if (spec->eapd_mask && spec->eapd_switch) |
0fc9dec4 MR |
4325 | stac_gpio_set(codec, spec->gpio_mask, |
4326 | spec->gpio_dir, spec->gpio_data | | |
4327 | spec->eapd_mask); | |
4e55096e | 4328 | } |
d7a89436 TI |
4329 | /* toggle hp outs */ |
4330 | for (i = 0; i < cfg->hp_outs; i++) { | |
4331 | unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN; | |
4332 | if (no_hp_sensing(spec, i)) | |
4333 | continue; | |
4334 | if (presence) | |
4335 | stac92xx_set_pinctl(codec, cfg->hp_pins[i], val); | |
8317e0b0 TI |
4336 | #if 0 /* FIXME */ |
4337 | /* Resetting the pinctl like below may lead to (a sort of) regressions | |
4338 | * on some devices since they use the HP pin actually for line/speaker | |
4339 | * outs although the default pin config shows a different pin (that is | |
4340 | * wrong and useless). | |
4341 | * | |
4342 | * So, it's basically a problem of default pin configs, likely a BIOS issue. | |
4343 | * But, disabling the code below just works around it, and I'm too tired of | |
4344 | * bug reports with such devices... | |
4345 | */ | |
d7a89436 TI |
4346 | else |
4347 | stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val); | |
8317e0b0 | 4348 | #endif /* FIXME */ |
d7a89436 | 4349 | } |
4e55096e M |
4350 | } |
4351 | ||
f73d3585 TI |
4352 | static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, |
4353 | int enable) | |
a64135a2 MR |
4354 | { |
4355 | struct sigmatel_spec *spec = codec->spec; | |
f73d3585 TI |
4356 | unsigned int idx, val; |
4357 | ||
4358 | for (idx = 0; idx < spec->num_pwrs; idx++) { | |
4359 | if (spec->pwr_nids[idx] == nid) | |
4360 | break; | |
4361 | } | |
4362 | if (idx >= spec->num_pwrs) | |
4363 | return; | |
d0513fc6 MR |
4364 | |
4365 | /* several codecs have two power down bits */ | |
4366 | if (spec->pwr_mapping) | |
4367 | idx = spec->pwr_mapping[idx]; | |
4368 | else | |
4369 | idx = 1 << idx; | |
a64135a2 | 4370 | |
f73d3585 TI |
4371 | val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff; |
4372 | if (enable) | |
a64135a2 MR |
4373 | val &= ~idx; |
4374 | else | |
4375 | val |= idx; | |
4376 | ||
4377 | /* power down unused output ports */ | |
4378 | snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val); | |
74aeaabc MR |
4379 | } |
4380 | ||
f73d3585 TI |
4381 | static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid) |
4382 | { | |
e6e3ea25 | 4383 | stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid)); |
f73d3585 | 4384 | } |
a64135a2 | 4385 | |
74aeaabc MR |
4386 | static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid) |
4387 | { | |
4388 | struct sigmatel_spec *spec = codec->spec; | |
4389 | struct sigmatel_jack *jacks = spec->jacks.list; | |
4390 | ||
4391 | if (jacks) { | |
4392 | int i; | |
4393 | for (i = 0; i < spec->jacks.used; i++) { | |
4394 | if (jacks->nid == nid) { | |
4395 | unsigned int pin_ctl = | |
4396 | snd_hda_codec_read(codec, nid, | |
4397 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, | |
4398 | 0x00); | |
4399 | int type = jacks->type; | |
4400 | if (type == (SND_JACK_LINEOUT | |
4401 | | SND_JACK_HEADPHONE)) | |
4402 | type = (pin_ctl & AC_PINCTL_HP_EN) | |
4403 | ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT; | |
4404 | snd_jack_report(jacks->jack, | |
e6e3ea25 | 4405 | get_pin_presence(codec, nid) |
74aeaabc MR |
4406 | ? type : 0); |
4407 | } | |
4408 | jacks++; | |
4409 | } | |
4410 | } | |
4411 | } | |
a64135a2 | 4412 | |
c6e4c666 TI |
4413 | static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid, |
4414 | unsigned char type) | |
4415 | { | |
4416 | struct sigmatel_event *event = stac_get_event(codec, nid, type); | |
4417 | if (!event) | |
4418 | return; | |
4419 | codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26); | |
4420 | } | |
4421 | ||
314634bc TI |
4422 | static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res) |
4423 | { | |
a64135a2 | 4424 | struct sigmatel_spec *spec = codec->spec; |
c6e4c666 TI |
4425 | struct sigmatel_event *event; |
4426 | int tag, data; | |
a64135a2 | 4427 | |
c6e4c666 TI |
4428 | tag = (res >> 26) & 0x7f; |
4429 | event = stac_get_event_from_tag(codec, tag); | |
4430 | if (!event) | |
4431 | return; | |
4432 | ||
4433 | switch (event->type) { | |
314634bc | 4434 | case STAC_HP_EVENT: |
c6e4c666 | 4435 | stac92xx_hp_detect(codec); |
a64135a2 | 4436 | /* fallthru */ |
74aeaabc | 4437 | case STAC_INSERT_EVENT: |
a64135a2 | 4438 | case STAC_PWR_EVENT: |
c6e4c666 TI |
4439 | if (spec->num_pwrs > 0) |
4440 | stac92xx_pin_sense(codec, event->nid); | |
4441 | stac92xx_report_jack(codec, event->nid); | |
72474be6 | 4442 | break; |
c6e4c666 TI |
4443 | case STAC_VREF_EVENT: |
4444 | data = snd_hda_codec_read(codec, codec->afg, 0, | |
4445 | AC_VERB_GET_GPIO_DATA, 0); | |
72474be6 MR |
4446 | /* toggle VREF state based on GPIOx status */ |
4447 | snd_hda_codec_write(codec, codec->afg, 0, 0x7e0, | |
c6e4c666 | 4448 | !!(data & (1 << event->data))); |
72474be6 | 4449 | break; |
314634bc TI |
4450 | } |
4451 | } | |
4452 | ||
2d34e1b3 TI |
4453 | #ifdef CONFIG_PROC_FS |
4454 | static void stac92hd_proc_hook(struct snd_info_buffer *buffer, | |
4455 | struct hda_codec *codec, hda_nid_t nid) | |
4456 | { | |
4457 | if (nid == codec->afg) | |
4458 | snd_iprintf(buffer, "Power-Map: 0x%02x\n", | |
4459 | snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0)); | |
4460 | } | |
4461 | ||
4462 | static void analog_loop_proc_hook(struct snd_info_buffer *buffer, | |
4463 | struct hda_codec *codec, | |
4464 | unsigned int verb) | |
4465 | { | |
4466 | snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", | |
4467 | snd_hda_codec_read(codec, codec->afg, 0, verb, 0)); | |
4468 | } | |
4469 | ||
4470 | /* stac92hd71bxx, stac92hd73xx */ | |
4471 | static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, | |
4472 | struct hda_codec *codec, hda_nid_t nid) | |
4473 | { | |
4474 | stac92hd_proc_hook(buffer, codec, nid); | |
4475 | if (nid == codec->afg) | |
4476 | analog_loop_proc_hook(buffer, codec, 0xfa0); | |
4477 | } | |
4478 | ||
4479 | static void stac9205_proc_hook(struct snd_info_buffer *buffer, | |
4480 | struct hda_codec *codec, hda_nid_t nid) | |
4481 | { | |
4482 | if (nid == codec->afg) | |
4483 | analog_loop_proc_hook(buffer, codec, 0xfe0); | |
4484 | } | |
4485 | ||
4486 | static void stac927x_proc_hook(struct snd_info_buffer *buffer, | |
4487 | struct hda_codec *codec, hda_nid_t nid) | |
4488 | { | |
4489 | if (nid == codec->afg) | |
4490 | analog_loop_proc_hook(buffer, codec, 0xfeb); | |
4491 | } | |
4492 | #else | |
4493 | #define stac92hd_proc_hook NULL | |
4494 | #define stac92hd7x_proc_hook NULL | |
4495 | #define stac9205_proc_hook NULL | |
4496 | #define stac927x_proc_hook NULL | |
4497 | #endif | |
4498 | ||
cb53c626 | 4499 | #ifdef SND_HDA_NEEDS_RESUME |
ff6fdc37 M |
4500 | static int stac92xx_resume(struct hda_codec *codec) |
4501 | { | |
dc81bed1 TI |
4502 | struct sigmatel_spec *spec = codec->spec; |
4503 | ||
11b44bbd | 4504 | stac92xx_set_config_regs(codec); |
2c885878 | 4505 | stac92xx_init(codec); |
82beb8fd TI |
4506 | snd_hda_codec_resume_amp(codec); |
4507 | snd_hda_codec_resume_cache(codec); | |
2c885878 | 4508 | /* fake event to set up pins again to override cached values */ |
dc81bed1 | 4509 | if (spec->hp_detect) |
c6e4c666 TI |
4510 | stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0], |
4511 | STAC_HP_EVENT); | |
ff6fdc37 M |
4512 | return 0; |
4513 | } | |
c6798d2b MR |
4514 | |
4515 | static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state) | |
4516 | { | |
4517 | struct sigmatel_spec *spec = codec->spec; | |
4518 | if (spec->eapd_mask) | |
4519 | stac_gpio_set(codec, spec->gpio_mask, | |
4520 | spec->gpio_dir, spec->gpio_data & | |
4521 | ~spec->eapd_mask); | |
4522 | return 0; | |
4523 | } | |
ff6fdc37 M |
4524 | #endif |
4525 | ||
2f2f4251 M |
4526 | static struct hda_codec_ops stac92xx_patch_ops = { |
4527 | .build_controls = stac92xx_build_controls, | |
4528 | .build_pcms = stac92xx_build_pcms, | |
4529 | .init = stac92xx_init, | |
4530 | .free = stac92xx_free, | |
4e55096e | 4531 | .unsol_event = stac92xx_unsol_event, |
cb53c626 | 4532 | #ifdef SND_HDA_NEEDS_RESUME |
c6798d2b | 4533 | .suspend = stac92xx_suspend, |
ff6fdc37 M |
4534 | .resume = stac92xx_resume, |
4535 | #endif | |
2f2f4251 M |
4536 | }; |
4537 | ||
4538 | static int patch_stac9200(struct hda_codec *codec) | |
4539 | { | |
4540 | struct sigmatel_spec *spec; | |
c7d4b2fa | 4541 | int err; |
2f2f4251 | 4542 | |
e560d8d8 | 4543 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
2f2f4251 M |
4544 | if (spec == NULL) |
4545 | return -ENOMEM; | |
4546 | ||
4547 | codec->spec = spec; | |
a4eed138 | 4548 | spec->num_pins = ARRAY_SIZE(stac9200_pin_nids); |
11b44bbd | 4549 | spec->pin_nids = stac9200_pin_nids; |
f5fcc13c TI |
4550 | spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS, |
4551 | stac9200_models, | |
4552 | stac9200_cfg_tbl); | |
11b44bbd RF |
4553 | if (spec->board_config < 0) { |
4554 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n"); | |
4555 | err = stac92xx_save_bios_config_regs(codec); | |
af9f341a TI |
4556 | } else |
4557 | err = stac_save_pin_cfgs(codec, | |
4558 | stac9200_brd_tbl[spec->board_config]); | |
4559 | if (err < 0) { | |
4560 | stac92xx_free(codec); | |
4561 | return err; | |
403d1944 | 4562 | } |
2f2f4251 M |
4563 | |
4564 | spec->multiout.max_channels = 2; | |
4565 | spec->multiout.num_dacs = 1; | |
4566 | spec->multiout.dac_nids = stac9200_dac_nids; | |
4567 | spec->adc_nids = stac9200_adc_nids; | |
4568 | spec->mux_nids = stac9200_mux_nids; | |
dabbed6f | 4569 | spec->num_muxes = 1; |
8b65727b | 4570 | spec->num_dmics = 0; |
9e05b7a3 | 4571 | spec->num_adcs = 1; |
a64135a2 | 4572 | spec->num_pwrs = 0; |
c7d4b2fa | 4573 | |
58eec423 MCC |
4574 | if (spec->board_config == STAC_9200_M4 || |
4575 | spec->board_config == STAC_9200_M4_2 || | |
bf277785 | 4576 | spec->board_config == STAC_9200_OQO) |
1194b5b7 TI |
4577 | spec->init = stac9200_eapd_init; |
4578 | else | |
4579 | spec->init = stac9200_core_init; | |
2f2f4251 | 4580 | spec->mixer = stac9200_mixer; |
c7d4b2fa | 4581 | |
117f257d TI |
4582 | if (spec->board_config == STAC_9200_PANASONIC) { |
4583 | spec->gpio_mask = spec->gpio_dir = 0x09; | |
4584 | spec->gpio_data = 0x00; | |
4585 | } | |
4586 | ||
c7d4b2fa M |
4587 | err = stac9200_parse_auto_config(codec); |
4588 | if (err < 0) { | |
4589 | stac92xx_free(codec); | |
4590 | return err; | |
4591 | } | |
2f2f4251 | 4592 | |
2acc9dcb TI |
4593 | /* CF-74 has no headphone detection, and the driver should *NOT* |
4594 | * do detection and HP/speaker toggle because the hardware does it. | |
4595 | */ | |
4596 | if (spec->board_config == STAC_9200_PANASONIC) | |
4597 | spec->hp_detect = 0; | |
4598 | ||
2f2f4251 M |
4599 | codec->patch_ops = stac92xx_patch_ops; |
4600 | ||
4601 | return 0; | |
4602 | } | |
4603 | ||
8e21c34c TD |
4604 | static int patch_stac925x(struct hda_codec *codec) |
4605 | { | |
4606 | struct sigmatel_spec *spec; | |
4607 | int err; | |
4608 | ||
4609 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
4610 | if (spec == NULL) | |
4611 | return -ENOMEM; | |
4612 | ||
4613 | codec->spec = spec; | |
a4eed138 | 4614 | spec->num_pins = ARRAY_SIZE(stac925x_pin_nids); |
8e21c34c | 4615 | spec->pin_nids = stac925x_pin_nids; |
9cb36c2a MCC |
4616 | |
4617 | /* Check first for codec ID */ | |
4618 | spec->board_config = snd_hda_check_board_codec_sid_config(codec, | |
4619 | STAC_925x_MODELS, | |
4620 | stac925x_models, | |
4621 | stac925x_codec_id_cfg_tbl); | |
4622 | ||
4623 | /* Now checks for PCI ID, if codec ID is not found */ | |
4624 | if (spec->board_config < 0) | |
4625 | spec->board_config = snd_hda_check_board_config(codec, | |
4626 | STAC_925x_MODELS, | |
8e21c34c TD |
4627 | stac925x_models, |
4628 | stac925x_cfg_tbl); | |
9e507abd | 4629 | again: |
8e21c34c | 4630 | if (spec->board_config < 0) { |
9cb36c2a | 4631 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x," |
2c11f955 | 4632 | "using BIOS defaults\n"); |
8e21c34c | 4633 | err = stac92xx_save_bios_config_regs(codec); |
af9f341a TI |
4634 | } else |
4635 | err = stac_save_pin_cfgs(codec, | |
4636 | stac925x_brd_tbl[spec->board_config]); | |
4637 | if (err < 0) { | |
4638 | stac92xx_free(codec); | |
4639 | return err; | |
8e21c34c TD |
4640 | } |
4641 | ||
4642 | spec->multiout.max_channels = 2; | |
4643 | spec->multiout.num_dacs = 1; | |
4644 | spec->multiout.dac_nids = stac925x_dac_nids; | |
4645 | spec->adc_nids = stac925x_adc_nids; | |
4646 | spec->mux_nids = stac925x_mux_nids; | |
4647 | spec->num_muxes = 1; | |
9e05b7a3 | 4648 | spec->num_adcs = 1; |
a64135a2 | 4649 | spec->num_pwrs = 0; |
2c11f955 TD |
4650 | switch (codec->vendor_id) { |
4651 | case 0x83847632: /* STAC9202 */ | |
4652 | case 0x83847633: /* STAC9202D */ | |
4653 | case 0x83847636: /* STAC9251 */ | |
4654 | case 0x83847637: /* STAC9251D */ | |
f6e9852a | 4655 | spec->num_dmics = STAC925X_NUM_DMICS; |
2c11f955 | 4656 | spec->dmic_nids = stac925x_dmic_nids; |
1697055e TI |
4657 | spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids); |
4658 | spec->dmux_nids = stac925x_dmux_nids; | |
2c11f955 TD |
4659 | break; |
4660 | default: | |
4661 | spec->num_dmics = 0; | |
4662 | break; | |
4663 | } | |
8e21c34c TD |
4664 | |
4665 | spec->init = stac925x_core_init; | |
4666 | spec->mixer = stac925x_mixer; | |
4667 | ||
4668 | err = stac92xx_parse_auto_config(codec, 0x8, 0x7); | |
9e507abd TI |
4669 | if (!err) { |
4670 | if (spec->board_config < 0) { | |
4671 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
4672 | "available, default to model=ref\n"); | |
4673 | spec->board_config = STAC_925x_REF; | |
4674 | goto again; | |
4675 | } | |
4676 | err = -EINVAL; | |
4677 | } | |
8e21c34c TD |
4678 | if (err < 0) { |
4679 | stac92xx_free(codec); | |
4680 | return err; | |
4681 | } | |
4682 | ||
4683 | codec->patch_ops = stac92xx_patch_ops; | |
4684 | ||
4685 | return 0; | |
4686 | } | |
4687 | ||
e1f0d669 MR |
4688 | static struct hda_input_mux stac92hd73xx_dmux = { |
4689 | .num_items = 4, | |
4690 | .items = { | |
4691 | { "Analog Inputs", 0x0b }, | |
e1f0d669 MR |
4692 | { "Digital Mic 1", 0x09 }, |
4693 | { "Digital Mic 2", 0x0a }, | |
2a9c7816 | 4694 | { "CD", 0x08 }, |
e1f0d669 MR |
4695 | } |
4696 | }; | |
4697 | ||
4698 | static int patch_stac92hd73xx(struct hda_codec *codec) | |
4699 | { | |
4700 | struct sigmatel_spec *spec; | |
4701 | hda_nid_t conn[STAC92HD73_DAC_COUNT + 2]; | |
4702 | int err = 0; | |
c21ca4a8 | 4703 | int num_dacs; |
e1f0d669 MR |
4704 | |
4705 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
4706 | if (spec == NULL) | |
4707 | return -ENOMEM; | |
4708 | ||
4709 | codec->spec = spec; | |
e99d32b3 | 4710 | codec->slave_dig_outs = stac92hd73xx_slave_dig_outs; |
e1f0d669 MR |
4711 | spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids); |
4712 | spec->pin_nids = stac92hd73xx_pin_nids; | |
4713 | spec->board_config = snd_hda_check_board_config(codec, | |
4714 | STAC_92HD73XX_MODELS, | |
4715 | stac92hd73xx_models, | |
4716 | stac92hd73xx_cfg_tbl); | |
4717 | again: | |
4718 | if (spec->board_config < 0) { | |
4719 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
4720 | " STAC92HD73XX, using BIOS defaults\n"); | |
4721 | err = stac92xx_save_bios_config_regs(codec); | |
af9f341a TI |
4722 | } else |
4723 | err = stac_save_pin_cfgs(codec, | |
4724 | stac92hd73xx_brd_tbl[spec->board_config]); | |
4725 | if (err < 0) { | |
4726 | stac92xx_free(codec); | |
4727 | return err; | |
e1f0d669 MR |
4728 | } |
4729 | ||
c21ca4a8 | 4730 | num_dacs = snd_hda_get_connections(codec, 0x0a, |
e1f0d669 MR |
4731 | conn, STAC92HD73_DAC_COUNT + 2) - 1; |
4732 | ||
c21ca4a8 | 4733 | if (num_dacs < 3 || num_dacs > 5) { |
e1f0d669 MR |
4734 | printk(KERN_WARNING "hda_codec: Could not determine " |
4735 | "number of channels defaulting to DAC count\n"); | |
c21ca4a8 | 4736 | num_dacs = STAC92HD73_DAC_COUNT; |
e1f0d669 | 4737 | } |
c21ca4a8 | 4738 | switch (num_dacs) { |
e1f0d669 MR |
4739 | case 0x3: /* 6 Channel */ |
4740 | spec->mixer = stac92hd73xx_6ch_mixer; | |
4741 | spec->init = stac92hd73xx_6ch_core_init; | |
4742 | break; | |
4743 | case 0x4: /* 8 Channel */ | |
e1f0d669 MR |
4744 | spec->mixer = stac92hd73xx_8ch_mixer; |
4745 | spec->init = stac92hd73xx_8ch_core_init; | |
4746 | break; | |
4747 | case 0x5: /* 10 Channel */ | |
e1f0d669 MR |
4748 | spec->mixer = stac92hd73xx_10ch_mixer; |
4749 | spec->init = stac92hd73xx_10ch_core_init; | |
c21ca4a8 TI |
4750 | } |
4751 | spec->multiout.dac_nids = spec->dac_nids; | |
e1f0d669 | 4752 | |
e1f0d669 MR |
4753 | spec->aloopback_mask = 0x01; |
4754 | spec->aloopback_shift = 8; | |
4755 | ||
1cd2224c | 4756 | spec->digbeep_nid = 0x1c; |
e1f0d669 MR |
4757 | spec->mux_nids = stac92hd73xx_mux_nids; |
4758 | spec->adc_nids = stac92hd73xx_adc_nids; | |
4759 | spec->dmic_nids = stac92hd73xx_dmic_nids; | |
4760 | spec->dmux_nids = stac92hd73xx_dmux_nids; | |
d9737751 | 4761 | spec->smux_nids = stac92hd73xx_smux_nids; |
89385035 | 4762 | spec->amp_nids = stac92hd73xx_amp_nids; |
2a9c7816 | 4763 | spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids); |
e1f0d669 MR |
4764 | |
4765 | spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids); | |
4766 | spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids); | |
1697055e | 4767 | spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids); |
2a9c7816 MR |
4768 | memcpy(&spec->private_dimux, &stac92hd73xx_dmux, |
4769 | sizeof(stac92hd73xx_dmux)); | |
4770 | ||
a7662640 | 4771 | switch (spec->board_config) { |
6b3ab21e | 4772 | case STAC_DELL_EQ: |
d654a660 | 4773 | spec->init = dell_eq_core_init; |
6b3ab21e | 4774 | /* fallthru */ |
661cd8fb TI |
4775 | case STAC_DELL_M6_AMIC: |
4776 | case STAC_DELL_M6_DMIC: | |
4777 | case STAC_DELL_M6_BOTH: | |
2a9c7816 | 4778 | spec->num_smuxes = 0; |
2a9c7816 MR |
4779 | spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER]; |
4780 | spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP]; | |
c0cea0d0 | 4781 | spec->eapd_switch = 0; |
2a9c7816 | 4782 | spec->num_amps = 1; |
6b3ab21e | 4783 | |
c21ca4a8 | 4784 | if (spec->board_config != STAC_DELL_EQ) |
6b3ab21e | 4785 | spec->init = dell_m6_core_init; |
661cd8fb TI |
4786 | switch (spec->board_config) { |
4787 | case STAC_DELL_M6_AMIC: /* Analog Mics */ | |
a7662640 MR |
4788 | stac92xx_set_config_reg(codec, 0x0b, 0x90A70170); |
4789 | spec->num_dmics = 0; | |
2a9c7816 | 4790 | spec->private_dimux.num_items = 1; |
a7662640 | 4791 | break; |
661cd8fb | 4792 | case STAC_DELL_M6_DMIC: /* Digital Mics */ |
a7662640 MR |
4793 | stac92xx_set_config_reg(codec, 0x13, 0x90A60160); |
4794 | spec->num_dmics = 1; | |
2a9c7816 | 4795 | spec->private_dimux.num_items = 2; |
a7662640 | 4796 | break; |
661cd8fb | 4797 | case STAC_DELL_M6_BOTH: /* Both */ |
a7662640 MR |
4798 | stac92xx_set_config_reg(codec, 0x0b, 0x90A70170); |
4799 | stac92xx_set_config_reg(codec, 0x13, 0x90A60160); | |
4800 | spec->num_dmics = 1; | |
2a9c7816 | 4801 | spec->private_dimux.num_items = 2; |
a7662640 MR |
4802 | break; |
4803 | } | |
4804 | break; | |
4805 | default: | |
4806 | spec->num_dmics = STAC92HD73XX_NUM_DMICS; | |
2a9c7816 | 4807 | spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids); |
c0cea0d0 | 4808 | spec->eapd_switch = 1; |
a7662640 | 4809 | } |
b2c4f4d7 MR |
4810 | if (spec->board_config > STAC_92HD73XX_REF) { |
4811 | /* GPIO0 High = Enable EAPD */ | |
4812 | spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; | |
4813 | spec->gpio_data = 0x01; | |
4814 | } | |
2a9c7816 | 4815 | spec->dinput_mux = &spec->private_dimux; |
a7662640 | 4816 | |
a64135a2 MR |
4817 | spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); |
4818 | spec->pwr_nids = stac92hd73xx_pwr_nids; | |
4819 | ||
d9737751 | 4820 | err = stac92xx_parse_auto_config(codec, 0x25, 0x27); |
e1f0d669 MR |
4821 | |
4822 | if (!err) { | |
4823 | if (spec->board_config < 0) { | |
4824 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
4825 | "available, default to model=ref\n"); | |
4826 | spec->board_config = STAC_92HD73XX_REF; | |
4827 | goto again; | |
4828 | } | |
4829 | err = -EINVAL; | |
4830 | } | |
4831 | ||
4832 | if (err < 0) { | |
4833 | stac92xx_free(codec); | |
4834 | return err; | |
4835 | } | |
4836 | ||
9e43f0de TI |
4837 | if (spec->board_config == STAC_92HD73XX_NO_JD) |
4838 | spec->hp_detect = 0; | |
4839 | ||
e1f0d669 MR |
4840 | codec->patch_ops = stac92xx_patch_ops; |
4841 | ||
2d34e1b3 TI |
4842 | codec->proc_widget_hook = stac92hd7x_proc_hook; |
4843 | ||
e1f0d669 MR |
4844 | return 0; |
4845 | } | |
4846 | ||
d0513fc6 MR |
4847 | static struct hda_input_mux stac92hd83xxx_dmux = { |
4848 | .num_items = 3, | |
4849 | .items = { | |
4850 | { "Analog Inputs", 0x03 }, | |
4851 | { "Digital Mic 1", 0x04 }, | |
4852 | { "Digital Mic 2", 0x05 }, | |
4853 | } | |
4854 | }; | |
4855 | ||
4856 | static int patch_stac92hd83xxx(struct hda_codec *codec) | |
4857 | { | |
4858 | struct sigmatel_spec *spec; | |
65557f35 | 4859 | hda_nid_t conn[STAC92HD83_DAC_COUNT + 1]; |
d0513fc6 | 4860 | int err; |
65557f35 | 4861 | int num_dacs; |
d0513fc6 MR |
4862 | |
4863 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
4864 | if (spec == NULL) | |
4865 | return -ENOMEM; | |
4866 | ||
4867 | codec->spec = spec; | |
0ffa9807 | 4868 | codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs; |
d0513fc6 MR |
4869 | spec->mono_nid = 0x19; |
4870 | spec->digbeep_nid = 0x21; | |
4871 | spec->dmic_nids = stac92hd83xxx_dmic_nids; | |
4872 | spec->dmux_nids = stac92hd83xxx_dmux_nids; | |
4873 | spec->adc_nids = stac92hd83xxx_adc_nids; | |
4874 | spec->pwr_nids = stac92hd83xxx_pwr_nids; | |
c15c5060 | 4875 | spec->amp_nids = stac92hd83xxx_amp_nids; |
d0513fc6 MR |
4876 | spec->pwr_mapping = stac92hd83xxx_pwr_mapping; |
4877 | spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); | |
c21ca4a8 | 4878 | spec->multiout.dac_nids = spec->dac_nids; |
d0513fc6 | 4879 | |
65557f35 MR |
4880 | |
4881 | /* set port 0xe to select the last DAC | |
4882 | */ | |
4883 | num_dacs = snd_hda_get_connections(codec, 0x0e, | |
4884 | conn, STAC92HD83_DAC_COUNT + 1) - 1; | |
4885 | ||
4886 | snd_hda_codec_write_cache(codec, 0xe, 0, | |
4887 | AC_VERB_SET_CONNECT_SEL, num_dacs); | |
4888 | ||
d0513fc6 | 4889 | spec->init = stac92hd83xxx_core_init; |
d0513fc6 MR |
4890 | spec->mixer = stac92hd83xxx_mixer; |
4891 | spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids); | |
4892 | spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids); | |
4893 | spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids); | |
c15c5060 | 4894 | spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids); |
d0513fc6 MR |
4895 | spec->num_dmics = STAC92HD83XXX_NUM_DMICS; |
4896 | spec->dinput_mux = &stac92hd83xxx_dmux; | |
4897 | spec->pin_nids = stac92hd83xxx_pin_nids; | |
4898 | spec->board_config = snd_hda_check_board_config(codec, | |
4899 | STAC_92HD83XXX_MODELS, | |
4900 | stac92hd83xxx_models, | |
4901 | stac92hd83xxx_cfg_tbl); | |
4902 | again: | |
4903 | if (spec->board_config < 0) { | |
4904 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
4905 | " STAC92HD83XXX, using BIOS defaults\n"); | |
4906 | err = stac92xx_save_bios_config_regs(codec); | |
af9f341a TI |
4907 | } else |
4908 | err = stac_save_pin_cfgs(codec, | |
4909 | stac92hd83xxx_brd_tbl[spec->board_config]); | |
4910 | if (err < 0) { | |
4911 | stac92xx_free(codec); | |
4912 | return err; | |
d0513fc6 MR |
4913 | } |
4914 | ||
32ed3f46 MR |
4915 | switch (codec->vendor_id) { |
4916 | case 0x111d7604: | |
4917 | case 0x111d7605: | |
4918 | if (spec->board_config == STAC_92HD83XXX_PWR_REF) | |
4919 | break; | |
4920 | spec->num_pwrs = 0; | |
4921 | break; | |
4922 | } | |
4923 | ||
d0513fc6 MR |
4924 | err = stac92xx_parse_auto_config(codec, 0x1d, 0); |
4925 | if (!err) { | |
4926 | if (spec->board_config < 0) { | |
4927 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
4928 | "available, default to model=ref\n"); | |
4929 | spec->board_config = STAC_92HD83XXX_REF; | |
4930 | goto again; | |
4931 | } | |
4932 | err = -EINVAL; | |
4933 | } | |
4934 | ||
4935 | if (err < 0) { | |
4936 | stac92xx_free(codec); | |
4937 | return err; | |
4938 | } | |
4939 | ||
4940 | codec->patch_ops = stac92xx_patch_ops; | |
4941 | ||
2d34e1b3 TI |
4942 | codec->proc_widget_hook = stac92hd_proc_hook; |
4943 | ||
d0513fc6 MR |
4944 | return 0; |
4945 | } | |
4946 | ||
6df703ae HRK |
4947 | static struct hda_input_mux stac92hd71bxx_dmux_nomixer = { |
4948 | .num_items = 3, | |
4949 | .items = { | |
4950 | { "Analog Inputs", 0x00 }, | |
4951 | { "Digital Mic 1", 0x02 }, | |
4952 | { "Digital Mic 2", 0x03 }, | |
4953 | } | |
4954 | }; | |
4955 | ||
4956 | static struct hda_input_mux stac92hd71bxx_dmux_amixer = { | |
4b33c767 MR |
4957 | .num_items = 4, |
4958 | .items = { | |
4959 | { "Analog Inputs", 0x00 }, | |
4960 | { "Mixer", 0x01 }, | |
4961 | { "Digital Mic 1", 0x02 }, | |
4962 | { "Digital Mic 2", 0x03 }, | |
4963 | } | |
4964 | }; | |
4965 | ||
6df703ae HRK |
4966 | static int stac92hd71bxx_connected_ports(struct hda_codec *codec, |
4967 | hda_nid_t *nids, int num_nids) | |
4968 | { | |
4969 | struct sigmatel_spec *spec = codec->spec; | |
4970 | int idx, num; | |
4971 | unsigned int def_conf; | |
4972 | ||
4973 | for (num = 0; num < num_nids; num++) { | |
4974 | for (idx = 0; idx < spec->num_pins; idx++) | |
4975 | if (spec->pin_nids[idx] == nids[num]) | |
4976 | break; | |
4977 | if (idx >= spec->num_pins) | |
4978 | break; | |
4979 | def_conf = get_defcfg_connect(spec->pin_configs[idx]); | |
4980 | if (def_conf == AC_JACK_PORT_NONE) | |
4981 | break; | |
4982 | } | |
4983 | return num; | |
4984 | } | |
4985 | ||
4986 | static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec, | |
4987 | hda_nid_t dig0pin) | |
4988 | { | |
4989 | struct sigmatel_spec *spec = codec->spec; | |
4990 | int idx; | |
4991 | ||
4992 | for (idx = 0; idx < spec->num_pins; idx++) | |
4993 | if (spec->pin_nids[idx] == dig0pin) | |
4994 | break; | |
4995 | if ((idx + 2) >= spec->num_pins) | |
4996 | return 0; | |
4997 | ||
4998 | /* dig1pin case */ | |
4999 | if (get_defcfg_connect(spec->pin_configs[idx+1]) != AC_JACK_PORT_NONE) | |
5000 | return 2; | |
5001 | ||
5002 | /* dig0pin + dig2pin case */ | |
5003 | if (get_defcfg_connect(spec->pin_configs[idx+2]) != AC_JACK_PORT_NONE) | |
5004 | return 2; | |
5005 | if (get_defcfg_connect(spec->pin_configs[idx]) != AC_JACK_PORT_NONE) | |
5006 | return 1; | |
5007 | else | |
5008 | return 0; | |
5009 | } | |
5010 | ||
e035b841 MR |
5011 | static int patch_stac92hd71bxx(struct hda_codec *codec) |
5012 | { | |
5013 | struct sigmatel_spec *spec; | |
ca8d33fc | 5014 | struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; |
e035b841 | 5015 | int err = 0; |
6df703ae | 5016 | unsigned int ndmic_nids = 0; |
e035b841 MR |
5017 | |
5018 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
5019 | if (spec == NULL) | |
5020 | return -ENOMEM; | |
5021 | ||
5022 | codec->spec = spec; | |
8daaaa97 | 5023 | codec->patch_ops = stac92xx_patch_ops; |
616f89e7 HRK |
5024 | spec->num_pins = STAC92HD71BXX_NUM_PINS; |
5025 | switch (codec->vendor_id) { | |
5026 | case 0x111d76b6: | |
5027 | case 0x111d76b7: | |
5028 | spec->pin_nids = stac92hd71bxx_pin_nids_4port; | |
5029 | break; | |
5030 | case 0x111d7603: | |
5031 | case 0x111d7608: | |
5032 | /* On 92HD75Bx 0x27 isn't a pin nid */ | |
5033 | spec->num_pins--; | |
5034 | /* fallthrough */ | |
5035 | default: | |
5036 | spec->pin_nids = stac92hd71bxx_pin_nids_6port; | |
5037 | } | |
aafc4412 | 5038 | spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); |
e035b841 MR |
5039 | spec->board_config = snd_hda_check_board_config(codec, |
5040 | STAC_92HD71BXX_MODELS, | |
5041 | stac92hd71bxx_models, | |
5042 | stac92hd71bxx_cfg_tbl); | |
5043 | again: | |
5044 | if (spec->board_config < 0) { | |
5045 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
5046 | " STAC92HD71BXX, using BIOS defaults\n"); | |
5047 | err = stac92xx_save_bios_config_regs(codec); | |
af9f341a TI |
5048 | } else |
5049 | err = stac_save_pin_cfgs(codec, | |
5050 | stac92hd71bxx_brd_tbl[spec->board_config]); | |
5051 | if (err < 0) { | |
5052 | stac92xx_free(codec); | |
5053 | return err; | |
e035b841 MR |
5054 | } |
5055 | ||
41c3b648 TI |
5056 | if (spec->board_config > STAC_92HD71BXX_REF) { |
5057 | /* GPIO0 = EAPD */ | |
5058 | spec->gpio_mask = 0x01; | |
5059 | spec->gpio_dir = 0x01; | |
5060 | spec->gpio_data = 0x01; | |
5061 | } | |
5062 | ||
6df703ae HRK |
5063 | spec->dmic_nids = stac92hd71bxx_dmic_nids; |
5064 | spec->dmux_nids = stac92hd71bxx_dmux_nids; | |
5065 | ||
541eee87 MR |
5066 | switch (codec->vendor_id) { |
5067 | case 0x111d76b6: /* 4 Port without Analog Mixer */ | |
5068 | case 0x111d76b7: | |
5069 | case 0x111d76b4: /* 6 Port without Analog Mixer */ | |
5070 | case 0x111d76b5: | |
6df703ae HRK |
5071 | memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_nomixer, |
5072 | sizeof(stac92hd71bxx_dmux_nomixer)); | |
541eee87 MR |
5073 | spec->mixer = stac92hd71bxx_mixer; |
5074 | spec->init = stac92hd71bxx_core_init; | |
0ffa9807 | 5075 | codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs; |
6df703ae HRK |
5076 | spec->num_dmics = stac92hd71bxx_connected_ports(codec, |
5077 | stac92hd71bxx_dmic_nids, | |
5078 | STAC92HD71BXX_NUM_DMICS); | |
5079 | if (spec->num_dmics) { | |
5080 | spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids); | |
5081 | spec->dinput_mux = &spec->private_dimux; | |
5082 | ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1; | |
5083 | } | |
541eee87 | 5084 | break; |
aafc4412 | 5085 | case 0x111d7608: /* 5 Port with Analog Mixer */ |
6df703ae HRK |
5086 | memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer, |
5087 | sizeof(stac92hd71bxx_dmux_amixer)); | |
5088 | spec->private_dimux.num_items--; | |
8e5f262b TI |
5089 | switch (spec->board_config) { |
5090 | case STAC_HP_M4: | |
72474be6 | 5091 | /* Enable VREF power saving on GPIO1 detect */ |
c6e4c666 TI |
5092 | err = stac_add_event(spec, codec->afg, |
5093 | STAC_VREF_EVENT, 0x02); | |
5094 | if (err < 0) | |
5095 | return err; | |
c5d08bb5 | 5096 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
72474be6 MR |
5097 | AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); |
5098 | snd_hda_codec_write_cache(codec, codec->afg, 0, | |
74aeaabc | 5099 | AC_VERB_SET_UNSOLICITED_ENABLE, |
c6e4c666 | 5100 | AC_USRSP_EN | err); |
72474be6 MR |
5101 | spec->gpio_mask |= 0x02; |
5102 | break; | |
5103 | } | |
8daaaa97 | 5104 | if ((codec->revision_id & 0xf) == 0 || |
8c2f767b | 5105 | (codec->revision_id & 0xf) == 1) |
8daaaa97 | 5106 | spec->stream_delay = 40; /* 40 milliseconds */ |
8daaaa97 | 5107 | |
aafc4412 MR |
5108 | /* no output amps */ |
5109 | spec->num_pwrs = 0; | |
5110 | spec->mixer = stac92hd71bxx_analog_mixer; | |
4b33c767 | 5111 | spec->dinput_mux = &spec->private_dimux; |
aafc4412 MR |
5112 | |
5113 | /* disable VSW */ | |
5114 | spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF]; | |
ca8d33fc | 5115 | unmute_init++; |
616f89e7 HRK |
5116 | stac_change_pin_config(codec, 0x0f, 0x40f000f0); |
5117 | stac_change_pin_config(codec, 0x19, 0x40f000f3); | |
6df703ae HRK |
5118 | stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0; |
5119 | spec->num_dmics = stac92hd71bxx_connected_ports(codec, | |
5120 | stac92hd71bxx_dmic_nids, | |
5121 | STAC92HD71BXX_NUM_DMICS - 1); | |
5122 | spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids); | |
5123 | ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 2; | |
aafc4412 MR |
5124 | break; |
5125 | case 0x111d7603: /* 6 Port with Analog Mixer */ | |
8c2f767b | 5126 | if ((codec->revision_id & 0xf) == 1) |
8daaaa97 | 5127 | spec->stream_delay = 40; /* 40 milliseconds */ |
8daaaa97 | 5128 | |
aafc4412 MR |
5129 | /* no output amps */ |
5130 | spec->num_pwrs = 0; | |
5131 | /* fallthru */ | |
541eee87 | 5132 | default: |
6df703ae HRK |
5133 | memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer, |
5134 | sizeof(stac92hd71bxx_dmux_amixer)); | |
4b33c767 | 5135 | spec->dinput_mux = &spec->private_dimux; |
541eee87 MR |
5136 | spec->mixer = stac92hd71bxx_analog_mixer; |
5137 | spec->init = stac92hd71bxx_analog_core_init; | |
0ffa9807 | 5138 | codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs; |
6df703ae HRK |
5139 | spec->num_dmics = stac92hd71bxx_connected_ports(codec, |
5140 | stac92hd71bxx_dmic_nids, | |
5141 | STAC92HD71BXX_NUM_DMICS); | |
5142 | spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids); | |
5143 | ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1; | |
541eee87 MR |
5144 | } |
5145 | ||
ca8d33fc MR |
5146 | if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) |
5147 | snd_hda_sequence_write_cache(codec, unmute_init); | |
5148 | ||
4b33c767 | 5149 | spec->aloopback_mask = 0x50; |
541eee87 MR |
5150 | spec->aloopback_shift = 0; |
5151 | ||
8daaaa97 | 5152 | spec->powerdown_adcs = 1; |
1cd2224c | 5153 | spec->digbeep_nid = 0x26; |
e035b841 MR |
5154 | spec->mux_nids = stac92hd71bxx_mux_nids; |
5155 | spec->adc_nids = stac92hd71bxx_adc_nids; | |
d9737751 | 5156 | spec->smux_nids = stac92hd71bxx_smux_nids; |
aafc4412 | 5157 | spec->pwr_nids = stac92hd71bxx_pwr_nids; |
e035b841 MR |
5158 | |
5159 | spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids); | |
5160 | spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids); | |
6df703ae | 5161 | spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e); |
e035b841 | 5162 | |
6a14f585 MR |
5163 | switch (spec->board_config) { |
5164 | case STAC_HP_M4: | |
6a14f585 | 5165 | /* enable internal microphone */ |
af9f341a | 5166 | stac_change_pin_config(codec, 0x0e, 0x01813040); |
b9aea715 MR |
5167 | stac92xx_auto_set_pinctl(codec, 0x0e, |
5168 | AC_PINCTL_IN_EN | AC_PINCTL_VREF_80); | |
3a7abfd2 MR |
5169 | /* fallthru */ |
5170 | case STAC_DELL_M4_2: | |
5171 | spec->num_dmics = 0; | |
5172 | spec->num_smuxes = 0; | |
5173 | spec->num_dmuxes = 0; | |
5174 | break; | |
5175 | case STAC_DELL_M4_1: | |
5176 | case STAC_DELL_M4_3: | |
5177 | spec->num_dmics = 1; | |
5178 | spec->num_smuxes = 0; | |
5179 | spec->num_dmuxes = 0; | |
6a14f585 | 5180 | break; |
6a14f585 MR |
5181 | }; |
5182 | ||
c21ca4a8 | 5183 | spec->multiout.dac_nids = spec->dac_nids; |
4b33c767 | 5184 | if (spec->dinput_mux) |
6df703ae | 5185 | spec->private_dimux.num_items += spec->num_dmics - ndmic_nids; |
e035b841 | 5186 | |
29d4ab4d | 5187 | err = stac92xx_parse_auto_config(codec, 0x21, 0); |
e035b841 MR |
5188 | if (!err) { |
5189 | if (spec->board_config < 0) { | |
5190 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
5191 | "available, default to model=ref\n"); | |
5192 | spec->board_config = STAC_92HD71BXX_REF; | |
5193 | goto again; | |
5194 | } | |
5195 | err = -EINVAL; | |
5196 | } | |
5197 | ||
5198 | if (err < 0) { | |
5199 | stac92xx_free(codec); | |
5200 | return err; | |
5201 | } | |
5202 | ||
2d34e1b3 TI |
5203 | codec->proc_widget_hook = stac92hd7x_proc_hook; |
5204 | ||
e035b841 MR |
5205 | return 0; |
5206 | }; | |
5207 | ||
2f2f4251 M |
5208 | static int patch_stac922x(struct hda_codec *codec) |
5209 | { | |
5210 | struct sigmatel_spec *spec; | |
c7d4b2fa | 5211 | int err; |
2f2f4251 | 5212 | |
e560d8d8 | 5213 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
2f2f4251 M |
5214 | if (spec == NULL) |
5215 | return -ENOMEM; | |
5216 | ||
5217 | codec->spec = spec; | |
a4eed138 | 5218 | spec->num_pins = ARRAY_SIZE(stac922x_pin_nids); |
11b44bbd | 5219 | spec->pin_nids = stac922x_pin_nids; |
f5fcc13c TI |
5220 | spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS, |
5221 | stac922x_models, | |
5222 | stac922x_cfg_tbl); | |
536319af | 5223 | if (spec->board_config == STAC_INTEL_MAC_AUTO) { |
4fe5195c MR |
5224 | spec->gpio_mask = spec->gpio_dir = 0x03; |
5225 | spec->gpio_data = 0x03; | |
3fc24d85 TI |
5226 | /* Intel Macs have all same PCI SSID, so we need to check |
5227 | * codec SSID to distinguish the exact models | |
5228 | */ | |
6f0778d8 | 5229 | printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id); |
3fc24d85 | 5230 | switch (codec->subsystem_id) { |
5d5d3bc3 IZ |
5231 | |
5232 | case 0x106b0800: | |
5233 | spec->board_config = STAC_INTEL_MAC_V1; | |
c45e20eb | 5234 | break; |
5d5d3bc3 IZ |
5235 | case 0x106b0600: |
5236 | case 0x106b0700: | |
5237 | spec->board_config = STAC_INTEL_MAC_V2; | |
6f0778d8 | 5238 | break; |
5d5d3bc3 IZ |
5239 | case 0x106b0e00: |
5240 | case 0x106b0f00: | |
5241 | case 0x106b1600: | |
5242 | case 0x106b1700: | |
5243 | case 0x106b0200: | |
5244 | case 0x106b1e00: | |
5245 | spec->board_config = STAC_INTEL_MAC_V3; | |
3fc24d85 | 5246 | break; |
5d5d3bc3 IZ |
5247 | case 0x106b1a00: |
5248 | case 0x00000100: | |
5249 | spec->board_config = STAC_INTEL_MAC_V4; | |
f16928fb | 5250 | break; |
5d5d3bc3 IZ |
5251 | case 0x106b0a00: |
5252 | case 0x106b2200: | |
5253 | spec->board_config = STAC_INTEL_MAC_V5; | |
0dae0f83 | 5254 | break; |
536319af NB |
5255 | default: |
5256 | spec->board_config = STAC_INTEL_MAC_V3; | |
5257 | break; | |
3fc24d85 TI |
5258 | } |
5259 | } | |
5260 | ||
9e507abd | 5261 | again: |
11b44bbd RF |
5262 | if (spec->board_config < 0) { |
5263 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, " | |
5264 | "using BIOS defaults\n"); | |
5265 | err = stac92xx_save_bios_config_regs(codec); | |
af9f341a TI |
5266 | } else |
5267 | err = stac_save_pin_cfgs(codec, | |
5268 | stac922x_brd_tbl[spec->board_config]); | |
5269 | if (err < 0) { | |
5270 | stac92xx_free(codec); | |
5271 | return err; | |
403d1944 | 5272 | } |
2f2f4251 | 5273 | |
c7d4b2fa M |
5274 | spec->adc_nids = stac922x_adc_nids; |
5275 | spec->mux_nids = stac922x_mux_nids; | |
2549413e | 5276 | spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids); |
9e05b7a3 | 5277 | spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids); |
8b65727b | 5278 | spec->num_dmics = 0; |
a64135a2 | 5279 | spec->num_pwrs = 0; |
c7d4b2fa M |
5280 | |
5281 | spec->init = stac922x_core_init; | |
2f2f4251 | 5282 | spec->mixer = stac922x_mixer; |
c7d4b2fa M |
5283 | |
5284 | spec->multiout.dac_nids = spec->dac_nids; | |
19039bd0 | 5285 | |
3cc08dc6 | 5286 | err = stac92xx_parse_auto_config(codec, 0x08, 0x09); |
9e507abd TI |
5287 | if (!err) { |
5288 | if (spec->board_config < 0) { | |
5289 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
5290 | "available, default to model=ref\n"); | |
5291 | spec->board_config = STAC_D945_REF; | |
5292 | goto again; | |
5293 | } | |
5294 | err = -EINVAL; | |
5295 | } | |
3cc08dc6 MP |
5296 | if (err < 0) { |
5297 | stac92xx_free(codec); | |
5298 | return err; | |
5299 | } | |
5300 | ||
5301 | codec->patch_ops = stac92xx_patch_ops; | |
5302 | ||
807a4636 TI |
5303 | /* Fix Mux capture level; max to 2 */ |
5304 | snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, | |
5305 | (0 << AC_AMPCAP_OFFSET_SHIFT) | | |
5306 | (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | | |
5307 | (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | | |
5308 | (0 << AC_AMPCAP_MUTE_SHIFT)); | |
5309 | ||
3cc08dc6 MP |
5310 | return 0; |
5311 | } | |
5312 | ||
5313 | static int patch_stac927x(struct hda_codec *codec) | |
5314 | { | |
5315 | struct sigmatel_spec *spec; | |
5316 | int err; | |
5317 | ||
5318 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
5319 | if (spec == NULL) | |
5320 | return -ENOMEM; | |
5321 | ||
5322 | codec->spec = spec; | |
a4eed138 | 5323 | spec->num_pins = ARRAY_SIZE(stac927x_pin_nids); |
11b44bbd | 5324 | spec->pin_nids = stac927x_pin_nids; |
f5fcc13c TI |
5325 | spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS, |
5326 | stac927x_models, | |
5327 | stac927x_cfg_tbl); | |
9e507abd | 5328 | again: |
8e9068b1 MR |
5329 | if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) { |
5330 | if (spec->board_config < 0) | |
5331 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
5332 | "STAC927x, using BIOS defaults\n"); | |
11b44bbd | 5333 | err = stac92xx_save_bios_config_regs(codec); |
af9f341a TI |
5334 | } else |
5335 | err = stac_save_pin_cfgs(codec, | |
5336 | stac927x_brd_tbl[spec->board_config]); | |
5337 | if (err < 0) { | |
5338 | stac92xx_free(codec); | |
5339 | return err; | |
3cc08dc6 MP |
5340 | } |
5341 | ||
1cd2224c | 5342 | spec->digbeep_nid = 0x23; |
8e9068b1 MR |
5343 | spec->adc_nids = stac927x_adc_nids; |
5344 | spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids); | |
5345 | spec->mux_nids = stac927x_mux_nids; | |
5346 | spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); | |
d9737751 MR |
5347 | spec->smux_nids = stac927x_smux_nids; |
5348 | spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids); | |
65973632 | 5349 | spec->spdif_labels = stac927x_spdif_labels; |
b76c850f | 5350 | spec->dac_list = stac927x_dac_nids; |
8e9068b1 MR |
5351 | spec->multiout.dac_nids = spec->dac_nids; |
5352 | ||
81d3dbde | 5353 | switch (spec->board_config) { |
93ed1503 | 5354 | case STAC_D965_3ST: |
93ed1503 | 5355 | case STAC_D965_5ST: |
8e9068b1 | 5356 | /* GPIO0 High = Enable EAPD */ |
0fc9dec4 | 5357 | spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01; |
4fe5195c | 5358 | spec->gpio_data = 0x01; |
8e9068b1 MR |
5359 | spec->num_dmics = 0; |
5360 | ||
93ed1503 | 5361 | spec->init = d965_core_init; |
9e05b7a3 | 5362 | spec->mixer = stac927x_mixer; |
81d3dbde | 5363 | break; |
8e9068b1 | 5364 | case STAC_DELL_BIOS: |
780c8be4 MR |
5365 | switch (codec->subsystem_id) { |
5366 | case 0x10280209: | |
5367 | case 0x1028022e: | |
5368 | /* correct the device field to SPDIF out */ | |
af9f341a | 5369 | stac_change_pin_config(codec, 0x21, 0x01442070); |
780c8be4 MR |
5370 | break; |
5371 | }; | |
03d7ca17 | 5372 | /* configure the analog microphone on some laptops */ |
af9f341a | 5373 | stac_change_pin_config(codec, 0x0c, 0x90a79130); |
2f32d909 | 5374 | /* correct the front output jack as a hp out */ |
af9f341a | 5375 | stac_change_pin_config(codec, 0x0f, 0x0227011f); |
c481fca3 | 5376 | /* correct the front input jack as a mic */ |
af9f341a | 5377 | stac_change_pin_config(codec, 0x0e, 0x02a79130); |
c481fca3 | 5378 | /* fallthru */ |
8e9068b1 MR |
5379 | case STAC_DELL_3ST: |
5380 | /* GPIO2 High = Enable EAPD */ | |
0fc9dec4 | 5381 | spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04; |
4fe5195c | 5382 | spec->gpio_data = 0x04; |
7f16859a MR |
5383 | spec->dmic_nids = stac927x_dmic_nids; |
5384 | spec->num_dmics = STAC927X_NUM_DMICS; | |
f1f208d0 | 5385 | |
8e9068b1 MR |
5386 | spec->init = d965_core_init; |
5387 | spec->mixer = stac927x_mixer; | |
5388 | spec->dmux_nids = stac927x_dmux_nids; | |
1697055e | 5389 | spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids); |
7f16859a MR |
5390 | break; |
5391 | default: | |
b2c4f4d7 MR |
5392 | if (spec->board_config > STAC_D965_REF) { |
5393 | /* GPIO0 High = Enable EAPD */ | |
5394 | spec->eapd_mask = spec->gpio_mask = 0x01; | |
5395 | spec->gpio_dir = spec->gpio_data = 0x01; | |
5396 | } | |
8e9068b1 MR |
5397 | spec->num_dmics = 0; |
5398 | ||
5399 | spec->init = stac927x_core_init; | |
5400 | spec->mixer = stac927x_mixer; | |
7f16859a MR |
5401 | } |
5402 | ||
a64135a2 | 5403 | spec->num_pwrs = 0; |
e1f0d669 MR |
5404 | spec->aloopback_mask = 0x40; |
5405 | spec->aloopback_shift = 0; | |
c0cea0d0 | 5406 | spec->eapd_switch = 1; |
8e9068b1 | 5407 | |
3cc08dc6 | 5408 | err = stac92xx_parse_auto_config(codec, 0x1e, 0x20); |
9e507abd TI |
5409 | if (!err) { |
5410 | if (spec->board_config < 0) { | |
5411 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
5412 | "available, default to model=ref\n"); | |
5413 | spec->board_config = STAC_D965_REF; | |
5414 | goto again; | |
5415 | } | |
5416 | err = -EINVAL; | |
5417 | } | |
c7d4b2fa M |
5418 | if (err < 0) { |
5419 | stac92xx_free(codec); | |
5420 | return err; | |
5421 | } | |
2f2f4251 M |
5422 | |
5423 | codec->patch_ops = stac92xx_patch_ops; | |
5424 | ||
2d34e1b3 TI |
5425 | codec->proc_widget_hook = stac927x_proc_hook; |
5426 | ||
52987656 TI |
5427 | /* |
5428 | * !!FIXME!! | |
5429 | * The STAC927x seem to require fairly long delays for certain | |
5430 | * command sequences. With too short delays (even if the answer | |
5431 | * is set to RIRB properly), it results in the silence output | |
5432 | * on some hardwares like Dell. | |
5433 | * | |
5434 | * The below flag enables the longer delay (see get_response | |
5435 | * in hda_intel.c). | |
5436 | */ | |
5437 | codec->bus->needs_damn_long_delay = 1; | |
5438 | ||
e28d8322 TI |
5439 | /* no jack detecion for ref-no-jd model */ |
5440 | if (spec->board_config == STAC_D965_REF_NO_JD) | |
5441 | spec->hp_detect = 0; | |
5442 | ||
2f2f4251 M |
5443 | return 0; |
5444 | } | |
5445 | ||
f3302a59 MP |
5446 | static int patch_stac9205(struct hda_codec *codec) |
5447 | { | |
5448 | struct sigmatel_spec *spec; | |
8259980e | 5449 | int err; |
f3302a59 MP |
5450 | |
5451 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
5452 | if (spec == NULL) | |
5453 | return -ENOMEM; | |
5454 | ||
5455 | codec->spec = spec; | |
a4eed138 | 5456 | spec->num_pins = ARRAY_SIZE(stac9205_pin_nids); |
11b44bbd | 5457 | spec->pin_nids = stac9205_pin_nids; |
f5fcc13c TI |
5458 | spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS, |
5459 | stac9205_models, | |
5460 | stac9205_cfg_tbl); | |
9e507abd | 5461 | again: |
11b44bbd RF |
5462 | if (spec->board_config < 0) { |
5463 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n"); | |
5464 | err = stac92xx_save_bios_config_regs(codec); | |
af9f341a TI |
5465 | } else |
5466 | err = stac_save_pin_cfgs(codec, | |
5467 | stac9205_brd_tbl[spec->board_config]); | |
5468 | if (err < 0) { | |
5469 | stac92xx_free(codec); | |
5470 | return err; | |
f3302a59 MP |
5471 | } |
5472 | ||
1cd2224c | 5473 | spec->digbeep_nid = 0x23; |
f3302a59 | 5474 | spec->adc_nids = stac9205_adc_nids; |
9e05b7a3 | 5475 | spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids); |
f3302a59 | 5476 | spec->mux_nids = stac9205_mux_nids; |
2549413e | 5477 | spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids); |
d9737751 MR |
5478 | spec->smux_nids = stac9205_smux_nids; |
5479 | spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids); | |
8b65727b | 5480 | spec->dmic_nids = stac9205_dmic_nids; |
f6e9852a | 5481 | spec->num_dmics = STAC9205_NUM_DMICS; |
e1f0d669 | 5482 | spec->dmux_nids = stac9205_dmux_nids; |
1697055e | 5483 | spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids); |
a64135a2 | 5484 | spec->num_pwrs = 0; |
f3302a59 MP |
5485 | |
5486 | spec->init = stac9205_core_init; | |
5487 | spec->mixer = stac9205_mixer; | |
5488 | ||
e1f0d669 MR |
5489 | spec->aloopback_mask = 0x40; |
5490 | spec->aloopback_shift = 0; | |
d9a4268e TI |
5491 | /* Turn on/off EAPD per HP plugging */ |
5492 | if (spec->board_config != STAC_9205_EAPD) | |
5493 | spec->eapd_switch = 1; | |
f3302a59 | 5494 | spec->multiout.dac_nids = spec->dac_nids; |
87d48363 | 5495 | |
ae0a8ed8 | 5496 | switch (spec->board_config){ |
ae0a8ed8 | 5497 | case STAC_9205_DELL_M43: |
87d48363 | 5498 | /* Enable SPDIF in/out */ |
af9f341a TI |
5499 | stac_change_pin_config(codec, 0x1f, 0x01441030); |
5500 | stac_change_pin_config(codec, 0x20, 0x1c410030); | |
87d48363 | 5501 | |
4fe5195c | 5502 | /* Enable unsol response for GPIO4/Dock HP connection */ |
c6e4c666 TI |
5503 | err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01); |
5504 | if (err < 0) | |
5505 | return err; | |
c5d08bb5 | 5506 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
4fe5195c MR |
5507 | AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); |
5508 | snd_hda_codec_write_cache(codec, codec->afg, 0, | |
c6e4c666 TI |
5509 | AC_VERB_SET_UNSOLICITED_ENABLE, |
5510 | AC_USRSP_EN | err); | |
4fe5195c MR |
5511 | |
5512 | spec->gpio_dir = 0x0b; | |
0fc9dec4 | 5513 | spec->eapd_mask = 0x01; |
4fe5195c MR |
5514 | spec->gpio_mask = 0x1b; |
5515 | spec->gpio_mute = 0x10; | |
e2e7d624 | 5516 | /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, |
4fe5195c | 5517 | * GPIO3 Low = DRM |
87d48363 | 5518 | */ |
4fe5195c | 5519 | spec->gpio_data = 0x01; |
ae0a8ed8 | 5520 | break; |
b2c4f4d7 MR |
5521 | case STAC_9205_REF: |
5522 | /* SPDIF-In enabled */ | |
5523 | break; | |
ae0a8ed8 TD |
5524 | default: |
5525 | /* GPIO0 High = EAPD */ | |
0fc9dec4 | 5526 | spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; |
4fe5195c | 5527 | spec->gpio_data = 0x01; |
ae0a8ed8 TD |
5528 | break; |
5529 | } | |
33382403 | 5530 | |
f3302a59 | 5531 | err = stac92xx_parse_auto_config(codec, 0x1f, 0x20); |
9e507abd TI |
5532 | if (!err) { |
5533 | if (spec->board_config < 0) { | |
5534 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
5535 | "available, default to model=ref\n"); | |
5536 | spec->board_config = STAC_9205_REF; | |
5537 | goto again; | |
5538 | } | |
5539 | err = -EINVAL; | |
5540 | } | |
f3302a59 MP |
5541 | if (err < 0) { |
5542 | stac92xx_free(codec); | |
5543 | return err; | |
5544 | } | |
5545 | ||
5546 | codec->patch_ops = stac92xx_patch_ops; | |
5547 | ||
2d34e1b3 TI |
5548 | codec->proc_widget_hook = stac9205_proc_hook; |
5549 | ||
f3302a59 MP |
5550 | return 0; |
5551 | } | |
5552 | ||
db064e50 | 5553 | /* |
6d859065 | 5554 | * STAC9872 hack |
db064e50 TI |
5555 | */ |
5556 | ||
1e137f92 | 5557 | static struct hda_verb stac9872_core_init[] = { |
1624cb9a | 5558 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ |
6d859065 GM |
5559 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ |
5560 | {} | |
5561 | }; | |
5562 | ||
caa10b6e TI |
5563 | static struct snd_kcontrol_new stac9872_mixer[] = { |
5564 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), | |
5565 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), | |
caa10b6e TI |
5566 | { } /* end */ |
5567 | }; | |
5568 | ||
5569 | static hda_nid_t stac9872_pin_nids[] = { | |
5570 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, | |
5571 | 0x11, 0x13, 0x14, | |
5572 | }; | |
5573 | ||
5574 | static hda_nid_t stac9872_adc_nids[] = { | |
5575 | 0x8 /*,0x6*/ | |
5576 | }; | |
5577 | ||
5578 | static hda_nid_t stac9872_mux_nids[] = { | |
5579 | 0x15 | |
5580 | }; | |
5581 | ||
6d859065 | 5582 | static int patch_stac9872(struct hda_codec *codec) |
db064e50 TI |
5583 | { |
5584 | struct sigmatel_spec *spec; | |
1e137f92 | 5585 | int err; |
db064e50 | 5586 | |
db064e50 TI |
5587 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
5588 | if (spec == NULL) | |
5589 | return -ENOMEM; | |
db064e50 | 5590 | codec->spec = spec; |
caa10b6e | 5591 | |
1e137f92 | 5592 | #if 0 /* no model right now */ |
caa10b6e TI |
5593 | spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS, |
5594 | stac9872_models, | |
5595 | stac9872_cfg_tbl); | |
1e137f92 | 5596 | #endif |
db064e50 | 5597 | |
1e137f92 TI |
5598 | spec->num_pins = ARRAY_SIZE(stac9872_pin_nids); |
5599 | spec->pin_nids = stac9872_pin_nids; | |
5600 | spec->multiout.dac_nids = spec->dac_nids; | |
5601 | spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids); | |
5602 | spec->adc_nids = stac9872_adc_nids; | |
5603 | spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids); | |
5604 | spec->mux_nids = stac9872_mux_nids; | |
5605 | spec->mixer = stac9872_mixer; | |
5606 | spec->init = stac9872_core_init; | |
5607 | ||
5608 | err = stac92xx_parse_auto_config(codec, 0x10, 0x12); | |
5609 | if (err < 0) { | |
5610 | stac92xx_free(codec); | |
5611 | return -EINVAL; | |
5612 | } | |
5613 | spec->input_mux = &spec->private_imux; | |
5614 | codec->patch_ops = stac92xx_patch_ops; | |
db064e50 TI |
5615 | return 0; |
5616 | } | |
5617 | ||
5618 | ||
2f2f4251 M |
5619 | /* |
5620 | * patch entries | |
5621 | */ | |
1289e9e8 | 5622 | static struct hda_codec_preset snd_hda_preset_sigmatel[] = { |
2f2f4251 M |
5623 | { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, |
5624 | { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, | |
5625 | { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, | |
5626 | { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, | |
5627 | { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, | |
5628 | { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, | |
5629 | { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, | |
22a27c7f MP |
5630 | { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, |
5631 | { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, | |
5632 | { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, | |
5633 | { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, | |
5634 | { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, | |
5635 | { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, | |
3cc08dc6 MP |
5636 | { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, |
5637 | { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, | |
5638 | { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, | |
5639 | { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, | |
5640 | { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, | |
5641 | { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, | |
5642 | { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, | |
5643 | { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, | |
5644 | { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, | |
5645 | { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, | |
8e21c34c TD |
5646 | { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, |
5647 | { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, | |
5648 | { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, | |
5649 | { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, | |
5650 | { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, | |
5651 | { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, | |
7bd3c0f7 TI |
5652 | { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x }, |
5653 | { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x }, | |
6d859065 GM |
5654 | /* The following does not take into account .id=0x83847661 when subsys = |
5655 | * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are | |
5656 | * currently not fully supported. | |
5657 | */ | |
5658 | { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, | |
5659 | { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, | |
5660 | { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, | |
f3302a59 MP |
5661 | { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, |
5662 | { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, | |
5663 | { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, | |
5664 | { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, | |
5665 | { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, | |
5666 | { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, | |
5667 | { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, | |
5668 | { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, | |
aafc4412 | 5669 | { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx}, |
d0513fc6 MR |
5670 | { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx}, |
5671 | { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx}, | |
aafc4412 | 5672 | { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx}, |
541eee87 MR |
5673 | { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, |
5674 | { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, | |
e1f0d669 | 5675 | { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, |
541eee87 MR |
5676 | { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, |
5677 | { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, | |
5678 | { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, | |
5679 | { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, | |
5680 | { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, | |
5681 | { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, | |
5682 | { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, | |
5683 | { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, | |
2f2f4251 M |
5684 | {} /* terminator */ |
5685 | }; | |
1289e9e8 TI |
5686 | |
5687 | MODULE_ALIAS("snd-hda-codec-id:8384*"); | |
5688 | MODULE_ALIAS("snd-hda-codec-id:111d*"); | |
5689 | ||
5690 | MODULE_LICENSE("GPL"); | |
5691 | MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); | |
5692 | ||
5693 | static struct hda_codec_preset_list sigmatel_list = { | |
5694 | .preset = snd_hda_preset_sigmatel, | |
5695 | .owner = THIS_MODULE, | |
5696 | }; | |
5697 | ||
5698 | static int __init patch_sigmatel_init(void) | |
5699 | { | |
5700 | return snd_hda_add_codec_preset(&sigmatel_list); | |
5701 | } | |
5702 | ||
5703 | static void __exit patch_sigmatel_exit(void) | |
5704 | { | |
5705 | snd_hda_delete_codec_preset(&sigmatel_list); | |
5706 | } | |
5707 | ||
5708 | module_init(patch_sigmatel_init) | |
5709 | module_exit(patch_sigmatel_exit) |