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[ALSA] HDA-Intel - Add support for RV610/RV630 HDMI audio
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
8e21c34c
TD		 64enum {
65 STAC_925x_REF,
66 STAC_M2_2,
67 STAC_MA6,
2c11f955 68 STAC_PA6,
8e21c34c
TD		 69 STAC_925x_MODELS
70};
71
f5fcc13c
TI		 72enum {
73 STAC_D945_REF,
74 STAC_D945GTP3,
75 STAC_D945GTP5,
5d5d3bc3
IZ		 76 STAC_INTEL_MAC_V1,
77 STAC_INTEL_MAC_V2,
78 STAC_INTEL_MAC_V3,
79 STAC_INTEL_MAC_V4,
80 STAC_INTEL_MAC_V5,
dfe495d0 81 /* for backward compatibility */
f5fcc13c 82 STAC_MACMINI,
3fc24d85 83 STAC_MACBOOK,
6f0778d8
NB		 84 STAC_MACBOOK_PRO_V1,
85 STAC_MACBOOK_PRO_V2,
f16928fb 86 STAC_IMAC_INTEL,
0dae0f83 87 STAC_IMAC_INTEL_20,
dfe495d0
TI		 88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
f5fcc13c
TI		 92 STAC_922X_MODELS
93};
94
95enum {
96 STAC_D965_REF,
97 STAC_D965_3ST,
98 STAC_D965_5ST,
4ff076e5 99 STAC_DELL_3ST,
f5fcc13c
TI		 100 STAC_927X_MODELS
101};
403d1944 102
2f2f4251 103struct sigmatel_spec {
c8b6bf9b 104 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 105 unsigned int num_mixers;
106
403d1944 107 int board_config;
c7d4b2fa 108 unsigned int surr_switch: 1;
403d1944
MP		 109 unsigned int line_switch: 1;
110 unsigned int mic_switch: 1;
3cc08dc6 111 unsigned int alt_switch: 1;
82bc955f 112 unsigned int hp_detect: 1;
62fe78e9 113 unsigned int gpio_mute: 1;
c7d4b2fa 114
8259980e
TI		 115 unsigned int gpio_mask, gpio_data;
116
2f2f4251
M		 117 /* playback */
118 struct hda_multi_out multiout;
3cc08dc6 119 hda_nid_t dac_nids[5];
2f2f4251
M		 120
121 /* capture */
122 hda_nid_t *adc_nids;
2f2f4251 123 unsigned int num_adcs;
dabbed6f
M		 124 hda_nid_t *mux_nids;
125 unsigned int num_muxes;
8b65727b
MP		 126 hda_nid_t *dmic_nids;
127 unsigned int num_dmics;
128 hda_nid_t dmux_nid;
dabbed6f 129 hda_nid_t dig_in_nid;
2f2f4251 130
2f2f4251
M		 131 /* pin widgets */
132 hda_nid_t *pin_nids;
133 unsigned int num_pins;
2f2f4251 134 unsigned int *pin_configs;
11b44bbd 135 unsigned int *bios_pin_configs;
2f2f4251
M		 136
137 /* codec specific stuff */
138 struct hda_verb *init;
c8b6bf9b 139 struct snd_kcontrol_new *mixer;
2f2f4251
M		 140
141 /* capture source */
8b65727b
MP		 142 struct hda_input_mux *dinput_mux;
143 unsigned int cur_dmux;
c7d4b2fa 144 struct hda_input_mux *input_mux;
3cc08dc6 145 unsigned int cur_mux[3];
2f2f4251 146
403d1944
MP		 147 /* i/o switches */
148 unsigned int io_switch[2];
0fb87bb4 149 unsigned int clfe_swap;
5f10c4a9 150 unsigned int aloopback;
2f2f4251 151
c7d4b2fa
M		 152 struct hda_pcm pcm_rec[2]; /* PCM information */
153
154 /* dynamic controls and input_mux */
155 struct auto_pin_cfg autocfg;
156 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 157 struct snd_kcontrol_new *kctl_alloc;
8b65727b 158 struct hda_input_mux private_dimux;
c7d4b2fa 159 struct hda_input_mux private_imux;
2f2f4251
M		 160};
161
162static hda_nid_t stac9200_adc_nids[1] = {
163 0x03,
164};
165
166static hda_nid_t stac9200_mux_nids[1] = {
167 0x0c,
168};
169
170static hda_nid_t stac9200_dac_nids[1] = {
171 0x02,
172};
173
8e21c34c
TD		 174static hda_nid_t stac925x_adc_nids[1] = {
175 0x03,
176};
177
178static hda_nid_t stac925x_mux_nids[1] = {
179 0x0f,
180};
181
182static hda_nid_t stac925x_dac_nids[1] = {
183 0x02,
184};
185
f6e9852a
TI		 186#define STAC925X_NUM_DMICS 1
187static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
188 0x15, 0
2c11f955
TD		 189};
190
2f2f4251
M		 191static hda_nid_t stac922x_adc_nids[2] = {
192 0x06, 0x07,
193};
194
195static hda_nid_t stac922x_mux_nids[2] = {
196 0x12, 0x13,
197};
198
3cc08dc6
MP		 199static hda_nid_t stac927x_adc_nids[3] = {
200 0x07, 0x08, 0x09
201};
202
203static hda_nid_t stac927x_mux_nids[3] = {
204 0x15, 0x16, 0x17
205};
206
7f16859a
MR		 207#define STAC927X_NUM_DMICS 2
208static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
209 0x13, 0x14, 0
210};
211
f3302a59
MP		 212static hda_nid_t stac9205_adc_nids[2] = {
213 0x12, 0x13
214};
215
216static hda_nid_t stac9205_mux_nids[2] = {
217 0x19, 0x1a
218};
219
f6e9852a
TI		 220#define STAC9205_NUM_DMICS 2
221static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
222 0x17, 0x18, 0
8b65727b
MP		 223};
224
c7d4b2fa 225static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 226 0x08, 0x09, 0x0d, 0x0e,
227 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 228};
229
8e21c34c
TD		 230static hda_nid_t stac925x_pin_nids[8] = {
231 0x07, 0x08, 0x0a, 0x0b,
232 0x0c, 0x0d, 0x10, 0x11,
233};
234
2f2f4251
M		 235static hda_nid_t stac922x_pin_nids[10] = {
236 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
237 0x0f, 0x10, 0x11, 0x15, 0x1b,
238};
239
3cc08dc6
MP		 240static hda_nid_t stac927x_pin_nids[14] = {
241 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
242 0x0f, 0x10, 0x11, 0x12, 0x13,
243 0x14, 0x21, 0x22, 0x23,
244};
245
f3302a59
MP		 246static hda_nid_t stac9205_pin_nids[12] = {
247 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
248 0x0f, 0x14, 0x16, 0x17, 0x18,
249 0x21, 0x22,
f3302a59
MP		 250};
251
8b65727b
MP		 252static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
253 struct snd_ctl_elem_info *uinfo)
254{
255 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
256 struct sigmatel_spec *spec = codec->spec;
257 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
258}
259
260static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
261 struct snd_ctl_elem_value *ucontrol)
262{
263 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
264 struct sigmatel_spec *spec = codec->spec;
265
266 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
267 return 0;
268}
269
270static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
271 struct snd_ctl_elem_value *ucontrol)
272{
273 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
274 struct sigmatel_spec *spec = codec->spec;
275
276 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
277 spec->dmux_nid, &spec->cur_dmux);
278}
279
c8b6bf9b 280static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 281{
282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
283 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 284 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 285}
286
c8b6bf9b 287static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 288{
289 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
290 struct sigmatel_spec *spec = codec->spec;
291 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
292
293 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
294 return 0;
295}
296
c8b6bf9b 297static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 298{
299 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
300 struct sigmatel_spec *spec = codec->spec;
301 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
302
c7d4b2fa 303 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 304 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
305}
306
5f10c4a9
ML		 307#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
308
309static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
310 struct snd_ctl_elem_value *ucontrol)
311{
312 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
313 struct sigmatel_spec *spec = codec->spec;
314
315 ucontrol->value.integer.value[0] = spec->aloopback;
316 return 0;
317}
318
319static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
320 struct snd_ctl_elem_value *ucontrol)
321{
322 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
323 struct sigmatel_spec *spec = codec->spec;
324 unsigned int dac_mode;
325
326 if (spec->aloopback == ucontrol->value.integer.value[0])
327 return 0;
328
329 spec->aloopback = ucontrol->value.integer.value[0];
330
331
332 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
333 kcontrol->private_value & 0xFFFF, 0x0);
334
335 if (spec->aloopback) {
336 snd_hda_power_up(codec);
337 dac_mode |= 0x40;
338 } else {
339 snd_hda_power_down(codec);
340 dac_mode &= ~0x40;
341 }
342
343 snd_hda_codec_write_cache(codec, codec->afg, 0,
344 kcontrol->private_value >> 16, dac_mode);
345
346 return 1;
347}
348
c7d4b2fa 349static struct hda_verb stac9200_core_init[] = {
2f2f4251 350 /* set dac0mux for dac converter */
c7d4b2fa 351 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 352 {}
353};
354
1194b5b7
TI		 355static struct hda_verb stac9200_eapd_init[] = {
356 /* set dac0mux for dac converter */
357 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
358 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
359 {}
360};
361
8e21c34c
TD		 362static struct hda_verb stac925x_core_init[] = {
363 /* set dac0mux for dac converter */
364 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
365 {}
366};
367
c7d4b2fa 368static struct hda_verb stac922x_core_init[] = {
2f2f4251 369 /* set master volume and direct control */
c7d4b2fa 370 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 371 {}
372};
373
93ed1503 374static struct hda_verb d965_core_init[] = {
19039bd0 375 /* set master volume and direct control */
93ed1503 376 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 377 /* unmute node 0x1b */
378 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
379 /* select node 0x03 as DAC */
380 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
381 {}
382};
383
3cc08dc6
MP		 384static struct hda_verb stac927x_core_init[] = {
385 /* set master volume and direct control */
386 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
387 {}
388};
389
f3302a59
MP		 390static struct hda_verb stac9205_core_init[] = {
391 /* set master volume and direct control */
392 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
393 {}
394};
395
47744f63
MR		 396#define STAC_DIGITAL_INPUT_SOURCE(cnt) \
397 { \
398 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
399 .name = "Digital Input Source", \
400 .count = cnt, \
401 .info = stac92xx_dmux_enum_info, \
402 .get = stac92xx_dmux_enum_get, \
403 .put = stac92xx_dmux_enum_put,\
404 }
405
9e05b7a3 406#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 407 { \
408 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
409 .name = "Input Source", \
9e05b7a3 410 .count = cnt, \
ca7c5a8b
ML		 411 .info = stac92xx_mux_enum_info, \
412 .get = stac92xx_mux_enum_get, \
413 .put = stac92xx_mux_enum_put, \
414 }
415
5f10c4a9
ML		 416#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
417 { \
418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
419 .name = "Analog Loopback", \
420 .count = 1, \
421 .info = stac92xx_aloopback_info, \
422 .get = stac92xx_aloopback_get, \
423 .put = stac92xx_aloopback_put, \
424 .private_value = verb_read | (verb_write << 16), \
425 }
426
c8b6bf9b 427static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 428 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
429 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 430 STAC_INPUT_SOURCE(1),
2f2f4251
M		 431 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
432 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 433 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 434 { } /* end */
435};
436
8e21c34c 437static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 438 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 439 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
440 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
441 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
442 { } /* end */
443};
444
9e05b7a3 445static struct snd_kcontrol_new stac9205_mixer[] = {
47744f63 446 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3
ML		 447 STAC_INPUT_SOURCE(2),
448 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
9e05b7a3
ML		 449
450 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
451 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
452 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
453
454 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
455 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
456 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
457
2f2f4251
M		 458 { } /* end */
459};
460
19039bd0 461/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 462static struct snd_kcontrol_new stac922x_mixer[] = {
463 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 464 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
465 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
466 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
467
468 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
469 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
470 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 471 { } /* end */
472};
473
9e05b7a3 474
d1d985f0 475static struct snd_kcontrol_new stac927x_mixer[] = {
47744f63 476 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3 477 STAC_INPUT_SOURCE(3),
5f10c4a9 478 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
3cc08dc6 479
9e05b7a3
ML		 480 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
481 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
482 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
483
484 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
485 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
486 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
487
488 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
489 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
490 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 491 { } /* end */
492};
493
2f2f4251
M		 494static int stac92xx_build_controls(struct hda_codec *codec)
495{
496 struct sigmatel_spec *spec = codec->spec;
497 int err;
c7d4b2fa 498 int i;
2f2f4251
M		 499
500 err = snd_hda_add_new_ctls(codec, spec->mixer);
501 if (err < 0)
502 return err;
c7d4b2fa
M		 503
504 for (i = 0; i < spec->num_mixers; i++) {
505 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
506 if (err < 0)
507 return err;
508 }
509
dabbed6f
M		 510 if (spec->multiout.dig_out_nid) {
511 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
512 if (err < 0)
513 return err;
514 }
515 if (spec->dig_in_nid) {
516 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
517 if (err < 0)
518 return err;
519 }
520 return 0;
2f2f4251
M		 521}
522
403d1944 523static unsigned int ref9200_pin_configs[8] = {
dabbed6f 524 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 525 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
526};
527
dfe495d0
TI		 528/*
529 STAC 9200 pin configs for
530 102801A8
531 102801DE
532 102801E8
533*/
534static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 535 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
536 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 537};
538
539/*
540 STAC 9200 pin configs for
541 102801C0
542 102801C1
543*/
544static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 545 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
546 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 547};
548
549/*
550 STAC 9200 pin configs for
551 102801C4 (Dell Dimension E310)
552 102801C5
553 102801C7
554 102801D9
555 102801DA
556 102801E3
557*/
558static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 559 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
560 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 561};
562
563
564/*
565 STAC 9200-32 pin configs for
566 102801B5 (Dell Inspiron 630m)
567 102801D8 (Dell Inspiron 640m)
568*/
569static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 570 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
571 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 572};
573
574/*
575 STAC 9200-32 pin configs for
576 102801C2 (Dell Latitude D620)
577 102801C8
578 102801CC (Dell Latitude D820)
579 102801D4
580 102801D6
581*/
582static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 583 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
584 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 585};
586
587/*
588 STAC 9200-32 pin configs for
589 102801CE (Dell XPS M1710)
590 102801CF (Dell Precision M90)
591*/
592static unsigned int dell9200_m23_pin_configs[8] = {
593 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
594 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
595};
596
597/*
598 STAC 9200-32 pin configs for
599 102801C9
600 102801CA
601 102801CB (Dell Latitude 120L)
602 102801D3
603*/
604static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 605 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
606 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 607};
608
609/*
610 STAC 9200-32 pin configs for
611 102801BD (Dell Inspiron E1505n)
612 102801EE
613 102801EF
614*/
615static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 616 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
617 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 618};
619
620/*
621 STAC 9200-32 pin configs for
622 102801F5 (Dell Inspiron 1501)
623 102801F6
624*/
625static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 626 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
627 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 628};
629
630/*
631 STAC 9200-32
632 102801CD (Dell Inspiron E1705/9400)
633*/
634static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 635 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
636 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 637};
638
639
f5fcc13c
TI		 640static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
641 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 642 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
643 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
644 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
645 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
646 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
647 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
648 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
649 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
650 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
651 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 652};
653
f5fcc13c
TI		 654static const char *stac9200_models[STAC_9200_MODELS] = {
655 [STAC_REF] = "ref",
dfe495d0
TI		 656 [STAC_9200_DELL_D21] = "dell-d21",
657 [STAC_9200_DELL_D22] = "dell-d22",
658 [STAC_9200_DELL_D23] = "dell-d23",
659 [STAC_9200_DELL_M21] = "dell-m21",
660 [STAC_9200_DELL_M22] = "dell-m22",
661 [STAC_9200_DELL_M23] = "dell-m23",
662 [STAC_9200_DELL_M24] = "dell-m24",
663 [STAC_9200_DELL_M25] = "dell-m25",
664 [STAC_9200_DELL_M26] = "dell-m26",
665 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 666 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 667};
668
669static struct snd_pci_quirk stac9200_cfg_tbl[] = {
670 /* SigmaTel reference board */
671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
672 "DFI LanParty", STAC_REF),
e7377071 673 /* Dell laptops have BIOS problem */
dfe495d0
TI		 674 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
675 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 676 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 677 "Dell Inspiron 630m", STAC_9200_DELL_M21),
678 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
679 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
680 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
681 "unknown Dell", STAC_9200_DELL_D22),
682 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
683 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 684 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 685 "Dell Latitude D620", STAC_9200_DELL_M22),
686 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
687 "unknown Dell", STAC_9200_DELL_D23),
688 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
689 "unknown Dell", STAC_9200_DELL_D23),
690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
691 "unknown Dell", STAC_9200_DELL_M22),
692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
693 "unknown Dell", STAC_9200_DELL_M24),
694 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
695 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 696 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 697 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 699 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 701 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 703 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 705 "Dell Precision M90", STAC_9200_DELL_M23),
706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
707 "unknown Dell", STAC_9200_DELL_M22),
708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
709 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 711 "unknown Dell", STAC_9200_DELL_M22),
49c605db 712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 713 "Dell Inspiron 640m", STAC_9200_DELL_M21),
714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
715 "unknown Dell", STAC_9200_DELL_D23),
716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
717 "unknown Dell", STAC_9200_DELL_D23),
718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
719 "unknown Dell", STAC_9200_DELL_D21),
720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
721 "unknown Dell", STAC_9200_DELL_D23),
722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
723 "unknown Dell", STAC_9200_DELL_D21),
724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
725 "unknown Dell", STAC_9200_DELL_M25),
726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
727 "unknown Dell", STAC_9200_DELL_M25),
49c605db 728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 729 "Dell Inspiron 1501", STAC_9200_DELL_M26),
730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
731 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 732 /* Panasonic */
733 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 734 /* Gateway machines needs EAPD to be set on resume */
735 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
736 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
737 STAC_9200_GATEWAY),
738 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
739 STAC_9200_GATEWAY),
403d1944
MP		 740 {} /* terminator */
741};
742
8e21c34c
TD		 743static unsigned int ref925x_pin_configs[8] = {
744 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
745 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
746};
747
748static unsigned int stac925x_MA6_pin_configs[8] = {
749 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
750 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
751};
752
2c11f955
TD		 753static unsigned int stac925x_PA6_pin_configs[8] = {
754 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
755 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
756};
757
8e21c34c 758static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 759 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
760 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 761};
762
763static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
764 [STAC_REF] = ref925x_pin_configs,
765 [STAC_M2_2] = stac925xM2_2_pin_configs,
766 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 767 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 768};
769
770static const char *stac925x_models[STAC_925x_MODELS] = {
771 [STAC_REF] = "ref",
772 [STAC_M2_2] = "m2-2",
773 [STAC_MA6] = "m6",
2c11f955 774 [STAC_PA6] = "pa6",
8e21c34c
TD		 775};
776
777static struct snd_pci_quirk stac925x_cfg_tbl[] = {
778 /* SigmaTel reference board */
779 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 780 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 781 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
782 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
783 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 784 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 785 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
786 {} /* terminator */
787};
788
403d1944
MP		 789static unsigned int ref922x_pin_configs[10] = {
790 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
791 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 792 0x40000100, 0x40000100,
793};
794
dfe495d0
TI		 795/*
796 STAC 922X pin configs for
797 102801A7
798 102801AB
799 102801A9
800 102801D1
801 102801D2
802*/
803static unsigned int dell_922x_d81_pin_configs[10] = {
804 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
805 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
806 0x01813122, 0x400001f2,
807};
808
809/*
810 STAC 922X pin configs for
811 102801AC
812 102801D0
813*/
814static unsigned int dell_922x_d82_pin_configs[10] = {
815 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
816 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
817 0x01813122, 0x400001f1,
818};
819
820/*
821 STAC 922X pin configs for
822 102801BF
823*/
824static unsigned int dell_922x_m81_pin_configs[10] = {
825 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
826 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
827 0x40C003f1, 0x405003f0,
828};
829
830/*
831 STAC 9221 A1 pin configs for
832 102801D7 (Dell XPS M1210)
833*/
834static unsigned int dell_922x_m82_pin_configs[10] = {
835 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
836 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
837 0x508003f3, 0x405003f4,
838};
839
403d1944 840static unsigned int d945gtp3_pin_configs[10] = {
869264c4 841 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 842 0x40000100, 0x40000100, 0x40000100, 0x40000100,
843 0x02a19120, 0x40000100,
844};
845
846static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 847 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
848 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 849 0x02a19320, 0x40000100,
850};
851
5d5d3bc3
IZ		 852static unsigned int intel_mac_v1_pin_configs[10] = {
853 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
854 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
855 0x400000fc, 0x400000fb,
856};
857
858static unsigned int intel_mac_v2_pin_configs[10] = {
859 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
860 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
861 0x400000fc, 0x400000fb,
6f0778d8
NB		 862};
863
5d5d3bc3
IZ		 864static unsigned int intel_mac_v3_pin_configs[10] = {
865 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
866 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 867 0x400000fc, 0x400000fb,
868};
869
5d5d3bc3
IZ		 870static unsigned int intel_mac_v4_pin_configs[10] = {
871 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
872 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 873 0x400000fc, 0x400000fb,
874};
875
5d5d3bc3
IZ		 876static unsigned int intel_mac_v5_pin_configs[10] = {
877 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
878 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
879 0x400000fc, 0x400000fb,
0dae0f83
TI		 880};
881
76c08828 882
19039bd0 883static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 884 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 885 [STAC_D945GTP3] = d945gtp3_pin_configs,
886 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 887 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
888 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
889 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
890 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
891 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 892 /* for backward compatibility */
5d5d3bc3
IZ		 893 [STAC_MACMINI] = intel_mac_v3_pin_configs,
894 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
895 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
896 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
897 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
898 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 899 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
900 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
901 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
902 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 903};
904
f5fcc13c
TI		 905static const char *stac922x_models[STAC_922X_MODELS] = {
906 [STAC_D945_REF] = "ref",
907 [STAC_D945GTP5] = "5stack",
908 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 909 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
910 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
911 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
912 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
913 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 914 /* for backward compatibility */
f5fcc13c 915 [STAC_MACMINI] = "macmini",
3fc24d85 916 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 917 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
918 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 919 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 920 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 921 [STAC_922X_DELL_D81] = "dell-d81",
922 [STAC_922X_DELL_D82] = "dell-d82",
923 [STAC_922X_DELL_M81] = "dell-m81",
924 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 925};
926
927static struct snd_pci_quirk stac922x_cfg_tbl[] = {
928 /* SigmaTel reference board */
929 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
930 "DFI LanParty", STAC_D945_REF),
931 /* Intel 945G based systems */
932 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
933 "Intel D945G", STAC_D945GTP3),
934 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
935 "Intel D945G", STAC_D945GTP3),
936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
937 "Intel D945G", STAC_D945GTP3),
938 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
939 "Intel D945G", STAC_D945GTP3),
940 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
941 "Intel D945G", STAC_D945GTP3),
942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
943 "Intel D945G", STAC_D945GTP3),
944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
945 "Intel D945G", STAC_D945GTP3),
946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
947 "Intel D945G", STAC_D945GTP3),
948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
949 "Intel D945G", STAC_D945GTP3),
950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
951 "Intel D945G", STAC_D945GTP3),
952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
953 "Intel D945G", STAC_D945GTP3),
954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
955 "Intel D945G", STAC_D945GTP3),
956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
957 "Intel D945G", STAC_D945GTP3),
958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
959 "Intel D945G", STAC_D945GTP3),
960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
961 "Intel D945G", STAC_D945GTP3),
962 /* Intel D945G 5-stack systems */
963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
964 "Intel D945G", STAC_D945GTP5),
965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
966 "Intel D945G", STAC_D945GTP5),
967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
968 "Intel D945G", STAC_D945GTP5),
969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
970 "Intel D945G", STAC_D945GTP5),
971 /* Intel 945P based systems */
972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
973 "Intel D945P", STAC_D945GTP3),
974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
975 "Intel D945P", STAC_D945GTP3),
976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
977 "Intel D945P", STAC_D945GTP3),
978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
979 "Intel D945P", STAC_D945GTP3),
980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
981 "Intel D945P", STAC_D945GTP3),
982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
983 "Intel D945P", STAC_D945GTP5),
984 /* other systems */
985 /* Apple Mac Mini (early 2006) */
986 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 987 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 988 /* Dell systems */
989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
990 "unknown Dell", STAC_922X_DELL_D81),
991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
992 "unknown Dell", STAC_922X_DELL_D81),
993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
994 "unknown Dell", STAC_922X_DELL_D81),
995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
996 "unknown Dell", STAC_922X_DELL_D82),
997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
998 "unknown Dell", STAC_922X_DELL_M81),
999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1000 "unknown Dell", STAC_922X_DELL_D82),
1001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1002 "unknown Dell", STAC_922X_DELL_D81),
1003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1004 "unknown Dell", STAC_922X_DELL_D81),
1005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1006 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1007 {} /* terminator */
1008};
1009
3cc08dc6 1010static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1011 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1012 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1013 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1014 0x01c42190, 0x40000100,
3cc08dc6
MP		 1015};
1016
93ed1503 1017static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1018 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1019 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1020 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1021 0x40000100, 0x40000100
1022};
1023
93ed1503
TD		 1024static unsigned int d965_5st_pin_configs[14] = {
1025 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1026 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1027 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1028 0x40000100, 0x40000100
1029};
1030
4ff076e5
TD		 1031static unsigned int dell_3st_pin_configs[14] = {
1032 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1033 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1034 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1035 0x40c003fc, 0x40000100
1036};
1037
93ed1503 1038static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 1039 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 1040 [STAC_D965_3ST] = d965_3st_pin_configs,
1041 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 1042 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 1043};
1044
f5fcc13c
TI		 1045static const char *stac927x_models[STAC_927X_MODELS] = {
1046 [STAC_D965_REF] = "ref",
1047 [STAC_D965_3ST] = "3stack",
1048 [STAC_D965_5ST] = "5stack",
4ff076e5 1049 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 1050};
1051
1052static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1053 /* SigmaTel reference board */
1054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1055 "DFI LanParty", STAC_D965_REF),
81d3dbde 1056 /* Intel 946 based systems */
f5fcc13c
TI		 1057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1059 /* 965 based 3 stack systems */
f5fcc13c
TI		 1060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
5e915bb3 1076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
4ff076e5 1077 /* Dell 3 stack systems */
dfe495d0 1078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1081 /* 965 based 5 stack systems */
5e915bb3 1082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
f5fcc13c
TI		 1083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1084 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1088 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1092 {} /* terminator */
1093};
1094
f3302a59
MP		 1095static unsigned int ref9205_pin_configs[12] = {
1096 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1097 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1098 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1099};
1100
dfe495d0
TI		 1101/*
1102 STAC 9205 pin configs for
1103 102801F1
1104 102801F2
1105 102801FC
1106 102801FD
1107 10280204
1108 1028021F
1109*/
1110static unsigned int dell_9205_m42_pin_configs[12] = {
1111 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1112 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1113 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1114};
1115
1116/*
1117 STAC 9205 pin configs for
1118 102801F9
1119 102801FA
1120 102801FE
1121 102801FF (Dell Precision M4300)
1122 10280206
1123 10280200
1124 10280201
1125*/
1126static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1127 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1128 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1129 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1130};
1131
dfe495d0 1132static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1133 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1134 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1135 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1136};
1137
f5fcc13c 1138static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1139 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1140 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1141 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1142 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1143};
1144
f5fcc13c
TI		 1145static const char *stac9205_models[STAC_9205_MODELS] = {
1146 [STAC_9205_REF] = "ref",
dfe495d0 1147 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1148 [STAC_9205_DELL_M43] = "dell-m43",
1149 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1150};
1151
1152static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1153 /* SigmaTel reference board */
1154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1155 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1157 "unknown Dell", STAC_9205_DELL_M42),
1158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1159 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1161 "Dell Precision", STAC_9205_DELL_M43),
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1163 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1165 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1167 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1169 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1171 "unknown Dell", STAC_9205_DELL_M42),
1172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1173 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1175 "Dell Precision", STAC_9205_DELL_M43),
1176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1177 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1179 "Dell Precision", STAC_9205_DELL_M43),
1180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1181 "Dell Inspiron", STAC_9205_DELL_M44),
1182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1183 "Dell Inspiron", STAC_9205_DELL_M44),
1184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1185 "Dell Inspiron", STAC_9205_DELL_M44),
1186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1187 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1189 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1191 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1192 {} /* terminator */
1193};
1194
11b44bbd
RF		 1195static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1196{
1197 int i;
1198 struct sigmatel_spec *spec = codec->spec;
1199
1200 if (! spec->bios_pin_configs) {
1201 spec->bios_pin_configs = kcalloc(spec->num_pins,
1202 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1203 if (! spec->bios_pin_configs)
1204 return -ENOMEM;
1205 }
1206
1207 for (i = 0; i < spec->num_pins; i++) {
1208 hda_nid_t nid = spec->pin_nids[i];
1209 unsigned int pin_cfg;
1210
1211 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1212 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1213 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1214 nid, pin_cfg);
1215 spec->bios_pin_configs[i] = pin_cfg;
1216 }
1217
1218 return 0;
1219}
1220
87d48363
MR		 1221static void stac92xx_set_config_reg(struct hda_codec *codec,
1222 hda_nid_t pin_nid, unsigned int pin_config)
1223{
1224 int i;
1225 snd_hda_codec_write(codec, pin_nid, 0,
1226 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1227 pin_config & 0x000000ff);
1228 snd_hda_codec_write(codec, pin_nid, 0,
1229 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1230 (pin_config & 0x0000ff00) >> 8);
1231 snd_hda_codec_write(codec, pin_nid, 0,
1232 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1233 (pin_config & 0x00ff0000) >> 16);
1234 snd_hda_codec_write(codec, pin_nid, 0,
1235 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1236 pin_config >> 24);
1237 i = snd_hda_codec_read(codec, pin_nid, 0,
1238 AC_VERB_GET_CONFIG_DEFAULT,
1239 0x00);
1240 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1241 pin_nid, i);
1242}
1243
2f2f4251
M		 1244static void stac92xx_set_config_regs(struct hda_codec *codec)
1245{
1246 int i;
1247 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1248
87d48363
MR		 1249 if (!spec->pin_configs)
1250 return;
11b44bbd 1251
87d48363
MR		 1252 for (i = 0; i < spec->num_pins; i++)
1253 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1254 spec->pin_configs[i]);
2f2f4251 1255}
2f2f4251 1256
8259980e 1257static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1258{
8259980e 1259 struct sigmatel_spec *spec = codec->spec;
87d48363 1260 /* Configure GPIOx as output */
82beb8fd
TI		 1261 snd_hda_codec_write_cache(codec, codec->afg, 0,
1262 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1263 /* Configure GPIOx as CMOS */
82beb8fd 1264 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1265 /* Assert GPIOx */
82beb8fd
TI		 1266 snd_hda_codec_write_cache(codec, codec->afg, 0,
1267 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1268 /* Enable GPIOx */
82beb8fd
TI		 1269 snd_hda_codec_write_cache(codec, codec->afg, 0,
1270 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1271}
1272
dabbed6f 1273/*
c7d4b2fa 1274 * Analog playback callbacks
dabbed6f 1275 */
c7d4b2fa
M		 1276static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1277 struct hda_codec *codec,
c8b6bf9b 1278 struct snd_pcm_substream *substream)
2f2f4251 1279{
dabbed6f 1280 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1281 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1282}
1283
2f2f4251
M		 1284static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1285 struct hda_codec *codec,
1286 unsigned int stream_tag,
1287 unsigned int format,
c8b6bf9b 1288 struct snd_pcm_substream *substream)
2f2f4251
M		 1289{
1290 struct sigmatel_spec *spec = codec->spec;
403d1944 1291 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1292}
1293
1294static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1295 struct hda_codec *codec,
c8b6bf9b 1296 struct snd_pcm_substream *substream)
2f2f4251
M		 1297{
1298 struct sigmatel_spec *spec = codec->spec;
1299 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1300}
1301
dabbed6f
M		 1302/*
1303 * Digital playback callbacks
1304 */
1305static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1306 struct hda_codec *codec,
c8b6bf9b 1307 struct snd_pcm_substream *substream)
dabbed6f
M		 1308{
1309 struct sigmatel_spec *spec = codec->spec;
1310 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1311}
1312
1313static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1314 struct hda_codec *codec,
c8b6bf9b 1315 struct snd_pcm_substream *substream)
dabbed6f
M		 1316{
1317 struct sigmatel_spec *spec = codec->spec;
1318 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1319}
1320
6b97eb45
TI		 1321static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1322 struct hda_codec *codec,
1323 unsigned int stream_tag,
1324 unsigned int format,
1325 struct snd_pcm_substream *substream)
1326{
1327 struct sigmatel_spec *spec = codec->spec;
1328 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1329 stream_tag, format, substream);
1330}
1331
dabbed6f 1332
2f2f4251
M		 1333/*
1334 * Analog capture callbacks
1335 */
1336static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1337 struct hda_codec *codec,
1338 unsigned int stream_tag,
1339 unsigned int format,
c8b6bf9b 1340 struct snd_pcm_substream *substream)
2f2f4251
M		 1341{
1342 struct sigmatel_spec *spec = codec->spec;
1343
1344 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1345 stream_tag, 0, format);
1346 return 0;
1347}
1348
1349static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1350 struct hda_codec *codec,
c8b6bf9b 1351 struct snd_pcm_substream *substream)
2f2f4251
M		 1352{
1353 struct sigmatel_spec *spec = codec->spec;
1354
1355 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1356 return 0;
1357}
1358
dabbed6f
M		 1359static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1360 .substreams = 1,
1361 .channels_min = 2,
1362 .channels_max = 2,
1363 /* NID is set in stac92xx_build_pcms */
1364 .ops = {
1365 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1366 .close = stac92xx_dig_playback_pcm_close,
1367 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1368 },
1369};
1370
1371static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1372 .substreams = 1,
1373 .channels_min = 2,
1374 .channels_max = 2,
1375 /* NID is set in stac92xx_build_pcms */
1376};
1377
2f2f4251
M		 1378static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1379 .substreams = 1,
1380 .channels_min = 2,
c7d4b2fa 1381 .channels_max = 8,
2f2f4251
M		 1382 .nid = 0x02, /* NID to query formats and rates */
1383 .ops = {
1384 .open = stac92xx_playback_pcm_open,
1385 .prepare = stac92xx_playback_pcm_prepare,
1386 .cleanup = stac92xx_playback_pcm_cleanup
1387 },
1388};
1389
3cc08dc6
MP		 1390static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1391 .substreams = 1,
1392 .channels_min = 2,
1393 .channels_max = 2,
1394 .nid = 0x06, /* NID to query formats and rates */
1395 .ops = {
1396 .open = stac92xx_playback_pcm_open,
1397 .prepare = stac92xx_playback_pcm_prepare,
1398 .cleanup = stac92xx_playback_pcm_cleanup
1399 },
1400};
1401
2f2f4251 1402static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1403 .channels_min = 2,
1404 .channels_max = 2,
9e05b7a3 1405 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1406 .ops = {
1407 .prepare = stac92xx_capture_pcm_prepare,
1408 .cleanup = stac92xx_capture_pcm_cleanup
1409 },
1410};
1411
1412static int stac92xx_build_pcms(struct hda_codec *codec)
1413{
1414 struct sigmatel_spec *spec = codec->spec;
1415 struct hda_pcm *info = spec->pcm_rec;
1416
1417 codec->num_pcms = 1;
1418 codec->pcm_info = info;
1419
c7d4b2fa 1420 info->name = "STAC92xx Analog";
2f2f4251 1421 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1422 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1423 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1424 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1425
1426 if (spec->alt_switch) {
1427 codec->num_pcms++;
1428 info++;
1429 info->name = "STAC92xx Analog Alt";
1430 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1431 }
2f2f4251 1432
dabbed6f
M		 1433 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1434 codec->num_pcms++;
1435 info++;
1436 info->name = "STAC92xx Digital";
1437 if (spec->multiout.dig_out_nid) {
1438 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1439 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1440 }
1441 if (spec->dig_in_nid) {
1442 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1443 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1444 }
1445 }
1446
2f2f4251
M		 1447 return 0;
1448}
1449
c960a03b
TI		 1450static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1451{
1452 unsigned int pincap = snd_hda_param_read(codec, nid,
1453 AC_PAR_PIN_CAP);
1454 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1455 if (pincap & AC_PINCAP_VREF_100)
1456 return AC_PINCTL_VREF_100;
1457 if (pincap & AC_PINCAP_VREF_80)
1458 return AC_PINCTL_VREF_80;
1459 if (pincap & AC_PINCAP_VREF_50)
1460 return AC_PINCTL_VREF_50;
1461 if (pincap & AC_PINCAP_VREF_GRD)
1462 return AC_PINCTL_VREF_GRD;
1463 return 0;
1464}
1465
403d1944
MP		 1466static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1467
1468{
82beb8fd
TI		 1469 snd_hda_codec_write_cache(codec, nid, 0,
1470 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1471}
1472
a5ce8890 1473#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1474
1475static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1476{
1477 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1478 struct sigmatel_spec *spec = codec->spec;
1479 int io_idx = kcontrol-> private_value & 0xff;
1480
1481 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1482 return 0;
1483}
1484
1485static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1486{
1487 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1488 struct sigmatel_spec *spec = codec->spec;
1489 hda_nid_t nid = kcontrol->private_value >> 8;
1490 int io_idx = kcontrol-> private_value & 0xff;
1491 unsigned short val = ucontrol->value.integer.value[0];
1492
1493 spec->io_switch[io_idx] = val;
1494
1495 if (val)
1496 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1497 else {
1498 unsigned int pinctl = AC_PINCTL_IN_EN;
1499 if (io_idx) /* set VREF for mic */
1500 pinctl |= stac92xx_get_vref(codec, nid);
1501 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1502 }
403d1944
MP		 1503 return 1;
1504}
1505
0fb87bb4
ML		 1506#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1507
1508static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1509 struct snd_ctl_elem_value *ucontrol)
1510{
1511 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1512 struct sigmatel_spec *spec = codec->spec;
1513
1514 ucontrol->value.integer.value[0] = spec->clfe_swap;
1515 return 0;
1516}
1517
1518static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1519 struct snd_ctl_elem_value *ucontrol)
1520{
1521 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1522 struct sigmatel_spec *spec = codec->spec;
1523 hda_nid_t nid = kcontrol->private_value & 0xff;
1524
1525 if (spec->clfe_swap == ucontrol->value.integer.value[0])
1526 return 0;
1527
1528 spec->clfe_swap = ucontrol->value.integer.value[0];
1529
1530 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1531 spec->clfe_swap ? 0x4 : 0x0);
1532
1533 return 1;
1534}
1535
403d1944
MP		 1536#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1537 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1538 .name = xname, \
1539 .index = 0, \
1540 .info = stac92xx_io_switch_info, \
1541 .get = stac92xx_io_switch_get, \
1542 .put = stac92xx_io_switch_put, \
1543 .private_value = xpval, \
1544 }
1545
0fb87bb4
ML		 1546#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1547 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1548 .name = xname, \
1549 .index = 0, \
1550 .info = stac92xx_clfe_switch_info, \
1551 .get = stac92xx_clfe_switch_get, \
1552 .put = stac92xx_clfe_switch_put, \
1553 .private_value = xpval, \
1554 }
403d1944 1555
c7d4b2fa
M		 1556enum {
1557 STAC_CTL_WIDGET_VOL,
1558 STAC_CTL_WIDGET_MUTE,
403d1944 1559 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1560 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1561};
1562
c8b6bf9b 1563static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1564 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1565 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1566 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1567 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1568};
1569
1570/* add dynamic controls */
1571static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1572{
c8b6bf9b 1573 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1574
1575 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1576 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1577
1578 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1579 if (! knew)
1580 return -ENOMEM;
1581 if (spec->kctl_alloc) {
1582 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1583 kfree(spec->kctl_alloc);
1584 }
1585 spec->kctl_alloc = knew;
1586 spec->num_kctl_alloc = num;
1587 }
1588
1589 knew = &spec->kctl_alloc[spec->num_kctl_used];
1590 *knew = stac92xx_control_templates[type];
82fe0c58 1591 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1592 if (! knew->name)
1593 return -ENOMEM;
1594 knew->private_value = val;
1595 spec->num_kctl_used++;
1596 return 0;
1597}
1598
403d1944
MP		 1599/* flag inputs as additional dynamic lineouts */
1600static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1601{
1602 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1603 unsigned int wcaps, wtype;
1604 int i, num_dacs = 0;
1605
1606 /* use the wcaps cache to count all DACs available for line-outs */
1607 for (i = 0; i < codec->num_nodes; i++) {
1608 wcaps = codec->wcaps[i];
1609 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1610 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1611 num_dacs++;
1612 }
403d1944 1613
7b043899
SL		 1614 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1615
403d1944
MP		 1616 switch (cfg->line_outs) {
1617 case 3:
1618 /* add line-in as side */
7b043899 1619 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1620 cfg->line_out_pins[cfg->line_outs] =
1621 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1622 spec->line_switch = 1;
1623 cfg->line_outs++;
1624 }
1625 break;
1626 case 2:
1627 /* add line-in as clfe and mic as side */
7b043899 1628 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1629 cfg->line_out_pins[cfg->line_outs] =
1630 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1631 spec->line_switch = 1;
1632 cfg->line_outs++;
1633 }
7b043899 1634 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1635 cfg->line_out_pins[cfg->line_outs] =
1636 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1637 spec->mic_switch = 1;
1638 cfg->line_outs++;
1639 }
1640 break;
1641 case 1:
1642 /* add line-in as surr and mic as clfe */
7b043899 1643 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1644 cfg->line_out_pins[cfg->line_outs] =
1645 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1646 spec->line_switch = 1;
1647 cfg->line_outs++;
1648 }
7b043899 1649 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1650 cfg->line_out_pins[cfg->line_outs] =
1651 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1652 spec->mic_switch = 1;
1653 cfg->line_outs++;
1654 }
1655 break;
1656 }
1657
1658 return 0;
1659}
1660
7b043899
SL		 1661
1662static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1663{
1664 int i;
1665
1666 for (i = 0; i < spec->multiout.num_dacs; i++) {
1667 if (spec->multiout.dac_nids[i] == nid)
1668 return 1;
1669 }
1670
1671 return 0;
1672}
1673
3cc08dc6 1674/*
7b043899
SL		 1675 * Fill in the dac_nids table from the parsed pin configuration
1676 * This function only works when every pin in line_out_pins[]
1677 * contains atleast one DAC in its connection list. Some 92xx
1678 * codecs are not connected directly to a DAC, such as the 9200
1679 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1680 */
19039bd0 1681static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1682 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1683{
1684 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1685 int i, j, conn_len = 0;
1686 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1687 unsigned int wcaps, wtype;
1688
c7d4b2fa
M		 1689 for (i = 0; i < cfg->line_outs; i++) {
1690 nid = cfg->line_out_pins[i];
7b043899
SL		 1691 conn_len = snd_hda_get_connections(codec, nid, conn,
1692 HDA_MAX_CONNECTIONS);
1693 for (j = 0; j < conn_len; j++) {
1694 wcaps = snd_hda_param_read(codec, conn[j],
1695 AC_PAR_AUDIO_WIDGET_CAP);
1696 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1697
1698 if (wtype != AC_WID_AUD_OUT ||
1699 (wcaps & AC_WCAP_DIGITAL))
1700 continue;
1701 /* conn[j] is a DAC routed to this line-out */
1702 if (!is_in_dac_nids(spec, conn[j]))
1703 break;
1704 }
1705
1706 if (j == conn_len) {
df802952
TI		 1707 if (spec->multiout.num_dacs > 0) {
1708 /* we have already working output pins,
1709 * so let's drop the broken ones again
1710 */
1711 cfg->line_outs = spec->multiout.num_dacs;
1712 break;
1713 }
7b043899
SL		 1714 /* error out, no available DAC found */
1715 snd_printk(KERN_ERR
1716 "%s: No available DAC for pin 0x%x\n",
1717 __func__, nid);
1718 return -ENODEV;
1719 }
1720
1721 spec->multiout.dac_nids[i] = conn[j];
1722 spec->multiout.num_dacs++;
1723 if (conn_len > 1) {
1724 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1725 snd_hda_codec_write_cache(codec, nid, 0,
1726 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1727
7b043899
SL		 1728 }
1729 }
c7d4b2fa 1730
7b043899
SL		 1731 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1732 spec->multiout.num_dacs,
1733 spec->multiout.dac_nids[0],
1734 spec->multiout.dac_nids[1],
1735 spec->multiout.dac_nids[2],
1736 spec->multiout.dac_nids[3],
1737 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1738 return 0;
1739}
1740
eb06ed8f
TI		 1741/* create volume control/switch for the given prefx type */
1742static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1743{
1744 char name[32];
1745 int err;
1746
1747 sprintf(name, "%s Playback Volume", pfx);
1748 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1749 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1750 if (err < 0)
1751 return err;
1752 sprintf(name, "%s Playback Switch", pfx);
1753 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1754 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1755 if (err < 0)
1756 return err;
1757 return 0;
1758}
1759
c7d4b2fa 1760/* add playback controls from the parsed DAC table */
0fb87bb4 1761static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 1762 const struct auto_pin_cfg *cfg)
c7d4b2fa 1763{
19039bd0
TI		 1764 static const char *chname[4] = {
1765 "Front", "Surround", NULL /*CLFE*/, "Side"
1766 };
c7d4b2fa
M		 1767 hda_nid_t nid;
1768 int i, err;
1769
0fb87bb4
ML		 1770 struct sigmatel_spec *spec = codec->spec;
1771 unsigned int wid_caps;
1772
1773
c7d4b2fa 1774 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1775 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1776 continue;
1777
1778 nid = spec->multiout.dac_nids[i];
1779
1780 if (i == 2) {
1781 /* Center/LFE */
eb06ed8f
TI		 1782 err = create_controls(spec, "Center", nid, 1);
1783 if (err < 0)
c7d4b2fa 1784 return err;
eb06ed8f
TI		 1785 err = create_controls(spec, "LFE", nid, 2);
1786 if (err < 0)
c7d4b2fa 1787 return err;
0fb87bb4
ML		 1788
1789 wid_caps = get_wcaps(codec, nid);
1790
1791 if (wid_caps & AC_WCAP_LR_SWAP) {
1792 err = stac92xx_add_control(spec,
1793 STAC_CTL_WIDGET_CLFE_SWITCH,
1794 "Swap Center/LFE Playback Switch", nid);
1795
1796 if (err < 0)
1797 return err;
1798 }
1799
c7d4b2fa 1800 } else {
eb06ed8f
TI		 1801 err = create_controls(spec, chname[i], nid, 3);
1802 if (err < 0)
c7d4b2fa
M		 1803 return err;
1804 }
1805 }
1806
403d1944
MP		 1807 if (spec->line_switch)
1808 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1809 return err;
1810
1811 if (spec->mic_switch)
1812 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1813 return err;
1814
c7d4b2fa
M		 1815 return 0;
1816}
1817
eb06ed8f 1818static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1819{
7b043899
SL		 1820 if (is_in_dac_nids(spec, nid))
1821 return 1;
eb06ed8f
TI		 1822 if (spec->multiout.hp_nid == nid)
1823 return 1;
1824 return 0;
1825}
c7d4b2fa 1826
eb06ed8f
TI		 1827static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1828{
1829 if (!spec->multiout.hp_nid)
1830 spec->multiout.hp_nid = nid;
1831 else if (spec->multiout.num_dacs > 4) {
1832 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1833 return 1;
1834 } else {
1835 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1836 spec->multiout.num_dacs++;
1837 }
1838 return 0;
1839}
4e55096e 1840
eb06ed8f
TI		 1841/* add playback controls for Speaker and HP outputs */
1842static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1843 struct auto_pin_cfg *cfg)
1844{
1845 struct sigmatel_spec *spec = codec->spec;
1846 hda_nid_t nid;
1847 int i, old_num_dacs, err;
1848
1849 old_num_dacs = spec->multiout.num_dacs;
1850 for (i = 0; i < cfg->hp_outs; i++) {
1851 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1852 if (wid_caps & AC_WCAP_UNSOL_CAP)
1853 spec->hp_detect = 1;
1854 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
1855 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1856 if (check_in_dac_nids(spec, nid))
1857 nid = 0;
1858 if (! nid)
c7d4b2fa 1859 continue;
eb06ed8f
TI		 1860 add_spec_dacs(spec, nid);
1861 }
1862 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 1863 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 1864 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1865 if (check_in_dac_nids(spec, nid))
1866 nid = 0;
eb06ed8f
TI		 1867 if (! nid)
1868 continue;
1869 add_spec_dacs(spec, nid);
c7d4b2fa 1870 }
1b290a51
MR		 1871 for (i = 0; i < cfg->line_outs; i++) {
1872 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
1873 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
1874 if (check_in_dac_nids(spec, nid))
1875 nid = 0;
1876 if (! nid)
1877 continue;
1878 add_spec_dacs(spec, nid);
1879 }
eb06ed8f
TI		 1880 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
1881 static const char *pfxs[] = {
1882 "Speaker", "External Speaker", "Speaker2",
1883 };
1884 err = create_controls(spec, pfxs[i - old_num_dacs],
1885 spec->multiout.dac_nids[i], 3);
1886 if (err < 0)
1887 return err;
1888 }
1889 if (spec->multiout.hp_nid) {
1890 const char *pfx;
6020c008 1891 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 1892 pfx = "Master";
1893 else
1894 pfx = "Headphone";
1895 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
1896 if (err < 0)
1897 return err;
1898 }
c7d4b2fa
M		 1899
1900 return 0;
1901}
1902
8b65727b 1903/* labels for dmic mux inputs */
ddc2cec4 1904static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 1905 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
1906 "Digital Mic 3", "Digital Mic 4"
1907};
1908
1909/* create playback/capture controls for input pins on dmic capable codecs */
1910static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
1911 const struct auto_pin_cfg *cfg)
1912{
1913 struct sigmatel_spec *spec = codec->spec;
1914 struct hda_input_mux *dimux = &spec->private_dimux;
1915 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1916 int i, j;
1917
1918 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
1919 dimux->items[dimux->num_items].index = 0;
1920 dimux->num_items++;
1921
1922 for (i = 0; i < spec->num_dmics; i++) {
1923 int index;
1924 int num_cons;
1925 unsigned int def_conf;
1926
1927 def_conf = snd_hda_codec_read(codec,
1928 spec->dmic_nids[i],
1929 0,
1930 AC_VERB_GET_CONFIG_DEFAULT,
1931 0);
1932 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
1933 continue;
1934
1935 num_cons = snd_hda_get_connections(codec,
1936 spec->dmux_nid,
1937 con_lst,
1938 HDA_MAX_NUM_INPUTS);
1939 for (j = 0; j < num_cons; j++)
1940 if (con_lst[j] == spec->dmic_nids[i]) {
1941 index = j;
1942 goto found;
1943 }
1944 continue;
1945found:
1946 dimux->items[dimux->num_items].label =
1947 stac92xx_dmic_labels[dimux->num_items];
1948 dimux->items[dimux->num_items].index = index;
1949 dimux->num_items++;
1950 }
1951
1952 return 0;
1953}
1954
c7d4b2fa
M		 1955/* create playback/capture controls for input pins */
1956static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
1957{
1958 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 1959 struct hda_input_mux *imux = &spec->private_imux;
1960 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
1961 int i, j, k;
1962
1963 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 1964 int index;
1965
1966 if (!cfg->input_pins[i])
1967 continue;
1968 index = -1;
1969 for (j = 0; j < spec->num_muxes; j++) {
1970 int num_cons;
1971 num_cons = snd_hda_get_connections(codec,
1972 spec->mux_nids[j],
1973 con_lst,
1974 HDA_MAX_NUM_INPUTS);
1975 for (k = 0; k < num_cons; k++)
1976 if (con_lst[k] == cfg->input_pins[i]) {
1977 index = k;
1978 goto found;
1979 }
c7d4b2fa 1980 }
314634bc
TI		 1981 continue;
1982 found:
1983 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
1984 imux->items[imux->num_items].index = index;
1985 imux->num_items++;
c7d4b2fa
M		 1986 }
1987
7b043899 1988 if (imux->num_items) {
62fe78e9
SR		 1989 /*
1990 * Set the current input for the muxes.
1991 * The STAC9221 has two input muxes with identical source
1992 * NID lists. Hopefully this won't get confused.
1993 */
1994 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 1995 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
1996 AC_VERB_SET_CONNECT_SEL,
1997 imux->items[0].index);
62fe78e9
SR		 1998 }
1999 }
2000
c7d4b2fa
M		 2001 return 0;
2002}
2003
c7d4b2fa
M		 2004static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2005{
2006 struct sigmatel_spec *spec = codec->spec;
2007 int i;
2008
2009 for (i = 0; i < spec->autocfg.line_outs; i++) {
2010 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2011 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2012 }
2013}
2014
2015static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2016{
2017 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2018 int i;
c7d4b2fa 2019
eb06ed8f
TI		 2020 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2021 hda_nid_t pin;
2022 pin = spec->autocfg.hp_pins[i];
2023 if (pin) /* connect to front */
2024 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2025 }
2026 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2027 hda_nid_t pin;
2028 pin = spec->autocfg.speaker_pins[i];
2029 if (pin) /* connect to front */
2030 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2031 }
c7d4b2fa
M		 2032}
2033
3cc08dc6 2034static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2035{
2036 struct sigmatel_spec *spec = codec->spec;
2037 int err;
2038
8b65727b
MP		 2039 if ((err = snd_hda_parse_pin_def_config(codec,
2040 &spec->autocfg,
2041 spec->dmic_nids)) < 0)
c7d4b2fa 2042 return err;
82bc955f 2043 if (! spec->autocfg.line_outs)
869264c4 2044 return 0; /* can't find valid pin config */
19039bd0 2045
403d1944
MP		 2046 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2047 return err;
19039bd0
TI		 2048 if (spec->multiout.num_dacs == 0)
2049 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2050 return err;
c7d4b2fa 2051
0fb87bb4
ML		 2052 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2053
2054 if (err < 0)
2055 return err;
2056
2057 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2058
2059 if (err < 0)
2060 return err;
2061
2062 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2063
2064 if (err < 0)
c7d4b2fa
M		 2065 return err;
2066
8b65727b
MP		 2067 if (spec->num_dmics > 0)
2068 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2069 &spec->autocfg)) < 0)
2070 return err;
2071
c7d4b2fa 2072 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2073 if (spec->multiout.max_channels > 2)
c7d4b2fa 2074 spec->surr_switch = 1;
c7d4b2fa 2075
82bc955f 2076 if (spec->autocfg.dig_out_pin)
3cc08dc6 2077 spec->multiout.dig_out_nid = dig_out;
82bc955f 2078 if (spec->autocfg.dig_in_pin)
3cc08dc6 2079 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2080
2081 if (spec->kctl_alloc)
2082 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2083
2084 spec->input_mux = &spec->private_imux;
8b65727b 2085 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2086
2087 return 1;
2088}
2089
82bc955f
TI		 2090/* add playback controls for HP output */
2091static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2092 struct auto_pin_cfg *cfg)
2093{
2094 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2095 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2096 unsigned int wid_caps;
2097
2098 if (! pin)
2099 return 0;
2100
2101 wid_caps = get_wcaps(codec, pin);
505cb341 2102 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2103 spec->hp_detect = 1;
82bc955f
TI		 2104
2105 return 0;
2106}
2107
160ea0dc
RF		 2108/* add playback controls for LFE output */
2109static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2110 struct auto_pin_cfg *cfg)
2111{
2112 struct sigmatel_spec *spec = codec->spec;
2113 int err;
2114 hda_nid_t lfe_pin = 0x0;
2115 int i;
2116
2117 /*
2118 * search speaker outs and line outs for a mono speaker pin
2119 * with an amp. If one is found, add LFE controls
2120 * for it.
2121 */
2122 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2123 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2124 unsigned long wcaps = get_wcaps(codec, pin);
2125 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2126 if (wcaps == AC_WCAP_OUT_AMP)
2127 /* found a mono speaker with an amp, must be lfe */
2128 lfe_pin = pin;
2129 }
2130
2131 /* if speaker_outs is 0, then speakers may be in line_outs */
2132 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2133 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2134 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2135 unsigned long cfg;
2136 cfg = snd_hda_codec_read(codec, pin, 0,
2137 AC_VERB_GET_CONFIG_DEFAULT,
2138 0x00);
2139 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2140 unsigned long wcaps = get_wcaps(codec, pin);
2141 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2142 if (wcaps == AC_WCAP_OUT_AMP)
2143 /* found a mono speaker with an amp,
2144 must be lfe */
2145 lfe_pin = pin;
2146 }
2147 }
2148 }
2149
2150 if (lfe_pin) {
eb06ed8f 2151 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2152 if (err < 0)
2153 return err;
2154 }
2155
2156 return 0;
2157}
2158
c7d4b2fa
M		 2159static int stac9200_parse_auto_config(struct hda_codec *codec)
2160{
2161 struct sigmatel_spec *spec = codec->spec;
2162 int err;
2163
df694daa 2164 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2165 return err;
2166
2167 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2168 return err;
2169
82bc955f
TI		 2170 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2171 return err;
2172
160ea0dc
RF		 2173 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2174 return err;
2175
82bc955f 2176 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2177 spec->multiout.dig_out_nid = 0x05;
82bc955f 2178 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2179 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2180
2181 if (spec->kctl_alloc)
2182 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2183
2184 spec->input_mux = &spec->private_imux;
8b65727b 2185 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2186
2187 return 1;
2188}
2189
62fe78e9
SR		 2190/*
2191 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2192 * funky external mute control using GPIO pins.
2193 */
2194
2195static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2196{
2197 unsigned int gpiostate, gpiomask, gpiodir;
2198
2199 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2200 AC_VERB_GET_GPIO_DATA, 0);
2201
2202 if (!muted)
2203 gpiostate |= (1 << pin);
2204 else
2205 gpiostate &= ~(1 << pin);
2206
2207 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2208 AC_VERB_GET_GPIO_MASK, 0);
2209 gpiomask |= (1 << pin);
2210
2211 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2212 AC_VERB_GET_GPIO_DIRECTION, 0);
2213 gpiodir |= (1 << pin);
2214
2215 /* AppleHDA seems to do this -- WTF is this verb?? */
2216 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2217
2218 snd_hda_codec_write(codec, codec->afg, 0,
2219 AC_VERB_SET_GPIO_MASK, gpiomask);
2220 snd_hda_codec_write(codec, codec->afg, 0,
2221 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2222
2223 msleep(1);
2224
2225 snd_hda_codec_write(codec, codec->afg, 0,
2226 AC_VERB_SET_GPIO_DATA, gpiostate);
2227}
2228
314634bc
TI		 2229static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2230 unsigned int event)
2231{
2232 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2233 snd_hda_codec_write_cache(codec, nid, 0,
2234 AC_VERB_SET_UNSOLICITED_ENABLE,
2235 (AC_USRSP_EN | event));
314634bc
TI		 2236}
2237
c7d4b2fa
M		 2238static int stac92xx_init(struct hda_codec *codec)
2239{
2240 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2241 struct auto_pin_cfg *cfg = &spec->autocfg;
2242 int i;
c7d4b2fa 2243
c7d4b2fa
M		 2244 snd_hda_sequence_write(codec, spec->init);
2245
82bc955f
TI		 2246 /* set up pins */
2247 if (spec->hp_detect) {
505cb341 2248 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2249 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2250 enable_pin_detect(codec, cfg->hp_pins[i],
2251 STAC_HP_EVENT);
0a07acaf
TI		 2252 /* force to enable the first line-out; the others are set up
2253 * in unsol_event
2254 */
2255 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2256 AC_PINCTL_OUT_EN);
eb995a8c 2257 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2258 /* fake event to set up pins */
2259 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2260 } else {
2261 stac92xx_auto_init_multi_out(codec);
2262 stac92xx_auto_init_hp_out(codec);
2263 }
2264 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2265 hda_nid_t nid = cfg->input_pins[i];
2266 if (nid) {
2267 unsigned int pinctl = AC_PINCTL_IN_EN;
2268 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2269 pinctl |= stac92xx_get_vref(codec, nid);
2270 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2271 }
82bc955f 2272 }
8b65727b
MP		 2273 if (spec->num_dmics > 0)
2274 for (i = 0; i < spec->num_dmics; i++)
2275 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2276 AC_PINCTL_IN_EN);
2277
82bc955f
TI		 2278 if (cfg->dig_out_pin)
2279 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2280 AC_PINCTL_OUT_EN);
2281 if (cfg->dig_in_pin)
2282 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2283 AC_PINCTL_IN_EN);
2284
62fe78e9
SR		 2285 if (spec->gpio_mute) {
2286 stac922x_gpio_mute(codec, 0, 0);
2287 stac922x_gpio_mute(codec, 1, 0);
2288 }
2289
c7d4b2fa
M		 2290 return 0;
2291}
2292
2f2f4251
M		 2293static void stac92xx_free(struct hda_codec *codec)
2294{
c7d4b2fa
M		 2295 struct sigmatel_spec *spec = codec->spec;
2296 int i;
2297
2298 if (! spec)
2299 return;
2300
2301 if (spec->kctl_alloc) {
2302 for (i = 0; i < spec->num_kctl_used; i++)
2303 kfree(spec->kctl_alloc[i].name);
2304 kfree(spec->kctl_alloc);
2305 }
2306
11b44bbd
RF		 2307 if (spec->bios_pin_configs)
2308 kfree(spec->bios_pin_configs);
2309
c7d4b2fa 2310 kfree(spec);
2f2f4251
M		 2311}
2312
4e55096e
M		 2313static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2314 unsigned int flag)
2315{
2316 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2317 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2318
f9acba43
TI		 2319 if (pin_ctl & AC_PINCTL_IN_EN) {
2320 /*
2321 * we need to check the current set-up direction of
2322 * shared input pins since they can be switched via
2323 * "xxx as Output" mixer switch
2324 */
2325 struct sigmatel_spec *spec = codec->spec;
2326 struct auto_pin_cfg *cfg = &spec->autocfg;
2327 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2328 spec->line_switch) ||
2329 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2330 spec->mic_switch))
2331 return;
2332 }
2333
7b043899
SL		 2334 /* if setting pin direction bits, clear the current
2335 direction bits first */
2336 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2337 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2338
82beb8fd 2339 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2340 AC_VERB_SET_PIN_WIDGET_CONTROL,
2341 pin_ctl | flag);
2342}
2343
2344static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2345 unsigned int flag)
2346{
2347 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2348 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2349 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2350 AC_VERB_SET_PIN_WIDGET_CONTROL,
2351 pin_ctl & ~flag);
2352}
2353
314634bc
TI		 2354static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
2355{
2356 if (!nid)
2357 return 0;
2358 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
2359 & (1 << 31))
2360 return 1;
2361 return 0;
2362}
2363
2364static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2365{
2366 struct sigmatel_spec *spec = codec->spec;
2367 struct auto_pin_cfg *cfg = &spec->autocfg;
2368 int i, presence;
2369
eb06ed8f
TI		 2370 presence = 0;
2371 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 2372 presence = get_pin_presence(codec, cfg->hp_pins[i]);
2373 if (presence)
2374 break;
eb06ed8f 2375 }
4e55096e
M		 2376
2377 if (presence) {
2378 /* disable lineouts, enable hp */
2379 for (i = 0; i < cfg->line_outs; i++)
2380 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2381 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2382 for (i = 0; i < cfg->speaker_outs; i++)
2383 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2384 AC_PINCTL_OUT_EN);
4e55096e
M		 2385 } else {
2386 /* enable lineouts, disable hp */
2387 for (i = 0; i < cfg->line_outs; i++)
2388 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2389 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2390 for (i = 0; i < cfg->speaker_outs; i++)
2391 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2392 AC_PINCTL_OUT_EN);
4e55096e
M		 2393 }
2394}
2395
314634bc
TI		 2396static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2397{
2398 switch (res >> 26) {
2399 case STAC_HP_EVENT:
2400 stac92xx_hp_detect(codec, res);
2401 break;
2402 }
2403}
2404
cb53c626 2405#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2406static int stac92xx_resume(struct hda_codec *codec)
2407{
dc81bed1
TI		 2408 struct sigmatel_spec *spec = codec->spec;
2409
11b44bbd 2410 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2411 snd_hda_sequence_write(codec, spec->init);
2412 if (spec->gpio_mute) {
2413 stac922x_gpio_mute(codec, 0, 0);
2414 stac922x_gpio_mute(codec, 1, 0);
2415 }
82beb8fd
TI		 2416 snd_hda_codec_resume_amp(codec);
2417 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2418 /* invoke unsolicited event to reset the HP state */
2419 if (spec->hp_detect)
2420 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2421 return 0;
2422}
2423#endif
2424
2f2f4251
M		 2425static struct hda_codec_ops stac92xx_patch_ops = {
2426 .build_controls = stac92xx_build_controls,
2427 .build_pcms = stac92xx_build_pcms,
2428 .init = stac92xx_init,
2429 .free = stac92xx_free,
4e55096e 2430 .unsol_event = stac92xx_unsol_event,
cb53c626 2431#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2432 .resume = stac92xx_resume,
2433#endif
2f2f4251
M		 2434};
2435
2436static int patch_stac9200(struct hda_codec *codec)
2437{
2438 struct sigmatel_spec *spec;
c7d4b2fa 2439 int err;
2f2f4251 2440
e560d8d8 2441 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2442 if (spec == NULL)
2443 return -ENOMEM;
2444
2445 codec->spec = spec;
a4eed138 2446 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2447 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2448 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2449 stac9200_models,
2450 stac9200_cfg_tbl);
11b44bbd
RF		 2451 if (spec->board_config < 0) {
2452 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2453 err = stac92xx_save_bios_config_regs(codec);
2454 if (err < 0) {
2455 stac92xx_free(codec);
2456 return err;
2457 }
2458 spec->pin_configs = spec->bios_pin_configs;
2459 } else {
403d1944
MP		 2460 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2461 stac92xx_set_config_regs(codec);
2462 }
2f2f4251
M		 2463
2464 spec->multiout.max_channels = 2;
2465 spec->multiout.num_dacs = 1;
2466 spec->multiout.dac_nids = stac9200_dac_nids;
2467 spec->adc_nids = stac9200_adc_nids;
2468 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2469 spec->num_muxes = 1;
8b65727b 2470 spec->num_dmics = 0;
9e05b7a3 2471 spec->num_adcs = 1;
c7d4b2fa 2472
1194b5b7
TI		 2473 if (spec->board_config == STAC_9200_GATEWAY)
2474 spec->init = stac9200_eapd_init;
2475 else
2476 spec->init = stac9200_core_init;
2f2f4251 2477 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2478
2479 err = stac9200_parse_auto_config(codec);
2480 if (err < 0) {
2481 stac92xx_free(codec);
2482 return err;
2483 }
2f2f4251
M		 2484
2485 codec->patch_ops = stac92xx_patch_ops;
2486
2487 return 0;
2488}
2489
8e21c34c
TD		 2490static int patch_stac925x(struct hda_codec *codec)
2491{
2492 struct sigmatel_spec *spec;
2493 int err;
2494
2495 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2496 if (spec == NULL)
2497 return -ENOMEM;
2498
2499 codec->spec = spec;
a4eed138 2500 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2501 spec->pin_nids = stac925x_pin_nids;
2502 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2503 stac925x_models,
2504 stac925x_cfg_tbl);
9e507abd 2505 again:
8e21c34c 2506 if (spec->board_config < 0) {
2c11f955
TD		 2507 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2508 "using BIOS defaults\n");
8e21c34c
TD		 2509 err = stac92xx_save_bios_config_regs(codec);
2510 if (err < 0) {
2511 stac92xx_free(codec);
2512 return err;
2513 }
2514 spec->pin_configs = spec->bios_pin_configs;
2515 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2516 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2517 stac92xx_set_config_regs(codec);
2518 }
2519
2520 spec->multiout.max_channels = 2;
2521 spec->multiout.num_dacs = 1;
2522 spec->multiout.dac_nids = stac925x_dac_nids;
2523 spec->adc_nids = stac925x_adc_nids;
2524 spec->mux_nids = stac925x_mux_nids;
2525 spec->num_muxes = 1;
9e05b7a3 2526 spec->num_adcs = 1;
2c11f955
TD		 2527 switch (codec->vendor_id) {
2528 case 0x83847632: /* STAC9202 */
2529 case 0x83847633: /* STAC9202D */
2530 case 0x83847636: /* STAC9251 */
2531 case 0x83847637: /* STAC9251D */
f6e9852a 2532 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955
TD		 2533 spec->dmic_nids = stac925x_dmic_nids;
2534 break;
2535 default:
2536 spec->num_dmics = 0;
2537 break;
2538 }
8e21c34c
TD		 2539
2540 spec->init = stac925x_core_init;
2541 spec->mixer = stac925x_mixer;
2542
2543 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2544 if (!err) {
2545 if (spec->board_config < 0) {
2546 printk(KERN_WARNING "hda_codec: No auto-config is "
2547 "available, default to model=ref\n");
2548 spec->board_config = STAC_925x_REF;
2549 goto again;
2550 }
2551 err = -EINVAL;
2552 }
8e21c34c
TD		 2553 if (err < 0) {
2554 stac92xx_free(codec);
2555 return err;
2556 }
2557
2558 codec->patch_ops = stac92xx_patch_ops;
2559
2560 return 0;
2561}
2562
2f2f4251
M		 2563static int patch_stac922x(struct hda_codec *codec)
2564{
2565 struct sigmatel_spec *spec;
c7d4b2fa 2566 int err;
2f2f4251 2567
e560d8d8 2568 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2569 if (spec == NULL)
2570 return -ENOMEM;
2571
2572 codec->spec = spec;
a4eed138 2573 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2574 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2575 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2576 stac922x_models,
2577 stac922x_cfg_tbl);
5d5d3bc3 2578 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2579 spec->gpio_mute = 1;
2580 /* Intel Macs have all same PCI SSID, so we need to check
2581 * codec SSID to distinguish the exact models
2582 */
6f0778d8 2583 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2584 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2585
2586 case 0x106b0800:
2587 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2588 break;
5d5d3bc3
IZ		 2589 case 0x106b0600:
2590 case 0x106b0700:
2591 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2592 break;
5d5d3bc3
IZ		 2593 case 0x106b0e00:
2594 case 0x106b0f00:
2595 case 0x106b1600:
2596 case 0x106b1700:
2597 case 0x106b0200:
2598 case 0x106b1e00:
2599 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2600 break;
5d5d3bc3
IZ		 2601 case 0x106b1a00:
2602 case 0x00000100:
2603 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2604 break;
5d5d3bc3
IZ		 2605 case 0x106b0a00:
2606 case 0x106b2200:
2607 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2608 break;
3fc24d85
TI		 2609 }
2610 }
2611
9e507abd 2612 again:
11b44bbd
RF		 2613 if (spec->board_config < 0) {
2614 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2615 "using BIOS defaults\n");
2616 err = stac92xx_save_bios_config_regs(codec);
2617 if (err < 0) {
2618 stac92xx_free(codec);
2619 return err;
2620 }
2621 spec->pin_configs = spec->bios_pin_configs;
2622 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2623 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2624 stac92xx_set_config_regs(codec);
2625 }
2f2f4251 2626
c7d4b2fa
M		 2627 spec->adc_nids = stac922x_adc_nids;
2628 spec->mux_nids = stac922x_mux_nids;
2549413e 2629 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 2630 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 2631 spec->num_dmics = 0;
c7d4b2fa
M		 2632
2633 spec->init = stac922x_core_init;
2f2f4251 2634 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2635
2636 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2637
3cc08dc6 2638 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2639 if (!err) {
2640 if (spec->board_config < 0) {
2641 printk(KERN_WARNING "hda_codec: No auto-config is "
2642 "available, default to model=ref\n");
2643 spec->board_config = STAC_D945_REF;
2644 goto again;
2645 }
2646 err = -EINVAL;
2647 }
3cc08dc6
MP		 2648 if (err < 0) {
2649 stac92xx_free(codec);
2650 return err;
2651 }
2652
2653 codec->patch_ops = stac92xx_patch_ops;
2654
807a4636
TI		 2655 /* Fix Mux capture level; max to 2 */
2656 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2657 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2658 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2659 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2660 (0 << AC_AMPCAP_MUTE_SHIFT));
2661
3cc08dc6
MP		 2662 return 0;
2663}
2664
2665static int patch_stac927x(struct hda_codec *codec)
2666{
2667 struct sigmatel_spec *spec;
2668 int err;
2669
2670 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2671 if (spec == NULL)
2672 return -ENOMEM;
2673
2674 codec->spec = spec;
a4eed138 2675 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2676 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2677 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2678 stac927x_models,
2679 stac927x_cfg_tbl);
9e507abd 2680 again:
11b44bbd 2681 if (spec->board_config < 0) {
3cc08dc6 2682 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2683 err = stac92xx_save_bios_config_regs(codec);
2684 if (err < 0) {
2685 stac92xx_free(codec);
2686 return err;
2687 }
2688 spec->pin_configs = spec->bios_pin_configs;
2689 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2690 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2691 stac92xx_set_config_regs(codec);
2692 }
2693
81d3dbde 2694 switch (spec->board_config) {
93ed1503 2695 case STAC_D965_3ST:
81d3dbde
TD		 2696 spec->adc_nids = stac927x_adc_nids;
2697 spec->mux_nids = stac927x_mux_nids;
2549413e 2698 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2699 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
93ed1503 2700 spec->init = d965_core_init;
9e05b7a3 2701 spec->mixer = stac927x_mixer;
81d3dbde 2702 break;
93ed1503
TD		 2703 case STAC_D965_5ST:
2704 spec->adc_nids = stac927x_adc_nids;
2705 spec->mux_nids = stac927x_mux_nids;
2549413e 2706 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2707 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
93ed1503 2708 spec->init = d965_core_init;
9e05b7a3 2709 spec->mixer = stac927x_mixer;
81d3dbde
TD		 2710 break;
2711 default:
2712 spec->adc_nids = stac927x_adc_nids;
2713 spec->mux_nids = stac927x_mux_nids;
2549413e 2714 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2715 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
81d3dbde
TD		 2716 spec->init = stac927x_core_init;
2717 spec->mixer = stac927x_mixer;
2718 }
3cc08dc6 2719
7f16859a
MR		 2720 switch (codec->subsystem_id) {
2721 case 0x1028020A: /* STAC 9228 */
2722 case 0x10280209: /* STAC 9228 */
2723 spec->dmic_nids = stac927x_dmic_nids;
2724 spec->num_dmics = STAC927X_NUM_DMICS;
83eef75b 2725 spec->dmux_nid = 0x1b;
f1f208d0
MR		 2726
2727 /* Enable DMIC0 */
2728 stac92xx_set_config_reg(codec, 0x13, 0x90a60040);
2729
2730 /* GPIO2 High = Enable EAPD */
2731 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 2732 break;
2733 default:
f1f208d0
MR		 2734 spec->num_dmics = 0;
2735
2736 /* GPIO0 High = Enable EAPD */
2737 spec->gpio_mask = spec->gpio_data = 0x00000001;
7f16859a
MR		 2738 }
2739
3cc08dc6 2740 spec->multiout.dac_nids = spec->dac_nids;
8259980e 2741 stac92xx_enable_gpio_mask(codec);
92a22beb 2742
3cc08dc6 2743 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 2744 if (!err) {
2745 if (spec->board_config < 0) {
2746 printk(KERN_WARNING "hda_codec: No auto-config is "
2747 "available, default to model=ref\n");
2748 spec->board_config = STAC_D965_REF;
2749 goto again;
2750 }
2751 err = -EINVAL;
2752 }
c7d4b2fa
M		 2753 if (err < 0) {
2754 stac92xx_free(codec);
2755 return err;
2756 }
2f2f4251
M		 2757
2758 codec->patch_ops = stac92xx_patch_ops;
2759
2760 return 0;
2761}
2762
f3302a59
MP		 2763static int patch_stac9205(struct hda_codec *codec)
2764{
2765 struct sigmatel_spec *spec;
8259980e 2766 int err;
f3302a59
MP		 2767
2768 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2769 if (spec == NULL)
2770 return -ENOMEM;
2771
2772 codec->spec = spec;
a4eed138 2773 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 2774 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 2775 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
2776 stac9205_models,
2777 stac9205_cfg_tbl);
9e507abd 2778 again:
11b44bbd
RF		 2779 if (spec->board_config < 0) {
2780 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
2781 err = stac92xx_save_bios_config_regs(codec);
2782 if (err < 0) {
2783 stac92xx_free(codec);
2784 return err;
2785 }
2786 spec->pin_configs = spec->bios_pin_configs;
2787 } else {
f3302a59
MP		 2788 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
2789 stac92xx_set_config_regs(codec);
2790 }
2791
2792 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 2793 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 2794 spec->mux_nids = stac9205_mux_nids;
2549413e 2795 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 2796 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 2797 spec->num_dmics = STAC9205_NUM_DMICS;
8b65727b 2798 spec->dmux_nid = 0x1d;
f3302a59
MP		 2799
2800 spec->init = stac9205_core_init;
2801 spec->mixer = stac9205_mixer;
2802
2803 spec->multiout.dac_nids = spec->dac_nids;
87d48363 2804
ae0a8ed8 2805 switch (spec->board_config){
ae0a8ed8 2806 case STAC_9205_DELL_M43:
87d48363
MR		 2807 /* Enable SPDIF in/out */
2808 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2809 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2810
8259980e 2811 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 2812 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2813 * GPIO2 High = Headphone Mute
2814 */
8259980e 2815 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 2816 break;
2817 default:
2818 /* GPIO0 High = EAPD */
2819 spec->gpio_mask = spec->gpio_data = 0x00000001;
2820 break;
2821 }
33382403 2822
8259980e 2823 stac92xx_enable_gpio_mask(codec);
f3302a59 2824 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 2825 if (!err) {
2826 if (spec->board_config < 0) {
2827 printk(KERN_WARNING "hda_codec: No auto-config is "
2828 "available, default to model=ref\n");
2829 spec->board_config = STAC_9205_REF;
2830 goto again;
2831 }
2832 err = -EINVAL;
2833 }
f3302a59
MP		 2834 if (err < 0) {
2835 stac92xx_free(codec);
2836 return err;
2837 }
2838
2839 codec->patch_ops = stac92xx_patch_ops;
2840
2841 return 0;
2842}
2843
db064e50 2844/*
6d859065 2845 * STAC9872 hack
db064e50
TI		 2846 */
2847
99ccc560 2848/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 2849static hda_nid_t vaio_dacs[] = { 0x2 };
2850#define VAIO_HP_DAC 0x5
2851static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2852static hda_nid_t vaio_mux_nids[] = { 0x15 };
2853
2854static struct hda_input_mux vaio_mux = {
a3a2f429 2855 .num_items = 3,
db064e50 2856 .items = {
d773781c 2857 /* { "HP", 0x0 }, */
1624cb9a
TI		 2858 { "Mic Jack", 0x1 },
2859 { "Internal Mic", 0x2 },
db064e50
TI		 2860 { "PCM", 0x3 },
2861 }
2862};
2863
2864static struct hda_verb vaio_init[] = {
2865 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 2866 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 2867 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2868 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2869 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2870 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2871 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 2872 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2873 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2874 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2875 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2876 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2877 {}
2878};
2879
6d859065
GM		 2880static struct hda_verb vaio_ar_init[] = {
2881 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2882 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2883 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2884 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
2885/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
2886 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 2887 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 2888 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
2889 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
2890/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
2891 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
2892 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
2893 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
2894 {}
2895};
2896
db064e50 2897/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2898static struct hda_bind_ctls vaio_bind_master_vol = {
2899 .ops = &snd_hda_bind_vol,
2900 .values = {
2901 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2902 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2903 0
2904 },
2905};
db064e50
TI		 2906
2907/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 2908static struct hda_bind_ctls vaio_bind_master_sw = {
2909 .ops = &snd_hda_bind_sw,
2910 .values = {
2911 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2912 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2913 0,
2914 },
2915};
db064e50
TI		 2916
2917static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 2918 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2919 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 2920 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2921 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2922 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2923 {
2924 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2925 .name = "Capture Source",
2926 .count = 1,
2927 .info = stac92xx_mux_enum_info,
2928 .get = stac92xx_mux_enum_get,
2929 .put = stac92xx_mux_enum_put,
2930 },
2931 {}
2932};
2933
6d859065 2934static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 2935 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2936 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 2937 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2938 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2939 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
2940 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
2941 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
2942 {
2943 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2944 .name = "Capture Source",
2945 .count = 1,
2946 .info = stac92xx_mux_enum_info,
2947 .get = stac92xx_mux_enum_get,
2948 .put = stac92xx_mux_enum_put,
2949 },
2950 {}
2951};
2952
2953static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 2954 .build_controls = stac92xx_build_controls,
2955 .build_pcms = stac92xx_build_pcms,
2956 .init = stac92xx_init,
2957 .free = stac92xx_free,
cb53c626 2958#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 2959 .resume = stac92xx_resume,
2960#endif
2961};
2962
72e7b0dd
TI		 2963static int stac9872_vaio_init(struct hda_codec *codec)
2964{
2965 int err;
2966
2967 err = stac92xx_init(codec);
2968 if (err < 0)
2969 return err;
2970 if (codec->patch_ops.unsol_event)
2971 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2972 return 0;
2973}
2974
2975static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
2976{
2977 if (get_pin_presence(codec, 0x0a)) {
2978 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2979 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2980 } else {
2981 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
2982 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
2983 }
2984}
2985
2986static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
2987{
2988 switch (res >> 26) {
2989 case STAC_HP_EVENT:
2990 stac9872_vaio_hp_detect(codec, res);
2991 break;
2992 }
2993}
2994
2995static struct hda_codec_ops stac9872_vaio_patch_ops = {
2996 .build_controls = stac92xx_build_controls,
2997 .build_pcms = stac92xx_build_pcms,
2998 .init = stac9872_vaio_init,
2999 .free = stac92xx_free,
3000 .unsol_event = stac9872_vaio_unsol_event,
3001#ifdef CONFIG_PM
3002 .resume = stac92xx_resume,
3003#endif
3004};
3005
6d859065
GM		 3006enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3007 CXD9872RD_VAIO,
3008 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3009 STAC9872AK_VAIO,
3010 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3011 STAC9872K_VAIO,
3012 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3013 CXD9872AKD_VAIO,
3014 STAC_9872_MODELS,
3015};
3016
3017static const char *stac9872_models[STAC_9872_MODELS] = {
3018 [CXD9872RD_VAIO] = "vaio",
3019 [CXD9872AKD_VAIO] = "vaio-ar",
3020};
3021
3022static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3023 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3024 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3025 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3026 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3027 {}
3028};
3029
6d859065 3030static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3031{
3032 struct sigmatel_spec *spec;
3033 int board_config;
3034
f5fcc13c
TI		 3035 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3036 stac9872_models,
3037 stac9872_cfg_tbl);
db064e50
TI		 3038 if (board_config < 0)
3039 /* unknown config, let generic-parser do its job... */
3040 return snd_hda_parse_generic_codec(codec);
3041
3042 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3043 if (spec == NULL)
3044 return -ENOMEM;
3045
3046 codec->spec = spec;
3047 switch (board_config) {
6d859065
GM		 3048 case CXD9872RD_VAIO:
3049 case STAC9872AK_VAIO:
3050 case STAC9872K_VAIO:
db064e50
TI		 3051 spec->mixer = vaio_mixer;
3052 spec->init = vaio_init;
3053 spec->multiout.max_channels = 2;
3054 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3055 spec->multiout.dac_nids = vaio_dacs;
3056 spec->multiout.hp_nid = VAIO_HP_DAC;
3057 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3058 spec->adc_nids = vaio_adcs;
3059 spec->input_mux = &vaio_mux;
3060 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3061 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3062 break;
6d859065
GM		 3063
3064 case CXD9872AKD_VAIO:
3065 spec->mixer = vaio_ar_mixer;
3066 spec->init = vaio_ar_init;
3067 spec->multiout.max_channels = 2;
3068 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3069 spec->multiout.dac_nids = vaio_dacs;
3070 spec->multiout.hp_nid = VAIO_HP_DAC;
3071 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3072 spec->adc_nids = vaio_adcs;
3073 spec->input_mux = &vaio_mux;
3074 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3075 codec->patch_ops = stac9872_patch_ops;
6d859065 3076 break;
db064e50
TI		 3077 }
3078
db064e50
TI		 3079 return 0;
3080}
3081
3082
2f2f4251
M		 3083/*
3084 * patch entries
3085 */
3086struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3087 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3088 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3089 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3090 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3091 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3092 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3093 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3094 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3095 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3096 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3097 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3098 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3099 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3100 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3101 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3102 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3103 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3104 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3105 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3106 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3107 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3108 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3109 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3110 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3111 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3112 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3113 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3114 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3115 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3116 /* The following does not take into account .id=0x83847661 when subsys =
3117 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3118 * currently not fully supported.
3119 */
3120 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3121 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3122 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3123 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3124 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3125 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3126 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3127 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3128 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3129 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3130 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
2f2f4251
M		 3131 {} /* terminator */
3132};
Clone of davem's net-next-2.6 tree