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ALSA: hda - Make the HP EliteBook 8530p use AD1884A model laptop
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
72474be6 41#define STAC_VREF_EVENT 0x40
4e55096e 42
f5fcc13c
TI		 43enum {
44 STAC_REF,
bf277785 45 STAC_9200_OQO,
dfe495d0
TI		 46 STAC_9200_DELL_D21,
47 STAC_9200_DELL_D22,
48 STAC_9200_DELL_D23,
49 STAC_9200_DELL_M21,
50 STAC_9200_DELL_M22,
51 STAC_9200_DELL_M23,
52 STAC_9200_DELL_M24,
53 STAC_9200_DELL_M25,
54 STAC_9200_DELL_M26,
55 STAC_9200_DELL_M27,
1194b5b7 56 STAC_9200_GATEWAY,
117f257d 57 STAC_9200_PANASONIC,
f5fcc13c
TI		 58 STAC_9200_MODELS
59};
60
61enum {
62 STAC_9205_REF,
dfe495d0 63 STAC_9205_DELL_M42,
ae0a8ed8
TD		 64 STAC_9205_DELL_M43,
65 STAC_9205_DELL_M44,
f5fcc13c
TI		 66 STAC_9205_MODELS
67};
68
e1f0d669
MR		 69enum {
70 STAC_92HD73XX_REF,
a7662640 71 STAC_DELL_M6,
6b3ab21e 72 STAC_DELL_EQ,
e1f0d669
MR		 73 STAC_92HD73XX_MODELS
74};
75
d0513fc6
MR		 76enum {
77 STAC_92HD83XXX_REF,
78 STAC_92HD83XXX_MODELS
79};
80
e035b841
MR		 81enum {
82 STAC_92HD71BXX_REF,
a7662640
MR		 83 STAC_DELL_M4_1,
84 STAC_DELL_M4_2,
6a14f585 85 STAC_HP_M4,
e035b841
MR		 86 STAC_92HD71BXX_MODELS
87};
88
8e21c34c
TD		 89enum {
90 STAC_925x_REF,
91 STAC_M2_2,
92 STAC_MA6,
2c11f955 93 STAC_PA6,
8e21c34c
TD		 94 STAC_925x_MODELS
95};
96
f5fcc13c
TI		 97enum {
98 STAC_D945_REF,
99 STAC_D945GTP3,
100 STAC_D945GTP5,
5d5d3bc3
IZ		 101 STAC_INTEL_MAC_V1,
102 STAC_INTEL_MAC_V2,
103 STAC_INTEL_MAC_V3,
104 STAC_INTEL_MAC_V4,
105 STAC_INTEL_MAC_V5,
536319af
NB		 106 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
107 * is given, one of the above models will be
108 * chosen according to the subsystem id. */
dfe495d0 109 /* for backward compatibility */
f5fcc13c 110 STAC_MACMINI,
3fc24d85 111 STAC_MACBOOK,
6f0778d8
NB		 112 STAC_MACBOOK_PRO_V1,
113 STAC_MACBOOK_PRO_V2,
f16928fb 114 STAC_IMAC_INTEL,
0dae0f83 115 STAC_IMAC_INTEL_20,
8c650087 116 STAC_ECS_202,
dfe495d0
TI		 117 STAC_922X_DELL_D81,
118 STAC_922X_DELL_D82,
119 STAC_922X_DELL_M81,
120 STAC_922X_DELL_M82,
f5fcc13c
TI		 121 STAC_922X_MODELS
122};
123
124enum {
125 STAC_D965_REF,
126 STAC_D965_3ST,
127 STAC_D965_5ST,
4ff076e5 128 STAC_DELL_3ST,
8e9068b1 129 STAC_DELL_BIOS,
f5fcc13c
TI		 130 STAC_927X_MODELS
131};
403d1944 132
2f2f4251 133struct sigmatel_spec {
c8b6bf9b 134 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 135 unsigned int num_mixers;
136
403d1944 137 int board_config;
c7d4b2fa 138 unsigned int surr_switch: 1;
403d1944
MP		 139 unsigned int line_switch: 1;
140 unsigned int mic_switch: 1;
3cc08dc6 141 unsigned int alt_switch: 1;
82bc955f 142 unsigned int hp_detect: 1;
00ef50c2 143 unsigned int spdif_mute: 1;
c7d4b2fa 144
4fe5195c 145 /* gpio lines */
0fc9dec4 146 unsigned int eapd_mask;
4fe5195c
MR		 147 unsigned int gpio_mask;
148 unsigned int gpio_dir;
149 unsigned int gpio_data;
150 unsigned int gpio_mute;
151
8daaaa97
MR		 152 /* stream */
153 unsigned int stream_delay;
154
4fe5195c 155 /* analog loopback */
e1f0d669
MR		 156 unsigned char aloopback_mask;
157 unsigned char aloopback_shift;
8259980e 158
a64135a2
MR		 159 /* power management */
160 unsigned int num_pwrs;
d0513fc6 161 unsigned int *pwr_mapping;
a64135a2 162 hda_nid_t *pwr_nids;
b76c850f 163 hda_nid_t *dac_list;
a64135a2 164
2f2f4251 165 /* playback */
b22b4821 166 struct hda_input_mux *mono_mux;
89385035 167 struct hda_input_mux *amp_mux;
b22b4821 168 unsigned int cur_mmux;
2f2f4251 169 struct hda_multi_out multiout;
3cc08dc6 170 hda_nid_t dac_nids[5];
2f2f4251
M		 171
172 /* capture */
173 hda_nid_t *adc_nids;
2f2f4251 174 unsigned int num_adcs;
dabbed6f
M		 175 hda_nid_t *mux_nids;
176 unsigned int num_muxes;
8b65727b
MP		 177 hda_nid_t *dmic_nids;
178 unsigned int num_dmics;
e1f0d669 179 hda_nid_t *dmux_nids;
1697055e 180 unsigned int num_dmuxes;
d9737751
MR		 181 hda_nid_t *smux_nids;
182 unsigned int num_smuxes;
65973632 183 const char **spdif_labels;
d9737751 184
dabbed6f 185 hda_nid_t dig_in_nid;
b22b4821 186 hda_nid_t mono_nid;
1cd2224c
MR		 187 hda_nid_t anabeep_nid;
188 hda_nid_t digbeep_nid;
2f2f4251 189
2f2f4251
M		 190 /* pin widgets */
191 hda_nid_t *pin_nids;
192 unsigned int num_pins;
2f2f4251 193 unsigned int *pin_configs;
11b44bbd 194 unsigned int *bios_pin_configs;
2f2f4251
M		 195
196 /* codec specific stuff */
197 struct hda_verb *init;
c8b6bf9b 198 struct snd_kcontrol_new *mixer;
2f2f4251
M		 199
200 /* capture source */
8b65727b 201 struct hda_input_mux *dinput_mux;
e1f0d669 202 unsigned int cur_dmux[2];
c7d4b2fa 203 struct hda_input_mux *input_mux;
3cc08dc6 204 unsigned int cur_mux[3];
d9737751
MR		 205 struct hda_input_mux *sinput_mux;
206 unsigned int cur_smux[2];
2a9c7816
MR		 207 unsigned int cur_amux;
208 hda_nid_t *amp_nids;
209 unsigned int num_amps;
8daaaa97 210 unsigned int powerdown_adcs;
2f2f4251 211
403d1944
MP		 212 /* i/o switches */
213 unsigned int io_switch[2];
0fb87bb4 214 unsigned int clfe_swap;
7c2ba97b 215 unsigned int hp_switch;
5f10c4a9 216 unsigned int aloopback;
2f2f4251 217
c7d4b2fa
M		 218 struct hda_pcm pcm_rec[2]; /* PCM information */
219
220 /* dynamic controls and input_mux */
221 struct auto_pin_cfg autocfg;
222 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 223 struct snd_kcontrol_new *kctl_alloc;
8b65727b 224 struct hda_input_mux private_dimux;
c7d4b2fa 225 struct hda_input_mux private_imux;
d9737751 226 struct hda_input_mux private_smux;
89385035 227 struct hda_input_mux private_amp_mux;
b22b4821 228 struct hda_input_mux private_mono_mux;
2f2f4251
M		 229};
230
231static hda_nid_t stac9200_adc_nids[1] = {
232 0x03,
233};
234
235static hda_nid_t stac9200_mux_nids[1] = {
236 0x0c,
237};
238
239static hda_nid_t stac9200_dac_nids[1] = {
240 0x02,
241};
242
a64135a2
MR		 243static hda_nid_t stac92hd73xx_pwr_nids[8] = {
244 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
245 0x0f, 0x10, 0x11
246};
247
0ffa9807
MR		 248static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
249 0x26, 0,
250};
251
e1f0d669
MR		 252static hda_nid_t stac92hd73xx_adc_nids[2] = {
253 0x1a, 0x1b
254};
255
2a9c7816
MR		 256#define DELL_M6_AMP 2
257static hda_nid_t stac92hd73xx_amp_nids[3] = {
258 0x0b, 0x0c, 0x0e
89385035
MR		 259};
260
e1f0d669
MR		 261#define STAC92HD73XX_NUM_DMICS 2
262static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
263 0x13, 0x14, 0
264};
265
266#define STAC92HD73_DAC_COUNT 5
267static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
268 0x15, 0x16, 0x17, 0x18, 0x19,
269};
270
271static hda_nid_t stac92hd73xx_mux_nids[4] = {
272 0x28, 0x29, 0x2a, 0x2b,
273};
274
275static hda_nid_t stac92hd73xx_dmux_nids[2] = {
276 0x20, 0x21,
277};
278
d9737751
MR		 279static hda_nid_t stac92hd73xx_smux_nids[2] = {
280 0x22, 0x23,
281};
282
d0513fc6
MR		 283#define STAC92HD83XXX_NUM_DMICS 2
284static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
285 0x11, 0x12, 0
286};
287
288#define STAC92HD81_DAC_COUNT 2
289#define STAC92HD83_DAC_COUNT 3
290static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
291 0x13, 0x14, 0x22,
292};
293
294static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
295 0x17, 0x18,
296};
297
298static hda_nid_t stac92hd83xxx_adc_nids[2] = {
299 0x15, 0x16,
300};
301
302static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
303 0xa, 0xb, 0xd, 0xe,
304};
305
0ffa9807
MR		 306static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
307 0x1e, 0,
308};
309
d0513fc6
MR		 310static unsigned int stac92hd83xxx_pwr_mapping[4] = {
311 0x03, 0x0c, 0x10, 0x40,
312};
313
a64135a2
MR		 314static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
315 0x0a, 0x0d, 0x0f
316};
317
e035b841
MR		 318static hda_nid_t stac92hd71bxx_adc_nids[2] = {
319 0x12, 0x13,
320};
321
322static hda_nid_t stac92hd71bxx_mux_nids[2] = {
323 0x1a, 0x1b
324};
325
4b33c767
MR		 326static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
327 0x1c, 0x1d,
e1f0d669
MR		 328};
329
d9737751
MR		 330static hda_nid_t stac92hd71bxx_smux_nids[2] = {
331 0x24, 0x25,
332};
333
aea7bb0a 334static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 335 0x10, /*0x11, */
336};
337
338#define STAC92HD71BXX_NUM_DMICS 2
339static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
340 0x18, 0x19, 0
341};
342
0ffa9807
MR		 343static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
344 0x22, 0
345};
346
8e21c34c
TD		 347static hda_nid_t stac925x_adc_nids[1] = {
348 0x03,
349};
350
351static hda_nid_t stac925x_mux_nids[1] = {
352 0x0f,
353};
354
355static hda_nid_t stac925x_dac_nids[1] = {
356 0x02,
357};
358
f6e9852a
TI		 359#define STAC925X_NUM_DMICS 1
360static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
361 0x15, 0
2c11f955
TD		 362};
363
1697055e
TI		 364static hda_nid_t stac925x_dmux_nids[1] = {
365 0x14,
366};
367
2f2f4251
M		 368static hda_nid_t stac922x_adc_nids[2] = {
369 0x06, 0x07,
370};
371
372static hda_nid_t stac922x_mux_nids[2] = {
373 0x12, 0x13,
374};
375
3cc08dc6
MP		 376static hda_nid_t stac927x_adc_nids[3] = {
377 0x07, 0x08, 0x09
378};
379
380static hda_nid_t stac927x_mux_nids[3] = {
381 0x15, 0x16, 0x17
382};
383
d9737751
MR		 384static hda_nid_t stac927x_smux_nids[1] = {
385 0x21,
386};
387
b76c850f
MR		 388static hda_nid_t stac927x_dac_nids[6] = {
389 0x02, 0x03, 0x04, 0x05, 0x06, 0
390};
391
e1f0d669
MR		 392static hda_nid_t stac927x_dmux_nids[1] = {
393 0x1b,
394};
395
7f16859a
MR		 396#define STAC927X_NUM_DMICS 2
397static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
398 0x13, 0x14, 0
399};
400
65973632
MR		 401static const char *stac927x_spdif_labels[5] = {
402 "Digital Playback", "ADAT", "Analog Mux 1",
403 "Analog Mux 2", "Analog Mux 3"
404};
405
f3302a59
MP		 406static hda_nid_t stac9205_adc_nids[2] = {
407 0x12, 0x13
408};
409
410static hda_nid_t stac9205_mux_nids[2] = {
411 0x19, 0x1a
412};
413
e1f0d669 414static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 415 0x1d,
e1f0d669
MR		 416};
417
d9737751
MR		 418static hda_nid_t stac9205_smux_nids[1] = {
419 0x21,
420};
421
f6e9852a
TI		 422#define STAC9205_NUM_DMICS 2
423static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
424 0x17, 0x18, 0
8b65727b
MP		 425};
426
c7d4b2fa 427static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 428 0x08, 0x09, 0x0d, 0x0e,
429 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 430};
431
8e21c34c
TD		 432static hda_nid_t stac925x_pin_nids[8] = {
433 0x07, 0x08, 0x0a, 0x0b,
434 0x0c, 0x0d, 0x10, 0x11,
435};
436
2f2f4251
M		 437static hda_nid_t stac922x_pin_nids[10] = {
438 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
439 0x0f, 0x10, 0x11, 0x15, 0x1b,
440};
441
a7662640 442static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 443 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
444 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 445 0x14, 0x22, 0x23
e1f0d669
MR		 446};
447
d0513fc6
MR		 448static hda_nid_t stac92hd83xxx_pin_nids[14] = {
449 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
450 0x0f, 0x10, 0x11, 0x12, 0x13,
451 0x1d, 0x1e, 0x1f, 0x20
452};
0ffa9807 453static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 454 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
455 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 456 0x1f,
e035b841
MR		 457};
458
3cc08dc6
MP		 459static hda_nid_t stac927x_pin_nids[14] = {
460 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
461 0x0f, 0x10, 0x11, 0x12, 0x13,
462 0x14, 0x21, 0x22, 0x23,
463};
464
f3302a59
MP		 465static hda_nid_t stac9205_pin_nids[12] = {
466 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
467 0x0f, 0x14, 0x16, 0x17, 0x18,
468 0x21, 0x22,
f3302a59
MP		 469};
470
89385035
MR		 471#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
472
473static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
474 struct snd_ctl_elem_value *ucontrol)
475{
476 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
477 struct sigmatel_spec *spec = codec->spec;
478 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
479
480 kcontrol->private_value ^= get_amp_nid(kcontrol);
481 kcontrol->private_value |= nid;
482
483 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
484}
485
486static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
487 struct snd_ctl_elem_value *ucontrol)
488{
489 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
490 struct sigmatel_spec *spec = codec->spec;
491 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
492
493 kcontrol->private_value ^= get_amp_nid(kcontrol);
494 kcontrol->private_value |= nid;
495
496 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
497}
498
8b65727b
MP		 499static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
500 struct snd_ctl_elem_info *uinfo)
501{
502 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
503 struct sigmatel_spec *spec = codec->spec;
504 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
505}
506
507static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
508 struct snd_ctl_elem_value *ucontrol)
509{
510 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
511 struct sigmatel_spec *spec = codec->spec;
e1f0d669 512 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 513
e1f0d669 514 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 515 return 0;
516}
517
518static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
519 struct snd_ctl_elem_value *ucontrol)
520{
521 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
522 struct sigmatel_spec *spec = codec->spec;
e1f0d669 523 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 524
525 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 526 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 527}
528
d9737751
MR		 529static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
530 struct snd_ctl_elem_info *uinfo)
531{
532 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
533 struct sigmatel_spec *spec = codec->spec;
534 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
535}
536
537static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
538 struct snd_ctl_elem_value *ucontrol)
539{
540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
541 struct sigmatel_spec *spec = codec->spec;
542 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
543
544 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
545 return 0;
546}
547
548static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
549 struct snd_ctl_elem_value *ucontrol)
550{
551 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
552 struct sigmatel_spec *spec = codec->spec;
00ef50c2 553 struct hda_input_mux *smux = &spec->private_smux;
d9737751 554 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 555 int err, val;
556 hda_nid_t nid;
d9737751 557
00ef50c2 558 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 559 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 560 if (err < 0)
561 return err;
562
563 if (spec->spdif_mute) {
564 if (smux_idx == 0)
565 nid = spec->multiout.dig_out_nid;
566 else
567 nid = codec->slave_dig_outs[smux_idx - 1];
568 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
569 val = AMP_OUT_MUTE;
00ef50c2 570 else
c1e99bd9 571 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 572 /* un/mute SPDIF out */
573 snd_hda_codec_write_cache(codec, nid, 0,
574 AC_VERB_SET_AMP_GAIN_MUTE, val);
575 }
576 return 0;
d9737751
MR		 577}
578
c8b6bf9b 579static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 580{
581 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
582 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 583 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 584}
585
c8b6bf9b 586static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 587{
588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
589 struct sigmatel_spec *spec = codec->spec;
590 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
591
592 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
593 return 0;
594}
595
c8b6bf9b 596static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 struct sigmatel_spec *spec = codec->spec;
600 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
601
c7d4b2fa 602 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 603 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
604}
605
b22b4821
MR		 606static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
607 struct snd_ctl_elem_info *uinfo)
608{
609 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
610 struct sigmatel_spec *spec = codec->spec;
611 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
612}
613
614static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619
620 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
621 return 0;
622}
623
624static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
625 struct snd_ctl_elem_value *ucontrol)
626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629
630 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
631 spec->mono_nid, &spec->cur_mmux);
632}
633
89385035
MR		 634static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_info *uinfo)
636{
637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
638 struct sigmatel_spec *spec = codec->spec;
639 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
640}
641
642static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
646 struct sigmatel_spec *spec = codec->spec;
647
648 ucontrol->value.enumerated.item[0] = spec->cur_amux;
649 return 0;
650}
651
652static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_value *ucontrol)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 struct snd_kcontrol *ctl =
658 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
659 if (!ctl)
660 return -EINVAL;
661
662 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
663 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
664
665 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
666 0, &spec->cur_amux);
667}
668
5f10c4a9
ML		 669#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
670
671static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
672 struct snd_ctl_elem_value *ucontrol)
673{
674 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 675 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 676 struct sigmatel_spec *spec = codec->spec;
677
e1f0d669
MR		 678 ucontrol->value.integer.value[0] = !!(spec->aloopback &
679 (spec->aloopback_mask << idx));
5f10c4a9
ML		 680 return 0;
681}
682
683static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
684 struct snd_ctl_elem_value *ucontrol)
685{
686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
687 struct sigmatel_spec *spec = codec->spec;
e1f0d669 688 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 689 unsigned int dac_mode;
e1f0d669 690 unsigned int val, idx_val;
5f10c4a9 691
e1f0d669
MR		 692 idx_val = spec->aloopback_mask << idx;
693 if (ucontrol->value.integer.value[0])
694 val = spec->aloopback | idx_val;
695 else
696 val = spec->aloopback & ~idx_val;
68ea7b2f 697 if (spec->aloopback == val)
5f10c4a9
ML		 698 return 0;
699
68ea7b2f 700 spec->aloopback = val;
5f10c4a9 701
e1f0d669
MR		 702 /* Only return the bits defined by the shift value of the
703 * first two bytes of the mask
704 */
5f10c4a9 705 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 706 kcontrol->private_value & 0xFFFF, 0x0);
707 dac_mode >>= spec->aloopback_shift;
5f10c4a9 708
e1f0d669 709 if (spec->aloopback & idx_val) {
5f10c4a9 710 snd_hda_power_up(codec);
e1f0d669 711 dac_mode |= idx_val;
5f10c4a9
ML		 712 } else {
713 snd_hda_power_down(codec);
e1f0d669 714 dac_mode &= ~idx_val;
5f10c4a9
ML		 715 }
716
717 snd_hda_codec_write_cache(codec, codec->afg, 0,
718 kcontrol->private_value >> 16, dac_mode);
719
720 return 1;
721}
722
c7d4b2fa 723static struct hda_verb stac9200_core_init[] = {
2f2f4251 724 /* set dac0mux for dac converter */
c7d4b2fa 725 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 726 {}
727};
728
1194b5b7
TI		 729static struct hda_verb stac9200_eapd_init[] = {
730 /* set dac0mux for dac converter */
731 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
732 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
733 {}
734};
735
e1f0d669
MR		 736static struct hda_verb stac92hd73xx_6ch_core_init[] = {
737 /* set master volume and direct control */
738 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
739 /* setup audio connections */
740 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
741 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
742 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
743 /* setup adcs to point to mixer */
744 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
745 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 746 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
747 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
748 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
749 /* setup import muxs */
750 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
751 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
752 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
753 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
754 {}
755};
756
d654a660
MR		 757static struct hda_verb dell_eq_core_init[] = {
758 /* set master volume to max value without distortion
759 * and direct control */
760 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
761 /* setup audio connections */
762 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 763 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
764 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 765 /* setup adcs to point to mixer */
766 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
767 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
768 /* setup import muxs */
769 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
772 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
773 {}
774};
775
52fe0f9d 776static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 777 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 778 /* setup audio connections */
7747ecce
MR		 779 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
780 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 781 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
782 /* setup adcs to point to mixer */
783 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
784 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 /* setup import muxs */
786 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
787 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
790 {}
791};
792
e1f0d669
MR		 793static struct hda_verb stac92hd73xx_8ch_core_init[] = {
794 /* set master volume and direct control */
795 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
796 /* setup audio connections */
797 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
798 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
799 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
800 /* connect hp ports to dac3 */
801 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
802 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
803 /* setup adcs to point to mixer */
804 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
805 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 806 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
807 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
808 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
809 /* setup import muxs */
810 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
811 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
814 {}
815};
816
817static struct hda_verb stac92hd73xx_10ch_core_init[] = {
818 /* set master volume and direct control */
819 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
820 /* setup audio connections */
821 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
822 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
823 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
824 /* dac3 is connected to import3 mux */
825 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
826 /* connect hp ports to dac4 */
827 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
828 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
829 /* setup adcs to point to mixer */
830 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
831 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 832 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
833 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 /* setup import muxs */
836 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
837 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
840 {}
841};
842
d0513fc6
MR		 843static struct hda_verb stac92hd83xxx_core_init[] = {
844 /* start of config #1 */
845 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
846
847 /* start of config #2 */
848 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
849 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
851
852 /* power state controls amps */
853 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
854};
855
e035b841 856static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 857 /* set master volume and direct control */
858 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
859 /* connect headphone jack to dac1 */
860 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 861 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
862 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
863 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
864 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 865};
866
4b33c767 867#define HD_DISABLE_PORTF 2
541eee87 868static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 869 /* start of config #1 */
870
871 /* connect port 0f to audio mixer */
872 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 873 /* unmute right and left channels for node 0x0f */
874 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
875 /* start of config #2 */
876
e035b841
MR		 877 /* set master volume and direct control */
878 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
879 /* connect headphone jack to dac1 */
880 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 881 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 882 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
883 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 884 {}
885};
886
8e21c34c
TD		 887static struct hda_verb stac925x_core_init[] = {
888 /* set dac0mux for dac converter */
889 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
890 {}
891};
892
c7d4b2fa 893static struct hda_verb stac922x_core_init[] = {
2f2f4251 894 /* set master volume and direct control */
c7d4b2fa 895 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 896 {}
897};
898
93ed1503 899static struct hda_verb d965_core_init[] = {
19039bd0 900 /* set master volume and direct control */
93ed1503 901 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 902 /* unmute node 0x1b */
903 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
904 /* select node 0x03 as DAC */
905 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
906 {}
907};
908
3cc08dc6
MP		 909static struct hda_verb stac927x_core_init[] = {
910 /* set master volume and direct control */
911 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 912 /* enable analog pc beep path */
913 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 914 {}
915};
916
f3302a59
MP		 917static struct hda_verb stac9205_core_init[] = {
918 /* set master volume and direct control */
919 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 920 /* enable analog pc beep path */
921 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 922 {}
923};
924
b22b4821
MR		 925#define STAC_MONO_MUX \
926 { \
927 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
928 .name = "Mono Mux", \
929 .count = 1, \
930 .info = stac92xx_mono_mux_enum_info, \
931 .get = stac92xx_mono_mux_enum_get, \
932 .put = stac92xx_mono_mux_enum_put, \
933 }
934
89385035
MR		 935#define STAC_AMP_MUX \
936 { \
937 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
938 .name = "Amp Selector Capture Switch", \
939 .count = 1, \
940 .info = stac92xx_amp_mux_enum_info, \
941 .get = stac92xx_amp_mux_enum_get, \
942 .put = stac92xx_amp_mux_enum_put, \
943 }
944
945#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
946 { \
947 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
948 .name = xname, \
949 .index = 0, \
950 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
951 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
953 .info = stac92xx_amp_volume_info, \
954 .get = stac92xx_amp_volume_get, \
955 .put = stac92xx_amp_volume_put, \
956 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
957 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
958 }
959
9e05b7a3 960#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 961 { \
962 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
963 .name = "Input Source", \
9e05b7a3 964 .count = cnt, \
ca7c5a8b
ML		 965 .info = stac92xx_mux_enum_info, \
966 .get = stac92xx_mux_enum_get, \
967 .put = stac92xx_mux_enum_put, \
968 }
969
e1f0d669 970#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 971 { \
972 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
973 .name = "Analog Loopback", \
e1f0d669 974 .count = cnt, \
5f10c4a9
ML		 975 .info = stac92xx_aloopback_info, \
976 .get = stac92xx_aloopback_get, \
977 .put = stac92xx_aloopback_put, \
978 .private_value = verb_read | (verb_write << 16), \
979 }
980
c8b6bf9b 981static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 982 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
983 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 984 STAC_INPUT_SOURCE(1),
2f2f4251
M		 985 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
986 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 987 { } /* end */
988};
989
2a9c7816 990#define DELL_M6_MIXER 6
e1f0d669 991static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 992 /* start of config #1 */
e1f0d669
MR		 993 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
994 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
995
e1f0d669
MR		 996 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
997 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
998
2a9c7816
MR		 999 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1000 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1001
1002 /* start of config #2 */
1003 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1004 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1005
e1f0d669
MR		 1006 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1007 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1008
2a9c7816
MR		 1009 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013
1014 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1015 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016
e1f0d669
MR		 1017 { } /* end */
1018};
1019
1020static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1021 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1022
e1f0d669
MR		 1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1027 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028
1029 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1030 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1033 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1036 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1039 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1040
1041 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1042 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1043 { } /* end */
1044};
1045
1046static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1047 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1048
e1f0d669
MR		 1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1053 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054
1055 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1056 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1059 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1062 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1065 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1066
1067 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1068 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1069 { } /* end */
1070};
1071
d0513fc6
MR		 1072
1073static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076
1077 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1078 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079
1080 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1082
1083 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1084 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1085
1086 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1087 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1088
1089 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1090 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1091
1092 /*
1093 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1094 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1095 */
1096 { } /* end */
1097};
1098
541eee87 1099static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1100 STAC_INPUT_SOURCE(2),
4b33c767 1101 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1102
9b35947f
MR		 1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1105
1106 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1107 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1108 /* analog pc-beep replaced with digital beep support */
1109 /*
f7c5dda2
MR		 1110 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1111 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1112 */
f7c5dda2 1113
687cb98e
MR		 1114 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1115 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1116
687cb98e
MR		 1117 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1118 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1119
1120 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1121 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1122
1123 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1124 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1125 { } /* end */
1126};
1127
541eee87 1128static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1129 STAC_INPUT_SOURCE(2),
1130 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1131
541eee87
MR		 1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1134
1135 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1136 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1137 { } /* end */
1138};
1139
8e21c34c 1140static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1141 STAC_INPUT_SOURCE(1),
8e21c34c 1142 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1143 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1144 { } /* end */
1145};
1146
9e05b7a3 1147static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1148 STAC_INPUT_SOURCE(2),
e1f0d669 1149 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1150
1151 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1152 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1153
1154 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1155 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1156 { } /* end */
1157};
1158
19039bd0 1159/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1160static struct snd_kcontrol_new stac922x_mixer[] = {
1161 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1162 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1163 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1164
1165 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1166 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1167 { } /* end */
1168};
1169
9e05b7a3 1170
d1d985f0 1171static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1172 STAC_INPUT_SOURCE(3),
e1f0d669 1173 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1174
9e05b7a3
ML		 1175 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1176 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1177
1178 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1179 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1180
1181 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1182 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1183 { } /* end */
1184};
1185
1697055e
TI		 1186static struct snd_kcontrol_new stac_dmux_mixer = {
1187 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1188 .name = "Digital Input Source",
1189 /* count set later */
1190 .info = stac92xx_dmux_enum_info,
1191 .get = stac92xx_dmux_enum_get,
1192 .put = stac92xx_dmux_enum_put,
1193};
1194
d9737751
MR		 1195static struct snd_kcontrol_new stac_smux_mixer = {
1196 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1197 .name = "IEC958 Playback Source",
d9737751
MR		 1198 /* count set later */
1199 .info = stac92xx_smux_enum_info,
1200 .get = stac92xx_smux_enum_get,
1201 .put = stac92xx_smux_enum_put,
1202};
1203
2134ea4f
TI		 1204static const char *slave_vols[] = {
1205 "Front Playback Volume",
1206 "Surround Playback Volume",
1207 "Center Playback Volume",
1208 "LFE Playback Volume",
1209 "Side Playback Volume",
1210 "Headphone Playback Volume",
1211 "Headphone Playback Volume",
1212 "Speaker Playback Volume",
1213 "External Speaker Playback Volume",
1214 "Speaker2 Playback Volume",
1215 NULL
1216};
1217
1218static const char *slave_sws[] = {
1219 "Front Playback Switch",
1220 "Surround Playback Switch",
1221 "Center Playback Switch",
1222 "LFE Playback Switch",
1223 "Side Playback Switch",
1224 "Headphone Playback Switch",
1225 "Headphone Playback Switch",
1226 "Speaker Playback Switch",
1227 "External Speaker Playback Switch",
1228 "Speaker2 Playback Switch",
edb54a55 1229 "IEC958 Playback Switch",
2134ea4f
TI		 1230 NULL
1231};
1232
2f2f4251
M		 1233static int stac92xx_build_controls(struct hda_codec *codec)
1234{
1235 struct sigmatel_spec *spec = codec->spec;
1236 int err;
c7d4b2fa 1237 int i;
2f2f4251
M		 1238
1239 err = snd_hda_add_new_ctls(codec, spec->mixer);
1240 if (err < 0)
1241 return err;
c7d4b2fa
M		 1242
1243 for (i = 0; i < spec->num_mixers; i++) {
1244 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1245 if (err < 0)
1246 return err;
1247 }
1697055e
TI		 1248 if (spec->num_dmuxes > 0) {
1249 stac_dmux_mixer.count = spec->num_dmuxes;
1250 err = snd_ctl_add(codec->bus->card,
1251 snd_ctl_new1(&stac_dmux_mixer, codec));
1252 if (err < 0)
1253 return err;
1254 }
d9737751 1255 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1256 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1257 struct hda_input_mux *smux = &spec->private_smux;
1258 /* check for mute support on SPDIF out */
1259 if (wcaps & AC_WCAP_OUT_AMP) {
1260 smux->items[smux->num_items].label = "Off";
1261 smux->items[smux->num_items].index = 0;
1262 smux->num_items++;
1263 spec->spdif_mute = 1;
1264 }
d9737751
MR		 1265 stac_smux_mixer.count = spec->num_smuxes;
1266 err = snd_ctl_add(codec->bus->card,
1267 snd_ctl_new1(&stac_smux_mixer, codec));
1268 if (err < 0)
1269 return err;
1270 }
c7d4b2fa 1271
dabbed6f
M		 1272 if (spec->multiout.dig_out_nid) {
1273 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1274 if (err < 0)
1275 return err;
9a08160b
TI		 1276 err = snd_hda_create_spdif_share_sw(codec,
1277 &spec->multiout);
1278 if (err < 0)
1279 return err;
1280 spec->multiout.share_spdif = 1;
dabbed6f 1281 }
da74ae3e 1282 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1283 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1284 if (err < 0)
1285 return err;
1286 }
2134ea4f
TI		 1287
1288 /* if we have no master control, let's create it */
1289 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1290 unsigned int vmaster_tlv[4];
2134ea4f 1291 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1292 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1293 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1294 vmaster_tlv, slave_vols);
2134ea4f
TI		 1295 if (err < 0)
1296 return err;
1297 }
1298 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1299 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1300 NULL, slave_sws);
1301 if (err < 0)
1302 return err;
1303 }
1304
dabbed6f 1305 return 0;
2f2f4251
M		 1306}
1307
403d1944 1308static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1309 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1310 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1311};
1312
dfe495d0
TI		 1313/*
1314 STAC 9200 pin configs for
1315 102801A8
1316 102801DE
1317 102801E8
1318*/
1319static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1320 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1321 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1322};
1323
1324/*
1325 STAC 9200 pin configs for
1326 102801C0
1327 102801C1
1328*/
1329static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1330 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1331 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1332};
1333
1334/*
1335 STAC 9200 pin configs for
1336 102801C4 (Dell Dimension E310)
1337 102801C5
1338 102801C7
1339 102801D9
1340 102801DA
1341 102801E3
1342*/
1343static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1344 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1345 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1346};
1347
1348
1349/*
1350 STAC 9200-32 pin configs for
1351 102801B5 (Dell Inspiron 630m)
1352 102801D8 (Dell Inspiron 640m)
1353*/
1354static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1355 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1356 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1357};
1358
1359/*
1360 STAC 9200-32 pin configs for
1361 102801C2 (Dell Latitude D620)
1362 102801C8
1363 102801CC (Dell Latitude D820)
1364 102801D4
1365 102801D6
1366*/
1367static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1368 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1369 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1370};
1371
1372/*
1373 STAC 9200-32 pin configs for
1374 102801CE (Dell XPS M1710)
1375 102801CF (Dell Precision M90)
1376*/
1377static unsigned int dell9200_m23_pin_configs[8] = {
1378 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1379 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1380};
1381
1382/*
1383 STAC 9200-32 pin configs for
1384 102801C9
1385 102801CA
1386 102801CB (Dell Latitude 120L)
1387 102801D3
1388*/
1389static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1390 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1391 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1392};
1393
1394/*
1395 STAC 9200-32 pin configs for
1396 102801BD (Dell Inspiron E1505n)
1397 102801EE
1398 102801EF
1399*/
1400static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1401 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1402 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1403};
1404
1405/*
1406 STAC 9200-32 pin configs for
1407 102801F5 (Dell Inspiron 1501)
1408 102801F6
1409*/
1410static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1411 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1412 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1413};
1414
1415/*
1416 STAC 9200-32
1417 102801CD (Dell Inspiron E1705/9400)
1418*/
1419static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1420 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1421 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1422};
1423
bf277785
TD		 1424static unsigned int oqo9200_pin_configs[8] = {
1425 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1426 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1427};
1428
dfe495d0 1429
f5fcc13c
TI		 1430static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1431 [STAC_REF] = ref9200_pin_configs,
bf277785 1432 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1433 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1434 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1435 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1436 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1437 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1438 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1439 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1440 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1441 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1442 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1443 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1444};
1445
f5fcc13c
TI		 1446static const char *stac9200_models[STAC_9200_MODELS] = {
1447 [STAC_REF] = "ref",
bf277785 1448 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1449 [STAC_9200_DELL_D21] = "dell-d21",
1450 [STAC_9200_DELL_D22] = "dell-d22",
1451 [STAC_9200_DELL_D23] = "dell-d23",
1452 [STAC_9200_DELL_M21] = "dell-m21",
1453 [STAC_9200_DELL_M22] = "dell-m22",
1454 [STAC_9200_DELL_M23] = "dell-m23",
1455 [STAC_9200_DELL_M24] = "dell-m24",
1456 [STAC_9200_DELL_M25] = "dell-m25",
1457 [STAC_9200_DELL_M26] = "dell-m26",
1458 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1459 [STAC_9200_GATEWAY] = "gateway",
117f257d 1460 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1461};
1462
1463static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1464 /* SigmaTel reference board */
1465 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1466 "DFI LanParty", STAC_REF),
e7377071 1467 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1468 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1469 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1471 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1473 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1475 "unknown Dell", STAC_9200_DELL_D22),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1477 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1479 "Dell Latitude D620", STAC_9200_DELL_M22),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1481 "unknown Dell", STAC_9200_DELL_D23),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1483 "unknown Dell", STAC_9200_DELL_D23),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1485 "unknown Dell", STAC_9200_DELL_M22),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1487 "unknown Dell", STAC_9200_DELL_M24),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1489 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1491 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1493 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1495 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1497 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1499 "Dell Precision M90", STAC_9200_DELL_M23),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1501 "unknown Dell", STAC_9200_DELL_M22),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1503 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1505 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1507 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1509 "unknown Dell", STAC_9200_DELL_D23),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1511 "unknown Dell", STAC_9200_DELL_D23),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1513 "unknown Dell", STAC_9200_DELL_D21),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1517 "unknown Dell", STAC_9200_DELL_D21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1519 "unknown Dell", STAC_9200_DELL_M25),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1521 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1523 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1525 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1526 /* Panasonic */
117f257d 1527 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1528 /* Gateway machines needs EAPD to be set on resume */
1529 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1530 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1531 STAC_9200_GATEWAY),
1532 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1533 STAC_9200_GATEWAY),
bf277785
TD		 1534 /* OQO Mobile */
1535 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1536 {} /* terminator */
1537};
1538
8e21c34c
TD		 1539static unsigned int ref925x_pin_configs[8] = {
1540 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1541 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1542};
1543
1544static unsigned int stac925x_MA6_pin_configs[8] = {
1545 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1546 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1547};
1548
2c11f955
TD		 1549static unsigned int stac925x_PA6_pin_configs[8] = {
1550 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1551 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1552};
1553
8e21c34c 1554static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1555 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1556 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1557};
1558
1559static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1560 [STAC_REF] = ref925x_pin_configs,
1561 [STAC_M2_2] = stac925xM2_2_pin_configs,
1562 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1563 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1564};
1565
1566static const char *stac925x_models[STAC_925x_MODELS] = {
1567 [STAC_REF] = "ref",
1568 [STAC_M2_2] = "m2-2",
1569 [STAC_MA6] = "m6",
2c11f955 1570 [STAC_PA6] = "pa6",
8e21c34c
TD		 1571};
1572
1573static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1574 /* SigmaTel reference board */
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1576 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1577 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1578 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1579 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1580 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1581 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1582 {} /* terminator */
1583};
1584
a7662640 1585static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1586 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1587 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1588 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1589 0x01452050,
1590};
1591
1592static unsigned int dell_m6_pin_configs[13] = {
1593 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1594 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1595 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1596 0x4f0000f0,
e1f0d669
MR		 1597};
1598
1599static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1600 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1601 [STAC_DELL_M6] = dell_m6_pin_configs,
6b3ab21e 1602 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1603};
1604
1605static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1606 [STAC_92HD73XX_REF] = "ref",
a7662640 1607 [STAC_DELL_M6] = "dell-m6",
6b3ab21e 1608 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1609};
1610
1611static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1612 /* SigmaTel reference board */
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1614 "DFI LanParty", STAC_92HD73XX_REF),
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1616 "unknown Dell", STAC_DELL_M6),
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1618 "unknown Dell", STAC_DELL_M6),
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1620 "unknown Dell", STAC_DELL_M6),
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1622 "unknown Dell", STAC_DELL_M6),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1624 "unknown Dell", STAC_DELL_M6),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1626 "unknown Dell", STAC_DELL_M6),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1628 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1629 {} /* terminator */
1630};
1631
d0513fc6
MR		 1632static unsigned int ref92hd83xxx_pin_configs[14] = {
1633 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1634 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1635 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1636 0x01451160, 0x98560170,
1637};
1638
1639static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1640 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1641};
1642
1643static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1644 [STAC_92HD83XXX_REF] = "ref",
1645};
1646
1647static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1648 /* SigmaTel reference board */
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1650 "DFI LanParty", STAC_92HD71BXX_REF),
1651};
1652
0ffa9807 1653static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1654 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1655 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1656 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1657};
1658
0ffa9807 1659static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1660 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1661 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1662 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1663};
1664
0ffa9807 1665static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1666 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1667 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1668 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1669};
1670
e035b841
MR		 1671static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1672 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1673 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1674 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1675 [STAC_HP_M4] = NULL,
e035b841
MR		 1676};
1677
1678static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1679 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1680 [STAC_DELL_M4_1] = "dell-m4-1",
1681 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1682 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1683};
1684
1685static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1686 /* SigmaTel reference board */
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1688 "DFI LanParty", STAC_92HD71BXX_REF),
9a9e2359
MR		 1689 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1690 "unknown HP", STAC_HP_M4),
a7662640
MR		 1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1692 "unknown Dell", STAC_DELL_M4_1),
1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1694 "unknown Dell", STAC_DELL_M4_1),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1696 "unknown Dell", STAC_DELL_M4_1),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1698 "unknown Dell", STAC_DELL_M4_1),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1700 "unknown Dell", STAC_DELL_M4_1),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1702 "unknown Dell", STAC_DELL_M4_1),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1704 "unknown Dell", STAC_DELL_M4_1),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1706 "unknown Dell", STAC_DELL_M4_2),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1708 "unknown Dell", STAC_DELL_M4_2),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1710 "unknown Dell", STAC_DELL_M4_2),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1712 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1713 {} /* terminator */
1714};
1715
403d1944
MP		 1716static unsigned int ref922x_pin_configs[10] = {
1717 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1718 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1719 0x40000100, 0x40000100,
1720};
1721
dfe495d0
TI		 1722/*
1723 STAC 922X pin configs for
1724 102801A7
1725 102801AB
1726 102801A9
1727 102801D1
1728 102801D2
1729*/
1730static unsigned int dell_922x_d81_pin_configs[10] = {
1731 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1732 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1733 0x01813122, 0x400001f2,
1734};
1735
1736/*
1737 STAC 922X pin configs for
1738 102801AC
1739 102801D0
1740*/
1741static unsigned int dell_922x_d82_pin_configs[10] = {
1742 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1743 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1744 0x01813122, 0x400001f1,
1745};
1746
1747/*
1748 STAC 922X pin configs for
1749 102801BF
1750*/
1751static unsigned int dell_922x_m81_pin_configs[10] = {
1752 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1753 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1754 0x40C003f1, 0x405003f0,
1755};
1756
1757/*
1758 STAC 9221 A1 pin configs for
1759 102801D7 (Dell XPS M1210)
1760*/
1761static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1762 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1763 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1764 0x508003f3, 0x405003f4,
1765};
1766
403d1944 1767static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1768 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1769 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1770 0x02a19120, 0x40000100,
1771};
1772
1773static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1774 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1775 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1776 0x02a19320, 0x40000100,
1777};
1778
5d5d3bc3
IZ		 1779static unsigned int intel_mac_v1_pin_configs[10] = {
1780 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1781 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1782 0x400000fc, 0x400000fb,
1783};
1784
1785static unsigned int intel_mac_v2_pin_configs[10] = {
1786 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1787 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1788 0x400000fc, 0x400000fb,
6f0778d8
NB		 1789};
1790
5d5d3bc3
IZ		 1791static unsigned int intel_mac_v3_pin_configs[10] = {
1792 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1793 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1794 0x400000fc, 0x400000fb,
1795};
1796
5d5d3bc3
IZ		 1797static unsigned int intel_mac_v4_pin_configs[10] = {
1798 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1799 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1800 0x400000fc, 0x400000fb,
1801};
1802
5d5d3bc3
IZ		 1803static unsigned int intel_mac_v5_pin_configs[10] = {
1804 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1805 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1806 0x400000fc, 0x400000fb,
0dae0f83
TI		 1807};
1808
8c650087
MCC		 1809static unsigned int ecs202_pin_configs[10] = {
1810 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1811 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1812 0x9037012e, 0x40e000f2,
1813};
76c08828 1814
19039bd0 1815static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1816 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1817 [STAC_D945GTP3] = d945gtp3_pin_configs,
1818 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1819 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1820 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1821 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1822 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1823 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1824 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1825 /* for backward compatibility */
5d5d3bc3
IZ		 1826 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1827 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1828 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1829 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1830 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1831 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1832 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1833 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1834 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1835 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1836 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1837};
1838
f5fcc13c
TI		 1839static const char *stac922x_models[STAC_922X_MODELS] = {
1840 [STAC_D945_REF] = "ref",
1841 [STAC_D945GTP5] = "5stack",
1842 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1843 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1844 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1845 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1846 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1847 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1848 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1849 /* for backward compatibility */
f5fcc13c 1850 [STAC_MACMINI] = "macmini",
3fc24d85 1851 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1852 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1853 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1854 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1855 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1856 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1857 [STAC_922X_DELL_D81] = "dell-d81",
1858 [STAC_922X_DELL_D82] = "dell-d82",
1859 [STAC_922X_DELL_M81] = "dell-m81",
1860 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1861};
1862
1863static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1864 /* SigmaTel reference board */
1865 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1866 "DFI LanParty", STAC_D945_REF),
1867 /* Intel 945G based systems */
1868 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1869 "Intel D945G", STAC_D945GTP3),
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1871 "Intel D945G", STAC_D945GTP3),
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1873 "Intel D945G", STAC_D945GTP3),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1875 "Intel D945G", STAC_D945GTP3),
1876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1877 "Intel D945G", STAC_D945GTP3),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1879 "Intel D945G", STAC_D945GTP3),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1881 "Intel D945G", STAC_D945GTP3),
1882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1883 "Intel D945G", STAC_D945GTP3),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1885 "Intel D945G", STAC_D945GTP3),
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1887 "Intel D945G", STAC_D945GTP3),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1889 "Intel D945G", STAC_D945GTP3),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1891 "Intel D945G", STAC_D945GTP3),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1893 "Intel D945G", STAC_D945GTP3),
1894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1895 "Intel D945G", STAC_D945GTP3),
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1897 "Intel D945G", STAC_D945GTP3),
1898 /* Intel D945G 5-stack systems */
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1900 "Intel D945G", STAC_D945GTP5),
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1902 "Intel D945G", STAC_D945GTP5),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1904 "Intel D945G", STAC_D945GTP5),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1906 "Intel D945G", STAC_D945GTP5),
1907 /* Intel 945P based systems */
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1909 "Intel D945P", STAC_D945GTP3),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1911 "Intel D945P", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1913 "Intel D945P", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1915 "Intel D945P", STAC_D945GTP3),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1917 "Intel D945P", STAC_D945GTP3),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1919 "Intel D945P", STAC_D945GTP5),
1920 /* other systems */
536319af 1921 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1922 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1923 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1924 /* Dell systems */
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1926 "unknown Dell", STAC_922X_DELL_D81),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1928 "unknown Dell", STAC_922X_DELL_D81),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1930 "unknown Dell", STAC_922X_DELL_D81),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1932 "unknown Dell", STAC_922X_DELL_D82),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1934 "unknown Dell", STAC_922X_DELL_M81),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1936 "unknown Dell", STAC_922X_DELL_D82),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1938 "unknown Dell", STAC_922X_DELL_D81),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1940 "unknown Dell", STAC_922X_DELL_D81),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1942 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1943 /* ECS/PC Chips boards */
1944 SND_PCI_QUIRK(0x1019, 0x2144,
1945 "ECS/PC chips", STAC_ECS_202),
1946 SND_PCI_QUIRK(0x1019, 0x2608,
1947 "ECS/PC chips", STAC_ECS_202),
1948 SND_PCI_QUIRK(0x1019, 0x2633,
1949 "ECS/PC chips P17G/1333", STAC_ECS_202),
1950 SND_PCI_QUIRK(0x1019, 0x2811,
1951 "ECS/PC chips", STAC_ECS_202),
1952 SND_PCI_QUIRK(0x1019, 0x2812,
1953 "ECS/PC chips", STAC_ECS_202),
1954 SND_PCI_QUIRK(0x1019, 0x2813,
1955 "ECS/PC chips", STAC_ECS_202),
1956 SND_PCI_QUIRK(0x1019, 0x2814,
1957 "ECS/PC chips", STAC_ECS_202),
1958 SND_PCI_QUIRK(0x1019, 0x2815,
1959 "ECS/PC chips", STAC_ECS_202),
1960 SND_PCI_QUIRK(0x1019, 0x2816,
1961 "ECS/PC chips", STAC_ECS_202),
1962 SND_PCI_QUIRK(0x1019, 0x2817,
1963 "ECS/PC chips", STAC_ECS_202),
1964 SND_PCI_QUIRK(0x1019, 0x2818,
1965 "ECS/PC chips", STAC_ECS_202),
1966 SND_PCI_QUIRK(0x1019, 0x2819,
1967 "ECS/PC chips", STAC_ECS_202),
1968 SND_PCI_QUIRK(0x1019, 0x2820,
1969 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1970 {} /* terminator */
1971};
1972
3cc08dc6 1973static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1974 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1975 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1976 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1977 0x01c42190, 0x40000100,
3cc08dc6
MP		 1978};
1979
93ed1503 1980static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1981 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1982 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1983 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1984 0x40000100, 0x40000100
1985};
1986
93ed1503
TD		 1987static unsigned int d965_5st_pin_configs[14] = {
1988 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1989 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1990 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1991 0x40000100, 0x40000100
1992};
1993
4ff076e5
TD		 1994static unsigned int dell_3st_pin_configs[14] = {
1995 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1996 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1997 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1998 0x40c003fc, 0x40000100
1999};
2000
93ed1503 2001static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2002 [STAC_D965_REF] = ref927x_pin_configs,
2003 [STAC_D965_3ST] = d965_3st_pin_configs,
2004 [STAC_D965_5ST] = d965_5st_pin_configs,
2005 [STAC_DELL_3ST] = dell_3st_pin_configs,
2006 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2007};
2008
f5fcc13c 2009static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2010 [STAC_D965_REF] = "ref",
2011 [STAC_D965_3ST] = "3stack",
2012 [STAC_D965_5ST] = "5stack",
2013 [STAC_DELL_3ST] = "dell-3stack",
2014 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2015};
2016
2017static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2018 /* SigmaTel reference board */
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2020 "DFI LanParty", STAC_D965_REF),
81d3dbde 2021 /* Intel 946 based systems */
f5fcc13c
TI		 2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2024 /* 965 based 3 stack systems */
f5fcc13c
TI		 2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2041 /* Dell 3 stack systems */
8e9068b1 2042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2046 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2055 /* 965 based 5 stack systems */
f5fcc13c
TI		 2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2065 {} /* terminator */
2066};
2067
f3302a59
MP		 2068static unsigned int ref9205_pin_configs[12] = {
2069 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2070 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2071 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2072};
2073
dfe495d0
TI		 2074/*
2075 STAC 9205 pin configs for
2076 102801F1
2077 102801F2
2078 102801FC
2079 102801FD
2080 10280204
2081 1028021F
3fa2ef74 2082 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2083*/
2084static unsigned int dell_9205_m42_pin_configs[12] = {
2085 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2086 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2087 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2088};
2089
2090/*
2091 STAC 9205 pin configs for
2092 102801F9
2093 102801FA
2094 102801FE
2095 102801FF (Dell Precision M4300)
2096 10280206
2097 10280200
2098 10280201
2099*/
2100static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2101 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2102 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2103 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2104};
2105
dfe495d0 2106static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2107 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2108 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2109 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2110};
2111
f5fcc13c 2112static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2113 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2114 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2115 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2116 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2117};
2118
f5fcc13c
TI		 2119static const char *stac9205_models[STAC_9205_MODELS] = {
2120 [STAC_9205_REF] = "ref",
dfe495d0 2121 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2122 [STAC_9205_DELL_M43] = "dell-m43",
2123 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2124};
2125
2126static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2127 /* SigmaTel reference board */
2128 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2129 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2131 "unknown Dell", STAC_9205_DELL_M42),
2132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2133 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2135 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2137 "Dell Precision", STAC_9205_DELL_M43),
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2139 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2141 "unknown Dell", STAC_9205_DELL_M42),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2143 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2145 "Dell Precision", STAC_9205_DELL_M43),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2147 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2149 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2151 "Dell Precision", STAC_9205_DELL_M43),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2153 "Dell Precision", STAC_9205_DELL_M43),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2155 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2157 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2159 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2160 {} /* terminator */
2161};
2162
11b44bbd
RF		 2163static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2164{
2165 int i;
2166 struct sigmatel_spec *spec = codec->spec;
2167
2168 if (! spec->bios_pin_configs) {
2169 spec->bios_pin_configs = kcalloc(spec->num_pins,
2170 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2171 if (! spec->bios_pin_configs)
2172 return -ENOMEM;
2173 }
2174
2175 for (i = 0; i < spec->num_pins; i++) {
2176 hda_nid_t nid = spec->pin_nids[i];
2177 unsigned int pin_cfg;
2178
2179 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2180 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2181 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2182 nid, pin_cfg);
2183 spec->bios_pin_configs[i] = pin_cfg;
2184 }
2185
2186 return 0;
2187}
2188
87d48363
MR		 2189static void stac92xx_set_config_reg(struct hda_codec *codec,
2190 hda_nid_t pin_nid, unsigned int pin_config)
2191{
2192 int i;
2193 snd_hda_codec_write(codec, pin_nid, 0,
2194 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2195 pin_config & 0x000000ff);
2196 snd_hda_codec_write(codec, pin_nid, 0,
2197 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2198 (pin_config & 0x0000ff00) >> 8);
2199 snd_hda_codec_write(codec, pin_nid, 0,
2200 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2201 (pin_config & 0x00ff0000) >> 16);
2202 snd_hda_codec_write(codec, pin_nid, 0,
2203 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2204 pin_config >> 24);
2205 i = snd_hda_codec_read(codec, pin_nid, 0,
2206 AC_VERB_GET_CONFIG_DEFAULT,
2207 0x00);
2208 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2209 pin_nid, i);
2210}
2211
2f2f4251
M		 2212static void stac92xx_set_config_regs(struct hda_codec *codec)
2213{
2214 int i;
2215 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2216
87d48363
MR		 2217 if (!spec->pin_configs)
2218 return;
11b44bbd 2219
87d48363
MR		 2220 for (i = 0; i < spec->num_pins; i++)
2221 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2222 spec->pin_configs[i]);
2f2f4251 2223}
2f2f4251 2224
dabbed6f 2225/*
c7d4b2fa 2226 * Analog playback callbacks
dabbed6f 2227 */
c7d4b2fa
M		 2228static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2229 struct hda_codec *codec,
c8b6bf9b 2230 struct snd_pcm_substream *substream)
2f2f4251 2231{
dabbed6f 2232 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2233 if (spec->stream_delay)
2234 msleep(spec->stream_delay);
9a08160b
TI		 2235 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2236 hinfo);
2f2f4251
M		 2237}
2238
2f2f4251
M		 2239static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2240 struct hda_codec *codec,
2241 unsigned int stream_tag,
2242 unsigned int format,
c8b6bf9b 2243 struct snd_pcm_substream *substream)
2f2f4251
M		 2244{
2245 struct sigmatel_spec *spec = codec->spec;
403d1944 2246 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2247}
2248
2249static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2250 struct hda_codec *codec,
c8b6bf9b 2251 struct snd_pcm_substream *substream)
2f2f4251
M		 2252{
2253 struct sigmatel_spec *spec = codec->spec;
2254 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2255}
2256
dabbed6f
M		 2257/*
2258 * Digital playback callbacks
2259 */
2260static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2261 struct hda_codec *codec,
c8b6bf9b 2262 struct snd_pcm_substream *substream)
dabbed6f
M		 2263{
2264 struct sigmatel_spec *spec = codec->spec;
2265 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2266}
2267
2268static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2269 struct hda_codec *codec,
c8b6bf9b 2270 struct snd_pcm_substream *substream)
dabbed6f
M		 2271{
2272 struct sigmatel_spec *spec = codec->spec;
2273 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2274}
2275
6b97eb45
TI		 2276static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2277 struct hda_codec *codec,
2278 unsigned int stream_tag,
2279 unsigned int format,
2280 struct snd_pcm_substream *substream)
2281{
2282 struct sigmatel_spec *spec = codec->spec;
2283 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2284 stream_tag, format, substream);
2285}
2286
dabbed6f 2287
2f2f4251
M		 2288/*
2289 * Analog capture callbacks
2290 */
2291static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2292 struct hda_codec *codec,
2293 unsigned int stream_tag,
2294 unsigned int format,
c8b6bf9b 2295 struct snd_pcm_substream *substream)
2f2f4251
M		 2296{
2297 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2298 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2299
8daaaa97
MR		 2300 if (spec->powerdown_adcs) {
2301 msleep(40);
2302 snd_hda_codec_write_cache(codec, nid, 0,
2303 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2304 }
2305 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2306 return 0;
2307}
2308
2309static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2310 struct hda_codec *codec,
c8b6bf9b 2311 struct snd_pcm_substream *substream)
2f2f4251
M		 2312{
2313 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2314 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2315
8daaaa97
MR		 2316 snd_hda_codec_cleanup_stream(codec, nid);
2317 if (spec->powerdown_adcs)
2318 snd_hda_codec_write_cache(codec, nid, 0,
2319 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2320 return 0;
2321}
2322
dabbed6f
M		 2323static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2324 .substreams = 1,
2325 .channels_min = 2,
2326 .channels_max = 2,
2327 /* NID is set in stac92xx_build_pcms */
2328 .ops = {
2329 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2330 .close = stac92xx_dig_playback_pcm_close,
2331 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2332 },
2333};
2334
2335static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2336 .substreams = 1,
2337 .channels_min = 2,
2338 .channels_max = 2,
2339 /* NID is set in stac92xx_build_pcms */
2340};
2341
2f2f4251
M		 2342static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2343 .substreams = 1,
2344 .channels_min = 2,
c7d4b2fa 2345 .channels_max = 8,
2f2f4251
M		 2346 .nid = 0x02, /* NID to query formats and rates */
2347 .ops = {
2348 .open = stac92xx_playback_pcm_open,
2349 .prepare = stac92xx_playback_pcm_prepare,
2350 .cleanup = stac92xx_playback_pcm_cleanup
2351 },
2352};
2353
3cc08dc6
MP		 2354static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2355 .substreams = 1,
2356 .channels_min = 2,
2357 .channels_max = 2,
2358 .nid = 0x06, /* NID to query formats and rates */
2359 .ops = {
2360 .open = stac92xx_playback_pcm_open,
2361 .prepare = stac92xx_playback_pcm_prepare,
2362 .cleanup = stac92xx_playback_pcm_cleanup
2363 },
2364};
2365
2f2f4251 2366static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2367 .channels_min = 2,
2368 .channels_max = 2,
9e05b7a3 2369 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2370 .ops = {
2371 .prepare = stac92xx_capture_pcm_prepare,
2372 .cleanup = stac92xx_capture_pcm_cleanup
2373 },
2374};
2375
2376static int stac92xx_build_pcms(struct hda_codec *codec)
2377{
2378 struct sigmatel_spec *spec = codec->spec;
2379 struct hda_pcm *info = spec->pcm_rec;
2380
2381 codec->num_pcms = 1;
2382 codec->pcm_info = info;
2383
c7d4b2fa 2384 info->name = "STAC92xx Analog";
2f2f4251 2385 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2386 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2387 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2388 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2389
2390 if (spec->alt_switch) {
2391 codec->num_pcms++;
2392 info++;
2393 info->name = "STAC92xx Analog Alt";
2394 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2395 }
2f2f4251 2396
dabbed6f
M		 2397 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2398 codec->num_pcms++;
2399 info++;
2400 info->name = "STAC92xx Digital";
7ba72ba1 2401 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2402 if (spec->multiout.dig_out_nid) {
2403 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2404 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2405 }
2406 if (spec->dig_in_nid) {
2407 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2408 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2409 }
2410 }
2411
2f2f4251
M		 2412 return 0;
2413}
2414
c960a03b
TI		 2415static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2416{
2417 unsigned int pincap = snd_hda_param_read(codec, nid,
2418 AC_PAR_PIN_CAP);
2419 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2420 if (pincap & AC_PINCAP_VREF_100)
2421 return AC_PINCTL_VREF_100;
2422 if (pincap & AC_PINCAP_VREF_80)
2423 return AC_PINCTL_VREF_80;
2424 if (pincap & AC_PINCAP_VREF_50)
2425 return AC_PINCTL_VREF_50;
2426 if (pincap & AC_PINCAP_VREF_GRD)
2427 return AC_PINCTL_VREF_GRD;
2428 return 0;
2429}
2430
403d1944
MP		 2431static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2432
2433{
82beb8fd
TI		 2434 snd_hda_codec_write_cache(codec, nid, 0,
2435 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2436}
2437
7c2ba97b
MR		 2438#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2439
2440static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2441 struct snd_ctl_elem_value *ucontrol)
2442{
2443 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2444 struct sigmatel_spec *spec = codec->spec;
2445
2446 ucontrol->value.integer.value[0] = spec->hp_switch;
2447 return 0;
2448}
2449
2450static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2451 struct snd_ctl_elem_value *ucontrol)
2452{
2453 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2454 struct sigmatel_spec *spec = codec->spec;
2455
2456 spec->hp_switch = ucontrol->value.integer.value[0];
2457
2458 /* check to be sure that the ports are upto date with
2459 * switch changes
2460 */
2461 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2462
2463 return 1;
2464}
2465
a5ce8890 2466#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2467
2468static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2469{
2470 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2471 struct sigmatel_spec *spec = codec->spec;
2472 int io_idx = kcontrol-> private_value & 0xff;
2473
2474 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2475 return 0;
2476}
2477
2478static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2479{
2480 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2481 struct sigmatel_spec *spec = codec->spec;
2482 hda_nid_t nid = kcontrol->private_value >> 8;
2483 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2484 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2485
2486 spec->io_switch[io_idx] = val;
2487
2488 if (val)
2489 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2490 else {
2491 unsigned int pinctl = AC_PINCTL_IN_EN;
2492 if (io_idx) /* set VREF for mic */
2493 pinctl |= stac92xx_get_vref(codec, nid);
2494 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2495 }
40c1d308
JZ		 2496
2497 /* check the auto-mute again: we need to mute/unmute the speaker
2498 * appropriately according to the pin direction
2499 */
2500 if (spec->hp_detect)
2501 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2502
403d1944
MP		 2503 return 1;
2504}
2505
0fb87bb4
ML		 2506#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2507
2508static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2509 struct snd_ctl_elem_value *ucontrol)
2510{
2511 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2512 struct sigmatel_spec *spec = codec->spec;
2513
2514 ucontrol->value.integer.value[0] = spec->clfe_swap;
2515 return 0;
2516}
2517
2518static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2519 struct snd_ctl_elem_value *ucontrol)
2520{
2521 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2522 struct sigmatel_spec *spec = codec->spec;
2523 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2524 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2525
68ea7b2f 2526 if (spec->clfe_swap == val)
0fb87bb4
ML		 2527 return 0;
2528
68ea7b2f 2529 spec->clfe_swap = val;
0fb87bb4
ML		 2530
2531 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2532 spec->clfe_swap ? 0x4 : 0x0);
2533
2534 return 1;
2535}
2536
7c2ba97b
MR		 2537#define STAC_CODEC_HP_SWITCH(xname) \
2538 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2539 .name = xname, \
2540 .index = 0, \
2541 .info = stac92xx_hp_switch_info, \
2542 .get = stac92xx_hp_switch_get, \
2543 .put = stac92xx_hp_switch_put, \
2544 }
2545
403d1944
MP		 2546#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2547 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2548 .name = xname, \
2549 .index = 0, \
2550 .info = stac92xx_io_switch_info, \
2551 .get = stac92xx_io_switch_get, \
2552 .put = stac92xx_io_switch_put, \
2553 .private_value = xpval, \
2554 }
2555
0fb87bb4
ML		 2556#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2557 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2558 .name = xname, \
2559 .index = 0, \
2560 .info = stac92xx_clfe_switch_info, \
2561 .get = stac92xx_clfe_switch_get, \
2562 .put = stac92xx_clfe_switch_put, \
2563 .private_value = xpval, \
2564 }
403d1944 2565
c7d4b2fa
M		 2566enum {
2567 STAC_CTL_WIDGET_VOL,
2568 STAC_CTL_WIDGET_MUTE,
09a99959 2569 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2570 STAC_CTL_WIDGET_AMP_MUX,
2571 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2572 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2573 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2574 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2575};
2576
c8b6bf9b 2577static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2578 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2579 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2580 STAC_MONO_MUX,
89385035
MR		 2581 STAC_AMP_MUX,
2582 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2583 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2584 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2585 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2586};
2587
2588/* add dynamic controls */
4682eee0
MR		 2589static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2590 int idx, const char *name, unsigned long val)
c7d4b2fa 2591{
c8b6bf9b 2592 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2593
2594 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2595 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2596
2597 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2598 if (! knew)
2599 return -ENOMEM;
2600 if (spec->kctl_alloc) {
2601 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2602 kfree(spec->kctl_alloc);
2603 }
2604 spec->kctl_alloc = knew;
2605 spec->num_kctl_alloc = num;
2606 }
2607
2608 knew = &spec->kctl_alloc[spec->num_kctl_used];
2609 *knew = stac92xx_control_templates[type];
4682eee0 2610 knew->index = idx;
82fe0c58 2611 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2612 if (! knew->name)
2613 return -ENOMEM;
2614 knew->private_value = val;
2615 spec->num_kctl_used++;
2616 return 0;
2617}
2618
4682eee0
MR		 2619
2620/* add dynamic controls */
2621static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2622 const char *name, unsigned long val)
2623{
2624 return stac92xx_add_control_idx(spec, type, 0, name, val);
2625}
2626
403d1944
MP		 2627/* flag inputs as additional dynamic lineouts */
2628static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2629{
2630 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2631 unsigned int wcaps, wtype;
2632 int i, num_dacs = 0;
2633
2634 /* use the wcaps cache to count all DACs available for line-outs */
2635 for (i = 0; i < codec->num_nodes; i++) {
2636 wcaps = codec->wcaps[i];
2637 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2638
7b043899
SL		 2639 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2640 num_dacs++;
2641 }
403d1944 2642
7b043899
SL		 2643 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2644
403d1944
MP		 2645 switch (cfg->line_outs) {
2646 case 3:
2647 /* add line-in as side */
7b043899 2648 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2649 cfg->line_out_pins[cfg->line_outs] =
2650 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2651 spec->line_switch = 1;
2652 cfg->line_outs++;
2653 }
2654 break;
2655 case 2:
2656 /* add line-in as clfe and mic as side */
7b043899 2657 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2658 cfg->line_out_pins[cfg->line_outs] =
2659 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2660 spec->line_switch = 1;
2661 cfg->line_outs++;
2662 }
7b043899 2663 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2664 cfg->line_out_pins[cfg->line_outs] =
2665 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2666 spec->mic_switch = 1;
2667 cfg->line_outs++;
2668 }
2669 break;
2670 case 1:
2671 /* add line-in as surr and mic as clfe */
7b043899 2672 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2673 cfg->line_out_pins[cfg->line_outs] =
2674 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2675 spec->line_switch = 1;
2676 cfg->line_outs++;
2677 }
7b043899 2678 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2679 cfg->line_out_pins[cfg->line_outs] =
2680 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2681 spec->mic_switch = 1;
2682 cfg->line_outs++;
2683 }
2684 break;
2685 }
2686
2687 return 0;
2688}
2689
7b043899
SL		 2690
2691static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2692{
2693 int i;
2694
2695 for (i = 0; i < spec->multiout.num_dacs; i++) {
2696 if (spec->multiout.dac_nids[i] == nid)
2697 return 1;
2698 }
2699
2700 return 0;
2701}
2702
3cc08dc6 2703/*
7b043899
SL		 2704 * Fill in the dac_nids table from the parsed pin configuration
2705 * This function only works when every pin in line_out_pins[]
2706 * contains atleast one DAC in its connection list. Some 92xx
2707 * codecs are not connected directly to a DAC, such as the 9200
2708 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2709 */
19039bd0 2710static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2711 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2712{
2713 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2714 int i, j, conn_len = 0;
2715 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2716 unsigned int wcaps, wtype;
2717
c7d4b2fa
M		 2718 for (i = 0; i < cfg->line_outs; i++) {
2719 nid = cfg->line_out_pins[i];
7b043899
SL		 2720 conn_len = snd_hda_get_connections(codec, nid, conn,
2721 HDA_MAX_CONNECTIONS);
2722 for (j = 0; j < conn_len; j++) {
2723 wcaps = snd_hda_param_read(codec, conn[j],
2724 AC_PAR_AUDIO_WIDGET_CAP);
2725 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2726 if (wtype != AC_WID_AUD_OUT ||
2727 (wcaps & AC_WCAP_DIGITAL))
2728 continue;
2729 /* conn[j] is a DAC routed to this line-out */
2730 if (!is_in_dac_nids(spec, conn[j]))
2731 break;
2732 }
2733
2734 if (j == conn_len) {
df802952
TI		 2735 if (spec->multiout.num_dacs > 0) {
2736 /* we have already working output pins,
2737 * so let's drop the broken ones again
2738 */
2739 cfg->line_outs = spec->multiout.num_dacs;
2740 break;
2741 }
7b043899
SL		 2742 /* error out, no available DAC found */
2743 snd_printk(KERN_ERR
2744 "%s: No available DAC for pin 0x%x\n",
2745 __func__, nid);
2746 return -ENODEV;
2747 }
2748
2749 spec->multiout.dac_nids[i] = conn[j];
2750 spec->multiout.num_dacs++;
2751 if (conn_len > 1) {
2752 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2753 snd_hda_codec_write_cache(codec, nid, 0,
2754 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2755
7b043899
SL		 2756 }
2757 }
c7d4b2fa 2758
7b043899
SL		 2759 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2760 spec->multiout.num_dacs,
2761 spec->multiout.dac_nids[0],
2762 spec->multiout.dac_nids[1],
2763 spec->multiout.dac_nids[2],
2764 spec->multiout.dac_nids[3],
2765 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2766 return 0;
2767}
2768
eb06ed8f
TI		 2769/* create volume control/switch for the given prefx type */
2770static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2771{
2772 char name[32];
2773 int err;
2774
2775 sprintf(name, "%s Playback Volume", pfx);
2776 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2777 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2778 if (err < 0)
2779 return err;
2780 sprintf(name, "%s Playback Switch", pfx);
2781 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2782 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2783 if (err < 0)
2784 return err;
2785 return 0;
2786}
2787
ae0afd81
MR		 2788static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2789{
2790 if (!spec->multiout.hp_nid)
2791 spec->multiout.hp_nid = nid;
2792 else if (spec->multiout.num_dacs > 4) {
2793 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2794 return 1;
2795 } else {
2796 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2797 spec->multiout.num_dacs++;
2798 }
2799 return 0;
2800}
2801
2802static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2803{
2804 if (is_in_dac_nids(spec, nid))
2805 return 1;
2806 if (spec->multiout.hp_nid == nid)
2807 return 1;
2808 return 0;
2809}
2810
c7d4b2fa 2811/* add playback controls from the parsed DAC table */
0fb87bb4 2812static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2813 const struct auto_pin_cfg *cfg)
c7d4b2fa 2814{
19039bd0
TI		 2815 static const char *chname[4] = {
2816 "Front", "Surround", NULL /*CLFE*/, "Side"
2817 };
d21995e3 2818 hda_nid_t nid = 0;
c7d4b2fa
M		 2819 int i, err;
2820
0fb87bb4 2821 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2822 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2823
2824
40ac8c4f 2825 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2826 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2827 continue;
2828
2829 nid = spec->multiout.dac_nids[i];
2830
2831 if (i == 2) {
2832 /* Center/LFE */
eb06ed8f
TI		 2833 err = create_controls(spec, "Center", nid, 1);
2834 if (err < 0)
c7d4b2fa 2835 return err;
eb06ed8f
TI		 2836 err = create_controls(spec, "LFE", nid, 2);
2837 if (err < 0)
c7d4b2fa 2838 return err;
0fb87bb4
ML		 2839
2840 wid_caps = get_wcaps(codec, nid);
2841
2842 if (wid_caps & AC_WCAP_LR_SWAP) {
2843 err = stac92xx_add_control(spec,
2844 STAC_CTL_WIDGET_CLFE_SWITCH,
2845 "Swap Center/LFE Playback Switch", nid);
2846
2847 if (err < 0)
2848 return err;
2849 }
2850
c7d4b2fa 2851 } else {
eb06ed8f
TI		 2852 err = create_controls(spec, chname[i], nid, 3);
2853 if (err < 0)
c7d4b2fa
M		 2854 return err;
2855 }
2856 }
2857
fedb7569
MR		 2858 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2859 cfg->hp_outs && !spec->multiout.hp_nid)
2860 spec->multiout.hp_nid = nid;
2861
7c2ba97b
MR		 2862 if (cfg->hp_outs > 1) {
2863 err = stac92xx_add_control(spec,
2864 STAC_CTL_WIDGET_HP_SWITCH,
2865 "Headphone as Line Out Switch", 0);
2866 if (err < 0)
2867 return err;
2868 }
2869
b5895dc8
MR		 2870 if (spec->line_switch) {
2871 nid = cfg->input_pins[AUTO_PIN_LINE];
2872 pincap = snd_hda_param_read(codec, nid,
2873 AC_PAR_PIN_CAP);
2874 if (pincap & AC_PINCAP_OUT) {
2875 err = stac92xx_add_control(spec,
2876 STAC_CTL_WIDGET_IO_SWITCH,
2877 "Line In as Output Switch", nid << 8);
2878 if (err < 0)
2879 return err;
2880 }
2881 }
403d1944 2882
b5895dc8 2883 if (spec->mic_switch) {
cace16f1 2884 unsigned int def_conf;
ae0afd81
MR		 2885 unsigned int mic_pin = AUTO_PIN_MIC;
2886again:
2887 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2888 def_conf = snd_hda_codec_read(codec, nid, 0,
2889 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2890 /* some laptops have an internal analog microphone
2891 * which can't be used as a output */
2892 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2893 pincap = snd_hda_param_read(codec, nid,
2894 AC_PAR_PIN_CAP);
2895 if (pincap & AC_PINCAP_OUT) {
2896 err = stac92xx_add_control(spec,
2897 STAC_CTL_WIDGET_IO_SWITCH,
2898 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2899 nid = snd_hda_codec_read(codec, nid, 0,
2900 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2901 if (!check_in_dac_nids(spec, nid))
2902 add_spec_dacs(spec, nid);
cace16f1
MR		 2903 if (err < 0)
2904 return err;
2905 }
ae0afd81
MR		 2906 } else if (mic_pin == AUTO_PIN_MIC) {
2907 mic_pin = AUTO_PIN_FRONT_MIC;
2908 goto again;
b5895dc8
MR		 2909 }
2910 }
403d1944 2911
c7d4b2fa
M		 2912 return 0;
2913}
2914
eb06ed8f
TI		 2915/* add playback controls for Speaker and HP outputs */
2916static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2917 struct auto_pin_cfg *cfg)
2918{
2919 struct sigmatel_spec *spec = codec->spec;
2920 hda_nid_t nid;
2921 int i, old_num_dacs, err;
2922
2923 old_num_dacs = spec->multiout.num_dacs;
2924 for (i = 0; i < cfg->hp_outs; i++) {
2925 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2926 if (wid_caps & AC_WCAP_UNSOL_CAP)
2927 spec->hp_detect = 1;
2928 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2929 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2930 if (check_in_dac_nids(spec, nid))
2931 nid = 0;
2932 if (! nid)
c7d4b2fa 2933 continue;
eb06ed8f
TI		 2934 add_spec_dacs(spec, nid);
2935 }
2936 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2937 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2938 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2939 if (check_in_dac_nids(spec, nid))
2940 nid = 0;
eb06ed8f
TI		 2941 if (! nid)
2942 continue;
2943 add_spec_dacs(spec, nid);
c7d4b2fa 2944 }
1b290a51
MR		 2945 for (i = 0; i < cfg->line_outs; i++) {
2946 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2947 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2948 if (check_in_dac_nids(spec, nid))
2949 nid = 0;
2950 if (! nid)
2951 continue;
2952 add_spec_dacs(spec, nid);
2953 }
eb06ed8f
TI		 2954 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2955 static const char *pfxs[] = {
2956 "Speaker", "External Speaker", "Speaker2",
2957 };
2958 err = create_controls(spec, pfxs[i - old_num_dacs],
2959 spec->multiout.dac_nids[i], 3);
2960 if (err < 0)
2961 return err;
2962 }
2963 if (spec->multiout.hp_nid) {
2626a263
TI		 2964 err = create_controls(spec, "Headphone",
2965 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2966 if (err < 0)
2967 return err;
2968 }
c7d4b2fa
M		 2969
2970 return 0;
2971}
2972
b22b4821 2973/* labels for mono mux outputs */
d0513fc6
MR		 2974static const char *stac92xx_mono_labels[4] = {
2975 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2976};
2977
2978/* create mono mux for mono out on capable codecs */
2979static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2980{
2981 struct sigmatel_spec *spec = codec->spec;
2982 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2983 int i, num_cons;
2984 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2985
2986 num_cons = snd_hda_get_connections(codec,
2987 spec->mono_nid,
2988 con_lst,
2989 HDA_MAX_NUM_INPUTS);
2990 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2991 return -EINVAL;
2992
2993 for (i = 0; i < num_cons; i++) {
2994 mono_mux->items[mono_mux->num_items].label =
2995 stac92xx_mono_labels[i];
2996 mono_mux->items[mono_mux->num_items].index = i;
2997 mono_mux->num_items++;
2998 }
09a99959
MR		 2999
3000 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3001 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3002}
3003
89385035
MR		 3004/* labels for amp mux outputs */
3005static const char *stac92xx_amp_labels[3] = {
4b33c767 3006 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3007};
3008
3009/* create amp out controls mux on capable codecs */
3010static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3011{
3012 struct sigmatel_spec *spec = codec->spec;
3013 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3014 int i, err;
3015
2a9c7816 3016 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3017 amp_mux->items[amp_mux->num_items].label =
3018 stac92xx_amp_labels[i];
3019 amp_mux->items[amp_mux->num_items].index = i;
3020 amp_mux->num_items++;
3021 }
3022
2a9c7816
MR		 3023 if (spec->num_amps > 1) {
3024 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3025 "Amp Selector Capture Switch", 0);
3026 if (err < 0)
3027 return err;
3028 }
89385035
MR		 3029 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3030 "Amp Capture Volume",
3031 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3032}
3033
3034
1cd2224c
MR		 3035/* create PC beep volume controls */
3036static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3037 hda_nid_t nid)
3038{
3039 struct sigmatel_spec *spec = codec->spec;
3040 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3041 int err;
3042
3043 /* check for mute support for the the amp */
3044 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3045 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3046 "PC Beep Playback Switch",
3047 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3048 if (err < 0)
3049 return err;
3050 }
3051
3052 /* check to see if there is volume support for the amp */
3053 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3054 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3055 "PC Beep Playback Volume",
3056 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3057 if (err < 0)
3058 return err;
3059 }
3060 return 0;
3061}
3062
4682eee0
MR		 3063static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3064{
3065 struct sigmatel_spec *spec = codec->spec;
3066 int wcaps, nid, i, err = 0;
3067
3068 for (i = 0; i < spec->num_muxes; i++) {
3069 nid = spec->mux_nids[i];
3070 wcaps = get_wcaps(codec, nid);
3071
3072 if (wcaps & AC_WCAP_OUT_AMP) {
3073 err = stac92xx_add_control_idx(spec,
3074 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3075 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3076 if (err < 0)
3077 return err;
3078 }
3079 }
3080 return 0;
3081};
3082
d9737751 3083static const char *stac92xx_spdif_labels[3] = {
65973632 3084 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3085};
3086
3087static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3088{
3089 struct sigmatel_spec *spec = codec->spec;
3090 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3091 const char **labels = spec->spdif_labels;
d9737751 3092 int i, num_cons;
65973632 3093 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3094
3095 num_cons = snd_hda_get_connections(codec,
3096 spec->smux_nids[0],
3097 con_lst,
3098 HDA_MAX_NUM_INPUTS);
65973632 3099 if (!num_cons)
d9737751
MR		 3100 return -EINVAL;
3101
65973632
MR		 3102 if (!labels)
3103 labels = stac92xx_spdif_labels;
3104
d9737751 3105 for (i = 0; i < num_cons; i++) {
65973632 3106 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3107 spdif_mux->items[spdif_mux->num_items].index = i;
3108 spdif_mux->num_items++;
3109 }
3110
3111 return 0;
3112}
3113
8b65727b 3114/* labels for dmic mux inputs */
ddc2cec4 3115static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3116 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3117 "Digital Mic 3", "Digital Mic 4"
3118};
3119
3120/* create playback/capture controls for input pins on dmic capable codecs */
3121static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3122 const struct auto_pin_cfg *cfg)
3123{
3124 struct sigmatel_spec *spec = codec->spec;
3125 struct hda_input_mux *dimux = &spec->private_dimux;
3126 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3127 int err, i, j;
3128 char name[32];
8b65727b
MP		 3129
3130 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3131 dimux->items[dimux->num_items].index = 0;
3132 dimux->num_items++;
3133
3134 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3135 hda_nid_t nid;
8b65727b
MP		 3136 int index;
3137 int num_cons;
0678accd 3138 unsigned int wcaps;
8b65727b
MP		 3139 unsigned int def_conf;
3140
3141 def_conf = snd_hda_codec_read(codec,
3142 spec->dmic_nids[i],
3143 0,
3144 AC_VERB_GET_CONFIG_DEFAULT,
3145 0);
3146 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3147 continue;
3148
0678accd 3149 nid = spec->dmic_nids[i];
8b65727b 3150 num_cons = snd_hda_get_connections(codec,
e1f0d669 3151 spec->dmux_nids[0],
8b65727b
MP		 3152 con_lst,
3153 HDA_MAX_NUM_INPUTS);
3154 for (j = 0; j < num_cons; j++)
0678accd 3155 if (con_lst[j] == nid) {
8b65727b
MP		 3156 index = j;
3157 goto found;
3158 }
3159 continue;
3160found:
d0513fc6
MR		 3161 wcaps = get_wcaps(codec, nid) &
3162 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3163
d0513fc6 3164 if (wcaps) {
0678accd
MR		 3165 sprintf(name, "%s Capture Volume",
3166 stac92xx_dmic_labels[dimux->num_items]);
3167
3168 err = stac92xx_add_control(spec,
3169 STAC_CTL_WIDGET_VOL,
3170 name,
d0513fc6
MR		 3171 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3172 (wcaps & AC_WCAP_OUT_AMP) ?
3173 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3174 if (err < 0)
3175 return err;
3176 }
3177
8b65727b
MP		 3178 dimux->items[dimux->num_items].label =
3179 stac92xx_dmic_labels[dimux->num_items];
3180 dimux->items[dimux->num_items].index = index;
3181 dimux->num_items++;
3182 }
3183
3184 return 0;
3185}
3186
c7d4b2fa
M		 3187/* create playback/capture controls for input pins */
3188static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3189{
3190 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3191 struct hda_input_mux *imux = &spec->private_imux;
3192 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3193 int i, j, k;
3194
3195 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3196 int index;
3197
3198 if (!cfg->input_pins[i])
3199 continue;
3200 index = -1;
3201 for (j = 0; j < spec->num_muxes; j++) {
3202 int num_cons;
3203 num_cons = snd_hda_get_connections(codec,
3204 spec->mux_nids[j],
3205 con_lst,
3206 HDA_MAX_NUM_INPUTS);
3207 for (k = 0; k < num_cons; k++)
3208 if (con_lst[k] == cfg->input_pins[i]) {
3209 index = k;
3210 goto found;
3211 }
c7d4b2fa 3212 }
314634bc
TI		 3213 continue;
3214 found:
3215 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3216 imux->items[imux->num_items].index = index;
3217 imux->num_items++;
c7d4b2fa
M		 3218 }
3219
7b043899 3220 if (imux->num_items) {
62fe78e9
SR		 3221 /*
3222 * Set the current input for the muxes.
3223 * The STAC9221 has two input muxes with identical source
3224 * NID lists. Hopefully this won't get confused.
3225 */
3226 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3227 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3228 AC_VERB_SET_CONNECT_SEL,
3229 imux->items[0].index);
62fe78e9
SR		 3230 }
3231 }
3232
c7d4b2fa
M		 3233 return 0;
3234}
3235
c7d4b2fa
M		 3236static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3237{
3238 struct sigmatel_spec *spec = codec->spec;
3239 int i;
3240
3241 for (i = 0; i < spec->autocfg.line_outs; i++) {
3242 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3243 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3244 }
3245}
3246
3247static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3248{
3249 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3250 int i;
c7d4b2fa 3251
eb06ed8f
TI		 3252 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3253 hda_nid_t pin;
3254 pin = spec->autocfg.hp_pins[i];
3255 if (pin) /* connect to front */
3256 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3257 }
3258 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3259 hda_nid_t pin;
3260 pin = spec->autocfg.speaker_pins[i];
3261 if (pin) /* connect to front */
3262 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3263 }
c7d4b2fa
M		 3264}
3265
3cc08dc6 3266static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3267{
3268 struct sigmatel_spec *spec = codec->spec;
3269 int err;
bcecd9bd 3270 int hp_speaker_swap = 0;
c7d4b2fa 3271
8b65727b
MP		 3272 if ((err = snd_hda_parse_pin_def_config(codec,
3273 &spec->autocfg,
3274 spec->dmic_nids)) < 0)
c7d4b2fa 3275 return err;
82bc955f 3276 if (! spec->autocfg.line_outs)
869264c4 3277 return 0; /* can't find valid pin config */
19039bd0 3278
bcecd9bd
JZ		 3279 /* If we have no real line-out pin and multiple hp-outs, HPs should
3280 * be set up as multi-channel outputs.
3281 */
3282 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3283 spec->autocfg.hp_outs > 1) {
3284 /* Copy hp_outs to line_outs, backup line_outs in
3285 * speaker_outs so that the following routines can handle
3286 * HP pins as primary outputs.
3287 */
3288 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3289 sizeof(spec->autocfg.line_out_pins));
3290 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3291 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3292 sizeof(spec->autocfg.hp_pins));
3293 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3294 hp_speaker_swap = 1;
3295 }
09a99959 3296 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3297 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3298 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3299 u32 caps = query_amp_caps(codec,
3300 spec->autocfg.mono_out_pin, dir);
3301 hda_nid_t conn_list[1];
3302
3303 /* get the mixer node and then the mono mux if it exists */
3304 if (snd_hda_get_connections(codec,
3305 spec->autocfg.mono_out_pin, conn_list, 1) &&
3306 snd_hda_get_connections(codec, conn_list[0],
3307 conn_list, 1)) {
3308
3309 int wcaps = get_wcaps(codec, conn_list[0]);
3310 int wid_type = (wcaps & AC_WCAP_TYPE)
3311 >> AC_WCAP_TYPE_SHIFT;
3312 /* LR swap check, some stac925x have a mux that
3313 * changes the DACs output path instead of the
3314 * mono-mux path.
3315 */
3316 if (wid_type == AC_WID_AUD_SEL &&
3317 !(wcaps & AC_WCAP_LR_SWAP))
3318 spec->mono_nid = conn_list[0];
3319 }
d0513fc6
MR		 3320 if (dir) {
3321 hda_nid_t nid = spec->autocfg.mono_out_pin;
3322
3323 /* most mono outs have a least a mute/unmute switch */
3324 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3325 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3326 "Mono Playback Switch",
3327 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3328 if (err < 0)
3329 return err;
d0513fc6
MR		 3330 /* check for volume support for the amp */
3331 if ((caps & AC_AMPCAP_NUM_STEPS)
3332 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3333 err = stac92xx_add_control(spec,
3334 STAC_CTL_WIDGET_VOL,
3335 "Mono Playback Volume",
3336 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3337 if (err < 0)
3338 return err;
3339 }
09a99959
MR		 3340 }
3341
3342 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3343 AC_PINCTL_OUT_EN);
3344 }
bcecd9bd 3345
403d1944
MP		 3346 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3347 return err;
19039bd0
TI		 3348 if (spec->multiout.num_dacs == 0)
3349 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3350 return err;
c7d4b2fa 3351
0fb87bb4
ML		 3352 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3353
3354 if (err < 0)
3355 return err;
3356
1cd2224c
MR		 3357 /* setup analog beep controls */
3358 if (spec->anabeep_nid > 0) {
3359 err = stac92xx_auto_create_beep_ctls(codec,
3360 spec->anabeep_nid);
3361 if (err < 0)
3362 return err;
3363 }
3364
3365 /* setup digital beep controls and input device */
3366#ifdef CONFIG_SND_HDA_INPUT_BEEP
3367 if (spec->digbeep_nid > 0) {
3368 hda_nid_t nid = spec->digbeep_nid;
3369
3370 err = stac92xx_auto_create_beep_ctls(codec, nid);
3371 if (err < 0)
3372 return err;
3373 err = snd_hda_attach_beep_device(codec, nid);
3374 if (err < 0)
3375 return err;
3376 }
3377#endif
3378
bcecd9bd
JZ		 3379 if (hp_speaker_swap == 1) {
3380 /* Restore the hp_outs and line_outs */
3381 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3382 sizeof(spec->autocfg.line_out_pins));
3383 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3384 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3385 sizeof(spec->autocfg.speaker_pins));
3386 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3387 memset(spec->autocfg.speaker_pins, 0,
3388 sizeof(spec->autocfg.speaker_pins));
3389 spec->autocfg.speaker_outs = 0;
3390 }
3391
0fb87bb4
ML		 3392 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3393
3394 if (err < 0)
3395 return err;
3396
3397 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3398
3399 if (err < 0)
c7d4b2fa
M		 3400 return err;
3401
b22b4821
MR		 3402 if (spec->mono_nid > 0) {
3403 err = stac92xx_auto_create_mono_output_ctls(codec);
3404 if (err < 0)
3405 return err;
3406 }
2a9c7816 3407 if (spec->num_amps > 0) {
89385035
MR		 3408 err = stac92xx_auto_create_amp_output_ctls(codec);
3409 if (err < 0)
3410 return err;
3411 }
2a9c7816 3412 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3413 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3414 &spec->autocfg)) < 0)
3415 return err;
4682eee0
MR		 3416 if (spec->num_muxes > 0) {
3417 err = stac92xx_auto_create_mux_input_ctls(codec);
3418 if (err < 0)
3419 return err;
3420 }
d9737751
MR		 3421 if (spec->num_smuxes > 0) {
3422 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3423 if (err < 0)
3424 return err;
3425 }
8b65727b 3426
c7d4b2fa 3427 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3428 if (spec->multiout.max_channels > 2)
c7d4b2fa 3429 spec->surr_switch = 1;
c7d4b2fa 3430
82bc955f 3431 if (spec->autocfg.dig_out_pin)
3cc08dc6 3432 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3433 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3434 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3435
3436 if (spec->kctl_alloc)
3437 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3438
3439 spec->input_mux = &spec->private_imux;
2a9c7816 3440 spec->dinput_mux = &spec->private_dimux;
d9737751 3441 spec->sinput_mux = &spec->private_smux;
b22b4821 3442 spec->mono_mux = &spec->private_mono_mux;
89385035 3443 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3444 return 1;
3445}
3446
82bc955f
TI		 3447/* add playback controls for HP output */
3448static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3449 struct auto_pin_cfg *cfg)
3450{
3451 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3452 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3453 unsigned int wid_caps;
3454
3455 if (! pin)
3456 return 0;
3457
3458 wid_caps = get_wcaps(codec, pin);
505cb341 3459 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3460 spec->hp_detect = 1;
82bc955f
TI		 3461
3462 return 0;
3463}
3464
160ea0dc
RF		 3465/* add playback controls for LFE output */
3466static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3467 struct auto_pin_cfg *cfg)
3468{
3469 struct sigmatel_spec *spec = codec->spec;
3470 int err;
3471 hda_nid_t lfe_pin = 0x0;
3472 int i;
3473
3474 /*
3475 * search speaker outs and line outs for a mono speaker pin
3476 * with an amp. If one is found, add LFE controls
3477 * for it.
3478 */
3479 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3480 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3481 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3482 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3483 if (wcaps == AC_WCAP_OUT_AMP)
3484 /* found a mono speaker with an amp, must be lfe */
3485 lfe_pin = pin;
3486 }
3487
3488 /* if speaker_outs is 0, then speakers may be in line_outs */
3489 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3490 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3491 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3492 unsigned int defcfg;
8b551785 3493 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3494 AC_VERB_GET_CONFIG_DEFAULT,
3495 0x00);
8b551785 3496 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3497 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3498 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3499 if (wcaps == AC_WCAP_OUT_AMP)
3500 /* found a mono speaker with an amp,
3501 must be lfe */
3502 lfe_pin = pin;
3503 }
3504 }
3505 }
3506
3507 if (lfe_pin) {
eb06ed8f 3508 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3509 if (err < 0)
3510 return err;
3511 }
3512
3513 return 0;
3514}
3515
c7d4b2fa
M		 3516static int stac9200_parse_auto_config(struct hda_codec *codec)
3517{
3518 struct sigmatel_spec *spec = codec->spec;
3519 int err;
3520
df694daa 3521 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3522 return err;
3523
3524 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3525 return err;
3526
82bc955f
TI		 3527 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3528 return err;
3529
160ea0dc
RF		 3530 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3531 return err;
3532
82bc955f 3533 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3534 spec->multiout.dig_out_nid = 0x05;
82bc955f 3535 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3536 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3537
3538 if (spec->kctl_alloc)
3539 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3540
3541 spec->input_mux = &spec->private_imux;
8b65727b 3542 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3543
3544 return 1;
3545}
3546
62fe78e9
SR		 3547/*
3548 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3549 * funky external mute control using GPIO pins.
3550 */
3551
76e1ddfb 3552static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3553 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3554{
3555 unsigned int gpiostate, gpiomask, gpiodir;
3556
3557 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3558 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3559 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3560
3561 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3562 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3563 gpiomask |= mask;
62fe78e9
SR		 3564
3565 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3566 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3567 gpiodir |= dir_mask;
62fe78e9 3568
76e1ddfb 3569 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3570 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3571
3572 snd_hda_codec_write(codec, codec->afg, 0,
3573 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3574 snd_hda_codec_read(codec, codec->afg, 0,
3575 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3576
3577 msleep(1);
3578
76e1ddfb
TI		 3579 snd_hda_codec_read(codec, codec->afg, 0,
3580 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3581}
3582
314634bc
TI		 3583static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3584 unsigned int event)
3585{
3586 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3587 snd_hda_codec_write_cache(codec, nid, 0,
3588 AC_VERB_SET_UNSOLICITED_ENABLE,
3589 (AC_USRSP_EN | event));
314634bc
TI		 3590}
3591
a64135a2
MR		 3592static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3593{
3594 int i;
3595 for (i = 0; i < cfg->hp_outs; i++)
3596 if (cfg->hp_pins[i] == nid)
3597 return 1; /* nid is a HP-Out */
3598
3599 return 0; /* nid is not a HP-Out */
3600};
3601
b76c850f
MR		 3602static void stac92xx_power_down(struct hda_codec *codec)
3603{
3604 struct sigmatel_spec *spec = codec->spec;
3605
3606 /* power down inactive DACs */
3607 hda_nid_t *dac;
3608 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3609 if (!is_in_dac_nids(spec, *dac) &&
3610 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3611 snd_hda_codec_write_cache(codec, *dac, 0,
3612 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3613}
3614
c7d4b2fa
M		 3615static int stac92xx_init(struct hda_codec *codec)
3616{
3617 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3618 struct auto_pin_cfg *cfg = &spec->autocfg;
3619 int i;
c7d4b2fa 3620
c7d4b2fa
M		 3621 snd_hda_sequence_write(codec, spec->init);
3622
8daaaa97
MR		 3623 /* power down adcs initially */
3624 if (spec->powerdown_adcs)
3625 for (i = 0; i < spec->num_adcs; i++)
3626 snd_hda_codec_write_cache(codec,
3627 spec->adc_nids[i], 0,
3628 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3629 /* set up pins */
3630 if (spec->hp_detect) {
505cb341 3631 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3632 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3633 enable_pin_detect(codec, cfg->hp_pins[i],
3634 STAC_HP_EVENT);
0a07acaf
TI		 3635 /* force to enable the first line-out; the others are set up
3636 * in unsol_event
3637 */
3638 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3639 AC_PINCTL_OUT_EN);
eb995a8c 3640 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3641 /* fake event to set up pins */
3642 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3643 } else {
3644 stac92xx_auto_init_multi_out(codec);
3645 stac92xx_auto_init_hp_out(codec);
3646 }
3647 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3648 hda_nid_t nid = cfg->input_pins[i];
3649 if (nid) {
b9aea715
MR		 3650 unsigned int pinctl = snd_hda_codec_read(codec, nid,
3651 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3652 /* if PINCTL already set then skip */
3653 if (pinctl & AC_PINCAP_IN)
3654 continue;
3655 pinctl = AC_PINCTL_IN_EN;
c960a03b
TI		 3656 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3657 pinctl |= stac92xx_get_vref(codec, nid);
3658 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3659 }
82bc955f 3660 }
a64135a2
MR		 3661 for (i = 0; i < spec->num_dmics; i++)
3662 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3663 AC_PINCTL_IN_EN);
3664 for (i = 0; i < spec->num_pwrs; i++) {
3665 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3666 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3667 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3668 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3669 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3670 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3671 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3672 /* outputs are only ports capable of power management
3673 * any attempts on powering down a input port cause the
3674 * referenced VREF to act quirky.
3675 */
3676 if (pinctl & AC_PINCTL_IN_EN)
3677 continue;
aafc4412
MR		 3678 /* skip any ports that don't have jacks since presence
3679 * detection is useless */
3680 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3681 continue;
a64135a2
MR		 3682 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3683 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3684 }
b76c850f
MR		 3685 if (spec->dac_list)
3686 stac92xx_power_down(codec);
82bc955f
TI		 3687 if (cfg->dig_out_pin)
3688 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3689 AC_PINCTL_OUT_EN);
3690 if (cfg->dig_in_pin)
3691 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3692 AC_PINCTL_IN_EN);
3693
4fe5195c
MR		 3694 stac_gpio_set(codec, spec->gpio_mask,
3695 spec->gpio_dir, spec->gpio_data);
62fe78e9 3696
c7d4b2fa
M		 3697 return 0;
3698}
3699
2f2f4251
M		 3700static void stac92xx_free(struct hda_codec *codec)
3701{
c7d4b2fa
M		 3702 struct sigmatel_spec *spec = codec->spec;
3703 int i;
3704
3705 if (! spec)
3706 return;
3707
3708 if (spec->kctl_alloc) {
3709 for (i = 0; i < spec->num_kctl_used; i++)
3710 kfree(spec->kctl_alloc[i].name);
3711 kfree(spec->kctl_alloc);
3712 }
3713
11b44bbd
RF		 3714 if (spec->bios_pin_configs)
3715 kfree(spec->bios_pin_configs);
3716
c7d4b2fa 3717 kfree(spec);
1cd2224c 3718 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3719}
3720
4e55096e
M		 3721static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3722 unsigned int flag)
3723{
3724 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3725 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3726
f9acba43
TI		 3727 if (pin_ctl & AC_PINCTL_IN_EN) {
3728 /*
3729 * we need to check the current set-up direction of
3730 * shared input pins since they can be switched via
3731 * "xxx as Output" mixer switch
3732 */
3733 struct sigmatel_spec *spec = codec->spec;
3734 struct auto_pin_cfg *cfg = &spec->autocfg;
3735 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3736 spec->line_switch) ||
3737 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3738 spec->mic_switch))
3739 return;
3740 }
3741
7b043899
SL		 3742 /* if setting pin direction bits, clear the current
3743 direction bits first */
3744 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3745 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3746
82beb8fd 3747 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3748 AC_VERB_SET_PIN_WIDGET_CONTROL,
3749 pin_ctl | flag);
3750}
3751
3752static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3753 unsigned int flag)
3754{
3755 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3756 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3757 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3758 AC_VERB_SET_PIN_WIDGET_CONTROL,
3759 pin_ctl & ~flag);
3760}
3761
40c1d308 3762static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3763{
3764 if (!nid)
3765 return 0;
3766 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3767 & (1 << 31)) {
3768 unsigned int pinctl;
3769 pinctl = snd_hda_codec_read(codec, nid, 0,
3770 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3771 if (pinctl & AC_PINCTL_IN_EN)
3772 return 0; /* mic- or line-input */
3773 else
3774 return 1; /* HP-output */
3775 }
314634bc
TI		 3776 return 0;
3777}
3778
3779static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3780{
3781 struct sigmatel_spec *spec = codec->spec;
3782 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3783 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3784 int i, presence;
3785
eb06ed8f 3786 presence = 0;
4fe5195c
MR		 3787 if (spec->gpio_mute)
3788 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3789 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3790
eb06ed8f 3791 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3792 if (presence)
3793 break;
7c2ba97b
MR		 3794 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3795 break;
4fe5195c 3796 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3797 }
4e55096e
M		 3798
3799 if (presence) {
3800 /* disable lineouts, enable hp */
7c2ba97b
MR		 3801 if (spec->hp_switch)
3802 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3803 for (i = 0; i < cfg->line_outs; i++)
3804 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3805 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3806 for (i = 0; i < cfg->speaker_outs; i++)
3807 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3808 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3809 if (spec->eapd_mask)
3810 stac_gpio_set(codec, spec->gpio_mask,
3811 spec->gpio_dir, spec->gpio_data &
3812 ~spec->eapd_mask);
4e55096e
M		 3813 } else {
3814 /* enable lineouts, disable hp */
7c2ba97b
MR		 3815 if (spec->hp_switch)
3816 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3817 for (i = 0; i < cfg->line_outs; i++)
3818 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3819 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3820 for (i = 0; i < cfg->speaker_outs; i++)
3821 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3822 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3823 if (spec->eapd_mask)
3824 stac_gpio_set(codec, spec->gpio_mask,
3825 spec->gpio_dir, spec->gpio_data |
3826 spec->eapd_mask);
4e55096e 3827 }
7c2ba97b
MR		 3828 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3829 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3830}
3831
a64135a2
MR		 3832static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3833{
3834 struct sigmatel_spec *spec = codec->spec;
3835 hda_nid_t nid = spec->pwr_nids[idx];
3836 int presence, val;
3837 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3838 & 0x000000ff;
3839 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3840
3841 /* several codecs have two power down bits */
3842 if (spec->pwr_mapping)
3843 idx = spec->pwr_mapping[idx];
3844 else
3845 idx = 1 << idx;
a64135a2
MR		 3846
3847 if (presence)
3848 val &= ~idx;
3849 else
3850 val |= idx;
3851
3852 /* power down unused output ports */
3853 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3854};
3855
314634bc
TI		 3856static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3857{
a64135a2
MR		 3858 struct sigmatel_spec *spec = codec->spec;
3859 int idx = res >> 26 & 0x0f;
3860
72474be6 3861 switch ((res >> 26) & 0x70) {
314634bc
TI		 3862 case STAC_HP_EVENT:
3863 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3864 /* fallthru */
3865 case STAC_PWR_EVENT:
3866 if (spec->num_pwrs > 0)
3867 stac92xx_pin_sense(codec, idx);
72474be6
MR		 3868 break;
3869 case STAC_VREF_EVENT: {
3870 int data = snd_hda_codec_read(codec, codec->afg, 0,
3871 AC_VERB_GET_GPIO_DATA, 0);
3872 /* toggle VREF state based on GPIOx status */
3873 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3874 !!(data & (1 << idx)));
3875 break;
3876 }
314634bc
TI		 3877 }
3878}
3879
cb53c626 3880#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3881static int stac92xx_resume(struct hda_codec *codec)
3882{
dc81bed1
TI		 3883 struct sigmatel_spec *spec = codec->spec;
3884
11b44bbd 3885 stac92xx_set_config_regs(codec);
dc81bed1 3886 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3887 stac_gpio_set(codec, spec->gpio_mask,
3888 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3889 snd_hda_codec_resume_amp(codec);
3890 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3891 /* power down inactive DACs */
3892 if (spec->dac_list)
3893 stac92xx_power_down(codec);
dc81bed1
TI		 3894 /* invoke unsolicited event to reset the HP state */
3895 if (spec->hp_detect)
3896 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3897 return 0;
3898}
3899#endif
3900
2f2f4251
M		 3901static struct hda_codec_ops stac92xx_patch_ops = {
3902 .build_controls = stac92xx_build_controls,
3903 .build_pcms = stac92xx_build_pcms,
3904 .init = stac92xx_init,
3905 .free = stac92xx_free,
4e55096e 3906 .unsol_event = stac92xx_unsol_event,
cb53c626 3907#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3908 .resume = stac92xx_resume,
3909#endif
2f2f4251
M		 3910};
3911
3912static int patch_stac9200(struct hda_codec *codec)
3913{
3914 struct sigmatel_spec *spec;
c7d4b2fa 3915 int err;
2f2f4251 3916
e560d8d8 3917 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3918 if (spec == NULL)
3919 return -ENOMEM;
3920
3921 codec->spec = spec;
a4eed138 3922 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3923 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3924 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3925 stac9200_models,
3926 stac9200_cfg_tbl);
11b44bbd
RF		 3927 if (spec->board_config < 0) {
3928 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3929 err = stac92xx_save_bios_config_regs(codec);
3930 if (err < 0) {
3931 stac92xx_free(codec);
3932 return err;
3933 }
3934 spec->pin_configs = spec->bios_pin_configs;
3935 } else {
403d1944
MP		 3936 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3937 stac92xx_set_config_regs(codec);
3938 }
2f2f4251
M		 3939
3940 spec->multiout.max_channels = 2;
3941 spec->multiout.num_dacs = 1;
3942 spec->multiout.dac_nids = stac9200_dac_nids;
3943 spec->adc_nids = stac9200_adc_nids;
3944 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3945 spec->num_muxes = 1;
8b65727b 3946 spec->num_dmics = 0;
9e05b7a3 3947 spec->num_adcs = 1;
a64135a2 3948 spec->num_pwrs = 0;
c7d4b2fa 3949
bf277785
TD		 3950 if (spec->board_config == STAC_9200_GATEWAY ||
3951 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3952 spec->init = stac9200_eapd_init;
3953 else
3954 spec->init = stac9200_core_init;
2f2f4251 3955 spec->mixer = stac9200_mixer;
c7d4b2fa 3956
117f257d
TI		 3957 if (spec->board_config == STAC_9200_PANASONIC) {
3958 spec->gpio_mask = spec->gpio_dir = 0x09;
3959 spec->gpio_data = 0x00;
3960 }
3961
c7d4b2fa
M		 3962 err = stac9200_parse_auto_config(codec);
3963 if (err < 0) {
3964 stac92xx_free(codec);
3965 return err;
3966 }
2f2f4251
M		 3967
3968 codec->patch_ops = stac92xx_patch_ops;
3969
3970 return 0;
3971}
3972
8e21c34c
TD		 3973static int patch_stac925x(struct hda_codec *codec)
3974{
3975 struct sigmatel_spec *spec;
3976 int err;
3977
3978 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3979 if (spec == NULL)
3980 return -ENOMEM;
3981
3982 codec->spec = spec;
a4eed138 3983 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3984 spec->pin_nids = stac925x_pin_nids;
3985 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3986 stac925x_models,
3987 stac925x_cfg_tbl);
9e507abd 3988 again:
8e21c34c 3989 if (spec->board_config < 0) {
2c11f955
TD		 3990 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3991 "using BIOS defaults\n");
8e21c34c
TD		 3992 err = stac92xx_save_bios_config_regs(codec);
3993 if (err < 0) {
3994 stac92xx_free(codec);
3995 return err;
3996 }
3997 spec->pin_configs = spec->bios_pin_configs;
3998 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3999 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4000 stac92xx_set_config_regs(codec);
4001 }
4002
4003 spec->multiout.max_channels = 2;
4004 spec->multiout.num_dacs = 1;
4005 spec->multiout.dac_nids = stac925x_dac_nids;
4006 spec->adc_nids = stac925x_adc_nids;
4007 spec->mux_nids = stac925x_mux_nids;
4008 spec->num_muxes = 1;
9e05b7a3 4009 spec->num_adcs = 1;
a64135a2 4010 spec->num_pwrs = 0;
2c11f955
TD		 4011 switch (codec->vendor_id) {
4012 case 0x83847632: /* STAC9202 */
4013 case 0x83847633: /* STAC9202D */
4014 case 0x83847636: /* STAC9251 */
4015 case 0x83847637: /* STAC9251D */
f6e9852a 4016 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4017 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4018 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4019 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4020 break;
4021 default:
4022 spec->num_dmics = 0;
4023 break;
4024 }
8e21c34c
TD		 4025
4026 spec->init = stac925x_core_init;
4027 spec->mixer = stac925x_mixer;
4028
4029 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4030 if (!err) {
4031 if (spec->board_config < 0) {
4032 printk(KERN_WARNING "hda_codec: No auto-config is "
4033 "available, default to model=ref\n");
4034 spec->board_config = STAC_925x_REF;
4035 goto again;
4036 }
4037 err = -EINVAL;
4038 }
8e21c34c
TD		 4039 if (err < 0) {
4040 stac92xx_free(codec);
4041 return err;
4042 }
4043
4044 codec->patch_ops = stac92xx_patch_ops;
4045
4046 return 0;
4047}
4048
e1f0d669
MR		 4049static struct hda_input_mux stac92hd73xx_dmux = {
4050 .num_items = 4,
4051 .items = {
4052 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4053 { "Digital Mic 1", 0x09 },
4054 { "Digital Mic 2", 0x0a },
2a9c7816 4055 { "CD", 0x08 },
e1f0d669
MR		 4056 }
4057};
4058
4059static int patch_stac92hd73xx(struct hda_codec *codec)
4060{
4061 struct sigmatel_spec *spec;
4062 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4063 int err = 0;
4064
4065 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4066 if (spec == NULL)
4067 return -ENOMEM;
4068
4069 codec->spec = spec;
e99d32b3 4070 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4071 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4072 spec->pin_nids = stac92hd73xx_pin_nids;
4073 spec->board_config = snd_hda_check_board_config(codec,
4074 STAC_92HD73XX_MODELS,
4075 stac92hd73xx_models,
4076 stac92hd73xx_cfg_tbl);
4077again:
4078 if (spec->board_config < 0) {
4079 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4080 " STAC92HD73XX, using BIOS defaults\n");
4081 err = stac92xx_save_bios_config_regs(codec);
4082 if (err < 0) {
4083 stac92xx_free(codec);
4084 return err;
4085 }
4086 spec->pin_configs = spec->bios_pin_configs;
4087 } else {
4088 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4089 stac92xx_set_config_regs(codec);
4090 }
4091
4092 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4093 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4094
4095 if (spec->multiout.num_dacs < 0) {
4096 printk(KERN_WARNING "hda_codec: Could not determine "
4097 "number of channels defaulting to DAC count\n");
4098 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4099 }
4100
4101 switch (spec->multiout.num_dacs) {
4102 case 0x3: /* 6 Channel */
4103 spec->mixer = stac92hd73xx_6ch_mixer;
4104 spec->init = stac92hd73xx_6ch_core_init;
4105 break;
4106 case 0x4: /* 8 Channel */
e1f0d669
MR		 4107 spec->mixer = stac92hd73xx_8ch_mixer;
4108 spec->init = stac92hd73xx_8ch_core_init;
4109 break;
4110 case 0x5: /* 10 Channel */
e1f0d669
MR		 4111 spec->mixer = stac92hd73xx_10ch_mixer;
4112 spec->init = stac92hd73xx_10ch_core_init;
4113 };
4114
4115 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4116 spec->aloopback_mask = 0x01;
4117 spec->aloopback_shift = 8;
4118
1cd2224c 4119 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4120 spec->mux_nids = stac92hd73xx_mux_nids;
4121 spec->adc_nids = stac92hd73xx_adc_nids;
4122 spec->dmic_nids = stac92hd73xx_dmic_nids;
4123 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4124 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4125 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4126 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4127
4128 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4129 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4130 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4131 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4132 sizeof(stac92hd73xx_dmux));
4133
a7662640 4134 switch (spec->board_config) {
6b3ab21e 4135 case STAC_DELL_EQ:
d654a660 4136 spec->init = dell_eq_core_init;
6b3ab21e
MR		 4137 /* fallthru */
4138 case STAC_DELL_M6:
2a9c7816 4139 spec->num_smuxes = 0;
2a9c7816
MR		 4140 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4141 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4142 spec->num_amps = 1;
6b3ab21e
MR		 4143
4144 if (!spec->init)
4145 spec->init = dell_m6_core_init;
a7662640
MR		 4146 switch (codec->subsystem_id) {
4147 case 0x1028025e: /* Analog Mics */
4148 case 0x1028025f:
4149 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4150 spec->num_dmics = 0;
2a9c7816 4151 spec->private_dimux.num_items = 1;
a7662640 4152 break;
d654a660 4153 case 0x10280271: /* Digital Mics */
a7662640 4154 case 0x10280272:
d654a660
MR		 4155 case 0x10280254:
4156 case 0x10280255:
a7662640
MR		 4157 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4158 spec->num_dmics = 1;
2a9c7816 4159 spec->private_dimux.num_items = 2;
a7662640
MR		 4160 break;
4161 case 0x10280256: /* Both */
4162 case 0x10280057:
4163 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4164 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4165 spec->num_dmics = 1;
2a9c7816 4166 spec->private_dimux.num_items = 2;
a7662640
MR		 4167 break;
4168 }
4169 break;
4170 default:
4171 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4172 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4173 }
b2c4f4d7
MR		 4174 if (spec->board_config > STAC_92HD73XX_REF) {
4175 /* GPIO0 High = Enable EAPD */
4176 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4177 spec->gpio_data = 0x01;
4178 }
2a9c7816 4179 spec->dinput_mux = &spec->private_dimux;
a7662640 4180
a64135a2
MR		 4181 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4182 spec->pwr_nids = stac92hd73xx_pwr_nids;
4183
d9737751 4184 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4185
4186 if (!err) {
4187 if (spec->board_config < 0) {
4188 printk(KERN_WARNING "hda_codec: No auto-config is "
4189 "available, default to model=ref\n");
4190 spec->board_config = STAC_92HD73XX_REF;
4191 goto again;
4192 }
4193 err = -EINVAL;
4194 }
4195
4196 if (err < 0) {
4197 stac92xx_free(codec);
4198 return err;
4199 }
4200
4201 codec->patch_ops = stac92xx_patch_ops;
4202
4203 return 0;
4204}
4205
d0513fc6
MR		 4206static struct hda_input_mux stac92hd83xxx_dmux = {
4207 .num_items = 3,
4208 .items = {
4209 { "Analog Inputs", 0x03 },
4210 { "Digital Mic 1", 0x04 },
4211 { "Digital Mic 2", 0x05 },
4212 }
4213};
4214
4215static int patch_stac92hd83xxx(struct hda_codec *codec)
4216{
4217 struct sigmatel_spec *spec;
4218 int err;
4219
4220 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4221 if (spec == NULL)
4222 return -ENOMEM;
4223
4224 codec->spec = spec;
0ffa9807 4225 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4226 spec->mono_nid = 0x19;
4227 spec->digbeep_nid = 0x21;
4228 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4229 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4230 spec->adc_nids = stac92hd83xxx_adc_nids;
4231 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4232 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4233 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4234 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4235
4236 spec->init = stac92hd83xxx_core_init;
4237 switch (codec->vendor_id) {
4238 case 0x111d7605:
4239 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4240 break;
4241 default:
4242 spec->num_pwrs--;
4243 spec->init++; /* switch to config #2 */
4244 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4245 }
4246
4247 spec->mixer = stac92hd83xxx_mixer;
4248 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4249 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4250 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4251 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4252 spec->dinput_mux = &stac92hd83xxx_dmux;
4253 spec->pin_nids = stac92hd83xxx_pin_nids;
4254 spec->board_config = snd_hda_check_board_config(codec,
4255 STAC_92HD83XXX_MODELS,
4256 stac92hd83xxx_models,
4257 stac92hd83xxx_cfg_tbl);
4258again:
4259 if (spec->board_config < 0) {
4260 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4261 " STAC92HD83XXX, using BIOS defaults\n");
4262 err = stac92xx_save_bios_config_regs(codec);
4263 if (err < 0) {
4264 stac92xx_free(codec);
4265 return err;
4266 }
4267 spec->pin_configs = spec->bios_pin_configs;
4268 } else {
4269 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4270 stac92xx_set_config_regs(codec);
4271 }
4272
4273 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4274 if (!err) {
4275 if (spec->board_config < 0) {
4276 printk(KERN_WARNING "hda_codec: No auto-config is "
4277 "available, default to model=ref\n");
4278 spec->board_config = STAC_92HD83XXX_REF;
4279 goto again;
4280 }
4281 err = -EINVAL;
4282 }
4283
4284 if (err < 0) {
4285 stac92xx_free(codec);
4286 return err;
4287 }
4288
4289 codec->patch_ops = stac92xx_patch_ops;
4290
4291 return 0;
4292}
4293
8daaaa97
MR		 4294#ifdef SND_HDA_NEEDS_RESUME
4295static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4296{
4297 struct sigmatel_spec *spec = codec->spec;
4298 int i;
4299 snd_hda_codec_write_cache(codec, codec->afg, 0,
4300 AC_VERB_SET_POWER_STATE, pwr);
4301
4302 msleep(1);
4303 for (i = 0; i < spec->num_adcs; i++) {
4304 snd_hda_codec_write_cache(codec,
4305 spec->adc_nids[i], 0,
4306 AC_VERB_SET_POWER_STATE, pwr);
4307 }
4308};
4309
4310static int stac92hd71xx_resume(struct hda_codec *codec)
4311{
4312 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4313 return stac92xx_resume(codec);
4314}
4315
4316static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4317{
4318 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4319 return 0;
4320};
4321
4322#endif
4323
4324static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4325 .build_controls = stac92xx_build_controls,
4326 .build_pcms = stac92xx_build_pcms,
4327 .init = stac92xx_init,
4328 .free = stac92xx_free,
4329 .unsol_event = stac92xx_unsol_event,
4330#ifdef SND_HDA_NEEDS_RESUME
4331 .resume = stac92hd71xx_resume,
4332 .suspend = stac92hd71xx_suspend,
4333#endif
4334};
d0513fc6 4335
4b33c767
MR		 4336static struct hda_input_mux stac92hd71bxx_dmux = {
4337 .num_items = 4,
4338 .items = {
4339 { "Analog Inputs", 0x00 },
4340 { "Mixer", 0x01 },
4341 { "Digital Mic 1", 0x02 },
4342 { "Digital Mic 2", 0x03 },
4343 }
4344};
4345
e035b841
MR		 4346static int patch_stac92hd71bxx(struct hda_codec *codec)
4347{
4348 struct sigmatel_spec *spec;
4349 int err = 0;
4350
4351 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4352 if (spec == NULL)
4353 return -ENOMEM;
4354
4355 codec->spec = spec;
8daaaa97 4356 codec->patch_ops = stac92xx_patch_ops;
e035b841 4357 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4358 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4359 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4360 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4361 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4362 spec->board_config = snd_hda_check_board_config(codec,
4363 STAC_92HD71BXX_MODELS,
4364 stac92hd71bxx_models,
4365 stac92hd71bxx_cfg_tbl);
4366again:
4367 if (spec->board_config < 0) {
4368 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4369 " STAC92HD71BXX, using BIOS defaults\n");
4370 err = stac92xx_save_bios_config_regs(codec);
4371 if (err < 0) {
4372 stac92xx_free(codec);
4373 return err;
4374 }
4375 spec->pin_configs = spec->bios_pin_configs;
4376 } else {
4377 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4378 stac92xx_set_config_regs(codec);
4379 }
4380
541eee87
MR		 4381 switch (codec->vendor_id) {
4382 case 0x111d76b6: /* 4 Port without Analog Mixer */
4383 case 0x111d76b7:
4384 case 0x111d76b4: /* 6 Port without Analog Mixer */
4385 case 0x111d76b5:
4386 spec->mixer = stac92hd71bxx_mixer;
4387 spec->init = stac92hd71bxx_core_init;
0ffa9807 4388 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4389 break;
aafc4412 4390 case 0x111d7608: /* 5 Port with Analog Mixer */
72474be6
MR		 4391 switch (codec->subsystem_id) {
4392 case 0x103c361a:
4393 /* Enable VREF power saving on GPIO1 detect */
4394 snd_hda_codec_write(codec, codec->afg, 0,
4395 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4396 snd_hda_codec_write_cache(codec, codec->afg, 0,
4397 AC_VERB_SET_UNSOLICITED_ENABLE,
4398 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4399 spec->gpio_mask |= 0x02;
4400 break;
4401 }
8daaaa97
MR		 4402 if ((codec->revision_id & 0xf) == 0 ||
4403 (codec->revision_id & 0xf) == 1) {
4404#ifdef SND_HDA_NEEDS_RESUME
4405 codec->patch_ops = stac92hd71bxx_patch_ops;
4406#endif
4407 spec->stream_delay = 40; /* 40 milliseconds */
4408 }
4409
aafc4412
MR		 4410 /* no output amps */
4411 spec->num_pwrs = 0;
4412 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4413 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4414
4415 /* disable VSW */
4416 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4417 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4418 break;
4419 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4420 if ((codec->revision_id & 0xf) == 1) {
4421#ifdef SND_HDA_NEEDS_RESUME
4422 codec->patch_ops = stac92hd71bxx_patch_ops;
4423#endif
4424 spec->stream_delay = 40; /* 40 milliseconds */
4425 }
4426
aafc4412
MR		 4427 /* no output amps */
4428 spec->num_pwrs = 0;
4429 /* fallthru */
541eee87 4430 default:
4b33c767 4431 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4432 spec->mixer = stac92hd71bxx_analog_mixer;
4433 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4434 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4435 }
4436
4b33c767 4437 spec->aloopback_mask = 0x50;
541eee87
MR		 4438 spec->aloopback_shift = 0;
4439
b2c4f4d7
MR		 4440 if (spec->board_config > STAC_92HD71BXX_REF) {
4441 /* GPIO0 = EAPD */
4442 spec->gpio_mask = 0x01;
4443 spec->gpio_dir = 0x01;
4444 spec->gpio_data = 0x01;
4445 }
e035b841 4446
8daaaa97 4447 spec->powerdown_adcs = 1;
1cd2224c 4448 spec->digbeep_nid = 0x26;
e035b841
MR		 4449 spec->mux_nids = stac92hd71bxx_mux_nids;
4450 spec->adc_nids = stac92hd71bxx_adc_nids;
4451 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4452 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4453 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4454 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4455
4456 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4457 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4458
6a14f585
MR		 4459 switch (spec->board_config) {
4460 case STAC_HP_M4:
4461 spec->num_dmics = 0;
b9aea715 4462 spec->num_smuxes = 0;
6a14f585
MR		 4463 spec->num_dmuxes = 0;
4464
4465 /* enable internal microphone */
b9aea715
MR		 4466 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4467 stac92xx_auto_set_pinctl(codec, 0x0e,
4468 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
6a14f585
MR		 4469 break;
4470 default:
4471 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4472 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4473 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4474 };
4475
aea7bb0a 4476 spec->multiout.num_dacs = 1;
e035b841
MR		 4477 spec->multiout.hp_nid = 0x11;
4478 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4479 if (spec->dinput_mux)
4480 spec->private_dimux.num_items +=
4481 spec->num_dmics -
4482 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4483
4484 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4485 if (!err) {
4486 if (spec->board_config < 0) {
4487 printk(KERN_WARNING "hda_codec: No auto-config is "
4488 "available, default to model=ref\n");
4489 spec->board_config = STAC_92HD71BXX_REF;
4490 goto again;
4491 }
4492 err = -EINVAL;
4493 }
4494
4495 if (err < 0) {
4496 stac92xx_free(codec);
4497 return err;
4498 }
4499
e035b841
MR		 4500 return 0;
4501};
4502
2f2f4251
M		 4503static int patch_stac922x(struct hda_codec *codec)
4504{
4505 struct sigmatel_spec *spec;
c7d4b2fa 4506 int err;
2f2f4251 4507
e560d8d8 4508 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4509 if (spec == NULL)
4510 return -ENOMEM;
4511
4512 codec->spec = spec;
a4eed138 4513 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4514 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4515 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4516 stac922x_models,
4517 stac922x_cfg_tbl);
536319af 4518 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4519 spec->gpio_mask = spec->gpio_dir = 0x03;
4520 spec->gpio_data = 0x03;
3fc24d85
TI		 4521 /* Intel Macs have all same PCI SSID, so we need to check
4522 * codec SSID to distinguish the exact models
4523 */
6f0778d8 4524 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4525 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4526
4527 case 0x106b0800:
4528 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4529 break;
5d5d3bc3
IZ		 4530 case 0x106b0600:
4531 case 0x106b0700:
4532 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4533 break;
5d5d3bc3
IZ		 4534 case 0x106b0e00:
4535 case 0x106b0f00:
4536 case 0x106b1600:
4537 case 0x106b1700:
4538 case 0x106b0200:
4539 case 0x106b1e00:
4540 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4541 break;
5d5d3bc3
IZ		 4542 case 0x106b1a00:
4543 case 0x00000100:
4544 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4545 break;
5d5d3bc3
IZ		 4546 case 0x106b0a00:
4547 case 0x106b2200:
4548 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4549 break;
536319af
NB		 4550 default:
4551 spec->board_config = STAC_INTEL_MAC_V3;
4552 break;
3fc24d85
TI		 4553 }
4554 }
4555
9e507abd 4556 again:
11b44bbd
RF		 4557 if (spec->board_config < 0) {
4558 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4559 "using BIOS defaults\n");
4560 err = stac92xx_save_bios_config_regs(codec);
4561 if (err < 0) {
4562 stac92xx_free(codec);
4563 return err;
4564 }
4565 spec->pin_configs = spec->bios_pin_configs;
4566 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4567 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4568 stac92xx_set_config_regs(codec);
4569 }
2f2f4251 4570
c7d4b2fa
M		 4571 spec->adc_nids = stac922x_adc_nids;
4572 spec->mux_nids = stac922x_mux_nids;
2549413e 4573 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4574 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4575 spec->num_dmics = 0;
a64135a2 4576 spec->num_pwrs = 0;
c7d4b2fa
M		 4577
4578 spec->init = stac922x_core_init;
2f2f4251 4579 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4580
4581 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4582
3cc08dc6 4583 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4584 if (!err) {
4585 if (spec->board_config < 0) {
4586 printk(KERN_WARNING "hda_codec: No auto-config is "
4587 "available, default to model=ref\n");
4588 spec->board_config = STAC_D945_REF;
4589 goto again;
4590 }
4591 err = -EINVAL;
4592 }
3cc08dc6
MP		 4593 if (err < 0) {
4594 stac92xx_free(codec);
4595 return err;
4596 }
4597
4598 codec->patch_ops = stac92xx_patch_ops;
4599
807a4636
TI		 4600 /* Fix Mux capture level; max to 2 */
4601 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4602 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4603 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4604 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4605 (0 << AC_AMPCAP_MUTE_SHIFT));
4606
3cc08dc6
MP		 4607 return 0;
4608}
4609
4610static int patch_stac927x(struct hda_codec *codec)
4611{
4612 struct sigmatel_spec *spec;
4613 int err;
4614
4615 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4616 if (spec == NULL)
4617 return -ENOMEM;
4618
4619 codec->spec = spec;
a4eed138 4620 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4621 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4622 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4623 stac927x_models,
4624 stac927x_cfg_tbl);
9e507abd 4625 again:
8e9068b1
MR		 4626 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4627 if (spec->board_config < 0)
4628 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4629 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4630 err = stac92xx_save_bios_config_regs(codec);
4631 if (err < 0) {
4632 stac92xx_free(codec);
4633 return err;
4634 }
4635 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4636 } else {
3cc08dc6
MP		 4637 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4638 stac92xx_set_config_regs(codec);
4639 }
4640
1cd2224c 4641 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4642 spec->adc_nids = stac927x_adc_nids;
4643 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4644 spec->mux_nids = stac927x_mux_nids;
4645 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4646 spec->smux_nids = stac927x_smux_nids;
4647 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4648 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4649 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4650 spec->multiout.dac_nids = spec->dac_nids;
4651
81d3dbde 4652 switch (spec->board_config) {
93ed1503 4653 case STAC_D965_3ST:
93ed1503 4654 case STAC_D965_5ST:
8e9068b1 4655 /* GPIO0 High = Enable EAPD */
0fc9dec4 4656 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4657 spec->gpio_data = 0x01;
8e9068b1
MR		 4658 spec->num_dmics = 0;
4659
93ed1503 4660 spec->init = d965_core_init;
9e05b7a3 4661 spec->mixer = stac927x_mixer;
81d3dbde 4662 break;
8e9068b1 4663 case STAC_DELL_BIOS:
780c8be4
MR		 4664 switch (codec->subsystem_id) {
4665 case 0x10280209:
4666 case 0x1028022e:
4667 /* correct the device field to SPDIF out */
4668 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4669 break;
4670 };
03d7ca17
MR		 4671 /* configure the analog microphone on some laptops */
4672 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4673 /* correct the front output jack as a hp out */
7989fba9 4674 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4675 /* correct the front input jack as a mic */
4676 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4677 /* fallthru */
8e9068b1
MR		 4678 case STAC_DELL_3ST:
4679 /* GPIO2 High = Enable EAPD */
0fc9dec4 4680 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4681 spec->gpio_data = 0x04;
7f16859a
MR		 4682 spec->dmic_nids = stac927x_dmic_nids;
4683 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4684
8e9068b1
MR		 4685 spec->init = d965_core_init;
4686 spec->mixer = stac927x_mixer;
4687 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4688 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4689 break;
4690 default:
b2c4f4d7
MR		 4691 if (spec->board_config > STAC_D965_REF) {
4692 /* GPIO0 High = Enable EAPD */
4693 spec->eapd_mask = spec->gpio_mask = 0x01;
4694 spec->gpio_dir = spec->gpio_data = 0x01;
4695 }
8e9068b1
MR		 4696 spec->num_dmics = 0;
4697
4698 spec->init = stac927x_core_init;
4699 spec->mixer = stac927x_mixer;
7f16859a
MR		 4700 }
4701
a64135a2 4702 spec->num_pwrs = 0;
e1f0d669
MR		 4703 spec->aloopback_mask = 0x40;
4704 spec->aloopback_shift = 0;
8e9068b1 4705
3cc08dc6 4706 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4707 if (!err) {
4708 if (spec->board_config < 0) {
4709 printk(KERN_WARNING "hda_codec: No auto-config is "
4710 "available, default to model=ref\n");
4711 spec->board_config = STAC_D965_REF;
4712 goto again;
4713 }
4714 err = -EINVAL;
4715 }
c7d4b2fa
M		 4716 if (err < 0) {
4717 stac92xx_free(codec);
4718 return err;
4719 }
2f2f4251
M		 4720
4721 codec->patch_ops = stac92xx_patch_ops;
4722
52987656
TI		 4723 /*
4724 * !!FIXME!!
4725 * The STAC927x seem to require fairly long delays for certain
4726 * command sequences. With too short delays (even if the answer
4727 * is set to RIRB properly), it results in the silence output
4728 * on some hardwares like Dell.
4729 *
4730 * The below flag enables the longer delay (see get_response
4731 * in hda_intel.c).
4732 */
4733 codec->bus->needs_damn_long_delay = 1;
4734
2f2f4251
M		 4735 return 0;
4736}
4737
f3302a59
MP		 4738static int patch_stac9205(struct hda_codec *codec)
4739{
4740 struct sigmatel_spec *spec;
8259980e 4741 int err;
f3302a59
MP		 4742
4743 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4744 if (spec == NULL)
4745 return -ENOMEM;
4746
4747 codec->spec = spec;
a4eed138 4748 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4749 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4750 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4751 stac9205_models,
4752 stac9205_cfg_tbl);
9e507abd 4753 again:
11b44bbd
RF		 4754 if (spec->board_config < 0) {
4755 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4756 err = stac92xx_save_bios_config_regs(codec);
4757 if (err < 0) {
4758 stac92xx_free(codec);
4759 return err;
4760 }
4761 spec->pin_configs = spec->bios_pin_configs;
4762 } else {
f3302a59
MP		 4763 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4764 stac92xx_set_config_regs(codec);
4765 }
4766
1cd2224c 4767 spec->digbeep_nid = 0x23;
f3302a59 4768 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4769 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4770 spec->mux_nids = stac9205_mux_nids;
2549413e 4771 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4772 spec->smux_nids = stac9205_smux_nids;
4773 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4774 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4775 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4776 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4777 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4778 spec->num_pwrs = 0;
f3302a59
MP		 4779
4780 spec->init = stac9205_core_init;
4781 spec->mixer = stac9205_mixer;
4782
e1f0d669
MR		 4783 spec->aloopback_mask = 0x40;
4784 spec->aloopback_shift = 0;
f3302a59 4785 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4786
ae0a8ed8 4787 switch (spec->board_config){
ae0a8ed8 4788 case STAC_9205_DELL_M43:
87d48363
MR		 4789 /* Enable SPDIF in/out */
4790 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4791 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4792
4fe5195c
MR		 4793 /* Enable unsol response for GPIO4/Dock HP connection */
4794 snd_hda_codec_write(codec, codec->afg, 0,
4795 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4796 snd_hda_codec_write_cache(codec, codec->afg, 0,
4797 AC_VERB_SET_UNSOLICITED_ENABLE,
4798 (AC_USRSP_EN | STAC_HP_EVENT));
4799
4800 spec->gpio_dir = 0x0b;
0fc9dec4 4801 spec->eapd_mask = 0x01;
4fe5195c
MR		 4802 spec->gpio_mask = 0x1b;
4803 spec->gpio_mute = 0x10;
e2e7d624 4804 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4805 * GPIO3 Low = DRM
87d48363 4806 */
4fe5195c 4807 spec->gpio_data = 0x01;
ae0a8ed8 4808 break;
b2c4f4d7
MR		 4809 case STAC_9205_REF:
4810 /* SPDIF-In enabled */
4811 break;
ae0a8ed8
TD		 4812 default:
4813 /* GPIO0 High = EAPD */
0fc9dec4 4814 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4815 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4816 break;
4817 }
33382403 4818
f3302a59 4819 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4820 if (!err) {
4821 if (spec->board_config < 0) {
4822 printk(KERN_WARNING "hda_codec: No auto-config is "
4823 "available, default to model=ref\n");
4824 spec->board_config = STAC_9205_REF;
4825 goto again;
4826 }
4827 err = -EINVAL;
4828 }
f3302a59
MP		 4829 if (err < 0) {
4830 stac92xx_free(codec);
4831 return err;
4832 }
4833
4834 codec->patch_ops = stac92xx_patch_ops;
4835
4836 return 0;
4837}
4838
db064e50 4839/*
6d859065 4840 * STAC9872 hack
db064e50
TI		 4841 */
4842
99ccc560 4843/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4844static hda_nid_t vaio_dacs[] = { 0x2 };
4845#define VAIO_HP_DAC 0x5
4846static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4847static hda_nid_t vaio_mux_nids[] = { 0x15 };
4848
4849static struct hda_input_mux vaio_mux = {
a3a2f429 4850 .num_items = 3,
db064e50 4851 .items = {
d773781c 4852 /* { "HP", 0x0 }, */
1624cb9a
TI		 4853 { "Mic Jack", 0x1 },
4854 { "Internal Mic", 0x2 },
db064e50
TI		 4855 { "PCM", 0x3 },
4856 }
4857};
4858
4859static struct hda_verb vaio_init[] = {
4860 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4861 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4862 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4863 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4864 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4865 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4866 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4867 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4868 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4869 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4870 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4871 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4872 {}
4873};
4874
6d859065
GM		 4875static struct hda_verb vaio_ar_init[] = {
4876 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4877 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4878 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4879 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4880/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4881 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4882 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4883 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4884 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4885/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4886 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4887 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4888 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4889 {}
4890};
4891
db064e50 4892/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4893static struct hda_bind_ctls vaio_bind_master_vol = {
4894 .ops = &snd_hda_bind_vol,
4895 .values = {
4896 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4897 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4898 0
4899 },
4900};
db064e50
TI		 4901
4902/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4903static struct hda_bind_ctls vaio_bind_master_sw = {
4904 .ops = &snd_hda_bind_sw,
4905 .values = {
4906 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4907 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4908 0,
4909 },
4910};
db064e50
TI		 4911
4912static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4913 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4914 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4915 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4916 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4917 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4918 {
4919 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4920 .name = "Capture Source",
4921 .count = 1,
4922 .info = stac92xx_mux_enum_info,
4923 .get = stac92xx_mux_enum_get,
4924 .put = stac92xx_mux_enum_put,
4925 },
4926 {}
4927};
4928
6d859065 4929static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4930 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4931 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4932 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4933 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4934 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4935 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4936 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4937 {
4938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4939 .name = "Capture Source",
4940 .count = 1,
4941 .info = stac92xx_mux_enum_info,
4942 .get = stac92xx_mux_enum_get,
4943 .put = stac92xx_mux_enum_put,
4944 },
4945 {}
4946};
4947
4948static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4949 .build_controls = stac92xx_build_controls,
4950 .build_pcms = stac92xx_build_pcms,
4951 .init = stac92xx_init,
4952 .free = stac92xx_free,
cb53c626 4953#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4954 .resume = stac92xx_resume,
4955#endif
4956};
4957
72e7b0dd
TI		 4958static int stac9872_vaio_init(struct hda_codec *codec)
4959{
4960 int err;
4961
4962 err = stac92xx_init(codec);
4963 if (err < 0)
4964 return err;
4965 if (codec->patch_ops.unsol_event)
4966 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4967 return 0;
4968}
4969
4970static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4971{
40c1d308 4972 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4973 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4974 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4975 } else {
4976 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4977 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4978 }
4979}
4980
4981static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4982{
4983 switch (res >> 26) {
4984 case STAC_HP_EVENT:
4985 stac9872_vaio_hp_detect(codec, res);
4986 break;
4987 }
4988}
4989
4990static struct hda_codec_ops stac9872_vaio_patch_ops = {
4991 .build_controls = stac92xx_build_controls,
4992 .build_pcms = stac92xx_build_pcms,
4993 .init = stac9872_vaio_init,
4994 .free = stac92xx_free,
4995 .unsol_event = stac9872_vaio_unsol_event,
4996#ifdef CONFIG_PM
4997 .resume = stac92xx_resume,
4998#endif
4999};
5000
6d859065
GM		 5001enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5002 CXD9872RD_VAIO,
5003 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5004 STAC9872AK_VAIO,
5005 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5006 STAC9872K_VAIO,
5007 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5008 CXD9872AKD_VAIO,
5009 STAC_9872_MODELS,
5010};
5011
5012static const char *stac9872_models[STAC_9872_MODELS] = {
5013 [CXD9872RD_VAIO] = "vaio",
5014 [CXD9872AKD_VAIO] = "vaio-ar",
5015};
5016
5017static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5018 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5019 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5020 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5021 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5022 {}
5023};
5024
6d859065 5025static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5026{
5027 struct sigmatel_spec *spec;
5028 int board_config;
5029
f5fcc13c
TI		 5030 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5031 stac9872_models,
5032 stac9872_cfg_tbl);
db064e50
TI		 5033 if (board_config < 0)
5034 /* unknown config, let generic-parser do its job... */
5035 return snd_hda_parse_generic_codec(codec);
5036
5037 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5038 if (spec == NULL)
5039 return -ENOMEM;
5040
5041 codec->spec = spec;
5042 switch (board_config) {
6d859065
GM		 5043 case CXD9872RD_VAIO:
5044 case STAC9872AK_VAIO:
5045 case STAC9872K_VAIO:
db064e50
TI		 5046 spec->mixer = vaio_mixer;
5047 spec->init = vaio_init;
5048 spec->multiout.max_channels = 2;
5049 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5050 spec->multiout.dac_nids = vaio_dacs;
5051 spec->multiout.hp_nid = VAIO_HP_DAC;
5052 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5053 spec->adc_nids = vaio_adcs;
a64135a2 5054 spec->num_pwrs = 0;
db064e50
TI		 5055 spec->input_mux = &vaio_mux;
5056 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5057 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5058 break;
6d859065
GM		 5059
5060 case CXD9872AKD_VAIO:
5061 spec->mixer = vaio_ar_mixer;
5062 spec->init = vaio_ar_init;
5063 spec->multiout.max_channels = 2;
5064 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5065 spec->multiout.dac_nids = vaio_dacs;
5066 spec->multiout.hp_nid = VAIO_HP_DAC;
5067 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5068 spec->num_pwrs = 0;
6d859065
GM		 5069 spec->adc_nids = vaio_adcs;
5070 spec->input_mux = &vaio_mux;
5071 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5072 codec->patch_ops = stac9872_patch_ops;
6d859065 5073 break;
db064e50
TI		 5074 }
5075
db064e50
TI		 5076 return 0;
5077}
5078
5079
2f2f4251
M		 5080/*
5081 * patch entries
5082 */
5083struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5084 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5085 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5086 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5087 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5088 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5089 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5090 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5091 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5092 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5093 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5094 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5095 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5096 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5097 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5098 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5099 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5100 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5101 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5102 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5103 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5104 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5105 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5106 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5107 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5108 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5109 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5110 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5111 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5112 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5113 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5114 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5115 /* The following does not take into account .id=0x83847661 when subsys =
5116 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5117 * currently not fully supported.
5118 */
5119 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5120 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5121 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5122 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5123 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5124 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5125 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5126 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5127 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5128 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5129 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5130 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5131 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5132 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5133 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5134 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5135 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5136 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5137 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5138 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5139 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5140 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5141 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5142 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5143 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5144 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5145 {} /* terminator */
5146};
Clone of davem's net-next-2.6 tree