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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
661cd8fb
TI		 73 STAC_DELL_M6_AMIC,
74 STAC_DELL_M6_DMIC,
75 STAC_DELL_M6_BOTH,
6b3ab21e 76 STAC_DELL_EQ,
e1f0d669
MR		 77 STAC_92HD73XX_MODELS
78};
79
d0513fc6
MR		 80enum {
81 STAC_92HD83XXX_REF,
82 STAC_92HD83XXX_MODELS
83};
84
e035b841
MR		 85enum {
86 STAC_92HD71BXX_REF,
a7662640
MR		 87 STAC_DELL_M4_1,
88 STAC_DELL_M4_2,
3a7abfd2 89 STAC_DELL_M4_3,
6a14f585 90 STAC_HP_M4,
e035b841
MR		 91 STAC_92HD71BXX_MODELS
92};
93
8e21c34c
TD		 94enum {
95 STAC_925x_REF,
96 STAC_M2_2,
97 STAC_MA6,
2c11f955 98 STAC_PA6,
8e21c34c
TD		 99 STAC_925x_MODELS
100};
101
f5fcc13c
TI		 102enum {
103 STAC_D945_REF,
104 STAC_D945GTP3,
105 STAC_D945GTP5,
5d5d3bc3
IZ		 106 STAC_INTEL_MAC_V1,
107 STAC_INTEL_MAC_V2,
108 STAC_INTEL_MAC_V3,
109 STAC_INTEL_MAC_V4,
110 STAC_INTEL_MAC_V5,
536319af
NB		 111 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
112 * is given, one of the above models will be
113 * chosen according to the subsystem id. */
dfe495d0 114 /* for backward compatibility */
f5fcc13c 115 STAC_MACMINI,
3fc24d85 116 STAC_MACBOOK,
6f0778d8
NB		 117 STAC_MACBOOK_PRO_V1,
118 STAC_MACBOOK_PRO_V2,
f16928fb 119 STAC_IMAC_INTEL,
0dae0f83 120 STAC_IMAC_INTEL_20,
8c650087 121 STAC_ECS_202,
dfe495d0
TI		 122 STAC_922X_DELL_D81,
123 STAC_922X_DELL_D82,
124 STAC_922X_DELL_M81,
125 STAC_922X_DELL_M82,
f5fcc13c
TI		 126 STAC_922X_MODELS
127};
128
129enum {
130 STAC_D965_REF,
131 STAC_D965_3ST,
132 STAC_D965_5ST,
4ff076e5 133 STAC_DELL_3ST,
8e9068b1 134 STAC_DELL_BIOS,
f5fcc13c
TI		 135 STAC_927X_MODELS
136};
403d1944 137
2f2f4251 138struct sigmatel_spec {
c8b6bf9b 139 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 140 unsigned int num_mixers;
141
403d1944 142 int board_config;
0253fdcd 143 unsigned int eapd_switch: 1;
c7d4b2fa 144 unsigned int surr_switch: 1;
403d1944
MP		 145 unsigned int line_switch: 1;
146 unsigned int mic_switch: 1;
3cc08dc6 147 unsigned int alt_switch: 1;
82bc955f 148 unsigned int hp_detect: 1;
00ef50c2 149 unsigned int spdif_mute: 1;
c7d4b2fa 150
4fe5195c 151 /* gpio lines */
0fc9dec4 152 unsigned int eapd_mask;
4fe5195c
MR		 153 unsigned int gpio_mask;
154 unsigned int gpio_dir;
155 unsigned int gpio_data;
156 unsigned int gpio_mute;
157
8daaaa97
MR		 158 /* stream */
159 unsigned int stream_delay;
160
4fe5195c 161 /* analog loopback */
e1f0d669
MR		 162 unsigned char aloopback_mask;
163 unsigned char aloopback_shift;
8259980e 164
a64135a2
MR		 165 /* power management */
166 unsigned int num_pwrs;
d0513fc6 167 unsigned int *pwr_mapping;
a64135a2 168 hda_nid_t *pwr_nids;
b76c850f 169 hda_nid_t *dac_list;
a64135a2 170
2f2f4251 171 /* playback */
b22b4821 172 struct hda_input_mux *mono_mux;
89385035 173 struct hda_input_mux *amp_mux;
b22b4821 174 unsigned int cur_mmux;
2f2f4251 175 struct hda_multi_out multiout;
3cc08dc6 176 hda_nid_t dac_nids[5];
2f2f4251
M		 177
178 /* capture */
179 hda_nid_t *adc_nids;
2f2f4251 180 unsigned int num_adcs;
dabbed6f
M		 181 hda_nid_t *mux_nids;
182 unsigned int num_muxes;
8b65727b
MP		 183 hda_nid_t *dmic_nids;
184 unsigned int num_dmics;
e1f0d669 185 hda_nid_t *dmux_nids;
1697055e 186 unsigned int num_dmuxes;
d9737751
MR		 187 hda_nid_t *smux_nids;
188 unsigned int num_smuxes;
65973632 189 const char **spdif_labels;
d9737751 190
dabbed6f 191 hda_nid_t dig_in_nid;
b22b4821 192 hda_nid_t mono_nid;
1cd2224c
MR		 193 hda_nid_t anabeep_nid;
194 hda_nid_t digbeep_nid;
2f2f4251 195
2f2f4251
M		 196 /* pin widgets */
197 hda_nid_t *pin_nids;
198 unsigned int num_pins;
2f2f4251 199 unsigned int *pin_configs;
11b44bbd 200 unsigned int *bios_pin_configs;
2f2f4251
M		 201
202 /* codec specific stuff */
203 struct hda_verb *init;
c8b6bf9b 204 struct snd_kcontrol_new *mixer;
2f2f4251
M		 205
206 /* capture source */
8b65727b 207 struct hda_input_mux *dinput_mux;
e1f0d669 208 unsigned int cur_dmux[2];
c7d4b2fa 209 struct hda_input_mux *input_mux;
3cc08dc6 210 unsigned int cur_mux[3];
d9737751
MR		 211 struct hda_input_mux *sinput_mux;
212 unsigned int cur_smux[2];
2a9c7816
MR		 213 unsigned int cur_amux;
214 hda_nid_t *amp_nids;
215 unsigned int num_amps;
8daaaa97 216 unsigned int powerdown_adcs;
2f2f4251 217
403d1944
MP		 218 /* i/o switches */
219 unsigned int io_switch[2];
0fb87bb4 220 unsigned int clfe_swap;
d7a89436 221 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 222 unsigned int aloopback;
2f2f4251 223
c7d4b2fa
M		 224 struct hda_pcm pcm_rec[2]; /* PCM information */
225
226 /* dynamic controls and input_mux */
227 struct auto_pin_cfg autocfg;
228 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 229 struct snd_kcontrol_new *kctl_alloc;
8b65727b 230 struct hda_input_mux private_dimux;
c7d4b2fa 231 struct hda_input_mux private_imux;
d9737751 232 struct hda_input_mux private_smux;
89385035 233 struct hda_input_mux private_amp_mux;
b22b4821 234 struct hda_input_mux private_mono_mux;
2f2f4251
M		 235};
236
237static hda_nid_t stac9200_adc_nids[1] = {
238 0x03,
239};
240
241static hda_nid_t stac9200_mux_nids[1] = {
242 0x0c,
243};
244
245static hda_nid_t stac9200_dac_nids[1] = {
246 0x02,
247};
248
a64135a2
MR		 249static hda_nid_t stac92hd73xx_pwr_nids[8] = {
250 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
251 0x0f, 0x10, 0x11
252};
253
0ffa9807
MR		 254static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
255 0x26, 0,
256};
257
e1f0d669
MR		 258static hda_nid_t stac92hd73xx_adc_nids[2] = {
259 0x1a, 0x1b
260};
261
2a9c7816
MR		 262#define DELL_M6_AMP 2
263static hda_nid_t stac92hd73xx_amp_nids[3] = {
264 0x0b, 0x0c, 0x0e
89385035
MR		 265};
266
e1f0d669
MR		 267#define STAC92HD73XX_NUM_DMICS 2
268static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
269 0x13, 0x14, 0
270};
271
272#define STAC92HD73_DAC_COUNT 5
273static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
274 0x15, 0x16, 0x17, 0x18, 0x19,
275};
276
277static hda_nid_t stac92hd73xx_mux_nids[4] = {
278 0x28, 0x29, 0x2a, 0x2b,
279};
280
281static hda_nid_t stac92hd73xx_dmux_nids[2] = {
282 0x20, 0x21,
283};
284
d9737751
MR		 285static hda_nid_t stac92hd73xx_smux_nids[2] = {
286 0x22, 0x23,
287};
288
d0513fc6
MR		 289#define STAC92HD83XXX_NUM_DMICS 2
290static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
291 0x11, 0x12, 0
292};
293
294#define STAC92HD81_DAC_COUNT 2
295#define STAC92HD83_DAC_COUNT 3
296static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
297 0x13, 0x14, 0x22,
298};
299
300static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
301 0x17, 0x18,
302};
303
304static hda_nid_t stac92hd83xxx_adc_nids[2] = {
305 0x15, 0x16,
306};
307
308static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
309 0xa, 0xb, 0xd, 0xe,
310};
311
0ffa9807
MR		 312static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
313 0x1e, 0,
314};
315
d0513fc6
MR		 316static unsigned int stac92hd83xxx_pwr_mapping[4] = {
317 0x03, 0x0c, 0x10, 0x40,
318};
319
a64135a2
MR		 320static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
321 0x0a, 0x0d, 0x0f
322};
323
e035b841
MR		 324static hda_nid_t stac92hd71bxx_adc_nids[2] = {
325 0x12, 0x13,
326};
327
328static hda_nid_t stac92hd71bxx_mux_nids[2] = {
329 0x1a, 0x1b
330};
331
4b33c767
MR		 332static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
333 0x1c, 0x1d,
e1f0d669
MR		 334};
335
d9737751
MR		 336static hda_nid_t stac92hd71bxx_smux_nids[2] = {
337 0x24, 0x25,
338};
339
aea7bb0a 340static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 341 0x10, /*0x11, */
342};
343
344#define STAC92HD71BXX_NUM_DMICS 2
345static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
346 0x18, 0x19, 0
347};
348
0ffa9807
MR		 349static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
350 0x22, 0
351};
352
8e21c34c
TD		 353static hda_nid_t stac925x_adc_nids[1] = {
354 0x03,
355};
356
357static hda_nid_t stac925x_mux_nids[1] = {
358 0x0f,
359};
360
361static hda_nid_t stac925x_dac_nids[1] = {
362 0x02,
363};
364
f6e9852a
TI		 365#define STAC925X_NUM_DMICS 1
366static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
367 0x15, 0
2c11f955
TD		 368};
369
1697055e
TI		 370static hda_nid_t stac925x_dmux_nids[1] = {
371 0x14,
372};
373
2f2f4251
M		 374static hda_nid_t stac922x_adc_nids[2] = {
375 0x06, 0x07,
376};
377
378static hda_nid_t stac922x_mux_nids[2] = {
379 0x12, 0x13,
380};
381
3cc08dc6
MP		 382static hda_nid_t stac927x_adc_nids[3] = {
383 0x07, 0x08, 0x09
384};
385
386static hda_nid_t stac927x_mux_nids[3] = {
387 0x15, 0x16, 0x17
388};
389
d9737751
MR		 390static hda_nid_t stac927x_smux_nids[1] = {
391 0x21,
392};
393
b76c850f
MR		 394static hda_nid_t stac927x_dac_nids[6] = {
395 0x02, 0x03, 0x04, 0x05, 0x06, 0
396};
397
e1f0d669
MR		 398static hda_nid_t stac927x_dmux_nids[1] = {
399 0x1b,
400};
401
7f16859a
MR		 402#define STAC927X_NUM_DMICS 2
403static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
404 0x13, 0x14, 0
405};
406
65973632
MR		 407static const char *stac927x_spdif_labels[5] = {
408 "Digital Playback", "ADAT", "Analog Mux 1",
409 "Analog Mux 2", "Analog Mux 3"
410};
411
f3302a59
MP		 412static hda_nid_t stac9205_adc_nids[2] = {
413 0x12, 0x13
414};
415
416static hda_nid_t stac9205_mux_nids[2] = {
417 0x19, 0x1a
418};
419
e1f0d669 420static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 421 0x1d,
e1f0d669
MR		 422};
423
d9737751
MR		 424static hda_nid_t stac9205_smux_nids[1] = {
425 0x21,
426};
427
f6e9852a
TI		 428#define STAC9205_NUM_DMICS 2
429static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
430 0x17, 0x18, 0
8b65727b
MP		 431};
432
c7d4b2fa 433static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 434 0x08, 0x09, 0x0d, 0x0e,
435 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 436};
437
8e21c34c
TD		 438static hda_nid_t stac925x_pin_nids[8] = {
439 0x07, 0x08, 0x0a, 0x0b,
440 0x0c, 0x0d, 0x10, 0x11,
441};
442
2f2f4251
M		 443static hda_nid_t stac922x_pin_nids[10] = {
444 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
445 0x0f, 0x10, 0x11, 0x15, 0x1b,
446};
447
a7662640 448static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 449 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
450 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 451 0x14, 0x22, 0x23
e1f0d669
MR		 452};
453
d0513fc6
MR		 454static hda_nid_t stac92hd83xxx_pin_nids[14] = {
455 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
456 0x0f, 0x10, 0x11, 0x12, 0x13,
457 0x1d, 0x1e, 0x1f, 0x20
458};
0ffa9807 459static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 460 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
461 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 462 0x1f,
e035b841
MR		 463};
464
3cc08dc6
MP		 465static hda_nid_t stac927x_pin_nids[14] = {
466 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
467 0x0f, 0x10, 0x11, 0x12, 0x13,
468 0x14, 0x21, 0x22, 0x23,
469};
470
f3302a59
MP		 471static hda_nid_t stac9205_pin_nids[12] = {
472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x14, 0x16, 0x17, 0x18,
474 0x21, 0x22,
f3302a59
MP		 475};
476
89385035
MR		 477#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
478
479static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
480 struct snd_ctl_elem_value *ucontrol)
481{
482 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
483 struct sigmatel_spec *spec = codec->spec;
484 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
485
486 kcontrol->private_value ^= get_amp_nid(kcontrol);
487 kcontrol->private_value |= nid;
488
489 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
490}
491
492static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
493 struct snd_ctl_elem_value *ucontrol)
494{
495 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
496 struct sigmatel_spec *spec = codec->spec;
497 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
498
499 kcontrol->private_value ^= get_amp_nid(kcontrol);
500 kcontrol->private_value |= nid;
501
502 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
503}
504
8b65727b
MP		 505static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
506 struct snd_ctl_elem_info *uinfo)
507{
508 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
509 struct sigmatel_spec *spec = codec->spec;
510 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
511}
512
513static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
514 struct snd_ctl_elem_value *ucontrol)
515{
516 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
517 struct sigmatel_spec *spec = codec->spec;
e1f0d669 518 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 519
e1f0d669 520 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 521 return 0;
522}
523
524static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
525 struct snd_ctl_elem_value *ucontrol)
526{
527 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
528 struct sigmatel_spec *spec = codec->spec;
e1f0d669 529 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 530
531 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 532 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 533}
534
d9737751
MR		 535static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
536 struct snd_ctl_elem_info *uinfo)
537{
538 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
539 struct sigmatel_spec *spec = codec->spec;
540 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
541}
542
543static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
544 struct snd_ctl_elem_value *ucontrol)
545{
546 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
547 struct sigmatel_spec *spec = codec->spec;
548 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
549
550 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
551 return 0;
552}
553
554static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
555 struct snd_ctl_elem_value *ucontrol)
556{
557 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
558 struct sigmatel_spec *spec = codec->spec;
00ef50c2 559 struct hda_input_mux *smux = &spec->private_smux;
d9737751 560 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 561 int err, val;
562 hda_nid_t nid;
d9737751 563
00ef50c2 564 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 565 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 566 if (err < 0)
567 return err;
568
569 if (spec->spdif_mute) {
570 if (smux_idx == 0)
571 nid = spec->multiout.dig_out_nid;
572 else
573 nid = codec->slave_dig_outs[smux_idx - 1];
574 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
575 val = AMP_OUT_MUTE;
00ef50c2 576 else
c1e99bd9 577 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 578 /* un/mute SPDIF out */
579 snd_hda_codec_write_cache(codec, nid, 0,
580 AC_VERB_SET_AMP_GAIN_MUTE, val);
581 }
582 return 0;
d9737751
MR		 583}
584
c8b6bf9b 585static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 586{
587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
588 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 589 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 590}
591
c8b6bf9b 592static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 593{
594 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
595 struct sigmatel_spec *spec = codec->spec;
596 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
597
598 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
599 return 0;
600}
601
c8b6bf9b 602static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 603{
604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 struct sigmatel_spec *spec = codec->spec;
606 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
607
c7d4b2fa 608 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 609 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
610}
611
b22b4821
MR		 612static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
613 struct snd_ctl_elem_info *uinfo)
614{
615 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
616 struct sigmatel_spec *spec = codec->spec;
617 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
618}
619
620static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
621 struct snd_ctl_elem_value *ucontrol)
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
625
626 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
627 return 0;
628}
629
630static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
631 struct snd_ctl_elem_value *ucontrol)
632{
633 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
634 struct sigmatel_spec *spec = codec->spec;
635
636 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
637 spec->mono_nid, &spec->cur_mmux);
638}
639
89385035
MR		 640static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_info *uinfo)
642{
643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
644 struct sigmatel_spec *spec = codec->spec;
645 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
646}
647
648static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
649 struct snd_ctl_elem_value *ucontrol)
650{
651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
652 struct sigmatel_spec *spec = codec->spec;
653
654 ucontrol->value.enumerated.item[0] = spec->cur_amux;
655 return 0;
656}
657
658static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
659 struct snd_ctl_elem_value *ucontrol)
660{
661 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
662 struct sigmatel_spec *spec = codec->spec;
663 struct snd_kcontrol *ctl =
664 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
665 if (!ctl)
666 return -EINVAL;
667
668 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
669 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
670
671 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
672 0, &spec->cur_amux);
673}
674
5f10c4a9
ML		 675#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
676
677static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
678 struct snd_ctl_elem_value *ucontrol)
679{
680 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 681 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 682 struct sigmatel_spec *spec = codec->spec;
683
e1f0d669
MR		 684 ucontrol->value.integer.value[0] = !!(spec->aloopback &
685 (spec->aloopback_mask << idx));
5f10c4a9
ML		 686 return 0;
687}
688
689static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
690 struct snd_ctl_elem_value *ucontrol)
691{
692 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
693 struct sigmatel_spec *spec = codec->spec;
e1f0d669 694 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 695 unsigned int dac_mode;
e1f0d669 696 unsigned int val, idx_val;
5f10c4a9 697
e1f0d669
MR		 698 idx_val = spec->aloopback_mask << idx;
699 if (ucontrol->value.integer.value[0])
700 val = spec->aloopback | idx_val;
701 else
702 val = spec->aloopback & ~idx_val;
68ea7b2f 703 if (spec->aloopback == val)
5f10c4a9
ML		 704 return 0;
705
68ea7b2f 706 spec->aloopback = val;
5f10c4a9 707
e1f0d669
MR		 708 /* Only return the bits defined by the shift value of the
709 * first two bytes of the mask
710 */
5f10c4a9 711 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 712 kcontrol->private_value & 0xFFFF, 0x0);
713 dac_mode >>= spec->aloopback_shift;
5f10c4a9 714
e1f0d669 715 if (spec->aloopback & idx_val) {
5f10c4a9 716 snd_hda_power_up(codec);
e1f0d669 717 dac_mode |= idx_val;
5f10c4a9
ML		 718 } else {
719 snd_hda_power_down(codec);
e1f0d669 720 dac_mode &= ~idx_val;
5f10c4a9
ML		 721 }
722
723 snd_hda_codec_write_cache(codec, codec->afg, 0,
724 kcontrol->private_value >> 16, dac_mode);
725
726 return 1;
727}
728
c7d4b2fa 729static struct hda_verb stac9200_core_init[] = {
2f2f4251 730 /* set dac0mux for dac converter */
c7d4b2fa 731 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 732 {}
733};
734
1194b5b7
TI		 735static struct hda_verb stac9200_eapd_init[] = {
736 /* set dac0mux for dac converter */
737 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
738 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
739 {}
740};
741
e1f0d669
MR		 742static struct hda_verb stac92hd73xx_6ch_core_init[] = {
743 /* set master volume and direct control */
744 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
745 /* setup audio connections */
746 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
747 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
748 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
749 /* setup adcs to point to mixer */
750 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
751 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 752 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
753 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
754 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
755 /* setup import muxs */
756 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
757 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
758 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
759 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
760 {}
761};
762
d654a660
MR		 763static struct hda_verb dell_eq_core_init[] = {
764 /* set master volume to max value without distortion
765 * and direct control */
766 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
767 /* setup audio connections */
768 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 769 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
770 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 771 /* setup adcs to point to mixer */
772 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
773 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
774 /* setup import muxs */
775 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
777 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
779 {}
780};
781
52fe0f9d 782static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 783 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 784 /* setup audio connections */
7747ecce
MR		 785 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
786 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 787 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
788 /* setup adcs to point to mixer */
789 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
790 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
791 /* setup import muxs */
792 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
793 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
794 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
796 {}
797};
798
e1f0d669
MR		 799static struct hda_verb stac92hd73xx_8ch_core_init[] = {
800 /* set master volume and direct control */
801 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
802 /* setup audio connections */
803 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
804 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
805 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
806 /* connect hp ports to dac3 */
807 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
808 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
809 /* setup adcs to point to mixer */
810 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
811 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 812 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
813 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 /* setup import muxs */
816 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
820 {}
821};
822
823static struct hda_verb stac92hd73xx_10ch_core_init[] = {
824 /* set master volume and direct control */
825 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
826 /* setup audio connections */
827 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
828 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
829 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
830 /* dac3 is connected to import3 mux */
831 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
832 /* connect hp ports to dac4 */
833 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
834 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
835 /* setup adcs to point to mixer */
836 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
837 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 838 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
839 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
840 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
841 /* setup import muxs */
842 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
843 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
844 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
845 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
846 {}
847};
848
d0513fc6
MR		 849static struct hda_verb stac92hd83xxx_core_init[] = {
850 /* start of config #1 */
851 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
852
853 /* start of config #2 */
854 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
855 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
856 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
857
858 /* power state controls amps */
859 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
860};
861
e035b841 862static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 863 /* set master volume and direct control */
864 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
865 /* connect headphone jack to dac1 */
866 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 867 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
868 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
869 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
870 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 871};
872
4b33c767 873#define HD_DISABLE_PORTF 2
541eee87 874static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 875 /* start of config #1 */
876
877 /* connect port 0f to audio mixer */
878 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 879 /* unmute right and left channels for node 0x0f */
880 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
881 /* start of config #2 */
882
e035b841
MR		 883 /* set master volume and direct control */
884 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
885 /* connect headphone jack to dac1 */
886 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 887 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 888 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
889 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 890 {}
891};
892
8e21c34c
TD		 893static struct hda_verb stac925x_core_init[] = {
894 /* set dac0mux for dac converter */
895 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
896 {}
897};
898
c7d4b2fa 899static struct hda_verb stac922x_core_init[] = {
2f2f4251 900 /* set master volume and direct control */
c7d4b2fa 901 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 902 {}
903};
904
93ed1503 905static struct hda_verb d965_core_init[] = {
19039bd0 906 /* set master volume and direct control */
93ed1503 907 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 908 /* unmute node 0x1b */
909 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
910 /* select node 0x03 as DAC */
911 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
912 {}
913};
914
3cc08dc6
MP		 915static struct hda_verb stac927x_core_init[] = {
916 /* set master volume and direct control */
917 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 918 /* enable analog pc beep path */
919 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 920 {}
921};
922
f3302a59
MP		 923static struct hda_verb stac9205_core_init[] = {
924 /* set master volume and direct control */
925 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 926 /* enable analog pc beep path */
927 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 928 {}
929};
930
b22b4821
MR		 931#define STAC_MONO_MUX \
932 { \
933 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
934 .name = "Mono Mux", \
935 .count = 1, \
936 .info = stac92xx_mono_mux_enum_info, \
937 .get = stac92xx_mono_mux_enum_get, \
938 .put = stac92xx_mono_mux_enum_put, \
939 }
940
89385035
MR		 941#define STAC_AMP_MUX \
942 { \
943 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
944 .name = "Amp Selector Capture Switch", \
945 .count = 1, \
946 .info = stac92xx_amp_mux_enum_info, \
947 .get = stac92xx_amp_mux_enum_get, \
948 .put = stac92xx_amp_mux_enum_put, \
949 }
950
951#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
952 { \
953 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
954 .name = xname, \
955 .index = 0, \
956 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
957 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
958 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
959 .info = stac92xx_amp_volume_info, \
960 .get = stac92xx_amp_volume_get, \
961 .put = stac92xx_amp_volume_put, \
962 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
963 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
964 }
965
9e05b7a3 966#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 967 { \
968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
969 .name = "Input Source", \
9e05b7a3 970 .count = cnt, \
ca7c5a8b
ML		 971 .info = stac92xx_mux_enum_info, \
972 .get = stac92xx_mux_enum_get, \
973 .put = stac92xx_mux_enum_put, \
974 }
975
e1f0d669 976#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 977 { \
978 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
979 .name = "Analog Loopback", \
e1f0d669 980 .count = cnt, \
5f10c4a9
ML		 981 .info = stac92xx_aloopback_info, \
982 .get = stac92xx_aloopback_get, \
983 .put = stac92xx_aloopback_put, \
984 .private_value = verb_read | (verb_write << 16), \
985 }
986
c8b6bf9b 987static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 988 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
989 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 990 STAC_INPUT_SOURCE(1),
2f2f4251
M		 991 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
992 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 993 { } /* end */
994};
995
2a9c7816 996#define DELL_M6_MIXER 6
e1f0d669 997static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 998 /* start of config #1 */
e1f0d669
MR		 999 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1000 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1001
e1f0d669
MR		 1002 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1003 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1004
2a9c7816
MR		 1005 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1006 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1007
1008 /* start of config #2 */
1009 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1010 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1011
e1f0d669
MR		 1012 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1013 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1014
2a9c7816
MR		 1015 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1016
1017 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1018 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1019
1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1022
e1f0d669
MR		 1023 { } /* end */
1024};
1025
1026static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1027 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1028
e1f0d669
MR		 1029 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1030 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1031
1032 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1033 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1034
1035 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1036 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1039 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1040
1041 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1042 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1043
1044 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1045 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1046
1047 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1048 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1049 { } /* end */
1050};
1051
1052static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1053 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1054
e1f0d669
MR		 1055 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1056 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1057
1058 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1059 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1060
1061 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1062 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1065 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1066
1067 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1068 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1069
1070 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1071 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1072
1073 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1074 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1075 { } /* end */
1076};
1077
d0513fc6
MR		 1078
1079static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1080 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1081 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1082
1083 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1084 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1085
1086 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1087 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1088
1089 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1090 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1091
1092 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1093 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1094
1095 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1096 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1097
1098 /*
1099 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1100 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1101 */
1102 { } /* end */
1103};
1104
541eee87 1105static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1106 STAC_INPUT_SOURCE(2),
4b33c767 1107 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1108
9b35947f
MR		 1109 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1110 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1111
1112 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1113 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1114 /* analog pc-beep replaced with digital beep support */
1115 /*
f7c5dda2
MR		 1116 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1117 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1118 */
f7c5dda2 1119
687cb98e
MR		 1120 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1121 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1122
687cb98e
MR		 1123 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1124 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1125
1126 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1127 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1128
1129 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1130 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1131 { } /* end */
1132};
1133
541eee87 1134static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1135 STAC_INPUT_SOURCE(2),
1136 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1137
541eee87
MR		 1138 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1139 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1140
1141 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1142 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1143 { } /* end */
1144};
1145
8e21c34c 1146static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1147 STAC_INPUT_SOURCE(1),
8e21c34c 1148 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1149 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1150 { } /* end */
1151};
1152
9e05b7a3 1153static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1154 STAC_INPUT_SOURCE(2),
e1f0d669 1155 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1156
1157 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1158 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1159
1160 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1161 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1162 { } /* end */
1163};
1164
19039bd0 1165/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1166static struct snd_kcontrol_new stac922x_mixer[] = {
1167 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1168 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1169 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1170
1171 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1172 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1173 { } /* end */
1174};
1175
9e05b7a3 1176
d1d985f0 1177static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1178 STAC_INPUT_SOURCE(3),
e1f0d669 1179 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1180
9e05b7a3
ML		 1181 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1182 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1183
1184 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1185 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1186
1187 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1188 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1189 { } /* end */
1190};
1191
1697055e
TI		 1192static struct snd_kcontrol_new stac_dmux_mixer = {
1193 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1194 .name = "Digital Input Source",
1195 /* count set later */
1196 .info = stac92xx_dmux_enum_info,
1197 .get = stac92xx_dmux_enum_get,
1198 .put = stac92xx_dmux_enum_put,
1199};
1200
d9737751
MR		 1201static struct snd_kcontrol_new stac_smux_mixer = {
1202 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1203 .name = "IEC958 Playback Source",
d9737751
MR		 1204 /* count set later */
1205 .info = stac92xx_smux_enum_info,
1206 .get = stac92xx_smux_enum_get,
1207 .put = stac92xx_smux_enum_put,
1208};
1209
2134ea4f
TI		 1210static const char *slave_vols[] = {
1211 "Front Playback Volume",
1212 "Surround Playback Volume",
1213 "Center Playback Volume",
1214 "LFE Playback Volume",
1215 "Side Playback Volume",
1216 "Headphone Playback Volume",
1217 "Headphone Playback Volume",
1218 "Speaker Playback Volume",
1219 "External Speaker Playback Volume",
1220 "Speaker2 Playback Volume",
1221 NULL
1222};
1223
1224static const char *slave_sws[] = {
1225 "Front Playback Switch",
1226 "Surround Playback Switch",
1227 "Center Playback Switch",
1228 "LFE Playback Switch",
1229 "Side Playback Switch",
1230 "Headphone Playback Switch",
1231 "Headphone Playback Switch",
1232 "Speaker Playback Switch",
1233 "External Speaker Playback Switch",
1234 "Speaker2 Playback Switch",
edb54a55 1235 "IEC958 Playback Switch",
2134ea4f
TI		 1236 NULL
1237};
1238
2f2f4251
M		 1239static int stac92xx_build_controls(struct hda_codec *codec)
1240{
1241 struct sigmatel_spec *spec = codec->spec;
1242 int err;
c7d4b2fa 1243 int i;
2f2f4251
M		 1244
1245 err = snd_hda_add_new_ctls(codec, spec->mixer);
1246 if (err < 0)
1247 return err;
c7d4b2fa
M		 1248
1249 for (i = 0; i < spec->num_mixers; i++) {
1250 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1251 if (err < 0)
1252 return err;
1253 }
1697055e
TI		 1254 if (spec->num_dmuxes > 0) {
1255 stac_dmux_mixer.count = spec->num_dmuxes;
1256 err = snd_ctl_add(codec->bus->card,
1257 snd_ctl_new1(&stac_dmux_mixer, codec));
1258 if (err < 0)
1259 return err;
1260 }
d9737751 1261 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1262 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1263 struct hda_input_mux *smux = &spec->private_smux;
1264 /* check for mute support on SPDIF out */
1265 if (wcaps & AC_WCAP_OUT_AMP) {
1266 smux->items[smux->num_items].label = "Off";
1267 smux->items[smux->num_items].index = 0;
1268 smux->num_items++;
1269 spec->spdif_mute = 1;
1270 }
d9737751
MR		 1271 stac_smux_mixer.count = spec->num_smuxes;
1272 err = snd_ctl_add(codec->bus->card,
1273 snd_ctl_new1(&stac_smux_mixer, codec));
1274 if (err < 0)
1275 return err;
1276 }
c7d4b2fa 1277
dabbed6f
M		 1278 if (spec->multiout.dig_out_nid) {
1279 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1280 if (err < 0)
1281 return err;
9a08160b
TI		 1282 err = snd_hda_create_spdif_share_sw(codec,
1283 &spec->multiout);
1284 if (err < 0)
1285 return err;
1286 spec->multiout.share_spdif = 1;
dabbed6f 1287 }
da74ae3e 1288 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1289 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1290 if (err < 0)
1291 return err;
1292 }
2134ea4f
TI		 1293
1294 /* if we have no master control, let's create it */
1295 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1296 unsigned int vmaster_tlv[4];
2134ea4f 1297 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1298 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1299 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1300 vmaster_tlv, slave_vols);
2134ea4f
TI		 1301 if (err < 0)
1302 return err;
1303 }
1304 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1305 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1306 NULL, slave_sws);
1307 if (err < 0)
1308 return err;
1309 }
1310
dabbed6f 1311 return 0;
2f2f4251
M		 1312}
1313
403d1944 1314static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1315 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1316 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1317};
1318
dfe495d0
TI		 1319/*
1320 STAC 9200 pin configs for
1321 102801A8
1322 102801DE
1323 102801E8
1324*/
1325static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1326 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1327 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1328};
1329
1330/*
1331 STAC 9200 pin configs for
1332 102801C0
1333 102801C1
1334*/
1335static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1336 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1337 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1338};
1339
1340/*
1341 STAC 9200 pin configs for
1342 102801C4 (Dell Dimension E310)
1343 102801C5
1344 102801C7
1345 102801D9
1346 102801DA
1347 102801E3
1348*/
1349static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1350 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1351 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1352};
1353
1354
1355/*
1356 STAC 9200-32 pin configs for
1357 102801B5 (Dell Inspiron 630m)
1358 102801D8 (Dell Inspiron 640m)
1359*/
1360static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1361 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1362 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1363};
1364
1365/*
1366 STAC 9200-32 pin configs for
1367 102801C2 (Dell Latitude D620)
1368 102801C8
1369 102801CC (Dell Latitude D820)
1370 102801D4
1371 102801D6
1372*/
1373static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1374 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1375 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1376};
1377
1378/*
1379 STAC 9200-32 pin configs for
1380 102801CE (Dell XPS M1710)
1381 102801CF (Dell Precision M90)
1382*/
1383static unsigned int dell9200_m23_pin_configs[8] = {
1384 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1385 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1386};
1387
1388/*
1389 STAC 9200-32 pin configs for
1390 102801C9
1391 102801CA
1392 102801CB (Dell Latitude 120L)
1393 102801D3
1394*/
1395static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1396 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1397 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1398};
1399
1400/*
1401 STAC 9200-32 pin configs for
1402 102801BD (Dell Inspiron E1505n)
1403 102801EE
1404 102801EF
1405*/
1406static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1407 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1408 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1409};
1410
1411/*
1412 STAC 9200-32 pin configs for
1413 102801F5 (Dell Inspiron 1501)
1414 102801F6
1415*/
1416static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1417 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1418 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1419};
1420
1421/*
1422 STAC 9200-32
1423 102801CD (Dell Inspiron E1705/9400)
1424*/
1425static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1426 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1427 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1428};
1429
bf277785
TD		 1430static unsigned int oqo9200_pin_configs[8] = {
1431 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1432 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1433};
1434
dfe495d0 1435
f5fcc13c
TI		 1436static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1437 [STAC_REF] = ref9200_pin_configs,
bf277785 1438 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1439 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1440 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1441 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1442 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1443 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1444 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1445 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1446 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1447 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1448 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1449 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1450};
1451
f5fcc13c
TI		 1452static const char *stac9200_models[STAC_9200_MODELS] = {
1453 [STAC_REF] = "ref",
bf277785 1454 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1455 [STAC_9200_DELL_D21] = "dell-d21",
1456 [STAC_9200_DELL_D22] = "dell-d22",
1457 [STAC_9200_DELL_D23] = "dell-d23",
1458 [STAC_9200_DELL_M21] = "dell-m21",
1459 [STAC_9200_DELL_M22] = "dell-m22",
1460 [STAC_9200_DELL_M23] = "dell-m23",
1461 [STAC_9200_DELL_M24] = "dell-m24",
1462 [STAC_9200_DELL_M25] = "dell-m25",
1463 [STAC_9200_DELL_M26] = "dell-m26",
1464 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1465 [STAC_9200_GATEWAY] = "gateway",
117f257d 1466 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1467};
1468
1469static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1470 /* SigmaTel reference board */
1471 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1472 "DFI LanParty", STAC_REF),
e7377071 1473 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1475 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1477 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1479 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1481 "unknown Dell", STAC_9200_DELL_D22),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1483 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1485 "Dell Latitude D620", STAC_9200_DELL_M22),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1487 "unknown Dell", STAC_9200_DELL_D23),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1489 "unknown Dell", STAC_9200_DELL_D23),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1491 "unknown Dell", STAC_9200_DELL_M22),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1493 "unknown Dell", STAC_9200_DELL_M24),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1495 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1497 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1499 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1501 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1503 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1505 "Dell Precision M90", STAC_9200_DELL_M23),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1507 "unknown Dell", STAC_9200_DELL_M22),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1509 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1511 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1513 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1517 "unknown Dell", STAC_9200_DELL_D23),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1519 "unknown Dell", STAC_9200_DELL_D21),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1521 "unknown Dell", STAC_9200_DELL_D23),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1523 "unknown Dell", STAC_9200_DELL_D21),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1525 "unknown Dell", STAC_9200_DELL_M25),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1527 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1529 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1531 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1532 /* Panasonic */
117f257d 1533 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1534 /* Gateway machines needs EAPD to be set on resume */
1535 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1536 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1537 STAC_9200_GATEWAY),
1538 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1539 STAC_9200_GATEWAY),
bf277785
TD		 1540 /* OQO Mobile */
1541 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1542 {} /* terminator */
1543};
1544
8e21c34c
TD		 1545static unsigned int ref925x_pin_configs[8] = {
1546 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1547 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1548};
1549
1550static unsigned int stac925x_MA6_pin_configs[8] = {
1551 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1552 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1553};
1554
2c11f955
TD		 1555static unsigned int stac925x_PA6_pin_configs[8] = {
1556 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1557 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1558};
1559
8e21c34c 1560static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1561 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1562 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1563};
1564
1565static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1566 [STAC_REF] = ref925x_pin_configs,
1567 [STAC_M2_2] = stac925xM2_2_pin_configs,
1568 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1569 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1570};
1571
1572static const char *stac925x_models[STAC_925x_MODELS] = {
1573 [STAC_REF] = "ref",
1574 [STAC_M2_2] = "m2-2",
1575 [STAC_MA6] = "m6",
2c11f955 1576 [STAC_PA6] = "pa6",
8e21c34c
TD		 1577};
1578
1579static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1580 /* SigmaTel reference board */
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1582 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1583 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1584 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1585 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1586 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1587 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1588 {} /* terminator */
1589};
1590
a7662640 1591static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1592 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1593 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1594 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1595 0x01452050,
1596};
1597
1598static unsigned int dell_m6_pin_configs[13] = {
1599 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1600 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1601 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1602 0x4f0000f0,
e1f0d669
MR		 1603};
1604
1605static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1606 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1607 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1608 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1609 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1610 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1611};
1612
1613static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1614 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1615 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1616 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1617 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1618 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1619};
1620
1621static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1622 /* SigmaTel reference board */
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1624 "DFI LanParty", STAC_92HD73XX_REF),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1626 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1628 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1630 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1632 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1634 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1636 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1638 "unknown Dell", STAC_DELL_M6_DMIC),
1639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1640 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1642 "Dell Studio 1537", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1643 {} /* terminator */
1644};
1645
d0513fc6
MR		 1646static unsigned int ref92hd83xxx_pin_configs[14] = {
1647 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1648 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1649 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1650 0x01451160, 0x98560170,
1651};
1652
1653static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1654 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1655};
1656
1657static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1658 [STAC_92HD83XXX_REF] = "ref",
1659};
1660
1661static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1662 /* SigmaTel reference board */
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1664 "DFI LanParty", STAC_92HD71BXX_REF),
1665};
1666
0ffa9807 1667static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1668 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1669 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1670 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1671};
1672
0ffa9807 1673static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1674 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1675 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1676 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1677};
1678
0ffa9807 1679static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1680 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1681 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1682 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1683};
1684
3a7abfd2
MR		 1685static unsigned int dell_m4_3_pin_configs[11] = {
1686 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1687 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1688 0x40f000f0, 0x044413b0, 0x044413b0,
1689};
1690
e035b841
MR		 1691static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1692 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1693 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1694 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1695 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1696 [STAC_HP_M4] = NULL,
e035b841
MR		 1697};
1698
1699static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1700 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1701 [STAC_DELL_M4_1] = "dell-m4-1",
1702 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1703 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1704 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1705};
1706
1707static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1708 /* SigmaTel reference board */
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1710 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1711 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1712 "HP dv5", STAC_HP_M4),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1714 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1715 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1716 "unknown HP", STAC_HP_M4),
a7662640
MR		 1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1718 "unknown Dell", STAC_DELL_M4_1),
1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1720 "unknown Dell", STAC_DELL_M4_1),
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1722 "unknown Dell", STAC_DELL_M4_1),
1723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1724 "unknown Dell", STAC_DELL_M4_1),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1726 "unknown Dell", STAC_DELL_M4_1),
1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1728 "unknown Dell", STAC_DELL_M4_1),
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1730 "unknown Dell", STAC_DELL_M4_1),
1731 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1732 "unknown Dell", STAC_DELL_M4_2),
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1734 "unknown Dell", STAC_DELL_M4_2),
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1736 "unknown Dell", STAC_DELL_M4_2),
1737 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1738 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1739 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1740 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1741 {} /* terminator */
1742};
1743
403d1944
MP		 1744static unsigned int ref922x_pin_configs[10] = {
1745 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1746 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1747 0x40000100, 0x40000100,
1748};
1749
dfe495d0
TI		 1750/*
1751 STAC 922X pin configs for
1752 102801A7
1753 102801AB
1754 102801A9
1755 102801D1
1756 102801D2
1757*/
1758static unsigned int dell_922x_d81_pin_configs[10] = {
1759 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1760 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1761 0x01813122, 0x400001f2,
1762};
1763
1764/*
1765 STAC 922X pin configs for
1766 102801AC
1767 102801D0
1768*/
1769static unsigned int dell_922x_d82_pin_configs[10] = {
1770 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1771 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1772 0x01813122, 0x400001f1,
1773};
1774
1775/*
1776 STAC 922X pin configs for
1777 102801BF
1778*/
1779static unsigned int dell_922x_m81_pin_configs[10] = {
1780 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1781 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1782 0x40C003f1, 0x405003f0,
1783};
1784
1785/*
1786 STAC 9221 A1 pin configs for
1787 102801D7 (Dell XPS M1210)
1788*/
1789static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1790 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1791 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1792 0x508003f3, 0x405003f4,
1793};
1794
403d1944 1795static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1796 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1797 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1798 0x02a19120, 0x40000100,
1799};
1800
1801static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1802 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1803 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1804 0x02a19320, 0x40000100,
1805};
1806
5d5d3bc3
IZ		 1807static unsigned int intel_mac_v1_pin_configs[10] = {
1808 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1809 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1810 0x400000fc, 0x400000fb,
1811};
1812
1813static unsigned int intel_mac_v2_pin_configs[10] = {
1814 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1815 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1816 0x400000fc, 0x400000fb,
6f0778d8
NB		 1817};
1818
5d5d3bc3
IZ		 1819static unsigned int intel_mac_v3_pin_configs[10] = {
1820 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1821 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1822 0x400000fc, 0x400000fb,
1823};
1824
5d5d3bc3
IZ		 1825static unsigned int intel_mac_v4_pin_configs[10] = {
1826 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1827 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1828 0x400000fc, 0x400000fb,
1829};
1830
5d5d3bc3
IZ		 1831static unsigned int intel_mac_v5_pin_configs[10] = {
1832 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1833 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1834 0x400000fc, 0x400000fb,
0dae0f83
TI		 1835};
1836
8c650087
MCC		 1837static unsigned int ecs202_pin_configs[10] = {
1838 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1839 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1840 0x9037012e, 0x40e000f2,
1841};
76c08828 1842
19039bd0 1843static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1844 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1845 [STAC_D945GTP3] = d945gtp3_pin_configs,
1846 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1847 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1848 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1849 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1850 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1851 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1852 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1853 /* for backward compatibility */
5d5d3bc3
IZ		 1854 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1855 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1856 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1857 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1858 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1859 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1860 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1861 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1862 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1863 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1864 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1865};
1866
f5fcc13c
TI		 1867static const char *stac922x_models[STAC_922X_MODELS] = {
1868 [STAC_D945_REF] = "ref",
1869 [STAC_D945GTP5] = "5stack",
1870 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1871 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1872 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1873 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1874 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1875 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1876 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1877 /* for backward compatibility */
f5fcc13c 1878 [STAC_MACMINI] = "macmini",
3fc24d85 1879 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1880 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1881 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1882 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1883 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1884 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1885 [STAC_922X_DELL_D81] = "dell-d81",
1886 [STAC_922X_DELL_D82] = "dell-d82",
1887 [STAC_922X_DELL_M81] = "dell-m81",
1888 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1889};
1890
1891static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1892 /* SigmaTel reference board */
1893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1894 "DFI LanParty", STAC_D945_REF),
1895 /* Intel 945G based systems */
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1897 "Intel D945G", STAC_D945GTP3),
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1899 "Intel D945G", STAC_D945GTP3),
1900 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1901 "Intel D945G", STAC_D945GTP3),
1902 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1903 "Intel D945G", STAC_D945GTP3),
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1905 "Intel D945G", STAC_D945GTP3),
1906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1907 "Intel D945G", STAC_D945GTP3),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1909 "Intel D945G", STAC_D945GTP3),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1911 "Intel D945G", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1913 "Intel D945G", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1915 "Intel D945G", STAC_D945GTP3),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1917 "Intel D945G", STAC_D945GTP3),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1919 "Intel D945G", STAC_D945GTP3),
1920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1921 "Intel D945G", STAC_D945GTP3),
1922 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1923 "Intel D945G", STAC_D945GTP3),
1924 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1925 "Intel D945G", STAC_D945GTP3),
1926 /* Intel D945G 5-stack systems */
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1928 "Intel D945G", STAC_D945GTP5),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1930 "Intel D945G", STAC_D945GTP5),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1932 "Intel D945G", STAC_D945GTP5),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1934 "Intel D945G", STAC_D945GTP5),
1935 /* Intel 945P based systems */
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1937 "Intel D945P", STAC_D945GTP3),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1939 "Intel D945P", STAC_D945GTP3),
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1941 "Intel D945P", STAC_D945GTP3),
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1943 "Intel D945P", STAC_D945GTP3),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1945 "Intel D945P", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1947 "Intel D945P", STAC_D945GTP5),
1948 /* other systems */
536319af 1949 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1950 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1951 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1952 /* Dell systems */
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1954 "unknown Dell", STAC_922X_DELL_D81),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1956 "unknown Dell", STAC_922X_DELL_D81),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1958 "unknown Dell", STAC_922X_DELL_D81),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1960 "unknown Dell", STAC_922X_DELL_D82),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1962 "unknown Dell", STAC_922X_DELL_M81),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1964 "unknown Dell", STAC_922X_DELL_D82),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1966 "unknown Dell", STAC_922X_DELL_D81),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1968 "unknown Dell", STAC_922X_DELL_D81),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1970 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1971 /* ECS/PC Chips boards */
1972 SND_PCI_QUIRK(0x1019, 0x2144,
1973 "ECS/PC chips", STAC_ECS_202),
1974 SND_PCI_QUIRK(0x1019, 0x2608,
1975 "ECS/PC chips", STAC_ECS_202),
1976 SND_PCI_QUIRK(0x1019, 0x2633,
1977 "ECS/PC chips P17G/1333", STAC_ECS_202),
1978 SND_PCI_QUIRK(0x1019, 0x2811,
1979 "ECS/PC chips", STAC_ECS_202),
1980 SND_PCI_QUIRK(0x1019, 0x2812,
1981 "ECS/PC chips", STAC_ECS_202),
1982 SND_PCI_QUIRK(0x1019, 0x2813,
1983 "ECS/PC chips", STAC_ECS_202),
1984 SND_PCI_QUIRK(0x1019, 0x2814,
1985 "ECS/PC chips", STAC_ECS_202),
1986 SND_PCI_QUIRK(0x1019, 0x2815,
1987 "ECS/PC chips", STAC_ECS_202),
1988 SND_PCI_QUIRK(0x1019, 0x2816,
1989 "ECS/PC chips", STAC_ECS_202),
1990 SND_PCI_QUIRK(0x1019, 0x2817,
1991 "ECS/PC chips", STAC_ECS_202),
1992 SND_PCI_QUIRK(0x1019, 0x2818,
1993 "ECS/PC chips", STAC_ECS_202),
1994 SND_PCI_QUIRK(0x1019, 0x2819,
1995 "ECS/PC chips", STAC_ECS_202),
1996 SND_PCI_QUIRK(0x1019, 0x2820,
1997 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1998 {} /* terminator */
1999};
2000
3cc08dc6 2001static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2002 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2003 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2004 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2005 0x01c42190, 0x40000100,
3cc08dc6
MP		 2006};
2007
93ed1503 2008static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2009 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2010 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2011 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2012 0x40000100, 0x40000100
2013};
2014
93ed1503
TD		 2015static unsigned int d965_5st_pin_configs[14] = {
2016 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2017 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2018 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2019 0x40000100, 0x40000100
2020};
2021
4ff076e5
TD		 2022static unsigned int dell_3st_pin_configs[14] = {
2023 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2024 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2025 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2026 0x40c003fc, 0x40000100
2027};
2028
93ed1503 2029static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2030 [STAC_D965_REF] = ref927x_pin_configs,
2031 [STAC_D965_3ST] = d965_3st_pin_configs,
2032 [STAC_D965_5ST] = d965_5st_pin_configs,
2033 [STAC_DELL_3ST] = dell_3st_pin_configs,
2034 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2035};
2036
f5fcc13c 2037static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2038 [STAC_D965_REF] = "ref",
2039 [STAC_D965_3ST] = "3stack",
2040 [STAC_D965_5ST] = "5stack",
2041 [STAC_DELL_3ST] = "dell-3stack",
2042 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2043};
2044
2045static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2046 /* SigmaTel reference board */
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2048 "DFI LanParty", STAC_D965_REF),
81d3dbde 2049 /* Intel 946 based systems */
f5fcc13c
TI		 2050 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2052 /* 965 based 3 stack systems */
f5fcc13c
TI		 2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2069 /* Dell 3 stack systems */
8e9068b1 2070 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2074 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2075 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2083 /* 965 based 5 stack systems */
f5fcc13c
TI		 2084 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2093 {} /* terminator */
2094};
2095
f3302a59
MP		 2096static unsigned int ref9205_pin_configs[12] = {
2097 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2098 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2099 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2100};
2101
dfe495d0
TI		 2102/*
2103 STAC 9205 pin configs for
2104 102801F1
2105 102801F2
2106 102801FC
2107 102801FD
2108 10280204
2109 1028021F
3fa2ef74 2110 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2111*/
2112static unsigned int dell_9205_m42_pin_configs[12] = {
2113 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2114 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2115 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2116};
2117
2118/*
2119 STAC 9205 pin configs for
2120 102801F9
2121 102801FA
2122 102801FE
2123 102801FF (Dell Precision M4300)
2124 10280206
2125 10280200
2126 10280201
2127*/
2128static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2129 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2130 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2131 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2132};
2133
dfe495d0 2134static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2135 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2136 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2137 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2138};
2139
f5fcc13c 2140static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2141 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2142 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2143 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2144 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2145};
2146
f5fcc13c
TI		 2147static const char *stac9205_models[STAC_9205_MODELS] = {
2148 [STAC_9205_REF] = "ref",
dfe495d0 2149 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2150 [STAC_9205_DELL_M43] = "dell-m43",
2151 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2152};
2153
2154static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2155 /* SigmaTel reference board */
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2157 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2159 "unknown Dell", STAC_9205_DELL_M42),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2161 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2163 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2165 "Dell Precision", STAC_9205_DELL_M43),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2167 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2169 "unknown Dell", STAC_9205_DELL_M42),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2171 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2173 "Dell Precision", STAC_9205_DELL_M43),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2175 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2177 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2179 "Dell Precision", STAC_9205_DELL_M43),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2181 "Dell Precision", STAC_9205_DELL_M43),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2183 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2185 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2187 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2188 {} /* terminator */
2189};
2190
11b44bbd
RF		 2191static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2192{
2193 int i;
2194 struct sigmatel_spec *spec = codec->spec;
2195
2196 if (! spec->bios_pin_configs) {
2197 spec->bios_pin_configs = kcalloc(spec->num_pins,
2198 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2199 if (! spec->bios_pin_configs)
2200 return -ENOMEM;
2201 }
2202
2203 for (i = 0; i < spec->num_pins; i++) {
2204 hda_nid_t nid = spec->pin_nids[i];
2205 unsigned int pin_cfg;
2206
2207 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2208 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2209 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2210 nid, pin_cfg);
2211 spec->bios_pin_configs[i] = pin_cfg;
2212 }
2213
2214 return 0;
2215}
2216
87d48363
MR		 2217static void stac92xx_set_config_reg(struct hda_codec *codec,
2218 hda_nid_t pin_nid, unsigned int pin_config)
2219{
2220 int i;
2221 snd_hda_codec_write(codec, pin_nid, 0,
2222 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2223 pin_config & 0x000000ff);
2224 snd_hda_codec_write(codec, pin_nid, 0,
2225 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2226 (pin_config & 0x0000ff00) >> 8);
2227 snd_hda_codec_write(codec, pin_nid, 0,
2228 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2229 (pin_config & 0x00ff0000) >> 16);
2230 snd_hda_codec_write(codec, pin_nid, 0,
2231 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2232 pin_config >> 24);
2233 i = snd_hda_codec_read(codec, pin_nid, 0,
2234 AC_VERB_GET_CONFIG_DEFAULT,
2235 0x00);
2236 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2237 pin_nid, i);
2238}
2239
2f2f4251
M		 2240static void stac92xx_set_config_regs(struct hda_codec *codec)
2241{
2242 int i;
2243 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2244
87d48363
MR		 2245 if (!spec->pin_configs)
2246 return;
11b44bbd 2247
87d48363
MR		 2248 for (i = 0; i < spec->num_pins; i++)
2249 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2250 spec->pin_configs[i]);
2f2f4251 2251}
2f2f4251 2252
dabbed6f 2253/*
c7d4b2fa 2254 * Analog playback callbacks
dabbed6f 2255 */
c7d4b2fa
M		 2256static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2257 struct hda_codec *codec,
c8b6bf9b 2258 struct snd_pcm_substream *substream)
2f2f4251 2259{
dabbed6f 2260 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2261 if (spec->stream_delay)
2262 msleep(spec->stream_delay);
9a08160b
TI		 2263 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2264 hinfo);
2f2f4251
M		 2265}
2266
2f2f4251
M		 2267static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2268 struct hda_codec *codec,
2269 unsigned int stream_tag,
2270 unsigned int format,
c8b6bf9b 2271 struct snd_pcm_substream *substream)
2f2f4251
M		 2272{
2273 struct sigmatel_spec *spec = codec->spec;
403d1944 2274 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2275}
2276
2277static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2278 struct hda_codec *codec,
c8b6bf9b 2279 struct snd_pcm_substream *substream)
2f2f4251
M		 2280{
2281 struct sigmatel_spec *spec = codec->spec;
2282 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2283}
2284
dabbed6f
M		 2285/*
2286 * Digital playback callbacks
2287 */
2288static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2289 struct hda_codec *codec,
c8b6bf9b 2290 struct snd_pcm_substream *substream)
dabbed6f
M		 2291{
2292 struct sigmatel_spec *spec = codec->spec;
2293 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2294}
2295
2296static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2297 struct hda_codec *codec,
c8b6bf9b 2298 struct snd_pcm_substream *substream)
dabbed6f
M		 2299{
2300 struct sigmatel_spec *spec = codec->spec;
2301 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2302}
2303
6b97eb45
TI		 2304static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2305 struct hda_codec *codec,
2306 unsigned int stream_tag,
2307 unsigned int format,
2308 struct snd_pcm_substream *substream)
2309{
2310 struct sigmatel_spec *spec = codec->spec;
2311 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2312 stream_tag, format, substream);
2313}
2314
dabbed6f 2315
2f2f4251
M		 2316/*
2317 * Analog capture callbacks
2318 */
2319static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2320 struct hda_codec *codec,
2321 unsigned int stream_tag,
2322 unsigned int format,
c8b6bf9b 2323 struct snd_pcm_substream *substream)
2f2f4251
M		 2324{
2325 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2326 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2327
8daaaa97
MR		 2328 if (spec->powerdown_adcs) {
2329 msleep(40);
2330 snd_hda_codec_write_cache(codec, nid, 0,
2331 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2332 }
2333 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2334 return 0;
2335}
2336
2337static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2338 struct hda_codec *codec,
c8b6bf9b 2339 struct snd_pcm_substream *substream)
2f2f4251
M		 2340{
2341 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2342 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2343
8daaaa97
MR		 2344 snd_hda_codec_cleanup_stream(codec, nid);
2345 if (spec->powerdown_adcs)
2346 snd_hda_codec_write_cache(codec, nid, 0,
2347 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2348 return 0;
2349}
2350
dabbed6f
M		 2351static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2352 .substreams = 1,
2353 .channels_min = 2,
2354 .channels_max = 2,
2355 /* NID is set in stac92xx_build_pcms */
2356 .ops = {
2357 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2358 .close = stac92xx_dig_playback_pcm_close,
2359 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2360 },
2361};
2362
2363static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2364 .substreams = 1,
2365 .channels_min = 2,
2366 .channels_max = 2,
2367 /* NID is set in stac92xx_build_pcms */
2368};
2369
2f2f4251
M		 2370static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2371 .substreams = 1,
2372 .channels_min = 2,
c7d4b2fa 2373 .channels_max = 8,
2f2f4251
M		 2374 .nid = 0x02, /* NID to query formats and rates */
2375 .ops = {
2376 .open = stac92xx_playback_pcm_open,
2377 .prepare = stac92xx_playback_pcm_prepare,
2378 .cleanup = stac92xx_playback_pcm_cleanup
2379 },
2380};
2381
3cc08dc6
MP		 2382static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2383 .substreams = 1,
2384 .channels_min = 2,
2385 .channels_max = 2,
2386 .nid = 0x06, /* NID to query formats and rates */
2387 .ops = {
2388 .open = stac92xx_playback_pcm_open,
2389 .prepare = stac92xx_playback_pcm_prepare,
2390 .cleanup = stac92xx_playback_pcm_cleanup
2391 },
2392};
2393
2f2f4251 2394static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2395 .channels_min = 2,
2396 .channels_max = 2,
9e05b7a3 2397 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2398 .ops = {
2399 .prepare = stac92xx_capture_pcm_prepare,
2400 .cleanup = stac92xx_capture_pcm_cleanup
2401 },
2402};
2403
2404static int stac92xx_build_pcms(struct hda_codec *codec)
2405{
2406 struct sigmatel_spec *spec = codec->spec;
2407 struct hda_pcm *info = spec->pcm_rec;
2408
2409 codec->num_pcms = 1;
2410 codec->pcm_info = info;
2411
c7d4b2fa 2412 info->name = "STAC92xx Analog";
2f2f4251 2413 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2414 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2415 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2416 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2417
2418 if (spec->alt_switch) {
2419 codec->num_pcms++;
2420 info++;
2421 info->name = "STAC92xx Analog Alt";
2422 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2423 }
2f2f4251 2424
dabbed6f
M		 2425 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2426 codec->num_pcms++;
2427 info++;
2428 info->name = "STAC92xx Digital";
7ba72ba1 2429 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2430 if (spec->multiout.dig_out_nid) {
2431 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2432 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2433 }
2434 if (spec->dig_in_nid) {
2435 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2436 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2437 }
2438 }
2439
2f2f4251
M		 2440 return 0;
2441}
2442
c960a03b
TI		 2443static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2444{
2445 unsigned int pincap = snd_hda_param_read(codec, nid,
2446 AC_PAR_PIN_CAP);
2447 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2448 if (pincap & AC_PINCAP_VREF_100)
2449 return AC_PINCTL_VREF_100;
2450 if (pincap & AC_PINCAP_VREF_80)
2451 return AC_PINCTL_VREF_80;
2452 if (pincap & AC_PINCAP_VREF_50)
2453 return AC_PINCTL_VREF_50;
2454 if (pincap & AC_PINCAP_VREF_GRD)
2455 return AC_PINCTL_VREF_GRD;
2456 return 0;
2457}
2458
403d1944
MP		 2459static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2460
2461{
82beb8fd
TI		 2462 snd_hda_codec_write_cache(codec, nid, 0,
2463 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2464}
2465
7c2ba97b
MR		 2466#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2467
2468static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2469 struct snd_ctl_elem_value *ucontrol)
2470{
2471 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2472 struct sigmatel_spec *spec = codec->spec;
2473
d7a89436 2474 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2475 return 0;
2476}
2477
2478static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2479 struct snd_ctl_elem_value *ucontrol)
2480{
2481 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2482 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2483 int nid = kcontrol->private_value;
2484
2485 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2486
2487 /* check to be sure that the ports are upto date with
2488 * switch changes
2489 */
2490 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2491
2492 return 1;
2493}
2494
a5ce8890 2495#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2496
2497static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2498{
2499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2500 struct sigmatel_spec *spec = codec->spec;
2501 int io_idx = kcontrol-> private_value & 0xff;
2502
2503 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2504 return 0;
2505}
2506
2507static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2508{
2509 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2510 struct sigmatel_spec *spec = codec->spec;
2511 hda_nid_t nid = kcontrol->private_value >> 8;
2512 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2513 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2514
2515 spec->io_switch[io_idx] = val;
2516
2517 if (val)
2518 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2519 else {
2520 unsigned int pinctl = AC_PINCTL_IN_EN;
2521 if (io_idx) /* set VREF for mic */
2522 pinctl |= stac92xx_get_vref(codec, nid);
2523 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2524 }
40c1d308
JZ		 2525
2526 /* check the auto-mute again: we need to mute/unmute the speaker
2527 * appropriately according to the pin direction
2528 */
2529 if (spec->hp_detect)
2530 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2531
403d1944
MP		 2532 return 1;
2533}
2534
0fb87bb4
ML		 2535#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2536
2537static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2541 struct sigmatel_spec *spec = codec->spec;
2542
2543 ucontrol->value.integer.value[0] = spec->clfe_swap;
2544 return 0;
2545}
2546
2547static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2548 struct snd_ctl_elem_value *ucontrol)
2549{
2550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2551 struct sigmatel_spec *spec = codec->spec;
2552 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2553 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2554
68ea7b2f 2555 if (spec->clfe_swap == val)
0fb87bb4
ML		 2556 return 0;
2557
68ea7b2f 2558 spec->clfe_swap = val;
0fb87bb4
ML		 2559
2560 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2561 spec->clfe_swap ? 0x4 : 0x0);
2562
2563 return 1;
2564}
2565
7c2ba97b
MR		 2566#define STAC_CODEC_HP_SWITCH(xname) \
2567 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2568 .name = xname, \
2569 .index = 0, \
2570 .info = stac92xx_hp_switch_info, \
2571 .get = stac92xx_hp_switch_get, \
2572 .put = stac92xx_hp_switch_put, \
2573 }
2574
403d1944
MP		 2575#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2576 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2577 .name = xname, \
2578 .index = 0, \
2579 .info = stac92xx_io_switch_info, \
2580 .get = stac92xx_io_switch_get, \
2581 .put = stac92xx_io_switch_put, \
2582 .private_value = xpval, \
2583 }
2584
0fb87bb4
ML		 2585#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2586 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2587 .name = xname, \
2588 .index = 0, \
2589 .info = stac92xx_clfe_switch_info, \
2590 .get = stac92xx_clfe_switch_get, \
2591 .put = stac92xx_clfe_switch_put, \
2592 .private_value = xpval, \
2593 }
403d1944 2594
c7d4b2fa
M		 2595enum {
2596 STAC_CTL_WIDGET_VOL,
2597 STAC_CTL_WIDGET_MUTE,
09a99959 2598 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2599 STAC_CTL_WIDGET_AMP_MUX,
2600 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2601 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2602 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2603 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2604};
2605
c8b6bf9b 2606static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2607 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2608 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2609 STAC_MONO_MUX,
89385035
MR		 2610 STAC_AMP_MUX,
2611 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2612 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2613 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2614 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2615};
2616
2617/* add dynamic controls */
4d4e9bb3
TI		 2618static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2619 struct snd_kcontrol_new *ktemp,
2620 int idx, const char *name,
2621 unsigned long val)
c7d4b2fa 2622{
c8b6bf9b 2623 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2624
2625 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2626 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2627
2628 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2629 if (! knew)
2630 return -ENOMEM;
2631 if (spec->kctl_alloc) {
2632 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2633 kfree(spec->kctl_alloc);
2634 }
2635 spec->kctl_alloc = knew;
2636 spec->num_kctl_alloc = num;
2637 }
2638
2639 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2640 *knew = *ktemp;
4682eee0 2641 knew->index = idx;
82fe0c58 2642 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2643 if (!knew->name)
c7d4b2fa
M		 2644 return -ENOMEM;
2645 knew->private_value = val;
2646 spec->num_kctl_used++;
2647 return 0;
2648}
2649
4d4e9bb3
TI		 2650static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2651 int type, int idx, const char *name,
2652 unsigned long val)
2653{
2654 return stac92xx_add_control_temp(spec,
2655 &stac92xx_control_templates[type],
2656 idx, name, val);
2657}
2658
4682eee0
MR		 2659
2660/* add dynamic controls */
4d4e9bb3
TI		 2661static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2662 const char *name, unsigned long val)
4682eee0
MR		 2663{
2664 return stac92xx_add_control_idx(spec, type, 0, name, val);
2665}
2666
403d1944
MP		 2667/* flag inputs as additional dynamic lineouts */
2668static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2669{
2670 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2671 unsigned int wcaps, wtype;
2672 int i, num_dacs = 0;
2673
2674 /* use the wcaps cache to count all DACs available for line-outs */
2675 for (i = 0; i < codec->num_nodes; i++) {
2676 wcaps = codec->wcaps[i];
2677 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2678
7b043899
SL		 2679 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2680 num_dacs++;
2681 }
403d1944 2682
7b043899
SL		 2683 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2684
403d1944
MP		 2685 switch (cfg->line_outs) {
2686 case 3:
2687 /* add line-in as side */
7b043899 2688 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2689 cfg->line_out_pins[cfg->line_outs] =
2690 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2691 spec->line_switch = 1;
2692 cfg->line_outs++;
2693 }
2694 break;
2695 case 2:
2696 /* add line-in as clfe and mic as side */
7b043899 2697 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2698 cfg->line_out_pins[cfg->line_outs] =
2699 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2700 spec->line_switch = 1;
2701 cfg->line_outs++;
2702 }
7b043899 2703 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2704 cfg->line_out_pins[cfg->line_outs] =
2705 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2706 spec->mic_switch = 1;
2707 cfg->line_outs++;
2708 }
2709 break;
2710 case 1:
2711 /* add line-in as surr and mic as clfe */
7b043899 2712 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2713 cfg->line_out_pins[cfg->line_outs] =
2714 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2715 spec->line_switch = 1;
2716 cfg->line_outs++;
2717 }
7b043899 2718 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2719 cfg->line_out_pins[cfg->line_outs] =
2720 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2721 spec->mic_switch = 1;
2722 cfg->line_outs++;
2723 }
2724 break;
2725 }
2726
2727 return 0;
2728}
2729
7b043899
SL		 2730
2731static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2732{
2733 int i;
2734
2735 for (i = 0; i < spec->multiout.num_dacs; i++) {
2736 if (spec->multiout.dac_nids[i] == nid)
2737 return 1;
2738 }
2739
2740 return 0;
2741}
2742
3cc08dc6 2743/*
7b043899
SL		 2744 * Fill in the dac_nids table from the parsed pin configuration
2745 * This function only works when every pin in line_out_pins[]
2746 * contains atleast one DAC in its connection list. Some 92xx
2747 * codecs are not connected directly to a DAC, such as the 9200
2748 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2749 */
19039bd0 2750static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2751 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2752{
2753 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2754 int i, j, conn_len = 0;
2755 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2756 unsigned int wcaps, wtype;
2757
c7d4b2fa
M		 2758 for (i = 0; i < cfg->line_outs; i++) {
2759 nid = cfg->line_out_pins[i];
7b043899
SL		 2760 conn_len = snd_hda_get_connections(codec, nid, conn,
2761 HDA_MAX_CONNECTIONS);
2762 for (j = 0; j < conn_len; j++) {
2763 wcaps = snd_hda_param_read(codec, conn[j],
2764 AC_PAR_AUDIO_WIDGET_CAP);
2765 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2766 if (wtype != AC_WID_AUD_OUT ||
2767 (wcaps & AC_WCAP_DIGITAL))
2768 continue;
2769 /* conn[j] is a DAC routed to this line-out */
2770 if (!is_in_dac_nids(spec, conn[j]))
2771 break;
2772 }
2773
2774 if (j == conn_len) {
df802952
TI		 2775 if (spec->multiout.num_dacs > 0) {
2776 /* we have already working output pins,
2777 * so let's drop the broken ones again
2778 */
2779 cfg->line_outs = spec->multiout.num_dacs;
2780 break;
2781 }
7b043899
SL		 2782 /* error out, no available DAC found */
2783 snd_printk(KERN_ERR
2784 "%s: No available DAC for pin 0x%x\n",
2785 __func__, nid);
2786 return -ENODEV;
2787 }
2788
2789 spec->multiout.dac_nids[i] = conn[j];
2790 spec->multiout.num_dacs++;
2791 if (conn_len > 1) {
2792 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2793 snd_hda_codec_write_cache(codec, nid, 0,
2794 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2795
7b043899
SL		 2796 }
2797 }
c7d4b2fa 2798
7b043899
SL		 2799 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2800 spec->multiout.num_dacs,
2801 spec->multiout.dac_nids[0],
2802 spec->multiout.dac_nids[1],
2803 spec->multiout.dac_nids[2],
2804 spec->multiout.dac_nids[3],
2805 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2806 return 0;
2807}
2808
eb06ed8f
TI		 2809/* create volume control/switch for the given prefx type */
2810static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2811{
2812 char name[32];
2813 int err;
2814
2815 sprintf(name, "%s Playback Volume", pfx);
2816 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2817 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2818 if (err < 0)
2819 return err;
2820 sprintf(name, "%s Playback Switch", pfx);
2821 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2822 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2823 if (err < 0)
2824 return err;
2825 return 0;
2826}
2827
ae0afd81
MR		 2828static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2829{
2830 if (!spec->multiout.hp_nid)
2831 spec->multiout.hp_nid = nid;
2832 else if (spec->multiout.num_dacs > 4) {
2833 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2834 return 1;
2835 } else {
2836 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2837 spec->multiout.num_dacs++;
2838 }
2839 return 0;
2840}
2841
2842static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2843{
2844 if (is_in_dac_nids(spec, nid))
2845 return 1;
2846 if (spec->multiout.hp_nid == nid)
2847 return 1;
2848 return 0;
2849}
2850
c7d4b2fa 2851/* add playback controls from the parsed DAC table */
0fb87bb4 2852static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2853 const struct auto_pin_cfg *cfg)
c7d4b2fa 2854{
19039bd0
TI		 2855 static const char *chname[4] = {
2856 "Front", "Surround", NULL /*CLFE*/, "Side"
2857 };
d21995e3 2858 hda_nid_t nid = 0;
c7d4b2fa
M		 2859 int i, err;
2860
0fb87bb4 2861 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2862 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2863
2864
40ac8c4f 2865 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2866 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2867 continue;
2868
2869 nid = spec->multiout.dac_nids[i];
2870
2871 if (i == 2) {
2872 /* Center/LFE */
eb06ed8f
TI		 2873 err = create_controls(spec, "Center", nid, 1);
2874 if (err < 0)
c7d4b2fa 2875 return err;
eb06ed8f
TI		 2876 err = create_controls(spec, "LFE", nid, 2);
2877 if (err < 0)
c7d4b2fa 2878 return err;
0fb87bb4
ML		 2879
2880 wid_caps = get_wcaps(codec, nid);
2881
2882 if (wid_caps & AC_WCAP_LR_SWAP) {
2883 err = stac92xx_add_control(spec,
2884 STAC_CTL_WIDGET_CLFE_SWITCH,
2885 "Swap Center/LFE Playback Switch", nid);
2886
2887 if (err < 0)
2888 return err;
2889 }
2890
c7d4b2fa 2891 } else {
eb06ed8f
TI		 2892 err = create_controls(spec, chname[i], nid, 3);
2893 if (err < 0)
c7d4b2fa
M		 2894 return err;
2895 }
2896 }
2897
fedb7569
MR		 2898 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2899 cfg->hp_outs && !spec->multiout.hp_nid)
2900 spec->multiout.hp_nid = nid;
2901
95026623 2902 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2903 err = stac92xx_add_control(spec,
2904 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2905 "Headphone as Line Out Switch",
2906 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2907 if (err < 0)
2908 return err;
2909 }
2910
b5895dc8
MR		 2911 if (spec->line_switch) {
2912 nid = cfg->input_pins[AUTO_PIN_LINE];
2913 pincap = snd_hda_param_read(codec, nid,
2914 AC_PAR_PIN_CAP);
2915 if (pincap & AC_PINCAP_OUT) {
2916 err = stac92xx_add_control(spec,
2917 STAC_CTL_WIDGET_IO_SWITCH,
2918 "Line In as Output Switch", nid << 8);
2919 if (err < 0)
2920 return err;
2921 }
2922 }
403d1944 2923
b5895dc8 2924 if (spec->mic_switch) {
cace16f1 2925 unsigned int def_conf;
ae0afd81
MR		 2926 unsigned int mic_pin = AUTO_PIN_MIC;
2927again:
2928 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2929 def_conf = snd_hda_codec_read(codec, nid, 0,
2930 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2931 /* some laptops have an internal analog microphone
2932 * which can't be used as a output */
2933 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2934 pincap = snd_hda_param_read(codec, nid,
2935 AC_PAR_PIN_CAP);
2936 if (pincap & AC_PINCAP_OUT) {
2937 err = stac92xx_add_control(spec,
2938 STAC_CTL_WIDGET_IO_SWITCH,
2939 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2940 nid = snd_hda_codec_read(codec, nid, 0,
2941 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2942 if (!check_in_dac_nids(spec, nid))
2943 add_spec_dacs(spec, nid);
cace16f1
MR		 2944 if (err < 0)
2945 return err;
2946 }
ae0afd81
MR		 2947 } else if (mic_pin == AUTO_PIN_MIC) {
2948 mic_pin = AUTO_PIN_FRONT_MIC;
2949 goto again;
b5895dc8
MR		 2950 }
2951 }
403d1944 2952
c7d4b2fa
M		 2953 return 0;
2954}
2955
eb06ed8f
TI		 2956/* add playback controls for Speaker and HP outputs */
2957static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2958 struct auto_pin_cfg *cfg)
2959{
2960 struct sigmatel_spec *spec = codec->spec;
2961 hda_nid_t nid;
2962 int i, old_num_dacs, err;
2963
2964 old_num_dacs = spec->multiout.num_dacs;
2965 for (i = 0; i < cfg->hp_outs; i++) {
2966 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2967 if (wid_caps & AC_WCAP_UNSOL_CAP)
2968 spec->hp_detect = 1;
2969 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2970 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2971 if (check_in_dac_nids(spec, nid))
2972 nid = 0;
2973 if (! nid)
c7d4b2fa 2974 continue;
eb06ed8f
TI		 2975 add_spec_dacs(spec, nid);
2976 }
2977 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2978 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2979 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2980 if (check_in_dac_nids(spec, nid))
2981 nid = 0;
eb06ed8f
TI		 2982 if (! nid)
2983 continue;
2984 add_spec_dacs(spec, nid);
c7d4b2fa 2985 }
1b290a51
MR		 2986 for (i = 0; i < cfg->line_outs; i++) {
2987 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2988 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2989 if (check_in_dac_nids(spec, nid))
2990 nid = 0;
2991 if (! nid)
2992 continue;
2993 add_spec_dacs(spec, nid);
2994 }
eb06ed8f
TI		 2995 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2996 static const char *pfxs[] = {
2997 "Speaker", "External Speaker", "Speaker2",
2998 };
2999 err = create_controls(spec, pfxs[i - old_num_dacs],
3000 spec->multiout.dac_nids[i], 3);
3001 if (err < 0)
3002 return err;
3003 }
3004 if (spec->multiout.hp_nid) {
2626a263
TI		 3005 err = create_controls(spec, "Headphone",
3006 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3007 if (err < 0)
3008 return err;
3009 }
c7d4b2fa
M		 3010
3011 return 0;
3012}
3013
b22b4821 3014/* labels for mono mux outputs */
d0513fc6
MR		 3015static const char *stac92xx_mono_labels[4] = {
3016 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3017};
3018
3019/* create mono mux for mono out on capable codecs */
3020static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3021{
3022 struct sigmatel_spec *spec = codec->spec;
3023 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3024 int i, num_cons;
3025 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3026
3027 num_cons = snd_hda_get_connections(codec,
3028 spec->mono_nid,
3029 con_lst,
3030 HDA_MAX_NUM_INPUTS);
3031 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3032 return -EINVAL;
3033
3034 for (i = 0; i < num_cons; i++) {
3035 mono_mux->items[mono_mux->num_items].label =
3036 stac92xx_mono_labels[i];
3037 mono_mux->items[mono_mux->num_items].index = i;
3038 mono_mux->num_items++;
3039 }
09a99959
MR		 3040
3041 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3042 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3043}
3044
89385035
MR		 3045/* labels for amp mux outputs */
3046static const char *stac92xx_amp_labels[3] = {
4b33c767 3047 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3048};
3049
3050/* create amp out controls mux on capable codecs */
3051static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3052{
3053 struct sigmatel_spec *spec = codec->spec;
3054 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3055 int i, err;
3056
2a9c7816 3057 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3058 amp_mux->items[amp_mux->num_items].label =
3059 stac92xx_amp_labels[i];
3060 amp_mux->items[amp_mux->num_items].index = i;
3061 amp_mux->num_items++;
3062 }
3063
2a9c7816
MR		 3064 if (spec->num_amps > 1) {
3065 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3066 "Amp Selector Capture Switch", 0);
3067 if (err < 0)
3068 return err;
3069 }
89385035
MR		 3070 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3071 "Amp Capture Volume",
3072 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3073}
3074
3075
1cd2224c
MR		 3076/* create PC beep volume controls */
3077static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3078 hda_nid_t nid)
3079{
3080 struct sigmatel_spec *spec = codec->spec;
3081 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3082 int err;
3083
3084 /* check for mute support for the the amp */
3085 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3086 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3087 "PC Beep Playback Switch",
3088 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3089 if (err < 0)
3090 return err;
3091 }
3092
3093 /* check to see if there is volume support for the amp */
3094 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3095 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3096 "PC Beep Playback Volume",
3097 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3098 if (err < 0)
3099 return err;
3100 }
3101 return 0;
3102}
3103
4d4e9bb3
TI		 3104#ifdef CONFIG_SND_HDA_INPUT_BEEP
3105#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3106
3107static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3108 struct snd_ctl_elem_value *ucontrol)
3109{
3110 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3111 ucontrol->value.integer.value[0] = codec->beep->enabled;
3112 return 0;
3113}
3114
3115static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3116 struct snd_ctl_elem_value *ucontrol)
3117{
3118 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3119 int enabled = !!ucontrol->value.integer.value[0];
3120 if (codec->beep->enabled != enabled) {
3121 codec->beep->enabled = enabled;
3122 return 1;
3123 }
3124 return 0;
3125}
3126
3127static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3128 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3129 .info = stac92xx_dig_beep_switch_info,
3130 .get = stac92xx_dig_beep_switch_get,
3131 .put = stac92xx_dig_beep_switch_put,
3132};
3133
3134static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3135{
3136 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3137 0, "PC Beep Playback Switch", 0);
3138}
3139#endif
3140
4682eee0
MR		 3141static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3142{
3143 struct sigmatel_spec *spec = codec->spec;
3144 int wcaps, nid, i, err = 0;
3145
3146 for (i = 0; i < spec->num_muxes; i++) {
3147 nid = spec->mux_nids[i];
3148 wcaps = get_wcaps(codec, nid);
3149
3150 if (wcaps & AC_WCAP_OUT_AMP) {
3151 err = stac92xx_add_control_idx(spec,
3152 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3153 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3154 if (err < 0)
3155 return err;
3156 }
3157 }
3158 return 0;
3159};
3160
d9737751 3161static const char *stac92xx_spdif_labels[3] = {
65973632 3162 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3163};
3164
3165static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3166{
3167 struct sigmatel_spec *spec = codec->spec;
3168 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3169 const char **labels = spec->spdif_labels;
d9737751 3170 int i, num_cons;
65973632 3171 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3172
3173 num_cons = snd_hda_get_connections(codec,
3174 spec->smux_nids[0],
3175 con_lst,
3176 HDA_MAX_NUM_INPUTS);
65973632 3177 if (!num_cons)
d9737751
MR		 3178 return -EINVAL;
3179
65973632
MR		 3180 if (!labels)
3181 labels = stac92xx_spdif_labels;
3182
d9737751 3183 for (i = 0; i < num_cons; i++) {
65973632 3184 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3185 spdif_mux->items[spdif_mux->num_items].index = i;
3186 spdif_mux->num_items++;
3187 }
3188
3189 return 0;
3190}
3191
8b65727b 3192/* labels for dmic mux inputs */
ddc2cec4 3193static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3194 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3195 "Digital Mic 3", "Digital Mic 4"
3196};
3197
3198/* create playback/capture controls for input pins on dmic capable codecs */
3199static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3200 const struct auto_pin_cfg *cfg)
3201{
3202 struct sigmatel_spec *spec = codec->spec;
3203 struct hda_input_mux *dimux = &spec->private_dimux;
3204 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3205 int err, i, j;
3206 char name[32];
8b65727b
MP		 3207
3208 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3209 dimux->items[dimux->num_items].index = 0;
3210 dimux->num_items++;
3211
3212 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3213 hda_nid_t nid;
8b65727b
MP		 3214 int index;
3215 int num_cons;
0678accd 3216 unsigned int wcaps;
8b65727b
MP		 3217 unsigned int def_conf;
3218
3219 def_conf = snd_hda_codec_read(codec,
3220 spec->dmic_nids[i],
3221 0,
3222 AC_VERB_GET_CONFIG_DEFAULT,
3223 0);
3224 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3225 continue;
3226
0678accd 3227 nid = spec->dmic_nids[i];
8b65727b 3228 num_cons = snd_hda_get_connections(codec,
e1f0d669 3229 spec->dmux_nids[0],
8b65727b
MP		 3230 con_lst,
3231 HDA_MAX_NUM_INPUTS);
3232 for (j = 0; j < num_cons; j++)
0678accd 3233 if (con_lst[j] == nid) {
8b65727b
MP		 3234 index = j;
3235 goto found;
3236 }
3237 continue;
3238found:
d0513fc6
MR		 3239 wcaps = get_wcaps(codec, nid) &
3240 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3241
d0513fc6 3242 if (wcaps) {
0678accd
MR		 3243 sprintf(name, "%s Capture Volume",
3244 stac92xx_dmic_labels[dimux->num_items]);
3245
3246 err = stac92xx_add_control(spec,
3247 STAC_CTL_WIDGET_VOL,
3248 name,
d0513fc6
MR		 3249 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3250 (wcaps & AC_WCAP_OUT_AMP) ?
3251 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3252 if (err < 0)
3253 return err;
3254 }
3255
8b65727b
MP		 3256 dimux->items[dimux->num_items].label =
3257 stac92xx_dmic_labels[dimux->num_items];
3258 dimux->items[dimux->num_items].index = index;
3259 dimux->num_items++;
3260 }
3261
3262 return 0;
3263}
3264
c7d4b2fa
M		 3265/* create playback/capture controls for input pins */
3266static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3267{
3268 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3269 struct hda_input_mux *imux = &spec->private_imux;
3270 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3271 int i, j, k;
3272
3273 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3274 int index;
3275
3276 if (!cfg->input_pins[i])
3277 continue;
3278 index = -1;
3279 for (j = 0; j < spec->num_muxes; j++) {
3280 int num_cons;
3281 num_cons = snd_hda_get_connections(codec,
3282 spec->mux_nids[j],
3283 con_lst,
3284 HDA_MAX_NUM_INPUTS);
3285 for (k = 0; k < num_cons; k++)
3286 if (con_lst[k] == cfg->input_pins[i]) {
3287 index = k;
3288 goto found;
3289 }
c7d4b2fa 3290 }
314634bc
TI		 3291 continue;
3292 found:
3293 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3294 imux->items[imux->num_items].index = index;
3295 imux->num_items++;
c7d4b2fa
M		 3296 }
3297
7b043899 3298 if (imux->num_items) {
62fe78e9
SR		 3299 /*
3300 * Set the current input for the muxes.
3301 * The STAC9221 has two input muxes with identical source
3302 * NID lists. Hopefully this won't get confused.
3303 */
3304 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3305 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3306 AC_VERB_SET_CONNECT_SEL,
3307 imux->items[0].index);
62fe78e9
SR		 3308 }
3309 }
3310
c7d4b2fa
M		 3311 return 0;
3312}
3313
c7d4b2fa
M		 3314static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3315{
3316 struct sigmatel_spec *spec = codec->spec;
3317 int i;
3318
3319 for (i = 0; i < spec->autocfg.line_outs; i++) {
3320 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3321 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3322 }
3323}
3324
3325static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3326{
3327 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3328 int i;
c7d4b2fa 3329
eb06ed8f
TI		 3330 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3331 hda_nid_t pin;
3332 pin = spec->autocfg.hp_pins[i];
3333 if (pin) /* connect to front */
3334 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3335 }
3336 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3337 hda_nid_t pin;
3338 pin = spec->autocfg.speaker_pins[i];
3339 if (pin) /* connect to front */
3340 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3341 }
c7d4b2fa
M		 3342}
3343
3cc08dc6 3344static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3345{
3346 struct sigmatel_spec *spec = codec->spec;
3347 int err;
bcecd9bd 3348 int hp_speaker_swap = 0;
c7d4b2fa 3349
8b65727b
MP		 3350 if ((err = snd_hda_parse_pin_def_config(codec,
3351 &spec->autocfg,
3352 spec->dmic_nids)) < 0)
c7d4b2fa 3353 return err;
82bc955f 3354 if (! spec->autocfg.line_outs)
869264c4 3355 return 0; /* can't find valid pin config */
19039bd0 3356
bcecd9bd
JZ		 3357 /* If we have no real line-out pin and multiple hp-outs, HPs should
3358 * be set up as multi-channel outputs.
3359 */
3360 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3361 spec->autocfg.hp_outs > 1) {
3362 /* Copy hp_outs to line_outs, backup line_outs in
3363 * speaker_outs so that the following routines can handle
3364 * HP pins as primary outputs.
3365 */
3366 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3367 sizeof(spec->autocfg.line_out_pins));
3368 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3369 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3370 sizeof(spec->autocfg.hp_pins));
3371 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3372 hp_speaker_swap = 1;
3373 }
09a99959 3374 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3375 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3376 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3377 u32 caps = query_amp_caps(codec,
3378 spec->autocfg.mono_out_pin, dir);
3379 hda_nid_t conn_list[1];
3380
3381 /* get the mixer node and then the mono mux if it exists */
3382 if (snd_hda_get_connections(codec,
3383 spec->autocfg.mono_out_pin, conn_list, 1) &&
3384 snd_hda_get_connections(codec, conn_list[0],
3385 conn_list, 1)) {
3386
3387 int wcaps = get_wcaps(codec, conn_list[0]);
3388 int wid_type = (wcaps & AC_WCAP_TYPE)
3389 >> AC_WCAP_TYPE_SHIFT;
3390 /* LR swap check, some stac925x have a mux that
3391 * changes the DACs output path instead of the
3392 * mono-mux path.
3393 */
3394 if (wid_type == AC_WID_AUD_SEL &&
3395 !(wcaps & AC_WCAP_LR_SWAP))
3396 spec->mono_nid = conn_list[0];
3397 }
d0513fc6
MR		 3398 if (dir) {
3399 hda_nid_t nid = spec->autocfg.mono_out_pin;
3400
3401 /* most mono outs have a least a mute/unmute switch */
3402 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3403 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3404 "Mono Playback Switch",
3405 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3406 if (err < 0)
3407 return err;
d0513fc6
MR		 3408 /* check for volume support for the amp */
3409 if ((caps & AC_AMPCAP_NUM_STEPS)
3410 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3411 err = stac92xx_add_control(spec,
3412 STAC_CTL_WIDGET_VOL,
3413 "Mono Playback Volume",
3414 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3415 if (err < 0)
3416 return err;
3417 }
09a99959
MR		 3418 }
3419
3420 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3421 AC_PINCTL_OUT_EN);
3422 }
bcecd9bd 3423
403d1944
MP		 3424 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3425 return err;
19039bd0
TI		 3426 if (spec->multiout.num_dacs == 0)
3427 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3428 return err;
c7d4b2fa 3429
0fb87bb4
ML		 3430 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3431
3432 if (err < 0)
3433 return err;
3434
1cd2224c
MR		 3435 /* setup analog beep controls */
3436 if (spec->anabeep_nid > 0) {
3437 err = stac92xx_auto_create_beep_ctls(codec,
3438 spec->anabeep_nid);
3439 if (err < 0)
3440 return err;
3441 }
3442
3443 /* setup digital beep controls and input device */
3444#ifdef CONFIG_SND_HDA_INPUT_BEEP
3445 if (spec->digbeep_nid > 0) {
3446 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3447 unsigned int caps;
1cd2224c
MR		 3448
3449 err = stac92xx_auto_create_beep_ctls(codec, nid);
3450 if (err < 0)
3451 return err;
3452 err = snd_hda_attach_beep_device(codec, nid);
3453 if (err < 0)
3454 return err;
4d4e9bb3
TI		 3455 /* if no beep switch is available, make its own one */
3456 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3457 if (codec->beep &&
3458 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3459 err = stac92xx_beep_switch_ctl(codec);
3460 if (err < 0)
3461 return err;
3462 }
1cd2224c
MR		 3463 }
3464#endif
3465
bcecd9bd
JZ		 3466 if (hp_speaker_swap == 1) {
3467 /* Restore the hp_outs and line_outs */
3468 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3469 sizeof(spec->autocfg.line_out_pins));
3470 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3471 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3472 sizeof(spec->autocfg.speaker_pins));
3473 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3474 memset(spec->autocfg.speaker_pins, 0,
3475 sizeof(spec->autocfg.speaker_pins));
3476 spec->autocfg.speaker_outs = 0;
3477 }
3478
0fb87bb4
ML		 3479 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3480
3481 if (err < 0)
3482 return err;
3483
3484 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3485
3486 if (err < 0)
c7d4b2fa
M		 3487 return err;
3488
b22b4821
MR		 3489 if (spec->mono_nid > 0) {
3490 err = stac92xx_auto_create_mono_output_ctls(codec);
3491 if (err < 0)
3492 return err;
3493 }
2a9c7816 3494 if (spec->num_amps > 0) {
89385035
MR		 3495 err = stac92xx_auto_create_amp_output_ctls(codec);
3496 if (err < 0)
3497 return err;
3498 }
2a9c7816 3499 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3500 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3501 &spec->autocfg)) < 0)
3502 return err;
4682eee0
MR		 3503 if (spec->num_muxes > 0) {
3504 err = stac92xx_auto_create_mux_input_ctls(codec);
3505 if (err < 0)
3506 return err;
3507 }
d9737751
MR		 3508 if (spec->num_smuxes > 0) {
3509 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3510 if (err < 0)
3511 return err;
3512 }
8b65727b 3513
c7d4b2fa 3514 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3515 if (spec->multiout.max_channels > 2)
c7d4b2fa 3516 spec->surr_switch = 1;
c7d4b2fa 3517
82bc955f 3518 if (spec->autocfg.dig_out_pin)
3cc08dc6 3519 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3520 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3521 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3522
3523 if (spec->kctl_alloc)
3524 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3525
3526 spec->input_mux = &spec->private_imux;
2a9c7816 3527 spec->dinput_mux = &spec->private_dimux;
d9737751 3528 spec->sinput_mux = &spec->private_smux;
b22b4821 3529 spec->mono_mux = &spec->private_mono_mux;
89385035 3530 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3531 return 1;
3532}
3533
82bc955f
TI		 3534/* add playback controls for HP output */
3535static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3536 struct auto_pin_cfg *cfg)
3537{
3538 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3539 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3540 unsigned int wid_caps;
3541
3542 if (! pin)
3543 return 0;
3544
3545 wid_caps = get_wcaps(codec, pin);
505cb341 3546 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3547 spec->hp_detect = 1;
82bc955f
TI		 3548
3549 return 0;
3550}
3551
160ea0dc
RF		 3552/* add playback controls for LFE output */
3553static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3554 struct auto_pin_cfg *cfg)
3555{
3556 struct sigmatel_spec *spec = codec->spec;
3557 int err;
3558 hda_nid_t lfe_pin = 0x0;
3559 int i;
3560
3561 /*
3562 * search speaker outs and line outs for a mono speaker pin
3563 * with an amp. If one is found, add LFE controls
3564 * for it.
3565 */
3566 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3567 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3568 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3569 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3570 if (wcaps == AC_WCAP_OUT_AMP)
3571 /* found a mono speaker with an amp, must be lfe */
3572 lfe_pin = pin;
3573 }
3574
3575 /* if speaker_outs is 0, then speakers may be in line_outs */
3576 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3577 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3578 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3579 unsigned int defcfg;
8b551785 3580 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3581 AC_VERB_GET_CONFIG_DEFAULT,
3582 0x00);
8b551785 3583 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3584 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3585 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3586 if (wcaps == AC_WCAP_OUT_AMP)
3587 /* found a mono speaker with an amp,
3588 must be lfe */
3589 lfe_pin = pin;
3590 }
3591 }
3592 }
3593
3594 if (lfe_pin) {
eb06ed8f 3595 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3596 if (err < 0)
3597 return err;
3598 }
3599
3600 return 0;
3601}
3602
c7d4b2fa
M		 3603static int stac9200_parse_auto_config(struct hda_codec *codec)
3604{
3605 struct sigmatel_spec *spec = codec->spec;
3606 int err;
3607
df694daa 3608 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3609 return err;
3610
3611 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3612 return err;
3613
82bc955f
TI		 3614 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3615 return err;
3616
160ea0dc
RF		 3617 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3618 return err;
3619
355a0ec4
TI		 3620 if (spec->num_muxes > 0) {
3621 err = stac92xx_auto_create_mux_input_ctls(codec);
3622 if (err < 0)
3623 return err;
3624 }
3625
82bc955f 3626 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3627 spec->multiout.dig_out_nid = 0x05;
82bc955f 3628 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3629 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3630
3631 if (spec->kctl_alloc)
3632 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3633
3634 spec->input_mux = &spec->private_imux;
8b65727b 3635 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3636
3637 return 1;
3638}
3639
62fe78e9
SR		 3640/*
3641 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3642 * funky external mute control using GPIO pins.
3643 */
3644
76e1ddfb 3645static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3646 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3647{
3648 unsigned int gpiostate, gpiomask, gpiodir;
3649
3650 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3651 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3652 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3653
3654 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3655 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3656 gpiomask |= mask;
62fe78e9
SR		 3657
3658 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3659 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3660 gpiodir |= dir_mask;
62fe78e9 3661
76e1ddfb 3662 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3663 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3664
3665 snd_hda_codec_write(codec, codec->afg, 0,
3666 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3667 snd_hda_codec_read(codec, codec->afg, 0,
3668 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3669
3670 msleep(1);
3671
76e1ddfb
TI		 3672 snd_hda_codec_read(codec, codec->afg, 0,
3673 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3674}
3675
314634bc
TI		 3676static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3677 unsigned int event)
3678{
3679 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3680 snd_hda_codec_write_cache(codec, nid, 0,
3681 AC_VERB_SET_UNSOLICITED_ENABLE,
3682 (AC_USRSP_EN | event));
314634bc
TI		 3683}
3684
a64135a2
MR		 3685static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3686{
3687 int i;
3688 for (i = 0; i < cfg->hp_outs; i++)
3689 if (cfg->hp_pins[i] == nid)
3690 return 1; /* nid is a HP-Out */
3691
3692 return 0; /* nid is not a HP-Out */
3693};
3694
b76c850f
MR		 3695static void stac92xx_power_down(struct hda_codec *codec)
3696{
3697 struct sigmatel_spec *spec = codec->spec;
3698
3699 /* power down inactive DACs */
3700 hda_nid_t *dac;
3701 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3702 if (!is_in_dac_nids(spec, *dac) &&
3703 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3704 snd_hda_codec_write_cache(codec, *dac, 0,
3705 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3706}
3707
f73d3585
TI		 3708static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3709 int enable);
3710
c7d4b2fa
M		 3711static int stac92xx_init(struct hda_codec *codec)
3712{
3713 struct sigmatel_spec *spec = codec->spec;
82bc955f 3714 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3715 unsigned int gpio;
82bc955f 3716 int i;
c7d4b2fa 3717
c7d4b2fa
M		 3718 snd_hda_sequence_write(codec, spec->init);
3719
8daaaa97
MR		 3720 /* power down adcs initially */
3721 if (spec->powerdown_adcs)
3722 for (i = 0; i < spec->num_adcs; i++)
3723 snd_hda_codec_write_cache(codec,
3724 spec->adc_nids[i], 0,
3725 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3726
3727 /* set up GPIO */
3728 gpio = spec->gpio_data;
3729 /* turn on EAPD statically when spec->eapd_switch isn't set.
3730 * otherwise, unsol event will turn it on/off dynamically
3731 */
3732 if (!spec->eapd_switch)
3733 gpio |= spec->eapd_mask;
3734 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3735
82bc955f
TI		 3736 /* set up pins */
3737 if (spec->hp_detect) {
505cb341 3738 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3739 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3740 enable_pin_detect(codec, cfg->hp_pins[i],
3741 STAC_HP_EVENT);
0a07acaf
TI		 3742 /* force to enable the first line-out; the others are set up
3743 * in unsol_event
3744 */
3745 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3746 AC_PINCTL_OUT_EN);
eb995a8c 3747 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3748 /* fake event to set up pins */
3749 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3750 } else {
3751 stac92xx_auto_init_multi_out(codec);
3752 stac92xx_auto_init_hp_out(codec);
3753 }
3754 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3755 hda_nid_t nid = cfg->input_pins[i];
3756 if (nid) {
4f1e6bc3
TI		 3757 unsigned int pinctl;
3758 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3759 /* for mic pins, force to initialize */
3760 pinctl = stac92xx_get_vref(codec, nid);
3761 } else {
3762 pinctl = snd_hda_codec_read(codec, nid, 0,
3763 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3764 /* if PINCTL already set then skip */
3765 if (pinctl & AC_PINCTL_IN_EN)
3766 continue;
3767 }
3768 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3769 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3770 }
82bc955f 3771 }
a64135a2
MR		 3772 for (i = 0; i < spec->num_dmics; i++)
3773 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3774 AC_PINCTL_IN_EN);
f73d3585
TI		 3775 if (cfg->dig_out_pin)
3776 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3777 AC_PINCTL_OUT_EN);
3778 if (cfg->dig_in_pin)
3779 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3780 AC_PINCTL_IN_EN);
a64135a2 3781 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3782 hda_nid_t nid = spec->pwr_nids[i];
3783 int pinctl, def_conf;
3784 int event = STAC_PWR_EVENT;
3785
3786 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3787 continue; /* already has an unsol event */
3788
3789 pinctl = snd_hda_codec_read(codec, nid, 0,
3790 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3791 /* outputs are only ports capable of power management
3792 * any attempts on powering down a input port cause the
3793 * referenced VREF to act quirky.
3794 */
3795 if (pinctl & AC_PINCTL_IN_EN)
3796 continue;
f73d3585
TI		 3797 def_conf = snd_hda_codec_read(codec, nid, 0,
3798 AC_VERB_GET_CONFIG_DEFAULT, 0);
3799 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3800 /* skip any ports that don't have jacks since presence
3801 * detection is useless */
f73d3585
TI		 3802 if (def_conf != AC_JACK_PORT_COMPLEX) {
3803 if (def_conf != AC_JACK_PORT_NONE)
3804 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3805 continue;
f73d3585 3806 }
a64135a2
MR		 3807 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3808 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3809 }
b76c850f
MR		 3810 if (spec->dac_list)
3811 stac92xx_power_down(codec);
c7d4b2fa
M		 3812 return 0;
3813}
3814
2f2f4251
M		 3815static void stac92xx_free(struct hda_codec *codec)
3816{
c7d4b2fa
M		 3817 struct sigmatel_spec *spec = codec->spec;
3818 int i;
3819
3820 if (! spec)
3821 return;
3822
3823 if (spec->kctl_alloc) {
3824 for (i = 0; i < spec->num_kctl_used; i++)
3825 kfree(spec->kctl_alloc[i].name);
3826 kfree(spec->kctl_alloc);
3827 }
3828
11b44bbd
RF		 3829 if (spec->bios_pin_configs)
3830 kfree(spec->bios_pin_configs);
3831
c7d4b2fa 3832 kfree(spec);
1cd2224c 3833 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3834}
3835
4e55096e
M		 3836static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3837 unsigned int flag)
3838{
3839 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3840 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3841
f9acba43
TI		 3842 if (pin_ctl & AC_PINCTL_IN_EN) {
3843 /*
3844 * we need to check the current set-up direction of
3845 * shared input pins since they can be switched via
3846 * "xxx as Output" mixer switch
3847 */
3848 struct sigmatel_spec *spec = codec->spec;
3849 struct auto_pin_cfg *cfg = &spec->autocfg;
3850 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3851 spec->line_switch) ||
3852 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3853 spec->mic_switch))
3854 return;
3855 }
3856
7b043899
SL		 3857 /* if setting pin direction bits, clear the current
3858 direction bits first */
3859 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3860 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3861
82beb8fd 3862 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3863 AC_VERB_SET_PIN_WIDGET_CONTROL,
3864 pin_ctl | flag);
3865}
3866
3867static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3868 unsigned int flag)
3869{
3870 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3871 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3872 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3873 AC_VERB_SET_PIN_WIDGET_CONTROL,
3874 pin_ctl & ~flag);
3875}
3876
40c1d308 3877static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3878{
3879 if (!nid)
3880 return 0;
3881 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3882 & (1 << 31)) {
3883 unsigned int pinctl;
3884 pinctl = snd_hda_codec_read(codec, nid, 0,
3885 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3886 if (pinctl & AC_PINCTL_IN_EN)
3887 return 0; /* mic- or line-input */
3888 else
3889 return 1; /* HP-output */
3890 }
314634bc
TI		 3891 return 0;
3892}
3893
d7a89436
TI		 3894/* return non-zero if the hp-pin of the given array index isn't
3895 * a jack-detection target
3896 */
3897static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3898{
3899 struct auto_pin_cfg *cfg = &spec->autocfg;
3900
3901 /* ignore sensing of shared line and mic jacks */
3902 if (spec->line_switch &&
3903 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3904 return 1;
3905 if (spec->mic_switch &&
3906 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3907 return 1;
3908 /* ignore if the pin is set as line-out */
3909 if (cfg->hp_pins[i] == spec->hp_switch)
3910 return 1;
3911 return 0;
3912}
3913
314634bc 3914static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3915{
3916 struct sigmatel_spec *spec = codec->spec;
3917 struct auto_pin_cfg *cfg = &spec->autocfg;
3918 int i, presence;
3919
eb06ed8f 3920 presence = 0;
4fe5195c
MR		 3921 if (spec->gpio_mute)
3922 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3923 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3924
eb06ed8f 3925 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3926 if (presence)
3927 break;
d7a89436
TI		 3928 if (no_hp_sensing(spec, i))
3929 continue;
4fe5195c 3930 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3931 }
4e55096e
M		 3932
3933 if (presence) {
d7a89436 3934 /* disable lineouts */
7c2ba97b 3935 if (spec->hp_switch)
d7a89436
TI		 3936 stac92xx_reset_pinctl(codec, spec->hp_switch,
3937 AC_PINCTL_OUT_EN);
4e55096e
M		 3938 for (i = 0; i < cfg->line_outs; i++)
3939 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3940 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3941 for (i = 0; i < cfg->speaker_outs; i++)
3942 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3943 AC_PINCTL_OUT_EN);
0253fdcd 3944 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3945 stac_gpio_set(codec, spec->gpio_mask,
3946 spec->gpio_dir, spec->gpio_data &
3947 ~spec->eapd_mask);
4e55096e 3948 } else {
d7a89436 3949 /* enable lineouts */
7c2ba97b 3950 if (spec->hp_switch)
d7a89436
TI		 3951 stac92xx_set_pinctl(codec, spec->hp_switch,
3952 AC_PINCTL_OUT_EN);
4e55096e
M		 3953 for (i = 0; i < cfg->line_outs; i++)
3954 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3955 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3956 for (i = 0; i < cfg->speaker_outs; i++)
3957 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3958 AC_PINCTL_OUT_EN);
0253fdcd 3959 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3960 stac_gpio_set(codec, spec->gpio_mask,
3961 spec->gpio_dir, spec->gpio_data |
3962 spec->eapd_mask);
4e55096e 3963 }
d7a89436
TI		 3964 /* toggle hp outs */
3965 for (i = 0; i < cfg->hp_outs; i++) {
3966 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3967 if (no_hp_sensing(spec, i))
3968 continue;
3969 if (presence)
3970 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3971 else
3972 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3973 }
4e55096e
M		 3974}
3975
f73d3585
TI		 3976static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3977 int enable)
a64135a2
MR		 3978{
3979 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 3980 unsigned int idx, val;
3981
3982 for (idx = 0; idx < spec->num_pwrs; idx++) {
3983 if (spec->pwr_nids[idx] == nid)
3984 break;
3985 }
3986 if (idx >= spec->num_pwrs)
3987 return;
d0513fc6
MR		 3988
3989 /* several codecs have two power down bits */
3990 if (spec->pwr_mapping)
3991 idx = spec->pwr_mapping[idx];
3992 else
3993 idx = 1 << idx;
a64135a2 3994
f73d3585
TI		 3995 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
3996 if (enable)
a64135a2
MR		 3997 val &= ~idx;
3998 else
3999 val |= idx;
4000
4001 /* power down unused output ports */
4002 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
f73d3585
TI		 4003}
4004
4005static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4006{
4007 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4008}
a64135a2 4009
314634bc
TI		 4010static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4011{
a64135a2
MR		 4012 struct sigmatel_spec *spec = codec->spec;
4013 int idx = res >> 26 & 0x0f;
4014
72474be6 4015 switch ((res >> 26) & 0x70) {
314634bc
TI		 4016 case STAC_HP_EVENT:
4017 stac92xx_hp_detect(codec, res);
a64135a2
MR		 4018 /* fallthru */
4019 case STAC_PWR_EVENT:
4020 if (spec->num_pwrs > 0)
4021 stac92xx_pin_sense(codec, idx);
72474be6
MR		 4022 break;
4023 case STAC_VREF_EVENT: {
4024 int data = snd_hda_codec_read(codec, codec->afg, 0,
4025 AC_VERB_GET_GPIO_DATA, 0);
4026 /* toggle VREF state based on GPIOx status */
4027 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
4028 !!(data & (1 << idx)));
4029 break;
4030 }
314634bc
TI		 4031 }
4032}
4033
cb53c626 4034#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4035static int stac92xx_resume(struct hda_codec *codec)
4036{
dc81bed1
TI		 4037 struct sigmatel_spec *spec = codec->spec;
4038
11b44bbd 4039 stac92xx_set_config_regs(codec);
dc81bed1 4040 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 4041 stac_gpio_set(codec, spec->gpio_mask,
4042 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 4043 snd_hda_codec_resume_amp(codec);
4044 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 4045 /* power down inactive DACs */
4046 if (spec->dac_list)
4047 stac92xx_power_down(codec);
dc81bed1
TI		 4048 /* invoke unsolicited event to reset the HP state */
4049 if (spec->hp_detect)
4050 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 4051 return 0;
4052}
4053#endif
4054
2f2f4251
M		 4055static struct hda_codec_ops stac92xx_patch_ops = {
4056 .build_controls = stac92xx_build_controls,
4057 .build_pcms = stac92xx_build_pcms,
4058 .init = stac92xx_init,
4059 .free = stac92xx_free,
4e55096e 4060 .unsol_event = stac92xx_unsol_event,
cb53c626 4061#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4062 .resume = stac92xx_resume,
4063#endif
2f2f4251
M		 4064};
4065
4066static int patch_stac9200(struct hda_codec *codec)
4067{
4068 struct sigmatel_spec *spec;
c7d4b2fa 4069 int err;
2f2f4251 4070
e560d8d8 4071 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4072 if (spec == NULL)
4073 return -ENOMEM;
4074
4075 codec->spec = spec;
a4eed138 4076 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4077 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4078 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4079 stac9200_models,
4080 stac9200_cfg_tbl);
11b44bbd
RF		 4081 if (spec->board_config < 0) {
4082 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4083 err = stac92xx_save_bios_config_regs(codec);
4084 if (err < 0) {
4085 stac92xx_free(codec);
4086 return err;
4087 }
4088 spec->pin_configs = spec->bios_pin_configs;
4089 } else {
403d1944
MP		 4090 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4091 stac92xx_set_config_regs(codec);
4092 }
2f2f4251
M		 4093
4094 spec->multiout.max_channels = 2;
4095 spec->multiout.num_dacs = 1;
4096 spec->multiout.dac_nids = stac9200_dac_nids;
4097 spec->adc_nids = stac9200_adc_nids;
4098 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4099 spec->num_muxes = 1;
8b65727b 4100 spec->num_dmics = 0;
9e05b7a3 4101 spec->num_adcs = 1;
a64135a2 4102 spec->num_pwrs = 0;
c7d4b2fa 4103
bf277785
TD		 4104 if (spec->board_config == STAC_9200_GATEWAY ||
4105 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4106 spec->init = stac9200_eapd_init;
4107 else
4108 spec->init = stac9200_core_init;
2f2f4251 4109 spec->mixer = stac9200_mixer;
c7d4b2fa 4110
117f257d
TI		 4111 if (spec->board_config == STAC_9200_PANASONIC) {
4112 spec->gpio_mask = spec->gpio_dir = 0x09;
4113 spec->gpio_data = 0x00;
4114 }
4115
c7d4b2fa
M		 4116 err = stac9200_parse_auto_config(codec);
4117 if (err < 0) {
4118 stac92xx_free(codec);
4119 return err;
4120 }
2f2f4251
M		 4121
4122 codec->patch_ops = stac92xx_patch_ops;
4123
4124 return 0;
4125}
4126
8e21c34c
TD		 4127static int patch_stac925x(struct hda_codec *codec)
4128{
4129 struct sigmatel_spec *spec;
4130 int err;
4131
4132 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4133 if (spec == NULL)
4134 return -ENOMEM;
4135
4136 codec->spec = spec;
a4eed138 4137 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4138 spec->pin_nids = stac925x_pin_nids;
4139 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4140 stac925x_models,
4141 stac925x_cfg_tbl);
9e507abd 4142 again:
8e21c34c 4143 if (spec->board_config < 0) {
2c11f955
TD		 4144 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4145 "using BIOS defaults\n");
8e21c34c
TD		 4146 err = stac92xx_save_bios_config_regs(codec);
4147 if (err < 0) {
4148 stac92xx_free(codec);
4149 return err;
4150 }
4151 spec->pin_configs = spec->bios_pin_configs;
4152 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4153 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4154 stac92xx_set_config_regs(codec);
4155 }
4156
4157 spec->multiout.max_channels = 2;
4158 spec->multiout.num_dacs = 1;
4159 spec->multiout.dac_nids = stac925x_dac_nids;
4160 spec->adc_nids = stac925x_adc_nids;
4161 spec->mux_nids = stac925x_mux_nids;
4162 spec->num_muxes = 1;
9e05b7a3 4163 spec->num_adcs = 1;
a64135a2 4164 spec->num_pwrs = 0;
2c11f955
TD		 4165 switch (codec->vendor_id) {
4166 case 0x83847632: /* STAC9202 */
4167 case 0x83847633: /* STAC9202D */
4168 case 0x83847636: /* STAC9251 */
4169 case 0x83847637: /* STAC9251D */
f6e9852a 4170 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4171 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4172 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4173 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4174 break;
4175 default:
4176 spec->num_dmics = 0;
4177 break;
4178 }
8e21c34c
TD		 4179
4180 spec->init = stac925x_core_init;
4181 spec->mixer = stac925x_mixer;
4182
4183 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4184 if (!err) {
4185 if (spec->board_config < 0) {
4186 printk(KERN_WARNING "hda_codec: No auto-config is "
4187 "available, default to model=ref\n");
4188 spec->board_config = STAC_925x_REF;
4189 goto again;
4190 }
4191 err = -EINVAL;
4192 }
8e21c34c
TD		 4193 if (err < 0) {
4194 stac92xx_free(codec);
4195 return err;
4196 }
4197
4198 codec->patch_ops = stac92xx_patch_ops;
4199
4200 return 0;
4201}
4202
e1f0d669
MR		 4203static struct hda_input_mux stac92hd73xx_dmux = {
4204 .num_items = 4,
4205 .items = {
4206 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4207 { "Digital Mic 1", 0x09 },
4208 { "Digital Mic 2", 0x0a },
2a9c7816 4209 { "CD", 0x08 },
e1f0d669
MR		 4210 }
4211};
4212
4213static int patch_stac92hd73xx(struct hda_codec *codec)
4214{
4215 struct sigmatel_spec *spec;
4216 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4217 int err = 0;
4218
4219 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4220 if (spec == NULL)
4221 return -ENOMEM;
4222
4223 codec->spec = spec;
e99d32b3 4224 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4225 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4226 spec->pin_nids = stac92hd73xx_pin_nids;
4227 spec->board_config = snd_hda_check_board_config(codec,
4228 STAC_92HD73XX_MODELS,
4229 stac92hd73xx_models,
4230 stac92hd73xx_cfg_tbl);
4231again:
4232 if (spec->board_config < 0) {
4233 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4234 " STAC92HD73XX, using BIOS defaults\n");
4235 err = stac92xx_save_bios_config_regs(codec);
4236 if (err < 0) {
4237 stac92xx_free(codec);
4238 return err;
4239 }
4240 spec->pin_configs = spec->bios_pin_configs;
4241 } else {
4242 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4243 stac92xx_set_config_regs(codec);
4244 }
4245
4246 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4247 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4248
4249 if (spec->multiout.num_dacs < 0) {
4250 printk(KERN_WARNING "hda_codec: Could not determine "
4251 "number of channels defaulting to DAC count\n");
4252 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4253 }
4254
4255 switch (spec->multiout.num_dacs) {
4256 case 0x3: /* 6 Channel */
4257 spec->mixer = stac92hd73xx_6ch_mixer;
4258 spec->init = stac92hd73xx_6ch_core_init;
4259 break;
4260 case 0x4: /* 8 Channel */
e1f0d669
MR		 4261 spec->mixer = stac92hd73xx_8ch_mixer;
4262 spec->init = stac92hd73xx_8ch_core_init;
4263 break;
4264 case 0x5: /* 10 Channel */
e1f0d669
MR		 4265 spec->mixer = stac92hd73xx_10ch_mixer;
4266 spec->init = stac92hd73xx_10ch_core_init;
4267 };
4268
4269 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4270 spec->aloopback_mask = 0x01;
4271 spec->aloopback_shift = 8;
4272
1cd2224c 4273 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4274 spec->mux_nids = stac92hd73xx_mux_nids;
4275 spec->adc_nids = stac92hd73xx_adc_nids;
4276 spec->dmic_nids = stac92hd73xx_dmic_nids;
4277 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4278 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4279 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4280 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4281
4282 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4283 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4284 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4285 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4286 sizeof(stac92hd73xx_dmux));
4287
a7662640 4288 switch (spec->board_config) {
6b3ab21e 4289 case STAC_DELL_EQ:
d654a660 4290 spec->init = dell_eq_core_init;
6b3ab21e 4291 /* fallthru */
661cd8fb
TI		 4292 case STAC_DELL_M6_AMIC:
4293 case STAC_DELL_M6_DMIC:
4294 case STAC_DELL_M6_BOTH:
2a9c7816 4295 spec->num_smuxes = 0;
2a9c7816
MR		 4296 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4297 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
0253fdcd 4298 spec->eapd_switch = 0;
2a9c7816 4299 spec->num_amps = 1;
6b3ab21e
MR		 4300
4301 if (!spec->init)
4302 spec->init = dell_m6_core_init;
661cd8fb
TI		 4303 switch (spec->board_config) {
4304 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4305 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4306 spec->num_dmics = 0;
2a9c7816 4307 spec->private_dimux.num_items = 1;
a7662640 4308 break;
661cd8fb 4309 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4310 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4311 spec->num_dmics = 1;
2a9c7816 4312 spec->private_dimux.num_items = 2;
a7662640 4313 break;
661cd8fb 4314 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4315 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4316 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4317 spec->num_dmics = 1;
2a9c7816 4318 spec->private_dimux.num_items = 2;
a7662640
MR		 4319 break;
4320 }
4321 break;
4322 default:
4323 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4324 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
0253fdcd 4325 spec->eapd_switch = 1;
a7662640 4326 }
b2c4f4d7
MR		 4327 if (spec->board_config > STAC_92HD73XX_REF) {
4328 /* GPIO0 High = Enable EAPD */
4329 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4330 spec->gpio_data = 0x01;
4331 }
2a9c7816 4332 spec->dinput_mux = &spec->private_dimux;
a7662640 4333
a64135a2
MR		 4334 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4335 spec->pwr_nids = stac92hd73xx_pwr_nids;
4336
d9737751 4337 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4338
4339 if (!err) {
4340 if (spec->board_config < 0) {
4341 printk(KERN_WARNING "hda_codec: No auto-config is "
4342 "available, default to model=ref\n");
4343 spec->board_config = STAC_92HD73XX_REF;
4344 goto again;
4345 }
4346 err = -EINVAL;
4347 }
4348
4349 if (err < 0) {
4350 stac92xx_free(codec);
4351 return err;
4352 }
4353
4354 codec->patch_ops = stac92xx_patch_ops;
4355
4356 return 0;
4357}
4358
d0513fc6
MR		 4359static struct hda_input_mux stac92hd83xxx_dmux = {
4360 .num_items = 3,
4361 .items = {
4362 { "Analog Inputs", 0x03 },
4363 { "Digital Mic 1", 0x04 },
4364 { "Digital Mic 2", 0x05 },
4365 }
4366};
4367
4368static int patch_stac92hd83xxx(struct hda_codec *codec)
4369{
4370 struct sigmatel_spec *spec;
4371 int err;
4372
4373 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4374 if (spec == NULL)
4375 return -ENOMEM;
4376
4377 codec->spec = spec;
0ffa9807 4378 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4379 spec->mono_nid = 0x19;
4380 spec->digbeep_nid = 0x21;
4381 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4382 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4383 spec->adc_nids = stac92hd83xxx_adc_nids;
4384 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4385 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4386 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4387 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4388
4389 spec->init = stac92hd83xxx_core_init;
4390 switch (codec->vendor_id) {
4391 case 0x111d7605:
4392 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4393 break;
4394 default:
4395 spec->num_pwrs--;
4396 spec->init++; /* switch to config #2 */
4397 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4398 }
4399
4400 spec->mixer = stac92hd83xxx_mixer;
4401 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4402 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4403 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4404 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4405 spec->dinput_mux = &stac92hd83xxx_dmux;
4406 spec->pin_nids = stac92hd83xxx_pin_nids;
4407 spec->board_config = snd_hda_check_board_config(codec,
4408 STAC_92HD83XXX_MODELS,
4409 stac92hd83xxx_models,
4410 stac92hd83xxx_cfg_tbl);
4411again:
4412 if (spec->board_config < 0) {
4413 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4414 " STAC92HD83XXX, using BIOS defaults\n");
4415 err = stac92xx_save_bios_config_regs(codec);
4416 if (err < 0) {
4417 stac92xx_free(codec);
4418 return err;
4419 }
4420 spec->pin_configs = spec->bios_pin_configs;
4421 } else {
4422 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4423 stac92xx_set_config_regs(codec);
4424 }
4425
4426 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4427 if (!err) {
4428 if (spec->board_config < 0) {
4429 printk(KERN_WARNING "hda_codec: No auto-config is "
4430 "available, default to model=ref\n");
4431 spec->board_config = STAC_92HD83XXX_REF;
4432 goto again;
4433 }
4434 err = -EINVAL;
4435 }
4436
4437 if (err < 0) {
4438 stac92xx_free(codec);
4439 return err;
4440 }
4441
4442 codec->patch_ops = stac92xx_patch_ops;
4443
4444 return 0;
4445}
4446
8daaaa97
MR		 4447#ifdef SND_HDA_NEEDS_RESUME
4448static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4449{
4450 struct sigmatel_spec *spec = codec->spec;
4451 int i;
4452 snd_hda_codec_write_cache(codec, codec->afg, 0,
4453 AC_VERB_SET_POWER_STATE, pwr);
4454
4455 msleep(1);
4456 for (i = 0; i < spec->num_adcs; i++) {
4457 snd_hda_codec_write_cache(codec,
4458 spec->adc_nids[i], 0,
4459 AC_VERB_SET_POWER_STATE, pwr);
4460 }
4461};
4462
4463static int stac92hd71xx_resume(struct hda_codec *codec)
4464{
4465 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4466 return stac92xx_resume(codec);
4467}
4468
4469static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4470{
0253fdcd
MR		 4471 struct sigmatel_spec *spec = codec->spec;
4472
8daaaa97 4473 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
0253fdcd
MR		 4474 if (spec->eapd_mask)
4475 stac_gpio_set(codec, spec->gpio_mask,
4476 spec->gpio_dir, spec->gpio_data &
4477 ~spec->eapd_mask);
8daaaa97
MR		 4478 return 0;
4479};
4480
4481#endif
4482
4483static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4484 .build_controls = stac92xx_build_controls,
4485 .build_pcms = stac92xx_build_pcms,
4486 .init = stac92xx_init,
4487 .free = stac92xx_free,
4488 .unsol_event = stac92xx_unsol_event,
4489#ifdef SND_HDA_NEEDS_RESUME
4490 .resume = stac92hd71xx_resume,
4491 .suspend = stac92hd71xx_suspend,
4492#endif
4493};
d0513fc6 4494
4b33c767
MR		 4495static struct hda_input_mux stac92hd71bxx_dmux = {
4496 .num_items = 4,
4497 .items = {
4498 { "Analog Inputs", 0x00 },
4499 { "Mixer", 0x01 },
4500 { "Digital Mic 1", 0x02 },
4501 { "Digital Mic 2", 0x03 },
4502 }
4503};
4504
e035b841
MR		 4505static int patch_stac92hd71bxx(struct hda_codec *codec)
4506{
4507 struct sigmatel_spec *spec;
4508 int err = 0;
4509
4510 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4511 if (spec == NULL)
4512 return -ENOMEM;
4513
4514 codec->spec = spec;
8daaaa97 4515 codec->patch_ops = stac92xx_patch_ops;
e035b841 4516 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4517 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4518 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4519 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4520 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4521 spec->board_config = snd_hda_check_board_config(codec,
4522 STAC_92HD71BXX_MODELS,
4523 stac92hd71bxx_models,
4524 stac92hd71bxx_cfg_tbl);
4525again:
4526 if (spec->board_config < 0) {
4527 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4528 " STAC92HD71BXX, using BIOS defaults\n");
4529 err = stac92xx_save_bios_config_regs(codec);
4530 if (err < 0) {
4531 stac92xx_free(codec);
4532 return err;
4533 }
4534 spec->pin_configs = spec->bios_pin_configs;
4535 } else {
4536 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4537 stac92xx_set_config_regs(codec);
4538 }
4539
41c3b648
TI		 4540 if (spec->board_config > STAC_92HD71BXX_REF) {
4541 /* GPIO0 = EAPD */
4542 spec->gpio_mask = 0x01;
4543 spec->gpio_dir = 0x01;
4544 spec->gpio_data = 0x01;
4545 }
4546
541eee87
MR		 4547 switch (codec->vendor_id) {
4548 case 0x111d76b6: /* 4 Port without Analog Mixer */
4549 case 0x111d76b7:
4550 case 0x111d76b4: /* 6 Port without Analog Mixer */
4551 case 0x111d76b5:
4552 spec->mixer = stac92hd71bxx_mixer;
4553 spec->init = stac92hd71bxx_core_init;
0ffa9807 4554 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4555 break;
aafc4412 4556 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4557 switch (spec->board_config) {
4558 case STAC_HP_M4:
72474be6 4559 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4560 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4561 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4562 snd_hda_codec_write_cache(codec, codec->afg, 0,
4563 AC_VERB_SET_UNSOLICITED_ENABLE,
4564 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4565 spec->gpio_mask |= 0x02;
4566 break;
4567 }
8daaaa97
MR		 4568 if ((codec->revision_id & 0xf) == 0 ||
4569 (codec->revision_id & 0xf) == 1) {
4570#ifdef SND_HDA_NEEDS_RESUME
4571 codec->patch_ops = stac92hd71bxx_patch_ops;
4572#endif
4573 spec->stream_delay = 40; /* 40 milliseconds */
4574 }
4575
aafc4412
MR		 4576 /* no output amps */
4577 spec->num_pwrs = 0;
4578 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4579 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4580
4581 /* disable VSW */
4582 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4583 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4584 break;
4585 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4586 if ((codec->revision_id & 0xf) == 1) {
4587#ifdef SND_HDA_NEEDS_RESUME
4588 codec->patch_ops = stac92hd71bxx_patch_ops;
4589#endif
4590 spec->stream_delay = 40; /* 40 milliseconds */
4591 }
4592
aafc4412
MR		 4593 /* no output amps */
4594 spec->num_pwrs = 0;
4595 /* fallthru */
541eee87 4596 default:
4b33c767 4597 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4598 spec->mixer = stac92hd71bxx_analog_mixer;
4599 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4600 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4601 }
4602
4b33c767 4603 spec->aloopback_mask = 0x50;
541eee87
MR		 4604 spec->aloopback_shift = 0;
4605
8daaaa97 4606 spec->powerdown_adcs = 1;
1cd2224c 4607 spec->digbeep_nid = 0x26;
e035b841
MR		 4608 spec->mux_nids = stac92hd71bxx_mux_nids;
4609 spec->adc_nids = stac92hd71bxx_adc_nids;
4610 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4611 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4612 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4613 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4614
4615 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4616 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4617
6a14f585
MR		 4618 switch (spec->board_config) {
4619 case STAC_HP_M4:
6a14f585 4620 /* enable internal microphone */
b9aea715
MR		 4621 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4622 stac92xx_auto_set_pinctl(codec, 0x0e,
4623 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4624 /* fallthru */
4625 case STAC_DELL_M4_2:
4626 spec->num_dmics = 0;
4627 spec->num_smuxes = 0;
4628 spec->num_dmuxes = 0;
4629 break;
4630 case STAC_DELL_M4_1:
4631 case STAC_DELL_M4_3:
4632 spec->num_dmics = 1;
4633 spec->num_smuxes = 0;
4634 spec->num_dmuxes = 0;
6a14f585
MR		 4635 break;
4636 default:
4637 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4638 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4639 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4640 };
4641
aea7bb0a 4642 spec->multiout.num_dacs = 1;
e035b841
MR		 4643 spec->multiout.hp_nid = 0x11;
4644 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4645 if (spec->dinput_mux)
4646 spec->private_dimux.num_items +=
4647 spec->num_dmics -
4648 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4649
4650 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4651 if (!err) {
4652 if (spec->board_config < 0) {
4653 printk(KERN_WARNING "hda_codec: No auto-config is "
4654 "available, default to model=ref\n");
4655 spec->board_config = STAC_92HD71BXX_REF;
4656 goto again;
4657 }
4658 err = -EINVAL;
4659 }
4660
4661 if (err < 0) {
4662 stac92xx_free(codec);
4663 return err;
4664 }
4665
e035b841
MR		 4666 return 0;
4667};
4668
2f2f4251
M		 4669static int patch_stac922x(struct hda_codec *codec)
4670{
4671 struct sigmatel_spec *spec;
c7d4b2fa 4672 int err;
2f2f4251 4673
e560d8d8 4674 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4675 if (spec == NULL)
4676 return -ENOMEM;
4677
4678 codec->spec = spec;
a4eed138 4679 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4680 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4681 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4682 stac922x_models,
4683 stac922x_cfg_tbl);
536319af 4684 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4685 spec->gpio_mask = spec->gpio_dir = 0x03;
4686 spec->gpio_data = 0x03;
3fc24d85
TI		 4687 /* Intel Macs have all same PCI SSID, so we need to check
4688 * codec SSID to distinguish the exact models
4689 */
6f0778d8 4690 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4691 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4692
4693 case 0x106b0800:
4694 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4695 break;
5d5d3bc3
IZ		 4696 case 0x106b0600:
4697 case 0x106b0700:
4698 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4699 break;
5d5d3bc3
IZ		 4700 case 0x106b0e00:
4701 case 0x106b0f00:
4702 case 0x106b1600:
4703 case 0x106b1700:
4704 case 0x106b0200:
4705 case 0x106b1e00:
4706 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4707 break;
5d5d3bc3
IZ		 4708 case 0x106b1a00:
4709 case 0x00000100:
4710 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4711 break;
5d5d3bc3
IZ		 4712 case 0x106b0a00:
4713 case 0x106b2200:
4714 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4715 break;
536319af
NB		 4716 default:
4717 spec->board_config = STAC_INTEL_MAC_V3;
4718 break;
3fc24d85
TI		 4719 }
4720 }
4721
9e507abd 4722 again:
11b44bbd
RF		 4723 if (spec->board_config < 0) {
4724 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4725 "using BIOS defaults\n");
4726 err = stac92xx_save_bios_config_regs(codec);
4727 if (err < 0) {
4728 stac92xx_free(codec);
4729 return err;
4730 }
4731 spec->pin_configs = spec->bios_pin_configs;
4732 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4733 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4734 stac92xx_set_config_regs(codec);
4735 }
2f2f4251 4736
c7d4b2fa
M		 4737 spec->adc_nids = stac922x_adc_nids;
4738 spec->mux_nids = stac922x_mux_nids;
2549413e 4739 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4740 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4741 spec->num_dmics = 0;
a64135a2 4742 spec->num_pwrs = 0;
c7d4b2fa
M		 4743
4744 spec->init = stac922x_core_init;
2f2f4251 4745 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4746
4747 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4748
3cc08dc6 4749 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4750 if (!err) {
4751 if (spec->board_config < 0) {
4752 printk(KERN_WARNING "hda_codec: No auto-config is "
4753 "available, default to model=ref\n");
4754 spec->board_config = STAC_D945_REF;
4755 goto again;
4756 }
4757 err = -EINVAL;
4758 }
3cc08dc6
MP		 4759 if (err < 0) {
4760 stac92xx_free(codec);
4761 return err;
4762 }
4763
4764 codec->patch_ops = stac92xx_patch_ops;
4765
807a4636
TI		 4766 /* Fix Mux capture level; max to 2 */
4767 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4768 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4769 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4770 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4771 (0 << AC_AMPCAP_MUTE_SHIFT));
4772
3cc08dc6
MP		 4773 return 0;
4774}
4775
4776static int patch_stac927x(struct hda_codec *codec)
4777{
4778 struct sigmatel_spec *spec;
4779 int err;
4780
4781 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4782 if (spec == NULL)
4783 return -ENOMEM;
4784
4785 codec->spec = spec;
a4eed138 4786 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4787 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4788 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4789 stac927x_models,
4790 stac927x_cfg_tbl);
9e507abd 4791 again:
8e9068b1
MR		 4792 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4793 if (spec->board_config < 0)
4794 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4795 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4796 err = stac92xx_save_bios_config_regs(codec);
4797 if (err < 0) {
4798 stac92xx_free(codec);
4799 return err;
4800 }
4801 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4802 } else {
3cc08dc6
MP		 4803 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4804 stac92xx_set_config_regs(codec);
4805 }
4806
1cd2224c 4807 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4808 spec->adc_nids = stac927x_adc_nids;
4809 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4810 spec->mux_nids = stac927x_mux_nids;
4811 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4812 spec->smux_nids = stac927x_smux_nids;
4813 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4814 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4815 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4816 spec->multiout.dac_nids = spec->dac_nids;
4817
81d3dbde 4818 switch (spec->board_config) {
93ed1503 4819 case STAC_D965_3ST:
93ed1503 4820 case STAC_D965_5ST:
8e9068b1 4821 /* GPIO0 High = Enable EAPD */
0fc9dec4 4822 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4823 spec->gpio_data = 0x01;
8e9068b1
MR		 4824 spec->num_dmics = 0;
4825
93ed1503 4826 spec->init = d965_core_init;
9e05b7a3 4827 spec->mixer = stac927x_mixer;
81d3dbde 4828 break;
8e9068b1 4829 case STAC_DELL_BIOS:
780c8be4
MR		 4830 switch (codec->subsystem_id) {
4831 case 0x10280209:
4832 case 0x1028022e:
4833 /* correct the device field to SPDIF out */
4834 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4835 break;
4836 };
03d7ca17
MR		 4837 /* configure the analog microphone on some laptops */
4838 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4839 /* correct the front output jack as a hp out */
7989fba9 4840 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4841 /* correct the front input jack as a mic */
4842 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4843 /* fallthru */
8e9068b1
MR		 4844 case STAC_DELL_3ST:
4845 /* GPIO2 High = Enable EAPD */
0fc9dec4 4846 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4847 spec->gpio_data = 0x04;
7f16859a
MR		 4848 spec->dmic_nids = stac927x_dmic_nids;
4849 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4850
8e9068b1
MR		 4851 spec->init = d965_core_init;
4852 spec->mixer = stac927x_mixer;
4853 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4854 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4855 break;
4856 default:
b2c4f4d7
MR		 4857 if (spec->board_config > STAC_D965_REF) {
4858 /* GPIO0 High = Enable EAPD */
4859 spec->eapd_mask = spec->gpio_mask = 0x01;
4860 spec->gpio_dir = spec->gpio_data = 0x01;
4861 }
8e9068b1
MR		 4862 spec->num_dmics = 0;
4863
4864 spec->init = stac927x_core_init;
4865 spec->mixer = stac927x_mixer;
7f16859a
MR		 4866 }
4867
a64135a2 4868 spec->num_pwrs = 0;
e1f0d669
MR		 4869 spec->aloopback_mask = 0x40;
4870 spec->aloopback_shift = 0;
0253fdcd 4871 spec->eapd_switch = 1;
8e9068b1 4872
3cc08dc6 4873 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4874 if (!err) {
4875 if (spec->board_config < 0) {
4876 printk(KERN_WARNING "hda_codec: No auto-config is "
4877 "available, default to model=ref\n");
4878 spec->board_config = STAC_D965_REF;
4879 goto again;
4880 }
4881 err = -EINVAL;
4882 }
c7d4b2fa
M		 4883 if (err < 0) {
4884 stac92xx_free(codec);
4885 return err;
4886 }
2f2f4251
M		 4887
4888 codec->patch_ops = stac92xx_patch_ops;
4889
52987656
TI		 4890 /*
4891 * !!FIXME!!
4892 * The STAC927x seem to require fairly long delays for certain
4893 * command sequences. With too short delays (even if the answer
4894 * is set to RIRB properly), it results in the silence output
4895 * on some hardwares like Dell.
4896 *
4897 * The below flag enables the longer delay (see get_response
4898 * in hda_intel.c).
4899 */
4900 codec->bus->needs_damn_long_delay = 1;
4901
2f2f4251
M		 4902 return 0;
4903}
4904
f3302a59
MP		 4905static int patch_stac9205(struct hda_codec *codec)
4906{
4907 struct sigmatel_spec *spec;
8259980e 4908 int err;
f3302a59
MP		 4909
4910 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4911 if (spec == NULL)
4912 return -ENOMEM;
4913
4914 codec->spec = spec;
a4eed138 4915 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4916 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4917 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4918 stac9205_models,
4919 stac9205_cfg_tbl);
9e507abd 4920 again:
11b44bbd
RF		 4921 if (spec->board_config < 0) {
4922 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4923 err = stac92xx_save_bios_config_regs(codec);
4924 if (err < 0) {
4925 stac92xx_free(codec);
4926 return err;
4927 }
4928 spec->pin_configs = spec->bios_pin_configs;
4929 } else {
f3302a59
MP		 4930 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4931 stac92xx_set_config_regs(codec);
4932 }
4933
1cd2224c 4934 spec->digbeep_nid = 0x23;
f3302a59 4935 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4936 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4937 spec->mux_nids = stac9205_mux_nids;
2549413e 4938 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4939 spec->smux_nids = stac9205_smux_nids;
4940 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4941 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4942 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4943 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4944 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4945 spec->num_pwrs = 0;
f3302a59
MP		 4946
4947 spec->init = stac9205_core_init;
4948 spec->mixer = stac9205_mixer;
4949
e1f0d669
MR		 4950 spec->aloopback_mask = 0x40;
4951 spec->aloopback_shift = 0;
0253fdcd 4952 spec->eapd_switch = 1;
f3302a59 4953 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4954
ae0a8ed8 4955 switch (spec->board_config){
ae0a8ed8 4956 case STAC_9205_DELL_M43:
87d48363
MR		 4957 /* Enable SPDIF in/out */
4958 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4959 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4960
4fe5195c 4961 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 4962 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 4963 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4964 snd_hda_codec_write_cache(codec, codec->afg, 0,
4965 AC_VERB_SET_UNSOLICITED_ENABLE,
4966 (AC_USRSP_EN | STAC_HP_EVENT));
4967
4968 spec->gpio_dir = 0x0b;
0fc9dec4 4969 spec->eapd_mask = 0x01;
4fe5195c
MR		 4970 spec->gpio_mask = 0x1b;
4971 spec->gpio_mute = 0x10;
e2e7d624 4972 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4973 * GPIO3 Low = DRM
87d48363 4974 */
4fe5195c 4975 spec->gpio_data = 0x01;
ae0a8ed8 4976 break;
b2c4f4d7
MR		 4977 case STAC_9205_REF:
4978 /* SPDIF-In enabled */
4979 break;
ae0a8ed8
TD		 4980 default:
4981 /* GPIO0 High = EAPD */
0fc9dec4 4982 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4983 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4984 break;
4985 }
33382403 4986
f3302a59 4987 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4988 if (!err) {
4989 if (spec->board_config < 0) {
4990 printk(KERN_WARNING "hda_codec: No auto-config is "
4991 "available, default to model=ref\n");
4992 spec->board_config = STAC_9205_REF;
4993 goto again;
4994 }
4995 err = -EINVAL;
4996 }
f3302a59
MP		 4997 if (err < 0) {
4998 stac92xx_free(codec);
4999 return err;
5000 }
5001
5002 codec->patch_ops = stac92xx_patch_ops;
5003
5004 return 0;
5005}
5006
db064e50 5007/*
6d859065 5008 * STAC9872 hack
db064e50
TI		 5009 */
5010
99ccc560 5011/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5012static hda_nid_t vaio_dacs[] = { 0x2 };
5013#define VAIO_HP_DAC 0x5
5014static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5015static hda_nid_t vaio_mux_nids[] = { 0x15 };
5016
5017static struct hda_input_mux vaio_mux = {
a3a2f429 5018 .num_items = 3,
db064e50 5019 .items = {
d773781c 5020 /* { "HP", 0x0 }, */
1624cb9a
TI		 5021 { "Mic Jack", 0x1 },
5022 { "Internal Mic", 0x2 },
db064e50
TI		 5023 { "PCM", 0x3 },
5024 }
5025};
5026
5027static struct hda_verb vaio_init[] = {
5028 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5029 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5030 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5031 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5032 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5033 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5034 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5035 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5036 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5037 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5038 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5039 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5040 {}
5041};
5042
6d859065
GM		 5043static struct hda_verb vaio_ar_init[] = {
5044 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5045 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5046 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5047 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5048/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5049 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5050 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5051 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5052 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5053/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5054 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5055 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5056 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5057 {}
5058};
5059
db064e50 5060/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5061static struct hda_bind_ctls vaio_bind_master_vol = {
5062 .ops = &snd_hda_bind_vol,
5063 .values = {
5064 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5065 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5066 0
5067 },
5068};
db064e50
TI		 5069
5070/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5071static struct hda_bind_ctls vaio_bind_master_sw = {
5072 .ops = &snd_hda_bind_sw,
5073 .values = {
5074 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5075 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5076 0,
5077 },
5078};
db064e50
TI		 5079
5080static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5081 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5082 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5083 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5084 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5085 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5086 {
5087 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5088 .name = "Capture Source",
5089 .count = 1,
5090 .info = stac92xx_mux_enum_info,
5091 .get = stac92xx_mux_enum_get,
5092 .put = stac92xx_mux_enum_put,
5093 },
5094 {}
5095};
5096
6d859065 5097static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5098 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5099 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5100 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5101 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5102 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5103 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5104 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5105 {
5106 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5107 .name = "Capture Source",
5108 .count = 1,
5109 .info = stac92xx_mux_enum_info,
5110 .get = stac92xx_mux_enum_get,
5111 .put = stac92xx_mux_enum_put,
5112 },
5113 {}
5114};
5115
5116static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5117 .build_controls = stac92xx_build_controls,
5118 .build_pcms = stac92xx_build_pcms,
5119 .init = stac92xx_init,
5120 .free = stac92xx_free,
cb53c626 5121#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5122 .resume = stac92xx_resume,
5123#endif
5124};
5125
72e7b0dd
TI		 5126static int stac9872_vaio_init(struct hda_codec *codec)
5127{
5128 int err;
5129
5130 err = stac92xx_init(codec);
5131 if (err < 0)
5132 return err;
5133 if (codec->patch_ops.unsol_event)
5134 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5135 return 0;
5136}
5137
5138static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5139{
40c1d308 5140 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5141 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5142 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5143 } else {
5144 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5145 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5146 }
5147}
5148
5149static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5150{
5151 switch (res >> 26) {
5152 case STAC_HP_EVENT:
5153 stac9872_vaio_hp_detect(codec, res);
5154 break;
5155 }
5156}
5157
5158static struct hda_codec_ops stac9872_vaio_patch_ops = {
5159 .build_controls = stac92xx_build_controls,
5160 .build_pcms = stac92xx_build_pcms,
5161 .init = stac9872_vaio_init,
5162 .free = stac92xx_free,
5163 .unsol_event = stac9872_vaio_unsol_event,
5164#ifdef CONFIG_PM
5165 .resume = stac92xx_resume,
5166#endif
5167};
5168
6d859065
GM		 5169enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5170 CXD9872RD_VAIO,
5171 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5172 STAC9872AK_VAIO,
5173 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5174 STAC9872K_VAIO,
5175 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5176 CXD9872AKD_VAIO,
5177 STAC_9872_MODELS,
5178};
5179
5180static const char *stac9872_models[STAC_9872_MODELS] = {
5181 [CXD9872RD_VAIO] = "vaio",
5182 [CXD9872AKD_VAIO] = "vaio-ar",
5183};
5184
5185static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5186 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5187 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5188 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5189 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5190 {}
5191};
5192
6d859065 5193static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5194{
5195 struct sigmatel_spec *spec;
5196 int board_config;
5197
f5fcc13c
TI		 5198 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5199 stac9872_models,
5200 stac9872_cfg_tbl);
db064e50
TI		 5201 if (board_config < 0)
5202 /* unknown config, let generic-parser do its job... */
5203 return snd_hda_parse_generic_codec(codec);
5204
5205 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5206 if (spec == NULL)
5207 return -ENOMEM;
5208
5209 codec->spec = spec;
5210 switch (board_config) {
6d859065
GM		 5211 case CXD9872RD_VAIO:
5212 case STAC9872AK_VAIO:
5213 case STAC9872K_VAIO:
db064e50
TI		 5214 spec->mixer = vaio_mixer;
5215 spec->init = vaio_init;
5216 spec->multiout.max_channels = 2;
5217 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5218 spec->multiout.dac_nids = vaio_dacs;
5219 spec->multiout.hp_nid = VAIO_HP_DAC;
5220 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5221 spec->adc_nids = vaio_adcs;
a64135a2 5222 spec->num_pwrs = 0;
db064e50
TI		 5223 spec->input_mux = &vaio_mux;
5224 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5225 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5226 break;
6d859065
GM		 5227
5228 case CXD9872AKD_VAIO:
5229 spec->mixer = vaio_ar_mixer;
5230 spec->init = vaio_ar_init;
5231 spec->multiout.max_channels = 2;
5232 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5233 spec->multiout.dac_nids = vaio_dacs;
5234 spec->multiout.hp_nid = VAIO_HP_DAC;
5235 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5236 spec->num_pwrs = 0;
6d859065
GM		 5237 spec->adc_nids = vaio_adcs;
5238 spec->input_mux = &vaio_mux;
5239 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5240 codec->patch_ops = stac9872_patch_ops;
6d859065 5241 break;
db064e50
TI		 5242 }
5243
db064e50
TI		 5244 return 0;
5245}
5246
5247
2f2f4251
M		 5248/*
5249 * patch entries
5250 */
5251struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5252 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5253 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5254 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5255 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5256 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5257 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5258 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5259 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5260 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5261 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5262 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5263 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5264 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5265 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5266 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5267 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5268 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5269 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5270 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5271 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5272 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5273 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5274 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5275 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5276 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5277 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5278 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5279 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5280 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5281 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5282 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5283 /* The following does not take into account .id=0x83847661 when subsys =
5284 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5285 * currently not fully supported.
5286 */
5287 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5288 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5289 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5290 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5291 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5292 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5293 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5294 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5295 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5296 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5297 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5298 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5299 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5300 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5301 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5302 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5303 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5304 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5305 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5306 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5307 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5308 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5309 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5310 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5311 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5312 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5313 {} /* terminator */
5314};
Clone of davem's net-next-2.6 tree