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ALSA: hda - Add missing static for snd_hda_eld_proc_new() inline funciton
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
3c9a3203 36#include "hda_patch.h"
1cd2224c 37#include "hda_beep.h"
2f2f4251 38
c39555d6 39#define STAC_VREF_EVENT 0x00
74aeaabc 40#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 41#define STAC_PWR_EVENT 0x20
42#define STAC_HP_EVENT 0x30
4e55096e 43
f5fcc13c
TI		 44enum {
45 STAC_REF,
bf277785 46 STAC_9200_OQO,
dfe495d0
TI		 47 STAC_9200_DELL_D21,
48 STAC_9200_DELL_D22,
49 STAC_9200_DELL_D23,
50 STAC_9200_DELL_M21,
51 STAC_9200_DELL_M22,
52 STAC_9200_DELL_M23,
53 STAC_9200_DELL_M24,
54 STAC_9200_DELL_M25,
55 STAC_9200_DELL_M26,
56 STAC_9200_DELL_M27,
1194b5b7 57 STAC_9200_GATEWAY,
117f257d 58 STAC_9200_PANASONIC,
f5fcc13c
TI		 59 STAC_9200_MODELS
60};
61
62enum {
63 STAC_9205_REF,
dfe495d0 64 STAC_9205_DELL_M42,
ae0a8ed8
TD		 65 STAC_9205_DELL_M43,
66 STAC_9205_DELL_M44,
f5fcc13c
TI		 67 STAC_9205_MODELS
68};
69
e1f0d669
MR		 70enum {
71 STAC_92HD73XX_REF,
a7662640 72 STAC_DELL_M6,
6b3ab21e 73 STAC_DELL_EQ,
e1f0d669
MR		 74 STAC_92HD73XX_MODELS
75};
76
d0513fc6
MR		 77enum {
78 STAC_92HD83XXX_REF,
79 STAC_92HD83XXX_MODELS
80};
81
e035b841
MR		 82enum {
83 STAC_92HD71BXX_REF,
a7662640
MR		 84 STAC_DELL_M4_1,
85 STAC_DELL_M4_2,
3a7abfd2 86 STAC_DELL_M4_3,
6a14f585 87 STAC_HP_M4,
e035b841
MR		 88 STAC_92HD71BXX_MODELS
89};
90
8e21c34c
TD		 91enum {
92 STAC_925x_REF,
93 STAC_M2_2,
94 STAC_MA6,
2c11f955 95 STAC_PA6,
8e21c34c
TD		 96 STAC_925x_MODELS
97};
98
f5fcc13c
TI		 99enum {
100 STAC_D945_REF,
101 STAC_D945GTP3,
102 STAC_D945GTP5,
5d5d3bc3
IZ		 103 STAC_INTEL_MAC_V1,
104 STAC_INTEL_MAC_V2,
105 STAC_INTEL_MAC_V3,
106 STAC_INTEL_MAC_V4,
107 STAC_INTEL_MAC_V5,
536319af
NB		 108 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
109 * is given, one of the above models will be
110 * chosen according to the subsystem id. */
dfe495d0 111 /* for backward compatibility */
f5fcc13c 112 STAC_MACMINI,
3fc24d85 113 STAC_MACBOOK,
6f0778d8
NB		 114 STAC_MACBOOK_PRO_V1,
115 STAC_MACBOOK_PRO_V2,
f16928fb 116 STAC_IMAC_INTEL,
0dae0f83 117 STAC_IMAC_INTEL_20,
8c650087 118 STAC_ECS_202,
dfe495d0
TI		 119 STAC_922X_DELL_D81,
120 STAC_922X_DELL_D82,
121 STAC_922X_DELL_M81,
122 STAC_922X_DELL_M82,
f5fcc13c
TI		 123 STAC_922X_MODELS
124};
125
126enum {
127 STAC_D965_REF,
128 STAC_D965_3ST,
129 STAC_D965_5ST,
4ff076e5 130 STAC_DELL_3ST,
8e9068b1 131 STAC_DELL_BIOS,
f5fcc13c
TI		 132 STAC_927X_MODELS
133};
403d1944 134
74aeaabc
MR		 135struct sigmatel_event {
136 hda_nid_t nid;
137 int data;
138};
139
140struct sigmatel_jack {
141 hda_nid_t nid;
142 int type;
143 struct snd_jack *jack;
144};
145
2f2f4251 146struct sigmatel_spec {
c8b6bf9b 147 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 148 unsigned int num_mixers;
149
403d1944 150 int board_config;
c0cea0d0 151 unsigned int eapd_switch: 1;
c7d4b2fa 152 unsigned int surr_switch: 1;
403d1944
MP		 153 unsigned int line_switch: 1;
154 unsigned int mic_switch: 1;
3cc08dc6 155 unsigned int alt_switch: 1;
82bc955f 156 unsigned int hp_detect: 1;
00ef50c2 157 unsigned int spdif_mute: 1;
c7d4b2fa 158
4fe5195c 159 /* gpio lines */
0fc9dec4 160 unsigned int eapd_mask;
4fe5195c
MR		 161 unsigned int gpio_mask;
162 unsigned int gpio_dir;
163 unsigned int gpio_data;
164 unsigned int gpio_mute;
165
8daaaa97
MR		 166 /* stream */
167 unsigned int stream_delay;
168
4fe5195c 169 /* analog loopback */
e1f0d669
MR		 170 unsigned char aloopback_mask;
171 unsigned char aloopback_shift;
8259980e 172
a64135a2
MR		 173 /* power management */
174 unsigned int num_pwrs;
d0513fc6 175 unsigned int *pwr_mapping;
a64135a2 176 hda_nid_t *pwr_nids;
b76c850f 177 hda_nid_t *dac_list;
a64135a2 178
74aeaabc
MR		 179 /* jack detection */
180 struct snd_array jacks;
181
182 /* events */
183 struct snd_array events;
184
2f2f4251 185 /* playback */
b22b4821 186 struct hda_input_mux *mono_mux;
89385035 187 struct hda_input_mux *amp_mux;
b22b4821 188 unsigned int cur_mmux;
2f2f4251 189 struct hda_multi_out multiout;
3cc08dc6 190 hda_nid_t dac_nids[5];
2f2f4251
M		 191
192 /* capture */
193 hda_nid_t *adc_nids;
2f2f4251 194 unsigned int num_adcs;
dabbed6f
M		 195 hda_nid_t *mux_nids;
196 unsigned int num_muxes;
8b65727b
MP		 197 hda_nid_t *dmic_nids;
198 unsigned int num_dmics;
e1f0d669 199 hda_nid_t *dmux_nids;
1697055e 200 unsigned int num_dmuxes;
d9737751
MR		 201 hda_nid_t *smux_nids;
202 unsigned int num_smuxes;
65973632 203 const char **spdif_labels;
d9737751 204
dabbed6f 205 hda_nid_t dig_in_nid;
b22b4821 206 hda_nid_t mono_nid;
1cd2224c
MR		 207 hda_nid_t anabeep_nid;
208 hda_nid_t digbeep_nid;
2f2f4251 209
2f2f4251
M		 210 /* pin widgets */
211 hda_nid_t *pin_nids;
212 unsigned int num_pins;
2f2f4251 213 unsigned int *pin_configs;
2f2f4251
M		 214
215 /* codec specific stuff */
216 struct hda_verb *init;
c8b6bf9b 217 struct snd_kcontrol_new *mixer;
2f2f4251
M		 218
219 /* capture source */
8b65727b 220 struct hda_input_mux *dinput_mux;
e1f0d669 221 unsigned int cur_dmux[2];
c7d4b2fa 222 struct hda_input_mux *input_mux;
3cc08dc6 223 unsigned int cur_mux[3];
d9737751
MR		 224 struct hda_input_mux *sinput_mux;
225 unsigned int cur_smux[2];
2a9c7816
MR		 226 unsigned int cur_amux;
227 hda_nid_t *amp_nids;
228 unsigned int num_amps;
8daaaa97 229 unsigned int powerdown_adcs;
2f2f4251 230
403d1944
MP		 231 /* i/o switches */
232 unsigned int io_switch[2];
0fb87bb4 233 unsigned int clfe_swap;
d7a89436 234 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 235 unsigned int aloopback;
2f2f4251 236
c7d4b2fa
M		 237 struct hda_pcm pcm_rec[2]; /* PCM information */
238
239 /* dynamic controls and input_mux */
240 struct auto_pin_cfg autocfg;
603c4019 241 struct snd_array kctls;
8b65727b 242 struct hda_input_mux private_dimux;
c7d4b2fa 243 struct hda_input_mux private_imux;
d9737751 244 struct hda_input_mux private_smux;
89385035 245 struct hda_input_mux private_amp_mux;
b22b4821 246 struct hda_input_mux private_mono_mux;
2f2f4251
M		 247};
248
249static hda_nid_t stac9200_adc_nids[1] = {
250 0x03,
251};
252
253static hda_nid_t stac9200_mux_nids[1] = {
254 0x0c,
255};
256
257static hda_nid_t stac9200_dac_nids[1] = {
258 0x02,
259};
260
a64135a2
MR		 261static hda_nid_t stac92hd73xx_pwr_nids[8] = {
262 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
263 0x0f, 0x10, 0x11
264};
265
0ffa9807
MR		 266static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
267 0x26, 0,
268};
269
e1f0d669
MR		 270static hda_nid_t stac92hd73xx_adc_nids[2] = {
271 0x1a, 0x1b
272};
273
2a9c7816
MR		 274#define DELL_M6_AMP 2
275static hda_nid_t stac92hd73xx_amp_nids[3] = {
276 0x0b, 0x0c, 0x0e
89385035
MR		 277};
278
e1f0d669
MR		 279#define STAC92HD73XX_NUM_DMICS 2
280static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
281 0x13, 0x14, 0
282};
283
284#define STAC92HD73_DAC_COUNT 5
285static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
286 0x15, 0x16, 0x17, 0x18, 0x19,
287};
288
289static hda_nid_t stac92hd73xx_mux_nids[4] = {
290 0x28, 0x29, 0x2a, 0x2b,
291};
292
293static hda_nid_t stac92hd73xx_dmux_nids[2] = {
294 0x20, 0x21,
295};
296
d9737751
MR		 297static hda_nid_t stac92hd73xx_smux_nids[2] = {
298 0x22, 0x23,
299};
300
d0513fc6
MR		 301#define STAC92HD83XXX_NUM_DMICS 2
302static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
303 0x11, 0x12, 0
304};
305
306#define STAC92HD81_DAC_COUNT 2
307#define STAC92HD83_DAC_COUNT 3
308static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
309 0x13, 0x14, 0x22,
310};
311
312static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
313 0x17, 0x18,
314};
315
316static hda_nid_t stac92hd83xxx_adc_nids[2] = {
317 0x15, 0x16,
318};
319
320static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
321 0xa, 0xb, 0xd, 0xe,
322};
323
0ffa9807
MR		 324static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
325 0x1e, 0,
326};
327
d0513fc6
MR		 328static unsigned int stac92hd83xxx_pwr_mapping[4] = {
329 0x03, 0x0c, 0x10, 0x40,
330};
331
a64135a2
MR		 332static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
333 0x0a, 0x0d, 0x0f
334};
335
e035b841
MR		 336static hda_nid_t stac92hd71bxx_adc_nids[2] = {
337 0x12, 0x13,
338};
339
340static hda_nid_t stac92hd71bxx_mux_nids[2] = {
341 0x1a, 0x1b
342};
343
4b33c767
MR		 344static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
345 0x1c, 0x1d,
e1f0d669
MR		 346};
347
d9737751
MR		 348static hda_nid_t stac92hd71bxx_smux_nids[2] = {
349 0x24, 0x25,
350};
351
aea7bb0a 352static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 353 0x10, /*0x11, */
354};
355
356#define STAC92HD71BXX_NUM_DMICS 2
357static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
358 0x18, 0x19, 0
359};
360
0ffa9807
MR		 361static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
362 0x22, 0
363};
364
8e21c34c
TD		 365static hda_nid_t stac925x_adc_nids[1] = {
366 0x03,
367};
368
369static hda_nid_t stac925x_mux_nids[1] = {
370 0x0f,
371};
372
373static hda_nid_t stac925x_dac_nids[1] = {
374 0x02,
375};
376
f6e9852a
TI		 377#define STAC925X_NUM_DMICS 1
378static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
379 0x15, 0
2c11f955
TD		 380};
381
1697055e
TI		 382static hda_nid_t stac925x_dmux_nids[1] = {
383 0x14,
384};
385
2f2f4251
M		 386static hda_nid_t stac922x_adc_nids[2] = {
387 0x06, 0x07,
388};
389
390static hda_nid_t stac922x_mux_nids[2] = {
391 0x12, 0x13,
392};
393
3cc08dc6
MP		 394static hda_nid_t stac927x_adc_nids[3] = {
395 0x07, 0x08, 0x09
396};
397
398static hda_nid_t stac927x_mux_nids[3] = {
399 0x15, 0x16, 0x17
400};
401
d9737751
MR		 402static hda_nid_t stac927x_smux_nids[1] = {
403 0x21,
404};
405
b76c850f
MR		 406static hda_nid_t stac927x_dac_nids[6] = {
407 0x02, 0x03, 0x04, 0x05, 0x06, 0
408};
409
e1f0d669
MR		 410static hda_nid_t stac927x_dmux_nids[1] = {
411 0x1b,
412};
413
7f16859a
MR		 414#define STAC927X_NUM_DMICS 2
415static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
416 0x13, 0x14, 0
417};
418
65973632
MR		 419static const char *stac927x_spdif_labels[5] = {
420 "Digital Playback", "ADAT", "Analog Mux 1",
421 "Analog Mux 2", "Analog Mux 3"
422};
423
f3302a59
MP		 424static hda_nid_t stac9205_adc_nids[2] = {
425 0x12, 0x13
426};
427
428static hda_nid_t stac9205_mux_nids[2] = {
429 0x19, 0x1a
430};
431
e1f0d669 432static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 433 0x1d,
e1f0d669
MR		 434};
435
d9737751
MR		 436static hda_nid_t stac9205_smux_nids[1] = {
437 0x21,
438};
439
f6e9852a
TI		 440#define STAC9205_NUM_DMICS 2
441static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
442 0x17, 0x18, 0
8b65727b
MP		 443};
444
c7d4b2fa 445static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 446 0x08, 0x09, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 448};
449
8e21c34c
TD		 450static hda_nid_t stac925x_pin_nids[8] = {
451 0x07, 0x08, 0x0a, 0x0b,
452 0x0c, 0x0d, 0x10, 0x11,
453};
454
2f2f4251
M		 455static hda_nid_t stac922x_pin_nids[10] = {
456 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
457 0x0f, 0x10, 0x11, 0x15, 0x1b,
458};
459
a7662640 460static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 461 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
462 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 463 0x14, 0x22, 0x23
e1f0d669
MR		 464};
465
d0513fc6
MR		 466static hda_nid_t stac92hd83xxx_pin_nids[14] = {
467 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
468 0x0f, 0x10, 0x11, 0x12, 0x13,
469 0x1d, 0x1e, 0x1f, 0x20
470};
0ffa9807 471static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 472 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
473 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 474 0x1f,
e035b841
MR		 475};
476
3cc08dc6
MP		 477static hda_nid_t stac927x_pin_nids[14] = {
478 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
479 0x0f, 0x10, 0x11, 0x12, 0x13,
480 0x14, 0x21, 0x22, 0x23,
481};
482
f3302a59
MP		 483static hda_nid_t stac9205_pin_nids[12] = {
484 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
485 0x0f, 0x14, 0x16, 0x17, 0x18,
486 0x21, 0x22,
f3302a59
MP		 487};
488
89385035
MR		 489#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
490
491static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
492 struct snd_ctl_elem_value *ucontrol)
493{
494 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
495 struct sigmatel_spec *spec = codec->spec;
496 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
497
498 kcontrol->private_value ^= get_amp_nid(kcontrol);
499 kcontrol->private_value |= nid;
500
501 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
502}
503
504static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
509 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
510
511 kcontrol->private_value ^= get_amp_nid(kcontrol);
512 kcontrol->private_value |= nid;
513
514 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
515}
516
8b65727b
MP		 517static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_info *uinfo)
519{
520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
521 struct sigmatel_spec *spec = codec->spec;
522 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
523}
524
525static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_value *ucontrol)
527{
528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
529 struct sigmatel_spec *spec = codec->spec;
e1f0d669 530 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 531
e1f0d669 532 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 533 return 0;
534}
535
536static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538{
539 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
540 struct sigmatel_spec *spec = codec->spec;
e1f0d669 541 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 542
543 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 544 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 545}
546
d9737751
MR		 547static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
548 struct snd_ctl_elem_info *uinfo)
549{
550 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
551 struct sigmatel_spec *spec = codec->spec;
552 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
553}
554
555static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_value *ucontrol)
557{
558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct sigmatel_spec *spec = codec->spec;
560 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
561
562 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
563 return 0;
564}
565
566static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
567 struct snd_ctl_elem_value *ucontrol)
568{
569 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
570 struct sigmatel_spec *spec = codec->spec;
00ef50c2 571 struct hda_input_mux *smux = &spec->private_smux;
d9737751 572 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 573 int err, val;
574 hda_nid_t nid;
d9737751 575
00ef50c2 576 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 577 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 578 if (err < 0)
579 return err;
580
581 if (spec->spdif_mute) {
582 if (smux_idx == 0)
583 nid = spec->multiout.dig_out_nid;
584 else
585 nid = codec->slave_dig_outs[smux_idx - 1];
586 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
587 val = AMP_OUT_MUTE;
00ef50c2 588 else
c1e99bd9 589 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 590 /* un/mute SPDIF out */
591 snd_hda_codec_write_cache(codec, nid, 0,
592 AC_VERB_SET_AMP_GAIN_MUTE, val);
593 }
594 return 0;
d9737751
MR		 595}
596
c8b6bf9b 597static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 598{
599 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
600 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 601 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 602}
603
c8b6bf9b 604static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
608 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
609
610 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
611 return 0;
612}
613
c8b6bf9b 614static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 struct sigmatel_spec *spec = codec->spec;
618 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
619
c7d4b2fa 620 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 621 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
622}
623
b22b4821
MR		 624static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
625 struct snd_ctl_elem_info *uinfo)
626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
630}
631
632static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol)
634{
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637
638 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
639 return 0;
640}
641
642static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
646 struct sigmatel_spec *spec = codec->spec;
647
648 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
649 spec->mono_nid, &spec->cur_mmux);
650}
651
89385035
MR		 652static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_info *uinfo)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
658}
659
660static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_value *ucontrol)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
665
666 ucontrol->value.enumerated.item[0] = spec->cur_amux;
667 return 0;
668}
669
670static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
671 struct snd_ctl_elem_value *ucontrol)
672{
673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
674 struct sigmatel_spec *spec = codec->spec;
675 struct snd_kcontrol *ctl =
676 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
677 if (!ctl)
678 return -EINVAL;
679
680 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
681 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
682
683 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
684 0, &spec->cur_amux);
685}
686
5f10c4a9
ML		 687#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
688
689static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
690 struct snd_ctl_elem_value *ucontrol)
691{
692 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 693 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 694 struct sigmatel_spec *spec = codec->spec;
695
e1f0d669
MR		 696 ucontrol->value.integer.value[0] = !!(spec->aloopback &
697 (spec->aloopback_mask << idx));
5f10c4a9
ML		 698 return 0;
699}
700
701static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
702 struct snd_ctl_elem_value *ucontrol)
703{
704 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
705 struct sigmatel_spec *spec = codec->spec;
e1f0d669 706 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 707 unsigned int dac_mode;
e1f0d669 708 unsigned int val, idx_val;
5f10c4a9 709
e1f0d669
MR		 710 idx_val = spec->aloopback_mask << idx;
711 if (ucontrol->value.integer.value[0])
712 val = spec->aloopback | idx_val;
713 else
714 val = spec->aloopback & ~idx_val;
68ea7b2f 715 if (spec->aloopback == val)
5f10c4a9
ML		 716 return 0;
717
68ea7b2f 718 spec->aloopback = val;
5f10c4a9 719
e1f0d669
MR		 720 /* Only return the bits defined by the shift value of the
721 * first two bytes of the mask
722 */
5f10c4a9 723 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 724 kcontrol->private_value & 0xFFFF, 0x0);
725 dac_mode >>= spec->aloopback_shift;
5f10c4a9 726
e1f0d669 727 if (spec->aloopback & idx_val) {
5f10c4a9 728 snd_hda_power_up(codec);
e1f0d669 729 dac_mode |= idx_val;
5f10c4a9
ML		 730 } else {
731 snd_hda_power_down(codec);
e1f0d669 732 dac_mode &= ~idx_val;
5f10c4a9
ML		 733 }
734
735 snd_hda_codec_write_cache(codec, codec->afg, 0,
736 kcontrol->private_value >> 16, dac_mode);
737
738 return 1;
739}
740
c7d4b2fa 741static struct hda_verb stac9200_core_init[] = {
2f2f4251 742 /* set dac0mux for dac converter */
c7d4b2fa 743 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 744 {}
745};
746
1194b5b7
TI		 747static struct hda_verb stac9200_eapd_init[] = {
748 /* set dac0mux for dac converter */
749 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
750 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
751 {}
752};
753
e1f0d669
MR		 754static struct hda_verb stac92hd73xx_6ch_core_init[] = {
755 /* set master volume and direct control */
756 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
757 /* setup audio connections */
758 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
759 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
761 /* setup adcs to point to mixer */
762 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
763 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 764 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
765 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
766 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
767 /* setup import muxs */
768 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
769 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
772 {}
773};
774
d654a660
MR		 775static struct hda_verb dell_eq_core_init[] = {
776 /* set master volume to max value without distortion
777 * and direct control */
778 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
779 /* setup audio connections */
780 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 781 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
782 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 783 /* setup adcs to point to mixer */
784 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 /* setup import muxs */
787 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
791 {}
792};
793
52fe0f9d 794static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 795 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 796 /* setup audio connections */
7747ecce
MR		 797 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
798 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 799 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
800 /* setup adcs to point to mixer */
801 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
802 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
803 /* setup import muxs */
804 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
805 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
806 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
808 {}
809};
810
e1f0d669
MR		 811static struct hda_verb stac92hd73xx_8ch_core_init[] = {
812 /* set master volume and direct control */
813 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
814 /* setup audio connections */
815 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
816 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
817 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
818 /* connect hp ports to dac3 */
819 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
820 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
821 /* setup adcs to point to mixer */
822 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
823 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 824 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
825 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
826 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
827 /* setup import muxs */
828 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
829 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
830 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
831 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
832 {}
833};
834
835static struct hda_verb stac92hd73xx_10ch_core_init[] = {
836 /* set master volume and direct control */
837 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
838 /* setup audio connections */
839 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
840 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
841 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
842 /* dac3 is connected to import3 mux */
843 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
844 /* connect hp ports to dac4 */
845 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
846 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
847 /* setup adcs to point to mixer */
848 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
849 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 850 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
851 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
852 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
853 /* setup import muxs */
854 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
855 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
856 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
857 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
858 {}
859};
860
d0513fc6
MR		 861static struct hda_verb stac92hd83xxx_core_init[] = {
862 /* start of config #1 */
863 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
864
865 /* start of config #2 */
866 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
867 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
868 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
869
870 /* power state controls amps */
871 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
872};
873
e035b841 874static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 875 /* set master volume and direct control */
876 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
877 /* connect headphone jack to dac1 */
878 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 879 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
880 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
881 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
882 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 883};
884
4b33c767 885#define HD_DISABLE_PORTF 2
541eee87 886static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 887 /* start of config #1 */
888
889 /* connect port 0f to audio mixer */
890 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 891 /* unmute right and left channels for node 0x0f */
892 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
893 /* start of config #2 */
894
e035b841
MR		 895 /* set master volume and direct control */
896 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
897 /* connect headphone jack to dac1 */
898 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 899 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 900 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
901 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 902 {}
903};
904
8e21c34c
TD		 905static struct hda_verb stac925x_core_init[] = {
906 /* set dac0mux for dac converter */
907 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
908 {}
909};
910
c7d4b2fa 911static struct hda_verb stac922x_core_init[] = {
2f2f4251 912 /* set master volume and direct control */
c7d4b2fa 913 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 914 {}
915};
916
93ed1503 917static struct hda_verb d965_core_init[] = {
19039bd0 918 /* set master volume and direct control */
93ed1503 919 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 920 /* unmute node 0x1b */
921 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
922 /* select node 0x03 as DAC */
923 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
924 {}
925};
926
3cc08dc6
MP		 927static struct hda_verb stac927x_core_init[] = {
928 /* set master volume and direct control */
929 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 930 /* enable analog pc beep path */
931 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 932 {}
933};
934
f3302a59
MP		 935static struct hda_verb stac9205_core_init[] = {
936 /* set master volume and direct control */
937 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 938 /* enable analog pc beep path */
939 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 940 {}
941};
942
b22b4821
MR		 943#define STAC_MONO_MUX \
944 { \
945 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
946 .name = "Mono Mux", \
947 .count = 1, \
948 .info = stac92xx_mono_mux_enum_info, \
949 .get = stac92xx_mono_mux_enum_get, \
950 .put = stac92xx_mono_mux_enum_put, \
951 }
952
89385035
MR		 953#define STAC_AMP_MUX \
954 { \
955 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
956 .name = "Amp Selector Capture Switch", \
957 .count = 1, \
958 .info = stac92xx_amp_mux_enum_info, \
959 .get = stac92xx_amp_mux_enum_get, \
960 .put = stac92xx_amp_mux_enum_put, \
961 }
962
963#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
964 { \
965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
966 .name = xname, \
967 .index = 0, \
968 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
969 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
970 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
971 .info = stac92xx_amp_volume_info, \
972 .get = stac92xx_amp_volume_get, \
973 .put = stac92xx_amp_volume_put, \
974 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
975 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
976 }
977
9e05b7a3 978#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 979 { \
980 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
981 .name = "Input Source", \
9e05b7a3 982 .count = cnt, \
ca7c5a8b
ML		 983 .info = stac92xx_mux_enum_info, \
984 .get = stac92xx_mux_enum_get, \
985 .put = stac92xx_mux_enum_put, \
986 }
987
e1f0d669 988#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 989 { \
990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
991 .name = "Analog Loopback", \
e1f0d669 992 .count = cnt, \
5f10c4a9
ML		 993 .info = stac92xx_aloopback_info, \
994 .get = stac92xx_aloopback_get, \
995 .put = stac92xx_aloopback_put, \
996 .private_value = verb_read | (verb_write << 16), \
997 }
998
c8b6bf9b 999static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 1000 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
1001 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 1002 STAC_INPUT_SOURCE(1),
2f2f4251
M		 1003 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1004 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1005 { } /* end */
1006};
1007
2a9c7816 1008#define DELL_M6_MIXER 6
e1f0d669 1009static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1010 /* start of config #1 */
e1f0d669
MR		 1011 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1012 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1013
e1f0d669
MR		 1014 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1015 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1016
2a9c7816
MR		 1017 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1018 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1019
1020 /* start of config #2 */
1021 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1022 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1023
e1f0d669
MR		 1024 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1025 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1026
2a9c7816
MR		 1027 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1028
1029 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1030 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1031
1032 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1033 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1034
e1f0d669
MR		 1035 { } /* end */
1036};
1037
1038static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1039 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1040
e1f0d669
MR		 1041 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1042 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1043
1044 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1045 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1046
1047 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1048 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1049
1050 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1051 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1052
1053 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1054 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1055
1056 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1057 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1060 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1061 { } /* end */
1062};
1063
1064static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1065 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1066
e1f0d669
MR		 1067 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1068 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1069
1070 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1071 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1072
1073 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1074 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1075
1076 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1077 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1078
1079 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1080 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1081
1082 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1083 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1084
1085 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1086 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1087 { } /* end */
1088};
1089
d0513fc6
MR		 1090
1091static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1092 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1093 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1094
1095 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1096 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1097
1098 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1099 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1100
1101 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1102 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1103
1104 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1105 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1106
1107 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1108 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1109
1110 /*
1111 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1112 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1113 */
1114 { } /* end */
1115};
1116
541eee87 1117static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1118 STAC_INPUT_SOURCE(2),
4b33c767 1119 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1120
9b35947f
MR		 1121 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1122 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1123
1124 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1125 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1126 /* analog pc-beep replaced with digital beep support */
1127 /*
f7c5dda2
MR		 1128 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1129 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1130 */
f7c5dda2 1131
687cb98e
MR		 1132 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1133 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1134
687cb98e
MR		 1135 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1136 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1137
1138 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1139 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1140
1141 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1142 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1143 { } /* end */
1144};
1145
541eee87 1146static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1147 STAC_INPUT_SOURCE(2),
1148 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1149
541eee87
MR		 1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1155 { } /* end */
1156};
1157
8e21c34c 1158static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1159 STAC_INPUT_SOURCE(1),
8e21c34c 1160 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1161 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1162 { } /* end */
1163};
1164
9e05b7a3 1165static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1166 STAC_INPUT_SOURCE(2),
e1f0d669 1167 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1168
1169 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1170 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1171
1172 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1173 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1174 { } /* end */
1175};
1176
19039bd0 1177/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1178static struct snd_kcontrol_new stac922x_mixer[] = {
1179 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1182
1183 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1184 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1185 { } /* end */
1186};
1187
9e05b7a3 1188
d1d985f0 1189static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1190 STAC_INPUT_SOURCE(3),
e1f0d669 1191 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1192
9e05b7a3
ML		 1193 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1194 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1195
1196 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1197 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1198
1199 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1200 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1201 { } /* end */
1202};
1203
1697055e
TI		 1204static struct snd_kcontrol_new stac_dmux_mixer = {
1205 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1206 .name = "Digital Input Source",
1207 /* count set later */
1208 .info = stac92xx_dmux_enum_info,
1209 .get = stac92xx_dmux_enum_get,
1210 .put = stac92xx_dmux_enum_put,
1211};
1212
d9737751
MR		 1213static struct snd_kcontrol_new stac_smux_mixer = {
1214 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1215 .name = "IEC958 Playback Source",
d9737751
MR		 1216 /* count set later */
1217 .info = stac92xx_smux_enum_info,
1218 .get = stac92xx_smux_enum_get,
1219 .put = stac92xx_smux_enum_put,
1220};
1221
2134ea4f
TI		 1222static const char *slave_vols[] = {
1223 "Front Playback Volume",
1224 "Surround Playback Volume",
1225 "Center Playback Volume",
1226 "LFE Playback Volume",
1227 "Side Playback Volume",
1228 "Headphone Playback Volume",
1229 "Headphone Playback Volume",
1230 "Speaker Playback Volume",
1231 "External Speaker Playback Volume",
1232 "Speaker2 Playback Volume",
1233 NULL
1234};
1235
1236static const char *slave_sws[] = {
1237 "Front Playback Switch",
1238 "Surround Playback Switch",
1239 "Center Playback Switch",
1240 "LFE Playback Switch",
1241 "Side Playback Switch",
1242 "Headphone Playback Switch",
1243 "Headphone Playback Switch",
1244 "Speaker Playback Switch",
1245 "External Speaker Playback Switch",
1246 "Speaker2 Playback Switch",
edb54a55 1247 "IEC958 Playback Switch",
2134ea4f
TI		 1248 NULL
1249};
1250
603c4019 1251static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1252static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1253
2f2f4251
M		 1254static int stac92xx_build_controls(struct hda_codec *codec)
1255{
1256 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1257 struct auto_pin_cfg *cfg = &spec->autocfg;
1258 hda_nid_t nid;
2f2f4251 1259 int err;
c7d4b2fa 1260 int i;
2f2f4251
M		 1261
1262 err = snd_hda_add_new_ctls(codec, spec->mixer);
1263 if (err < 0)
1264 return err;
c7d4b2fa
M		 1265
1266 for (i = 0; i < spec->num_mixers; i++) {
1267 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1268 if (err < 0)
1269 return err;
1270 }
1697055e
TI		 1271 if (spec->num_dmuxes > 0) {
1272 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1273 err = snd_hda_ctl_add(codec,
1697055e
TI		 1274 snd_ctl_new1(&stac_dmux_mixer, codec));
1275 if (err < 0)
1276 return err;
1277 }
d9737751 1278 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1279 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1280 struct hda_input_mux *smux = &spec->private_smux;
1281 /* check for mute support on SPDIF out */
1282 if (wcaps & AC_WCAP_OUT_AMP) {
1283 smux->items[smux->num_items].label = "Off";
1284 smux->items[smux->num_items].index = 0;
1285 smux->num_items++;
1286 spec->spdif_mute = 1;
1287 }
d9737751
MR		 1288 stac_smux_mixer.count = spec->num_smuxes;
1289 err = snd_ctl_add(codec->bus->card,
1290 snd_ctl_new1(&stac_smux_mixer, codec));
1291 if (err < 0)
1292 return err;
1293 }
c7d4b2fa 1294
dabbed6f
M		 1295 if (spec->multiout.dig_out_nid) {
1296 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1297 if (err < 0)
1298 return err;
9a08160b
TI		 1299 err = snd_hda_create_spdif_share_sw(codec,
1300 &spec->multiout);
1301 if (err < 0)
1302 return err;
1303 spec->multiout.share_spdif = 1;
dabbed6f 1304 }
da74ae3e 1305 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1306 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1307 if (err < 0)
1308 return err;
1309 }
2134ea4f
TI		 1310
1311 /* if we have no master control, let's create it */
1312 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1313 unsigned int vmaster_tlv[4];
2134ea4f 1314 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1315 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1316 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1317 vmaster_tlv, slave_vols);
2134ea4f
TI		 1318 if (err < 0)
1319 return err;
1320 }
1321 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1322 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1323 NULL, slave_sws);
1324 if (err < 0)
1325 return err;
1326 }
1327
603c4019 1328 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1329
1330 /* create jack input elements */
1331 if (spec->hp_detect) {
1332 for (i = 0; i < cfg->hp_outs; i++) {
1333 int type = SND_JACK_HEADPHONE;
1334 nid = cfg->hp_pins[i];
1335 /* jack detection */
1336 if (cfg->hp_outs == i)
1337 type |= SND_JACK_LINEOUT;
1338 err = stac92xx_add_jack(codec, nid, type);
1339 if (err < 0)
1340 return err;
1341 }
1342 }
1343 for (i = 0; i < cfg->line_outs; i++) {
1344 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1345 SND_JACK_LINEOUT);
1346 if (err < 0)
1347 return err;
1348 }
1349 for (i = 0; i < AUTO_PIN_LAST; i++) {
1350 nid = cfg->input_pins[i];
1351 if (nid) {
1352 err = stac92xx_add_jack(codec, nid,
1353 SND_JACK_MICROPHONE);
1354 if (err < 0)
1355 return err;
1356 }
1357 }
1358
dabbed6f 1359 return 0;
2f2f4251
M		 1360}
1361
403d1944 1362static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1363 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1364 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1365};
1366
dfe495d0
TI		 1367/*
1368 STAC 9200 pin configs for
1369 102801A8
1370 102801DE
1371 102801E8
1372*/
1373static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1374 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1375 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1376};
1377
1378/*
1379 STAC 9200 pin configs for
1380 102801C0
1381 102801C1
1382*/
1383static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1384 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1385 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1386};
1387
1388/*
1389 STAC 9200 pin configs for
1390 102801C4 (Dell Dimension E310)
1391 102801C5
1392 102801C7
1393 102801D9
1394 102801DA
1395 102801E3
1396*/
1397static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1398 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1399 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1400};
1401
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801B5 (Dell Inspiron 630m)
1406 102801D8 (Dell Inspiron 640m)
1407*/
1408static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1409 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1410 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1411};
1412
1413/*
1414 STAC 9200-32 pin configs for
1415 102801C2 (Dell Latitude D620)
1416 102801C8
1417 102801CC (Dell Latitude D820)
1418 102801D4
1419 102801D6
1420*/
1421static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1422 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1423 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801CE (Dell XPS M1710)
1429 102801CF (Dell Precision M90)
1430*/
1431static unsigned int dell9200_m23_pin_configs[8] = {
1432 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1433 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1434};
1435
1436/*
1437 STAC 9200-32 pin configs for
1438 102801C9
1439 102801CA
1440 102801CB (Dell Latitude 120L)
1441 102801D3
1442*/
1443static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1444 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1445 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1446};
1447
1448/*
1449 STAC 9200-32 pin configs for
1450 102801BD (Dell Inspiron E1505n)
1451 102801EE
1452 102801EF
1453*/
1454static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1455 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1456 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1457};
1458
1459/*
1460 STAC 9200-32 pin configs for
1461 102801F5 (Dell Inspiron 1501)
1462 102801F6
1463*/
1464static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1465 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1466 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1467};
1468
1469/*
1470 STAC 9200-32
1471 102801CD (Dell Inspiron E1705/9400)
1472*/
1473static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1474 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1475 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1476};
1477
bf277785
TD		 1478static unsigned int oqo9200_pin_configs[8] = {
1479 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1480 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1481};
1482
dfe495d0 1483
f5fcc13c
TI		 1484static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1485 [STAC_REF] = ref9200_pin_configs,
bf277785 1486 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1487 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1488 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1489 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1490 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1491 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1492 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1493 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1494 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1495 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1496 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1497 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1498};
1499
f5fcc13c
TI		 1500static const char *stac9200_models[STAC_9200_MODELS] = {
1501 [STAC_REF] = "ref",
bf277785 1502 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1503 [STAC_9200_DELL_D21] = "dell-d21",
1504 [STAC_9200_DELL_D22] = "dell-d22",
1505 [STAC_9200_DELL_D23] = "dell-d23",
1506 [STAC_9200_DELL_M21] = "dell-m21",
1507 [STAC_9200_DELL_M22] = "dell-m22",
1508 [STAC_9200_DELL_M23] = "dell-m23",
1509 [STAC_9200_DELL_M24] = "dell-m24",
1510 [STAC_9200_DELL_M25] = "dell-m25",
1511 [STAC_9200_DELL_M26] = "dell-m26",
1512 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1513 [STAC_9200_GATEWAY] = "gateway",
117f257d 1514 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1515};
1516
1517static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1518 /* SigmaTel reference board */
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1520 "DFI LanParty", STAC_REF),
e7377071 1521 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1523 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1525 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1527 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1529 "unknown Dell", STAC_9200_DELL_D22),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1531 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1533 "Dell Latitude D620", STAC_9200_DELL_M22),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1535 "unknown Dell", STAC_9200_DELL_D23),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1537 "unknown Dell", STAC_9200_DELL_D23),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1539 "unknown Dell", STAC_9200_DELL_M22),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1541 "unknown Dell", STAC_9200_DELL_M24),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1543 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1545 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1547 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1549 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1551 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1553 "Dell Precision M90", STAC_9200_DELL_M23),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1555 "unknown Dell", STAC_9200_DELL_M22),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1557 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1559 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1561 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1563 "unknown Dell", STAC_9200_DELL_D23),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1565 "unknown Dell", STAC_9200_DELL_D23),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1567 "unknown Dell", STAC_9200_DELL_D21),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1569 "unknown Dell", STAC_9200_DELL_D23),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1571 "unknown Dell", STAC_9200_DELL_D21),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1573 "unknown Dell", STAC_9200_DELL_M25),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1575 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1577 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1579 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1580 /* Panasonic */
117f257d 1581 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1582 /* Gateway machines needs EAPD to be set on resume */
1583 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1584 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1585 STAC_9200_GATEWAY),
1586 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1587 STAC_9200_GATEWAY),
bf277785
TD		 1588 /* OQO Mobile */
1589 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1590 {} /* terminator */
1591};
1592
8e21c34c
TD		 1593static unsigned int ref925x_pin_configs[8] = {
1594 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1595 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1596};
1597
1598static unsigned int stac925x_MA6_pin_configs[8] = {
1599 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1600 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1601};
1602
2c11f955
TD		 1603static unsigned int stac925x_PA6_pin_configs[8] = {
1604 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1605 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1606};
1607
8e21c34c 1608static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1609 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1610 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1611};
1612
1613static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1614 [STAC_REF] = ref925x_pin_configs,
1615 [STAC_M2_2] = stac925xM2_2_pin_configs,
1616 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1617 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1618};
1619
1620static const char *stac925x_models[STAC_925x_MODELS] = {
1621 [STAC_REF] = "ref",
1622 [STAC_M2_2] = "m2-2",
1623 [STAC_MA6] = "m6",
2c11f955 1624 [STAC_PA6] = "pa6",
8e21c34c
TD		 1625};
1626
1627static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1628 /* SigmaTel reference board */
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1630 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1631 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1632 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1633 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1634 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1635 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1636 {} /* terminator */
1637};
1638
a7662640 1639static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1640 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1641 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1642 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1643 0x01452050,
1644};
1645
1646static unsigned int dell_m6_pin_configs[13] = {
1647 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1648 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1649 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1650 0x4f0000f0,
e1f0d669
MR		 1651};
1652
1653static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1654 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1655 [STAC_DELL_M6] = dell_m6_pin_configs,
6b3ab21e 1656 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1657};
1658
1659static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1660 [STAC_92HD73XX_REF] = "ref",
a7662640 1661 [STAC_DELL_M6] = "dell-m6",
6b3ab21e 1662 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1663};
1664
1665static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1666 /* SigmaTel reference board */
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1668 "DFI LanParty", STAC_92HD73XX_REF),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1670 "unknown Dell", STAC_DELL_M6),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1672 "unknown Dell", STAC_DELL_M6),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1674 "unknown Dell", STAC_DELL_M6),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1676 "unknown Dell", STAC_DELL_M6),
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1678 "unknown Dell", STAC_DELL_M6),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1680 "unknown Dell", STAC_DELL_M6),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1682 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1683 {} /* terminator */
1684};
1685
d0513fc6
MR		 1686static unsigned int ref92hd83xxx_pin_configs[14] = {
1687 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1688 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1689 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1690 0x01451160, 0x98560170,
1691};
1692
1693static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1694 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1695};
1696
1697static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1698 [STAC_92HD83XXX_REF] = "ref",
1699};
1700
1701static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1702 /* SigmaTel reference board */
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1704 "DFI LanParty", STAC_92HD71BXX_REF),
1705};
1706
0ffa9807 1707static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1708 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1709 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1710 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1711};
1712
0ffa9807 1713static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1714 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1715 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1716 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1717};
1718
0ffa9807 1719static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1720 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1721 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1722 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1723};
1724
3a7abfd2
MR		 1725static unsigned int dell_m4_3_pin_configs[11] = {
1726 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1727 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1728 0x40f000f0, 0x044413b0, 0x044413b0,
1729};
1730
e035b841
MR		 1731static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1732 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1733 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1734 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1735 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1736 [STAC_HP_M4] = NULL,
e035b841
MR		 1737};
1738
1739static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1740 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1741 [STAC_DELL_M4_1] = "dell-m4-1",
1742 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1743 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1744 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1745};
1746
1747static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1748 /* SigmaTel reference board */
1749 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1750 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1751 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1752 "HP dv5", STAC_HP_M4),
1753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1754 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1756 "unknown HP", STAC_HP_M4),
a7662640
MR		 1757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1758 "unknown Dell", STAC_DELL_M4_1),
1759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1760 "unknown Dell", STAC_DELL_M4_1),
1761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1762 "unknown Dell", STAC_DELL_M4_1),
1763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1764 "unknown Dell", STAC_DELL_M4_1),
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1766 "unknown Dell", STAC_DELL_M4_1),
1767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1768 "unknown Dell", STAC_DELL_M4_1),
1769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1770 "unknown Dell", STAC_DELL_M4_1),
1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1772 "unknown Dell", STAC_DELL_M4_2),
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1774 "unknown Dell", STAC_DELL_M4_2),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1776 "unknown Dell", STAC_DELL_M4_2),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1778 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1780 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1781 {} /* terminator */
1782};
1783
403d1944
MP		 1784static unsigned int ref922x_pin_configs[10] = {
1785 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1786 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1787 0x40000100, 0x40000100,
1788};
1789
dfe495d0
TI		 1790/*
1791 STAC 922X pin configs for
1792 102801A7
1793 102801AB
1794 102801A9
1795 102801D1
1796 102801D2
1797*/
1798static unsigned int dell_922x_d81_pin_configs[10] = {
1799 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1800 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1801 0x01813122, 0x400001f2,
1802};
1803
1804/*
1805 STAC 922X pin configs for
1806 102801AC
1807 102801D0
1808*/
1809static unsigned int dell_922x_d82_pin_configs[10] = {
1810 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1811 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1812 0x01813122, 0x400001f1,
1813};
1814
1815/*
1816 STAC 922X pin configs for
1817 102801BF
1818*/
1819static unsigned int dell_922x_m81_pin_configs[10] = {
1820 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1821 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1822 0x40C003f1, 0x405003f0,
1823};
1824
1825/*
1826 STAC 9221 A1 pin configs for
1827 102801D7 (Dell XPS M1210)
1828*/
1829static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1830 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1831 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1832 0x508003f3, 0x405003f4,
1833};
1834
403d1944 1835static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1836 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1837 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1838 0x02a19120, 0x40000100,
1839};
1840
1841static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1842 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1843 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1844 0x02a19320, 0x40000100,
1845};
1846
5d5d3bc3
IZ		 1847static unsigned int intel_mac_v1_pin_configs[10] = {
1848 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1849 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1850 0x400000fc, 0x400000fb,
1851};
1852
1853static unsigned int intel_mac_v2_pin_configs[10] = {
1854 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1855 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1856 0x400000fc, 0x400000fb,
6f0778d8
NB		 1857};
1858
5d5d3bc3
IZ		 1859static unsigned int intel_mac_v3_pin_configs[10] = {
1860 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1861 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1862 0x400000fc, 0x400000fb,
1863};
1864
5d5d3bc3
IZ		 1865static unsigned int intel_mac_v4_pin_configs[10] = {
1866 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1867 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1868 0x400000fc, 0x400000fb,
1869};
1870
5d5d3bc3
IZ		 1871static unsigned int intel_mac_v5_pin_configs[10] = {
1872 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1873 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1874 0x400000fc, 0x400000fb,
0dae0f83
TI		 1875};
1876
8c650087
MCC		 1877static unsigned int ecs202_pin_configs[10] = {
1878 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1879 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1880 0x9037012e, 0x40e000f2,
1881};
76c08828 1882
19039bd0 1883static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1884 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1885 [STAC_D945GTP3] = d945gtp3_pin_configs,
1886 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1887 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1888 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1889 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1890 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1891 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1892 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1893 /* for backward compatibility */
5d5d3bc3
IZ		 1894 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1895 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1896 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1897 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1898 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1899 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1900 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1901 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1902 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1903 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1904 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1905};
1906
f5fcc13c
TI		 1907static const char *stac922x_models[STAC_922X_MODELS] = {
1908 [STAC_D945_REF] = "ref",
1909 [STAC_D945GTP5] = "5stack",
1910 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1911 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1912 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1913 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1914 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1915 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1916 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1917 /* for backward compatibility */
f5fcc13c 1918 [STAC_MACMINI] = "macmini",
3fc24d85 1919 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1920 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1921 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1922 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1923 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1924 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1925 [STAC_922X_DELL_D81] = "dell-d81",
1926 [STAC_922X_DELL_D82] = "dell-d82",
1927 [STAC_922X_DELL_M81] = "dell-m81",
1928 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1929};
1930
1931static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1932 /* SigmaTel reference board */
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1934 "DFI LanParty", STAC_D945_REF),
1935 /* Intel 945G based systems */
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1937 "Intel D945G", STAC_D945GTP3),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1939 "Intel D945G", STAC_D945GTP3),
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1941 "Intel D945G", STAC_D945GTP3),
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1943 "Intel D945G", STAC_D945GTP3),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1945 "Intel D945G", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1947 "Intel D945G", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1949 "Intel D945G", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1965 "Intel D945G", STAC_D945GTP3),
1966 /* Intel D945G 5-stack systems */
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1968 "Intel D945G", STAC_D945GTP5),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1970 "Intel D945G", STAC_D945GTP5),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1972 "Intel D945G", STAC_D945GTP5),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1974 "Intel D945G", STAC_D945GTP5),
1975 /* Intel 945P based systems */
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1977 "Intel D945P", STAC_D945GTP3),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1979 "Intel D945P", STAC_D945GTP3),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1981 "Intel D945P", STAC_D945GTP3),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1983 "Intel D945P", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1985 "Intel D945P", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1987 "Intel D945P", STAC_D945GTP5),
1988 /* other systems */
536319af 1989 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1990 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1991 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1992 /* Dell systems */
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1994 "unknown Dell", STAC_922X_DELL_D81),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1996 "unknown Dell", STAC_922X_DELL_D81),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1998 "unknown Dell", STAC_922X_DELL_D81),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2000 "unknown Dell", STAC_922X_DELL_D82),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2002 "unknown Dell", STAC_922X_DELL_M81),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2004 "unknown Dell", STAC_922X_DELL_D82),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2006 "unknown Dell", STAC_922X_DELL_D81),
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2008 "unknown Dell", STAC_922X_DELL_D81),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2010 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2011 /* ECS/PC Chips boards */
2012 SND_PCI_QUIRK(0x1019, 0x2144,
2013 "ECS/PC chips", STAC_ECS_202),
2014 SND_PCI_QUIRK(0x1019, 0x2608,
2015 "ECS/PC chips", STAC_ECS_202),
2016 SND_PCI_QUIRK(0x1019, 0x2633,
2017 "ECS/PC chips P17G/1333", STAC_ECS_202),
2018 SND_PCI_QUIRK(0x1019, 0x2811,
2019 "ECS/PC chips", STAC_ECS_202),
2020 SND_PCI_QUIRK(0x1019, 0x2812,
2021 "ECS/PC chips", STAC_ECS_202),
2022 SND_PCI_QUIRK(0x1019, 0x2813,
2023 "ECS/PC chips", STAC_ECS_202),
2024 SND_PCI_QUIRK(0x1019, 0x2814,
2025 "ECS/PC chips", STAC_ECS_202),
2026 SND_PCI_QUIRK(0x1019, 0x2815,
2027 "ECS/PC chips", STAC_ECS_202),
2028 SND_PCI_QUIRK(0x1019, 0x2816,
2029 "ECS/PC chips", STAC_ECS_202),
2030 SND_PCI_QUIRK(0x1019, 0x2817,
2031 "ECS/PC chips", STAC_ECS_202),
2032 SND_PCI_QUIRK(0x1019, 0x2818,
2033 "ECS/PC chips", STAC_ECS_202),
2034 SND_PCI_QUIRK(0x1019, 0x2819,
2035 "ECS/PC chips", STAC_ECS_202),
2036 SND_PCI_QUIRK(0x1019, 0x2820,
2037 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2038 {} /* terminator */
2039};
2040
3cc08dc6 2041static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2042 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2043 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2044 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2045 0x01c42190, 0x40000100,
3cc08dc6
MP		 2046};
2047
93ed1503 2048static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2049 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2050 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2051 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2052 0x40000100, 0x40000100
2053};
2054
93ed1503
TD		 2055static unsigned int d965_5st_pin_configs[14] = {
2056 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2057 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2058 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2059 0x40000100, 0x40000100
2060};
2061
4ff076e5
TD		 2062static unsigned int dell_3st_pin_configs[14] = {
2063 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2064 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2065 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2066 0x40c003fc, 0x40000100
2067};
2068
93ed1503 2069static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2070 [STAC_D965_REF] = ref927x_pin_configs,
2071 [STAC_D965_3ST] = d965_3st_pin_configs,
2072 [STAC_D965_5ST] = d965_5st_pin_configs,
2073 [STAC_DELL_3ST] = dell_3st_pin_configs,
2074 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2075};
2076
f5fcc13c 2077static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2078 [STAC_D965_REF] = "ref",
2079 [STAC_D965_3ST] = "3stack",
2080 [STAC_D965_5ST] = "5stack",
2081 [STAC_DELL_3ST] = "dell-3stack",
2082 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2083};
2084
2085static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2086 /* SigmaTel reference board */
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2088 "DFI LanParty", STAC_D965_REF),
81d3dbde 2089 /* Intel 946 based systems */
f5fcc13c
TI		 2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2092 /* 965 based 3 stack systems */
f5fcc13c
TI		 2093 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2109 /* Dell 3 stack systems */
8e9068b1 2110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2114 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2123 /* 965 based 5 stack systems */
f5fcc13c
TI		 2124 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2125 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2126 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2127 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2128 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2129 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2130 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2131 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2132 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2133 {} /* terminator */
2134};
2135
f3302a59
MP		 2136static unsigned int ref9205_pin_configs[12] = {
2137 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2138 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2139 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2140};
2141
dfe495d0
TI		 2142/*
2143 STAC 9205 pin configs for
2144 102801F1
2145 102801F2
2146 102801FC
2147 102801FD
2148 10280204
2149 1028021F
3fa2ef74 2150 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2151*/
2152static unsigned int dell_9205_m42_pin_configs[12] = {
2153 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2154 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2155 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2156};
2157
2158/*
2159 STAC 9205 pin configs for
2160 102801F9
2161 102801FA
2162 102801FE
2163 102801FF (Dell Precision M4300)
2164 10280206
2165 10280200
2166 10280201
2167*/
2168static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2169 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2170 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2171 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2172};
2173
dfe495d0 2174static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2175 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2176 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2177 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2178};
2179
f5fcc13c 2180static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2181 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2182 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2183 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2184 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2185};
2186
f5fcc13c
TI		 2187static const char *stac9205_models[STAC_9205_MODELS] = {
2188 [STAC_9205_REF] = "ref",
dfe495d0 2189 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2190 [STAC_9205_DELL_M43] = "dell-m43",
2191 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2192};
2193
2194static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2195 /* SigmaTel reference board */
2196 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2197 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2199 "unknown Dell", STAC_9205_DELL_M42),
2200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2201 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2203 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2205 "Dell Precision", STAC_9205_DELL_M43),
2206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2207 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2209 "unknown Dell", STAC_9205_DELL_M42),
2210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2211 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2213 "Dell Precision", STAC_9205_DELL_M43),
2214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2215 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2217 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2219 "Dell Precision", STAC_9205_DELL_M43),
2220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2221 "Dell Precision", STAC_9205_DELL_M43),
2222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2223 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2225 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2227 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2228 {} /* terminator */
2229};
2230
11b44bbd
RF		 2231static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2232{
2233 int i;
2234 struct sigmatel_spec *spec = codec->spec;
2235
af9f341a
TI		 2236 kfree(spec->pin_configs);
2237 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2238 GFP_KERNEL);
2239 if (!spec->pin_configs)
2240 return -ENOMEM;
11b44bbd
RF		 2241
2242 for (i = 0; i < spec->num_pins; i++) {
2243 hda_nid_t nid = spec->pin_nids[i];
2244 unsigned int pin_cfg;
2245
2246 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2247 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2248 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2249 nid, pin_cfg);
af9f341a 2250 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2251 }
2252
2253 return 0;
2254}
2255
87d48363
MR		 2256static void stac92xx_set_config_reg(struct hda_codec *codec,
2257 hda_nid_t pin_nid, unsigned int pin_config)
2258{
2259 int i;
2260 snd_hda_codec_write(codec, pin_nid, 0,
2261 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2262 pin_config & 0x000000ff);
2263 snd_hda_codec_write(codec, pin_nid, 0,
2264 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2265 (pin_config & 0x0000ff00) >> 8);
2266 snd_hda_codec_write(codec, pin_nid, 0,
2267 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2268 (pin_config & 0x00ff0000) >> 16);
2269 snd_hda_codec_write(codec, pin_nid, 0,
2270 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2271 pin_config >> 24);
2272 i = snd_hda_codec_read(codec, pin_nid, 0,
2273 AC_VERB_GET_CONFIG_DEFAULT,
2274 0x00);
2275 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2276 pin_nid, i);
2277}
2278
2f2f4251
M		 2279static void stac92xx_set_config_regs(struct hda_codec *codec)
2280{
2281 int i;
2282 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2283
87d48363
MR		 2284 if (!spec->pin_configs)
2285 return;
11b44bbd 2286
87d48363
MR		 2287 for (i = 0; i < spec->num_pins; i++)
2288 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2289 spec->pin_configs[i]);
2f2f4251 2290}
2f2f4251 2291
af9f341a
TI		 2292static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2293{
2294 struct sigmatel_spec *spec = codec->spec;
2295
2296 if (!pins)
2297 return stac92xx_save_bios_config_regs(codec);
2298
2299 kfree(spec->pin_configs);
2300 spec->pin_configs = kmemdup(pins,
2301 spec->num_pins * sizeof(*pins),
2302 GFP_KERNEL);
2303 if (!spec->pin_configs)
2304 return -ENOMEM;
2305
2306 stac92xx_set_config_regs(codec);
2307 return 0;
2308}
2309
2310static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2311 unsigned int cfg)
2312{
2313 struct sigmatel_spec *spec = codec->spec;
2314 int i;
2315
2316 for (i = 0; i < spec->num_pins; i++) {
2317 if (spec->pin_nids[i] == nid) {
2318 spec->pin_configs[i] = cfg;
2319 stac92xx_set_config_reg(codec, nid, cfg);
2320 break;
2321 }
2322 }
2323}
2324
dabbed6f 2325/*
c7d4b2fa 2326 * Analog playback callbacks
dabbed6f 2327 */
c7d4b2fa
M		 2328static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2329 struct hda_codec *codec,
c8b6bf9b 2330 struct snd_pcm_substream *substream)
2f2f4251 2331{
dabbed6f 2332 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2333 if (spec->stream_delay)
2334 msleep(spec->stream_delay);
9a08160b
TI		 2335 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2336 hinfo);
2f2f4251
M		 2337}
2338
2f2f4251
M		 2339static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2340 struct hda_codec *codec,
2341 unsigned int stream_tag,
2342 unsigned int format,
c8b6bf9b 2343 struct snd_pcm_substream *substream)
2f2f4251
M		 2344{
2345 struct sigmatel_spec *spec = codec->spec;
403d1944 2346 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2347}
2348
2349static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2350 struct hda_codec *codec,
c8b6bf9b 2351 struct snd_pcm_substream *substream)
2f2f4251
M		 2352{
2353 struct sigmatel_spec *spec = codec->spec;
2354 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2355}
2356
dabbed6f
M		 2357/*
2358 * Digital playback callbacks
2359 */
2360static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2361 struct hda_codec *codec,
c8b6bf9b 2362 struct snd_pcm_substream *substream)
dabbed6f
M		 2363{
2364 struct sigmatel_spec *spec = codec->spec;
2365 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2366}
2367
2368static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2369 struct hda_codec *codec,
c8b6bf9b 2370 struct snd_pcm_substream *substream)
dabbed6f
M		 2371{
2372 struct sigmatel_spec *spec = codec->spec;
2373 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2374}
2375
6b97eb45
TI		 2376static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2377 struct hda_codec *codec,
2378 unsigned int stream_tag,
2379 unsigned int format,
2380 struct snd_pcm_substream *substream)
2381{
2382 struct sigmatel_spec *spec = codec->spec;
2383 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2384 stream_tag, format, substream);
2385}
2386
dabbed6f 2387
2f2f4251
M		 2388/*
2389 * Analog capture callbacks
2390 */
2391static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2392 struct hda_codec *codec,
2393 unsigned int stream_tag,
2394 unsigned int format,
c8b6bf9b 2395 struct snd_pcm_substream *substream)
2f2f4251
M		 2396{
2397 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2398 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2399
8daaaa97
MR		 2400 if (spec->powerdown_adcs) {
2401 msleep(40);
2402 snd_hda_codec_write_cache(codec, nid, 0,
2403 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2404 }
2405 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2406 return 0;
2407}
2408
2409static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2410 struct hda_codec *codec,
c8b6bf9b 2411 struct snd_pcm_substream *substream)
2f2f4251
M		 2412{
2413 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2414 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2415
8daaaa97
MR		 2416 snd_hda_codec_cleanup_stream(codec, nid);
2417 if (spec->powerdown_adcs)
2418 snd_hda_codec_write_cache(codec, nid, 0,
2419 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2420 return 0;
2421}
2422
dabbed6f
M		 2423static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2424 .substreams = 1,
2425 .channels_min = 2,
2426 .channels_max = 2,
2427 /* NID is set in stac92xx_build_pcms */
2428 .ops = {
2429 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2430 .close = stac92xx_dig_playback_pcm_close,
2431 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2432 },
2433};
2434
2435static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2436 .substreams = 1,
2437 .channels_min = 2,
2438 .channels_max = 2,
2439 /* NID is set in stac92xx_build_pcms */
2440};
2441
2f2f4251
M		 2442static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2443 .substreams = 1,
2444 .channels_min = 2,
c7d4b2fa 2445 .channels_max = 8,
2f2f4251
M		 2446 .nid = 0x02, /* NID to query formats and rates */
2447 .ops = {
2448 .open = stac92xx_playback_pcm_open,
2449 .prepare = stac92xx_playback_pcm_prepare,
2450 .cleanup = stac92xx_playback_pcm_cleanup
2451 },
2452};
2453
3cc08dc6
MP		 2454static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2455 .substreams = 1,
2456 .channels_min = 2,
2457 .channels_max = 2,
2458 .nid = 0x06, /* NID to query formats and rates */
2459 .ops = {
2460 .open = stac92xx_playback_pcm_open,
2461 .prepare = stac92xx_playback_pcm_prepare,
2462 .cleanup = stac92xx_playback_pcm_cleanup
2463 },
2464};
2465
2f2f4251 2466static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2467 .channels_min = 2,
2468 .channels_max = 2,
9e05b7a3 2469 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2470 .ops = {
2471 .prepare = stac92xx_capture_pcm_prepare,
2472 .cleanup = stac92xx_capture_pcm_cleanup
2473 },
2474};
2475
2476static int stac92xx_build_pcms(struct hda_codec *codec)
2477{
2478 struct sigmatel_spec *spec = codec->spec;
2479 struct hda_pcm *info = spec->pcm_rec;
2480
2481 codec->num_pcms = 1;
2482 codec->pcm_info = info;
2483
c7d4b2fa 2484 info->name = "STAC92xx Analog";
2f2f4251 2485 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2486 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2487 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2488 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2489
2490 if (spec->alt_switch) {
2491 codec->num_pcms++;
2492 info++;
2493 info->name = "STAC92xx Analog Alt";
2494 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2495 }
2f2f4251 2496
dabbed6f
M		 2497 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2498 codec->num_pcms++;
2499 info++;
2500 info->name = "STAC92xx Digital";
7ba72ba1 2501 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2502 if (spec->multiout.dig_out_nid) {
2503 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2504 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2505 }
2506 if (spec->dig_in_nid) {
2507 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2508 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2509 }
2510 }
2511
2f2f4251
M		 2512 return 0;
2513}
2514
c960a03b
TI		 2515static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2516{
2517 unsigned int pincap = snd_hda_param_read(codec, nid,
2518 AC_PAR_PIN_CAP);
2519 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2520 if (pincap & AC_PINCAP_VREF_100)
2521 return AC_PINCTL_VREF_100;
2522 if (pincap & AC_PINCAP_VREF_80)
2523 return AC_PINCTL_VREF_80;
2524 if (pincap & AC_PINCAP_VREF_50)
2525 return AC_PINCTL_VREF_50;
2526 if (pincap & AC_PINCAP_VREF_GRD)
2527 return AC_PINCTL_VREF_GRD;
2528 return 0;
2529}
2530
403d1944
MP		 2531static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2532
2533{
82beb8fd
TI		 2534 snd_hda_codec_write_cache(codec, nid, 0,
2535 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2536}
2537
7c2ba97b
MR		 2538#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2539
2540static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2541 struct snd_ctl_elem_value *ucontrol)
2542{
2543 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2544 struct sigmatel_spec *spec = codec->spec;
2545
d7a89436 2546 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2547 return 0;
2548}
2549
2550static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2551 struct snd_ctl_elem_value *ucontrol)
2552{
2553 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2554 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2555 int nid = kcontrol->private_value;
2556
2557 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2558
2559 /* check to be sure that the ports are upto date with
2560 * switch changes
2561 */
74aeaabc 2562 codec->patch_ops.unsol_event(codec, (STAC_HP_EVENT | nid) << 26);
7c2ba97b
MR		 2563
2564 return 1;
2565}
2566
a5ce8890 2567#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2568
2569static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2570{
2571 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2572 struct sigmatel_spec *spec = codec->spec;
2573 int io_idx = kcontrol-> private_value & 0xff;
2574
2575 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2576 return 0;
2577}
2578
2579static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2580{
2581 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2582 struct sigmatel_spec *spec = codec->spec;
2583 hda_nid_t nid = kcontrol->private_value >> 8;
2584 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2585 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2586
2587 spec->io_switch[io_idx] = val;
2588
2589 if (val)
2590 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2591 else {
2592 unsigned int pinctl = AC_PINCTL_IN_EN;
2593 if (io_idx) /* set VREF for mic */
2594 pinctl |= stac92xx_get_vref(codec, nid);
2595 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2596 }
40c1d308
JZ		 2597
2598 /* check the auto-mute again: we need to mute/unmute the speaker
2599 * appropriately according to the pin direction
2600 */
2601 if (spec->hp_detect)
74aeaabc
MR		 2602 codec->patch_ops.unsol_event(codec,
2603 (STAC_HP_EVENT | nid) << 26);
40c1d308 2604
403d1944
MP		 2605 return 1;
2606}
2607
0fb87bb4
ML		 2608#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2609
2610static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2611 struct snd_ctl_elem_value *ucontrol)
2612{
2613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2614 struct sigmatel_spec *spec = codec->spec;
2615
2616 ucontrol->value.integer.value[0] = spec->clfe_swap;
2617 return 0;
2618}
2619
2620static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2621 struct snd_ctl_elem_value *ucontrol)
2622{
2623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2624 struct sigmatel_spec *spec = codec->spec;
2625 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2626 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2627
68ea7b2f 2628 if (spec->clfe_swap == val)
0fb87bb4
ML		 2629 return 0;
2630
68ea7b2f 2631 spec->clfe_swap = val;
0fb87bb4
ML		 2632
2633 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2634 spec->clfe_swap ? 0x4 : 0x0);
2635
2636 return 1;
2637}
2638
7c2ba97b
MR		 2639#define STAC_CODEC_HP_SWITCH(xname) \
2640 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2641 .name = xname, \
2642 .index = 0, \
2643 .info = stac92xx_hp_switch_info, \
2644 .get = stac92xx_hp_switch_get, \
2645 .put = stac92xx_hp_switch_put, \
2646 }
2647
403d1944
MP		 2648#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2649 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2650 .name = xname, \
2651 .index = 0, \
2652 .info = stac92xx_io_switch_info, \
2653 .get = stac92xx_io_switch_get, \
2654 .put = stac92xx_io_switch_put, \
2655 .private_value = xpval, \
2656 }
2657
0fb87bb4
ML		 2658#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2659 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2660 .name = xname, \
2661 .index = 0, \
2662 .info = stac92xx_clfe_switch_info, \
2663 .get = stac92xx_clfe_switch_get, \
2664 .put = stac92xx_clfe_switch_put, \
2665 .private_value = xpval, \
2666 }
403d1944 2667
c7d4b2fa
M		 2668enum {
2669 STAC_CTL_WIDGET_VOL,
2670 STAC_CTL_WIDGET_MUTE,
09a99959 2671 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2672 STAC_CTL_WIDGET_AMP_MUX,
2673 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2674 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2675 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2676 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2677};
2678
c8b6bf9b 2679static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2680 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2681 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2682 STAC_MONO_MUX,
89385035
MR		 2683 STAC_AMP_MUX,
2684 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2685 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2686 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2687 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2688};
2689
2690/* add dynamic controls */
4d4e9bb3
TI		 2691static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2692 struct snd_kcontrol_new *ktemp,
2693 int idx, const char *name,
2694 unsigned long val)
c7d4b2fa 2695{
c8b6bf9b 2696 struct snd_kcontrol_new *knew;
c7d4b2fa 2697
603c4019
TI		 2698 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2699 knew = snd_array_new(&spec->kctls);
2700 if (!knew)
2701 return -ENOMEM;
4d4e9bb3 2702 *knew = *ktemp;
4682eee0 2703 knew->index = idx;
82fe0c58 2704 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2705 if (!knew->name)
c7d4b2fa
M		 2706 return -ENOMEM;
2707 knew->private_value = val;
c7d4b2fa
M		 2708 return 0;
2709}
2710
4d4e9bb3
TI		 2711static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2712 int type, int idx, const char *name,
2713 unsigned long val)
2714{
2715 return stac92xx_add_control_temp(spec,
2716 &stac92xx_control_templates[type],
2717 idx, name, val);
2718}
2719
4682eee0
MR		 2720
2721/* add dynamic controls */
4d4e9bb3
TI		 2722static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2723 const char *name, unsigned long val)
4682eee0
MR		 2724{
2725 return stac92xx_add_control_idx(spec, type, 0, name, val);
2726}
2727
403d1944
MP		 2728/* flag inputs as additional dynamic lineouts */
2729static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2730{
2731 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2732 unsigned int wcaps, wtype;
2733 int i, num_dacs = 0;
2734
2735 /* use the wcaps cache to count all DACs available for line-outs */
2736 for (i = 0; i < codec->num_nodes; i++) {
2737 wcaps = codec->wcaps[i];
2738 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2739
7b043899
SL		 2740 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2741 num_dacs++;
2742 }
403d1944 2743
7b043899
SL		 2744 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2745
403d1944
MP		 2746 switch (cfg->line_outs) {
2747 case 3:
2748 /* add line-in as side */
7b043899 2749 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2750 cfg->line_out_pins[cfg->line_outs] =
2751 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2752 spec->line_switch = 1;
2753 cfg->line_outs++;
2754 }
2755 break;
2756 case 2:
2757 /* add line-in as clfe and mic as side */
7b043899 2758 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2759 cfg->line_out_pins[cfg->line_outs] =
2760 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2761 spec->line_switch = 1;
2762 cfg->line_outs++;
2763 }
7b043899 2764 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2765 cfg->line_out_pins[cfg->line_outs] =
2766 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2767 spec->mic_switch = 1;
2768 cfg->line_outs++;
2769 }
2770 break;
2771 case 1:
2772 /* add line-in as surr and mic as clfe */
7b043899 2773 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2774 cfg->line_out_pins[cfg->line_outs] =
2775 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2776 spec->line_switch = 1;
2777 cfg->line_outs++;
2778 }
7b043899 2779 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2780 cfg->line_out_pins[cfg->line_outs] =
2781 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2782 spec->mic_switch = 1;
2783 cfg->line_outs++;
2784 }
2785 break;
2786 }
2787
2788 return 0;
2789}
2790
7b043899
SL		 2791
2792static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2793{
2794 int i;
2795
2796 for (i = 0; i < spec->multiout.num_dacs; i++) {
2797 if (spec->multiout.dac_nids[i] == nid)
2798 return 1;
2799 }
2800
2801 return 0;
2802}
2803
3cc08dc6 2804/*
7b043899
SL		 2805 * Fill in the dac_nids table from the parsed pin configuration
2806 * This function only works when every pin in line_out_pins[]
2807 * contains atleast one DAC in its connection list. Some 92xx
2808 * codecs are not connected directly to a DAC, such as the 9200
2809 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2810 */
19039bd0 2811static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2812 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2813{
2814 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2815 int i, j, conn_len = 0;
2816 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2817 unsigned int wcaps, wtype;
2818
c7d4b2fa
M		 2819 for (i = 0; i < cfg->line_outs; i++) {
2820 nid = cfg->line_out_pins[i];
7b043899
SL		 2821 conn_len = snd_hda_get_connections(codec, nid, conn,
2822 HDA_MAX_CONNECTIONS);
2823 for (j = 0; j < conn_len; j++) {
2824 wcaps = snd_hda_param_read(codec, conn[j],
2825 AC_PAR_AUDIO_WIDGET_CAP);
2826 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2827 if (wtype != AC_WID_AUD_OUT ||
2828 (wcaps & AC_WCAP_DIGITAL))
2829 continue;
2830 /* conn[j] is a DAC routed to this line-out */
2831 if (!is_in_dac_nids(spec, conn[j]))
2832 break;
2833 }
2834
2835 if (j == conn_len) {
df802952
TI		 2836 if (spec->multiout.num_dacs > 0) {
2837 /* we have already working output pins,
2838 * so let's drop the broken ones again
2839 */
2840 cfg->line_outs = spec->multiout.num_dacs;
2841 break;
2842 }
7b043899
SL		 2843 /* error out, no available DAC found */
2844 snd_printk(KERN_ERR
2845 "%s: No available DAC for pin 0x%x\n",
2846 __func__, nid);
2847 return -ENODEV;
2848 }
2849
2850 spec->multiout.dac_nids[i] = conn[j];
2851 spec->multiout.num_dacs++;
2852 if (conn_len > 1) {
2853 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2854 snd_hda_codec_write_cache(codec, nid, 0,
2855 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2856
7b043899
SL		 2857 }
2858 }
c7d4b2fa 2859
7b043899
SL		 2860 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2861 spec->multiout.num_dacs,
2862 spec->multiout.dac_nids[0],
2863 spec->multiout.dac_nids[1],
2864 spec->multiout.dac_nids[2],
2865 spec->multiout.dac_nids[3],
2866 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2867 return 0;
2868}
2869
eb06ed8f
TI		 2870/* create volume control/switch for the given prefx type */
2871static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2872{
2873 char name[32];
2874 int err;
2875
2876 sprintf(name, "%s Playback Volume", pfx);
2877 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2878 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2879 if (err < 0)
2880 return err;
2881 sprintf(name, "%s Playback Switch", pfx);
2882 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2883 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2884 if (err < 0)
2885 return err;
2886 return 0;
2887}
2888
ae0afd81
MR		 2889static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2890{
2891 if (!spec->multiout.hp_nid)
2892 spec->multiout.hp_nid = nid;
2893 else if (spec->multiout.num_dacs > 4) {
2894 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2895 return 1;
2896 } else {
2897 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2898 spec->multiout.num_dacs++;
2899 }
2900 return 0;
2901}
2902
2903static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2904{
2905 if (is_in_dac_nids(spec, nid))
2906 return 1;
2907 if (spec->multiout.hp_nid == nid)
2908 return 1;
2909 return 0;
2910}
2911
c7d4b2fa 2912/* add playback controls from the parsed DAC table */
0fb87bb4 2913static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2914 const struct auto_pin_cfg *cfg)
c7d4b2fa 2915{
19039bd0
TI		 2916 static const char *chname[4] = {
2917 "Front", "Surround", NULL /*CLFE*/, "Side"
2918 };
d21995e3 2919 hda_nid_t nid = 0;
c7d4b2fa
M		 2920 int i, err;
2921
0fb87bb4 2922 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2923 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2924
2925
40ac8c4f 2926 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2927 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2928 continue;
2929
2930 nid = spec->multiout.dac_nids[i];
2931
2932 if (i == 2) {
2933 /* Center/LFE */
eb06ed8f
TI		 2934 err = create_controls(spec, "Center", nid, 1);
2935 if (err < 0)
c7d4b2fa 2936 return err;
eb06ed8f
TI		 2937 err = create_controls(spec, "LFE", nid, 2);
2938 if (err < 0)
c7d4b2fa 2939 return err;
0fb87bb4
ML		 2940
2941 wid_caps = get_wcaps(codec, nid);
2942
2943 if (wid_caps & AC_WCAP_LR_SWAP) {
2944 err = stac92xx_add_control(spec,
2945 STAC_CTL_WIDGET_CLFE_SWITCH,
2946 "Swap Center/LFE Playback Switch", nid);
2947
2948 if (err < 0)
2949 return err;
2950 }
2951
c7d4b2fa 2952 } else {
eb06ed8f
TI		 2953 err = create_controls(spec, chname[i], nid, 3);
2954 if (err < 0)
c7d4b2fa
M		 2955 return err;
2956 }
2957 }
2958
fedb7569
MR		 2959 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2960 cfg->hp_outs && !spec->multiout.hp_nid)
2961 spec->multiout.hp_nid = nid;
2962
7c2ba97b
MR		 2963 if (cfg->hp_outs > 1) {
2964 err = stac92xx_add_control(spec,
2965 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2966 "Headphone as Line Out Switch",
2967 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2968 if (err < 0)
2969 return err;
2970 }
2971
b5895dc8
MR		 2972 if (spec->line_switch) {
2973 nid = cfg->input_pins[AUTO_PIN_LINE];
2974 pincap = snd_hda_param_read(codec, nid,
2975 AC_PAR_PIN_CAP);
2976 if (pincap & AC_PINCAP_OUT) {
2977 err = stac92xx_add_control(spec,
2978 STAC_CTL_WIDGET_IO_SWITCH,
2979 "Line In as Output Switch", nid << 8);
2980 if (err < 0)
2981 return err;
2982 }
2983 }
403d1944 2984
b5895dc8 2985 if (spec->mic_switch) {
cace16f1 2986 unsigned int def_conf;
ae0afd81
MR		 2987 unsigned int mic_pin = AUTO_PIN_MIC;
2988again:
2989 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2990 def_conf = snd_hda_codec_read(codec, nid, 0,
2991 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2992 /* some laptops have an internal analog microphone
2993 * which can't be used as a output */
2994 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2995 pincap = snd_hda_param_read(codec, nid,
2996 AC_PAR_PIN_CAP);
2997 if (pincap & AC_PINCAP_OUT) {
2998 err = stac92xx_add_control(spec,
2999 STAC_CTL_WIDGET_IO_SWITCH,
3000 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 3001 nid = snd_hda_codec_read(codec, nid, 0,
3002 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3003 if (!check_in_dac_nids(spec, nid))
3004 add_spec_dacs(spec, nid);
cace16f1
MR		 3005 if (err < 0)
3006 return err;
3007 }
ae0afd81
MR		 3008 } else if (mic_pin == AUTO_PIN_MIC) {
3009 mic_pin = AUTO_PIN_FRONT_MIC;
3010 goto again;
b5895dc8
MR		 3011 }
3012 }
403d1944 3013
c7d4b2fa
M		 3014 return 0;
3015}
3016
eb06ed8f
TI		 3017/* add playback controls for Speaker and HP outputs */
3018static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3019 struct auto_pin_cfg *cfg)
3020{
3021 struct sigmatel_spec *spec = codec->spec;
3022 hda_nid_t nid;
3023 int i, old_num_dacs, err;
3024
3025 old_num_dacs = spec->multiout.num_dacs;
3026 for (i = 0; i < cfg->hp_outs; i++) {
3027 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3028 if (wid_caps & AC_WCAP_UNSOL_CAP)
3029 spec->hp_detect = 1;
3030 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
3031 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3032 if (check_in_dac_nids(spec, nid))
3033 nid = 0;
3034 if (! nid)
c7d4b2fa 3035 continue;
eb06ed8f
TI		 3036 add_spec_dacs(spec, nid);
3037 }
3038 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 3039 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 3040 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3041 if (check_in_dac_nids(spec, nid))
3042 nid = 0;
eb06ed8f
TI		 3043 if (! nid)
3044 continue;
3045 add_spec_dacs(spec, nid);
c7d4b2fa 3046 }
1b290a51
MR		 3047 for (i = 0; i < cfg->line_outs; i++) {
3048 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
3049 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
3050 if (check_in_dac_nids(spec, nid))
3051 nid = 0;
3052 if (! nid)
3053 continue;
3054 add_spec_dacs(spec, nid);
3055 }
eb06ed8f
TI		 3056 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3057 static const char *pfxs[] = {
3058 "Speaker", "External Speaker", "Speaker2",
3059 };
3060 err = create_controls(spec, pfxs[i - old_num_dacs],
3061 spec->multiout.dac_nids[i], 3);
3062 if (err < 0)
3063 return err;
3064 }
3065 if (spec->multiout.hp_nid) {
2626a263
TI		 3066 err = create_controls(spec, "Headphone",
3067 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3068 if (err < 0)
3069 return err;
3070 }
c7d4b2fa
M		 3071
3072 return 0;
3073}
3074
b22b4821 3075/* labels for mono mux outputs */
d0513fc6
MR		 3076static const char *stac92xx_mono_labels[4] = {
3077 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3078};
3079
3080/* create mono mux for mono out on capable codecs */
3081static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3082{
3083 struct sigmatel_spec *spec = codec->spec;
3084 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3085 int i, num_cons;
3086 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3087
3088 num_cons = snd_hda_get_connections(codec,
3089 spec->mono_nid,
3090 con_lst,
3091 HDA_MAX_NUM_INPUTS);
3092 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3093 return -EINVAL;
3094
3095 for (i = 0; i < num_cons; i++) {
3096 mono_mux->items[mono_mux->num_items].label =
3097 stac92xx_mono_labels[i];
3098 mono_mux->items[mono_mux->num_items].index = i;
3099 mono_mux->num_items++;
3100 }
09a99959
MR		 3101
3102 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3103 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3104}
3105
89385035
MR		 3106/* labels for amp mux outputs */
3107static const char *stac92xx_amp_labels[3] = {
4b33c767 3108 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3109};
3110
3111/* create amp out controls mux on capable codecs */
3112static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3113{
3114 struct sigmatel_spec *spec = codec->spec;
3115 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3116 int i, err;
3117
2a9c7816 3118 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3119 amp_mux->items[amp_mux->num_items].label =
3120 stac92xx_amp_labels[i];
3121 amp_mux->items[amp_mux->num_items].index = i;
3122 amp_mux->num_items++;
3123 }
3124
2a9c7816
MR		 3125 if (spec->num_amps > 1) {
3126 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3127 "Amp Selector Capture Switch", 0);
3128 if (err < 0)
3129 return err;
3130 }
89385035
MR		 3131 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3132 "Amp Capture Volume",
3133 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3134}
3135
3136
1cd2224c
MR		 3137/* create PC beep volume controls */
3138static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3139 hda_nid_t nid)
3140{
3141 struct sigmatel_spec *spec = codec->spec;
3142 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3143 int err;
3144
3145 /* check for mute support for the the amp */
3146 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3147 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3148 "PC Beep Playback Switch",
3149 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3150 if (err < 0)
3151 return err;
3152 }
3153
3154 /* check to see if there is volume support for the amp */
3155 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3156 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3157 "PC Beep Playback Volume",
3158 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3159 if (err < 0)
3160 return err;
3161 }
3162 return 0;
3163}
3164
4d4e9bb3
TI		 3165#ifdef CONFIG_SND_HDA_INPUT_BEEP
3166#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3167
3168static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3169 struct snd_ctl_elem_value *ucontrol)
3170{
3171 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3172 ucontrol->value.integer.value[0] = codec->beep->enabled;
3173 return 0;
3174}
3175
3176static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3177 struct snd_ctl_elem_value *ucontrol)
3178{
3179 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3180 int enabled = !!ucontrol->value.integer.value[0];
3181 if (codec->beep->enabled != enabled) {
3182 codec->beep->enabled = enabled;
3183 return 1;
3184 }
3185 return 0;
3186}
3187
3188static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3189 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3190 .info = stac92xx_dig_beep_switch_info,
3191 .get = stac92xx_dig_beep_switch_get,
3192 .put = stac92xx_dig_beep_switch_put,
3193};
3194
3195static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3196{
3197 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3198 0, "PC Beep Playback Switch", 0);
3199}
3200#endif
3201
4682eee0
MR		 3202static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3203{
3204 struct sigmatel_spec *spec = codec->spec;
3205 int wcaps, nid, i, err = 0;
3206
3207 for (i = 0; i < spec->num_muxes; i++) {
3208 nid = spec->mux_nids[i];
3209 wcaps = get_wcaps(codec, nid);
3210
3211 if (wcaps & AC_WCAP_OUT_AMP) {
3212 err = stac92xx_add_control_idx(spec,
3213 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3214 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3215 if (err < 0)
3216 return err;
3217 }
3218 }
3219 return 0;
3220};
3221
d9737751 3222static const char *stac92xx_spdif_labels[3] = {
65973632 3223 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3224};
3225
3226static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3227{
3228 struct sigmatel_spec *spec = codec->spec;
3229 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3230 const char **labels = spec->spdif_labels;
d9737751 3231 int i, num_cons;
65973632 3232 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3233
3234 num_cons = snd_hda_get_connections(codec,
3235 spec->smux_nids[0],
3236 con_lst,
3237 HDA_MAX_NUM_INPUTS);
65973632 3238 if (!num_cons)
d9737751
MR		 3239 return -EINVAL;
3240
65973632
MR		 3241 if (!labels)
3242 labels = stac92xx_spdif_labels;
3243
d9737751 3244 for (i = 0; i < num_cons; i++) {
65973632 3245 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3246 spdif_mux->items[spdif_mux->num_items].index = i;
3247 spdif_mux->num_items++;
3248 }
3249
3250 return 0;
3251}
3252
8b65727b 3253/* labels for dmic mux inputs */
ddc2cec4 3254static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3255 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3256 "Digital Mic 3", "Digital Mic 4"
3257};
3258
3259/* create playback/capture controls for input pins on dmic capable codecs */
3260static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3261 const struct auto_pin_cfg *cfg)
3262{
3263 struct sigmatel_spec *spec = codec->spec;
3264 struct hda_input_mux *dimux = &spec->private_dimux;
3265 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3266 int err, i, j;
3267 char name[32];
8b65727b
MP		 3268
3269 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3270 dimux->items[dimux->num_items].index = 0;
3271 dimux->num_items++;
3272
3273 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3274 hda_nid_t nid;
8b65727b
MP		 3275 int index;
3276 int num_cons;
0678accd 3277 unsigned int wcaps;
8b65727b
MP		 3278 unsigned int def_conf;
3279
3280 def_conf = snd_hda_codec_read(codec,
3281 spec->dmic_nids[i],
3282 0,
3283 AC_VERB_GET_CONFIG_DEFAULT,
3284 0);
3285 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3286 continue;
3287
0678accd 3288 nid = spec->dmic_nids[i];
8b65727b 3289 num_cons = snd_hda_get_connections(codec,
e1f0d669 3290 spec->dmux_nids[0],
8b65727b
MP		 3291 con_lst,
3292 HDA_MAX_NUM_INPUTS);
3293 for (j = 0; j < num_cons; j++)
0678accd 3294 if (con_lst[j] == nid) {
8b65727b
MP		 3295 index = j;
3296 goto found;
3297 }
3298 continue;
3299found:
d0513fc6
MR		 3300 wcaps = get_wcaps(codec, nid) &
3301 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3302
d0513fc6 3303 if (wcaps) {
0678accd
MR		 3304 sprintf(name, "%s Capture Volume",
3305 stac92xx_dmic_labels[dimux->num_items]);
3306
3307 err = stac92xx_add_control(spec,
3308 STAC_CTL_WIDGET_VOL,
3309 name,
d0513fc6
MR		 3310 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3311 (wcaps & AC_WCAP_OUT_AMP) ?
3312 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3313 if (err < 0)
3314 return err;
3315 }
3316
8b65727b
MP		 3317 dimux->items[dimux->num_items].label =
3318 stac92xx_dmic_labels[dimux->num_items];
3319 dimux->items[dimux->num_items].index = index;
3320 dimux->num_items++;
3321 }
3322
3323 return 0;
3324}
3325
c7d4b2fa
M		 3326/* create playback/capture controls for input pins */
3327static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3328{
3329 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3330 struct hda_input_mux *imux = &spec->private_imux;
3331 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3332 int i, j, k;
3333
3334 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3335 int index;
3336
3337 if (!cfg->input_pins[i])
3338 continue;
3339 index = -1;
3340 for (j = 0; j < spec->num_muxes; j++) {
3341 int num_cons;
3342 num_cons = snd_hda_get_connections(codec,
3343 spec->mux_nids[j],
3344 con_lst,
3345 HDA_MAX_NUM_INPUTS);
3346 for (k = 0; k < num_cons; k++)
3347 if (con_lst[k] == cfg->input_pins[i]) {
3348 index = k;
3349 goto found;
3350 }
c7d4b2fa 3351 }
314634bc
TI		 3352 continue;
3353 found:
3354 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3355 imux->items[imux->num_items].index = index;
3356 imux->num_items++;
c7d4b2fa
M		 3357 }
3358
7b043899 3359 if (imux->num_items) {
62fe78e9
SR		 3360 /*
3361 * Set the current input for the muxes.
3362 * The STAC9221 has two input muxes with identical source
3363 * NID lists. Hopefully this won't get confused.
3364 */
3365 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3366 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3367 AC_VERB_SET_CONNECT_SEL,
3368 imux->items[0].index);
62fe78e9
SR		 3369 }
3370 }
3371
c7d4b2fa
M		 3372 return 0;
3373}
3374
c7d4b2fa
M		 3375static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3376{
3377 struct sigmatel_spec *spec = codec->spec;
3378 int i;
3379
3380 for (i = 0; i < spec->autocfg.line_outs; i++) {
3381 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3382 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3383 }
3384}
3385
3386static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3387{
3388 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3389 int i;
c7d4b2fa 3390
eb06ed8f
TI		 3391 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3392 hda_nid_t pin;
3393 pin = spec->autocfg.hp_pins[i];
3394 if (pin) /* connect to front */
3395 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3396 }
3397 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3398 hda_nid_t pin;
3399 pin = spec->autocfg.speaker_pins[i];
3400 if (pin) /* connect to front */
3401 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3402 }
c7d4b2fa
M		 3403}
3404
3cc08dc6 3405static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3406{
3407 struct sigmatel_spec *spec = codec->spec;
3408 int err;
bcecd9bd 3409 int hp_speaker_swap = 0;
c7d4b2fa 3410
8b65727b
MP		 3411 if ((err = snd_hda_parse_pin_def_config(codec,
3412 &spec->autocfg,
3413 spec->dmic_nids)) < 0)
c7d4b2fa 3414 return err;
82bc955f 3415 if (! spec->autocfg.line_outs)
869264c4 3416 return 0; /* can't find valid pin config */
19039bd0 3417
bcecd9bd
JZ		 3418 /* If we have no real line-out pin and multiple hp-outs, HPs should
3419 * be set up as multi-channel outputs.
3420 */
3421 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3422 spec->autocfg.hp_outs > 1) {
3423 /* Copy hp_outs to line_outs, backup line_outs in
3424 * speaker_outs so that the following routines can handle
3425 * HP pins as primary outputs.
3426 */
3427 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3428 sizeof(spec->autocfg.line_out_pins));
3429 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3430 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3431 sizeof(spec->autocfg.hp_pins));
3432 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3433 hp_speaker_swap = 1;
3434 }
09a99959 3435 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3436 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3437 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3438 u32 caps = query_amp_caps(codec,
3439 spec->autocfg.mono_out_pin, dir);
3440 hda_nid_t conn_list[1];
3441
3442 /* get the mixer node and then the mono mux if it exists */
3443 if (snd_hda_get_connections(codec,
3444 spec->autocfg.mono_out_pin, conn_list, 1) &&
3445 snd_hda_get_connections(codec, conn_list[0],
3446 conn_list, 1)) {
3447
3448 int wcaps = get_wcaps(codec, conn_list[0]);
3449 int wid_type = (wcaps & AC_WCAP_TYPE)
3450 >> AC_WCAP_TYPE_SHIFT;
3451 /* LR swap check, some stac925x have a mux that
3452 * changes the DACs output path instead of the
3453 * mono-mux path.
3454 */
3455 if (wid_type == AC_WID_AUD_SEL &&
3456 !(wcaps & AC_WCAP_LR_SWAP))
3457 spec->mono_nid = conn_list[0];
3458 }
d0513fc6
MR		 3459 if (dir) {
3460 hda_nid_t nid = spec->autocfg.mono_out_pin;
3461
3462 /* most mono outs have a least a mute/unmute switch */
3463 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3464 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3465 "Mono Playback Switch",
3466 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3467 if (err < 0)
3468 return err;
d0513fc6
MR		 3469 /* check for volume support for the amp */
3470 if ((caps & AC_AMPCAP_NUM_STEPS)
3471 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3472 err = stac92xx_add_control(spec,
3473 STAC_CTL_WIDGET_VOL,
3474 "Mono Playback Volume",
3475 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3476 if (err < 0)
3477 return err;
3478 }
09a99959
MR		 3479 }
3480
3481 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3482 AC_PINCTL_OUT_EN);
3483 }
bcecd9bd 3484
403d1944
MP		 3485 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3486 return err;
19039bd0
TI		 3487 if (spec->multiout.num_dacs == 0)
3488 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3489 return err;
c7d4b2fa 3490
0fb87bb4
ML		 3491 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3492
3493 if (err < 0)
3494 return err;
3495
1cd2224c
MR		 3496 /* setup analog beep controls */
3497 if (spec->anabeep_nid > 0) {
3498 err = stac92xx_auto_create_beep_ctls(codec,
3499 spec->anabeep_nid);
3500 if (err < 0)
3501 return err;
3502 }
3503
3504 /* setup digital beep controls and input device */
3505#ifdef CONFIG_SND_HDA_INPUT_BEEP
3506 if (spec->digbeep_nid > 0) {
3507 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3508 unsigned int caps;
1cd2224c
MR		 3509
3510 err = stac92xx_auto_create_beep_ctls(codec, nid);
3511 if (err < 0)
3512 return err;
3513 err = snd_hda_attach_beep_device(codec, nid);
3514 if (err < 0)
3515 return err;
4d4e9bb3
TI		 3516 /* if no beep switch is available, make its own one */
3517 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3518 if (codec->beep &&
3519 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3520 err = stac92xx_beep_switch_ctl(codec);
3521 if (err < 0)
3522 return err;
3523 }
1cd2224c
MR		 3524 }
3525#endif
3526
bcecd9bd
JZ		 3527 if (hp_speaker_swap == 1) {
3528 /* Restore the hp_outs and line_outs */
3529 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3530 sizeof(spec->autocfg.line_out_pins));
3531 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3532 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3533 sizeof(spec->autocfg.speaker_pins));
3534 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3535 memset(spec->autocfg.speaker_pins, 0,
3536 sizeof(spec->autocfg.speaker_pins));
3537 spec->autocfg.speaker_outs = 0;
3538 }
3539
0fb87bb4
ML		 3540 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3541
3542 if (err < 0)
3543 return err;
3544
3545 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3546
3547 if (err < 0)
c7d4b2fa
M		 3548 return err;
3549
b22b4821
MR		 3550 if (spec->mono_nid > 0) {
3551 err = stac92xx_auto_create_mono_output_ctls(codec);
3552 if (err < 0)
3553 return err;
3554 }
2a9c7816 3555 if (spec->num_amps > 0) {
89385035
MR		 3556 err = stac92xx_auto_create_amp_output_ctls(codec);
3557 if (err < 0)
3558 return err;
3559 }
2a9c7816 3560 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3561 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3562 &spec->autocfg)) < 0)
3563 return err;
4682eee0
MR		 3564 if (spec->num_muxes > 0) {
3565 err = stac92xx_auto_create_mux_input_ctls(codec);
3566 if (err < 0)
3567 return err;
3568 }
d9737751
MR		 3569 if (spec->num_smuxes > 0) {
3570 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3571 if (err < 0)
3572 return err;
3573 }
8b65727b 3574
c7d4b2fa 3575 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3576 if (spec->multiout.max_channels > 2)
c7d4b2fa 3577 spec->surr_switch = 1;
c7d4b2fa 3578
82bc955f 3579 if (spec->autocfg.dig_out_pin)
3cc08dc6 3580 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3581 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3582 spec->dig_in_nid = dig_in;
c7d4b2fa 3583
603c4019
TI		 3584 if (spec->kctls.list)
3585 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3586
3587 spec->input_mux = &spec->private_imux;
2a9c7816 3588 spec->dinput_mux = &spec->private_dimux;
d9737751 3589 spec->sinput_mux = &spec->private_smux;
b22b4821 3590 spec->mono_mux = &spec->private_mono_mux;
89385035 3591 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3592 return 1;
3593}
3594
82bc955f
TI		 3595/* add playback controls for HP output */
3596static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3597 struct auto_pin_cfg *cfg)
3598{
3599 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3600 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3601 unsigned int wid_caps;
3602
3603 if (! pin)
3604 return 0;
3605
3606 wid_caps = get_wcaps(codec, pin);
505cb341 3607 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3608 spec->hp_detect = 1;
82bc955f
TI		 3609
3610 return 0;
3611}
3612
160ea0dc
RF		 3613/* add playback controls for LFE output */
3614static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3615 struct auto_pin_cfg *cfg)
3616{
3617 struct sigmatel_spec *spec = codec->spec;
3618 int err;
3619 hda_nid_t lfe_pin = 0x0;
3620 int i;
3621
3622 /*
3623 * search speaker outs and line outs for a mono speaker pin
3624 * with an amp. If one is found, add LFE controls
3625 * for it.
3626 */
3627 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3628 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3629 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3630 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3631 if (wcaps == AC_WCAP_OUT_AMP)
3632 /* found a mono speaker with an amp, must be lfe */
3633 lfe_pin = pin;
3634 }
3635
3636 /* if speaker_outs is 0, then speakers may be in line_outs */
3637 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3638 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3639 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3640 unsigned int defcfg;
8b551785 3641 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3642 AC_VERB_GET_CONFIG_DEFAULT,
3643 0x00);
8b551785 3644 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3645 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3646 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3647 if (wcaps == AC_WCAP_OUT_AMP)
3648 /* found a mono speaker with an amp,
3649 must be lfe */
3650 lfe_pin = pin;
3651 }
3652 }
3653 }
3654
3655 if (lfe_pin) {
eb06ed8f 3656 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3657 if (err < 0)
3658 return err;
3659 }
3660
3661 return 0;
3662}
3663
c7d4b2fa
M		 3664static int stac9200_parse_auto_config(struct hda_codec *codec)
3665{
3666 struct sigmatel_spec *spec = codec->spec;
3667 int err;
3668
df694daa 3669 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3670 return err;
3671
3672 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3673 return err;
3674
82bc955f
TI		 3675 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3676 return err;
3677
160ea0dc
RF		 3678 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3679 return err;
3680
355a0ec4
TI		 3681 if (spec->num_muxes > 0) {
3682 err = stac92xx_auto_create_mux_input_ctls(codec);
3683 if (err < 0)
3684 return err;
3685 }
3686
82bc955f 3687 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3688 spec->multiout.dig_out_nid = 0x05;
82bc955f 3689 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3690 spec->dig_in_nid = 0x04;
c7d4b2fa 3691
603c4019
TI		 3692 if (spec->kctls.list)
3693 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3694
3695 spec->input_mux = &spec->private_imux;
8b65727b 3696 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3697
3698 return 1;
3699}
3700
62fe78e9
SR		 3701/*
3702 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3703 * funky external mute control using GPIO pins.
3704 */
3705
76e1ddfb 3706static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3707 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3708{
3709 unsigned int gpiostate, gpiomask, gpiodir;
3710
3711 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3712 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3713 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3714
3715 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3716 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3717 gpiomask |= mask;
62fe78e9
SR		 3718
3719 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3720 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3721 gpiodir |= dir_mask;
62fe78e9 3722
76e1ddfb 3723 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3724 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3725
3726 snd_hda_codec_write(codec, codec->afg, 0,
3727 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3728 snd_hda_codec_read(codec, codec->afg, 0,
3729 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3730
3731 msleep(1);
3732
76e1ddfb
TI		 3733 snd_hda_codec_read(codec, codec->afg, 0,
3734 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3735}
3736
74aeaabc
MR		 3737static int stac92xx_add_jack(struct hda_codec *codec,
3738 hda_nid_t nid, int type)
3739{
e4973e1e 3740#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3741 struct sigmatel_spec *spec = codec->spec;
3742 struct sigmatel_jack *jack;
3743 int def_conf = snd_hda_codec_read(codec, nid,
3744 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3745 int connectivity = get_defcfg_connect(def_conf);
3746 char name[32];
3747
3748 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3749 return 0;
3750
3751 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3752 jack = snd_array_new(&spec->jacks);
3753 if (!jack)
3754 return -ENOMEM;
3755 jack->nid = nid;
3756 jack->type = type;
3757
3758 sprintf(name, "%s at %s %s Jack",
3759 snd_hda_get_jack_type(def_conf),
3760 snd_hda_get_jack_connectivity(def_conf),
3761 snd_hda_get_jack_location(def_conf));
3762
3763 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3764#else
3765 return 0;
3766#endif
74aeaabc
MR		 3767}
3768
3769static int stac92xx_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3770 int data)
3771{
3772 struct sigmatel_event *event;
3773
3774 snd_array_init(&spec->events, sizeof(*event), 32);
3775 event = snd_array_new(&spec->events);
3776 if (!event)
3777 return -ENOMEM;
3778 event->nid = nid;
3779 event->data = data;
3780
3781 return 0;
3782}
3783
3784static int stac92xx_event_data(struct hda_codec *codec, hda_nid_t nid)
3785{
3786 struct sigmatel_spec *spec = codec->spec;
3787 struct sigmatel_event *events = spec->events.list;
3788 if (events) {
3789 int i;
3790 for (i = 0; i < spec->events.used; i++)
3791 if (events[i].nid == nid)
3792 return events[i].data;
3793 }
3794 return 0;
3795}
3796
314634bc
TI		 3797static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3798 unsigned int event)
3799{
74aeaabc 3800 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
dc81bed1
TI		 3801 snd_hda_codec_write_cache(codec, nid, 0,
3802 AC_VERB_SET_UNSOLICITED_ENABLE,
74aeaabc
MR		 3803 (AC_USRSP_EN | event | nid));
3804 }
314634bc
TI		 3805}
3806
a64135a2
MR		 3807static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3808{
3809 int i;
3810 for (i = 0; i < cfg->hp_outs; i++)
3811 if (cfg->hp_pins[i] == nid)
3812 return 1; /* nid is a HP-Out */
3813
3814 return 0; /* nid is not a HP-Out */
3815};
3816
b76c850f
MR		 3817static void stac92xx_power_down(struct hda_codec *codec)
3818{
3819 struct sigmatel_spec *spec = codec->spec;
3820
3821 /* power down inactive DACs */
3822 hda_nid_t *dac;
3823 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3824 if (!is_in_dac_nids(spec, *dac) &&
3825 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3826 snd_hda_codec_write_cache(codec, *dac, 0,
3827 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3828}
3829
c7d4b2fa
M		 3830static int stac92xx_init(struct hda_codec *codec)
3831{
3832 struct sigmatel_spec *spec = codec->spec;
82bc955f 3833 struct auto_pin_cfg *cfg = &spec->autocfg;
e4973e1e 3834 int i;
c7d4b2fa 3835
c7d4b2fa
M		 3836 snd_hda_sequence_write(codec, spec->init);
3837
8daaaa97
MR		 3838 /* power down adcs initially */
3839 if (spec->powerdown_adcs)
3840 for (i = 0; i < spec->num_adcs; i++)
3841 snd_hda_codec_write_cache(codec,
3842 spec->adc_nids[i], 0,
3843 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3844 /* set up pins */
3845 if (spec->hp_detect) {
505cb341 3846 /* Enable unsolicited responses on the HP widget */
74aeaabc 3847 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc
MR		 3848 hda_nid_t nid = cfg->hp_pins[i];
3849 enable_pin_detect(codec, nid, STAC_HP_EVENT | nid);
74aeaabc 3850 }
0a07acaf
TI		 3851 /* force to enable the first line-out; the others are set up
3852 * in unsol_event
3853 */
3854 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3855 AC_PINCTL_OUT_EN);
82bc955f 3856 /* fake event to set up pins */
74aeaabc
MR		 3857 codec->patch_ops.unsol_event(codec,
3858 (STAC_HP_EVENT | spec->autocfg.hp_pins[0]) << 26);
82bc955f
TI		 3859 } else {
3860 stac92xx_auto_init_multi_out(codec);
3861 stac92xx_auto_init_hp_out(codec);
3862 }
3863 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3864 hda_nid_t nid = cfg->input_pins[i];
3865 if (nid) {
4f1e6bc3
TI		 3866 unsigned int pinctl;
3867 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3868 /* for mic pins, force to initialize */
3869 pinctl = stac92xx_get_vref(codec, nid);
3870 } else {
3871 pinctl = snd_hda_codec_read(codec, nid, 0,
3872 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3873 /* if PINCTL already set then skip */
3874 if (pinctl & AC_PINCTL_IN_EN)
3875 continue;
3876 }
3877 pinctl |= AC_PINCTL_IN_EN;
c960a03b 3878 stac92xx_auto_set_pinctl(codec, nid, pinctl);
74aeaabc 3879 enable_pin_detect(codec, nid, STAC_INSERT_EVENT | nid);
c960a03b 3880 }
82bc955f 3881 }
a64135a2
MR		 3882 for (i = 0; i < spec->num_dmics; i++)
3883 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3884 AC_PINCTL_IN_EN);
3885 for (i = 0; i < spec->num_pwrs; i++) {
3886 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3887 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3888 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3889 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3890 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3891 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3892 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3893 /* outputs are only ports capable of power management
3894 * any attempts on powering down a input port cause the
3895 * referenced VREF to act quirky.
3896 */
3897 if (pinctl & AC_PINCTL_IN_EN)
3898 continue;
aafc4412
MR		 3899 /* skip any ports that don't have jacks since presence
3900 * detection is useless */
3901 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3902 continue;
a64135a2
MR		 3903 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3904 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3905 }
b76c850f
MR		 3906 if (spec->dac_list)
3907 stac92xx_power_down(codec);
82bc955f
TI		 3908 if (cfg->dig_out_pin)
3909 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3910 AC_PINCTL_OUT_EN);
3911 if (cfg->dig_in_pin)
3912 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3913 AC_PINCTL_IN_EN);
3914
4fe5195c
MR		 3915 stac_gpio_set(codec, spec->gpio_mask,
3916 spec->gpio_dir, spec->gpio_data);
62fe78e9 3917
c7d4b2fa
M		 3918 return 0;
3919}
3920
74aeaabc
MR		 3921static void stac92xx_free_jacks(struct hda_codec *codec)
3922{
e4973e1e 3923#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3924 struct sigmatel_spec *spec = codec->spec;
3925 if (spec->jacks.list) {
3926 struct sigmatel_jack *jacks = spec->jacks.list;
3927 int i;
3928 for (i = 0; i < spec->jacks.used; i++)
3929 snd_device_free(codec->bus->card, &jacks[i].jack);
3930 }
3931 snd_array_free(&spec->jacks);
e4973e1e 3932#endif
74aeaabc
MR		 3933}
3934
603c4019
TI		 3935static void stac92xx_free_kctls(struct hda_codec *codec)
3936{
3937 struct sigmatel_spec *spec = codec->spec;
3938
3939 if (spec->kctls.list) {
3940 struct snd_kcontrol_new *kctl = spec->kctls.list;
3941 int i;
3942 for (i = 0; i < spec->kctls.used; i++)
3943 kfree(kctl[i].name);
3944 }
3945 snd_array_free(&spec->kctls);
3946}
3947
2f2f4251
M		 3948static void stac92xx_free(struct hda_codec *codec)
3949{
c7d4b2fa 3950 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3951
3952 if (! spec)
3953 return;
3954
af9f341a 3955 kfree(spec->pin_configs);
74aeaabc
MR		 3956 stac92xx_free_jacks(codec);
3957 snd_array_free(&spec->events);
11b44bbd 3958
c7d4b2fa 3959 kfree(spec);
1cd2224c 3960 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3961}
3962
4e55096e
M		 3963static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3964 unsigned int flag)
3965{
3966 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3967 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3968
f9acba43
TI		 3969 if (pin_ctl & AC_PINCTL_IN_EN) {
3970 /*
3971 * we need to check the current set-up direction of
3972 * shared input pins since they can be switched via
3973 * "xxx as Output" mixer switch
3974 */
3975 struct sigmatel_spec *spec = codec->spec;
3976 struct auto_pin_cfg *cfg = &spec->autocfg;
3977 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3978 spec->line_switch) ||
3979 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3980 spec->mic_switch))
3981 return;
3982 }
3983
7b043899
SL		 3984 /* if setting pin direction bits, clear the current
3985 direction bits first */
3986 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3987 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3988
82beb8fd 3989 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3990 AC_VERB_SET_PIN_WIDGET_CONTROL,
3991 pin_ctl | flag);
3992}
3993
3994static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3995 unsigned int flag)
3996{
3997 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3998 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3999 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4000 AC_VERB_SET_PIN_WIDGET_CONTROL,
4001 pin_ctl & ~flag);
4002}
4003
40c1d308 4004static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4005{
4006 if (!nid)
4007 return 0;
4008 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 4009 & (1 << 31)) {
4010 unsigned int pinctl;
4011 pinctl = snd_hda_codec_read(codec, nid, 0,
4012 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4013 if (pinctl & AC_PINCTL_IN_EN)
4014 return 0; /* mic- or line-input */
4015 else
4016 return 1; /* HP-output */
4017 }
314634bc
TI		 4018 return 0;
4019}
4020
d7a89436
TI		 4021/* return non-zero if the hp-pin of the given array index isn't
4022 * a jack-detection target
4023 */
4024static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4025{
4026 struct auto_pin_cfg *cfg = &spec->autocfg;
4027
4028 /* ignore sensing of shared line and mic jacks */
4029 if (spec->line_switch &&
4030 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
4031 return 1;
4032 if (spec->mic_switch &&
4033 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
4034 return 1;
4035 /* ignore if the pin is set as line-out */
4036 if (cfg->hp_pins[i] == spec->hp_switch)
4037 return 1;
4038 return 0;
4039}
4040
314634bc 4041static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 4042{
4043 struct sigmatel_spec *spec = codec->spec;
4044 struct auto_pin_cfg *cfg = &spec->autocfg;
4045 int i, presence;
4046
eb06ed8f 4047 presence = 0;
4fe5195c
MR		 4048 if (spec->gpio_mute)
4049 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4050 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4051
eb06ed8f 4052 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4053 if (presence)
4054 break;
d7a89436
TI		 4055 if (no_hp_sensing(spec, i))
4056 continue;
4fe5195c 4057 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 4058 }
4e55096e
M		 4059
4060 if (presence) {
d7a89436 4061 /* disable lineouts */
7c2ba97b 4062 if (spec->hp_switch)
d7a89436
TI		 4063 stac92xx_reset_pinctl(codec, spec->hp_switch,
4064 AC_PINCTL_OUT_EN);
4e55096e
M		 4065 for (i = 0; i < cfg->line_outs; i++)
4066 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4067 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4068 for (i = 0; i < cfg->speaker_outs; i++)
4069 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4070 AC_PINCTL_OUT_EN);
c0cea0d0 4071 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4072 stac_gpio_set(codec, spec->gpio_mask,
4073 spec->gpio_dir, spec->gpio_data &
4074 ~spec->eapd_mask);
4e55096e 4075 } else {
d7a89436 4076 /* enable lineouts */
7c2ba97b 4077 if (spec->hp_switch)
d7a89436
TI		 4078 stac92xx_set_pinctl(codec, spec->hp_switch,
4079 AC_PINCTL_OUT_EN);
4e55096e
M		 4080 for (i = 0; i < cfg->line_outs; i++)
4081 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4082 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4083 for (i = 0; i < cfg->speaker_outs; i++)
4084 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4085 AC_PINCTL_OUT_EN);
c0cea0d0 4086 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4087 stac_gpio_set(codec, spec->gpio_mask,
4088 spec->gpio_dir, spec->gpio_data |
4089 spec->eapd_mask);
4e55096e 4090 }
d7a89436
TI		 4091 /* toggle hp outs */
4092 for (i = 0; i < cfg->hp_outs; i++) {
4093 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4094 if (no_hp_sensing(spec, i))
4095 continue;
4096 if (presence)
4097 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4098 else
4099 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4100 }
4e55096e
M		 4101}
4102
a64135a2
MR		 4103static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
4104{
4105 struct sigmatel_spec *spec = codec->spec;
4106 hda_nid_t nid = spec->pwr_nids[idx];
4107 int presence, val;
4108 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
4109 & 0x000000ff;
4110 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 4111
4112 /* several codecs have two power down bits */
4113 if (spec->pwr_mapping)
4114 idx = spec->pwr_mapping[idx];
4115 else
4116 idx = 1 << idx;
a64135a2
MR		 4117
4118 if (presence)
4119 val &= ~idx;
4120 else
4121 val |= idx;
4122
4123 /* power down unused output ports */
4124 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4125}
4126
4127static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4128{
4129 struct sigmatel_spec *spec = codec->spec;
4130 struct sigmatel_jack *jacks = spec->jacks.list;
4131
4132 if (jacks) {
4133 int i;
4134 for (i = 0; i < spec->jacks.used; i++) {
4135 if (jacks->nid == nid) {
4136 unsigned int pin_ctl =
4137 snd_hda_codec_read(codec, nid,
4138 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4139 0x00);
4140 int type = jacks->type;
4141 if (type == (SND_JACK_LINEOUT
4142 | SND_JACK_HEADPHONE))
4143 type = (pin_ctl & AC_PINCTL_HP_EN)
4144 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4145 snd_jack_report(jacks->jack,
4146 get_hp_pin_presence(codec, nid)
4147 ? type : 0);
4148 }
4149 jacks++;
4150 }
4151 }
4152}
a64135a2 4153
314634bc
TI		 4154static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4155{
a64135a2 4156 struct sigmatel_spec *spec = codec->spec;
74aeaabc
MR		 4157 int event = (res >> 26) & 0x70;
4158 int nid = res >> 26 & 0x0f;
a64135a2 4159
74aeaabc 4160 switch (event) {
314634bc
TI		 4161 case STAC_HP_EVENT:
4162 stac92xx_hp_detect(codec, res);
a64135a2 4163 /* fallthru */
74aeaabc 4164 case STAC_INSERT_EVENT:
a64135a2 4165 case STAC_PWR_EVENT:
74aeaabc
MR		 4166 if (nid) {
4167 if (spec->num_pwrs > 0)
4168 stac92xx_pin_sense(codec, nid);
4169 stac92xx_report_jack(codec, nid);
4170 }
72474be6
MR		 4171 break;
4172 case STAC_VREF_EVENT: {
4173 int data = snd_hda_codec_read(codec, codec->afg, 0,
4174 AC_VERB_GET_GPIO_DATA, 0);
74aeaabc 4175 int idx = stac92xx_event_data(codec, nid);
72474be6
MR		 4176 /* toggle VREF state based on GPIOx status */
4177 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
4178 !!(data & (1 << idx)));
4179 break;
4180 }
314634bc
TI		 4181 }
4182}
4183
cb53c626 4184#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4185static int stac92xx_resume(struct hda_codec *codec)
4186{
dc81bed1
TI		 4187 struct sigmatel_spec *spec = codec->spec;
4188
11b44bbd 4189 stac92xx_set_config_regs(codec);
2c885878 4190 stac92xx_init(codec);
82beb8fd
TI		 4191 snd_hda_codec_resume_amp(codec);
4192 snd_hda_codec_resume_cache(codec);
2c885878 4193 /* fake event to set up pins again to override cached values */
dc81bed1 4194 if (spec->hp_detect)
2c885878
TI		 4195 codec->patch_ops.unsol_event(codec,
4196 (STAC_HP_EVENT | spec->autocfg.hp_pins[0]) << 26);
ff6fdc37
M		 4197 return 0;
4198}
c6798d2b
MR		 4199
4200static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4201{
4202 struct sigmatel_spec *spec = codec->spec;
4203 if (spec->eapd_mask)
4204 stac_gpio_set(codec, spec->gpio_mask,
4205 spec->gpio_dir, spec->gpio_data &
4206 ~spec->eapd_mask);
4207 return 0;
4208}
ff6fdc37
M		 4209#endif
4210
2f2f4251
M		 4211static struct hda_codec_ops stac92xx_patch_ops = {
4212 .build_controls = stac92xx_build_controls,
4213 .build_pcms = stac92xx_build_pcms,
4214 .init = stac92xx_init,
4215 .free = stac92xx_free,
4e55096e 4216 .unsol_event = stac92xx_unsol_event,
cb53c626 4217#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4218 .suspend = stac92xx_suspend,
ff6fdc37
M		 4219 .resume = stac92xx_resume,
4220#endif
2f2f4251
M		 4221};
4222
4223static int patch_stac9200(struct hda_codec *codec)
4224{
4225 struct sigmatel_spec *spec;
c7d4b2fa 4226 int err;
2f2f4251 4227
e560d8d8 4228 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4229 if (spec == NULL)
4230 return -ENOMEM;
4231
4232 codec->spec = spec;
a4eed138 4233 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4234 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4235 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4236 stac9200_models,
4237 stac9200_cfg_tbl);
11b44bbd
RF		 4238 if (spec->board_config < 0) {
4239 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4240 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4241 } else
4242 err = stac_save_pin_cfgs(codec,
4243 stac9200_brd_tbl[spec->board_config]);
4244 if (err < 0) {
4245 stac92xx_free(codec);
4246 return err;
403d1944 4247 }
2f2f4251
M		 4248
4249 spec->multiout.max_channels = 2;
4250 spec->multiout.num_dacs = 1;
4251 spec->multiout.dac_nids = stac9200_dac_nids;
4252 spec->adc_nids = stac9200_adc_nids;
4253 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4254 spec->num_muxes = 1;
8b65727b 4255 spec->num_dmics = 0;
9e05b7a3 4256 spec->num_adcs = 1;
a64135a2 4257 spec->num_pwrs = 0;
c7d4b2fa 4258
bf277785
TD		 4259 if (spec->board_config == STAC_9200_GATEWAY ||
4260 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4261 spec->init = stac9200_eapd_init;
4262 else
4263 spec->init = stac9200_core_init;
2f2f4251 4264 spec->mixer = stac9200_mixer;
c7d4b2fa 4265
117f257d
TI		 4266 if (spec->board_config == STAC_9200_PANASONIC) {
4267 spec->gpio_mask = spec->gpio_dir = 0x09;
4268 spec->gpio_data = 0x00;
4269 }
4270
c7d4b2fa
M		 4271 err = stac9200_parse_auto_config(codec);
4272 if (err < 0) {
4273 stac92xx_free(codec);
4274 return err;
4275 }
2f2f4251
M		 4276
4277 codec->patch_ops = stac92xx_patch_ops;
4278
4279 return 0;
4280}
4281
8e21c34c
TD		 4282static int patch_stac925x(struct hda_codec *codec)
4283{
4284 struct sigmatel_spec *spec;
4285 int err;
4286
4287 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4288 if (spec == NULL)
4289 return -ENOMEM;
4290
4291 codec->spec = spec;
a4eed138 4292 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4293 spec->pin_nids = stac925x_pin_nids;
4294 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4295 stac925x_models,
4296 stac925x_cfg_tbl);
9e507abd 4297 again:
8e21c34c 4298 if (spec->board_config < 0) {
2c11f955
TD		 4299 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4300 "using BIOS defaults\n");
8e21c34c 4301 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4302 } else
4303 err = stac_save_pin_cfgs(codec,
4304 stac925x_brd_tbl[spec->board_config]);
4305 if (err < 0) {
4306 stac92xx_free(codec);
4307 return err;
8e21c34c
TD		 4308 }
4309
4310 spec->multiout.max_channels = 2;
4311 spec->multiout.num_dacs = 1;
4312 spec->multiout.dac_nids = stac925x_dac_nids;
4313 spec->adc_nids = stac925x_adc_nids;
4314 spec->mux_nids = stac925x_mux_nids;
4315 spec->num_muxes = 1;
9e05b7a3 4316 spec->num_adcs = 1;
a64135a2 4317 spec->num_pwrs = 0;
2c11f955
TD		 4318 switch (codec->vendor_id) {
4319 case 0x83847632: /* STAC9202 */
4320 case 0x83847633: /* STAC9202D */
4321 case 0x83847636: /* STAC9251 */
4322 case 0x83847637: /* STAC9251D */
f6e9852a 4323 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4324 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4325 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4326 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4327 break;
4328 default:
4329 spec->num_dmics = 0;
4330 break;
4331 }
8e21c34c
TD		 4332
4333 spec->init = stac925x_core_init;
4334 spec->mixer = stac925x_mixer;
4335
4336 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4337 if (!err) {
4338 if (spec->board_config < 0) {
4339 printk(KERN_WARNING "hda_codec: No auto-config is "
4340 "available, default to model=ref\n");
4341 spec->board_config = STAC_925x_REF;
4342 goto again;
4343 }
4344 err = -EINVAL;
4345 }
8e21c34c
TD		 4346 if (err < 0) {
4347 stac92xx_free(codec);
4348 return err;
4349 }
4350
4351 codec->patch_ops = stac92xx_patch_ops;
4352
4353 return 0;
4354}
4355
e1f0d669
MR		 4356static struct hda_input_mux stac92hd73xx_dmux = {
4357 .num_items = 4,
4358 .items = {
4359 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4360 { "Digital Mic 1", 0x09 },
4361 { "Digital Mic 2", 0x0a },
2a9c7816 4362 { "CD", 0x08 },
e1f0d669
MR		 4363 }
4364};
4365
4366static int patch_stac92hd73xx(struct hda_codec *codec)
4367{
4368 struct sigmatel_spec *spec;
4369 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4370 int err = 0;
4371
4372 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4373 if (spec == NULL)
4374 return -ENOMEM;
4375
4376 codec->spec = spec;
e99d32b3 4377 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4378 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4379 spec->pin_nids = stac92hd73xx_pin_nids;
4380 spec->board_config = snd_hda_check_board_config(codec,
4381 STAC_92HD73XX_MODELS,
4382 stac92hd73xx_models,
4383 stac92hd73xx_cfg_tbl);
4384again:
4385 if (spec->board_config < 0) {
4386 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4387 " STAC92HD73XX, using BIOS defaults\n");
4388 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4389 } else
4390 err = stac_save_pin_cfgs(codec,
4391 stac92hd73xx_brd_tbl[spec->board_config]);
4392 if (err < 0) {
4393 stac92xx_free(codec);
4394 return err;
e1f0d669
MR		 4395 }
4396
4397 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4398 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4399
4400 if (spec->multiout.num_dacs < 0) {
4401 printk(KERN_WARNING "hda_codec: Could not determine "
4402 "number of channels defaulting to DAC count\n");
4403 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4404 }
4405
4406 switch (spec->multiout.num_dacs) {
4407 case 0x3: /* 6 Channel */
4408 spec->mixer = stac92hd73xx_6ch_mixer;
4409 spec->init = stac92hd73xx_6ch_core_init;
4410 break;
4411 case 0x4: /* 8 Channel */
e1f0d669
MR		 4412 spec->mixer = stac92hd73xx_8ch_mixer;
4413 spec->init = stac92hd73xx_8ch_core_init;
4414 break;
4415 case 0x5: /* 10 Channel */
e1f0d669
MR		 4416 spec->mixer = stac92hd73xx_10ch_mixer;
4417 spec->init = stac92hd73xx_10ch_core_init;
4418 };
4419
4420 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4421 spec->aloopback_mask = 0x01;
4422 spec->aloopback_shift = 8;
4423
1cd2224c 4424 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4425 spec->mux_nids = stac92hd73xx_mux_nids;
4426 spec->adc_nids = stac92hd73xx_adc_nids;
4427 spec->dmic_nids = stac92hd73xx_dmic_nids;
4428 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4429 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4430 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4431 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4432
4433 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4434 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4435 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4436 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4437 sizeof(stac92hd73xx_dmux));
4438
a7662640 4439 switch (spec->board_config) {
6b3ab21e 4440 case STAC_DELL_EQ:
d654a660 4441 spec->init = dell_eq_core_init;
6b3ab21e
MR		 4442 /* fallthru */
4443 case STAC_DELL_M6:
2a9c7816 4444 spec->num_smuxes = 0;
2a9c7816
MR		 4445 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4446 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4447 spec->eapd_switch = 0;
2a9c7816 4448 spec->num_amps = 1;
6b3ab21e
MR		 4449
4450 if (!spec->init)
4451 spec->init = dell_m6_core_init;
a7662640
MR		 4452 switch (codec->subsystem_id) {
4453 case 0x1028025e: /* Analog Mics */
4454 case 0x1028025f:
4455 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4456 spec->num_dmics = 0;
2a9c7816 4457 spec->private_dimux.num_items = 1;
a7662640 4458 break;
d654a660 4459 case 0x10280271: /* Digital Mics */
a7662640 4460 case 0x10280272:
d654a660
MR		 4461 case 0x10280254:
4462 case 0x10280255:
a7662640
MR		 4463 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4464 spec->num_dmics = 1;
2a9c7816 4465 spec->private_dimux.num_items = 2;
a7662640
MR		 4466 break;
4467 case 0x10280256: /* Both */
4468 case 0x10280057:
4469 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4470 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4471 spec->num_dmics = 1;
2a9c7816 4472 spec->private_dimux.num_items = 2;
a7662640
MR		 4473 break;
4474 }
4475 break;
4476 default:
4477 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4478 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4479 spec->eapd_switch = 1;
a7662640 4480 }
b2c4f4d7
MR		 4481 if (spec->board_config > STAC_92HD73XX_REF) {
4482 /* GPIO0 High = Enable EAPD */
4483 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4484 spec->gpio_data = 0x01;
4485 }
2a9c7816 4486 spec->dinput_mux = &spec->private_dimux;
a7662640 4487
a64135a2
MR		 4488 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4489 spec->pwr_nids = stac92hd73xx_pwr_nids;
4490
d9737751 4491 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4492
4493 if (!err) {
4494 if (spec->board_config < 0) {
4495 printk(KERN_WARNING "hda_codec: No auto-config is "
4496 "available, default to model=ref\n");
4497 spec->board_config = STAC_92HD73XX_REF;
4498 goto again;
4499 }
4500 err = -EINVAL;
4501 }
4502
4503 if (err < 0) {
4504 stac92xx_free(codec);
4505 return err;
4506 }
4507
4508 codec->patch_ops = stac92xx_patch_ops;
4509
4510 return 0;
4511}
4512
d0513fc6
MR		 4513static struct hda_input_mux stac92hd83xxx_dmux = {
4514 .num_items = 3,
4515 .items = {
4516 { "Analog Inputs", 0x03 },
4517 { "Digital Mic 1", 0x04 },
4518 { "Digital Mic 2", 0x05 },
4519 }
4520};
4521
4522static int patch_stac92hd83xxx(struct hda_codec *codec)
4523{
4524 struct sigmatel_spec *spec;
4525 int err;
4526
4527 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4528 if (spec == NULL)
4529 return -ENOMEM;
4530
4531 codec->spec = spec;
0ffa9807 4532 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4533 spec->mono_nid = 0x19;
4534 spec->digbeep_nid = 0x21;
4535 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4536 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4537 spec->adc_nids = stac92hd83xxx_adc_nids;
4538 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4539 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4540 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4541 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4542
4543 spec->init = stac92hd83xxx_core_init;
4544 switch (codec->vendor_id) {
4545 case 0x111d7605:
4546 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4547 break;
4548 default:
4549 spec->num_pwrs--;
4550 spec->init++; /* switch to config #2 */
4551 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4552 }
4553
4554 spec->mixer = stac92hd83xxx_mixer;
4555 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4556 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4557 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4558 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4559 spec->dinput_mux = &stac92hd83xxx_dmux;
4560 spec->pin_nids = stac92hd83xxx_pin_nids;
4561 spec->board_config = snd_hda_check_board_config(codec,
4562 STAC_92HD83XXX_MODELS,
4563 stac92hd83xxx_models,
4564 stac92hd83xxx_cfg_tbl);
4565again:
4566 if (spec->board_config < 0) {
4567 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4568 " STAC92HD83XXX, using BIOS defaults\n");
4569 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4570 } else
4571 err = stac_save_pin_cfgs(codec,
4572 stac92hd83xxx_brd_tbl[spec->board_config]);
4573 if (err < 0) {
4574 stac92xx_free(codec);
4575 return err;
d0513fc6
MR		 4576 }
4577
4578 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4579 if (!err) {
4580 if (spec->board_config < 0) {
4581 printk(KERN_WARNING "hda_codec: No auto-config is "
4582 "available, default to model=ref\n");
4583 spec->board_config = STAC_92HD83XXX_REF;
4584 goto again;
4585 }
4586 err = -EINVAL;
4587 }
4588
4589 if (err < 0) {
4590 stac92xx_free(codec);
4591 return err;
4592 }
4593
4594 codec->patch_ops = stac92xx_patch_ops;
4595
4596 return 0;
4597}
4598
8daaaa97
MR		 4599#ifdef SND_HDA_NEEDS_RESUME
4600static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4601{
4602 struct sigmatel_spec *spec = codec->spec;
4603 int i;
4604 snd_hda_codec_write_cache(codec, codec->afg, 0,
4605 AC_VERB_SET_POWER_STATE, pwr);
4606
4607 msleep(1);
4608 for (i = 0; i < spec->num_adcs; i++) {
4609 snd_hda_codec_write_cache(codec,
4610 spec->adc_nids[i], 0,
4611 AC_VERB_SET_POWER_STATE, pwr);
4612 }
4613};
4614
4615static int stac92hd71xx_resume(struct hda_codec *codec)
4616{
4617 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4618 return stac92xx_resume(codec);
4619}
4620
4621static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4622{
4623 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
c6798d2b 4624 return stac92xx_suspend(codec, state);
8daaaa97
MR		 4625};
4626
4627#endif
4628
4629static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4630 .build_controls = stac92xx_build_controls,
4631 .build_pcms = stac92xx_build_pcms,
4632 .init = stac92xx_init,
4633 .free = stac92xx_free,
4634 .unsol_event = stac92xx_unsol_event,
4635#ifdef SND_HDA_NEEDS_RESUME
8daaaa97 4636 .suspend = stac92hd71xx_suspend,
c6798d2b 4637 .resume = stac92hd71xx_resume,
8daaaa97
MR		 4638#endif
4639};
d0513fc6 4640
4b33c767
MR		 4641static struct hda_input_mux stac92hd71bxx_dmux = {
4642 .num_items = 4,
4643 .items = {
4644 { "Analog Inputs", 0x00 },
4645 { "Mixer", 0x01 },
4646 { "Digital Mic 1", 0x02 },
4647 { "Digital Mic 2", 0x03 },
4648 }
4649};
4650
e035b841
MR		 4651static int patch_stac92hd71bxx(struct hda_codec *codec)
4652{
4653 struct sigmatel_spec *spec;
4654 int err = 0;
4655
4656 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4657 if (spec == NULL)
4658 return -ENOMEM;
4659
4660 codec->spec = spec;
8daaaa97 4661 codec->patch_ops = stac92xx_patch_ops;
e035b841 4662 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4663 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4664 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4665 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4666 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4667 spec->board_config = snd_hda_check_board_config(codec,
4668 STAC_92HD71BXX_MODELS,
4669 stac92hd71bxx_models,
4670 stac92hd71bxx_cfg_tbl);
4671again:
4672 if (spec->board_config < 0) {
4673 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4674 " STAC92HD71BXX, using BIOS defaults\n");
4675 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4676 } else
4677 err = stac_save_pin_cfgs(codec,
4678 stac92hd71bxx_brd_tbl[spec->board_config]);
4679 if (err < 0) {
4680 stac92xx_free(codec);
4681 return err;
e035b841
MR		 4682 }
4683
41c3b648
TI		 4684 if (spec->board_config > STAC_92HD71BXX_REF) {
4685 /* GPIO0 = EAPD */
4686 spec->gpio_mask = 0x01;
4687 spec->gpio_dir = 0x01;
4688 spec->gpio_data = 0x01;
4689 }
4690
541eee87
MR		 4691 switch (codec->vendor_id) {
4692 case 0x111d76b6: /* 4 Port without Analog Mixer */
4693 case 0x111d76b7:
4694 case 0x111d76b4: /* 6 Port without Analog Mixer */
4695 case 0x111d76b5:
4696 spec->mixer = stac92hd71bxx_mixer;
4697 spec->init = stac92hd71bxx_core_init;
0ffa9807 4698 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4699 break;
aafc4412 4700 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4701 switch (spec->board_config) {
4702 case STAC_HP_M4:
72474be6 4703 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4704 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4705 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4706 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc
MR		 4707 AC_VERB_SET_UNSOLICITED_ENABLE,
4708 (AC_USRSP_EN | STAC_VREF_EVENT | codec->afg));
4709 err = stac92xx_add_event(spec, codec->afg, 0x02);
4710 if (err < 0)
4711 return err;
72474be6
MR		 4712 spec->gpio_mask |= 0x02;
4713 break;
4714 }
8daaaa97
MR		 4715 if ((codec->revision_id & 0xf) == 0 ||
4716 (codec->revision_id & 0xf) == 1) {
4717#ifdef SND_HDA_NEEDS_RESUME
4718 codec->patch_ops = stac92hd71bxx_patch_ops;
4719#endif
4720 spec->stream_delay = 40; /* 40 milliseconds */
4721 }
4722
aafc4412
MR		 4723 /* no output amps */
4724 spec->num_pwrs = 0;
4725 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4726 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4727
4728 /* disable VSW */
4729 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4730 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4731 break;
4732 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4733 if ((codec->revision_id & 0xf) == 1) {
4734#ifdef SND_HDA_NEEDS_RESUME
4735 codec->patch_ops = stac92hd71bxx_patch_ops;
4736#endif
4737 spec->stream_delay = 40; /* 40 milliseconds */
4738 }
4739
aafc4412
MR		 4740 /* no output amps */
4741 spec->num_pwrs = 0;
4742 /* fallthru */
541eee87 4743 default:
4b33c767 4744 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4745 spec->mixer = stac92hd71bxx_analog_mixer;
4746 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4747 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4748 }
4749
4b33c767 4750 spec->aloopback_mask = 0x50;
541eee87
MR		 4751 spec->aloopback_shift = 0;
4752
8daaaa97 4753 spec->powerdown_adcs = 1;
1cd2224c 4754 spec->digbeep_nid = 0x26;
e035b841
MR		 4755 spec->mux_nids = stac92hd71bxx_mux_nids;
4756 spec->adc_nids = stac92hd71bxx_adc_nids;
4757 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4758 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4759 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4760 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4761
4762 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4763 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4764
6a14f585
MR		 4765 switch (spec->board_config) {
4766 case STAC_HP_M4:
6a14f585 4767 /* enable internal microphone */
af9f341a 4768 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4769 stac92xx_auto_set_pinctl(codec, 0x0e,
4770 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4771 /* fallthru */
4772 case STAC_DELL_M4_2:
4773 spec->num_dmics = 0;
4774 spec->num_smuxes = 0;
4775 spec->num_dmuxes = 0;
4776 break;
4777 case STAC_DELL_M4_1:
4778 case STAC_DELL_M4_3:
4779 spec->num_dmics = 1;
4780 spec->num_smuxes = 0;
4781 spec->num_dmuxes = 0;
6a14f585
MR		 4782 break;
4783 default:
4784 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4785 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4786 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4787 };
4788
aea7bb0a 4789 spec->multiout.num_dacs = 1;
e035b841
MR		 4790 spec->multiout.hp_nid = 0x11;
4791 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4792 if (spec->dinput_mux)
4793 spec->private_dimux.num_items +=
4794 spec->num_dmics -
4795 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4796
4797 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4798 if (!err) {
4799 if (spec->board_config < 0) {
4800 printk(KERN_WARNING "hda_codec: No auto-config is "
4801 "available, default to model=ref\n");
4802 spec->board_config = STAC_92HD71BXX_REF;
4803 goto again;
4804 }
4805 err = -EINVAL;
4806 }
4807
4808 if (err < 0) {
4809 stac92xx_free(codec);
4810 return err;
4811 }
4812
e035b841
MR		 4813 return 0;
4814};
4815
2f2f4251
M		 4816static int patch_stac922x(struct hda_codec *codec)
4817{
4818 struct sigmatel_spec *spec;
c7d4b2fa 4819 int err;
2f2f4251 4820
e560d8d8 4821 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4822 if (spec == NULL)
4823 return -ENOMEM;
4824
4825 codec->spec = spec;
a4eed138 4826 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4827 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4828 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4829 stac922x_models,
4830 stac922x_cfg_tbl);
536319af 4831 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4832 spec->gpio_mask = spec->gpio_dir = 0x03;
4833 spec->gpio_data = 0x03;
3fc24d85
TI		 4834 /* Intel Macs have all same PCI SSID, so we need to check
4835 * codec SSID to distinguish the exact models
4836 */
6f0778d8 4837 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4838 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4839
4840 case 0x106b0800:
4841 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4842 break;
5d5d3bc3
IZ		 4843 case 0x106b0600:
4844 case 0x106b0700:
4845 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4846 break;
5d5d3bc3
IZ		 4847 case 0x106b0e00:
4848 case 0x106b0f00:
4849 case 0x106b1600:
4850 case 0x106b1700:
4851 case 0x106b0200:
4852 case 0x106b1e00:
4853 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4854 break;
5d5d3bc3
IZ		 4855 case 0x106b1a00:
4856 case 0x00000100:
4857 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4858 break;
5d5d3bc3
IZ		 4859 case 0x106b0a00:
4860 case 0x106b2200:
4861 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4862 break;
536319af
NB		 4863 default:
4864 spec->board_config = STAC_INTEL_MAC_V3;
4865 break;
3fc24d85
TI		 4866 }
4867 }
4868
9e507abd 4869 again:
11b44bbd
RF		 4870 if (spec->board_config < 0) {
4871 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4872 "using BIOS defaults\n");
4873 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4874 } else
4875 err = stac_save_pin_cfgs(codec,
4876 stac922x_brd_tbl[spec->board_config]);
4877 if (err < 0) {
4878 stac92xx_free(codec);
4879 return err;
403d1944 4880 }
2f2f4251 4881
c7d4b2fa
M		 4882 spec->adc_nids = stac922x_adc_nids;
4883 spec->mux_nids = stac922x_mux_nids;
2549413e 4884 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4885 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4886 spec->num_dmics = 0;
a64135a2 4887 spec->num_pwrs = 0;
c7d4b2fa
M		 4888
4889 spec->init = stac922x_core_init;
2f2f4251 4890 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4891
4892 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4893
3cc08dc6 4894 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4895 if (!err) {
4896 if (spec->board_config < 0) {
4897 printk(KERN_WARNING "hda_codec: No auto-config is "
4898 "available, default to model=ref\n");
4899 spec->board_config = STAC_D945_REF;
4900 goto again;
4901 }
4902 err = -EINVAL;
4903 }
3cc08dc6
MP		 4904 if (err < 0) {
4905 stac92xx_free(codec);
4906 return err;
4907 }
4908
4909 codec->patch_ops = stac92xx_patch_ops;
4910
807a4636
TI		 4911 /* Fix Mux capture level; max to 2 */
4912 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4913 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4914 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4915 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4916 (0 << AC_AMPCAP_MUTE_SHIFT));
4917
3cc08dc6
MP		 4918 return 0;
4919}
4920
4921static int patch_stac927x(struct hda_codec *codec)
4922{
4923 struct sigmatel_spec *spec;
4924 int err;
4925
4926 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4927 if (spec == NULL)
4928 return -ENOMEM;
4929
4930 codec->spec = spec;
a4eed138 4931 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4932 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4933 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4934 stac927x_models,
4935 stac927x_cfg_tbl);
9e507abd 4936 again:
8e9068b1
MR		 4937 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4938 if (spec->board_config < 0)
4939 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4940 "STAC927x, using BIOS defaults\n");
11b44bbd 4941 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4942 } else
4943 err = stac_save_pin_cfgs(codec,
4944 stac927x_brd_tbl[spec->board_config]);
4945 if (err < 0) {
4946 stac92xx_free(codec);
4947 return err;
3cc08dc6
MP		 4948 }
4949
1cd2224c 4950 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4951 spec->adc_nids = stac927x_adc_nids;
4952 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4953 spec->mux_nids = stac927x_mux_nids;
4954 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4955 spec->smux_nids = stac927x_smux_nids;
4956 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4957 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4958 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4959 spec->multiout.dac_nids = spec->dac_nids;
4960
81d3dbde 4961 switch (spec->board_config) {
93ed1503 4962 case STAC_D965_3ST:
93ed1503 4963 case STAC_D965_5ST:
8e9068b1 4964 /* GPIO0 High = Enable EAPD */
0fc9dec4 4965 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4966 spec->gpio_data = 0x01;
8e9068b1
MR		 4967 spec->num_dmics = 0;
4968
93ed1503 4969 spec->init = d965_core_init;
9e05b7a3 4970 spec->mixer = stac927x_mixer;
81d3dbde 4971 break;
8e9068b1 4972 case STAC_DELL_BIOS:
780c8be4
MR		 4973 switch (codec->subsystem_id) {
4974 case 0x10280209:
4975 case 0x1028022e:
4976 /* correct the device field to SPDIF out */
af9f341a 4977 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 4978 break;
4979 };
03d7ca17 4980 /* configure the analog microphone on some laptops */
af9f341a 4981 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 4982 /* correct the front output jack as a hp out */
af9f341a 4983 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 4984 /* correct the front input jack as a mic */
af9f341a 4985 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 4986 /* fallthru */
8e9068b1
MR		 4987 case STAC_DELL_3ST:
4988 /* GPIO2 High = Enable EAPD */
0fc9dec4 4989 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4990 spec->gpio_data = 0x04;
7f16859a
MR		 4991 spec->dmic_nids = stac927x_dmic_nids;
4992 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4993
8e9068b1
MR		 4994 spec->init = d965_core_init;
4995 spec->mixer = stac927x_mixer;
4996 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4997 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4998 break;
4999 default:
b2c4f4d7
MR		 5000 if (spec->board_config > STAC_D965_REF) {
5001 /* GPIO0 High = Enable EAPD */
5002 spec->eapd_mask = spec->gpio_mask = 0x01;
5003 spec->gpio_dir = spec->gpio_data = 0x01;
5004 }
8e9068b1
MR		 5005 spec->num_dmics = 0;
5006
5007 spec->init = stac927x_core_init;
5008 spec->mixer = stac927x_mixer;
7f16859a
MR		 5009 }
5010
a64135a2 5011 spec->num_pwrs = 0;
e1f0d669
MR		 5012 spec->aloopback_mask = 0x40;
5013 spec->aloopback_shift = 0;
c0cea0d0 5014 spec->eapd_switch = 1;
8e9068b1 5015
3cc08dc6 5016 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5017 if (!err) {
5018 if (spec->board_config < 0) {
5019 printk(KERN_WARNING "hda_codec: No auto-config is "
5020 "available, default to model=ref\n");
5021 spec->board_config = STAC_D965_REF;
5022 goto again;
5023 }
5024 err = -EINVAL;
5025 }
c7d4b2fa
M		 5026 if (err < 0) {
5027 stac92xx_free(codec);
5028 return err;
5029 }
2f2f4251
M		 5030
5031 codec->patch_ops = stac92xx_patch_ops;
5032
52987656
TI		 5033 /*
5034 * !!FIXME!!
5035 * The STAC927x seem to require fairly long delays for certain
5036 * command sequences. With too short delays (even if the answer
5037 * is set to RIRB properly), it results in the silence output
5038 * on some hardwares like Dell.
5039 *
5040 * The below flag enables the longer delay (see get_response
5041 * in hda_intel.c).
5042 */
5043 codec->bus->needs_damn_long_delay = 1;
5044
2f2f4251
M		 5045 return 0;
5046}
5047
f3302a59
MP		 5048static int patch_stac9205(struct hda_codec *codec)
5049{
5050 struct sigmatel_spec *spec;
8259980e 5051 int err;
f3302a59
MP		 5052
5053 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5054 if (spec == NULL)
5055 return -ENOMEM;
5056
5057 codec->spec = spec;
a4eed138 5058 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5059 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5060 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5061 stac9205_models,
5062 stac9205_cfg_tbl);
9e507abd 5063 again:
11b44bbd
RF		 5064 if (spec->board_config < 0) {
5065 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5066 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5067 } else
5068 err = stac_save_pin_cfgs(codec,
5069 stac9205_brd_tbl[spec->board_config]);
5070 if (err < 0) {
5071 stac92xx_free(codec);
5072 return err;
f3302a59
MP		 5073 }
5074
1cd2224c 5075 spec->digbeep_nid = 0x23;
f3302a59 5076 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5077 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5078 spec->mux_nids = stac9205_mux_nids;
2549413e 5079 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5080 spec->smux_nids = stac9205_smux_nids;
5081 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5082 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5083 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5084 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5085 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5086 spec->num_pwrs = 0;
f3302a59
MP		 5087
5088 spec->init = stac9205_core_init;
5089 spec->mixer = stac9205_mixer;
5090
e1f0d669
MR		 5091 spec->aloopback_mask = 0x40;
5092 spec->aloopback_shift = 0;
c0cea0d0 5093 spec->eapd_switch = 1;
f3302a59 5094 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5095
ae0a8ed8 5096 switch (spec->board_config){
ae0a8ed8 5097 case STAC_9205_DELL_M43:
87d48363 5098 /* Enable SPDIF in/out */
af9f341a
TI		 5099 stac_change_pin_config(codec, 0x1f, 0x01441030);
5100 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5101
4fe5195c 5102 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 5103 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5104 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5105 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc
MR		 5106 AC_VERB_SET_UNSOLICITED_ENABLE,
5107 (AC_USRSP_EN | STAC_VREF_EVENT | codec->afg));
5108 err = stac92xx_add_event(spec, codec->afg, 0x01);
5109 if (err < 0)
5110 return err;
4fe5195c
MR		 5111
5112 spec->gpio_dir = 0x0b;
0fc9dec4 5113 spec->eapd_mask = 0x01;
4fe5195c
MR		 5114 spec->gpio_mask = 0x1b;
5115 spec->gpio_mute = 0x10;
e2e7d624 5116 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5117 * GPIO3 Low = DRM
87d48363 5118 */
4fe5195c 5119 spec->gpio_data = 0x01;
ae0a8ed8 5120 break;
b2c4f4d7
MR		 5121 case STAC_9205_REF:
5122 /* SPDIF-In enabled */
5123 break;
ae0a8ed8
TD		 5124 default:
5125 /* GPIO0 High = EAPD */
0fc9dec4 5126 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5127 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5128 break;
5129 }
33382403 5130
f3302a59 5131 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5132 if (!err) {
5133 if (spec->board_config < 0) {
5134 printk(KERN_WARNING "hda_codec: No auto-config is "
5135 "available, default to model=ref\n");
5136 spec->board_config = STAC_9205_REF;
5137 goto again;
5138 }
5139 err = -EINVAL;
5140 }
f3302a59
MP		 5141 if (err < 0) {
5142 stac92xx_free(codec);
5143 return err;
5144 }
5145
5146 codec->patch_ops = stac92xx_patch_ops;
5147
5148 return 0;
5149}
5150
db064e50 5151/*
6d859065 5152 * STAC9872 hack
db064e50
TI		 5153 */
5154
99ccc560 5155/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5156static hda_nid_t vaio_dacs[] = { 0x2 };
5157#define VAIO_HP_DAC 0x5
5158static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5159static hda_nid_t vaio_mux_nids[] = { 0x15 };
5160
5161static struct hda_input_mux vaio_mux = {
a3a2f429 5162 .num_items = 3,
db064e50 5163 .items = {
d773781c 5164 /* { "HP", 0x0 }, */
1624cb9a
TI		 5165 { "Mic Jack", 0x1 },
5166 { "Internal Mic", 0x2 },
db064e50
TI		 5167 { "PCM", 0x3 },
5168 }
5169};
5170
5171static struct hda_verb vaio_init[] = {
5172 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5173 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5174 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5175 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5176 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5177 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5178 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5179 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5180 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5181 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5182 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5183 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5184 {}
5185};
5186
6d859065
GM		 5187static struct hda_verb vaio_ar_init[] = {
5188 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5189 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5190 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5191 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5192/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5193 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5194 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5195 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5196 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5197/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5198 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5199 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5200 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5201 {}
5202};
5203
db064e50 5204static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5205 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5206 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5207 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5208 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5209 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5210 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5211 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5212 {
5213 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5214 .name = "Capture Source",
5215 .count = 1,
5216 .info = stac92xx_mux_enum_info,
5217 .get = stac92xx_mux_enum_get,
5218 .put = stac92xx_mux_enum_put,
5219 },
5220 {}
5221};
5222
6d859065 5223static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5224 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5225 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5226 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5227 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5228 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5229 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5230 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5231 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5232 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5233 {
5234 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5235 .name = "Capture Source",
5236 .count = 1,
5237 .info = stac92xx_mux_enum_info,
5238 .get = stac92xx_mux_enum_get,
5239 .put = stac92xx_mux_enum_put,
5240 },
5241 {}
5242};
5243
5244static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5245 .build_controls = stac92xx_build_controls,
5246 .build_pcms = stac92xx_build_pcms,
5247 .init = stac92xx_init,
5248 .free = stac92xx_free,
cb53c626 5249#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5250 .resume = stac92xx_resume,
5251#endif
5252};
5253
72e7b0dd
TI		 5254static int stac9872_vaio_init(struct hda_codec *codec)
5255{
5256 int err;
5257
5258 err = stac92xx_init(codec);
5259 if (err < 0)
5260 return err;
5261 if (codec->patch_ops.unsol_event)
5262 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5263 return 0;
5264}
5265
5266static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5267{
40c1d308 5268 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5269 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5270 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5271 } else {
5272 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5273 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5274 }
5275}
5276
5277static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5278{
5279 switch (res >> 26) {
5280 case STAC_HP_EVENT:
5281 stac9872_vaio_hp_detect(codec, res);
5282 break;
5283 }
5284}
5285
5286static struct hda_codec_ops stac9872_vaio_patch_ops = {
5287 .build_controls = stac92xx_build_controls,
5288 .build_pcms = stac92xx_build_pcms,
5289 .init = stac9872_vaio_init,
5290 .free = stac92xx_free,
5291 .unsol_event = stac9872_vaio_unsol_event,
5292#ifdef CONFIG_PM
5293 .resume = stac92xx_resume,
5294#endif
5295};
5296
6d859065
GM		 5297enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5298 CXD9872RD_VAIO,
5299 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5300 STAC9872AK_VAIO,
5301 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5302 STAC9872K_VAIO,
5303 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5304 CXD9872AKD_VAIO,
5305 STAC_9872_MODELS,
5306};
5307
5308static const char *stac9872_models[STAC_9872_MODELS] = {
5309 [CXD9872RD_VAIO] = "vaio",
5310 [CXD9872AKD_VAIO] = "vaio-ar",
5311};
5312
5313static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5314 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5315 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5316 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5317 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5318 {}
5319};
5320
6d859065 5321static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5322{
5323 struct sigmatel_spec *spec;
5324 int board_config;
5325
f5fcc13c
TI		 5326 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5327 stac9872_models,
5328 stac9872_cfg_tbl);
db064e50
TI		 5329 if (board_config < 0)
5330 /* unknown config, let generic-parser do its job... */
5331 return snd_hda_parse_generic_codec(codec);
5332
5333 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5334 if (spec == NULL)
5335 return -ENOMEM;
5336
5337 codec->spec = spec;
5338 switch (board_config) {
6d859065
GM		 5339 case CXD9872RD_VAIO:
5340 case STAC9872AK_VAIO:
5341 case STAC9872K_VAIO:
db064e50
TI		 5342 spec->mixer = vaio_mixer;
5343 spec->init = vaio_init;
5344 spec->multiout.max_channels = 2;
5345 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5346 spec->multiout.dac_nids = vaio_dacs;
5347 spec->multiout.hp_nid = VAIO_HP_DAC;
5348 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5349 spec->adc_nids = vaio_adcs;
a64135a2 5350 spec->num_pwrs = 0;
db064e50
TI		 5351 spec->input_mux = &vaio_mux;
5352 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5353 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5354 break;
6d859065
GM		 5355
5356 case CXD9872AKD_VAIO:
5357 spec->mixer = vaio_ar_mixer;
5358 spec->init = vaio_ar_init;
5359 spec->multiout.max_channels = 2;
5360 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5361 spec->multiout.dac_nids = vaio_dacs;
5362 spec->multiout.hp_nid = VAIO_HP_DAC;
5363 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5364 spec->num_pwrs = 0;
6d859065
GM		 5365 spec->adc_nids = vaio_adcs;
5366 spec->input_mux = &vaio_mux;
5367 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5368 codec->patch_ops = stac9872_patch_ops;
6d859065 5369 break;
db064e50
TI		 5370 }
5371
db064e50
TI		 5372 return 0;
5373}
5374
5375
2f2f4251
M		 5376/*
5377 * patch entries
5378 */
5379struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5380 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5381 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5382 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5383 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5384 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5385 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5386 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5387 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5388 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5389 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5390 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5391 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5392 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5393 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5394 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5395 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5396 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5397 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5398 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5399 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5400 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5401 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5402 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5403 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5404 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5405 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5406 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5407 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5408 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5409 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5410 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5411 /* The following does not take into account .id=0x83847661 when subsys =
5412 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5413 * currently not fully supported.
5414 */
5415 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5416 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5417 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5418 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5419 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5420 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5421 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5422 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5423 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5424 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5425 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5426 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5427 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5428 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5429 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5430 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5431 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5432 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5433 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5434 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5435 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5436 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5437 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5438 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5439 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5440 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5441 {} /* terminator */
5442};
Clone of davem's net-next-2.6 tree