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ALSA: hda: STAC_DELL_M6 EAPD
[net-next-2.6.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669
MR		 71enum {
72 STAC_92HD73XX_REF,
a7662640 73 STAC_DELL_M6,
6b3ab21e 74 STAC_DELL_EQ,
e1f0d669
MR		 75 STAC_92HD73XX_MODELS
76};
77
d0513fc6
MR		 78enum {
79 STAC_92HD83XXX_REF,
80 STAC_92HD83XXX_MODELS
81};
82
e035b841
MR		 83enum {
84 STAC_92HD71BXX_REF,
a7662640
MR		 85 STAC_DELL_M4_1,
86 STAC_DELL_M4_2,
6a14f585 87 STAC_HP_M4,
e035b841
MR		 88 STAC_92HD71BXX_MODELS
89};
90
8e21c34c
TD		 91enum {
92 STAC_925x_REF,
93 STAC_M2_2,
94 STAC_MA6,
2c11f955 95 STAC_PA6,
8e21c34c
TD		 96 STAC_925x_MODELS
97};
98
f5fcc13c
TI		 99enum {
100 STAC_D945_REF,
101 STAC_D945GTP3,
102 STAC_D945GTP5,
5d5d3bc3
IZ		 103 STAC_INTEL_MAC_V1,
104 STAC_INTEL_MAC_V2,
105 STAC_INTEL_MAC_V3,
106 STAC_INTEL_MAC_V4,
107 STAC_INTEL_MAC_V5,
536319af
NB		 108 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
109 * is given, one of the above models will be
110 * chosen according to the subsystem id. */
dfe495d0 111 /* for backward compatibility */
f5fcc13c 112 STAC_MACMINI,
3fc24d85 113 STAC_MACBOOK,
6f0778d8
NB		 114 STAC_MACBOOK_PRO_V1,
115 STAC_MACBOOK_PRO_V2,
f16928fb 116 STAC_IMAC_INTEL,
0dae0f83 117 STAC_IMAC_INTEL_20,
8c650087 118 STAC_ECS_202,
dfe495d0
TI		 119 STAC_922X_DELL_D81,
120 STAC_922X_DELL_D82,
121 STAC_922X_DELL_M81,
122 STAC_922X_DELL_M82,
f5fcc13c
TI		 123 STAC_922X_MODELS
124};
125
126enum {
127 STAC_D965_REF,
128 STAC_D965_3ST,
129 STAC_D965_5ST,
4ff076e5 130 STAC_DELL_3ST,
8e9068b1 131 STAC_DELL_BIOS,
f5fcc13c
TI		 132 STAC_927X_MODELS
133};
403d1944 134
2f2f4251 135struct sigmatel_spec {
c8b6bf9b 136 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 137 unsigned int num_mixers;
138
403d1944 139 int board_config;
0253fdcd 140 unsigned int eapd_switch: 1;
c7d4b2fa 141 unsigned int surr_switch: 1;
403d1944
MP		 142 unsigned int line_switch: 1;
143 unsigned int mic_switch: 1;
3cc08dc6 144 unsigned int alt_switch: 1;
82bc955f 145 unsigned int hp_detect: 1;
00ef50c2 146 unsigned int spdif_mute: 1;
c7d4b2fa 147
4fe5195c 148 /* gpio lines */
0fc9dec4 149 unsigned int eapd_mask;
4fe5195c
MR		 150 unsigned int gpio_mask;
151 unsigned int gpio_dir;
152 unsigned int gpio_data;
153 unsigned int gpio_mute;
154
8daaaa97
MR		 155 /* stream */
156 unsigned int stream_delay;
157
4fe5195c 158 /* analog loopback */
e1f0d669
MR		 159 unsigned char aloopback_mask;
160 unsigned char aloopback_shift;
8259980e 161
a64135a2
MR		 162 /* power management */
163 unsigned int num_pwrs;
d0513fc6 164 unsigned int *pwr_mapping;
a64135a2 165 hda_nid_t *pwr_nids;
b76c850f 166 hda_nid_t *dac_list;
a64135a2 167
2f2f4251 168 /* playback */
b22b4821 169 struct hda_input_mux *mono_mux;
89385035 170 struct hda_input_mux *amp_mux;
b22b4821 171 unsigned int cur_mmux;
2f2f4251 172 struct hda_multi_out multiout;
3cc08dc6 173 hda_nid_t dac_nids[5];
2f2f4251
M		 174
175 /* capture */
176 hda_nid_t *adc_nids;
2f2f4251 177 unsigned int num_adcs;
dabbed6f
M		 178 hda_nid_t *mux_nids;
179 unsigned int num_muxes;
8b65727b
MP		 180 hda_nid_t *dmic_nids;
181 unsigned int num_dmics;
e1f0d669 182 hda_nid_t *dmux_nids;
1697055e 183 unsigned int num_dmuxes;
d9737751
MR		 184 hda_nid_t *smux_nids;
185 unsigned int num_smuxes;
65973632 186 const char **spdif_labels;
d9737751 187
dabbed6f 188 hda_nid_t dig_in_nid;
b22b4821 189 hda_nid_t mono_nid;
1cd2224c
MR		 190 hda_nid_t anabeep_nid;
191 hda_nid_t digbeep_nid;
2f2f4251 192
2f2f4251
M		 193 /* pin widgets */
194 hda_nid_t *pin_nids;
195 unsigned int num_pins;
2f2f4251 196 unsigned int *pin_configs;
11b44bbd 197 unsigned int *bios_pin_configs;
2f2f4251
M		 198
199 /* codec specific stuff */
200 struct hda_verb *init;
c8b6bf9b 201 struct snd_kcontrol_new *mixer;
2f2f4251
M		 202
203 /* capture source */
8b65727b 204 struct hda_input_mux *dinput_mux;
e1f0d669 205 unsigned int cur_dmux[2];
c7d4b2fa 206 struct hda_input_mux *input_mux;
3cc08dc6 207 unsigned int cur_mux[3];
d9737751
MR		 208 struct hda_input_mux *sinput_mux;
209 unsigned int cur_smux[2];
2a9c7816
MR		 210 unsigned int cur_amux;
211 hda_nid_t *amp_nids;
212 unsigned int num_amps;
8daaaa97 213 unsigned int powerdown_adcs;
2f2f4251 214
403d1944
MP		 215 /* i/o switches */
216 unsigned int io_switch[2];
0fb87bb4 217 unsigned int clfe_swap;
d7a89436 218 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 219 unsigned int aloopback;
2f2f4251 220
c7d4b2fa
M		 221 struct hda_pcm pcm_rec[2]; /* PCM information */
222
223 /* dynamic controls and input_mux */
224 struct auto_pin_cfg autocfg;
225 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 226 struct snd_kcontrol_new *kctl_alloc;
8b65727b 227 struct hda_input_mux private_dimux;
c7d4b2fa 228 struct hda_input_mux private_imux;
d9737751 229 struct hda_input_mux private_smux;
89385035 230 struct hda_input_mux private_amp_mux;
b22b4821 231 struct hda_input_mux private_mono_mux;
2f2f4251
M		 232};
233
234static hda_nid_t stac9200_adc_nids[1] = {
235 0x03,
236};
237
238static hda_nid_t stac9200_mux_nids[1] = {
239 0x0c,
240};
241
242static hda_nid_t stac9200_dac_nids[1] = {
243 0x02,
244};
245
a64135a2
MR		 246static hda_nid_t stac92hd73xx_pwr_nids[8] = {
247 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
248 0x0f, 0x10, 0x11
249};
250
0ffa9807
MR		 251static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
252 0x26, 0,
253};
254
e1f0d669
MR		 255static hda_nid_t stac92hd73xx_adc_nids[2] = {
256 0x1a, 0x1b
257};
258
2a9c7816
MR		 259#define DELL_M6_AMP 2
260static hda_nid_t stac92hd73xx_amp_nids[3] = {
261 0x0b, 0x0c, 0x0e
89385035
MR		 262};
263
e1f0d669
MR		 264#define STAC92HD73XX_NUM_DMICS 2
265static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
266 0x13, 0x14, 0
267};
268
269#define STAC92HD73_DAC_COUNT 5
270static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
271 0x15, 0x16, 0x17, 0x18, 0x19,
272};
273
274static hda_nid_t stac92hd73xx_mux_nids[4] = {
275 0x28, 0x29, 0x2a, 0x2b,
276};
277
278static hda_nid_t stac92hd73xx_dmux_nids[2] = {
279 0x20, 0x21,
280};
281
d9737751
MR		 282static hda_nid_t stac92hd73xx_smux_nids[2] = {
283 0x22, 0x23,
284};
285
d0513fc6
MR		 286#define STAC92HD83XXX_NUM_DMICS 2
287static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
288 0x11, 0x12, 0
289};
290
291#define STAC92HD81_DAC_COUNT 2
292#define STAC92HD83_DAC_COUNT 3
293static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
294 0x13, 0x14, 0x22,
295};
296
297static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
298 0x17, 0x18,
299};
300
301static hda_nid_t stac92hd83xxx_adc_nids[2] = {
302 0x15, 0x16,
303};
304
305static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
306 0xa, 0xb, 0xd, 0xe,
307};
308
0ffa9807
MR		 309static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
310 0x1e, 0,
311};
312
d0513fc6
MR		 313static unsigned int stac92hd83xxx_pwr_mapping[4] = {
314 0x03, 0x0c, 0x10, 0x40,
315};
316
a64135a2
MR		 317static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
318 0x0a, 0x0d, 0x0f
319};
320
e035b841
MR		 321static hda_nid_t stac92hd71bxx_adc_nids[2] = {
322 0x12, 0x13,
323};
324
325static hda_nid_t stac92hd71bxx_mux_nids[2] = {
326 0x1a, 0x1b
327};
328
4b33c767
MR		 329static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
330 0x1c, 0x1d,
e1f0d669
MR		 331};
332
d9737751
MR		 333static hda_nid_t stac92hd71bxx_smux_nids[2] = {
334 0x24, 0x25,
335};
336
aea7bb0a 337static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 338 0x10, /*0x11, */
339};
340
341#define STAC92HD71BXX_NUM_DMICS 2
342static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
343 0x18, 0x19, 0
344};
345
0ffa9807
MR		 346static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
347 0x22, 0
348};
349
8e21c34c
TD		 350static hda_nid_t stac925x_adc_nids[1] = {
351 0x03,
352};
353
354static hda_nid_t stac925x_mux_nids[1] = {
355 0x0f,
356};
357
358static hda_nid_t stac925x_dac_nids[1] = {
359 0x02,
360};
361
f6e9852a
TI		 362#define STAC925X_NUM_DMICS 1
363static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
364 0x15, 0
2c11f955
TD		 365};
366
1697055e
TI		 367static hda_nid_t stac925x_dmux_nids[1] = {
368 0x14,
369};
370
2f2f4251
M		 371static hda_nid_t stac922x_adc_nids[2] = {
372 0x06, 0x07,
373};
374
375static hda_nid_t stac922x_mux_nids[2] = {
376 0x12, 0x13,
377};
378
3cc08dc6
MP		 379static hda_nid_t stac927x_adc_nids[3] = {
380 0x07, 0x08, 0x09
381};
382
383static hda_nid_t stac927x_mux_nids[3] = {
384 0x15, 0x16, 0x17
385};
386
d9737751
MR		 387static hda_nid_t stac927x_smux_nids[1] = {
388 0x21,
389};
390
b76c850f
MR		 391static hda_nid_t stac927x_dac_nids[6] = {
392 0x02, 0x03, 0x04, 0x05, 0x06, 0
393};
394
e1f0d669
MR		 395static hda_nid_t stac927x_dmux_nids[1] = {
396 0x1b,
397};
398
7f16859a
MR		 399#define STAC927X_NUM_DMICS 2
400static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
401 0x13, 0x14, 0
402};
403
65973632
MR		 404static const char *stac927x_spdif_labels[5] = {
405 "Digital Playback", "ADAT", "Analog Mux 1",
406 "Analog Mux 2", "Analog Mux 3"
407};
408
f3302a59
MP		 409static hda_nid_t stac9205_adc_nids[2] = {
410 0x12, 0x13
411};
412
413static hda_nid_t stac9205_mux_nids[2] = {
414 0x19, 0x1a
415};
416
e1f0d669 417static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 418 0x1d,
e1f0d669
MR		 419};
420
d9737751
MR		 421static hda_nid_t stac9205_smux_nids[1] = {
422 0x21,
423};
424
f6e9852a
TI		 425#define STAC9205_NUM_DMICS 2
426static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
427 0x17, 0x18, 0
8b65727b
MP		 428};
429
c7d4b2fa 430static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 431 0x08, 0x09, 0x0d, 0x0e,
432 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 433};
434
8e21c34c
TD		 435static hda_nid_t stac925x_pin_nids[8] = {
436 0x07, 0x08, 0x0a, 0x0b,
437 0x0c, 0x0d, 0x10, 0x11,
438};
439
2f2f4251
M		 440static hda_nid_t stac922x_pin_nids[10] = {
441 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
442 0x0f, 0x10, 0x11, 0x15, 0x1b,
443};
444
a7662640 445static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 446 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 448 0x14, 0x22, 0x23
e1f0d669
MR		 449};
450
d0513fc6
MR		 451static hda_nid_t stac92hd83xxx_pin_nids[14] = {
452 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
453 0x0f, 0x10, 0x11, 0x12, 0x13,
454 0x1d, 0x1e, 0x1f, 0x20
455};
0ffa9807 456static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 457 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
458 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 459 0x1f,
e035b841
MR		 460};
461
3cc08dc6
MP		 462static hda_nid_t stac927x_pin_nids[14] = {
463 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
464 0x0f, 0x10, 0x11, 0x12, 0x13,
465 0x14, 0x21, 0x22, 0x23,
466};
467
f3302a59
MP		 468static hda_nid_t stac9205_pin_nids[12] = {
469 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
470 0x0f, 0x14, 0x16, 0x17, 0x18,
471 0x21, 0x22,
f3302a59
MP		 472};
473
89385035
MR		 474#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
475
476static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
477 struct snd_ctl_elem_value *ucontrol)
478{
479 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
480 struct sigmatel_spec *spec = codec->spec;
481 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
482
483 kcontrol->private_value ^= get_amp_nid(kcontrol);
484 kcontrol->private_value |= nid;
485
486 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
487}
488
489static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
490 struct snd_ctl_elem_value *ucontrol)
491{
492 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
493 struct sigmatel_spec *spec = codec->spec;
494 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
495
496 kcontrol->private_value ^= get_amp_nid(kcontrol);
497 kcontrol->private_value |= nid;
498
499 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
500}
501
8b65727b
MP		 502static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
503 struct snd_ctl_elem_info *uinfo)
504{
505 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
506 struct sigmatel_spec *spec = codec->spec;
507 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
508}
509
510static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
511 struct snd_ctl_elem_value *ucontrol)
512{
513 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
514 struct sigmatel_spec *spec = codec->spec;
e1f0d669 515 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 516
e1f0d669 517 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 518 return 0;
519}
520
521static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
522 struct snd_ctl_elem_value *ucontrol)
523{
524 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
525 struct sigmatel_spec *spec = codec->spec;
e1f0d669 526 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 527
528 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 529 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 530}
531
d9737751
MR		 532static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
533 struct snd_ctl_elem_info *uinfo)
534{
535 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
536 struct sigmatel_spec *spec = codec->spec;
537 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
538}
539
540static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
541 struct snd_ctl_elem_value *ucontrol)
542{
543 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
544 struct sigmatel_spec *spec = codec->spec;
545 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
546
547 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
548 return 0;
549}
550
551static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
552 struct snd_ctl_elem_value *ucontrol)
553{
554 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
555 struct sigmatel_spec *spec = codec->spec;
00ef50c2 556 struct hda_input_mux *smux = &spec->private_smux;
d9737751 557 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 558 int err, val;
559 hda_nid_t nid;
d9737751 560
00ef50c2 561 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 562 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 563 if (err < 0)
564 return err;
565
566 if (spec->spdif_mute) {
567 if (smux_idx == 0)
568 nid = spec->multiout.dig_out_nid;
569 else
570 nid = codec->slave_dig_outs[smux_idx - 1];
571 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
572 val = AMP_OUT_MUTE;
00ef50c2 573 else
c1e99bd9 574 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 575 /* un/mute SPDIF out */
576 snd_hda_codec_write_cache(codec, nid, 0,
577 AC_VERB_SET_AMP_GAIN_MUTE, val);
578 }
579 return 0;
d9737751
MR		 580}
581
c8b6bf9b 582static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 583{
584 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
585 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 586 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 587}
588
c8b6bf9b 589static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 590{
591 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
592 struct sigmatel_spec *spec = codec->spec;
593 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
594
595 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
596 return 0;
597}
598
c8b6bf9b 599static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 600{
601 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
602 struct sigmatel_spec *spec = codec->spec;
603 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
604
c7d4b2fa 605 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 606 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
607}
608
b22b4821
MR		 609static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_info *uinfo)
611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
614 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
615}
616
617static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
618 struct snd_ctl_elem_value *ucontrol)
619{
620 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
621 struct sigmatel_spec *spec = codec->spec;
622
623 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
624 return 0;
625}
626
627static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *ucontrol)
629{
630 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
631 struct sigmatel_spec *spec = codec->spec;
632
633 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
634 spec->mono_nid, &spec->cur_mmux);
635}
636
89385035
MR		 637static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
638 struct snd_ctl_elem_info *uinfo)
639{
640 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
641 struct sigmatel_spec *spec = codec->spec;
642 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
643}
644
645static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
650
651 ucontrol->value.enumerated.item[0] = spec->cur_amux;
652 return 0;
653}
654
655static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
656 struct snd_ctl_elem_value *ucontrol)
657{
658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
659 struct sigmatel_spec *spec = codec->spec;
660 struct snd_kcontrol *ctl =
661 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
662 if (!ctl)
663 return -EINVAL;
664
665 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
666 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
667
668 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
669 0, &spec->cur_amux);
670}
671
5f10c4a9
ML		 672#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
673
674static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
675 struct snd_ctl_elem_value *ucontrol)
676{
677 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 678 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 679 struct sigmatel_spec *spec = codec->spec;
680
e1f0d669
MR		 681 ucontrol->value.integer.value[0] = !!(spec->aloopback &
682 (spec->aloopback_mask << idx));
5f10c4a9
ML		 683 return 0;
684}
685
686static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
687 struct snd_ctl_elem_value *ucontrol)
688{
689 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
690 struct sigmatel_spec *spec = codec->spec;
e1f0d669 691 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 692 unsigned int dac_mode;
e1f0d669 693 unsigned int val, idx_val;
5f10c4a9 694
e1f0d669
MR		 695 idx_val = spec->aloopback_mask << idx;
696 if (ucontrol->value.integer.value[0])
697 val = spec->aloopback | idx_val;
698 else
699 val = spec->aloopback & ~idx_val;
68ea7b2f 700 if (spec->aloopback == val)
5f10c4a9
ML		 701 return 0;
702
68ea7b2f 703 spec->aloopback = val;
5f10c4a9 704
e1f0d669
MR		 705 /* Only return the bits defined by the shift value of the
706 * first two bytes of the mask
707 */
5f10c4a9 708 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 709 kcontrol->private_value & 0xFFFF, 0x0);
710 dac_mode >>= spec->aloopback_shift;
5f10c4a9 711
e1f0d669 712 if (spec->aloopback & idx_val) {
5f10c4a9 713 snd_hda_power_up(codec);
e1f0d669 714 dac_mode |= idx_val;
5f10c4a9
ML		 715 } else {
716 snd_hda_power_down(codec);
e1f0d669 717 dac_mode &= ~idx_val;
5f10c4a9
ML		 718 }
719
720 snd_hda_codec_write_cache(codec, codec->afg, 0,
721 kcontrol->private_value >> 16, dac_mode);
722
723 return 1;
724}
725
c7d4b2fa 726static struct hda_verb stac9200_core_init[] = {
2f2f4251 727 /* set dac0mux for dac converter */
c7d4b2fa 728 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 729 {}
730};
731
1194b5b7
TI		 732static struct hda_verb stac9200_eapd_init[] = {
733 /* set dac0mux for dac converter */
734 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
735 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
736 {}
737};
738
e1f0d669
MR		 739static struct hda_verb stac92hd73xx_6ch_core_init[] = {
740 /* set master volume and direct control */
741 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
742 /* setup audio connections */
743 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
744 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
745 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
746 /* setup adcs to point to mixer */
747 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
748 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 749 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
750 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
751 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
752 /* setup import muxs */
753 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
754 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
755 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
756 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
757 {}
758};
759
d654a660
MR		 760static struct hda_verb dell_eq_core_init[] = {
761 /* set master volume to max value without distortion
762 * and direct control */
763 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
764 /* setup audio connections */
765 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 766 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
767 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 768 /* setup adcs to point to mixer */
769 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
770 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
771 /* setup import muxs */
772 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
773 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
776 {}
777};
778
52fe0f9d 779static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 780 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 781 /* setup audio connections */
7747ecce
MR		 782 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
783 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 784 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
785 /* setup adcs to point to mixer */
786 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
787 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
788 /* setup import muxs */
789 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
792 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
793 {}
794};
795
e1f0d669
MR		 796static struct hda_verb stac92hd73xx_8ch_core_init[] = {
797 /* set master volume and direct control */
798 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
799 /* setup audio connections */
800 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
801 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
803 /* connect hp ports to dac3 */
804 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
805 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
806 /* setup adcs to point to mixer */
807 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
808 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 809 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
810 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
811 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
812 /* setup import muxs */
813 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
815 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
816 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
817 {}
818};
819
820static struct hda_verb stac92hd73xx_10ch_core_init[] = {
821 /* set master volume and direct control */
822 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
823 /* setup audio connections */
824 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
825 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
826 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
827 /* dac3 is connected to import3 mux */
828 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
829 /* connect hp ports to dac4 */
830 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
831 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
832 /* setup adcs to point to mixer */
833 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
834 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 835 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
838 /* setup import muxs */
839 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
842 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
843 {}
844};
845
d0513fc6
MR		 846static struct hda_verb stac92hd83xxx_core_init[] = {
847 /* start of config #1 */
848 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
849
850 /* start of config #2 */
851 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
852 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
853 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
854
855 /* power state controls amps */
856 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
857};
858
e035b841 859static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 860 /* set master volume and direct control */
861 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
862 /* connect headphone jack to dac1 */
863 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 864 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
865 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
866 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
867 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 868};
869
4b33c767 870#define HD_DISABLE_PORTF 2
541eee87 871static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 872 /* start of config #1 */
873
874 /* connect port 0f to audio mixer */
875 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 876 /* unmute right and left channels for node 0x0f */
877 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
878 /* start of config #2 */
879
e035b841
MR		 880 /* set master volume and direct control */
881 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
882 /* connect headphone jack to dac1 */
883 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 884 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 885 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
886 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 887 {}
888};
889
8e21c34c
TD		 890static struct hda_verb stac925x_core_init[] = {
891 /* set dac0mux for dac converter */
892 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
893 {}
894};
895
c7d4b2fa 896static struct hda_verb stac922x_core_init[] = {
2f2f4251 897 /* set master volume and direct control */
c7d4b2fa 898 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 899 {}
900};
901
93ed1503 902static struct hda_verb d965_core_init[] = {
19039bd0 903 /* set master volume and direct control */
93ed1503 904 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 905 /* unmute node 0x1b */
906 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
907 /* select node 0x03 as DAC */
908 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
909 {}
910};
911
3cc08dc6
MP		 912static struct hda_verb stac927x_core_init[] = {
913 /* set master volume and direct control */
914 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 915 /* enable analog pc beep path */
916 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 917 {}
918};
919
f3302a59
MP		 920static struct hda_verb stac9205_core_init[] = {
921 /* set master volume and direct control */
922 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 923 /* enable analog pc beep path */
924 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 925 {}
926};
927
b22b4821
MR		 928#define STAC_MONO_MUX \
929 { \
930 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
931 .name = "Mono Mux", \
932 .count = 1, \
933 .info = stac92xx_mono_mux_enum_info, \
934 .get = stac92xx_mono_mux_enum_get, \
935 .put = stac92xx_mono_mux_enum_put, \
936 }
937
89385035
MR		 938#define STAC_AMP_MUX \
939 { \
940 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
941 .name = "Amp Selector Capture Switch", \
942 .count = 1, \
943 .info = stac92xx_amp_mux_enum_info, \
944 .get = stac92xx_amp_mux_enum_get, \
945 .put = stac92xx_amp_mux_enum_put, \
946 }
947
948#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
949 { \
950 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
951 .name = xname, \
952 .index = 0, \
953 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
954 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
955 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
956 .info = stac92xx_amp_volume_info, \
957 .get = stac92xx_amp_volume_get, \
958 .put = stac92xx_amp_volume_put, \
959 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
960 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
961 }
962
9e05b7a3 963#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 964 { \
965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
966 .name = "Input Source", \
9e05b7a3 967 .count = cnt, \
ca7c5a8b
ML		 968 .info = stac92xx_mux_enum_info, \
969 .get = stac92xx_mux_enum_get, \
970 .put = stac92xx_mux_enum_put, \
971 }
972
e1f0d669 973#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 974 { \
975 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
976 .name = "Analog Loopback", \
e1f0d669 977 .count = cnt, \
5f10c4a9
ML		 978 .info = stac92xx_aloopback_info, \
979 .get = stac92xx_aloopback_get, \
980 .put = stac92xx_aloopback_put, \
981 .private_value = verb_read | (verb_write << 16), \
982 }
983
c8b6bf9b 984static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 985 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
986 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 987 STAC_INPUT_SOURCE(1),
2f2f4251
M		 988 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
989 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 990 { } /* end */
991};
992
2a9c7816 993#define DELL_M6_MIXER 6
e1f0d669 994static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 995 /* start of config #1 */
e1f0d669
MR		 996 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
997 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
998
e1f0d669
MR		 999 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1000 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1001
2a9c7816
MR		 1002 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1003 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1004
1005 /* start of config #2 */
1006 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1007 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1008
e1f0d669
MR		 1009 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1010 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1011
2a9c7816
MR		 1012 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1013
1014 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1015 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1016
1017 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1018 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1019
e1f0d669
MR		 1020 { } /* end */
1021};
1022
1023static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1024 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1025
e1f0d669
MR		 1026 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1027 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1028
1029 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1030 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1031
1032 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1033 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1036 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1039 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1040
1041 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1042 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1043
1044 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1045 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1046 { } /* end */
1047};
1048
1049static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1050 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1051
e1f0d669
MR		 1052 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1053 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1054
1055 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1056 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1057
1058 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1059 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1062 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1065 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1066
1067 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1068 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1069
1070 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1071 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1072 { } /* end */
1073};
1074
d0513fc6
MR		 1075
1076static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1077 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1078 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1079
1080 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1081 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1082
1083 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1084 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1085
1086 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1087 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1088
1089 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1090 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1091
1092 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1093 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1094
1095 /*
1096 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1097 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1098 */
1099 { } /* end */
1100};
1101
541eee87 1102static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1103 STAC_INPUT_SOURCE(2),
4b33c767 1104 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1105
9b35947f
MR		 1106 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1107 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1108
1109 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1110 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1111 /* analog pc-beep replaced with digital beep support */
1112 /*
f7c5dda2
MR		 1113 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1114 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1115 */
f7c5dda2 1116
687cb98e
MR		 1117 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1118 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1119
687cb98e
MR		 1120 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1121 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1122
1123 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1124 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1125
1126 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1127 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1128 { } /* end */
1129};
1130
541eee87 1131static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1132 STAC_INPUT_SOURCE(2),
1133 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1134
541eee87
MR		 1135 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1136 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1137
1138 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1139 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1140 { } /* end */
1141};
1142
8e21c34c 1143static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1144 STAC_INPUT_SOURCE(1),
8e21c34c 1145 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1146 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1147 { } /* end */
1148};
1149
9e05b7a3 1150static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1151 STAC_INPUT_SOURCE(2),
e1f0d669 1152 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1153
1154 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1155 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1156
1157 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1158 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1159 { } /* end */
1160};
1161
19039bd0 1162/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1163static struct snd_kcontrol_new stac922x_mixer[] = {
1164 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1165 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1166 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1167
1168 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1169 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1170 { } /* end */
1171};
1172
9e05b7a3 1173
d1d985f0 1174static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1175 STAC_INPUT_SOURCE(3),
e1f0d669 1176 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1177
9e05b7a3
ML		 1178 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1179 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1180
1181 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1182 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1183
1184 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1185 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1186 { } /* end */
1187};
1188
1697055e
TI		 1189static struct snd_kcontrol_new stac_dmux_mixer = {
1190 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1191 .name = "Digital Input Source",
1192 /* count set later */
1193 .info = stac92xx_dmux_enum_info,
1194 .get = stac92xx_dmux_enum_get,
1195 .put = stac92xx_dmux_enum_put,
1196};
1197
d9737751
MR		 1198static struct snd_kcontrol_new stac_smux_mixer = {
1199 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1200 .name = "IEC958 Playback Source",
d9737751
MR		 1201 /* count set later */
1202 .info = stac92xx_smux_enum_info,
1203 .get = stac92xx_smux_enum_get,
1204 .put = stac92xx_smux_enum_put,
1205};
1206
2134ea4f
TI		 1207static const char *slave_vols[] = {
1208 "Front Playback Volume",
1209 "Surround Playback Volume",
1210 "Center Playback Volume",
1211 "LFE Playback Volume",
1212 "Side Playback Volume",
1213 "Headphone Playback Volume",
1214 "Headphone Playback Volume",
1215 "Speaker Playback Volume",
1216 "External Speaker Playback Volume",
1217 "Speaker2 Playback Volume",
1218 NULL
1219};
1220
1221static const char *slave_sws[] = {
1222 "Front Playback Switch",
1223 "Surround Playback Switch",
1224 "Center Playback Switch",
1225 "LFE Playback Switch",
1226 "Side Playback Switch",
1227 "Headphone Playback Switch",
1228 "Headphone Playback Switch",
1229 "Speaker Playback Switch",
1230 "External Speaker Playback Switch",
1231 "Speaker2 Playback Switch",
edb54a55 1232 "IEC958 Playback Switch",
2134ea4f
TI		 1233 NULL
1234};
1235
2f2f4251
M		 1236static int stac92xx_build_controls(struct hda_codec *codec)
1237{
1238 struct sigmatel_spec *spec = codec->spec;
1239 int err;
c7d4b2fa 1240 int i;
2f2f4251
M		 1241
1242 err = snd_hda_add_new_ctls(codec, spec->mixer);
1243 if (err < 0)
1244 return err;
c7d4b2fa
M		 1245
1246 for (i = 0; i < spec->num_mixers; i++) {
1247 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1248 if (err < 0)
1249 return err;
1250 }
1697055e
TI		 1251 if (spec->num_dmuxes > 0) {
1252 stac_dmux_mixer.count = spec->num_dmuxes;
1253 err = snd_ctl_add(codec->bus->card,
1254 snd_ctl_new1(&stac_dmux_mixer, codec));
1255 if (err < 0)
1256 return err;
1257 }
d9737751 1258 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1259 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1260 struct hda_input_mux *smux = &spec->private_smux;
1261 /* check for mute support on SPDIF out */
1262 if (wcaps & AC_WCAP_OUT_AMP) {
1263 smux->items[smux->num_items].label = "Off";
1264 smux->items[smux->num_items].index = 0;
1265 smux->num_items++;
1266 spec->spdif_mute = 1;
1267 }
d9737751
MR		 1268 stac_smux_mixer.count = spec->num_smuxes;
1269 err = snd_ctl_add(codec->bus->card,
1270 snd_ctl_new1(&stac_smux_mixer, codec));
1271 if (err < 0)
1272 return err;
1273 }
c7d4b2fa 1274
dabbed6f
M		 1275 if (spec->multiout.dig_out_nid) {
1276 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1277 if (err < 0)
1278 return err;
9a08160b
TI		 1279 err = snd_hda_create_spdif_share_sw(codec,
1280 &spec->multiout);
1281 if (err < 0)
1282 return err;
1283 spec->multiout.share_spdif = 1;
dabbed6f 1284 }
da74ae3e 1285 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1286 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1287 if (err < 0)
1288 return err;
1289 }
2134ea4f
TI		 1290
1291 /* if we have no master control, let's create it */
1292 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1293 unsigned int vmaster_tlv[4];
2134ea4f 1294 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1295 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1296 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1297 vmaster_tlv, slave_vols);
2134ea4f
TI		 1298 if (err < 0)
1299 return err;
1300 }
1301 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1302 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1303 NULL, slave_sws);
1304 if (err < 0)
1305 return err;
1306 }
1307
dabbed6f 1308 return 0;
2f2f4251
M		 1309}
1310
403d1944 1311static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1312 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1313 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1314};
1315
dfe495d0
TI		 1316/*
1317 STAC 9200 pin configs for
1318 102801A8
1319 102801DE
1320 102801E8
1321*/
1322static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1323 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1324 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1325};
1326
1327/*
1328 STAC 9200 pin configs for
1329 102801C0
1330 102801C1
1331*/
1332static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1333 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1334 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1335};
1336
1337/*
1338 STAC 9200 pin configs for
1339 102801C4 (Dell Dimension E310)
1340 102801C5
1341 102801C7
1342 102801D9
1343 102801DA
1344 102801E3
1345*/
1346static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1347 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1348 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1349};
1350
1351
1352/*
1353 STAC 9200-32 pin configs for
1354 102801B5 (Dell Inspiron 630m)
1355 102801D8 (Dell Inspiron 640m)
1356*/
1357static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1358 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1359 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1360};
1361
1362/*
1363 STAC 9200-32 pin configs for
1364 102801C2 (Dell Latitude D620)
1365 102801C8
1366 102801CC (Dell Latitude D820)
1367 102801D4
1368 102801D6
1369*/
1370static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1371 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1372 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1373};
1374
1375/*
1376 STAC 9200-32 pin configs for
1377 102801CE (Dell XPS M1710)
1378 102801CF (Dell Precision M90)
1379*/
1380static unsigned int dell9200_m23_pin_configs[8] = {
1381 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1382 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1383};
1384
1385/*
1386 STAC 9200-32 pin configs for
1387 102801C9
1388 102801CA
1389 102801CB (Dell Latitude 120L)
1390 102801D3
1391*/
1392static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1393 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1394 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1395};
1396
1397/*
1398 STAC 9200-32 pin configs for
1399 102801BD (Dell Inspiron E1505n)
1400 102801EE
1401 102801EF
1402*/
1403static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1404 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1405 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1406};
1407
1408/*
1409 STAC 9200-32 pin configs for
1410 102801F5 (Dell Inspiron 1501)
1411 102801F6
1412*/
1413static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1414 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1415 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1416};
1417
1418/*
1419 STAC 9200-32
1420 102801CD (Dell Inspiron E1705/9400)
1421*/
1422static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1423 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1424 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1425};
1426
bf277785
TD		 1427static unsigned int oqo9200_pin_configs[8] = {
1428 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1429 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1430};
1431
dfe495d0 1432
f5fcc13c
TI		 1433static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1434 [STAC_REF] = ref9200_pin_configs,
bf277785 1435 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1436 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1437 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1438 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1439 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1440 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1441 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1442 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1443 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1444 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1445 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1446 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1447};
1448
f5fcc13c
TI		 1449static const char *stac9200_models[STAC_9200_MODELS] = {
1450 [STAC_REF] = "ref",
bf277785 1451 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1452 [STAC_9200_DELL_D21] = "dell-d21",
1453 [STAC_9200_DELL_D22] = "dell-d22",
1454 [STAC_9200_DELL_D23] = "dell-d23",
1455 [STAC_9200_DELL_M21] = "dell-m21",
1456 [STAC_9200_DELL_M22] = "dell-m22",
1457 [STAC_9200_DELL_M23] = "dell-m23",
1458 [STAC_9200_DELL_M24] = "dell-m24",
1459 [STAC_9200_DELL_M25] = "dell-m25",
1460 [STAC_9200_DELL_M26] = "dell-m26",
1461 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1462 [STAC_9200_GATEWAY] = "gateway",
117f257d 1463 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1464};
1465
1466static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1467 /* SigmaTel reference board */
1468 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1469 "DFI LanParty", STAC_REF),
e7377071 1470 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1472 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1474 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1476 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1478 "unknown Dell", STAC_9200_DELL_D22),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1480 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1482 "Dell Latitude D620", STAC_9200_DELL_M22),
1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1484 "unknown Dell", STAC_9200_DELL_D23),
1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1486 "unknown Dell", STAC_9200_DELL_D23),
1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1488 "unknown Dell", STAC_9200_DELL_M22),
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1490 "unknown Dell", STAC_9200_DELL_M24),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1492 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1494 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1496 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1498 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1500 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1502 "Dell Precision M90", STAC_9200_DELL_M23),
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1504 "unknown Dell", STAC_9200_DELL_M22),
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1506 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1508 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1510 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1512 "unknown Dell", STAC_9200_DELL_D23),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1514 "unknown Dell", STAC_9200_DELL_D23),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1516 "unknown Dell", STAC_9200_DELL_D21),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1518 "unknown Dell", STAC_9200_DELL_D23),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1520 "unknown Dell", STAC_9200_DELL_D21),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1522 "unknown Dell", STAC_9200_DELL_M25),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1524 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1526 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1528 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1529 /* Panasonic */
117f257d 1530 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1531 /* Gateway machines needs EAPD to be set on resume */
1532 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1533 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1534 STAC_9200_GATEWAY),
1535 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1536 STAC_9200_GATEWAY),
bf277785
TD		 1537 /* OQO Mobile */
1538 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1539 {} /* terminator */
1540};
1541
8e21c34c
TD		 1542static unsigned int ref925x_pin_configs[8] = {
1543 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1544 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1545};
1546
1547static unsigned int stac925x_MA6_pin_configs[8] = {
1548 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1549 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1550};
1551
2c11f955
TD		 1552static unsigned int stac925x_PA6_pin_configs[8] = {
1553 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1554 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1555};
1556
8e21c34c 1557static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1558 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1559 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1560};
1561
1562static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1563 [STAC_REF] = ref925x_pin_configs,
1564 [STAC_M2_2] = stac925xM2_2_pin_configs,
1565 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1566 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1567};
1568
1569static const char *stac925x_models[STAC_925x_MODELS] = {
1570 [STAC_REF] = "ref",
1571 [STAC_M2_2] = "m2-2",
1572 [STAC_MA6] = "m6",
2c11f955 1573 [STAC_PA6] = "pa6",
8e21c34c
TD		 1574};
1575
1576static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1577 /* SigmaTel reference board */
1578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1579 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1580 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1581 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1582 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1583 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1584 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1585 {} /* terminator */
1586};
1587
a7662640 1588static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1589 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1590 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1591 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1592 0x01452050,
1593};
1594
1595static unsigned int dell_m6_pin_configs[13] = {
1596 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1597 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1598 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1599 0x4f0000f0,
e1f0d669
MR		 1600};
1601
1602static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1603 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1604 [STAC_DELL_M6] = dell_m6_pin_configs,
6b3ab21e 1605 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1606};
1607
1608static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1609 [STAC_92HD73XX_REF] = "ref",
a7662640 1610 [STAC_DELL_M6] = "dell-m6",
6b3ab21e 1611 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1612};
1613
1614static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1615 /* SigmaTel reference board */
1616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1617 "DFI LanParty", STAC_92HD73XX_REF),
1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1619 "unknown Dell", STAC_DELL_M6),
1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1621 "unknown Dell", STAC_DELL_M6),
1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1623 "unknown Dell", STAC_DELL_M6),
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1625 "unknown Dell", STAC_DELL_M6),
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1627 "unknown Dell", STAC_DELL_M6),
1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1629 "unknown Dell", STAC_DELL_M6),
1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1631 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1632 {} /* terminator */
1633};
1634
d0513fc6
MR		 1635static unsigned int ref92hd83xxx_pin_configs[14] = {
1636 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1637 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1638 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1639 0x01451160, 0x98560170,
1640};
1641
1642static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1643 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1644};
1645
1646static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1647 [STAC_92HD83XXX_REF] = "ref",
1648};
1649
1650static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1651 /* SigmaTel reference board */
1652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1653 "DFI LanParty", STAC_92HD71BXX_REF),
1654};
1655
0ffa9807 1656static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1657 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1658 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1659 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1660};
1661
0ffa9807 1662static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1663 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1664 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1665 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1666};
1667
0ffa9807 1668static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1669 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1670 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1671 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1672};
1673
e035b841
MR		 1674static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1675 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1676 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1677 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1678 [STAC_HP_M4] = NULL,
e035b841
MR		 1679};
1680
1681static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1682 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1683 [STAC_DELL_M4_1] = "dell-m4-1",
1684 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1685 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1686};
1687
1688static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1689 /* SigmaTel reference board */
1690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1691 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1692 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1693 "HP dv5", STAC_HP_M4),
1694 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1695 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1696 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1697 "unknown HP", STAC_HP_M4),
a7662640
MR		 1698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1699 "unknown Dell", STAC_DELL_M4_1),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1701 "unknown Dell", STAC_DELL_M4_1),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1703 "unknown Dell", STAC_DELL_M4_1),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1705 "unknown Dell", STAC_DELL_M4_1),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1707 "unknown Dell", STAC_DELL_M4_1),
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1709 "unknown Dell", STAC_DELL_M4_1),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1711 "unknown Dell", STAC_DELL_M4_1),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1713 "unknown Dell", STAC_DELL_M4_2),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1715 "unknown Dell", STAC_DELL_M4_2),
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1717 "unknown Dell", STAC_DELL_M4_2),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1719 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1720 {} /* terminator */
1721};
1722
403d1944
MP		 1723static unsigned int ref922x_pin_configs[10] = {
1724 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1725 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1726 0x40000100, 0x40000100,
1727};
1728
dfe495d0
TI		 1729/*
1730 STAC 922X pin configs for
1731 102801A7
1732 102801AB
1733 102801A9
1734 102801D1
1735 102801D2
1736*/
1737static unsigned int dell_922x_d81_pin_configs[10] = {
1738 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1739 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1740 0x01813122, 0x400001f2,
1741};
1742
1743/*
1744 STAC 922X pin configs for
1745 102801AC
1746 102801D0
1747*/
1748static unsigned int dell_922x_d82_pin_configs[10] = {
1749 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1750 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1751 0x01813122, 0x400001f1,
1752};
1753
1754/*
1755 STAC 922X pin configs for
1756 102801BF
1757*/
1758static unsigned int dell_922x_m81_pin_configs[10] = {
1759 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1760 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1761 0x40C003f1, 0x405003f0,
1762};
1763
1764/*
1765 STAC 9221 A1 pin configs for
1766 102801D7 (Dell XPS M1210)
1767*/
1768static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1769 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1770 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1771 0x508003f3, 0x405003f4,
1772};
1773
403d1944 1774static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1775 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1776 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1777 0x02a19120, 0x40000100,
1778};
1779
1780static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1781 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1782 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1783 0x02a19320, 0x40000100,
1784};
1785
5d5d3bc3
IZ		 1786static unsigned int intel_mac_v1_pin_configs[10] = {
1787 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1788 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1789 0x400000fc, 0x400000fb,
1790};
1791
1792static unsigned int intel_mac_v2_pin_configs[10] = {
1793 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1794 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1795 0x400000fc, 0x400000fb,
6f0778d8
NB		 1796};
1797
5d5d3bc3
IZ		 1798static unsigned int intel_mac_v3_pin_configs[10] = {
1799 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1800 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1801 0x400000fc, 0x400000fb,
1802};
1803
5d5d3bc3
IZ		 1804static unsigned int intel_mac_v4_pin_configs[10] = {
1805 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1806 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1807 0x400000fc, 0x400000fb,
1808};
1809
5d5d3bc3
IZ		 1810static unsigned int intel_mac_v5_pin_configs[10] = {
1811 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1812 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1813 0x400000fc, 0x400000fb,
0dae0f83
TI		 1814};
1815
8c650087
MCC		 1816static unsigned int ecs202_pin_configs[10] = {
1817 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1818 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1819 0x9037012e, 0x40e000f2,
1820};
76c08828 1821
19039bd0 1822static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1823 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1824 [STAC_D945GTP3] = d945gtp3_pin_configs,
1825 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1826 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1827 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1828 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1829 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1830 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1831 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1832 /* for backward compatibility */
5d5d3bc3
IZ		 1833 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1834 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1835 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1836 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1837 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1838 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1839 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1840 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1841 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1842 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1843 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1844};
1845
f5fcc13c
TI		 1846static const char *stac922x_models[STAC_922X_MODELS] = {
1847 [STAC_D945_REF] = "ref",
1848 [STAC_D945GTP5] = "5stack",
1849 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1850 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1851 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1852 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1853 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1854 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1855 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1856 /* for backward compatibility */
f5fcc13c 1857 [STAC_MACMINI] = "macmini",
3fc24d85 1858 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1859 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1860 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1861 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1862 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1863 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1864 [STAC_922X_DELL_D81] = "dell-d81",
1865 [STAC_922X_DELL_D82] = "dell-d82",
1866 [STAC_922X_DELL_M81] = "dell-m81",
1867 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1868};
1869
1870static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1871 /* SigmaTel reference board */
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1873 "DFI LanParty", STAC_D945_REF),
1874 /* Intel 945G based systems */
1875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1876 "Intel D945G", STAC_D945GTP3),
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1878 "Intel D945G", STAC_D945GTP3),
1879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1880 "Intel D945G", STAC_D945GTP3),
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1882 "Intel D945G", STAC_D945GTP3),
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1884 "Intel D945G", STAC_D945GTP3),
1885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1886 "Intel D945G", STAC_D945GTP3),
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1888 "Intel D945G", STAC_D945GTP3),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1890 "Intel D945G", STAC_D945GTP3),
1891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1892 "Intel D945G", STAC_D945GTP3),
1893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1894 "Intel D945G", STAC_D945GTP3),
1895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1896 "Intel D945G", STAC_D945GTP3),
1897 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1898 "Intel D945G", STAC_D945GTP3),
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1900 "Intel D945G", STAC_D945GTP3),
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1902 "Intel D945G", STAC_D945GTP3),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1904 "Intel D945G", STAC_D945GTP3),
1905 /* Intel D945G 5-stack systems */
1906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1907 "Intel D945G", STAC_D945GTP5),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1909 "Intel D945G", STAC_D945GTP5),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1911 "Intel D945G", STAC_D945GTP5),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1913 "Intel D945G", STAC_D945GTP5),
1914 /* Intel 945P based systems */
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1916 "Intel D945P", STAC_D945GTP3),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1918 "Intel D945P", STAC_D945GTP3),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1920 "Intel D945P", STAC_D945GTP3),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1922 "Intel D945P", STAC_D945GTP3),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1924 "Intel D945P", STAC_D945GTP3),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1926 "Intel D945P", STAC_D945GTP5),
1927 /* other systems */
536319af 1928 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1929 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1930 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1931 /* Dell systems */
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1933 "unknown Dell", STAC_922X_DELL_D81),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1935 "unknown Dell", STAC_922X_DELL_D81),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1937 "unknown Dell", STAC_922X_DELL_D81),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1939 "unknown Dell", STAC_922X_DELL_D82),
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1941 "unknown Dell", STAC_922X_DELL_M81),
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1943 "unknown Dell", STAC_922X_DELL_D82),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1945 "unknown Dell", STAC_922X_DELL_D81),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1947 "unknown Dell", STAC_922X_DELL_D81),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1949 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1950 /* ECS/PC Chips boards */
1951 SND_PCI_QUIRK(0x1019, 0x2144,
1952 "ECS/PC chips", STAC_ECS_202),
1953 SND_PCI_QUIRK(0x1019, 0x2608,
1954 "ECS/PC chips", STAC_ECS_202),
1955 SND_PCI_QUIRK(0x1019, 0x2633,
1956 "ECS/PC chips P17G/1333", STAC_ECS_202),
1957 SND_PCI_QUIRK(0x1019, 0x2811,
1958 "ECS/PC chips", STAC_ECS_202),
1959 SND_PCI_QUIRK(0x1019, 0x2812,
1960 "ECS/PC chips", STAC_ECS_202),
1961 SND_PCI_QUIRK(0x1019, 0x2813,
1962 "ECS/PC chips", STAC_ECS_202),
1963 SND_PCI_QUIRK(0x1019, 0x2814,
1964 "ECS/PC chips", STAC_ECS_202),
1965 SND_PCI_QUIRK(0x1019, 0x2815,
1966 "ECS/PC chips", STAC_ECS_202),
1967 SND_PCI_QUIRK(0x1019, 0x2816,
1968 "ECS/PC chips", STAC_ECS_202),
1969 SND_PCI_QUIRK(0x1019, 0x2817,
1970 "ECS/PC chips", STAC_ECS_202),
1971 SND_PCI_QUIRK(0x1019, 0x2818,
1972 "ECS/PC chips", STAC_ECS_202),
1973 SND_PCI_QUIRK(0x1019, 0x2819,
1974 "ECS/PC chips", STAC_ECS_202),
1975 SND_PCI_QUIRK(0x1019, 0x2820,
1976 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1977 {} /* terminator */
1978};
1979
3cc08dc6 1980static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1981 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1982 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1983 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1984 0x01c42190, 0x40000100,
3cc08dc6
MP		 1985};
1986
93ed1503 1987static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1988 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1989 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1990 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1991 0x40000100, 0x40000100
1992};
1993
93ed1503
TD		 1994static unsigned int d965_5st_pin_configs[14] = {
1995 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1996 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1997 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1998 0x40000100, 0x40000100
1999};
2000
4ff076e5
TD		 2001static unsigned int dell_3st_pin_configs[14] = {
2002 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2003 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2004 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2005 0x40c003fc, 0x40000100
2006};
2007
93ed1503 2008static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2009 [STAC_D965_REF] = ref927x_pin_configs,
2010 [STAC_D965_3ST] = d965_3st_pin_configs,
2011 [STAC_D965_5ST] = d965_5st_pin_configs,
2012 [STAC_DELL_3ST] = dell_3st_pin_configs,
2013 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2014};
2015
f5fcc13c 2016static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2017 [STAC_D965_REF] = "ref",
2018 [STAC_D965_3ST] = "3stack",
2019 [STAC_D965_5ST] = "5stack",
2020 [STAC_DELL_3ST] = "dell-3stack",
2021 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2022};
2023
2024static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2025 /* SigmaTel reference board */
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2027 "DFI LanParty", STAC_D965_REF),
81d3dbde 2028 /* Intel 946 based systems */
f5fcc13c
TI		 2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2031 /* 965 based 3 stack systems */
f5fcc13c
TI		 2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2048 /* Dell 3 stack systems */
8e9068b1 2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2053 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2062 /* 965 based 5 stack systems */
f5fcc13c
TI		 2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2072 {} /* terminator */
2073};
2074
f3302a59
MP		 2075static unsigned int ref9205_pin_configs[12] = {
2076 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2077 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2078 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2079};
2080
dfe495d0
TI		 2081/*
2082 STAC 9205 pin configs for
2083 102801F1
2084 102801F2
2085 102801FC
2086 102801FD
2087 10280204
2088 1028021F
3fa2ef74 2089 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2090*/
2091static unsigned int dell_9205_m42_pin_configs[12] = {
2092 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2093 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2094 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2095};
2096
2097/*
2098 STAC 9205 pin configs for
2099 102801F9
2100 102801FA
2101 102801FE
2102 102801FF (Dell Precision M4300)
2103 10280206
2104 10280200
2105 10280201
2106*/
2107static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2108 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2109 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2110 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2111};
2112
dfe495d0 2113static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2114 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2115 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2116 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2117};
2118
f5fcc13c 2119static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2120 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2121 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2122 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2123 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2124};
2125
f5fcc13c
TI		 2126static const char *stac9205_models[STAC_9205_MODELS] = {
2127 [STAC_9205_REF] = "ref",
dfe495d0 2128 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2129 [STAC_9205_DELL_M43] = "dell-m43",
2130 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2131};
2132
2133static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2134 /* SigmaTel reference board */
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2136 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2138 "unknown Dell", STAC_9205_DELL_M42),
2139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2140 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2142 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2144 "Dell Precision", STAC_9205_DELL_M43),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2146 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2148 "unknown Dell", STAC_9205_DELL_M42),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2150 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2152 "Dell Precision", STAC_9205_DELL_M43),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2154 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2156 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2158 "Dell Precision", STAC_9205_DELL_M43),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2160 "Dell Precision", STAC_9205_DELL_M43),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2162 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2164 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2166 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2167 {} /* terminator */
2168};
2169
11b44bbd
RF		 2170static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2171{
2172 int i;
2173 struct sigmatel_spec *spec = codec->spec;
2174
2175 if (! spec->bios_pin_configs) {
2176 spec->bios_pin_configs = kcalloc(spec->num_pins,
2177 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2178 if (! spec->bios_pin_configs)
2179 return -ENOMEM;
2180 }
2181
2182 for (i = 0; i < spec->num_pins; i++) {
2183 hda_nid_t nid = spec->pin_nids[i];
2184 unsigned int pin_cfg;
2185
2186 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2187 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2188 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2189 nid, pin_cfg);
2190 spec->bios_pin_configs[i] = pin_cfg;
2191 }
2192
2193 return 0;
2194}
2195
87d48363
MR		 2196static void stac92xx_set_config_reg(struct hda_codec *codec,
2197 hda_nid_t pin_nid, unsigned int pin_config)
2198{
2199 int i;
2200 snd_hda_codec_write(codec, pin_nid, 0,
2201 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2202 pin_config & 0x000000ff);
2203 snd_hda_codec_write(codec, pin_nid, 0,
2204 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2205 (pin_config & 0x0000ff00) >> 8);
2206 snd_hda_codec_write(codec, pin_nid, 0,
2207 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2208 (pin_config & 0x00ff0000) >> 16);
2209 snd_hda_codec_write(codec, pin_nid, 0,
2210 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2211 pin_config >> 24);
2212 i = snd_hda_codec_read(codec, pin_nid, 0,
2213 AC_VERB_GET_CONFIG_DEFAULT,
2214 0x00);
2215 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2216 pin_nid, i);
2217}
2218
2f2f4251
M		 2219static void stac92xx_set_config_regs(struct hda_codec *codec)
2220{
2221 int i;
2222 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2223
87d48363
MR		 2224 if (!spec->pin_configs)
2225 return;
11b44bbd 2226
87d48363
MR		 2227 for (i = 0; i < spec->num_pins; i++)
2228 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2229 spec->pin_configs[i]);
2f2f4251 2230}
2f2f4251 2231
dabbed6f 2232/*
c7d4b2fa 2233 * Analog playback callbacks
dabbed6f 2234 */
c7d4b2fa
M		 2235static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2236 struct hda_codec *codec,
c8b6bf9b 2237 struct snd_pcm_substream *substream)
2f2f4251 2238{
dabbed6f 2239 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2240 if (spec->stream_delay)
2241 msleep(spec->stream_delay);
9a08160b
TI		 2242 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2243 hinfo);
2f2f4251
M		 2244}
2245
2f2f4251
M		 2246static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2247 struct hda_codec *codec,
2248 unsigned int stream_tag,
2249 unsigned int format,
c8b6bf9b 2250 struct snd_pcm_substream *substream)
2f2f4251
M		 2251{
2252 struct sigmatel_spec *spec = codec->spec;
403d1944 2253 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2254}
2255
2256static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2257 struct hda_codec *codec,
c8b6bf9b 2258 struct snd_pcm_substream *substream)
2f2f4251
M		 2259{
2260 struct sigmatel_spec *spec = codec->spec;
2261 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2262}
2263
dabbed6f
M		 2264/*
2265 * Digital playback callbacks
2266 */
2267static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2268 struct hda_codec *codec,
c8b6bf9b 2269 struct snd_pcm_substream *substream)
dabbed6f
M		 2270{
2271 struct sigmatel_spec *spec = codec->spec;
2272 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2273}
2274
2275static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2276 struct hda_codec *codec,
c8b6bf9b 2277 struct snd_pcm_substream *substream)
dabbed6f
M		 2278{
2279 struct sigmatel_spec *spec = codec->spec;
2280 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2281}
2282
6b97eb45
TI		 2283static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2284 struct hda_codec *codec,
2285 unsigned int stream_tag,
2286 unsigned int format,
2287 struct snd_pcm_substream *substream)
2288{
2289 struct sigmatel_spec *spec = codec->spec;
2290 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2291 stream_tag, format, substream);
2292}
2293
dabbed6f 2294
2f2f4251
M		 2295/*
2296 * Analog capture callbacks
2297 */
2298static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2299 struct hda_codec *codec,
2300 unsigned int stream_tag,
2301 unsigned int format,
c8b6bf9b 2302 struct snd_pcm_substream *substream)
2f2f4251
M		 2303{
2304 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2305 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2306
8daaaa97
MR		 2307 if (spec->powerdown_adcs) {
2308 msleep(40);
2309 snd_hda_codec_write_cache(codec, nid, 0,
2310 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2311 }
2312 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2313 return 0;
2314}
2315
2316static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2317 struct hda_codec *codec,
c8b6bf9b 2318 struct snd_pcm_substream *substream)
2f2f4251
M		 2319{
2320 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2321 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2322
8daaaa97
MR		 2323 snd_hda_codec_cleanup_stream(codec, nid);
2324 if (spec->powerdown_adcs)
2325 snd_hda_codec_write_cache(codec, nid, 0,
2326 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2327 return 0;
2328}
2329
dabbed6f
M		 2330static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2331 .substreams = 1,
2332 .channels_min = 2,
2333 .channels_max = 2,
2334 /* NID is set in stac92xx_build_pcms */
2335 .ops = {
2336 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2337 .close = stac92xx_dig_playback_pcm_close,
2338 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2339 },
2340};
2341
2342static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2343 .substreams = 1,
2344 .channels_min = 2,
2345 .channels_max = 2,
2346 /* NID is set in stac92xx_build_pcms */
2347};
2348
2f2f4251
M		 2349static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2350 .substreams = 1,
2351 .channels_min = 2,
c7d4b2fa 2352 .channels_max = 8,
2f2f4251
M		 2353 .nid = 0x02, /* NID to query formats and rates */
2354 .ops = {
2355 .open = stac92xx_playback_pcm_open,
2356 .prepare = stac92xx_playback_pcm_prepare,
2357 .cleanup = stac92xx_playback_pcm_cleanup
2358 },
2359};
2360
3cc08dc6
MP		 2361static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2362 .substreams = 1,
2363 .channels_min = 2,
2364 .channels_max = 2,
2365 .nid = 0x06, /* NID to query formats and rates */
2366 .ops = {
2367 .open = stac92xx_playback_pcm_open,
2368 .prepare = stac92xx_playback_pcm_prepare,
2369 .cleanup = stac92xx_playback_pcm_cleanup
2370 },
2371};
2372
2f2f4251 2373static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2374 .channels_min = 2,
2375 .channels_max = 2,
9e05b7a3 2376 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2377 .ops = {
2378 .prepare = stac92xx_capture_pcm_prepare,
2379 .cleanup = stac92xx_capture_pcm_cleanup
2380 },
2381};
2382
2383static int stac92xx_build_pcms(struct hda_codec *codec)
2384{
2385 struct sigmatel_spec *spec = codec->spec;
2386 struct hda_pcm *info = spec->pcm_rec;
2387
2388 codec->num_pcms = 1;
2389 codec->pcm_info = info;
2390
c7d4b2fa 2391 info->name = "STAC92xx Analog";
2f2f4251 2392 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2393 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2394 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2395 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2396
2397 if (spec->alt_switch) {
2398 codec->num_pcms++;
2399 info++;
2400 info->name = "STAC92xx Analog Alt";
2401 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2402 }
2f2f4251 2403
dabbed6f
M		 2404 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2405 codec->num_pcms++;
2406 info++;
2407 info->name = "STAC92xx Digital";
7ba72ba1 2408 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2409 if (spec->multiout.dig_out_nid) {
2410 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2411 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2412 }
2413 if (spec->dig_in_nid) {
2414 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2415 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2416 }
2417 }
2418
2f2f4251
M		 2419 return 0;
2420}
2421
c960a03b
TI		 2422static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2423{
2424 unsigned int pincap = snd_hda_param_read(codec, nid,
2425 AC_PAR_PIN_CAP);
2426 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2427 if (pincap & AC_PINCAP_VREF_100)
2428 return AC_PINCTL_VREF_100;
2429 if (pincap & AC_PINCAP_VREF_80)
2430 return AC_PINCTL_VREF_80;
2431 if (pincap & AC_PINCAP_VREF_50)
2432 return AC_PINCTL_VREF_50;
2433 if (pincap & AC_PINCAP_VREF_GRD)
2434 return AC_PINCTL_VREF_GRD;
2435 return 0;
2436}
2437
403d1944
MP		 2438static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2439
2440{
82beb8fd
TI		 2441 snd_hda_codec_write_cache(codec, nid, 0,
2442 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2443}
2444
7c2ba97b
MR		 2445#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2446
2447static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2448 struct snd_ctl_elem_value *ucontrol)
2449{
2450 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2451 struct sigmatel_spec *spec = codec->spec;
2452
d7a89436 2453 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2454 return 0;
2455}
2456
2457static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2458 struct snd_ctl_elem_value *ucontrol)
2459{
2460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2461 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2462 int nid = kcontrol->private_value;
2463
2464 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2465
2466 /* check to be sure that the ports are upto date with
2467 * switch changes
2468 */
2469 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2470
2471 return 1;
2472}
2473
a5ce8890 2474#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2475
2476static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2477{
2478 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2479 struct sigmatel_spec *spec = codec->spec;
2480 int io_idx = kcontrol-> private_value & 0xff;
2481
2482 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2483 return 0;
2484}
2485
2486static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2487{
2488 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2489 struct sigmatel_spec *spec = codec->spec;
2490 hda_nid_t nid = kcontrol->private_value >> 8;
2491 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2492 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2493
2494 spec->io_switch[io_idx] = val;
2495
2496 if (val)
2497 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2498 else {
2499 unsigned int pinctl = AC_PINCTL_IN_EN;
2500 if (io_idx) /* set VREF for mic */
2501 pinctl |= stac92xx_get_vref(codec, nid);
2502 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2503 }
40c1d308
JZ		 2504
2505 /* check the auto-mute again: we need to mute/unmute the speaker
2506 * appropriately according to the pin direction
2507 */
2508 if (spec->hp_detect)
2509 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2510
403d1944
MP		 2511 return 1;
2512}
2513
0fb87bb4
ML		 2514#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2515
2516static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2517 struct snd_ctl_elem_value *ucontrol)
2518{
2519 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2520 struct sigmatel_spec *spec = codec->spec;
2521
2522 ucontrol->value.integer.value[0] = spec->clfe_swap;
2523 return 0;
2524}
2525
2526static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2527 struct snd_ctl_elem_value *ucontrol)
2528{
2529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2530 struct sigmatel_spec *spec = codec->spec;
2531 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2532 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2533
68ea7b2f 2534 if (spec->clfe_swap == val)
0fb87bb4
ML		 2535 return 0;
2536
68ea7b2f 2537 spec->clfe_swap = val;
0fb87bb4
ML		 2538
2539 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2540 spec->clfe_swap ? 0x4 : 0x0);
2541
2542 return 1;
2543}
2544
7c2ba97b
MR		 2545#define STAC_CODEC_HP_SWITCH(xname) \
2546 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2547 .name = xname, \
2548 .index = 0, \
2549 .info = stac92xx_hp_switch_info, \
2550 .get = stac92xx_hp_switch_get, \
2551 .put = stac92xx_hp_switch_put, \
2552 }
2553
403d1944
MP		 2554#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2555 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2556 .name = xname, \
2557 .index = 0, \
2558 .info = stac92xx_io_switch_info, \
2559 .get = stac92xx_io_switch_get, \
2560 .put = stac92xx_io_switch_put, \
2561 .private_value = xpval, \
2562 }
2563
0fb87bb4
ML		 2564#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2565 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2566 .name = xname, \
2567 .index = 0, \
2568 .info = stac92xx_clfe_switch_info, \
2569 .get = stac92xx_clfe_switch_get, \
2570 .put = stac92xx_clfe_switch_put, \
2571 .private_value = xpval, \
2572 }
403d1944 2573
c7d4b2fa
M		 2574enum {
2575 STAC_CTL_WIDGET_VOL,
2576 STAC_CTL_WIDGET_MUTE,
09a99959 2577 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2578 STAC_CTL_WIDGET_AMP_MUX,
2579 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2580 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2581 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2582 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2583};
2584
c8b6bf9b 2585static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2586 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2587 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2588 STAC_MONO_MUX,
89385035
MR		 2589 STAC_AMP_MUX,
2590 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2591 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2592 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2593 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2594};
2595
2596/* add dynamic controls */
4d4e9bb3
TI		 2597static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2598 struct snd_kcontrol_new *ktemp,
2599 int idx, const char *name,
2600 unsigned long val)
c7d4b2fa 2601{
c8b6bf9b 2602 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2603
2604 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2605 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2606
2607 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2608 if (! knew)
2609 return -ENOMEM;
2610 if (spec->kctl_alloc) {
2611 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2612 kfree(spec->kctl_alloc);
2613 }
2614 spec->kctl_alloc = knew;
2615 spec->num_kctl_alloc = num;
2616 }
2617
2618 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2619 *knew = *ktemp;
4682eee0 2620 knew->index = idx;
82fe0c58 2621 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2622 if (!knew->name)
c7d4b2fa
M		 2623 return -ENOMEM;
2624 knew->private_value = val;
2625 spec->num_kctl_used++;
2626 return 0;
2627}
2628
4d4e9bb3
TI		 2629static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2630 int type, int idx, const char *name,
2631 unsigned long val)
2632{
2633 return stac92xx_add_control_temp(spec,
2634 &stac92xx_control_templates[type],
2635 idx, name, val);
2636}
2637
4682eee0
MR		 2638
2639/* add dynamic controls */
4d4e9bb3
TI		 2640static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2641 const char *name, unsigned long val)
4682eee0
MR		 2642{
2643 return stac92xx_add_control_idx(spec, type, 0, name, val);
2644}
2645
403d1944
MP		 2646/* flag inputs as additional dynamic lineouts */
2647static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2648{
2649 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2650 unsigned int wcaps, wtype;
2651 int i, num_dacs = 0;
2652
2653 /* use the wcaps cache to count all DACs available for line-outs */
2654 for (i = 0; i < codec->num_nodes; i++) {
2655 wcaps = codec->wcaps[i];
2656 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2657
7b043899
SL		 2658 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2659 num_dacs++;
2660 }
403d1944 2661
7b043899
SL		 2662 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2663
403d1944
MP		 2664 switch (cfg->line_outs) {
2665 case 3:
2666 /* add line-in as side */
7b043899 2667 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2668 cfg->line_out_pins[cfg->line_outs] =
2669 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2670 spec->line_switch = 1;
2671 cfg->line_outs++;
2672 }
2673 break;
2674 case 2:
2675 /* add line-in as clfe and mic as side */
7b043899 2676 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2677 cfg->line_out_pins[cfg->line_outs] =
2678 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2679 spec->line_switch = 1;
2680 cfg->line_outs++;
2681 }
7b043899 2682 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2683 cfg->line_out_pins[cfg->line_outs] =
2684 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2685 spec->mic_switch = 1;
2686 cfg->line_outs++;
2687 }
2688 break;
2689 case 1:
2690 /* add line-in as surr and mic as clfe */
7b043899 2691 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2692 cfg->line_out_pins[cfg->line_outs] =
2693 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2694 spec->line_switch = 1;
2695 cfg->line_outs++;
2696 }
7b043899 2697 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2698 cfg->line_out_pins[cfg->line_outs] =
2699 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2700 spec->mic_switch = 1;
2701 cfg->line_outs++;
2702 }
2703 break;
2704 }
2705
2706 return 0;
2707}
2708
7b043899
SL		 2709
2710static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2711{
2712 int i;
2713
2714 for (i = 0; i < spec->multiout.num_dacs; i++) {
2715 if (spec->multiout.dac_nids[i] == nid)
2716 return 1;
2717 }
2718
2719 return 0;
2720}
2721
3cc08dc6 2722/*
7b043899
SL		 2723 * Fill in the dac_nids table from the parsed pin configuration
2724 * This function only works when every pin in line_out_pins[]
2725 * contains atleast one DAC in its connection list. Some 92xx
2726 * codecs are not connected directly to a DAC, such as the 9200
2727 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2728 */
19039bd0 2729static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2730 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2731{
2732 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2733 int i, j, conn_len = 0;
2734 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2735 unsigned int wcaps, wtype;
2736
c7d4b2fa
M		 2737 for (i = 0; i < cfg->line_outs; i++) {
2738 nid = cfg->line_out_pins[i];
7b043899
SL		 2739 conn_len = snd_hda_get_connections(codec, nid, conn,
2740 HDA_MAX_CONNECTIONS);
2741 for (j = 0; j < conn_len; j++) {
2742 wcaps = snd_hda_param_read(codec, conn[j],
2743 AC_PAR_AUDIO_WIDGET_CAP);
2744 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2745 if (wtype != AC_WID_AUD_OUT ||
2746 (wcaps & AC_WCAP_DIGITAL))
2747 continue;
2748 /* conn[j] is a DAC routed to this line-out */
2749 if (!is_in_dac_nids(spec, conn[j]))
2750 break;
2751 }
2752
2753 if (j == conn_len) {
df802952
TI		 2754 if (spec->multiout.num_dacs > 0) {
2755 /* we have already working output pins,
2756 * so let's drop the broken ones again
2757 */
2758 cfg->line_outs = spec->multiout.num_dacs;
2759 break;
2760 }
7b043899
SL		 2761 /* error out, no available DAC found */
2762 snd_printk(KERN_ERR
2763 "%s: No available DAC for pin 0x%x\n",
2764 __func__, nid);
2765 return -ENODEV;
2766 }
2767
2768 spec->multiout.dac_nids[i] = conn[j];
2769 spec->multiout.num_dacs++;
2770 if (conn_len > 1) {
2771 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2772 snd_hda_codec_write_cache(codec, nid, 0,
2773 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2774
7b043899
SL		 2775 }
2776 }
c7d4b2fa 2777
7b043899
SL		 2778 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2779 spec->multiout.num_dacs,
2780 spec->multiout.dac_nids[0],
2781 spec->multiout.dac_nids[1],
2782 spec->multiout.dac_nids[2],
2783 spec->multiout.dac_nids[3],
2784 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2785 return 0;
2786}
2787
eb06ed8f
TI		 2788/* create volume control/switch for the given prefx type */
2789static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2790{
2791 char name[32];
2792 int err;
2793
2794 sprintf(name, "%s Playback Volume", pfx);
2795 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2796 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2797 if (err < 0)
2798 return err;
2799 sprintf(name, "%s Playback Switch", pfx);
2800 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2801 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2802 if (err < 0)
2803 return err;
2804 return 0;
2805}
2806
ae0afd81
MR		 2807static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2808{
2809 if (!spec->multiout.hp_nid)
2810 spec->multiout.hp_nid = nid;
2811 else if (spec->multiout.num_dacs > 4) {
2812 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2813 return 1;
2814 } else {
2815 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2816 spec->multiout.num_dacs++;
2817 }
2818 return 0;
2819}
2820
2821static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2822{
2823 if (is_in_dac_nids(spec, nid))
2824 return 1;
2825 if (spec->multiout.hp_nid == nid)
2826 return 1;
2827 return 0;
2828}
2829
c7d4b2fa 2830/* add playback controls from the parsed DAC table */
0fb87bb4 2831static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2832 const struct auto_pin_cfg *cfg)
c7d4b2fa 2833{
19039bd0
TI		 2834 static const char *chname[4] = {
2835 "Front", "Surround", NULL /*CLFE*/, "Side"
2836 };
d21995e3 2837 hda_nid_t nid = 0;
c7d4b2fa
M		 2838 int i, err;
2839
0fb87bb4 2840 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2841 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2842
2843
40ac8c4f 2844 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2845 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2846 continue;
2847
2848 nid = spec->multiout.dac_nids[i];
2849
2850 if (i == 2) {
2851 /* Center/LFE */
eb06ed8f
TI		 2852 err = create_controls(spec, "Center", nid, 1);
2853 if (err < 0)
c7d4b2fa 2854 return err;
eb06ed8f
TI		 2855 err = create_controls(spec, "LFE", nid, 2);
2856 if (err < 0)
c7d4b2fa 2857 return err;
0fb87bb4
ML		 2858
2859 wid_caps = get_wcaps(codec, nid);
2860
2861 if (wid_caps & AC_WCAP_LR_SWAP) {
2862 err = stac92xx_add_control(spec,
2863 STAC_CTL_WIDGET_CLFE_SWITCH,
2864 "Swap Center/LFE Playback Switch", nid);
2865
2866 if (err < 0)
2867 return err;
2868 }
2869
c7d4b2fa 2870 } else {
eb06ed8f
TI		 2871 err = create_controls(spec, chname[i], nid, 3);
2872 if (err < 0)
c7d4b2fa
M		 2873 return err;
2874 }
2875 }
2876
fedb7569
MR		 2877 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2878 cfg->hp_outs && !spec->multiout.hp_nid)
2879 spec->multiout.hp_nid = nid;
2880
7c2ba97b
MR		 2881 if (cfg->hp_outs > 1) {
2882 err = stac92xx_add_control(spec,
2883 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2884 "Headphone as Line Out Switch",
2885 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2886 if (err < 0)
2887 return err;
2888 }
2889
b5895dc8
MR		 2890 if (spec->line_switch) {
2891 nid = cfg->input_pins[AUTO_PIN_LINE];
2892 pincap = snd_hda_param_read(codec, nid,
2893 AC_PAR_PIN_CAP);
2894 if (pincap & AC_PINCAP_OUT) {
2895 err = stac92xx_add_control(spec,
2896 STAC_CTL_WIDGET_IO_SWITCH,
2897 "Line In as Output Switch", nid << 8);
2898 if (err < 0)
2899 return err;
2900 }
2901 }
403d1944 2902
b5895dc8 2903 if (spec->mic_switch) {
cace16f1 2904 unsigned int def_conf;
ae0afd81
MR		 2905 unsigned int mic_pin = AUTO_PIN_MIC;
2906again:
2907 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2908 def_conf = snd_hda_codec_read(codec, nid, 0,
2909 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2910 /* some laptops have an internal analog microphone
2911 * which can't be used as a output */
2912 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2913 pincap = snd_hda_param_read(codec, nid,
2914 AC_PAR_PIN_CAP);
2915 if (pincap & AC_PINCAP_OUT) {
2916 err = stac92xx_add_control(spec,
2917 STAC_CTL_WIDGET_IO_SWITCH,
2918 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2919 nid = snd_hda_codec_read(codec, nid, 0,
2920 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2921 if (!check_in_dac_nids(spec, nid))
2922 add_spec_dacs(spec, nid);
cace16f1
MR		 2923 if (err < 0)
2924 return err;
2925 }
ae0afd81
MR		 2926 } else if (mic_pin == AUTO_PIN_MIC) {
2927 mic_pin = AUTO_PIN_FRONT_MIC;
2928 goto again;
b5895dc8
MR		 2929 }
2930 }
403d1944 2931
c7d4b2fa
M		 2932 return 0;
2933}
2934
eb06ed8f
TI		 2935/* add playback controls for Speaker and HP outputs */
2936static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2937 struct auto_pin_cfg *cfg)
2938{
2939 struct sigmatel_spec *spec = codec->spec;
2940 hda_nid_t nid;
2941 int i, old_num_dacs, err;
2942
2943 old_num_dacs = spec->multiout.num_dacs;
2944 for (i = 0; i < cfg->hp_outs; i++) {
2945 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2946 if (wid_caps & AC_WCAP_UNSOL_CAP)
2947 spec->hp_detect = 1;
2948 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2949 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2950 if (check_in_dac_nids(spec, nid))
2951 nid = 0;
2952 if (! nid)
c7d4b2fa 2953 continue;
eb06ed8f
TI		 2954 add_spec_dacs(spec, nid);
2955 }
2956 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2957 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2958 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2959 if (check_in_dac_nids(spec, nid))
2960 nid = 0;
eb06ed8f
TI		 2961 if (! nid)
2962 continue;
2963 add_spec_dacs(spec, nid);
c7d4b2fa 2964 }
1b290a51
MR		 2965 for (i = 0; i < cfg->line_outs; i++) {
2966 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2967 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2968 if (check_in_dac_nids(spec, nid))
2969 nid = 0;
2970 if (! nid)
2971 continue;
2972 add_spec_dacs(spec, nid);
2973 }
eb06ed8f
TI		 2974 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2975 static const char *pfxs[] = {
2976 "Speaker", "External Speaker", "Speaker2",
2977 };
2978 err = create_controls(spec, pfxs[i - old_num_dacs],
2979 spec->multiout.dac_nids[i], 3);
2980 if (err < 0)
2981 return err;
2982 }
2983 if (spec->multiout.hp_nid) {
2626a263
TI		 2984 err = create_controls(spec, "Headphone",
2985 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2986 if (err < 0)
2987 return err;
2988 }
c7d4b2fa
M		 2989
2990 return 0;
2991}
2992
b22b4821 2993/* labels for mono mux outputs */
d0513fc6
MR		 2994static const char *stac92xx_mono_labels[4] = {
2995 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2996};
2997
2998/* create mono mux for mono out on capable codecs */
2999static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3000{
3001 struct sigmatel_spec *spec = codec->spec;
3002 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3003 int i, num_cons;
3004 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3005
3006 num_cons = snd_hda_get_connections(codec,
3007 spec->mono_nid,
3008 con_lst,
3009 HDA_MAX_NUM_INPUTS);
3010 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3011 return -EINVAL;
3012
3013 for (i = 0; i < num_cons; i++) {
3014 mono_mux->items[mono_mux->num_items].label =
3015 stac92xx_mono_labels[i];
3016 mono_mux->items[mono_mux->num_items].index = i;
3017 mono_mux->num_items++;
3018 }
09a99959
MR		 3019
3020 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3021 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3022}
3023
89385035
MR		 3024/* labels for amp mux outputs */
3025static const char *stac92xx_amp_labels[3] = {
4b33c767 3026 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3027};
3028
3029/* create amp out controls mux on capable codecs */
3030static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3031{
3032 struct sigmatel_spec *spec = codec->spec;
3033 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3034 int i, err;
3035
2a9c7816 3036 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3037 amp_mux->items[amp_mux->num_items].label =
3038 stac92xx_amp_labels[i];
3039 amp_mux->items[amp_mux->num_items].index = i;
3040 amp_mux->num_items++;
3041 }
3042
2a9c7816
MR		 3043 if (spec->num_amps > 1) {
3044 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3045 "Amp Selector Capture Switch", 0);
3046 if (err < 0)
3047 return err;
3048 }
89385035
MR		 3049 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3050 "Amp Capture Volume",
3051 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3052}
3053
3054
1cd2224c
MR		 3055/* create PC beep volume controls */
3056static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3057 hda_nid_t nid)
3058{
3059 struct sigmatel_spec *spec = codec->spec;
3060 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3061 int err;
3062
3063 /* check for mute support for the the amp */
3064 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3065 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3066 "PC Beep Playback Switch",
3067 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3068 if (err < 0)
3069 return err;
3070 }
3071
3072 /* check to see if there is volume support for the amp */
3073 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3074 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3075 "PC Beep Playback Volume",
3076 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3077 if (err < 0)
3078 return err;
3079 }
3080 return 0;
3081}
3082
4d4e9bb3
TI		 3083#ifdef CONFIG_SND_HDA_INPUT_BEEP
3084#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3085
3086static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3087 struct snd_ctl_elem_value *ucontrol)
3088{
3089 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3090 ucontrol->value.integer.value[0] = codec->beep->enabled;
3091 return 0;
3092}
3093
3094static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3095 struct snd_ctl_elem_value *ucontrol)
3096{
3097 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3098 int enabled = !!ucontrol->value.integer.value[0];
3099 if (codec->beep->enabled != enabled) {
3100 codec->beep->enabled = enabled;
3101 return 1;
3102 }
3103 return 0;
3104}
3105
3106static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3107 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3108 .info = stac92xx_dig_beep_switch_info,
3109 .get = stac92xx_dig_beep_switch_get,
3110 .put = stac92xx_dig_beep_switch_put,
3111};
3112
3113static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3114{
3115 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3116 0, "PC Beep Playback Switch", 0);
3117}
3118#endif
3119
4682eee0
MR		 3120static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3121{
3122 struct sigmatel_spec *spec = codec->spec;
3123 int wcaps, nid, i, err = 0;
3124
3125 for (i = 0; i < spec->num_muxes; i++) {
3126 nid = spec->mux_nids[i];
3127 wcaps = get_wcaps(codec, nid);
3128
3129 if (wcaps & AC_WCAP_OUT_AMP) {
3130 err = stac92xx_add_control_idx(spec,
3131 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3132 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3133 if (err < 0)
3134 return err;
3135 }
3136 }
3137 return 0;
3138};
3139
d9737751 3140static const char *stac92xx_spdif_labels[3] = {
65973632 3141 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3142};
3143
3144static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3145{
3146 struct sigmatel_spec *spec = codec->spec;
3147 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3148 const char **labels = spec->spdif_labels;
d9737751 3149 int i, num_cons;
65973632 3150 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3151
3152 num_cons = snd_hda_get_connections(codec,
3153 spec->smux_nids[0],
3154 con_lst,
3155 HDA_MAX_NUM_INPUTS);
65973632 3156 if (!num_cons)
d9737751
MR		 3157 return -EINVAL;
3158
65973632
MR		 3159 if (!labels)
3160 labels = stac92xx_spdif_labels;
3161
d9737751 3162 for (i = 0; i < num_cons; i++) {
65973632 3163 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3164 spdif_mux->items[spdif_mux->num_items].index = i;
3165 spdif_mux->num_items++;
3166 }
3167
3168 return 0;
3169}
3170
8b65727b 3171/* labels for dmic mux inputs */
ddc2cec4 3172static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3173 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3174 "Digital Mic 3", "Digital Mic 4"
3175};
3176
3177/* create playback/capture controls for input pins on dmic capable codecs */
3178static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3179 const struct auto_pin_cfg *cfg)
3180{
3181 struct sigmatel_spec *spec = codec->spec;
3182 struct hda_input_mux *dimux = &spec->private_dimux;
3183 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3184 int err, i, j;
3185 char name[32];
8b65727b
MP		 3186
3187 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3188 dimux->items[dimux->num_items].index = 0;
3189 dimux->num_items++;
3190
3191 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3192 hda_nid_t nid;
8b65727b
MP		 3193 int index;
3194 int num_cons;
0678accd 3195 unsigned int wcaps;
8b65727b
MP		 3196 unsigned int def_conf;
3197
3198 def_conf = snd_hda_codec_read(codec,
3199 spec->dmic_nids[i],
3200 0,
3201 AC_VERB_GET_CONFIG_DEFAULT,
3202 0);
3203 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3204 continue;
3205
0678accd 3206 nid = spec->dmic_nids[i];
8b65727b 3207 num_cons = snd_hda_get_connections(codec,
e1f0d669 3208 spec->dmux_nids[0],
8b65727b
MP		 3209 con_lst,
3210 HDA_MAX_NUM_INPUTS);
3211 for (j = 0; j < num_cons; j++)
0678accd 3212 if (con_lst[j] == nid) {
8b65727b
MP		 3213 index = j;
3214 goto found;
3215 }
3216 continue;
3217found:
d0513fc6
MR		 3218 wcaps = get_wcaps(codec, nid) &
3219 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3220
d0513fc6 3221 if (wcaps) {
0678accd
MR		 3222 sprintf(name, "%s Capture Volume",
3223 stac92xx_dmic_labels[dimux->num_items]);
3224
3225 err = stac92xx_add_control(spec,
3226 STAC_CTL_WIDGET_VOL,
3227 name,
d0513fc6
MR		 3228 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3229 (wcaps & AC_WCAP_OUT_AMP) ?
3230 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3231 if (err < 0)
3232 return err;
3233 }
3234
8b65727b
MP		 3235 dimux->items[dimux->num_items].label =
3236 stac92xx_dmic_labels[dimux->num_items];
3237 dimux->items[dimux->num_items].index = index;
3238 dimux->num_items++;
3239 }
3240
3241 return 0;
3242}
3243
c7d4b2fa
M		 3244/* create playback/capture controls for input pins */
3245static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3246{
3247 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3248 struct hda_input_mux *imux = &spec->private_imux;
3249 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3250 int i, j, k;
3251
3252 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3253 int index;
3254
3255 if (!cfg->input_pins[i])
3256 continue;
3257 index = -1;
3258 for (j = 0; j < spec->num_muxes; j++) {
3259 int num_cons;
3260 num_cons = snd_hda_get_connections(codec,
3261 spec->mux_nids[j],
3262 con_lst,
3263 HDA_MAX_NUM_INPUTS);
3264 for (k = 0; k < num_cons; k++)
3265 if (con_lst[k] == cfg->input_pins[i]) {
3266 index = k;
3267 goto found;
3268 }
c7d4b2fa 3269 }
314634bc
TI		 3270 continue;
3271 found:
3272 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3273 imux->items[imux->num_items].index = index;
3274 imux->num_items++;
c7d4b2fa
M		 3275 }
3276
7b043899 3277 if (imux->num_items) {
62fe78e9
SR		 3278 /*
3279 * Set the current input for the muxes.
3280 * The STAC9221 has two input muxes with identical source
3281 * NID lists. Hopefully this won't get confused.
3282 */
3283 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3284 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3285 AC_VERB_SET_CONNECT_SEL,
3286 imux->items[0].index);
62fe78e9
SR		 3287 }
3288 }
3289
c7d4b2fa
M		 3290 return 0;
3291}
3292
c7d4b2fa
M		 3293static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3294{
3295 struct sigmatel_spec *spec = codec->spec;
3296 int i;
3297
3298 for (i = 0; i < spec->autocfg.line_outs; i++) {
3299 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3300 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3301 }
3302}
3303
3304static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3305{
3306 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3307 int i;
c7d4b2fa 3308
eb06ed8f
TI		 3309 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3310 hda_nid_t pin;
3311 pin = spec->autocfg.hp_pins[i];
3312 if (pin) /* connect to front */
3313 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3314 }
3315 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3316 hda_nid_t pin;
3317 pin = spec->autocfg.speaker_pins[i];
3318 if (pin) /* connect to front */
3319 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3320 }
c7d4b2fa
M		 3321}
3322
3cc08dc6 3323static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3324{
3325 struct sigmatel_spec *spec = codec->spec;
3326 int err;
bcecd9bd 3327 int hp_speaker_swap = 0;
c7d4b2fa 3328
8b65727b
MP		 3329 if ((err = snd_hda_parse_pin_def_config(codec,
3330 &spec->autocfg,
3331 spec->dmic_nids)) < 0)
c7d4b2fa 3332 return err;
82bc955f 3333 if (! spec->autocfg.line_outs)
869264c4 3334 return 0; /* can't find valid pin config */
19039bd0 3335
bcecd9bd
JZ		 3336 /* If we have no real line-out pin and multiple hp-outs, HPs should
3337 * be set up as multi-channel outputs.
3338 */
3339 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3340 spec->autocfg.hp_outs > 1) {
3341 /* Copy hp_outs to line_outs, backup line_outs in
3342 * speaker_outs so that the following routines can handle
3343 * HP pins as primary outputs.
3344 */
3345 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3346 sizeof(spec->autocfg.line_out_pins));
3347 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3348 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3349 sizeof(spec->autocfg.hp_pins));
3350 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3351 hp_speaker_swap = 1;
3352 }
09a99959 3353 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3354 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3355 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3356 u32 caps = query_amp_caps(codec,
3357 spec->autocfg.mono_out_pin, dir);
3358 hda_nid_t conn_list[1];
3359
3360 /* get the mixer node and then the mono mux if it exists */
3361 if (snd_hda_get_connections(codec,
3362 spec->autocfg.mono_out_pin, conn_list, 1) &&
3363 snd_hda_get_connections(codec, conn_list[0],
3364 conn_list, 1)) {
3365
3366 int wcaps = get_wcaps(codec, conn_list[0]);
3367 int wid_type = (wcaps & AC_WCAP_TYPE)
3368 >> AC_WCAP_TYPE_SHIFT;
3369 /* LR swap check, some stac925x have a mux that
3370 * changes the DACs output path instead of the
3371 * mono-mux path.
3372 */
3373 if (wid_type == AC_WID_AUD_SEL &&
3374 !(wcaps & AC_WCAP_LR_SWAP))
3375 spec->mono_nid = conn_list[0];
3376 }
d0513fc6
MR		 3377 if (dir) {
3378 hda_nid_t nid = spec->autocfg.mono_out_pin;
3379
3380 /* most mono outs have a least a mute/unmute switch */
3381 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3382 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3383 "Mono Playback Switch",
3384 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3385 if (err < 0)
3386 return err;
d0513fc6
MR		 3387 /* check for volume support for the amp */
3388 if ((caps & AC_AMPCAP_NUM_STEPS)
3389 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3390 err = stac92xx_add_control(spec,
3391 STAC_CTL_WIDGET_VOL,
3392 "Mono Playback Volume",
3393 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3394 if (err < 0)
3395 return err;
3396 }
09a99959
MR		 3397 }
3398
3399 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3400 AC_PINCTL_OUT_EN);
3401 }
bcecd9bd 3402
403d1944
MP		 3403 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3404 return err;
19039bd0
TI		 3405 if (spec->multiout.num_dacs == 0)
3406 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3407 return err;
c7d4b2fa 3408
0fb87bb4
ML		 3409 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3410
3411 if (err < 0)
3412 return err;
3413
1cd2224c
MR		 3414 /* setup analog beep controls */
3415 if (spec->anabeep_nid > 0) {
3416 err = stac92xx_auto_create_beep_ctls(codec,
3417 spec->anabeep_nid);
3418 if (err < 0)
3419 return err;
3420 }
3421
3422 /* setup digital beep controls and input device */
3423#ifdef CONFIG_SND_HDA_INPUT_BEEP
3424 if (spec->digbeep_nid > 0) {
3425 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3426 unsigned int caps;
1cd2224c
MR		 3427
3428 err = stac92xx_auto_create_beep_ctls(codec, nid);
3429 if (err < 0)
3430 return err;
3431 err = snd_hda_attach_beep_device(codec, nid);
3432 if (err < 0)
3433 return err;
4d4e9bb3
TI		 3434 /* if no beep switch is available, make its own one */
3435 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3436 if (codec->beep &&
3437 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3438 err = stac92xx_beep_switch_ctl(codec);
3439 if (err < 0)
3440 return err;
3441 }
1cd2224c
MR		 3442 }
3443#endif
3444
bcecd9bd
JZ		 3445 if (hp_speaker_swap == 1) {
3446 /* Restore the hp_outs and line_outs */
3447 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3448 sizeof(spec->autocfg.line_out_pins));
3449 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3450 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3451 sizeof(spec->autocfg.speaker_pins));
3452 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3453 memset(spec->autocfg.speaker_pins, 0,
3454 sizeof(spec->autocfg.speaker_pins));
3455 spec->autocfg.speaker_outs = 0;
3456 }
3457
0fb87bb4
ML		 3458 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3459
3460 if (err < 0)
3461 return err;
3462
3463 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3464
3465 if (err < 0)
c7d4b2fa
M		 3466 return err;
3467
b22b4821
MR		 3468 if (spec->mono_nid > 0) {
3469 err = stac92xx_auto_create_mono_output_ctls(codec);
3470 if (err < 0)
3471 return err;
3472 }
2a9c7816 3473 if (spec->num_amps > 0) {
89385035
MR		 3474 err = stac92xx_auto_create_amp_output_ctls(codec);
3475 if (err < 0)
3476 return err;
3477 }
2a9c7816 3478 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3479 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3480 &spec->autocfg)) < 0)
3481 return err;
4682eee0
MR		 3482 if (spec->num_muxes > 0) {
3483 err = stac92xx_auto_create_mux_input_ctls(codec);
3484 if (err < 0)
3485 return err;
3486 }
d9737751
MR		 3487 if (spec->num_smuxes > 0) {
3488 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3489 if (err < 0)
3490 return err;
3491 }
8b65727b 3492
c7d4b2fa 3493 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3494 if (spec->multiout.max_channels > 2)
c7d4b2fa 3495 spec->surr_switch = 1;
c7d4b2fa 3496
82bc955f 3497 if (spec->autocfg.dig_out_pin)
3cc08dc6 3498 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3499 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3500 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3501
3502 if (spec->kctl_alloc)
3503 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3504
3505 spec->input_mux = &spec->private_imux;
2a9c7816 3506 spec->dinput_mux = &spec->private_dimux;
d9737751 3507 spec->sinput_mux = &spec->private_smux;
b22b4821 3508 spec->mono_mux = &spec->private_mono_mux;
89385035 3509 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3510 return 1;
3511}
3512
82bc955f
TI		 3513/* add playback controls for HP output */
3514static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3515 struct auto_pin_cfg *cfg)
3516{
3517 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3518 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3519 unsigned int wid_caps;
3520
3521 if (! pin)
3522 return 0;
3523
3524 wid_caps = get_wcaps(codec, pin);
505cb341 3525 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3526 spec->hp_detect = 1;
82bc955f
TI		 3527
3528 return 0;
3529}
3530
160ea0dc
RF		 3531/* add playback controls for LFE output */
3532static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3533 struct auto_pin_cfg *cfg)
3534{
3535 struct sigmatel_spec *spec = codec->spec;
3536 int err;
3537 hda_nid_t lfe_pin = 0x0;
3538 int i;
3539
3540 /*
3541 * search speaker outs and line outs for a mono speaker pin
3542 * with an amp. If one is found, add LFE controls
3543 * for it.
3544 */
3545 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3546 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3547 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3548 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3549 if (wcaps == AC_WCAP_OUT_AMP)
3550 /* found a mono speaker with an amp, must be lfe */
3551 lfe_pin = pin;
3552 }
3553
3554 /* if speaker_outs is 0, then speakers may be in line_outs */
3555 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3556 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3557 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3558 unsigned int defcfg;
8b551785 3559 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3560 AC_VERB_GET_CONFIG_DEFAULT,
3561 0x00);
8b551785 3562 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3563 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3564 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3565 if (wcaps == AC_WCAP_OUT_AMP)
3566 /* found a mono speaker with an amp,
3567 must be lfe */
3568 lfe_pin = pin;
3569 }
3570 }
3571 }
3572
3573 if (lfe_pin) {
eb06ed8f 3574 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3575 if (err < 0)
3576 return err;
3577 }
3578
3579 return 0;
3580}
3581
c7d4b2fa
M		 3582static int stac9200_parse_auto_config(struct hda_codec *codec)
3583{
3584 struct sigmatel_spec *spec = codec->spec;
3585 int err;
3586
df694daa 3587 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3588 return err;
3589
3590 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3591 return err;
3592
82bc955f
TI		 3593 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3594 return err;
3595
160ea0dc
RF		 3596 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3597 return err;
3598
355a0ec4
TI		 3599 if (spec->num_muxes > 0) {
3600 err = stac92xx_auto_create_mux_input_ctls(codec);
3601 if (err < 0)
3602 return err;
3603 }
3604
82bc955f 3605 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3606 spec->multiout.dig_out_nid = 0x05;
82bc955f 3607 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3608 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3609
3610 if (spec->kctl_alloc)
3611 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3612
3613 spec->input_mux = &spec->private_imux;
8b65727b 3614 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3615
3616 return 1;
3617}
3618
62fe78e9
SR		 3619/*
3620 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3621 * funky external mute control using GPIO pins.
3622 */
3623
76e1ddfb 3624static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3625 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3626{
3627 unsigned int gpiostate, gpiomask, gpiodir;
3628
3629 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3630 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3631 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3632
3633 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3634 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3635 gpiomask |= mask;
62fe78e9
SR		 3636
3637 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3638 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3639 gpiodir |= dir_mask;
62fe78e9 3640
76e1ddfb 3641 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3642 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3643
3644 snd_hda_codec_write(codec, codec->afg, 0,
3645 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3646 snd_hda_codec_read(codec, codec->afg, 0,
3647 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3648
3649 msleep(1);
3650
76e1ddfb
TI		 3651 snd_hda_codec_read(codec, codec->afg, 0,
3652 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3653}
3654
314634bc
TI		 3655static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3656 unsigned int event)
3657{
3658 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3659 snd_hda_codec_write_cache(codec, nid, 0,
3660 AC_VERB_SET_UNSOLICITED_ENABLE,
3661 (AC_USRSP_EN | event));
314634bc
TI		 3662}
3663
a64135a2
MR		 3664static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3665{
3666 int i;
3667 for (i = 0; i < cfg->hp_outs; i++)
3668 if (cfg->hp_pins[i] == nid)
3669 return 1; /* nid is a HP-Out */
3670
3671 return 0; /* nid is not a HP-Out */
3672};
3673
b76c850f
MR		 3674static void stac92xx_power_down(struct hda_codec *codec)
3675{
3676 struct sigmatel_spec *spec = codec->spec;
3677
3678 /* power down inactive DACs */
3679 hda_nid_t *dac;
3680 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3681 if (!is_in_dac_nids(spec, *dac) &&
3682 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3683 snd_hda_codec_write_cache(codec, *dac, 0,
3684 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3685}
3686
c7d4b2fa
M		 3687static int stac92xx_init(struct hda_codec *codec)
3688{
3689 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3690 struct auto_pin_cfg *cfg = &spec->autocfg;
3691 int i;
c7d4b2fa 3692
c7d4b2fa
M		 3693 snd_hda_sequence_write(codec, spec->init);
3694
8daaaa97
MR		 3695 /* power down adcs initially */
3696 if (spec->powerdown_adcs)
3697 for (i = 0; i < spec->num_adcs; i++)
3698 snd_hda_codec_write_cache(codec,
3699 spec->adc_nids[i], 0,
3700 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3701 /* set up pins */
3702 if (spec->hp_detect) {
505cb341 3703 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3704 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3705 enable_pin_detect(codec, cfg->hp_pins[i],
3706 STAC_HP_EVENT);
0a07acaf
TI		 3707 /* force to enable the first line-out; the others are set up
3708 * in unsol_event
3709 */
3710 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3711 AC_PINCTL_OUT_EN);
eb995a8c 3712 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3713 /* fake event to set up pins */
3714 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3715 } else {
3716 stac92xx_auto_init_multi_out(codec);
3717 stac92xx_auto_init_hp_out(codec);
3718 }
3719 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3720 hda_nid_t nid = cfg->input_pins[i];
3721 if (nid) {
4f1e6bc3
TI		 3722 unsigned int pinctl;
3723 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3724 /* for mic pins, force to initialize */
3725 pinctl = stac92xx_get_vref(codec, nid);
3726 } else {
3727 pinctl = snd_hda_codec_read(codec, nid, 0,
3728 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3729 /* if PINCTL already set then skip */
3730 if (pinctl & AC_PINCTL_IN_EN)
3731 continue;
3732 }
3733 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3734 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3735 }
82bc955f 3736 }
a64135a2
MR		 3737 for (i = 0; i < spec->num_dmics; i++)
3738 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3739 AC_PINCTL_IN_EN);
3740 for (i = 0; i < spec->num_pwrs; i++) {
3741 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3742 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3743 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3744 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3745 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3746 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3747 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3748 /* outputs are only ports capable of power management
3749 * any attempts on powering down a input port cause the
3750 * referenced VREF to act quirky.
3751 */
3752 if (pinctl & AC_PINCTL_IN_EN)
3753 continue;
aafc4412
MR		 3754 /* skip any ports that don't have jacks since presence
3755 * detection is useless */
3756 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3757 continue;
a64135a2
MR		 3758 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3759 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3760 }
b76c850f
MR		 3761 if (spec->dac_list)
3762 stac92xx_power_down(codec);
82bc955f
TI		 3763 if (cfg->dig_out_pin)
3764 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3765 AC_PINCTL_OUT_EN);
3766 if (cfg->dig_in_pin)
3767 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3768 AC_PINCTL_IN_EN);
3769
4fe5195c
MR		 3770 stac_gpio_set(codec, spec->gpio_mask,
3771 spec->gpio_dir, spec->gpio_data);
62fe78e9 3772
c7d4b2fa
M		 3773 return 0;
3774}
3775
2f2f4251
M		 3776static void stac92xx_free(struct hda_codec *codec)
3777{
c7d4b2fa
M		 3778 struct sigmatel_spec *spec = codec->spec;
3779 int i;
3780
3781 if (! spec)
3782 return;
3783
3784 if (spec->kctl_alloc) {
3785 for (i = 0; i < spec->num_kctl_used; i++)
3786 kfree(spec->kctl_alloc[i].name);
3787 kfree(spec->kctl_alloc);
3788 }
3789
11b44bbd
RF		 3790 if (spec->bios_pin_configs)
3791 kfree(spec->bios_pin_configs);
3792
c7d4b2fa 3793 kfree(spec);
1cd2224c 3794 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3795}
3796
4e55096e
M		 3797static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3798 unsigned int flag)
3799{
3800 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3801 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3802
f9acba43
TI		 3803 if (pin_ctl & AC_PINCTL_IN_EN) {
3804 /*
3805 * we need to check the current set-up direction of
3806 * shared input pins since they can be switched via
3807 * "xxx as Output" mixer switch
3808 */
3809 struct sigmatel_spec *spec = codec->spec;
3810 struct auto_pin_cfg *cfg = &spec->autocfg;
3811 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3812 spec->line_switch) ||
3813 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3814 spec->mic_switch))
3815 return;
3816 }
3817
7b043899
SL		 3818 /* if setting pin direction bits, clear the current
3819 direction bits first */
3820 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3821 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3822
82beb8fd 3823 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3824 AC_VERB_SET_PIN_WIDGET_CONTROL,
3825 pin_ctl | flag);
3826}
3827
3828static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3829 unsigned int flag)
3830{
3831 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3832 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3833 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3834 AC_VERB_SET_PIN_WIDGET_CONTROL,
3835 pin_ctl & ~flag);
3836}
3837
40c1d308 3838static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3839{
3840 if (!nid)
3841 return 0;
3842 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3843 & (1 << 31)) {
3844 unsigned int pinctl;
3845 pinctl = snd_hda_codec_read(codec, nid, 0,
3846 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3847 if (pinctl & AC_PINCTL_IN_EN)
3848 return 0; /* mic- or line-input */
3849 else
3850 return 1; /* HP-output */
3851 }
314634bc
TI		 3852 return 0;
3853}
3854
d7a89436
TI		 3855/* return non-zero if the hp-pin of the given array index isn't
3856 * a jack-detection target
3857 */
3858static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3859{
3860 struct auto_pin_cfg *cfg = &spec->autocfg;
3861
3862 /* ignore sensing of shared line and mic jacks */
3863 if (spec->line_switch &&
3864 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3865 return 1;
3866 if (spec->mic_switch &&
3867 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3868 return 1;
3869 /* ignore if the pin is set as line-out */
3870 if (cfg->hp_pins[i] == spec->hp_switch)
3871 return 1;
3872 return 0;
3873}
3874
314634bc 3875static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3876{
3877 struct sigmatel_spec *spec = codec->spec;
3878 struct auto_pin_cfg *cfg = &spec->autocfg;
3879 int i, presence;
3880
eb06ed8f 3881 presence = 0;
4fe5195c
MR		 3882 if (spec->gpio_mute)
3883 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3884 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3885
eb06ed8f 3886 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3887 if (presence)
3888 break;
d7a89436
TI		 3889 if (no_hp_sensing(spec, i))
3890 continue;
4fe5195c 3891 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3892 }
4e55096e
M		 3893
3894 if (presence) {
d7a89436 3895 /* disable lineouts */
7c2ba97b 3896 if (spec->hp_switch)
d7a89436
TI		 3897 stac92xx_reset_pinctl(codec, spec->hp_switch,
3898 AC_PINCTL_OUT_EN);
4e55096e
M		 3899 for (i = 0; i < cfg->line_outs; i++)
3900 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3901 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3902 for (i = 0; i < cfg->speaker_outs; i++)
3903 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3904 AC_PINCTL_OUT_EN);
0253fdcd 3905 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3906 stac_gpio_set(codec, spec->gpio_mask,
3907 spec->gpio_dir, spec->gpio_data &
3908 ~spec->eapd_mask);
4e55096e 3909 } else {
d7a89436 3910 /* enable lineouts */
7c2ba97b 3911 if (spec->hp_switch)
d7a89436
TI		 3912 stac92xx_set_pinctl(codec, spec->hp_switch,
3913 AC_PINCTL_OUT_EN);
4e55096e
M		 3914 for (i = 0; i < cfg->line_outs; i++)
3915 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3916 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3917 for (i = 0; i < cfg->speaker_outs; i++)
3918 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3919 AC_PINCTL_OUT_EN);
0253fdcd 3920 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3921 stac_gpio_set(codec, spec->gpio_mask,
3922 spec->gpio_dir, spec->gpio_data |
3923 spec->eapd_mask);
4e55096e 3924 }
d7a89436
TI		 3925 /* toggle hp outs */
3926 for (i = 0; i < cfg->hp_outs; i++) {
3927 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3928 if (no_hp_sensing(spec, i))
3929 continue;
3930 if (presence)
3931 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3932 else
3933 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3934 }
4e55096e
M		 3935}
3936
a64135a2
MR		 3937static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3938{
3939 struct sigmatel_spec *spec = codec->spec;
3940 hda_nid_t nid = spec->pwr_nids[idx];
3941 int presence, val;
3942 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3943 & 0x000000ff;
3944 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3945
3946 /* several codecs have two power down bits */
3947 if (spec->pwr_mapping)
3948 idx = spec->pwr_mapping[idx];
3949 else
3950 idx = 1 << idx;
a64135a2
MR		 3951
3952 if (presence)
3953 val &= ~idx;
3954 else
3955 val |= idx;
3956
3957 /* power down unused output ports */
3958 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3959};
3960
314634bc
TI		 3961static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3962{
a64135a2
MR		 3963 struct sigmatel_spec *spec = codec->spec;
3964 int idx = res >> 26 & 0x0f;
3965
72474be6 3966 switch ((res >> 26) & 0x70) {
314634bc
TI		 3967 case STAC_HP_EVENT:
3968 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3969 /* fallthru */
3970 case STAC_PWR_EVENT:
3971 if (spec->num_pwrs > 0)
3972 stac92xx_pin_sense(codec, idx);
72474be6
MR		 3973 break;
3974 case STAC_VREF_EVENT: {
3975 int data = snd_hda_codec_read(codec, codec->afg, 0,
3976 AC_VERB_GET_GPIO_DATA, 0);
3977 /* toggle VREF state based on GPIOx status */
3978 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3979 !!(data & (1 << idx)));
3980 break;
3981 }
314634bc
TI		 3982 }
3983}
3984
cb53c626 3985#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3986static int stac92xx_resume(struct hda_codec *codec)
3987{
dc81bed1
TI		 3988 struct sigmatel_spec *spec = codec->spec;
3989
11b44bbd 3990 stac92xx_set_config_regs(codec);
dc81bed1 3991 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3992 stac_gpio_set(codec, spec->gpio_mask,
3993 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3994 snd_hda_codec_resume_amp(codec);
3995 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3996 /* power down inactive DACs */
3997 if (spec->dac_list)
3998 stac92xx_power_down(codec);
dc81bed1
TI		 3999 /* invoke unsolicited event to reset the HP state */
4000 if (spec->hp_detect)
4001 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 4002 return 0;
4003}
4004#endif
4005
2f2f4251
M		 4006static struct hda_codec_ops stac92xx_patch_ops = {
4007 .build_controls = stac92xx_build_controls,
4008 .build_pcms = stac92xx_build_pcms,
4009 .init = stac92xx_init,
4010 .free = stac92xx_free,
4e55096e 4011 .unsol_event = stac92xx_unsol_event,
cb53c626 4012#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4013 .resume = stac92xx_resume,
4014#endif
2f2f4251
M		 4015};
4016
4017static int patch_stac9200(struct hda_codec *codec)
4018{
4019 struct sigmatel_spec *spec;
c7d4b2fa 4020 int err;
2f2f4251 4021
e560d8d8 4022 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4023 if (spec == NULL)
4024 return -ENOMEM;
4025
4026 codec->spec = spec;
a4eed138 4027 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4028 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4029 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4030 stac9200_models,
4031 stac9200_cfg_tbl);
11b44bbd
RF		 4032 if (spec->board_config < 0) {
4033 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4034 err = stac92xx_save_bios_config_regs(codec);
4035 if (err < 0) {
4036 stac92xx_free(codec);
4037 return err;
4038 }
4039 spec->pin_configs = spec->bios_pin_configs;
4040 } else {
403d1944
MP		 4041 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4042 stac92xx_set_config_regs(codec);
4043 }
2f2f4251
M		 4044
4045 spec->multiout.max_channels = 2;
4046 spec->multiout.num_dacs = 1;
4047 spec->multiout.dac_nids = stac9200_dac_nids;
4048 spec->adc_nids = stac9200_adc_nids;
4049 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4050 spec->num_muxes = 1;
8b65727b 4051 spec->num_dmics = 0;
9e05b7a3 4052 spec->num_adcs = 1;
a64135a2 4053 spec->num_pwrs = 0;
c7d4b2fa 4054
bf277785
TD		 4055 if (spec->board_config == STAC_9200_GATEWAY ||
4056 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4057 spec->init = stac9200_eapd_init;
4058 else
4059 spec->init = stac9200_core_init;
2f2f4251 4060 spec->mixer = stac9200_mixer;
c7d4b2fa 4061
117f257d
TI		 4062 if (spec->board_config == STAC_9200_PANASONIC) {
4063 spec->gpio_mask = spec->gpio_dir = 0x09;
4064 spec->gpio_data = 0x00;
4065 }
4066
c7d4b2fa
M		 4067 err = stac9200_parse_auto_config(codec);
4068 if (err < 0) {
4069 stac92xx_free(codec);
4070 return err;
4071 }
2f2f4251
M		 4072
4073 codec->patch_ops = stac92xx_patch_ops;
4074
4075 return 0;
4076}
4077
8e21c34c
TD		 4078static int patch_stac925x(struct hda_codec *codec)
4079{
4080 struct sigmatel_spec *spec;
4081 int err;
4082
4083 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4084 if (spec == NULL)
4085 return -ENOMEM;
4086
4087 codec->spec = spec;
a4eed138 4088 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4089 spec->pin_nids = stac925x_pin_nids;
4090 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4091 stac925x_models,
4092 stac925x_cfg_tbl);
9e507abd 4093 again:
8e21c34c 4094 if (spec->board_config < 0) {
2c11f955
TD		 4095 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4096 "using BIOS defaults\n");
8e21c34c
TD		 4097 err = stac92xx_save_bios_config_regs(codec);
4098 if (err < 0) {
4099 stac92xx_free(codec);
4100 return err;
4101 }
4102 spec->pin_configs = spec->bios_pin_configs;
4103 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4104 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4105 stac92xx_set_config_regs(codec);
4106 }
4107
4108 spec->multiout.max_channels = 2;
4109 spec->multiout.num_dacs = 1;
4110 spec->multiout.dac_nids = stac925x_dac_nids;
4111 spec->adc_nids = stac925x_adc_nids;
4112 spec->mux_nids = stac925x_mux_nids;
4113 spec->num_muxes = 1;
9e05b7a3 4114 spec->num_adcs = 1;
a64135a2 4115 spec->num_pwrs = 0;
2c11f955
TD		 4116 switch (codec->vendor_id) {
4117 case 0x83847632: /* STAC9202 */
4118 case 0x83847633: /* STAC9202D */
4119 case 0x83847636: /* STAC9251 */
4120 case 0x83847637: /* STAC9251D */
f6e9852a 4121 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4122 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4123 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4124 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4125 break;
4126 default:
4127 spec->num_dmics = 0;
4128 break;
4129 }
8e21c34c
TD		 4130
4131 spec->init = stac925x_core_init;
4132 spec->mixer = stac925x_mixer;
4133
4134 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4135 if (!err) {
4136 if (spec->board_config < 0) {
4137 printk(KERN_WARNING "hda_codec: No auto-config is "
4138 "available, default to model=ref\n");
4139 spec->board_config = STAC_925x_REF;
4140 goto again;
4141 }
4142 err = -EINVAL;
4143 }
8e21c34c
TD		 4144 if (err < 0) {
4145 stac92xx_free(codec);
4146 return err;
4147 }
4148
4149 codec->patch_ops = stac92xx_patch_ops;
4150
4151 return 0;
4152}
4153
e1f0d669
MR		 4154static struct hda_input_mux stac92hd73xx_dmux = {
4155 .num_items = 4,
4156 .items = {
4157 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4158 { "Digital Mic 1", 0x09 },
4159 { "Digital Mic 2", 0x0a },
2a9c7816 4160 { "CD", 0x08 },
e1f0d669
MR		 4161 }
4162};
4163
4164static int patch_stac92hd73xx(struct hda_codec *codec)
4165{
4166 struct sigmatel_spec *spec;
4167 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4168 int err = 0;
4169
4170 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4171 if (spec == NULL)
4172 return -ENOMEM;
4173
4174 codec->spec = spec;
e99d32b3 4175 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4176 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4177 spec->pin_nids = stac92hd73xx_pin_nids;
4178 spec->board_config = snd_hda_check_board_config(codec,
4179 STAC_92HD73XX_MODELS,
4180 stac92hd73xx_models,
4181 stac92hd73xx_cfg_tbl);
4182again:
4183 if (spec->board_config < 0) {
4184 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4185 " STAC92HD73XX, using BIOS defaults\n");
4186 err = stac92xx_save_bios_config_regs(codec);
4187 if (err < 0) {
4188 stac92xx_free(codec);
4189 return err;
4190 }
4191 spec->pin_configs = spec->bios_pin_configs;
4192 } else {
4193 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4194 stac92xx_set_config_regs(codec);
4195 }
4196
4197 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4198 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4199
4200 if (spec->multiout.num_dacs < 0) {
4201 printk(KERN_WARNING "hda_codec: Could not determine "
4202 "number of channels defaulting to DAC count\n");
4203 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4204 }
4205
4206 switch (spec->multiout.num_dacs) {
4207 case 0x3: /* 6 Channel */
4208 spec->mixer = stac92hd73xx_6ch_mixer;
4209 spec->init = stac92hd73xx_6ch_core_init;
4210 break;
4211 case 0x4: /* 8 Channel */
e1f0d669
MR		 4212 spec->mixer = stac92hd73xx_8ch_mixer;
4213 spec->init = stac92hd73xx_8ch_core_init;
4214 break;
4215 case 0x5: /* 10 Channel */
e1f0d669
MR		 4216 spec->mixer = stac92hd73xx_10ch_mixer;
4217 spec->init = stac92hd73xx_10ch_core_init;
4218 };
4219
4220 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4221 spec->aloopback_mask = 0x01;
4222 spec->aloopback_shift = 8;
4223
1cd2224c 4224 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4225 spec->mux_nids = stac92hd73xx_mux_nids;
4226 spec->adc_nids = stac92hd73xx_adc_nids;
4227 spec->dmic_nids = stac92hd73xx_dmic_nids;
4228 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4229 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4230 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4231 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4232
4233 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4234 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4235 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4236 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4237 sizeof(stac92hd73xx_dmux));
4238
a7662640 4239 switch (spec->board_config) {
6b3ab21e 4240 case STAC_DELL_EQ:
d654a660 4241 spec->init = dell_eq_core_init;
6b3ab21e
MR		 4242 /* fallthru */
4243 case STAC_DELL_M6:
2a9c7816 4244 spec->num_smuxes = 0;
2a9c7816
MR		 4245 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4246 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
0253fdcd 4247 spec->eapd_switch = 0;
2a9c7816 4248 spec->num_amps = 1;
6b3ab21e
MR		 4249
4250 if (!spec->init)
4251 spec->init = dell_m6_core_init;
a7662640
MR		 4252 switch (codec->subsystem_id) {
4253 case 0x1028025e: /* Analog Mics */
4254 case 0x1028025f:
4255 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4256 spec->num_dmics = 0;
2a9c7816 4257 spec->private_dimux.num_items = 1;
a7662640 4258 break;
d654a660 4259 case 0x10280271: /* Digital Mics */
a7662640 4260 case 0x10280272:
d654a660
MR		 4261 case 0x10280254:
4262 case 0x10280255:
a7662640
MR		 4263 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4264 spec->num_dmics = 1;
2a9c7816 4265 spec->private_dimux.num_items = 2;
a7662640
MR		 4266 break;
4267 case 0x10280256: /* Both */
4268 case 0x10280057:
4269 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4270 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4271 spec->num_dmics = 1;
2a9c7816 4272 spec->private_dimux.num_items = 2;
a7662640
MR		 4273 break;
4274 }
4275 break;
4276 default:
4277 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4278 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
0253fdcd 4279 spec->eapd_switch = 1;
a7662640 4280 }
b2c4f4d7
MR		 4281 if (spec->board_config > STAC_92HD73XX_REF) {
4282 /* GPIO0 High = Enable EAPD */
4283 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4284 spec->gpio_data = 0x01;
4285 }
2a9c7816 4286 spec->dinput_mux = &spec->private_dimux;
a7662640 4287
a64135a2
MR		 4288 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4289 spec->pwr_nids = stac92hd73xx_pwr_nids;
4290
d9737751 4291 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4292
4293 if (!err) {
4294 if (spec->board_config < 0) {
4295 printk(KERN_WARNING "hda_codec: No auto-config is "
4296 "available, default to model=ref\n");
4297 spec->board_config = STAC_92HD73XX_REF;
4298 goto again;
4299 }
4300 err = -EINVAL;
4301 }
4302
4303 if (err < 0) {
4304 stac92xx_free(codec);
4305 return err;
4306 }
4307
4308 codec->patch_ops = stac92xx_patch_ops;
4309
4310 return 0;
4311}
4312
d0513fc6
MR		 4313static struct hda_input_mux stac92hd83xxx_dmux = {
4314 .num_items = 3,
4315 .items = {
4316 { "Analog Inputs", 0x03 },
4317 { "Digital Mic 1", 0x04 },
4318 { "Digital Mic 2", 0x05 },
4319 }
4320};
4321
4322static int patch_stac92hd83xxx(struct hda_codec *codec)
4323{
4324 struct sigmatel_spec *spec;
4325 int err;
4326
4327 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4328 if (spec == NULL)
4329 return -ENOMEM;
4330
4331 codec->spec = spec;
0ffa9807 4332 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4333 spec->mono_nid = 0x19;
4334 spec->digbeep_nid = 0x21;
4335 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4336 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4337 spec->adc_nids = stac92hd83xxx_adc_nids;
4338 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4339 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4340 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4341 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4342
4343 spec->init = stac92hd83xxx_core_init;
4344 switch (codec->vendor_id) {
4345 case 0x111d7605:
4346 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4347 break;
4348 default:
4349 spec->num_pwrs--;
4350 spec->init++; /* switch to config #2 */
4351 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4352 }
4353
4354 spec->mixer = stac92hd83xxx_mixer;
4355 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4356 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4357 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4358 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4359 spec->dinput_mux = &stac92hd83xxx_dmux;
4360 spec->pin_nids = stac92hd83xxx_pin_nids;
4361 spec->board_config = snd_hda_check_board_config(codec,
4362 STAC_92HD83XXX_MODELS,
4363 stac92hd83xxx_models,
4364 stac92hd83xxx_cfg_tbl);
4365again:
4366 if (spec->board_config < 0) {
4367 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4368 " STAC92HD83XXX, using BIOS defaults\n");
4369 err = stac92xx_save_bios_config_regs(codec);
4370 if (err < 0) {
4371 stac92xx_free(codec);
4372 return err;
4373 }
4374 spec->pin_configs = spec->bios_pin_configs;
4375 } else {
4376 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4377 stac92xx_set_config_regs(codec);
4378 }
4379
4380 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4381 if (!err) {
4382 if (spec->board_config < 0) {
4383 printk(KERN_WARNING "hda_codec: No auto-config is "
4384 "available, default to model=ref\n");
4385 spec->board_config = STAC_92HD83XXX_REF;
4386 goto again;
4387 }
4388 err = -EINVAL;
4389 }
4390
4391 if (err < 0) {
4392 stac92xx_free(codec);
4393 return err;
4394 }
4395
4396 codec->patch_ops = stac92xx_patch_ops;
4397
4398 return 0;
4399}
4400
8daaaa97
MR		 4401#ifdef SND_HDA_NEEDS_RESUME
4402static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4403{
4404 struct sigmatel_spec *spec = codec->spec;
4405 int i;
4406 snd_hda_codec_write_cache(codec, codec->afg, 0,
4407 AC_VERB_SET_POWER_STATE, pwr);
4408
4409 msleep(1);
4410 for (i = 0; i < spec->num_adcs; i++) {
4411 snd_hda_codec_write_cache(codec,
4412 spec->adc_nids[i], 0,
4413 AC_VERB_SET_POWER_STATE, pwr);
4414 }
4415};
4416
4417static int stac92hd71xx_resume(struct hda_codec *codec)
4418{
4419 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4420 return stac92xx_resume(codec);
4421}
4422
4423static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4424{
0253fdcd
MR		 4425 struct sigmatel_spec *spec = codec->spec;
4426
8daaaa97 4427 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
0253fdcd
MR		 4428 if (spec->eapd_mask)
4429 stac_gpio_set(codec, spec->gpio_mask,
4430 spec->gpio_dir, spec->gpio_data &
4431 ~spec->eapd_mask);
8daaaa97
MR		 4432 return 0;
4433};
4434
4435#endif
4436
4437static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4438 .build_controls = stac92xx_build_controls,
4439 .build_pcms = stac92xx_build_pcms,
4440 .init = stac92xx_init,
4441 .free = stac92xx_free,
4442 .unsol_event = stac92xx_unsol_event,
4443#ifdef SND_HDA_NEEDS_RESUME
4444 .resume = stac92hd71xx_resume,
4445 .suspend = stac92hd71xx_suspend,
4446#endif
4447};
d0513fc6 4448
4b33c767
MR		 4449static struct hda_input_mux stac92hd71bxx_dmux = {
4450 .num_items = 4,
4451 .items = {
4452 { "Analog Inputs", 0x00 },
4453 { "Mixer", 0x01 },
4454 { "Digital Mic 1", 0x02 },
4455 { "Digital Mic 2", 0x03 },
4456 }
4457};
4458
e035b841
MR		 4459static int patch_stac92hd71bxx(struct hda_codec *codec)
4460{
4461 struct sigmatel_spec *spec;
4462 int err = 0;
4463
4464 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4465 if (spec == NULL)
4466 return -ENOMEM;
4467
4468 codec->spec = spec;
8daaaa97 4469 codec->patch_ops = stac92xx_patch_ops;
e035b841 4470 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4471 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4472 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4473 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4474 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4475 spec->board_config = snd_hda_check_board_config(codec,
4476 STAC_92HD71BXX_MODELS,
4477 stac92hd71bxx_models,
4478 stac92hd71bxx_cfg_tbl);
4479again:
4480 if (spec->board_config < 0) {
4481 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4482 " STAC92HD71BXX, using BIOS defaults\n");
4483 err = stac92xx_save_bios_config_regs(codec);
4484 if (err < 0) {
4485 stac92xx_free(codec);
4486 return err;
4487 }
4488 spec->pin_configs = spec->bios_pin_configs;
4489 } else {
4490 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4491 stac92xx_set_config_regs(codec);
4492 }
4493
41c3b648
TI		 4494 if (spec->board_config > STAC_92HD71BXX_REF) {
4495 /* GPIO0 = EAPD */
4496 spec->gpio_mask = 0x01;
4497 spec->gpio_dir = 0x01;
4498 spec->gpio_data = 0x01;
4499 }
4500
541eee87
MR		 4501 switch (codec->vendor_id) {
4502 case 0x111d76b6: /* 4 Port without Analog Mixer */
4503 case 0x111d76b7:
4504 case 0x111d76b4: /* 6 Port without Analog Mixer */
4505 case 0x111d76b5:
4506 spec->mixer = stac92hd71bxx_mixer;
4507 spec->init = stac92hd71bxx_core_init;
0ffa9807 4508 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4509 break;
aafc4412 4510 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4511 switch (spec->board_config) {
4512 case STAC_HP_M4:
72474be6 4513 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4514 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4515 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4516 snd_hda_codec_write_cache(codec, codec->afg, 0,
4517 AC_VERB_SET_UNSOLICITED_ENABLE,
4518 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4519 spec->gpio_mask |= 0x02;
4520 break;
4521 }
8daaaa97
MR		 4522 if ((codec->revision_id & 0xf) == 0 ||
4523 (codec->revision_id & 0xf) == 1) {
4524#ifdef SND_HDA_NEEDS_RESUME
4525 codec->patch_ops = stac92hd71bxx_patch_ops;
4526#endif
4527 spec->stream_delay = 40; /* 40 milliseconds */
4528 }
4529
aafc4412
MR		 4530 /* no output amps */
4531 spec->num_pwrs = 0;
4532 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4533 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4534
4535 /* disable VSW */
4536 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4537 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4538 break;
4539 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4540 if ((codec->revision_id & 0xf) == 1) {
4541#ifdef SND_HDA_NEEDS_RESUME
4542 codec->patch_ops = stac92hd71bxx_patch_ops;
4543#endif
4544 spec->stream_delay = 40; /* 40 milliseconds */
4545 }
4546
aafc4412
MR		 4547 /* no output amps */
4548 spec->num_pwrs = 0;
4549 /* fallthru */
541eee87 4550 default:
4b33c767 4551 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4552 spec->mixer = stac92hd71bxx_analog_mixer;
4553 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4554 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4555 }
4556
4b33c767 4557 spec->aloopback_mask = 0x50;
541eee87
MR		 4558 spec->aloopback_shift = 0;
4559
8daaaa97 4560 spec->powerdown_adcs = 1;
1cd2224c 4561 spec->digbeep_nid = 0x26;
e035b841
MR		 4562 spec->mux_nids = stac92hd71bxx_mux_nids;
4563 spec->adc_nids = stac92hd71bxx_adc_nids;
4564 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4565 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4566 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4567 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4568
4569 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4570 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4571
6a14f585
MR		 4572 switch (spec->board_config) {
4573 case STAC_HP_M4:
4574 spec->num_dmics = 0;
b9aea715 4575 spec->num_smuxes = 0;
6a14f585
MR		 4576 spec->num_dmuxes = 0;
4577
4578 /* enable internal microphone */
b9aea715
MR		 4579 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4580 stac92xx_auto_set_pinctl(codec, 0x0e,
4581 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
6a14f585
MR		 4582 break;
4583 default:
4584 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4585 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4586 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4587 };
4588
aea7bb0a 4589 spec->multiout.num_dacs = 1;
e035b841
MR		 4590 spec->multiout.hp_nid = 0x11;
4591 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4592 if (spec->dinput_mux)
4593 spec->private_dimux.num_items +=
4594 spec->num_dmics -
4595 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4596
4597 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4598 if (!err) {
4599 if (spec->board_config < 0) {
4600 printk(KERN_WARNING "hda_codec: No auto-config is "
4601 "available, default to model=ref\n");
4602 spec->board_config = STAC_92HD71BXX_REF;
4603 goto again;
4604 }
4605 err = -EINVAL;
4606 }
4607
4608 if (err < 0) {
4609 stac92xx_free(codec);
4610 return err;
4611 }
4612
e035b841
MR		 4613 return 0;
4614};
4615
2f2f4251
M		 4616static int patch_stac922x(struct hda_codec *codec)
4617{
4618 struct sigmatel_spec *spec;
c7d4b2fa 4619 int err;
2f2f4251 4620
e560d8d8 4621 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4622 if (spec == NULL)
4623 return -ENOMEM;
4624
4625 codec->spec = spec;
a4eed138 4626 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4627 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4628 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4629 stac922x_models,
4630 stac922x_cfg_tbl);
536319af 4631 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4632 spec->gpio_mask = spec->gpio_dir = 0x03;
4633 spec->gpio_data = 0x03;
3fc24d85
TI		 4634 /* Intel Macs have all same PCI SSID, so we need to check
4635 * codec SSID to distinguish the exact models
4636 */
6f0778d8 4637 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4638 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4639
4640 case 0x106b0800:
4641 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4642 break;
5d5d3bc3
IZ		 4643 case 0x106b0600:
4644 case 0x106b0700:
4645 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4646 break;
5d5d3bc3
IZ		 4647 case 0x106b0e00:
4648 case 0x106b0f00:
4649 case 0x106b1600:
4650 case 0x106b1700:
4651 case 0x106b0200:
4652 case 0x106b1e00:
4653 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4654 break;
5d5d3bc3
IZ		 4655 case 0x106b1a00:
4656 case 0x00000100:
4657 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4658 break;
5d5d3bc3
IZ		 4659 case 0x106b0a00:
4660 case 0x106b2200:
4661 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4662 break;
536319af
NB		 4663 default:
4664 spec->board_config = STAC_INTEL_MAC_V3;
4665 break;
3fc24d85
TI		 4666 }
4667 }
4668
9e507abd 4669 again:
11b44bbd
RF		 4670 if (spec->board_config < 0) {
4671 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4672 "using BIOS defaults\n");
4673 err = stac92xx_save_bios_config_regs(codec);
4674 if (err < 0) {
4675 stac92xx_free(codec);
4676 return err;
4677 }
4678 spec->pin_configs = spec->bios_pin_configs;
4679 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4680 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4681 stac92xx_set_config_regs(codec);
4682 }
2f2f4251 4683
c7d4b2fa
M		 4684 spec->adc_nids = stac922x_adc_nids;
4685 spec->mux_nids = stac922x_mux_nids;
2549413e 4686 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4687 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4688 spec->num_dmics = 0;
a64135a2 4689 spec->num_pwrs = 0;
c7d4b2fa
M		 4690
4691 spec->init = stac922x_core_init;
2f2f4251 4692 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4693
4694 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4695
3cc08dc6 4696 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4697 if (!err) {
4698 if (spec->board_config < 0) {
4699 printk(KERN_WARNING "hda_codec: No auto-config is "
4700 "available, default to model=ref\n");
4701 spec->board_config = STAC_D945_REF;
4702 goto again;
4703 }
4704 err = -EINVAL;
4705 }
3cc08dc6
MP		 4706 if (err < 0) {
4707 stac92xx_free(codec);
4708 return err;
4709 }
4710
4711 codec->patch_ops = stac92xx_patch_ops;
4712
807a4636
TI		 4713 /* Fix Mux capture level; max to 2 */
4714 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4715 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4716 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4717 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4718 (0 << AC_AMPCAP_MUTE_SHIFT));
4719
3cc08dc6
MP		 4720 return 0;
4721}
4722
4723static int patch_stac927x(struct hda_codec *codec)
4724{
4725 struct sigmatel_spec *spec;
4726 int err;
4727
4728 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4729 if (spec == NULL)
4730 return -ENOMEM;
4731
4732 codec->spec = spec;
a4eed138 4733 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4734 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4735 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4736 stac927x_models,
4737 stac927x_cfg_tbl);
9e507abd 4738 again:
8e9068b1
MR		 4739 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4740 if (spec->board_config < 0)
4741 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4742 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4743 err = stac92xx_save_bios_config_regs(codec);
4744 if (err < 0) {
4745 stac92xx_free(codec);
4746 return err;
4747 }
4748 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4749 } else {
3cc08dc6
MP		 4750 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4751 stac92xx_set_config_regs(codec);
4752 }
4753
1cd2224c 4754 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4755 spec->adc_nids = stac927x_adc_nids;
4756 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4757 spec->mux_nids = stac927x_mux_nids;
4758 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4759 spec->smux_nids = stac927x_smux_nids;
4760 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4761 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4762 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4763 spec->multiout.dac_nids = spec->dac_nids;
4764
81d3dbde 4765 switch (spec->board_config) {
93ed1503 4766 case STAC_D965_3ST:
93ed1503 4767 case STAC_D965_5ST:
8e9068b1 4768 /* GPIO0 High = Enable EAPD */
0fc9dec4 4769 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4770 spec->gpio_data = 0x01;
8e9068b1
MR		 4771 spec->num_dmics = 0;
4772
93ed1503 4773 spec->init = d965_core_init;
9e05b7a3 4774 spec->mixer = stac927x_mixer;
81d3dbde 4775 break;
8e9068b1 4776 case STAC_DELL_BIOS:
780c8be4
MR		 4777 switch (codec->subsystem_id) {
4778 case 0x10280209:
4779 case 0x1028022e:
4780 /* correct the device field to SPDIF out */
4781 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4782 break;
4783 };
03d7ca17
MR		 4784 /* configure the analog microphone on some laptops */
4785 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4786 /* correct the front output jack as a hp out */
7989fba9 4787 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4788 /* correct the front input jack as a mic */
4789 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4790 /* fallthru */
8e9068b1
MR		 4791 case STAC_DELL_3ST:
4792 /* GPIO2 High = Enable EAPD */
0fc9dec4 4793 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4794 spec->gpio_data = 0x04;
7f16859a
MR		 4795 spec->dmic_nids = stac927x_dmic_nids;
4796 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4797
8e9068b1
MR		 4798 spec->init = d965_core_init;
4799 spec->mixer = stac927x_mixer;
4800 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4801 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4802 break;
4803 default:
b2c4f4d7
MR		 4804 if (spec->board_config > STAC_D965_REF) {
4805 /* GPIO0 High = Enable EAPD */
4806 spec->eapd_mask = spec->gpio_mask = 0x01;
4807 spec->gpio_dir = spec->gpio_data = 0x01;
4808 }
8e9068b1
MR		 4809 spec->num_dmics = 0;
4810
4811 spec->init = stac927x_core_init;
4812 spec->mixer = stac927x_mixer;
7f16859a
MR		 4813 }
4814
a64135a2 4815 spec->num_pwrs = 0;
e1f0d669
MR		 4816 spec->aloopback_mask = 0x40;
4817 spec->aloopback_shift = 0;
0253fdcd 4818 spec->eapd_switch = 1;
8e9068b1 4819
3cc08dc6 4820 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4821 if (!err) {
4822 if (spec->board_config < 0) {
4823 printk(KERN_WARNING "hda_codec: No auto-config is "
4824 "available, default to model=ref\n");
4825 spec->board_config = STAC_D965_REF;
4826 goto again;
4827 }
4828 err = -EINVAL;
4829 }
c7d4b2fa
M		 4830 if (err < 0) {
4831 stac92xx_free(codec);
4832 return err;
4833 }
2f2f4251
M		 4834
4835 codec->patch_ops = stac92xx_patch_ops;
4836
52987656
TI		 4837 /*
4838 * !!FIXME!!
4839 * The STAC927x seem to require fairly long delays for certain
4840 * command sequences. With too short delays (even if the answer
4841 * is set to RIRB properly), it results in the silence output
4842 * on some hardwares like Dell.
4843 *
4844 * The below flag enables the longer delay (see get_response
4845 * in hda_intel.c).
4846 */
4847 codec->bus->needs_damn_long_delay = 1;
4848
2f2f4251
M		 4849 return 0;
4850}
4851
f3302a59
MP		 4852static int patch_stac9205(struct hda_codec *codec)
4853{
4854 struct sigmatel_spec *spec;
8259980e 4855 int err;
f3302a59
MP		 4856
4857 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4858 if (spec == NULL)
4859 return -ENOMEM;
4860
4861 codec->spec = spec;
a4eed138 4862 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4863 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4864 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4865 stac9205_models,
4866 stac9205_cfg_tbl);
9e507abd 4867 again:
11b44bbd
RF		 4868 if (spec->board_config < 0) {
4869 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4870 err = stac92xx_save_bios_config_regs(codec);
4871 if (err < 0) {
4872 stac92xx_free(codec);
4873 return err;
4874 }
4875 spec->pin_configs = spec->bios_pin_configs;
4876 } else {
f3302a59
MP		 4877 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4878 stac92xx_set_config_regs(codec);
4879 }
4880
1cd2224c 4881 spec->digbeep_nid = 0x23;
f3302a59 4882 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4883 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4884 spec->mux_nids = stac9205_mux_nids;
2549413e 4885 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4886 spec->smux_nids = stac9205_smux_nids;
4887 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4888 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4889 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4890 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4891 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4892 spec->num_pwrs = 0;
f3302a59
MP		 4893
4894 spec->init = stac9205_core_init;
4895 spec->mixer = stac9205_mixer;
4896
e1f0d669
MR		 4897 spec->aloopback_mask = 0x40;
4898 spec->aloopback_shift = 0;
0253fdcd 4899 spec->eapd_switch = 1;
f3302a59 4900 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4901
ae0a8ed8 4902 switch (spec->board_config){
ae0a8ed8 4903 case STAC_9205_DELL_M43:
87d48363
MR		 4904 /* Enable SPDIF in/out */
4905 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4906 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4907
4fe5195c 4908 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 4909 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 4910 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4911 snd_hda_codec_write_cache(codec, codec->afg, 0,
4912 AC_VERB_SET_UNSOLICITED_ENABLE,
4913 (AC_USRSP_EN | STAC_HP_EVENT));
4914
4915 spec->gpio_dir = 0x0b;
0fc9dec4 4916 spec->eapd_mask = 0x01;
4fe5195c
MR		 4917 spec->gpio_mask = 0x1b;
4918 spec->gpio_mute = 0x10;
e2e7d624 4919 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4920 * GPIO3 Low = DRM
87d48363 4921 */
4fe5195c 4922 spec->gpio_data = 0x01;
ae0a8ed8 4923 break;
b2c4f4d7
MR		 4924 case STAC_9205_REF:
4925 /* SPDIF-In enabled */
4926 break;
ae0a8ed8
TD		 4927 default:
4928 /* GPIO0 High = EAPD */
0fc9dec4 4929 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4930 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4931 break;
4932 }
33382403 4933
f3302a59 4934 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4935 if (!err) {
4936 if (spec->board_config < 0) {
4937 printk(KERN_WARNING "hda_codec: No auto-config is "
4938 "available, default to model=ref\n");
4939 spec->board_config = STAC_9205_REF;
4940 goto again;
4941 }
4942 err = -EINVAL;
4943 }
f3302a59
MP		 4944 if (err < 0) {
4945 stac92xx_free(codec);
4946 return err;
4947 }
4948
4949 codec->patch_ops = stac92xx_patch_ops;
4950
4951 return 0;
4952}
4953
db064e50 4954/*
6d859065 4955 * STAC9872 hack
db064e50
TI		 4956 */
4957
99ccc560 4958/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4959static hda_nid_t vaio_dacs[] = { 0x2 };
4960#define VAIO_HP_DAC 0x5
4961static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4962static hda_nid_t vaio_mux_nids[] = { 0x15 };
4963
4964static struct hda_input_mux vaio_mux = {
a3a2f429 4965 .num_items = 3,
db064e50 4966 .items = {
d773781c 4967 /* { "HP", 0x0 }, */
1624cb9a
TI		 4968 { "Mic Jack", 0x1 },
4969 { "Internal Mic", 0x2 },
db064e50
TI		 4970 { "PCM", 0x3 },
4971 }
4972};
4973
4974static struct hda_verb vaio_init[] = {
4975 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4976 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4977 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4978 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4979 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4980 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4981 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4982 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4983 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4984 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4985 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4986 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4987 {}
4988};
4989
6d859065
GM		 4990static struct hda_verb vaio_ar_init[] = {
4991 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4992 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4993 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4994 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4995/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4996 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4997 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4998 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4999 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5000/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5001 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5002 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5003 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5004 {}
5005};
5006
db064e50 5007/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5008static struct hda_bind_ctls vaio_bind_master_vol = {
5009 .ops = &snd_hda_bind_vol,
5010 .values = {
5011 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5012 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5013 0
5014 },
5015};
db064e50
TI		 5016
5017/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5018static struct hda_bind_ctls vaio_bind_master_sw = {
5019 .ops = &snd_hda_bind_sw,
5020 .values = {
5021 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5022 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5023 0,
5024 },
5025};
db064e50
TI		 5026
5027static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5028 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5029 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5030 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5031 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5032 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5033 {
5034 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5035 .name = "Capture Source",
5036 .count = 1,
5037 .info = stac92xx_mux_enum_info,
5038 .get = stac92xx_mux_enum_get,
5039 .put = stac92xx_mux_enum_put,
5040 },
5041 {}
5042};
5043
6d859065 5044static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5045 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5046 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5047 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5048 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5049 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5050 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5051 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5052 {
5053 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5054 .name = "Capture Source",
5055 .count = 1,
5056 .info = stac92xx_mux_enum_info,
5057 .get = stac92xx_mux_enum_get,
5058 .put = stac92xx_mux_enum_put,
5059 },
5060 {}
5061};
5062
5063static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5064 .build_controls = stac92xx_build_controls,
5065 .build_pcms = stac92xx_build_pcms,
5066 .init = stac92xx_init,
5067 .free = stac92xx_free,
cb53c626 5068#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5069 .resume = stac92xx_resume,
5070#endif
5071};
5072
72e7b0dd
TI		 5073static int stac9872_vaio_init(struct hda_codec *codec)
5074{
5075 int err;
5076
5077 err = stac92xx_init(codec);
5078 if (err < 0)
5079 return err;
5080 if (codec->patch_ops.unsol_event)
5081 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5082 return 0;
5083}
5084
5085static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5086{
40c1d308 5087 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5088 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5089 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5090 } else {
5091 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5092 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5093 }
5094}
5095
5096static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5097{
5098 switch (res >> 26) {
5099 case STAC_HP_EVENT:
5100 stac9872_vaio_hp_detect(codec, res);
5101 break;
5102 }
5103}
5104
5105static struct hda_codec_ops stac9872_vaio_patch_ops = {
5106 .build_controls = stac92xx_build_controls,
5107 .build_pcms = stac92xx_build_pcms,
5108 .init = stac9872_vaio_init,
5109 .free = stac92xx_free,
5110 .unsol_event = stac9872_vaio_unsol_event,
5111#ifdef CONFIG_PM
5112 .resume = stac92xx_resume,
5113#endif
5114};
5115
6d859065
GM		 5116enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5117 CXD9872RD_VAIO,
5118 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5119 STAC9872AK_VAIO,
5120 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5121 STAC9872K_VAIO,
5122 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5123 CXD9872AKD_VAIO,
5124 STAC_9872_MODELS,
5125};
5126
5127static const char *stac9872_models[STAC_9872_MODELS] = {
5128 [CXD9872RD_VAIO] = "vaio",
5129 [CXD9872AKD_VAIO] = "vaio-ar",
5130};
5131
5132static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5133 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5134 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5135 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5136 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5137 {}
5138};
5139
6d859065 5140static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5141{
5142 struct sigmatel_spec *spec;
5143 int board_config;
5144
f5fcc13c
TI		 5145 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5146 stac9872_models,
5147 stac9872_cfg_tbl);
db064e50
TI		 5148 if (board_config < 0)
5149 /* unknown config, let generic-parser do its job... */
5150 return snd_hda_parse_generic_codec(codec);
5151
5152 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5153 if (spec == NULL)
5154 return -ENOMEM;
5155
5156 codec->spec = spec;
5157 switch (board_config) {
6d859065
GM		 5158 case CXD9872RD_VAIO:
5159 case STAC9872AK_VAIO:
5160 case STAC9872K_VAIO:
db064e50
TI		 5161 spec->mixer = vaio_mixer;
5162 spec->init = vaio_init;
5163 spec->multiout.max_channels = 2;
5164 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5165 spec->multiout.dac_nids = vaio_dacs;
5166 spec->multiout.hp_nid = VAIO_HP_DAC;
5167 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5168 spec->adc_nids = vaio_adcs;
a64135a2 5169 spec->num_pwrs = 0;
db064e50
TI		 5170 spec->input_mux = &vaio_mux;
5171 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5172 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5173 break;
6d859065
GM		 5174
5175 case CXD9872AKD_VAIO:
5176 spec->mixer = vaio_ar_mixer;
5177 spec->init = vaio_ar_init;
5178 spec->multiout.max_channels = 2;
5179 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5180 spec->multiout.dac_nids = vaio_dacs;
5181 spec->multiout.hp_nid = VAIO_HP_DAC;
5182 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5183 spec->num_pwrs = 0;
6d859065
GM		 5184 spec->adc_nids = vaio_adcs;
5185 spec->input_mux = &vaio_mux;
5186 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5187 codec->patch_ops = stac9872_patch_ops;
6d859065 5188 break;
db064e50
TI		 5189 }
5190
db064e50
TI		 5191 return 0;
5192}
5193
5194
2f2f4251
M		 5195/*
5196 * patch entries
5197 */
5198struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5199 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5200 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5201 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5202 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5203 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5204 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5205 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5206 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5207 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5208 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5209 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5210 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5211 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5212 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5213 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5214 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5215 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5216 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5217 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5218 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5219 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5220 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5221 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5222 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5223 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5224 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5225 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5226 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5227 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5228 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5229 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5230 /* The following does not take into account .id=0x83847661 when subsys =
5231 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5232 * currently not fully supported.
5233 */
5234 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5235 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5236 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5237 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5238 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5239 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5240 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5241 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5242 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5243 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5244 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5245 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5246 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5247 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5248 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5249 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5250 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5251 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5252 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5253 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5254 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5255 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5256 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5257 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5258 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5259 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5260 {} /* terminator */
5261};
Clone of davem's net-next-2.6 tree