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91504877 WF |
1 | /* |
2 | * | |
3 | * patch_intelhdmi.c - Patch for Intel HDMI codecs | |
4 | * | |
5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. | |
6 | * | |
7 | * Authors: | |
8 | * Jiang Zhe <zhe.jiang@intel.com> | |
9 | * Wu Fengguang <wfg@linux.intel.com> | |
10 | * | |
11 | * Maintained by: | |
12 | * Wu Fengguang <wfg@linux.intel.com> | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify it | |
15 | * under the terms of the GNU General Public License as published by the Free | |
16 | * Software Foundation; either version 2 of the License, or (at your option) | |
17 | * any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
21 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
22 | * for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software Foundation, | |
26 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
27 | */ | |
28 | ||
29 | #include <linux/init.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/slab.h> | |
32 | #include <sound/core.h> | |
91504877 WF |
33 | #include "hda_codec.h" |
34 | #include "hda_local.h" | |
91504877 | 35 | |
559059b2 WF |
36 | static hda_nid_t cvt_nid; /* audio converter */ |
37 | static hda_nid_t pin_nid; /* HDMI output pin */ | |
91504877 WF |
38 | |
39 | #define INTEL_HDMI_EVENT_TAG 0x08 | |
40 | ||
91504877 | 41 | struct intel_hdmi_spec { |
91504877 | 42 | struct hda_pcm pcm_rec; |
5b87ebb7 | 43 | struct hdmi_eld sink_eld; |
91504877 WF |
44 | }; |
45 | ||
91504877 WF |
46 | struct hdmi_audio_infoframe { |
47 | u8 type; /* 0x84 */ | |
48 | u8 ver; /* 0x01 */ | |
49 | u8 len; /* 0x0a */ | |
50 | ||
51 | u8 checksum; /* PB0 */ | |
52 | u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ | |
53 | u8 SS01_SF24; | |
54 | u8 CXT04; | |
55 | u8 CA; | |
56 | u8 LFEPBL01_LSV36_DM_INH7; | |
4e19c58f | 57 | u8 reserved[5]; /* PB6 - PB10 */ |
91504877 WF |
58 | }; |
59 | ||
698544de WF |
60 | /* |
61 | * CEA speaker placement: | |
62 | * | |
63 | * FLH FCH FRH | |
64 | * FLW FL FLC FC FRC FR FRW | |
65 | * | |
66 | * LFE | |
67 | * TC | |
68 | * | |
69 | * RL RLC RC RRC RR | |
70 | * | |
71 | * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to | |
72 | * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. | |
73 | */ | |
74 | enum cea_speaker_placement { | |
75 | FL = (1 << 0), /* Front Left */ | |
76 | FC = (1 << 1), /* Front Center */ | |
77 | FR = (1 << 2), /* Front Right */ | |
78 | FLC = (1 << 3), /* Front Left Center */ | |
79 | FRC = (1 << 4), /* Front Right Center */ | |
80 | RL = (1 << 5), /* Rear Left */ | |
81 | RC = (1 << 6), /* Rear Center */ | |
82 | RR = (1 << 7), /* Rear Right */ | |
83 | RLC = (1 << 8), /* Rear Left Center */ | |
84 | RRC = (1 << 9), /* Rear Right Center */ | |
85 | LFE = (1 << 10), /* Low Frequency Effect */ | |
86 | FLW = (1 << 11), /* Front Left Wide */ | |
87 | FRW = (1 << 12), /* Front Right Wide */ | |
88 | FLH = (1 << 13), /* Front Left High */ | |
89 | FCH = (1 << 14), /* Front Center High */ | |
90 | FRH = (1 << 15), /* Front Right High */ | |
91 | TC = (1 << 16), /* Top Center */ | |
92 | }; | |
93 | ||
94 | /* | |
95 | * ELD SA bits in the CEA Speaker Allocation data block | |
96 | */ | |
97 | static int eld_speaker_allocation_bits[] = { | |
98 | [0] = FL | FR, | |
99 | [1] = LFE, | |
100 | [2] = FC, | |
101 | [3] = RL | RR, | |
102 | [4] = RC, | |
103 | [5] = FLC | FRC, | |
104 | [6] = RLC | RRC, | |
105 | /* the following are not defined in ELD yet */ | |
106 | [7] = FLW | FRW, | |
107 | [8] = FLH | FRH, | |
108 | [9] = TC, | |
109 | [10] = FCH, | |
110 | }; | |
111 | ||
112 | struct cea_channel_speaker_allocation { | |
113 | int ca_index; | |
114 | int speakers[8]; | |
115 | ||
116 | /* derived values, just for convenience */ | |
117 | int channels; | |
118 | int spk_mask; | |
119 | }; | |
120 | ||
121 | /* | |
122 | * This is an ordered list! | |
123 | * | |
124 | * The preceding ones have better chances to be selected by | |
125 | * hdmi_setup_channel_allocation(). | |
126 | */ | |
127 | static struct cea_channel_speaker_allocation channel_allocations[] = { | |
128 | /* channel: 8 7 6 5 4 3 2 1 */ | |
129 | { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, | |
130 | /* 2.1 */ | |
131 | { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, | |
4e19c58f | 132 | /* Dolby Surround */ |
698544de WF |
133 | { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, |
134 | { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, | |
135 | { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, | |
136 | { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, | |
137 | { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, | |
138 | { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, | |
139 | { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, | |
140 | { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, | |
141 | { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, | |
142 | /* 5.1 */ | |
143 | { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, | |
144 | { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, | |
145 | { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, | |
146 | { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, | |
147 | /* 6.1 */ | |
148 | { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, | |
149 | { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, | |
150 | { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, | |
151 | { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, | |
152 | /* 7.1 */ | |
153 | { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, | |
154 | { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, | |
155 | { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, | |
156 | { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, | |
157 | { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, | |
158 | { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, | |
159 | { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, | |
160 | { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, | |
161 | { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, | |
162 | { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, | |
163 | { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, | |
164 | { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, | |
165 | { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, | |
166 | { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, | |
167 | { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, | |
168 | { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, | |
169 | { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, | |
170 | { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, | |
171 | { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, | |
172 | { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, | |
173 | { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, | |
174 | { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, | |
175 | { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, | |
176 | { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, | |
177 | { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, | |
178 | { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, | |
179 | { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, | |
180 | { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, | |
181 | { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, | |
182 | { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, | |
183 | { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, | |
184 | }; | |
185 | ||
91504877 WF |
186 | /* |
187 | * HDMI routines | |
188 | */ | |
189 | ||
beb0b9cf | 190 | #ifdef BE_PARANOID |
6797cf2b | 191 | static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, |
91504877 WF |
192 | int *packet_index, int *byte_index) |
193 | { | |
194 | int val; | |
195 | ||
6797cf2b WF |
196 | val = snd_hda_codec_read(codec, pin_nid, 0, |
197 | AC_VERB_GET_HDMI_DIP_INDEX, 0); | |
91504877 WF |
198 | |
199 | *packet_index = val >> 5; | |
200 | *byte_index = val & 0x1f; | |
201 | } | |
beb0b9cf | 202 | #endif |
91504877 | 203 | |
6797cf2b | 204 | static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, |
91504877 WF |
205 | int packet_index, int byte_index) |
206 | { | |
207 | int val; | |
208 | ||
209 | val = (packet_index << 5) | (byte_index & 0x1f); | |
210 | ||
6797cf2b | 211 | snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); |
91504877 WF |
212 | } |
213 | ||
6797cf2b | 214 | static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, |
91504877 WF |
215 | unsigned char val) |
216 | { | |
6797cf2b | 217 | snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); |
91504877 WF |
218 | } |
219 | ||
6797cf2b | 220 | static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid) |
91504877 | 221 | { |
796359d1 | 222 | /* Unmute */ |
559059b2 WF |
223 | if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) |
224 | snd_hda_codec_write(codec, pin_nid, 0, | |
796359d1 WF |
225 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); |
226 | /* Enable pin out */ | |
559059b2 WF |
227 | snd_hda_codec_write(codec, pin_nid, 0, |
228 | AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); | |
91504877 WF |
229 | } |
230 | ||
606c0cee WF |
231 | /* |
232 | * Enable Audio InfoFrame Transmission | |
233 | */ | |
6797cf2b WF |
234 | static void hdmi_start_infoframe_trans(struct hda_codec *codec, |
235 | hda_nid_t pin_nid) | |
91504877 | 236 | { |
559059b2 WF |
237 | hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); |
238 | snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, | |
606c0cee WF |
239 | AC_DIPXMIT_BEST); |
240 | } | |
91504877 | 241 | |
606c0cee WF |
242 | /* |
243 | * Disable Audio InfoFrame Transmission | |
244 | */ | |
6797cf2b WF |
245 | static void hdmi_stop_infoframe_trans(struct hda_codec *codec, |
246 | hda_nid_t pin_nid) | |
606c0cee | 247 | { |
559059b2 WF |
248 | hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); |
249 | snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, | |
606c0cee | 250 | AC_DIPXMIT_DISABLE); |
91504877 WF |
251 | } |
252 | ||
6797cf2b | 253 | static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid) |
91504877 | 254 | { |
6797cf2b | 255 | return 1 + snd_hda_codec_read(codec, nid, 0, |
91504877 WF |
256 | AC_VERB_GET_CVT_CHAN_COUNT, 0); |
257 | } | |
258 | ||
6797cf2b WF |
259 | static void hdmi_set_channel_count(struct hda_codec *codec, |
260 | hda_nid_t nid, int chs) | |
91504877 | 261 | { |
6797cf2b | 262 | snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); |
91504877 | 263 | |
6797cf2b WF |
264 | #ifdef CONFIG_SND_DEBUG_VERBOSE |
265 | if (chs != hdmi_get_channel_count(codec, nid)) | |
03284c8f | 266 | snd_printd(KERN_INFO "HDMI channel count: expect %d, get %d\n", |
6797cf2b WF |
267 | chs, hdmi_get_channel_count(codec, nid)); |
268 | #endif | |
91504877 WF |
269 | } |
270 | ||
6797cf2b | 271 | static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid) |
91504877 WF |
272 | { |
273 | #ifdef CONFIG_SND_DEBUG_VERBOSE | |
274 | int i; | |
275 | int slot; | |
276 | ||
277 | for (i = 0; i < 8; i++) { | |
6797cf2b | 278 | slot = snd_hda_codec_read(codec, nid, 0, |
91504877 | 279 | AC_VERB_GET_HDMI_CHAN_SLOT, i); |
03284c8f | 280 | printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", |
4e19c58f | 281 | slot >> 4, slot & 0x7); |
91504877 WF |
282 | } |
283 | #endif | |
284 | } | |
285 | ||
91504877 WF |
286 | static void hdmi_parse_eld(struct hda_codec *codec) |
287 | { | |
7f4a9f43 | 288 | struct intel_hdmi_spec *spec = codec->spec; |
5b87ebb7 | 289 | struct hdmi_eld *eld = &spec->sink_eld; |
91504877 | 290 | |
559059b2 | 291 | if (!snd_hdmi_get_eld(eld, codec, pin_nid)) |
7f4a9f43 | 292 | snd_hdmi_show_eld(eld); |
91504877 WF |
293 | } |
294 | ||
295 | ||
296 | /* | |
4e19c58f | 297 | * Audio InfoFrame routines |
91504877 WF |
298 | */ |
299 | ||
6797cf2b | 300 | static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) |
91504877 WF |
301 | { |
302 | #ifdef CONFIG_SND_DEBUG_VERBOSE | |
303 | int i; | |
304 | int size; | |
305 | ||
559059b2 | 306 | size = snd_hdmi_get_eld_size(codec, pin_nid); |
03284c8f | 307 | printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); |
91504877 WF |
308 | |
309 | for (i = 0; i < 8; i++) { | |
559059b2 | 310 | size = snd_hda_codec_read(codec, pin_nid, 0, |
91504877 | 311 | AC_VERB_GET_HDMI_DIP_SIZE, i); |
03284c8f | 312 | printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); |
91504877 WF |
313 | } |
314 | #endif | |
315 | } | |
316 | ||
6797cf2b | 317 | static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) |
91504877 WF |
318 | { |
319 | #ifdef BE_PARANOID | |
320 | int i, j; | |
321 | int size; | |
322 | int pi, bi; | |
323 | for (i = 0; i < 8; i++) { | |
559059b2 | 324 | size = snd_hda_codec_read(codec, pin_nid, 0, |
91504877 WF |
325 | AC_VERB_GET_HDMI_DIP_SIZE, i); |
326 | if (size == 0) | |
327 | continue; | |
328 | ||
559059b2 | 329 | hdmi_set_dip_index(codec, pin_nid, i, 0x0); |
91504877 | 330 | for (j = 1; j < 1000; j++) { |
559059b2 WF |
331 | hdmi_write_dip_byte(codec, pin_nid, 0x0); |
332 | hdmi_get_dip_index(codec, pin_nid, &pi, &bi); | |
91504877 WF |
333 | if (pi != i) |
334 | snd_printd(KERN_INFO "dip index %d: %d != %d\n", | |
335 | bi, pi, i); | |
336 | if (bi == 0) /* byte index wrapped around */ | |
337 | break; | |
338 | } | |
339 | snd_printd(KERN_INFO | |
03284c8f WF |
340 | "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", |
341 | i, size, j); | |
91504877 WF |
342 | } |
343 | #endif | |
344 | } | |
345 | ||
5457a980 | 346 | static void hdmi_fill_audio_infoframe(struct hda_codec *codec, |
6797cf2b WF |
347 | hda_nid_t pin_nid, |
348 | struct hdmi_audio_infoframe *ai) | |
5457a980 WF |
349 | { |
350 | u8 *params = (u8 *)ai; | |
9a957a24 | 351 | u8 sum = 0; |
5457a980 WF |
352 | int i; |
353 | ||
6797cf2b WF |
354 | hdmi_debug_dip_size(codec, pin_nid); |
355 | hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ | |
5457a980 | 356 | |
9a957a24 WF |
357 | for (i = 0; i < sizeof(ai); i++) |
358 | sum += params[i]; | |
359 | ai->checksum = - sum; | |
360 | ||
559059b2 | 361 | hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); |
5457a980 | 362 | for (i = 0; i < sizeof(ai); i++) |
559059b2 | 363 | hdmi_write_dip_byte(codec, pin_nid, params[i]); |
5457a980 WF |
364 | } |
365 | ||
698544de WF |
366 | /* |
367 | * Compute derived values in channel_allocations[]. | |
368 | */ | |
369 | static void init_channel_allocations(void) | |
370 | { | |
371 | int i, j; | |
372 | struct cea_channel_speaker_allocation *p; | |
373 | ||
374 | for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { | |
375 | p = channel_allocations + i; | |
376 | p->channels = 0; | |
377 | p->spk_mask = 0; | |
378 | for (j = 0; j < ARRAY_SIZE(p->speakers); j++) | |
379 | if (p->speakers[j]) { | |
380 | p->channels++; | |
381 | p->spk_mask |= p->speakers[j]; | |
382 | } | |
383 | } | |
384 | } | |
385 | ||
386 | /* | |
387 | * The transformation takes two steps: | |
388 | * | |
389 | * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask | |
390 | * spk_mask => (channel_allocations[]) => ai->CA | |
391 | * | |
392 | * TODO: it could select the wrong CA from multiple candidates. | |
393 | */ | |
6797cf2b | 394 | static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid, |
698544de WF |
395 | struct hdmi_audio_infoframe *ai) |
396 | { | |
397 | struct intel_hdmi_spec *spec = codec->spec; | |
5b87ebb7 | 398 | struct hdmi_eld *eld = &spec->sink_eld; |
698544de WF |
399 | int i; |
400 | int spk_mask = 0; | |
401 | int channels = 1 + (ai->CC02_CT47 & 0x7); | |
402 | char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; | |
403 | ||
404 | /* | |
405 | * CA defaults to 0 for basic stereo audio | |
406 | */ | |
698544de WF |
407 | if (channels <= 2) |
408 | return 0; | |
409 | ||
a1667e4e WF |
410 | /* |
411 | * HDMI sink's ELD info cannot always be retrieved for now, e.g. | |
412 | * in console or for audio devices. Assume the highest speakers | |
413 | * configuration, to _not_ prohibit multi-channel audio playback. | |
414 | */ | |
415 | if (!eld->spk_alloc) | |
416 | eld->spk_alloc = 0xffff; | |
417 | ||
698544de WF |
418 | /* |
419 | * expand ELD's speaker allocation mask | |
420 | * | |
421 | * ELD tells the speaker mask in a compact(paired) form, | |
b83923a3 | 422 | * expand ELD's notions to match the ones used by Audio InfoFrame. |
698544de WF |
423 | */ |
424 | for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { | |
425 | if (eld->spk_alloc & (1 << i)) | |
426 | spk_mask |= eld_speaker_allocation_bits[i]; | |
427 | } | |
428 | ||
429 | /* search for the first working match in the CA table */ | |
430 | for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { | |
431 | if (channels == channel_allocations[i].channels && | |
432 | (spk_mask & channel_allocations[i].spk_mask) == | |
433 | channel_allocations[i].spk_mask) { | |
434 | ai->CA = channel_allocations[i].ca_index; | |
cc02b83c | 435 | break; |
698544de WF |
436 | } |
437 | } | |
438 | ||
439 | snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf)); | |
cc02b83c WF |
440 | snd_printdd(KERN_INFO |
441 | "HDMI: select CA 0x%x for %d-channel allocation: %s\n", | |
442 | ai->CA, channels, buf); | |
443 | ||
444 | return ai->CA; | |
698544de WF |
445 | } |
446 | ||
6797cf2b WF |
447 | static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid, |
448 | struct hdmi_audio_infoframe *ai) | |
9c8641e8 | 449 | { |
559059b2 WF |
450 | int i; |
451 | ||
9c8641e8 WF |
452 | if (!ai->CA) |
453 | return; | |
454 | ||
455 | /* | |
456 | * TODO: adjust channel mapping if necessary | |
457 | * ALSA sequence is front/surr/clfe/side? | |
458 | */ | |
459 | ||
559059b2 | 460 | for (i = 0; i < 8; i++) |
6797cf2b | 461 | snd_hda_codec_write(codec, nid, 0, |
559059b2 WF |
462 | AC_VERB_SET_HDMI_CHAN_SLOT, |
463 | (i << 4) | i); | |
464 | ||
6797cf2b | 465 | hdmi_debug_channel_mapping(codec, nid); |
9c8641e8 WF |
466 | } |
467 | ||
468 | ||
6797cf2b | 469 | static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid, |
91504877 WF |
470 | struct snd_pcm_substream *substream) |
471 | { | |
5457a980 | 472 | struct hdmi_audio_infoframe ai = { |
91504877 WF |
473 | .type = 0x84, |
474 | .ver = 0x01, | |
475 | .len = 0x0a, | |
476 | .CC02_CT47 = substream->runtime->channels - 1, | |
477 | }; | |
91504877 | 478 | |
6797cf2b WF |
479 | hdmi_setup_channel_allocation(codec, nid, &ai); |
480 | hdmi_setup_channel_mapping(codec, nid, &ai); | |
698544de | 481 | |
6797cf2b WF |
482 | hdmi_fill_audio_infoframe(codec, pin_nid, &ai); |
483 | hdmi_start_infoframe_trans(codec, pin_nid); | |
91504877 WF |
484 | } |
485 | ||
486 | ||
487 | /* | |
488 | * Unsolicited events | |
489 | */ | |
490 | ||
491 | static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) | |
492 | { | |
493 | int pind = !!(res & AC_UNSOL_RES_PD); | |
494 | int eldv = !!(res & AC_UNSOL_RES_ELDV); | |
495 | ||
03284c8f WF |
496 | printk(KERN_INFO |
497 | "HDMI hot plug event: Presence_Detect=%d ELD_Valid=%d\n", | |
498 | pind, eldv); | |
91504877 WF |
499 | |
500 | if (pind && eldv) { | |
501 | hdmi_parse_eld(codec); | |
502 | /* TODO: do real things about ELD */ | |
503 | } | |
504 | } | |
505 | ||
506 | static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) | |
507 | { | |
508 | int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; | |
509 | int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); | |
510 | int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); | |
511 | ||
03284c8f WF |
512 | printk(KERN_INFO |
513 | "HDMI content protection event: SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", | |
514 | subtag, | |
515 | cp_state, | |
516 | cp_ready); | |
91504877 | 517 | |
03284c8f | 518 | /* TODO */ |
91504877 WF |
519 | if (cp_state) |
520 | ; | |
521 | if (cp_ready) | |
522 | ; | |
523 | } | |
524 | ||
525 | ||
526 | static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res) | |
527 | { | |
528 | int tag = res >> AC_UNSOL_RES_TAG_SHIFT; | |
529 | int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; | |
530 | ||
531 | if (tag != INTEL_HDMI_EVENT_TAG) { | |
03284c8f | 532 | snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); |
91504877 WF |
533 | return; |
534 | } | |
535 | ||
536 | if (subtag == 0) | |
537 | hdmi_intrinsic_event(codec, res); | |
538 | else | |
539 | hdmi_non_intrinsic_event(codec, res); | |
540 | } | |
541 | ||
542 | /* | |
543 | * Callbacks | |
544 | */ | |
545 | ||
546 | static int intel_hdmi_playback_pcm_open(struct hda_pcm_stream *hinfo, | |
4e19c58f WF |
547 | struct hda_codec *codec, |
548 | struct snd_pcm_substream *substream) | |
91504877 | 549 | { |
7bedb011 | 550 | return 0; |
91504877 WF |
551 | } |
552 | ||
553 | static int intel_hdmi_playback_pcm_close(struct hda_pcm_stream *hinfo, | |
4e19c58f WF |
554 | struct hda_codec *codec, |
555 | struct snd_pcm_substream *substream) | |
91504877 WF |
556 | { |
557 | struct intel_hdmi_spec *spec = codec->spec; | |
558 | ||
6797cf2b | 559 | hdmi_stop_infoframe_trans(codec, pin_nid); |
91504877 | 560 | |
7bedb011 WF |
561 | snd_hda_codec_cleanup_stream(codec, hinfo->nid); |
562 | return 0; | |
91504877 WF |
563 | } |
564 | ||
565 | static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, | |
566 | struct hda_codec *codec, | |
567 | unsigned int stream_tag, | |
568 | unsigned int format, | |
569 | struct snd_pcm_substream *substream) | |
570 | { | |
7bedb011 WF |
571 | hdmi_set_channel_count(codec, cvt_nid, |
572 | substream->runtime->channels); | |
91504877 | 573 | |
6797cf2b | 574 | hdmi_setup_audio_infoframe(codec, cvt_nid, substream); |
91504877 | 575 | |
7bedb011 | 576 | snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format); |
91504877 WF |
577 | return 0; |
578 | } | |
579 | ||
580 | static struct hda_pcm_stream intel_hdmi_pcm_playback = { | |
581 | .substreams = 1, | |
582 | .channels_min = 2, | |
583 | .channels_max = 8, | |
91504877 | 584 | .ops = { |
b83923a3 WF |
585 | .open = intel_hdmi_playback_pcm_open, |
586 | .close = intel_hdmi_playback_pcm_close, | |
91504877 WF |
587 | .prepare = intel_hdmi_playback_pcm_prepare |
588 | }, | |
589 | }; | |
590 | ||
591 | static int intel_hdmi_build_pcms(struct hda_codec *codec) | |
592 | { | |
593 | struct intel_hdmi_spec *spec = codec->spec; | |
594 | struct hda_pcm *info = &spec->pcm_rec; | |
595 | ||
596 | codec->num_pcms = 1; | |
597 | codec->pcm_info = info; | |
598 | ||
559059b2 WF |
599 | /* NID to query formats and rates and setup streams */ |
600 | intel_hdmi_pcm_playback.nid = cvt_nid; | |
601 | ||
91504877 WF |
602 | info->name = "INTEL HDMI"; |
603 | info->pcm_type = HDA_PCM_TYPE_HDMI; | |
604 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = intel_hdmi_pcm_playback; | |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
609 | static int intel_hdmi_build_controls(struct hda_codec *codec) | |
610 | { | |
611 | struct intel_hdmi_spec *spec = codec->spec; | |
612 | int err; | |
613 | ||
7bedb011 | 614 | err = snd_hda_create_spdif_out_ctls(codec, cvt_nid); |
91504877 WF |
615 | if (err < 0) |
616 | return err; | |
617 | ||
618 | return 0; | |
619 | } | |
620 | ||
621 | static int intel_hdmi_init(struct hda_codec *codec) | |
622 | { | |
6797cf2b | 623 | hdmi_enable_output(codec, pin_nid); |
91504877 | 624 | |
559059b2 WF |
625 | snd_hda_codec_write(codec, pin_nid, 0, |
626 | AC_VERB_SET_UNSOLICITED_ENABLE, | |
627 | AC_USRSP_EN | INTEL_HDMI_EVENT_TAG); | |
91504877 WF |
628 | return 0; |
629 | } | |
630 | ||
631 | static void intel_hdmi_free(struct hda_codec *codec) | |
632 | { | |
f208dba9 TI |
633 | struct intel_hdmi_spec *spec = codec->spec; |
634 | ||
635 | snd_hda_eld_proc_free(codec, &spec->sink_eld); | |
636 | kfree(spec); | |
91504877 WF |
637 | } |
638 | ||
639 | static struct hda_codec_ops intel_hdmi_patch_ops = { | |
640 | .init = intel_hdmi_init, | |
641 | .free = intel_hdmi_free, | |
642 | .build_pcms = intel_hdmi_build_pcms, | |
643 | .build_controls = intel_hdmi_build_controls, | |
644 | .unsol_event = intel_hdmi_unsol_event, | |
645 | }; | |
646 | ||
559059b2 | 647 | static int do_patch_intel_hdmi(struct hda_codec *codec) |
91504877 WF |
648 | { |
649 | struct intel_hdmi_spec *spec; | |
650 | ||
651 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
652 | if (spec == NULL) | |
653 | return -ENOMEM; | |
654 | ||
91504877 WF |
655 | codec->spec = spec; |
656 | codec->patch_ops = intel_hdmi_patch_ops; | |
657 | ||
5b87ebb7 | 658 | snd_hda_eld_proc_new(codec, &spec->sink_eld); |
5f1e71b1 | 659 | |
698544de WF |
660 | init_channel_allocations(); |
661 | ||
91504877 WF |
662 | return 0; |
663 | } | |
664 | ||
559059b2 WF |
665 | static int patch_intel_hdmi(struct hda_codec *codec) |
666 | { | |
667 | cvt_nid = 0x02; | |
668 | pin_nid = 0x03; | |
669 | return do_patch_intel_hdmi(codec); | |
670 | } | |
671 | ||
672 | static int patch_intel_hdmi_ibexpeak(struct hda_codec *codec) | |
673 | { | |
674 | cvt_nid = 0x02; | |
675 | pin_nid = 0x04; | |
676 | return do_patch_intel_hdmi(codec); | |
677 | } | |
678 | ||
1289e9e8 | 679 | static struct hda_codec_preset snd_hda_preset_intelhdmi[] = { |
74c61133 TI |
680 | { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi }, |
681 | { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi }, | |
682 | { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi }, | |
683 | { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi }, | |
739b47f1 | 684 | { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi_ibexpeak }, |
559059b2 | 685 | { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi_ibexpeak }, |
3a95cb97 | 686 | { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi }, |
91504877 WF |
687 | {} /* terminator */ |
688 | }; | |
1289e9e8 TI |
689 | |
690 | MODULE_ALIAS("snd-hda-codec-id:808629fb"); | |
691 | MODULE_ALIAS("snd-hda-codec-id:80862801"); | |
692 | MODULE_ALIAS("snd-hda-codec-id:80862802"); | |
693 | MODULE_ALIAS("snd-hda-codec-id:80862803"); | |
a57c0eb6 | 694 | MODULE_ALIAS("snd-hda-codec-id:80862804"); |
87a8c370 | 695 | MODULE_ALIAS("snd-hda-codec-id:80860054"); |
1289e9e8 TI |
696 | MODULE_ALIAS("snd-hda-codec-id:10951392"); |
697 | ||
698 | MODULE_LICENSE("GPL"); | |
699 | MODULE_DESCRIPTION("Intel HDMI HD-audio codec"); | |
700 | ||
701 | static struct hda_codec_preset_list intel_list = { | |
702 | .preset = snd_hda_preset_intelhdmi, | |
703 | .owner = THIS_MODULE, | |
704 | }; | |
705 | ||
706 | static int __init patch_intelhdmi_init(void) | |
707 | { | |
708 | return snd_hda_add_codec_preset(&intel_list); | |
709 | } | |
710 | ||
711 | static void __exit patch_intelhdmi_exit(void) | |
712 | { | |
713 | snd_hda_delete_codec_preset(&intel_list); | |
714 | } | |
715 | ||
716 | module_init(patch_intelhdmi_init) | |
717 | module_exit(patch_intelhdmi_exit) |