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ALSA: hda - convert intelhdmi global references to local parameters
[net-next-2.6.git] / sound / pci / hda / patch_intelhdmi.c
CommitLineData
91504877
WF		 1/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
91504877
WF		 33#include "hda_codec.h"
34#include "hda_local.h"
91504877 35
559059b2
WF		 36static hda_nid_t cvt_nid; /* audio converter */
37static hda_nid_t pin_nid; /* HDMI output pin */
91504877
WF		 38
39#define INTEL_HDMI_EVENT_TAG 0x08
40
91504877
WF		 41struct intel_hdmi_spec {
42 struct hda_multi_out multiout;
43 struct hda_pcm pcm_rec;
5b87ebb7 44 struct hdmi_eld sink_eld;
91504877
WF		 45};
46
91504877
WF		 47struct hdmi_audio_infoframe {
48 u8 type; /* 0x84 */
49 u8 ver; /* 0x01 */
50 u8 len; /* 0x0a */
51
52 u8 checksum; /* PB0 */
53 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
54 u8 SS01_SF24;
55 u8 CXT04;
56 u8 CA;
57 u8 LFEPBL01_LSV36_DM_INH7;
4e19c58f 58 u8 reserved[5]; /* PB6 - PB10 */
91504877
WF		 59};
60
698544de
WF		 61/*
62 * CEA speaker placement:
63 *
64 * FLH FCH FRH
65 * FLW FL FLC FC FRC FR FRW
66 *
67 * LFE
68 * TC
69 *
70 * RL RLC RC RRC RR
71 *
72 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
73 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
74 */
75enum cea_speaker_placement {
76 FL = (1 << 0), /* Front Left */
77 FC = (1 << 1), /* Front Center */
78 FR = (1 << 2), /* Front Right */
79 FLC = (1 << 3), /* Front Left Center */
80 FRC = (1 << 4), /* Front Right Center */
81 RL = (1 << 5), /* Rear Left */
82 RC = (1 << 6), /* Rear Center */
83 RR = (1 << 7), /* Rear Right */
84 RLC = (1 << 8), /* Rear Left Center */
85 RRC = (1 << 9), /* Rear Right Center */
86 LFE = (1 << 10), /* Low Frequency Effect */
87 FLW = (1 << 11), /* Front Left Wide */
88 FRW = (1 << 12), /* Front Right Wide */
89 FLH = (1 << 13), /* Front Left High */
90 FCH = (1 << 14), /* Front Center High */
91 FRH = (1 << 15), /* Front Right High */
92 TC = (1 << 16), /* Top Center */
93};
94
95/*
96 * ELD SA bits in the CEA Speaker Allocation data block
97 */
98static int eld_speaker_allocation_bits[] = {
99 [0] = FL | FR,
100 [1] = LFE,
101 [2] = FC,
102 [3] = RL | RR,
103 [4] = RC,
104 [5] = FLC | FRC,
105 [6] = RLC | RRC,
106 /* the following are not defined in ELD yet */
107 [7] = FLW | FRW,
108 [8] = FLH | FRH,
109 [9] = TC,
110 [10] = FCH,
111};
112
113struct cea_channel_speaker_allocation {
114 int ca_index;
115 int speakers[8];
116
117 /* derived values, just for convenience */
118 int channels;
119 int spk_mask;
120};
121
122/*
123 * This is an ordered list!
124 *
125 * The preceding ones have better chances to be selected by
126 * hdmi_setup_channel_allocation().
127 */
128static struct cea_channel_speaker_allocation channel_allocations[] = {
129/* channel: 8 7 6 5 4 3 2 1 */
130{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
131 /* 2.1 */
132{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
4e19c58f 133 /* Dolby Surround */
698544de
WF		 134{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
135{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
136{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
137{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
138{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
139{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
140{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
141{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
142{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
143 /* 5.1 */
144{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
145{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
146{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
147{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
148 /* 6.1 */
149{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
150{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
151{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
152{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
153 /* 7.1 */
154{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
155{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
156{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
157{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
158{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
159{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
160{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
161{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
162{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
163{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
164{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
165{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
166{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
167{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
168{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
169{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
170{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
171{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
172{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
173{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
174{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
175{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
176{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
177{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
178{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
179{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
180{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
181{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
182{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
183{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
184{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
185};
186
91504877
WF		 187/*
188 * HDMI routines
189 */
190
beb0b9cf 191#ifdef BE_PARANOID
6797cf2b 192static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
91504877
WF		 193 int *packet_index, int *byte_index)
194{
195 int val;
196
6797cf2b
WF		 197 val = snd_hda_codec_read(codec, pin_nid, 0,
198 AC_VERB_GET_HDMI_DIP_INDEX, 0);
91504877
WF		 199
200 *packet_index = val >> 5;
201 *byte_index = val & 0x1f;
202}
beb0b9cf 203#endif
91504877 204
6797cf2b 205static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
91504877
WF		 206 int packet_index, int byte_index)
207{
208 int val;
209
210 val = (packet_index << 5) | (byte_index & 0x1f);
211
6797cf2b 212 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
91504877
WF		 213}
214
6797cf2b 215static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
91504877
WF		 216 unsigned char val)
217{
6797cf2b 218 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
91504877
WF		 219}
220
6797cf2b 221static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
91504877 222{
796359d1 223 /* Unmute */
559059b2
WF		 224 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
225 snd_hda_codec_write(codec, pin_nid, 0,
796359d1
WF		 226 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
227 /* Enable pin out */
559059b2
WF		 228 snd_hda_codec_write(codec, pin_nid, 0,
229 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
91504877
WF		 230}
231
606c0cee
WF		 232/*
233 * Enable Audio InfoFrame Transmission
234 */
6797cf2b
WF		 235static void hdmi_start_infoframe_trans(struct hda_codec *codec,
236 hda_nid_t pin_nid)
91504877 237{
559059b2
WF		 238 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
239 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
606c0cee
WF		 240 AC_DIPXMIT_BEST);
241}
91504877 242
606c0cee
WF		 243/*
244 * Disable Audio InfoFrame Transmission
245 */
6797cf2b
WF		 246static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
247 hda_nid_t pin_nid)
606c0cee 248{
559059b2
WF		 249 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
250 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
606c0cee 251 AC_DIPXMIT_DISABLE);
91504877
WF		 252}
253
6797cf2b 254static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
91504877 255{
6797cf2b 256 return 1 + snd_hda_codec_read(codec, nid, 0,
91504877
WF		 257 AC_VERB_GET_CVT_CHAN_COUNT, 0);
258}
259
6797cf2b
WF		 260static void hdmi_set_channel_count(struct hda_codec *codec,
261 hda_nid_t nid, int chs)
91504877 262{
6797cf2b 263 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
91504877 264
6797cf2b
WF		 265#ifdef CONFIG_SND_DEBUG_VERBOSE
266 if (chs != hdmi_get_channel_count(codec, nid))
03284c8f 267 snd_printd(KERN_INFO "HDMI channel count: expect %d, get %d\n",
6797cf2b
WF		 268 chs, hdmi_get_channel_count(codec, nid));
269#endif
91504877
WF		 270}
271
6797cf2b 272static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid)
91504877
WF		 273{
274#ifdef CONFIG_SND_DEBUG_VERBOSE
275 int i;
276 int slot;
277
278 for (i = 0; i < 8; i++) {
6797cf2b 279 slot = snd_hda_codec_read(codec, nid, 0,
91504877 280 AC_VERB_GET_HDMI_CHAN_SLOT, i);
03284c8f 281 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
4e19c58f 282 slot >> 4, slot & 0x7);
91504877
WF		 283 }
284#endif
285}
286
91504877
WF		 287static void hdmi_parse_eld(struct hda_codec *codec)
288{
7f4a9f43 289 struct intel_hdmi_spec *spec = codec->spec;
5b87ebb7 290 struct hdmi_eld *eld = &spec->sink_eld;
91504877 291
559059b2 292 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
7f4a9f43 293 snd_hdmi_show_eld(eld);
91504877
WF		 294}
295
296
297/*
4e19c58f 298 * Audio InfoFrame routines
91504877
WF		 299 */
300
6797cf2b 301static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
91504877
WF		 302{
303#ifdef CONFIG_SND_DEBUG_VERBOSE
304 int i;
305 int size;
306
559059b2 307 size = snd_hdmi_get_eld_size(codec, pin_nid);
03284c8f 308 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
91504877
WF		 309
310 for (i = 0; i < 8; i++) {
559059b2 311 size = snd_hda_codec_read(codec, pin_nid, 0,
91504877 312 AC_VERB_GET_HDMI_DIP_SIZE, i);
03284c8f 313 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
91504877
WF		 314 }
315#endif
316}
317
6797cf2b 318static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
91504877
WF		 319{
320#ifdef BE_PARANOID
321 int i, j;
322 int size;
323 int pi, bi;
324 for (i = 0; i < 8; i++) {
559059b2 325 size = snd_hda_codec_read(codec, pin_nid, 0,
91504877
WF		 326 AC_VERB_GET_HDMI_DIP_SIZE, i);
327 if (size == 0)
328 continue;
329
559059b2 330 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
91504877 331 for (j = 1; j < 1000; j++) {
559059b2
WF		 332 hdmi_write_dip_byte(codec, pin_nid, 0x0);
333 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
91504877
WF		 334 if (pi != i)
335 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
336 bi, pi, i);
337 if (bi == 0) /* byte index wrapped around */
338 break;
339 }
340 snd_printd(KERN_INFO
03284c8f
WF		 341 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
342 i, size, j);
91504877
WF		 343 }
344#endif
345}
346
5457a980 347static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
6797cf2b
WF		 348 hda_nid_t pin_nid,
349 struct hdmi_audio_infoframe *ai)
5457a980
WF		 350{
351 u8 *params = (u8 *)ai;
9a957a24 352 u8 sum = 0;
5457a980
WF		 353 int i;
354
6797cf2b
WF		 355 hdmi_debug_dip_size(codec, pin_nid);
356 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
5457a980 357
9a957a24
WF		 358 for (i = 0; i < sizeof(ai); i++)
359 sum += params[i];
360 ai->checksum = - sum;
361
559059b2 362 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
5457a980 363 for (i = 0; i < sizeof(ai); i++)
559059b2 364 hdmi_write_dip_byte(codec, pin_nid, params[i]);
5457a980
WF		 365}
366
698544de
WF		 367/*
368 * Compute derived values in channel_allocations[].
369 */
370static void init_channel_allocations(void)
371{
372 int i, j;
373 struct cea_channel_speaker_allocation *p;
374
375 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
376 p = channel_allocations + i;
377 p->channels = 0;
378 p->spk_mask = 0;
379 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
380 if (p->speakers[j]) {
381 p->channels++;
382 p->spk_mask |= p->speakers[j];
383 }
384 }
385}
386
387/*
388 * The transformation takes two steps:
389 *
390 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
391 * spk_mask => (channel_allocations[]) => ai->CA
392 *
393 * TODO: it could select the wrong CA from multiple candidates.
394*/
6797cf2b 395static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
698544de
WF		 396 struct hdmi_audio_infoframe *ai)
397{
398 struct intel_hdmi_spec *spec = codec->spec;
5b87ebb7 399 struct hdmi_eld *eld = &spec->sink_eld;
698544de
WF		 400 int i;
401 int spk_mask = 0;
402 int channels = 1 + (ai->CC02_CT47 & 0x7);
403 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
404
405 /*
406 * CA defaults to 0 for basic stereo audio
407 */
698544de
WF		 408 if (channels <= 2)
409 return 0;
410
a1667e4e
WF		 411 /*
412 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
413 * in console or for audio devices. Assume the highest speakers
414 * configuration, to _not_ prohibit multi-channel audio playback.
415 */
416 if (!eld->spk_alloc)
417 eld->spk_alloc = 0xffff;
418
698544de
WF		 419 /*
420 * expand ELD's speaker allocation mask
421 *
422 * ELD tells the speaker mask in a compact(paired) form,
b83923a3 423 * expand ELD's notions to match the ones used by Audio InfoFrame.
698544de
WF		 424 */
425 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
426 if (eld->spk_alloc & (1 << i))
427 spk_mask |= eld_speaker_allocation_bits[i];
428 }
429
430 /* search for the first working match in the CA table */
431 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
432 if (channels == channel_allocations[i].channels &&
433 (spk_mask & channel_allocations[i].spk_mask) ==
434 channel_allocations[i].spk_mask) {
435 ai->CA = channel_allocations[i].ca_index;
cc02b83c 436 break;
698544de
WF		 437 }
438 }
439
440 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
cc02b83c
WF		 441 snd_printdd(KERN_INFO
442 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
443 ai->CA, channels, buf);
444
445 return ai->CA;
698544de
WF		 446}
447
6797cf2b
WF		 448static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid,
449 struct hdmi_audio_infoframe *ai)
9c8641e8 450{
559059b2
WF		 451 int i;
452
9c8641e8
WF		 453 if (!ai->CA)
454 return;
455
456 /*
457 * TODO: adjust channel mapping if necessary
458 * ALSA sequence is front/surr/clfe/side?
459 */
460
559059b2 461 for (i = 0; i < 8; i++)
6797cf2b 462 snd_hda_codec_write(codec, nid, 0,
559059b2
WF		 463 AC_VERB_SET_HDMI_CHAN_SLOT,
464 (i << 4) | i);
465
6797cf2b 466 hdmi_debug_channel_mapping(codec, nid);
9c8641e8
WF		 467}
468
469
6797cf2b 470static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
91504877
WF		 471 struct snd_pcm_substream *substream)
472{
5457a980 473 struct hdmi_audio_infoframe ai = {
91504877
WF		 474 .type = 0x84,
475 .ver = 0x01,
476 .len = 0x0a,
477 .CC02_CT47 = substream->runtime->channels - 1,
478 };
91504877 479
6797cf2b
WF		 480 hdmi_setup_channel_allocation(codec, nid, &ai);
481 hdmi_setup_channel_mapping(codec, nid, &ai);
698544de 482
6797cf2b
WF		 483 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
484 hdmi_start_infoframe_trans(codec, pin_nid);
91504877
WF		 485}
486
487
488/*
489 * Unsolicited events
490 */
491
492static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
493{
494 int pind = !!(res & AC_UNSOL_RES_PD);
495 int eldv = !!(res & AC_UNSOL_RES_ELDV);
496
03284c8f
WF		 497 printk(KERN_INFO
498 "HDMI hot plug event: Presence_Detect=%d ELD_Valid=%d\n",
499 pind, eldv);
91504877
WF		 500
501 if (pind && eldv) {
502 hdmi_parse_eld(codec);
503 /* TODO: do real things about ELD */
504 }
505}
506
507static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
508{
509 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
510 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
511 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
512
03284c8f
WF		 513 printk(KERN_INFO
514 "HDMI content protection event: SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
515 subtag,
516 cp_state,
517 cp_ready);
91504877 518
03284c8f 519 /* TODO */
91504877
WF		 520 if (cp_state)
521 ;
522 if (cp_ready)
523 ;
524}
525
526
527static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
528{
529 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
530 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
531
532 if (tag != INTEL_HDMI_EVENT_TAG) {
03284c8f 533 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
91504877
WF		 534 return;
535 }
536
537 if (subtag == 0)
538 hdmi_intrinsic_event(codec, res);
539 else
540 hdmi_non_intrinsic_event(codec, res);
541}
542
543/*
544 * Callbacks
545 */
546
547static int intel_hdmi_playback_pcm_open(struct hda_pcm_stream *hinfo,
4e19c58f
WF		 548 struct hda_codec *codec,
549 struct snd_pcm_substream *substream)
91504877
WF		 550{
551 struct intel_hdmi_spec *spec = codec->spec;
552
553 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
554}
555
556static int intel_hdmi_playback_pcm_close(struct hda_pcm_stream *hinfo,
4e19c58f
WF		 557 struct hda_codec *codec,
558 struct snd_pcm_substream *substream)
91504877
WF		 559{
560 struct intel_hdmi_spec *spec = codec->spec;
561
6797cf2b 562 hdmi_stop_infoframe_trans(codec, pin_nid);
91504877
WF		 563
564 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
565}
566
567static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
568 struct hda_codec *codec,
569 unsigned int stream_tag,
570 unsigned int format,
571 struct snd_pcm_substream *substream)
572{
573 struct intel_hdmi_spec *spec = codec->spec;
574
575 snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag,
576 format, substream);
577
6797cf2b 578 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
91504877 579
6797cf2b 580 hdmi_setup_audio_infoframe(codec, cvt_nid, substream);
91504877 581
91504877
WF		 582 return 0;
583}
584
585static struct hda_pcm_stream intel_hdmi_pcm_playback = {
586 .substreams = 1,
587 .channels_min = 2,
588 .channels_max = 8,
91504877 589 .ops = {
b83923a3
WF		 590 .open = intel_hdmi_playback_pcm_open,
591 .close = intel_hdmi_playback_pcm_close,
91504877
WF		 592 .prepare = intel_hdmi_playback_pcm_prepare
593 },
594};
595
596static int intel_hdmi_build_pcms(struct hda_codec *codec)
597{
598 struct intel_hdmi_spec *spec = codec->spec;
599 struct hda_pcm *info = &spec->pcm_rec;
600
601 codec->num_pcms = 1;
602 codec->pcm_info = info;
603
559059b2
WF		 604 /* NID to query formats and rates and setup streams */
605 intel_hdmi_pcm_playback.nid = cvt_nid;
606
91504877
WF		 607 info->name = "INTEL HDMI";
608 info->pcm_type = HDA_PCM_TYPE_HDMI;
609 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = intel_hdmi_pcm_playback;
610
611 return 0;
612}
613
614static int intel_hdmi_build_controls(struct hda_codec *codec)
615{
616 struct intel_hdmi_spec *spec = codec->spec;
617 int err;
618
619 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
620 if (err < 0)
621 return err;
622
623 return 0;
624}
625
626static int intel_hdmi_init(struct hda_codec *codec)
627{
6797cf2b 628 hdmi_enable_output(codec, pin_nid);
91504877 629
559059b2
WF		 630 snd_hda_codec_write(codec, pin_nid, 0,
631 AC_VERB_SET_UNSOLICITED_ENABLE,
632 AC_USRSP_EN | INTEL_HDMI_EVENT_TAG);
91504877
WF		 633 return 0;
634}
635
636static void intel_hdmi_free(struct hda_codec *codec)
637{
f208dba9
TI		 638 struct intel_hdmi_spec *spec = codec->spec;
639
640 snd_hda_eld_proc_free(codec, &spec->sink_eld);
641 kfree(spec);
91504877
WF		 642}
643
644static struct hda_codec_ops intel_hdmi_patch_ops = {
645 .init = intel_hdmi_init,
646 .free = intel_hdmi_free,
647 .build_pcms = intel_hdmi_build_pcms,
648 .build_controls = intel_hdmi_build_controls,
649 .unsol_event = intel_hdmi_unsol_event,
650};
651
559059b2 652static int do_patch_intel_hdmi(struct hda_codec *codec)
91504877
WF		 653{
654 struct intel_hdmi_spec *spec;
655
656 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
657 if (spec == NULL)
658 return -ENOMEM;
659
660 spec->multiout.num_dacs = 0; /* no analog */
661 spec->multiout.max_channels = 8;
559059b2 662 spec->multiout.dig_out_nid = cvt_nid;
91504877
WF		 663
664 codec->spec = spec;
665 codec->patch_ops = intel_hdmi_patch_ops;
666
5b87ebb7 667 snd_hda_eld_proc_new(codec, &spec->sink_eld);
5f1e71b1 668
698544de
WF		 669 init_channel_allocations();
670
91504877
WF		 671 return 0;
672}
673
559059b2
WF		 674static int patch_intel_hdmi(struct hda_codec *codec)
675{
676 cvt_nid = 0x02;
677 pin_nid = 0x03;
678 return do_patch_intel_hdmi(codec);
679}
680
681static int patch_intel_hdmi_ibexpeak(struct hda_codec *codec)
682{
683 cvt_nid = 0x02;
684 pin_nid = 0x04;
685 return do_patch_intel_hdmi(codec);
686}
687
1289e9e8 688static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
74c61133
TI		 689 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
690 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
691 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
692 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
739b47f1 693 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
559059b2 694 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
3a95cb97 695 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
91504877
WF		 696 {} /* terminator */
697};
1289e9e8
TI		 698
699MODULE_ALIAS("snd-hda-codec-id:808629fb");
700MODULE_ALIAS("snd-hda-codec-id:80862801");
701MODULE_ALIAS("snd-hda-codec-id:80862802");
702MODULE_ALIAS("snd-hda-codec-id:80862803");
a57c0eb6 703MODULE_ALIAS("snd-hda-codec-id:80862804");
87a8c370 704MODULE_ALIAS("snd-hda-codec-id:80860054");
1289e9e8
TI		 705MODULE_ALIAS("snd-hda-codec-id:10951392");
706
707MODULE_LICENSE("GPL");
708MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
709
710static struct hda_codec_preset_list intel_list = {
711 .preset = snd_hda_preset_intelhdmi,
712 .owner = THIS_MODULE,
713};
714
715static int __init patch_intelhdmi_init(void)
716{
717 return snd_hda_add_codec_preset(&intel_list);
718}
719
720static void __exit patch_intelhdmi_exit(void)
721{
722 snd_hda_delete_codec_preset(&intel_list);
723}
724
725module_init(patch_intelhdmi_init)
726module_exit(patch_intelhdmi_exit)
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