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intelhdmi - dont power off HDA link
[net-next-2.6.git] / sound / pci / hda / patch_intelhdmi.c
CommitLineData
91504877
WF		 1/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
91504877
WF		 33#include "hda_codec.h"
34#include "hda_local.h"
91504877 35
54a25f87
WF		 36/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
43#define INTEL_HDMI_CVTS 2
44#define INTEL_HDMI_PINS 3
91504877 45
54a25f87
WF		 46static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
47 "INTEL HDMI 0",
48 "INTEL HDMI 1",
49};
91504877 50
91504877 51struct intel_hdmi_spec {
54a25f87
WF		 52 int num_cvts;
53 int num_pins;
54 hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
55 hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
56
57 /*
58 * source connection for each pin
59 */
60 hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
61
62 /*
63 * HDMI sink attached to each pin
64 */
54a25f87
WF		 65 struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
66
67 /*
68 * export one pcm per pipe
69 */
70 struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
91504877
WF		 71};
72
91504877
WF		 73struct hdmi_audio_infoframe {
74 u8 type; /* 0x84 */
75 u8 ver; /* 0x01 */
76 u8 len; /* 0x0a */
77
78 u8 checksum; /* PB0 */
79 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
80 u8 SS01_SF24;
81 u8 CXT04;
82 u8 CA;
83 u8 LFEPBL01_LSV36_DM_INH7;
4e19c58f 84 u8 reserved[5]; /* PB6 - PB10 */
91504877
WF		 85};
86
698544de
WF		 87/*
88 * CEA speaker placement:
89 *
90 * FLH FCH FRH
91 * FLW FL FLC FC FRC FR FRW
92 *
93 * LFE
94 * TC
95 *
96 * RL RLC RC RRC RR
97 *
98 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
99 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
100 */
101enum cea_speaker_placement {
102 FL = (1 << 0), /* Front Left */
103 FC = (1 << 1), /* Front Center */
104 FR = (1 << 2), /* Front Right */
105 FLC = (1 << 3), /* Front Left Center */
106 FRC = (1 << 4), /* Front Right Center */
107 RL = (1 << 5), /* Rear Left */
108 RC = (1 << 6), /* Rear Center */
109 RR = (1 << 7), /* Rear Right */
110 RLC = (1 << 8), /* Rear Left Center */
111 RRC = (1 << 9), /* Rear Right Center */
112 LFE = (1 << 10), /* Low Frequency Effect */
113 FLW = (1 << 11), /* Front Left Wide */
114 FRW = (1 << 12), /* Front Right Wide */
115 FLH = (1 << 13), /* Front Left High */
116 FCH = (1 << 14), /* Front Center High */
117 FRH = (1 << 15), /* Front Right High */
118 TC = (1 << 16), /* Top Center */
119};
120
121/*
122 * ELD SA bits in the CEA Speaker Allocation data block
123 */
124static int eld_speaker_allocation_bits[] = {
125 [0] = FL | FR,
126 [1] = LFE,
127 [2] = FC,
128 [3] = RL | RR,
129 [4] = RC,
130 [5] = FLC | FRC,
131 [6] = RLC | RRC,
132 /* the following are not defined in ELD yet */
133 [7] = FLW | FRW,
134 [8] = FLH | FRH,
135 [9] = TC,
136 [10] = FCH,
137};
138
139struct cea_channel_speaker_allocation {
140 int ca_index;
141 int speakers[8];
142
143 /* derived values, just for convenience */
144 int channels;
145 int spk_mask;
146};
147
b14224bb
WF		 148/*
149 * ALSA sequence is:
150 *
151 * surround40 surround41 surround50 surround51 surround71
152 * ch0 front left = = = =
153 * ch1 front right = = = =
154 * ch2 rear left = = = =
155 * ch3 rear right = = = =
156 * ch4 LFE center center center
157 * ch5 LFE LFE
158 * ch6 side left
159 * ch7 side right
160 *
161 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
162 */
163static int hdmi_channel_mapping[0x32][8] = {
164 /* stereo */
165 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
166 /* 2.1 */
167 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
168 /* Dolby Surround */
169 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
170 /* surround40 */
171 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
172 /* 4ch */
173 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
174 /* surround41 */
175 [0x09] = { 0x00, 0x11, 0x24, 0x34, 0x43, 0xf2, 0xf6, 0xf7 },
176 /* surround50 */
177 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
178 /* surround51 */
179 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
180 /* 7.1 */
181 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
182};
183
698544de
WF		 184/*
185 * This is an ordered list!
186 *
187 * The preceding ones have better chances to be selected by
188 * hdmi_setup_channel_allocation().
189 */
190static struct cea_channel_speaker_allocation channel_allocations[] = {
b14224bb 191/* channel: 7 6 5 4 3 2 1 0 */
698544de
WF		 192{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
193 /* 2.1 */
194{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
4e19c58f 195 /* Dolby Surround */
698544de 196{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
b14224bb
WF		 197 /* surround40 */
198{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
199 /* surround41 */
200{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
201 /* surround50 */
202{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
203 /* surround51 */
204{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
205 /* 6.1 */
206{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
207 /* surround71 */
208{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
209
698544de
WF		 210{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
211{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
212{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
213{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
214{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
698544de
WF		 215{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
216{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
217{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
698544de
WF		 218{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
219{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
220{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
698544de
WF		 221{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
222{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
223{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
224{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
225{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
226{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
227{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
228{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
229{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
230{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
231{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
232{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
233{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
234{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
235{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
236{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
237{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
238{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
239{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
240{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
241{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
242{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
243{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
244{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
245{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
246{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
247{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
248{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
249{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
250{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
251};
252
f424367c
WF		 253/*
254 * HDA/HDMI auto parsing
255 */
256
54a25f87
WF		 257static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
258{
259 int i;
260
261 for (i = 0; nids[i]; i++)
262 if (nids[i] == nid)
263 return i;
264
265 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
266 return -EINVAL;
267}
268
f424367c
WF		 269static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
270{
271 struct intel_hdmi_spec *spec = codec->spec;
272 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
273 int conn_len, curr;
274 int index;
275
276 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
277 snd_printk(KERN_WARNING
278 "HDMI: pin %d wcaps %#x "
279 "does not support connection list\n",
280 pin_nid, get_wcaps(codec, pin_nid));
281 return -EINVAL;
282 }
283
284 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
285 HDA_MAX_CONNECTIONS);
286 if (conn_len > 1)
287 curr = snd_hda_codec_read(codec, pin_nid, 0,
288 AC_VERB_GET_CONNECT_SEL, 0);
289 else
290 curr = 0;
291
292 index = hda_node_index(spec->pin, pin_nid);
293 if (index < 0)
294 return -EINVAL;
295
296 spec->pin_cvt[index] = conn_list[curr];
297
298 return 0;
299}
300
3f54aa50
WF		 301static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
302 struct hdmi_eld *eld)
303{
304 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
305 snd_hdmi_show_eld(eld);
306}
307
308static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
309 struct hdmi_eld *eld)
310{
311 int present = snd_hda_pin_sense(codec, pin_nid);
312
313 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
314 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
315
316 if (present & AC_PINSENSE_ELDV)
317 hdmi_get_show_eld(codec, pin_nid, eld);
318}
319
f424367c
WF		 320static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
321{
322 struct intel_hdmi_spec *spec = codec->spec;
323
324 if (spec->num_pins >= INTEL_HDMI_PINS) {
325 snd_printk(KERN_WARNING
326 "HDMI: no space for pin %d \n", pin_nid);
327 return -EINVAL;
328 }
329
3f54aa50
WF		 330 hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
331
f424367c
WF		 332 spec->pin[spec->num_pins] = pin_nid;
333 spec->num_pins++;
334
335 /*
336 * It is assumed that converter nodes come first in the node list and
337 * hence have been registered and usable now.
338 */
339 return intel_hdmi_read_pin_conn(codec, pin_nid);
340}
341
342static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
343{
344 struct intel_hdmi_spec *spec = codec->spec;
345
346 if (spec->num_cvts >= INTEL_HDMI_CVTS) {
347 snd_printk(KERN_WARNING
348 "HDMI: no space for converter %d \n", nid);
349 return -EINVAL;
350 }
351
352 spec->cvt[spec->num_cvts] = nid;
353 spec->num_cvts++;
354
355 return 0;
356}
357
358static int intel_hdmi_parse_codec(struct hda_codec *codec)
359{
360 hda_nid_t nid;
361 int i, nodes;
362
363 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
364 if (!nid || nodes < 0) {
365 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
366 return -EINVAL;
367 }
368
369 for (i = 0; i < nodes; i++, nid++) {
370 unsigned int caps;
371 unsigned int type;
372
373 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
374 type = get_wcaps_type(caps);
375
376 if (!(caps & AC_WCAP_DIGITAL))
377 continue;
378
379 switch (type) {
380 case AC_WID_AUD_OUT:
381 if (intel_hdmi_add_cvt(codec, nid) < 0)
382 return -EINVAL;
383 break;
384 case AC_WID_PIN:
385 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
728765b3 386 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
f424367c
WF		 387 continue;
388 if (intel_hdmi_add_pin(codec, nid) < 0)
389 return -EINVAL;
390 break;
391 }
392 }
393
0287d970
WF		 394 /*
395 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
396 * can be lost and presence sense verb will become inaccurate if the
397 * HDA link is powered off at hot plug or hw initialization time.
398 */
399#ifdef CONFIG_SND_HDA_POWER_SAVE
400 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
401 AC_PWRST_EPSS))
402 codec->bus->power_keep_link_on = 1;
403#endif
404
f424367c
WF		 405 return 0;
406}
407
91504877
WF		 408/*
409 * HDMI routines
410 */
411
beb0b9cf 412#ifdef BE_PARANOID
6797cf2b 413static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
91504877
WF		 414 int *packet_index, int *byte_index)
415{
416 int val;
417
6797cf2b
WF		 418 val = snd_hda_codec_read(codec, pin_nid, 0,
419 AC_VERB_GET_HDMI_DIP_INDEX, 0);
91504877
WF		 420
421 *packet_index = val >> 5;
422 *byte_index = val & 0x1f;
423}
beb0b9cf 424#endif
91504877 425
6797cf2b 426static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
91504877
WF		 427 int packet_index, int byte_index)
428{
429 int val;
430
431 val = (packet_index << 5) | (byte_index & 0x1f);
432
6797cf2b 433 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
91504877
WF		 434}
435
6797cf2b 436static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
91504877
WF		 437 unsigned char val)
438{
6797cf2b 439 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
91504877
WF		 440}
441
6797cf2b 442static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
91504877 443{
796359d1 444 /* Unmute */
559059b2
WF		 445 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
446 snd_hda_codec_write(codec, pin_nid, 0,
796359d1
WF		 447 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
448 /* Enable pin out */
559059b2
WF		 449 snd_hda_codec_write(codec, pin_nid, 0,
450 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
91504877
WF		 451}
452
606c0cee
WF		 453/*
454 * Enable Audio InfoFrame Transmission
455 */
6797cf2b
WF		 456static void hdmi_start_infoframe_trans(struct hda_codec *codec,
457 hda_nid_t pin_nid)
91504877 458{
559059b2
WF		 459 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
460 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
606c0cee
WF		 461 AC_DIPXMIT_BEST);
462}
91504877 463
606c0cee
WF		 464/*
465 * Disable Audio InfoFrame Transmission
466 */
6797cf2b
WF		 467static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
468 hda_nid_t pin_nid)
606c0cee 469{
559059b2
WF		 470 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
471 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
606c0cee 472 AC_DIPXMIT_DISABLE);
91504877
WF		 473}
474
6797cf2b 475static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
91504877 476{
6797cf2b 477 return 1 + snd_hda_codec_read(codec, nid, 0,
91504877
WF		 478 AC_VERB_GET_CVT_CHAN_COUNT, 0);
479}
480
6797cf2b
WF		 481static void hdmi_set_channel_count(struct hda_codec *codec,
482 hda_nid_t nid, int chs)
91504877 483{
6797cf2b 484 if (chs != hdmi_get_channel_count(codec, nid))
81bf31e2
WF		 485 snd_hda_codec_write(codec, nid, 0,
486 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
91504877
WF		 487}
488
1ffc69a6
WF		 489static void hdmi_debug_channel_mapping(struct hda_codec *codec,
490 hda_nid_t pin_nid)
91504877
WF		 491{
492#ifdef CONFIG_SND_DEBUG_VERBOSE
493 int i;
494 int slot;
495
496 for (i = 0; i < 8; i++) {
1ffc69a6 497 slot = snd_hda_codec_read(codec, pin_nid, 0,
91504877 498 AC_VERB_GET_HDMI_CHAN_SLOT, i);
03284c8f 499 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
1e7c10fe 500 slot >> 4, slot & 0xf);
91504877
WF		 501 }
502#endif
503}
504
91504877
WF		 505
506/*
4e19c58f 507 * Audio InfoFrame routines
91504877
WF		 508 */
509
6797cf2b 510static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
91504877
WF		 511{
512#ifdef CONFIG_SND_DEBUG_VERBOSE
513 int i;
514 int size;
515
559059b2 516 size = snd_hdmi_get_eld_size(codec, pin_nid);
03284c8f 517 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
91504877
WF		 518
519 for (i = 0; i < 8; i++) {
559059b2 520 size = snd_hda_codec_read(codec, pin_nid, 0,
91504877 521 AC_VERB_GET_HDMI_DIP_SIZE, i);
03284c8f 522 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
91504877
WF		 523 }
524#endif
525}
526
6797cf2b 527static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
91504877
WF		 528{
529#ifdef BE_PARANOID
530 int i, j;
531 int size;
532 int pi, bi;
533 for (i = 0; i < 8; i++) {
559059b2 534 size = snd_hda_codec_read(codec, pin_nid, 0,
91504877
WF		 535 AC_VERB_GET_HDMI_DIP_SIZE, i);
536 if (size == 0)
537 continue;
538
559059b2 539 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
91504877 540 for (j = 1; j < 1000; j++) {
559059b2
WF		 541 hdmi_write_dip_byte(codec, pin_nid, 0x0);
542 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
91504877
WF		 543 if (pi != i)
544 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
545 bi, pi, i);
546 if (bi == 0) /* byte index wrapped around */
547 break;
548 }
549 snd_printd(KERN_INFO
03284c8f
WF		 550 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
551 i, size, j);
91504877
WF		 552 }
553#endif
554}
555
978be6d7
WF		 556static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
557{
558 u8 *bytes = (u8 *)ai;
559 u8 sum = 0;
560 int i;
561
562 ai->checksum = 0;
563
564 for (i = 0; i < sizeof(*ai); i++)
565 sum += bytes[i];
566
567 ai->checksum = - sum;
568}
569
5457a980 570static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
6797cf2b
WF		 571 hda_nid_t pin_nid,
572 struct hdmi_audio_infoframe *ai)
5457a980 573{
978be6d7 574 u8 *bytes = (u8 *)ai;
5457a980
WF		 575 int i;
576
6797cf2b
WF		 577 hdmi_debug_dip_size(codec, pin_nid);
578 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
5457a980 579
978be6d7 580 hdmi_checksum_audio_infoframe(ai);
9a957a24 581
559059b2 582 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
6f539a98 583 for (i = 0; i < sizeof(*ai); i++)
978be6d7 584 hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
5457a980
WF		 585}
586
698544de
WF		 587/*
588 * Compute derived values in channel_allocations[].
589 */
590static void init_channel_allocations(void)
591{
592 int i, j;
593 struct cea_channel_speaker_allocation *p;
594
595 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
596 p = channel_allocations + i;
597 p->channels = 0;
598 p->spk_mask = 0;
599 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
600 if (p->speakers[j]) {
601 p->channels++;
602 p->spk_mask |= p->speakers[j];
603 }
604 }
605}
606
607/*
608 * The transformation takes two steps:
609 *
610 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
611 * spk_mask => (channel_allocations[]) => ai->CA
612 *
613 * TODO: it could select the wrong CA from multiple candidates.
614*/
6797cf2b 615static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
698544de
WF		 616 struct hdmi_audio_infoframe *ai)
617{
618 struct intel_hdmi_spec *spec = codec->spec;
54a25f87 619 struct hdmi_eld *eld;
698544de
WF		 620 int i;
621 int spk_mask = 0;
622 int channels = 1 + (ai->CC02_CT47 & 0x7);
623 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
624
625 /*
626 * CA defaults to 0 for basic stereo audio
627 */
698544de
WF		 628 if (channels <= 2)
629 return 0;
630
54a25f87
WF		 631 i = hda_node_index(spec->pin_cvt, nid);
632 if (i < 0)
633 return 0;
634 eld = &spec->sink_eld[i];
635
a1667e4e
WF		 636 /*
637 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
638 * in console or for audio devices. Assume the highest speakers
639 * configuration, to _not_ prohibit multi-channel audio playback.
640 */
641 if (!eld->spk_alloc)
642 eld->spk_alloc = 0xffff;
643
698544de
WF		 644 /*
645 * expand ELD's speaker allocation mask
646 *
647 * ELD tells the speaker mask in a compact(paired) form,
b83923a3 648 * expand ELD's notions to match the ones used by Audio InfoFrame.
698544de
WF		 649 */
650 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
651 if (eld->spk_alloc & (1 << i))
652 spk_mask |= eld_speaker_allocation_bits[i];
653 }
654
655 /* search for the first working match in the CA table */
656 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
657 if (channels == channel_allocations[i].channels &&
658 (spk_mask & channel_allocations[i].spk_mask) ==
659 channel_allocations[i].spk_mask) {
660 ai->CA = channel_allocations[i].ca_index;
cc02b83c 661 break;
698544de
WF		 662 }
663 }
664
665 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
cc02b83c
WF		 666 snd_printdd(KERN_INFO
667 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
668 ai->CA, channels, buf);
669
670 return ai->CA;
698544de
WF		 671}
672
1ffc69a6
WF		 673static void hdmi_setup_channel_mapping(struct hda_codec *codec,
674 hda_nid_t pin_nid,
6797cf2b 675 struct hdmi_audio_infoframe *ai)
9c8641e8 676{
559059b2 677 int i;
b14224bb
WF		 678 int ca = ai->CA;
679 int err;
680
681 if (hdmi_channel_mapping[ca][1] == 0) {
682 for (i = 0; i < channel_allocations[ca].channels; i++)
683 hdmi_channel_mapping[ca][i] = i | (i << 4);
684 for (; i < 8; i++)
685 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
686 }
559059b2 687
b14224bb
WF		 688 for (i = 0; i < 8; i++) {
689 err = snd_hda_codec_write(codec, pin_nid, 0,
690 AC_VERB_SET_HDMI_CHAN_SLOT,
691 hdmi_channel_mapping[ca][i]);
692 if (err) {
693 snd_printdd(KERN_INFO "HDMI: channel mapping failed\n");
694 break;
695 }
696 }
559059b2 697
1ffc69a6 698 hdmi_debug_channel_mapping(codec, pin_nid);
9c8641e8
WF		 699}
700
848de598
WF		 701static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
702 struct hdmi_audio_infoframe *ai)
703{
704 u8 *bytes = (u8 *)ai;
705 u8 val;
706 int i;
707
708 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
709 != AC_DIPXMIT_BEST)
710 return false;
711
712 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
713 for (i = 0; i < sizeof(*ai); i++) {
714 val = snd_hda_codec_read(codec, pin_nid, 0,
715 AC_VERB_GET_HDMI_DIP_DATA, 0);
716 if (val != bytes[i])
717 return false;
718 }
719
720 return true;
721}
9c8641e8 722
6797cf2b 723static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
91504877
WF		 724 struct snd_pcm_substream *substream)
725{
54a25f87
WF		 726 struct intel_hdmi_spec *spec = codec->spec;
727 hda_nid_t pin_nid;
728 int i;
5457a980 729 struct hdmi_audio_infoframe ai = {
91504877
WF		 730 .type = 0x84,
731 .ver = 0x01,
732 .len = 0x0a,
733 .CC02_CT47 = substream->runtime->channels - 1,
734 };
91504877 735
6797cf2b 736 hdmi_setup_channel_allocation(codec, nid, &ai);
698544de 737
54a25f87
WF		 738 for (i = 0; i < spec->num_pins; i++) {
739 if (spec->pin_cvt[i] != nid)
740 continue;
23ccc2bd 741 if (!spec->sink_eld[i].monitor_present)
54a25f87
WF		 742 continue;
743
744 pin_nid = spec->pin[i];
848de598 745 if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
1ffc69a6 746 hdmi_setup_channel_mapping(codec, pin_nid, &ai);
848de598
WF		 747 hdmi_stop_infoframe_trans(codec, pin_nid);
748 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
749 hdmi_start_infoframe_trans(codec, pin_nid);
750 }
54a25f87 751 }
91504877
WF		 752}
753
754
755/*
756 * Unsolicited events
757 */
758
759static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
760{
54a25f87
WF		 761 struct intel_hdmi_spec *spec = codec->spec;
762 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
91504877
WF		 763 int pind = !!(res & AC_UNSOL_RES_PD);
764 int eldv = !!(res & AC_UNSOL_RES_ELDV);
54a25f87 765 int index;
91504877 766
03284c8f 767 printk(KERN_INFO
54a25f87
WF		 768 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
769 tag, pind, eldv);
770
771 index = hda_node_index(spec->pin, tag);
772 if (index < 0)
773 return;
774
23ccc2bd
WF		 775 spec->sink_eld[index].monitor_present = pind;
776 spec->sink_eld[index].eld_valid = eldv;
91504877
WF		 777
778 if (pind && eldv) {
3f54aa50 779 hdmi_get_show_eld(codec, spec->pin[index], &spec->sink_eld[index]);
91504877
WF		 780 /* TODO: do real things about ELD */
781 }
782}
783
784static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
785{
54a25f87 786 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
91504877
WF		 787 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
788 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
789 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
790
03284c8f 791 printk(KERN_INFO
54a25f87
WF		 792 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
793 tag,
03284c8f
WF		 794 subtag,
795 cp_state,
796 cp_ready);
91504877 797
03284c8f 798 /* TODO */
91504877
WF		 799 if (cp_state)
800 ;
801 if (cp_ready)
802 ;
803}
804
805
806static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
807{
54a25f87 808 struct intel_hdmi_spec *spec = codec->spec;
91504877
WF		 809 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
810 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
811
54a25f87 812 if (hda_node_index(spec->pin, tag) < 0) {
03284c8f 813 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
91504877
WF		 814 return;
815 }
816
817 if (subtag == 0)
818 hdmi_intrinsic_event(codec, res);
819 else
820 hdmi_non_intrinsic_event(codec, res);
821}
822
823/*
824 * Callbacks
825 */
826
5779191e
WF		 827static void hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
828 u32 stream_tag, int format)
829{
830 int tag;
831 int fmt;
832
833 tag = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0) >> 4;
834 fmt = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_STREAM_FORMAT, 0);
835
836 snd_printdd("hdmi_setup_stream: "
837 "NID=0x%x, %sstream=0x%x, %sformat=0x%x\n",
838 nid,
839 tag == stream_tag ? "" : "new-",
840 stream_tag,
841 fmt == format ? "" : "new-",
842 format);
843
844 if (tag != stream_tag)
845 snd_hda_codec_write(codec, nid, 0,
846 AC_VERB_SET_CHANNEL_STREAMID, stream_tag << 4);
847 if (fmt != format)
848 snd_hda_codec_write(codec, nid, 0,
849 AC_VERB_SET_STREAM_FORMAT, format);
850}
851
ddb8152b 852static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
70ca35fb 853 struct hda_codec *codec,
ddb8152b
WF		 854 unsigned int stream_tag,
855 unsigned int format,
70ca35fb 856 struct snd_pcm_substream *substream)
91504877 857{
54a25f87 858 hdmi_set_channel_count(codec, hinfo->nid,
ddb8152b 859 substream->runtime->channels);
91504877 860
54a25f87 861 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
91504877 862
5779191e 863 hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
7bedb011 864 return 0;
91504877
WF		 865}
866
ddb8152b 867static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
91504877 868 struct hda_codec *codec,
91504877
WF		 869 struct snd_pcm_substream *substream)
870{
91504877
WF		 871 return 0;
872}
873
874static struct hda_pcm_stream intel_hdmi_pcm_playback = {
875 .substreams = 1,
876 .channels_min = 2,
91504877 877 .ops = {
70ca35fb
WF		 878 .prepare = intel_hdmi_playback_pcm_prepare,
879 .cleanup = intel_hdmi_playback_pcm_cleanup,
91504877
WF		 880 },
881};
882
883static int intel_hdmi_build_pcms(struct hda_codec *codec)
884{
885 struct intel_hdmi_spec *spec = codec->spec;
54a25f87
WF		 886 struct hda_pcm *info = spec->pcm_rec;
887 int i;
91504877 888
54a25f87 889 codec->num_pcms = spec->num_cvts;
91504877
WF		 890 codec->pcm_info = info;
891
54a25f87 892 for (i = 0; i < codec->num_pcms; i++, info++) {
69fb3468
WF		 893 unsigned int chans;
894
895 chans = get_wcaps(codec, spec->cvt[i]);
896 chans = get_wcaps_channels(chans);
897
54a25f87
WF		 898 info->name = intel_hdmi_pcm_names[i];
899 info->pcm_type = HDA_PCM_TYPE_HDMI;
900 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
901 intel_hdmi_pcm_playback;
902 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
69fb3468 903 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
54a25f87 904 }
91504877
WF		 905
906 return 0;
907}
908
909static int intel_hdmi_build_controls(struct hda_codec *codec)
910{
911 struct intel_hdmi_spec *spec = codec->spec;
912 int err;
54a25f87 913 int i;
91504877 914
54a25f87
WF		 915 for (i = 0; i < codec->num_pcms; i++) {
916 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
917 if (err < 0)
918 return err;
919 }
91504877
WF		 920
921 return 0;
922}
923
924static int intel_hdmi_init(struct hda_codec *codec)
925{
54a25f87
WF		 926 struct intel_hdmi_spec *spec = codec->spec;
927 int i;
91504877 928
54a25f87
WF		 929 for (i = 0; spec->pin[i]; i++) {
930 hdmi_enable_output(codec, spec->pin[i]);
931 snd_hda_codec_write(codec, spec->pin[i], 0,
932 AC_VERB_SET_UNSOLICITED_ENABLE,
933 AC_USRSP_EN | spec->pin[i]);
934 }
91504877
WF		 935 return 0;
936}
937
938static void intel_hdmi_free(struct hda_codec *codec)
939{
f208dba9 940 struct intel_hdmi_spec *spec = codec->spec;
54a25f87
WF		 941 int i;
942
943 for (i = 0; i < spec->num_pins; i++)
944 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
f208dba9 945
f208dba9 946 kfree(spec);
91504877
WF		 947}
948
949static struct hda_codec_ops intel_hdmi_patch_ops = {
950 .init = intel_hdmi_init,
951 .free = intel_hdmi_free,
952 .build_pcms = intel_hdmi_build_pcms,
953 .build_controls = intel_hdmi_build_controls,
954 .unsol_event = intel_hdmi_unsol_event,
955};
956
fd080b2d 957static int patch_intel_hdmi(struct hda_codec *codec)
91504877
WF		 958{
959 struct intel_hdmi_spec *spec;
54a25f87 960 int i;
91504877
WF		 961
962 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
963 if (spec == NULL)
964 return -ENOMEM;
965
91504877 966 codec->spec = spec;
f424367c
WF		 967 if (intel_hdmi_parse_codec(codec) < 0) {
968 codec->spec = NULL;
969 kfree(spec);
970 return -EINVAL;
971 }
91504877
WF		 972 codec->patch_ops = intel_hdmi_patch_ops;
973
54a25f87
WF		 974 for (i = 0; i < spec->num_pins; i++)
975 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
5f1e71b1 976
698544de
WF		 977 init_channel_allocations();
978
91504877
WF		 979 return 0;
980}
981
1289e9e8 982static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
74c61133
TI		 983 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
984 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
985 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
986 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
fd080b2d
WF		 987 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
988 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
3a95cb97 989 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
91504877
WF		 990 {} /* terminator */
991};
1289e9e8
TI		 992
993MODULE_ALIAS("snd-hda-codec-id:808629fb");
994MODULE_ALIAS("snd-hda-codec-id:80862801");
995MODULE_ALIAS("snd-hda-codec-id:80862802");
996MODULE_ALIAS("snd-hda-codec-id:80862803");
a57c0eb6 997MODULE_ALIAS("snd-hda-codec-id:80862804");
87a8c370 998MODULE_ALIAS("snd-hda-codec-id:80860054");
1289e9e8
TI		 999MODULE_ALIAS("snd-hda-codec-id:10951392");
1000
1001MODULE_LICENSE("GPL");
1002MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
1003
1004static struct hda_codec_preset_list intel_list = {
1005 .preset = snd_hda_preset_intelhdmi,
1006 .owner = THIS_MODULE,
1007};
1008
1009static int __init patch_intelhdmi_init(void)
1010{
1011 return snd_hda_add_codec_preset(&intel_list);
1012}
1013
1014static void __exit patch_intelhdmi_exit(void)
1015{
1016 snd_hda_delete_codec_preset(&intel_list);
1017}
1018
1019module_init(patch_intelhdmi_init)
1020module_exit(patch_intelhdmi_exit)
Clone of davem's net-next-2.6 tree