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[ALSA] Changed Jaroslav Kysela's e-mail from perex@suse.cz to perex@perex.cz
[net-next-2.6.git] / sound / pci / es1938.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
50#include <sound/driver.h>
51#include <linux/init.h>
52#include <linux/interrupt.h>
53#include <linux/pci.h>
54#include <linux/slab.h>
55#include <linux/gameport.h>
56#include <linux/moduleparam.h>
57#include <linux/delay.h>
910638ae 58#include <linux/dma-mapping.h>
1da177e4
LT		 59#include <sound/core.h>
60#include <sound/control.h>
61#include <sound/pcm.h>
62#include <sound/opl3.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
0b593972 65#include <sound/tlv.h>
1da177e4
LT		 66
67#include <asm/io.h>
68
69MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
70MODULE_DESCRIPTION("ESS Solo-1");
71MODULE_LICENSE("GPL");
72MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
73 "{ESS,ES1946},"
74 "{ESS,ES1969},"
75 "{TerraTec,128i PCI}}");
76
77#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
78#define SUPPORT_JOYSTICK 1
79#endif
80
1da177e4
LT		 81static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
82static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
83static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
84
85module_param_array(index, int, NULL, 0444);
86MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
87module_param_array(id, charp, NULL, 0444);
88MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
89module_param_array(enable, bool, NULL, 0444);
90MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
91
92#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
93
94#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
95
96#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
97
98#define SL_PCI_LEGACYCONTROL 0x40
99#define SL_PCI_CONFIG 0x50
100#define SL_PCI_DDMACONTROL 0x60
101
102#define ESSIO_REG_AUDIO2DMAADDR 0
103#define ESSIO_REG_AUDIO2DMACOUNT 4
104#define ESSIO_REG_AUDIO2MODE 6
105#define ESSIO_REG_IRQCONTROL 7
106
107#define ESSDM_REG_DMAADDR 0x00
108#define ESSDM_REG_DMACOUNT 0x04
109#define ESSDM_REG_DMACOMMAND 0x08
110#define ESSDM_REG_DMASTATUS 0x08
111#define ESSDM_REG_DMAMODE 0x0b
112#define ESSDM_REG_DMACLEAR 0x0d
113#define ESSDM_REG_DMAMASK 0x0f
114
115#define ESSSB_REG_FMLOWADDR 0x00
116#define ESSSB_REG_FMHIGHADDR 0x02
117#define ESSSB_REG_MIXERADDR 0x04
118#define ESSSB_REG_MIXERDATA 0x05
119
120#define ESSSB_IREG_AUDIO1 0x14
121#define ESSSB_IREG_MICMIX 0x1a
122#define ESSSB_IREG_RECSRC 0x1c
123#define ESSSB_IREG_MASTER 0x32
124#define ESSSB_IREG_FM 0x36
125#define ESSSB_IREG_AUXACD 0x38
126#define ESSSB_IREG_AUXB 0x3a
127#define ESSSB_IREG_PCSPEAKER 0x3c
128#define ESSSB_IREG_LINE 0x3e
129#define ESSSB_IREG_SPATCONTROL 0x50
130#define ESSSB_IREG_SPATLEVEL 0x52
131#define ESSSB_IREG_MASTER_LEFT 0x60
132#define ESSSB_IREG_MASTER_RIGHT 0x62
133#define ESSSB_IREG_MPU401CONTROL 0x64
134#define ESSSB_IREG_MICMIXRECORD 0x68
135#define ESSSB_IREG_AUDIO2RECORD 0x69
136#define ESSSB_IREG_AUXACDRECORD 0x6a
137#define ESSSB_IREG_FMRECORD 0x6b
138#define ESSSB_IREG_AUXBRECORD 0x6c
139#define ESSSB_IREG_MONO 0x6d
140#define ESSSB_IREG_LINERECORD 0x6e
141#define ESSSB_IREG_MONORECORD 0x6f
142#define ESSSB_IREG_AUDIO2SAMPLE 0x70
143#define ESSSB_IREG_AUDIO2MODE 0x71
144#define ESSSB_IREG_AUDIO2FILTER 0x72
145#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
146#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
147#define ESSSB_IREG_AUDIO2CONTROL1 0x78
148#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
149#define ESSSB_IREG_AUDIO2 0x7c
150
151#define ESSSB_REG_RESET 0x06
152
153#define ESSSB_REG_READDATA 0x0a
154#define ESSSB_REG_WRITEDATA 0x0c
155#define ESSSB_REG_READSTATUS 0x0c
156
157#define ESSSB_REG_STATUS 0x0e
158
159#define ESS_CMD_EXTSAMPLERATE 0xa1
160#define ESS_CMD_FILTERDIV 0xa2
161#define ESS_CMD_DMACNTRELOADL 0xa4
162#define ESS_CMD_DMACNTRELOADH 0xa5
163#define ESS_CMD_ANALOGCONTROL 0xa8
164#define ESS_CMD_IRQCONTROL 0xb1
165#define ESS_CMD_DRQCONTROL 0xb2
166#define ESS_CMD_RECLEVEL 0xb4
167#define ESS_CMD_SETFORMAT 0xb6
168#define ESS_CMD_SETFORMAT2 0xb7
169#define ESS_CMD_DMACONTROL 0xb8
170#define ESS_CMD_DMATYPE 0xb9
171#define ESS_CMD_OFFSETLEFT 0xba
172#define ESS_CMD_OFFSETRIGHT 0xbb
173#define ESS_CMD_READREG 0xc0
174#define ESS_CMD_ENABLEEXT 0xc6
175#define ESS_CMD_PAUSEDMA 0xd0
176#define ESS_CMD_ENABLEAUDIO1 0xd1
177#define ESS_CMD_STOPAUDIO1 0xd3
178#define ESS_CMD_AUDIO1STATUS 0xd8
179#define ESS_CMD_CONTDMA 0xd4
180#define ESS_CMD_TESTIRQ 0xf2
181
182#define ESS_RECSRC_MIC 0
183#define ESS_RECSRC_AUXACD 2
184#define ESS_RECSRC_AUXB 5
185#define ESS_RECSRC_LINE 6
186#define ESS_RECSRC_NONE 7
187
188#define DAC1 0x01
189#define ADC1 0x02
190#define DAC2 0x04
191
192/*
193
194 */
195
1da177e4
LT		 196#define SAVED_REG_SIZE 32 /* max. number of registers to save */
197
e571f594 198struct es1938 {
1da177e4
LT		 199 int irq;
200
201 unsigned long io_port;
202 unsigned long sb_port;
203 unsigned long vc_port;
204 unsigned long mpu_port;
205 unsigned long game_port;
206 unsigned long ddma_port;
207
208 unsigned char irqmask;
209 unsigned char revision;
210
e571f594
TI		 211 struct snd_kcontrol *hw_volume;
212 struct snd_kcontrol *hw_switch;
213 struct snd_kcontrol *master_volume;
214 struct snd_kcontrol *master_switch;
1da177e4
LT		 215
216 struct pci_dev *pci;
e571f594
TI		 217 struct snd_card *card;
218 struct snd_pcm *pcm;
219 struct snd_pcm_substream *capture_substream;
220 struct snd_pcm_substream *playback1_substream;
221 struct snd_pcm_substream *playback2_substream;
222 struct snd_rawmidi *rmidi;
1da177e4
LT		 223
224 unsigned int dma1_size;
225 unsigned int dma2_size;
226 unsigned int dma1_start;
227 unsigned int dma2_start;
228 unsigned int dma1_shift;
229 unsigned int dma2_shift;
230 unsigned int active;
231
232 spinlock_t reg_lock;
233 spinlock_t mixer_lock;
e571f594 234 struct snd_info_entry *proc_entry;
1da177e4
LT		 235
236#ifdef SUPPORT_JOYSTICK
237 struct gameport *gameport;
238#endif
239#ifdef CONFIG_PM
240 unsigned char saved_regs[SAVED_REG_SIZE];
241#endif
242};
243
7d12e780 244static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 245
f40b6890 246static struct pci_device_id snd_es1938_ids[] = {
1da177e4
LT		 247 { 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */
248 { 0, }
249};
250
251MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
252
253#define RESET_LOOP_TIMEOUT 0x10000
254#define WRITE_LOOP_TIMEOUT 0x10000
255#define GET_LOOP_TIMEOUT 0x01000
256
257#undef REG_DEBUG
258/* -----------------------------------------------------------------
259 * Write to a mixer register
260 * -----------------------------------------------------------------*/
e571f594 261static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 262{
263 unsigned long flags;
264 spin_lock_irqsave(&chip->mixer_lock, flags);
265 outb(reg, SLSB_REG(chip, MIXERADDR));
266 outb(val, SLSB_REG(chip, MIXERDATA));
267 spin_unlock_irqrestore(&chip->mixer_lock, flags);
268#ifdef REG_DEBUG
99b359ba 269 snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 270#endif
271}
272
273/* -----------------------------------------------------------------
274 * Read from a mixer register
275 * -----------------------------------------------------------------*/
e571f594 276static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 277{
278 int data;
279 unsigned long flags;
280 spin_lock_irqsave(&chip->mixer_lock, flags);
281 outb(reg, SLSB_REG(chip, MIXERADDR));
282 data = inb(SLSB_REG(chip, MIXERDATA));
283 spin_unlock_irqrestore(&chip->mixer_lock, flags);
284#ifdef REG_DEBUG
99b359ba 285 snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 286#endif
287 return data;
288}
289
290/* -----------------------------------------------------------------
291 * Write to some bits of a mixer register (return old value)
292 * -----------------------------------------------------------------*/
e571f594
TI		 293static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
294 unsigned char mask, unsigned char val)
1da177e4
LT		 295{
296 unsigned long flags;
297 unsigned char old, new, oval;
298 spin_lock_irqsave(&chip->mixer_lock, flags);
299 outb(reg, SLSB_REG(chip, MIXERADDR));
300 old = inb(SLSB_REG(chip, MIXERDATA));
301 oval = old & mask;
302 if (val != oval) {
303 new = (old & ~mask) | (val & mask);
304 outb(new, SLSB_REG(chip, MIXERDATA));
305#ifdef REG_DEBUG
99b359ba
TI		 306 snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
307 reg, old, new);
1da177e4
LT		 308#endif
309 }
310 spin_unlock_irqrestore(&chip->mixer_lock, flags);
311 return oval;
312}
313
314/* -----------------------------------------------------------------
315 * Write command to Controller Registers
316 * -----------------------------------------------------------------*/
e571f594 317static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 318{
319 int i;
320 unsigned char v;
321 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
322 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
323 outb(cmd, SLSB_REG(chip, WRITEDATA));
324 return;
325 }
326 }
99b359ba 327 printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 328}
329
330/* -----------------------------------------------------------------
331 * Read the Read Data Buffer
332 * -----------------------------------------------------------------*/
e571f594 333static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 334{
335 int i;
336 unsigned char v;
337 for (i = GET_LOOP_TIMEOUT; i; i--)
338 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
339 return inb(SLSB_REG(chip, READDATA));
99b359ba 340 snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 341 return -ENODEV;
342}
343
344/* -----------------------------------------------------------------
345 * Write value cmd register
346 * -----------------------------------------------------------------*/
e571f594 347static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 348{
349 unsigned long flags;
350 spin_lock_irqsave(&chip->reg_lock, flags);
351 snd_es1938_write_cmd(chip, reg);
352 snd_es1938_write_cmd(chip, val);
353 spin_unlock_irqrestore(&chip->reg_lock, flags);
354#ifdef REG_DEBUG
99b359ba 355 snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 356#endif
357}
358
359/* -----------------------------------------------------------------
360 * Read data from cmd register and return it
361 * -----------------------------------------------------------------*/
e571f594 362static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 363{
364 unsigned char val;
365 unsigned long flags;
366 spin_lock_irqsave(&chip->reg_lock, flags);
367 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
368 snd_es1938_write_cmd(chip, reg);
369 val = snd_es1938_get_byte(chip);
370 spin_unlock_irqrestore(&chip->reg_lock, flags);
371#ifdef REG_DEBUG
99b359ba 372 snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 373#endif
374 return val;
375}
376
377/* -----------------------------------------------------------------
378 * Write data to cmd register and return old value
379 * -----------------------------------------------------------------*/
e571f594
TI		 380static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
381 unsigned char val)
1da177e4
LT		 382{
383 unsigned long flags;
384 unsigned char old, new, oval;
385 spin_lock_irqsave(&chip->reg_lock, flags);
386 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
387 snd_es1938_write_cmd(chip, reg);
388 old = snd_es1938_get_byte(chip);
389 oval = old & mask;
390 if (val != oval) {
391 snd_es1938_write_cmd(chip, reg);
392 new = (old & ~mask) | (val & mask);
393 snd_es1938_write_cmd(chip, new);
394#ifdef REG_DEBUG
99b359ba
TI		 395 snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n",
396 reg, old, new);
1da177e4
LT		 397#endif
398 }
399 spin_unlock_irqrestore(&chip->reg_lock, flags);
400 return oval;
401}
402
403/* --------------------------------------------------------------------
404 * Reset the chip
405 * --------------------------------------------------------------------*/
e571f594 406static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 407{
408 int i;
409
410 outb(3, SLSB_REG(chip, RESET));
411 inb(SLSB_REG(chip, RESET));
412 outb(0, SLSB_REG(chip, RESET));
413 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
414 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
415 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
416 goto __next;
417 }
418 }
99b359ba 419 snd_printk(KERN_ERR "ESS Solo-1 reset failed\n");
1da177e4
LT		 420
421 __next:
422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
423
424 /* Demand transfer DMA: 4 bytes per DMA request */
425 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
426
427 /* Change behaviour of register A1
428 4x oversampling
429 2nd channel DAC asynchronous */
430 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
431 /* enable/select DMA channel and IRQ channel */
432 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
433 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
434 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
435 /* Set spatializer parameters to recommended values */
436 snd_es1938_mixer_write(chip, 0x54, 0x8f);
437 snd_es1938_mixer_write(chip, 0x56, 0x95);
438 snd_es1938_mixer_write(chip, 0x58, 0x94);
439 snd_es1938_mixer_write(chip, 0x5a, 0x80);
440}
441
442/* --------------------------------------------------------------------
443 * Reset the FIFOs
444 * --------------------------------------------------------------------*/
e571f594 445static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 446{
447 outb(2, SLSB_REG(chip, RESET));
448 outb(0, SLSB_REG(chip, RESET));
449}
450
e571f594 451static struct snd_ratnum clocks[2] = {
1da177e4
LT		 452 {
453 .num = 793800,
454 .den_min = 1,
455 .den_max = 128,
456 .den_step = 1,
457 },
458 {
459 .num = 768000,
460 .den_min = 1,
461 .den_max = 128,
462 .den_step = 1,
463 }
464};
465
e571f594 466static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 467 .nrats = 2,
468 .rats = clocks,
469};
470
471
e571f594
TI		 472static void snd_es1938_rate_set(struct es1938 *chip,
473 struct snd_pcm_substream *substream,
1da177e4
LT		 474 int mode)
475{
476 unsigned int bits, div0;
e571f594 477 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 478 if (runtime->rate_num == clocks[0].num)
479 bits = 128 - runtime->rate_den;
480 else
481 bits = 256 - runtime->rate_den;
482
483 /* set filter register */
484 div0 = 256 - 7160000*20/(8*82*runtime->rate);
485
486 if (mode == DAC2) {
487 snd_es1938_mixer_write(chip, 0x70, bits);
488 snd_es1938_mixer_write(chip, 0x72, div0);
489 } else {
490 snd_es1938_write(chip, 0xA1, bits);
491 snd_es1938_write(chip, 0xA2, div0);
492 }
493}
494
495/* --------------------------------------------------------------------
496 * Configure Solo1 builtin DMA Controller
497 * --------------------------------------------------------------------*/
498
e571f594 499static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 500{
501 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
502 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
503 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
504 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
505}
506
e571f594 507static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 508{
509 /* Enable DMA controller */
510 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
511 /* 1. Master reset */
512 outb(0, SLDM_REG(chip, DMACLEAR));
513 /* 2. Mask DMA */
514 outb(1, SLDM_REG(chip, DMAMASK));
515 outb(0x18, SLDM_REG(chip, DMAMODE));
516 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
517 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
518 /* 3. Unmask DMA */
519 outb(0, SLDM_REG(chip, DMAMASK));
520}
521
e571f594 522static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 523{
524 /* Enable DMA controller */
525 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
526 /* 1. Master reset */
527 outb(0, SLDM_REG(chip, DMACLEAR));
528 /* 2. Mask DMA */
529 outb(1, SLDM_REG(chip, DMAMASK));
530 outb(0x14, SLDM_REG(chip, DMAMODE));
531 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
532 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
533 /* 3. Unmask DMA */
534 outb(0, SLDM_REG(chip, DMAMASK));
535}
536
537/* ----------------------------------------------------------------------
538 *
539 * *** PCM part ***
540 */
541
e571f594 542static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 543 int cmd)
544{
e571f594 545 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 546 int val;
547 switch (cmd) {
548 case SNDRV_PCM_TRIGGER_START:
93b9f426 549 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 550 val = 0x0f;
551 chip->active |= ADC1;
552 break;
553 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 554 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 555 val = 0x00;
556 chip->active &= ~ADC1;
557 break;
558 default:
559 return -EINVAL;
560 }
561 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
562 return 0;
563}
564
e571f594 565static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 566 int cmd)
567{
e571f594 568 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 569 switch (cmd) {
570 case SNDRV_PCM_TRIGGER_START:
93b9f426 571 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 572 /* According to the documentation this should be:
573 0x13 but that value may randomly swap stereo channels */
574 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
575 udelay(10);
576 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
577 /* This two stage init gives the FIFO -> DAC connection time to
578 * settle before first data from DMA flows in. This should ensure
579 * no swapping of stereo channels. Report a bug if otherwise :-) */
580 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
581 chip->active |= DAC2;
582 break;
583 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 584 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 585 outb(0, SLIO_REG(chip, AUDIO2MODE));
586 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
587 chip->active &= ~DAC2;
588 break;
589 default:
590 return -EINVAL;
591 }
592 return 0;
593}
594
e571f594 595static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 596 int cmd)
597{
e571f594 598 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 599 int val;
600 switch (cmd) {
601 case SNDRV_PCM_TRIGGER_START:
93b9f426 602 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 603 val = 5;
604 chip->active |= DAC1;
605 break;
606 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 607 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 608 val = 0;
609 chip->active &= ~DAC1;
610 break;
611 default:
612 return -EINVAL;
613 }
614 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
615 return 0;
616}
617
e571f594 618static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 619 int cmd)
620{
621 switch (substream->number) {
622 case 0:
623 return snd_es1938_playback1_trigger(substream, cmd);
624 case 1:
625 return snd_es1938_playback2_trigger(substream, cmd);
626 }
627 snd_BUG();
628 return -EINVAL;
629}
630
631/* --------------------------------------------------------------------
632 * First channel for Extended Mode Audio 1 ADC Operation
633 * --------------------------------------------------------------------*/
e571f594 634static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 635{
e571f594
TI		 636 struct es1938 *chip = snd_pcm_substream_chip(substream);
637 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 638 int u, is8, mono;
639 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
640 unsigned int count = snd_pcm_lib_period_bytes(substream);
641
642 chip->dma1_size = size;
643 chip->dma1_start = runtime->dma_addr;
644
645 mono = (runtime->channels > 1) ? 0 : 1;
646 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
647 u = snd_pcm_format_unsigned(runtime->format);
648
649 chip->dma1_shift = 2 - mono - is8;
650
651 snd_es1938_reset_fifo(chip);
652
653 /* program type */
654 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
655
656 /* set clock and counters */
657 snd_es1938_rate_set(chip, substream, ADC1);
658
659 count = 0x10000 - count;
660 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
661 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
662
663 /* initialize and configure ADC */
664 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
665 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
666 (u ? 0x00 : 0x20) |
667 (is8 ? 0x00 : 0x04) |
668 (mono ? 0x40 : 0x08));
669
670 // snd_es1938_reset_fifo(chip);
671
672 /* 11. configure system interrupt controller and DMA controller */
673 snd_es1938_capture_setdma(chip);
674
675 return 0;
676}
677
678
679/* ------------------------------------------------------------------------------
680 * Second Audio channel DAC Operation
681 * ------------------------------------------------------------------------------*/
e571f594 682static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 683{
e571f594
TI		 684 struct es1938 *chip = snd_pcm_substream_chip(substream);
685 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 686 int u, is8, mono;
687 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
688 unsigned int count = snd_pcm_lib_period_bytes(substream);
689
690 chip->dma2_size = size;
691 chip->dma2_start = runtime->dma_addr;
692
693 mono = (runtime->channels > 1) ? 0 : 1;
694 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
695 u = snd_pcm_format_unsigned(runtime->format);
696
697 chip->dma2_shift = 2 - mono - is8;
698
699 snd_es1938_reset_fifo(chip);
700
701 /* set clock and counters */
702 snd_es1938_rate_set(chip, substream, DAC2);
703
704 count >>= 1;
705 count = 0x10000 - count;
706 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
707 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
708
709 /* initialize and configure Audio 2 DAC */
e571f594
TI		 710 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
711 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 712
713 /* program DMA */
714 snd_es1938_playback1_setdma(chip);
715
716 return 0;
717}
718
e571f594 719static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 720{
e571f594
TI		 721 struct es1938 *chip = snd_pcm_substream_chip(substream);
722 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 723 int u, is8, mono;
724 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
725 unsigned int count = snd_pcm_lib_period_bytes(substream);
726
727 chip->dma1_size = size;
728 chip->dma1_start = runtime->dma_addr;
729
730 mono = (runtime->channels > 1) ? 0 : 1;
731 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
732 u = snd_pcm_format_unsigned(runtime->format);
733
734 chip->dma1_shift = 2 - mono - is8;
735
736 count = 0x10000 - count;
737
738 /* reset */
739 snd_es1938_reset_fifo(chip);
740
741 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
742
743 /* set clock and counters */
744 snd_es1938_rate_set(chip, substream, DAC1);
745 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
746 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
747
748 /* initialized and configure DAC */
749 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
750 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
751 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
752 0x90 | (mono ? 0x40 : 0x08) |
753 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
754
755 /* program DMA */
756 snd_es1938_playback2_setdma(chip);
757
758 return 0;
759}
760
e571f594 761static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 762{
763 switch (substream->number) {
764 case 0:
765 return snd_es1938_playback1_prepare(substream);
766 case 1:
767 return snd_es1938_playback2_prepare(substream);
768 }
769 snd_BUG();
770 return -EINVAL;
771}
772
e571f594 773static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 774{
e571f594 775 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 776 size_t ptr;
777 size_t old, new;
778#if 1
779 /* This stuff is *needed*, don't ask why - AB */
780 old = inw(SLDM_REG(chip, DMACOUNT));
781 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
782 old = new;
783 ptr = chip->dma1_size - 1 - new;
784#else
785 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
786#endif
787 return ptr >> chip->dma1_shift;
788}
789
e571f594 790static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 791{
e571f594 792 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 793 size_t ptr;
794#if 1
795 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
796#else
797 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
798#endif
799 return ptr >> chip->dma2_shift;
800}
801
e571f594 802static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 803{
e571f594 804 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 805 size_t ptr;
806 size_t old, new;
807#if 1
808 /* This stuff is *needed*, don't ask why - AB */
809 old = inw(SLDM_REG(chip, DMACOUNT));
810 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
811 old = new;
812 ptr = chip->dma1_size - 1 - new;
813#else
814 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
815#endif
816 return ptr >> chip->dma1_shift;
817}
818
e571f594 819static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 820{
821 switch (substream->number) {
822 case 0:
823 return snd_es1938_playback1_pointer(substream);
824 case 1:
825 return snd_es1938_playback2_pointer(substream);
826 }
827 snd_BUG();
828 return -EINVAL;
829}
830
e571f594 831static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 832 int channel,
833 snd_pcm_uframes_t pos,
834 void __user *dst,
835 snd_pcm_uframes_t count)
836{
e571f594
TI		 837 struct snd_pcm_runtime *runtime = substream->runtime;
838 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 839 pos <<= chip->dma1_shift;
840 count <<= chip->dma1_shift;
841 snd_assert(pos + count <= chip->dma1_size, return -EINVAL);
842 if (pos + count < chip->dma1_size) {
843 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
844 return -EFAULT;
845 } else {
846 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
847 return -EFAULT;
848 if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
849 return -EFAULT;
850 }
851 return 0;
852}
853
854/*
855 * buffer management
856 */
e571f594
TI		 857static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
858 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 859
860{
861 int err;
862
863 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
864 return err;
865 return 0;
866}
867
e571f594 868static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 869{
870 return snd_pcm_lib_free_pages(substream);
871}
872
873/* ----------------------------------------------------------------------
874 * Audio1 Capture (ADC)
875 * ----------------------------------------------------------------------*/
e571f594 876static struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 877{
878 .info = (SNDRV_PCM_INFO_INTERLEAVED |
879 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 880 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
881 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 882 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
883 .rate_min = 6000,
884 .rate_max = 48000,
885 .channels_min = 1,
886 .channels_max = 2,
887 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
888 .period_bytes_min = 64,
889 .period_bytes_max = 0x8000,
890 .periods_min = 1,
891 .periods_max = 1024,
892 .fifo_size = 256,
893};
894
895/* -----------------------------------------------------------------------
896 * Audio2 Playback (DAC)
897 * -----------------------------------------------------------------------*/
e571f594 898static struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 899{
900 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
901 SNDRV_PCM_INFO_BLOCK_TRANSFER |
902 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 903 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
904 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 905 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
906 .rate_min = 6000,
907 .rate_max = 48000,
908 .channels_min = 1,
909 .channels_max = 2,
910 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
911 .period_bytes_min = 64,
912 .period_bytes_max = 0x8000,
913 .periods_min = 1,
914 .periods_max = 1024,
915 .fifo_size = 256,
916};
917
e571f594 918static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 919{
e571f594
TI		 920 struct es1938 *chip = snd_pcm_substream_chip(substream);
921 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 922
923 if (chip->playback2_substream)
924 return -EAGAIN;
925 chip->capture_substream = substream;
926 runtime->hw = snd_es1938_capture;
927 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
928 &hw_constraints_clocks);
929 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
930 return 0;
931}
932
e571f594 933static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 934{
e571f594
TI		 935 struct es1938 *chip = snd_pcm_substream_chip(substream);
936 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 937
938 switch (substream->number) {
939 case 0:
940 chip->playback1_substream = substream;
941 break;
942 case 1:
943 if (chip->capture_substream)
944 return -EAGAIN;
945 chip->playback2_substream = substream;
946 break;
947 default:
948 snd_BUG();
949 return -EINVAL;
950 }
951 runtime->hw = snd_es1938_playback;
952 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
953 &hw_constraints_clocks);
954 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
955 return 0;
956}
957
e571f594 958static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 959{
e571f594 960 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 961
962 chip->capture_substream = NULL;
963 return 0;
964}
965
e571f594 966static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 967{
e571f594 968 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 969
970 switch (substream->number) {
971 case 0:
972 chip->playback1_substream = NULL;
973 break;
974 case 1:
975 chip->playback2_substream = NULL;
976 break;
977 default:
978 snd_BUG();
979 return -EINVAL;
980 }
981 return 0;
982}
983
e571f594 984static struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 985 .open = snd_es1938_playback_open,
986 .close = snd_es1938_playback_close,
987 .ioctl = snd_pcm_lib_ioctl,
988 .hw_params = snd_es1938_pcm_hw_params,
989 .hw_free = snd_es1938_pcm_hw_free,
990 .prepare = snd_es1938_playback_prepare,
991 .trigger = snd_es1938_playback_trigger,
992 .pointer = snd_es1938_playback_pointer,
993};
994
e571f594 995static struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 996 .open = snd_es1938_capture_open,
997 .close = snd_es1938_capture_close,
998 .ioctl = snd_pcm_lib_ioctl,
999 .hw_params = snd_es1938_pcm_hw_params,
1000 .hw_free = snd_es1938_pcm_hw_free,
1001 .prepare = snd_es1938_capture_prepare,
1002 .trigger = snd_es1938_capture_trigger,
1003 .pointer = snd_es1938_capture_pointer,
1004 .copy = snd_es1938_capture_copy,
1005};
1006
e571f594 1007static int __devinit snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1008{
e571f594 1009 struct snd_pcm *pcm;
1da177e4
LT		 1010 int err;
1011
1012 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1013 return err;
1014 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1015 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1016
1017 pcm->private_data = chip;
1da177e4
LT		 1018 pcm->info_flags = 0;
1019 strcpy(pcm->name, "ESS Solo-1");
1020
1021 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1022 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1023
1024 chip->pcm = pcm;
1025 return 0;
1026}
1027
1028/* -------------------------------------------------------------------
1029 *
1030 * *** Mixer part ***
1031 */
1032
e571f594
TI		 1033static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1034 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1035{
1036 static char *texts[8] = {
1037 "Mic", "Mic Master", "CD", "AOUT",
1038 "Mic1", "Mix", "Line", "Master"
1039 };
1040
1041 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1042 uinfo->count = 1;
1043 uinfo->value.enumerated.items = 8;
1044 if (uinfo->value.enumerated.item > 7)
1045 uinfo->value.enumerated.item = 7;
1046 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1047 return 0;
1048}
1049
e571f594
TI		 1050static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1051 struct snd_ctl_elem_value *ucontrol)
1da177e4 1052{
e571f594 1053 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1054 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1055 return 0;
1056}
1057
e571f594
TI		 1058static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1059 struct snd_ctl_elem_value *ucontrol)
1da177e4 1060{
e571f594 1061 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1062 unsigned char val = ucontrol->value.enumerated.item[0];
1063
1064 if (val > 7)
1065 return -EINVAL;
1066 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1067}
1068
a5ce8890 1069#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1070
e571f594
TI		 1071static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1072 struct snd_ctl_elem_value *ucontrol)
1da177e4 1073{
e571f594 1074 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1075 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1076 ucontrol->value.integer.value[0] = !!(val & 8);
1077 return 0;
1078}
1079
e571f594
TI		 1080static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1081 struct snd_ctl_elem_value *ucontrol)
1da177e4 1082{
e571f594 1083 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1084 unsigned char oval, nval;
1085 int change;
1086 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1087 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1088 change = nval != oval;
1089 if (change) {
1090 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1091 snd_es1938_mixer_write(chip, 0x50, nval);
1092 }
1093 return change;
1094}
1095
e571f594
TI		 1096static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1097 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1098{
1099 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1100 uinfo->count = 2;
1101 uinfo->value.integer.min = 0;
1102 uinfo->value.integer.max = 63;
1103 return 0;
1104}
1105
e571f594
TI		 1106static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1107 struct snd_ctl_elem_value *ucontrol)
1da177e4 1108{
e571f594 1109 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1110 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1111 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1112 return 0;
1113}
1114
a5ce8890 1115#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1116
e571f594
TI		 1117static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1118 struct snd_ctl_elem_value *ucontrol)
1da177e4 1119{
e571f594 1120 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1121 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1122 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1123 return 0;
1124}
1125
e571f594 1126static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1127{
e571f594 1128 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1129 chip->master_volume = NULL;
1130 chip->master_switch = NULL;
1131 chip->hw_volume = NULL;
1132 chip->hw_switch = NULL;
1133}
1134
e571f594 1135static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1136 unsigned char mask, unsigned char val)
1137{
1138 if (reg < 0xa0)
1139 return snd_es1938_mixer_bits(chip, reg, mask, val);
1140 else
1141 return snd_es1938_bits(chip, reg, mask, val);
1142}
1143
e571f594 1144static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1145{
1146 if (reg < 0xa0)
1147 return snd_es1938_mixer_read(chip, reg);
1148 else
1149 return snd_es1938_read(chip, reg);
1150}
1151
0b593972
TI		 1152#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1153{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1154 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1155 .name = xname, .index = xindex, \
1156 .info = snd_es1938_info_single, \
1157 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1158 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1159 .tlv = { .p = xtlv } }
1da177e4
LT		 1160#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1161{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1162 .info = snd_es1938_info_single, \
1163 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1164 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1165
e571f594
TI		 1166static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1167 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1168{
1169 int mask = (kcontrol->private_value >> 16) & 0xff;
1170
1171 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1172 uinfo->count = 1;
1173 uinfo->value.integer.min = 0;
1174 uinfo->value.integer.max = mask;
1175 return 0;
1176}
1177
e571f594
TI		 1178static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1179 struct snd_ctl_elem_value *ucontrol)
1da177e4 1180{
e571f594 1181 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1182 int reg = kcontrol->private_value & 0xff;
1183 int shift = (kcontrol->private_value >> 8) & 0xff;
1184 int mask = (kcontrol->private_value >> 16) & 0xff;
1185 int invert = (kcontrol->private_value >> 24) & 0xff;
1186 int val;
1187
1188 val = snd_es1938_reg_read(chip, reg);
1189 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1190 if (invert)
1191 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1192 return 0;
1193}
1194
e571f594
TI		 1195static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1196 struct snd_ctl_elem_value *ucontrol)
1da177e4 1197{
e571f594 1198 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1199 int reg = kcontrol->private_value & 0xff;
1200 int shift = (kcontrol->private_value >> 8) & 0xff;
1201 int mask = (kcontrol->private_value >> 16) & 0xff;
1202 int invert = (kcontrol->private_value >> 24) & 0xff;
1203 unsigned char val;
1204
1205 val = (ucontrol->value.integer.value[0] & mask);
1206 if (invert)
1207 val = mask - val;
1208 mask <<= shift;
1209 val <<= shift;
1210 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1211}
1212
0b593972
TI		 1213#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1214{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1215 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1216 .name = xname, .index = xindex, \
1217 .info = snd_es1938_info_double, \
1218 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1219 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1220 .tlv = { .p = xtlv } }
1da177e4
LT		 1221#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1222{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1223 .info = snd_es1938_info_double, \
1224 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1225 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1226
e571f594
TI		 1227static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1228 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1229{
1230 int mask = (kcontrol->private_value >> 24) & 0xff;
1231
1232 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1233 uinfo->count = 2;
1234 uinfo->value.integer.min = 0;
1235 uinfo->value.integer.max = mask;
1236 return 0;
1237}
1238
e571f594
TI		 1239static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1240 struct snd_ctl_elem_value *ucontrol)
1da177e4 1241{
e571f594 1242 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1243 int left_reg = kcontrol->private_value & 0xff;
1244 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1245 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1246 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1247 int mask = (kcontrol->private_value >> 24) & 0xff;
1248 int invert = (kcontrol->private_value >> 22) & 1;
1249 unsigned char left, right;
1250
1251 left = snd_es1938_reg_read(chip, left_reg);
1252 if (left_reg != right_reg)
1253 right = snd_es1938_reg_read(chip, right_reg);
1254 else
1255 right = left;
1256 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1257 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1258 if (invert) {
1259 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1260 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1261 }
1262 return 0;
1263}
1264
e571f594
TI		 1265static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1266 struct snd_ctl_elem_value *ucontrol)
1da177e4 1267{
e571f594 1268 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1269 int left_reg = kcontrol->private_value & 0xff;
1270 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1271 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1272 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1273 int mask = (kcontrol->private_value >> 24) & 0xff;
1274 int invert = (kcontrol->private_value >> 22) & 1;
1275 int change;
1276 unsigned char val1, val2, mask1, mask2;
1277
1278 val1 = ucontrol->value.integer.value[0] & mask;
1279 val2 = ucontrol->value.integer.value[1] & mask;
1280 if (invert) {
1281 val1 = mask - val1;
1282 val2 = mask - val2;
1283 }
1284 val1 <<= shift_left;
1285 val2 <<= shift_right;
1286 mask1 = mask << shift_left;
1287 mask2 = mask << shift_right;
1288 if (left_reg != right_reg) {
1289 change = 0;
1290 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1291 change = 1;
1292 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1293 change = 1;
1294 } else {
1295 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1296 val1 | val2) != (val1 | val2));
1297 }
1298 return change;
1299}
1300
0b593972
TI		 1301static unsigned int db_scale_master[] = {
1302 TLV_DB_RANGE_HEAD(2),
1303 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1304 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1305};
1306
1307static unsigned int db_scale_audio1[] = {
1308 TLV_DB_RANGE_HEAD(2),
1309 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1310 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1311};
1312
1313static unsigned int db_scale_audio2[] = {
1314 TLV_DB_RANGE_HEAD(2),
1315 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1316 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1317};
1318
1319static unsigned int db_scale_mic[] = {
1320 TLV_DB_RANGE_HEAD(2),
1321 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1322 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1323};
1324
1325static unsigned int db_scale_line[] = {
1326 TLV_DB_RANGE_HEAD(2),
1327 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1328 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1329};
1330
0cb29ea0 1331static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1332
e571f594 1333static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1334ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1335 db_scale_master),
1da177e4
LT		 1336ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1337{
1338 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1339 .name = "Hardware Master Playback Volume",
1340 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1341 .info = snd_es1938_info_hw_volume,
1342 .get = snd_es1938_get_hw_volume,
1343},
1344{
1345 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1346 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1347 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1348 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1349 .info = snd_es1938_info_hw_switch,
1350 .get = snd_es1938_get_hw_switch,
0b593972 1351 .tlv = { .p = db_scale_master },
1da177e4
LT		 1352},
1353ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1354ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1355 db_scale_line),
1da177e4 1356ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1357ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1358 db_scale_mic),
1359ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1360 db_scale_line),
1361ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1362 db_scale_mic),
1363ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1364 db_scale_line),
1365ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1366 db_scale_capture),
1da177e4
LT		 1367ES1938_SINGLE("PC Speaker Volume", 0, 0x3c, 0, 7, 0),
1368ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1369ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1370{
1371 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1372 .name = "Capture Source",
1373 .info = snd_es1938_info_mux,
1374 .get = snd_es1938_get_mux,
1375 .put = snd_es1938_put_mux,
1376},
0b593972
TI		 1377ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1378 db_scale_line),
1379ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1380 db_scale_audio2),
1381ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1382 db_scale_mic),
1383ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1384 db_scale_line),
1385ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1386 db_scale_mic),
1387ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1388 db_scale_line),
1389ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1390 db_scale_line),
1391ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1392 db_scale_line),
1393ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1394 db_scale_audio2),
1395ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1396 db_scale_audio1),
1da177e4
LT		 1397ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1398{
1399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1400 .name = "3D Control - Switch",
1401 .info = snd_es1938_info_spatializer_enable,
1402 .get = snd_es1938_get_spatializer_enable,
1403 .put = snd_es1938_put_spatializer_enable,
1404},
1405ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1406};
1407
1408
1409/* ---------------------------------------------------------------------------- */
1410/* ---------------------------------------------------------------------------- */
1411
1412/*
1413 * initialize the chip - used by resume callback, too
1414 */
e571f594 1415static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1416{
1417 /* reset chip */
1418 snd_es1938_reset(chip);
1419
1420 /* configure native mode */
1421
1422 /* enable bus master */
1423 pci_set_master(chip->pci);
1424
1425 /* disable legacy audio */
1426 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1427
1428 /* set DDMA base */
1429 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1430
1431 /* set DMA/IRQ policy */
1432 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1433
1434 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1435 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1436
1437 /* reset DMA */
1438 outb(0, SLDM_REG(chip, DMACLEAR));
1439}
1440
1441#ifdef CONFIG_PM
1442/*
1443 * PM support
1444 */
1445
1446static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1447 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1448 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1449 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1450 0xa8, 0xb4,
1451};
1452
1453
b34a580e 1454static int es1938_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 1455{
b34a580e
TI		 1456 struct snd_card *card = pci_get_drvdata(pci);
1457 struct es1938 *chip = card->private_data;
1da177e4
LT		 1458 unsigned char *s, *d;
1459
b34a580e 1460 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1461 snd_pcm_suspend_all(chip->pcm);
1462
1463 /* save mixer-related registers */
1464 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1465 *d = snd_es1938_reg_read(chip, *s);
1466
1467 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399
TI		 1468 if (chip->irq >= 0) {
1469 synchronize_irq(chip->irq);
b34a580e 1470 free_irq(chip->irq, chip);
30b35399
TI		 1471 chip->irq = -1;
1472 }
b34a580e
TI		 1473 pci_disable_device(pci);
1474 pci_save_state(pci);
30b35399 1475 pci_set_power_state(pci, pci_choose_state(pci, state));
1da177e4
LT		 1476 return 0;
1477}
1478
b34a580e 1479static int es1938_resume(struct pci_dev *pci)
1da177e4 1480{
b34a580e
TI		 1481 struct snd_card *card = pci_get_drvdata(pci);
1482 struct es1938 *chip = card->private_data;
1da177e4
LT		 1483 unsigned char *s, *d;
1484
30b35399 1485 pci_set_power_state(pci, PCI_D0);
b34a580e 1486 pci_restore_state(pci);
30b35399
TI		 1487 if (pci_enable_device(pci) < 0) {
1488 printk(KERN_ERR "es1938: pci_enable_device failed, "
1489 "disabling device\n");
1490 snd_card_disconnect(card);
1491 return -EIO;
1492 }
1493
1494 if (request_irq(pci->irq, snd_es1938_interrupt,
437a5a46 1495 IRQF_SHARED, "ES1938", chip)) {
30b35399
TI		 1496 printk(KERN_ERR "es1938: unable to grab IRQ %d, "
1497 "disabling device\n", pci->irq);
1498 snd_card_disconnect(card);
1499 return -EIO;
1500 }
b34a580e 1501 chip->irq = pci->irq;
1da177e4
LT		 1502 snd_es1938_chip_init(chip);
1503
1504 /* restore mixer-related registers */
1505 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1506 if (*s < 0xa0)
1507 snd_es1938_mixer_write(chip, *s, *d);
1508 else
1509 snd_es1938_write(chip, *s, *d);
1510 }
1511
b34a580e 1512 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1513 return 0;
1514}
1515#endif /* CONFIG_PM */
1516
1517#ifdef SUPPORT_JOYSTICK
e571f594 1518static int __devinit snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1519{
1520 struct gameport *gp;
1521
1522 chip->gameport = gp = gameport_allocate_port();
1523 if (!gp) {
1524 printk(KERN_ERR "es1938: cannot allocate memory for gameport\n");
1525 return -ENOMEM;
1526 }
1527
1528 gameport_set_name(gp, "ES1938");
1529 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1530 gameport_set_dev_parent(gp, &chip->pci->dev);
1531 gp->io = chip->game_port;
1532
1533 gameport_register_port(gp);
1534
1535 return 0;
1536}
1537
e571f594 1538static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1539{
1540 if (chip->gameport) {
1541 gameport_unregister_port(chip->gameport);
1542 chip->gameport = NULL;
1543 }
1544}
1545#else
e571f594
TI		 1546static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1547static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1548#endif /* SUPPORT_JOYSTICK */
1549
e571f594 1550static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1551{
1552 /* disable irqs */
1553 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1554 if (chip->rmidi)
1555 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1556
1557 snd_es1938_free_gameport(chip);
1558
30b35399
TI		 1559 if (chip->irq >= 0) {
1560 synchronize_irq(chip->irq);
e571f594 1561 free_irq(chip->irq, chip);
30b35399 1562 }
1da177e4
LT		 1563 pci_release_regions(chip->pci);
1564 pci_disable_device(chip->pci);
1565 kfree(chip);
1566 return 0;
1567}
1568
e571f594 1569static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1570{
e571f594 1571 struct es1938 *chip = device->device_data;
1da177e4
LT		 1572 return snd_es1938_free(chip);
1573}
1574
e571f594 1575static int __devinit snd_es1938_create(struct snd_card *card,
1da177e4 1576 struct pci_dev * pci,
e571f594 1577 struct es1938 ** rchip)
1da177e4 1578{
e571f594 1579 struct es1938 *chip;
1da177e4 1580 int err;
e571f594 1581 static struct snd_device_ops ops = {
1da177e4
LT		 1582 .dev_free = snd_es1938_dev_free,
1583 };
1584
1585 *rchip = NULL;
1586
1587 /* enable PCI device */
1588 if ((err = pci_enable_device(pci)) < 0)
1589 return err;
1590 /* check, if we can restrict PCI DMA transfers to 24 bits */
910638ae
MG		 1591 if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
1592 pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
99b359ba 1593 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1594 pci_disable_device(pci);
1595 return -ENXIO;
1596 }
1597
e560d8d8 1598 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1599 if (chip == NULL) {
1600 pci_disable_device(pci);
1601 return -ENOMEM;
1602 }
1603 spin_lock_init(&chip->reg_lock);
1604 spin_lock_init(&chip->mixer_lock);
1605 chip->card = card;
1606 chip->pci = pci;
30b35399 1607 chip->irq = -1;
1da177e4
LT		 1608 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1609 kfree(chip);
1610 pci_disable_device(pci);
1611 return err;
1612 }
1613 chip->io_port = pci_resource_start(pci, 0);
1614 chip->sb_port = pci_resource_start(pci, 1);
1615 chip->vc_port = pci_resource_start(pci, 2);
1616 chip->mpu_port = pci_resource_start(pci, 3);
1617 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1618 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
e571f594 1619 "ES1938", chip)) {
99b359ba 1620 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1621 snd_es1938_free(chip);
1622 return -EBUSY;
1623 }
1624 chip->irq = pci->irq;
1625#ifdef ES1938_DDEBUG
99b359ba 1626 snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4
LT		 1627 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1628#endif
1629
1630 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1631
1632 snd_es1938_chip_init(chip);
1633
1da177e4
LT		 1634 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1635 snd_es1938_free(chip);
1636 return err;
1637 }
1638
1639 snd_card_set_dev(card, &pci->dev);
1640
1641 *rchip = chip;
1642 return 0;
1643}
1644
1645/* --------------------------------------------------------------------
1646 * Interrupt handler
1647 * -------------------------------------------------------------------- */
7d12e780 1648static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1649{
e571f594 1650 struct es1938 *chip = dev_id;
1da177e4
LT		 1651 unsigned char status, audiostatus;
1652 int handled = 0;
1653
1654 status = inb(SLIO_REG(chip, IRQCONTROL));
1655#if 0
1656 printk("Es1938debug - interrupt status: =0x%x\n", status);
1657#endif
1658
1659 /* AUDIO 1 */
1660 if (status & 0x10) {
1661#if 0
1662 printk("Es1938debug - AUDIO channel 1 interrupt\n");
e571f594
TI		 1663 printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1664 inw(SLDM_REG(chip, DMACOUNT)));
1665 printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1666 inl(SLDM_REG(chip, DMAADDR)));
1667 printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1668 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1669#endif
1670 /* clear irq */
1671 handled = 1;
1672 audiostatus = inb(SLSB_REG(chip, STATUS));
1673 if (chip->active & ADC1)
1674 snd_pcm_period_elapsed(chip->capture_substream);
1675 else if (chip->active & DAC1)
1676 snd_pcm_period_elapsed(chip->playback2_substream);
1677 }
1678
1679 /* AUDIO 2 */
1680 if (status & 0x20) {
1681#if 0
1682 printk("Es1938debug - AUDIO channel 2 interrupt\n");
e571f594
TI		 1683 printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1684 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1685 printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1686 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1687
1688#endif
1689 /* clear irq */
1690 handled = 1;
1691 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1692 if (chip->active & DAC2)
1693 snd_pcm_period_elapsed(chip->playback1_substream);
1694 }
1695
1696 /* Hardware volume */
1697 if (status & 0x40) {
1698 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1699 handled = 1;
1700 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1701 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1702 if (!split) {
e571f594
TI		 1703 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1704 &chip->master_switch->id);
1705 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1706 &chip->master_volume->id);
1da177e4
LT		 1707 }
1708 /* ack interrupt */
1709 snd_es1938_mixer_write(chip, 0x66, 0x00);
1710 }
1711
1712 /* MPU401 */
1713 if (status & 0x80) {
1714 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1715 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1716 // andreas@flying-snail.de
1717 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1718 if (chip->rmidi) {
1719 handled = 1;
7d12e780 1720 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1721 }
1722 }
1723 return IRQ_RETVAL(handled);
1724}
1725
1726#define ES1938_DMA_SIZE 64
1727
e571f594 1728static int __devinit snd_es1938_mixer(struct es1938 *chip)
1da177e4 1729{
e571f594 1730 struct snd_card *card;
1da177e4
LT		 1731 unsigned int idx;
1732 int err;
1733
1734 card = chip->card;
1735
1736 strcpy(card->mixername, "ESS Solo-1");
1737
1738 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1739 struct snd_kcontrol *kctl;
1da177e4
LT		 1740 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1741 switch (idx) {
1742 case 0:
1743 chip->master_volume = kctl;
1744 kctl->private_free = snd_es1938_hwv_free;
1745 break;
1746 case 1:
1747 chip->master_switch = kctl;
1748 kctl->private_free = snd_es1938_hwv_free;
1749 break;
1750 case 2:
1751 chip->hw_volume = kctl;
1752 kctl->private_free = snd_es1938_hwv_free;
1753 break;
1754 case 3:
1755 chip->hw_switch = kctl;
1756 kctl->private_free = snd_es1938_hwv_free;
1757 break;
1758 }
1759 if ((err = snd_ctl_add(card, kctl)) < 0)
1760 return err;
1761 }
1762 return 0;
1763}
1764
1765
1766static int __devinit snd_es1938_probe(struct pci_dev *pci,
1767 const struct pci_device_id *pci_id)
1768{
1769 static int dev;
e571f594
TI		 1770 struct snd_card *card;
1771 struct es1938 *chip;
1772 struct snd_opl3 *opl3;
1da177e4
LT		 1773 int idx, err;
1774
1775 if (dev >= SNDRV_CARDS)
1776 return -ENODEV;
1777 if (!enable[dev]) {
1778 dev++;
1779 return -ENOENT;
1780 }
1781
1782 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1783 if (card == NULL)
1784 return -ENOMEM;
1785 for (idx = 0; idx < 5; idx++) {
1786 if (pci_resource_start(pci, idx) == 0 ||
1787 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1788 snd_card_free(card);
1789 return -ENODEV;
1790 }
1791 }
1792 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1793 snd_card_free(card);
1794 return err;
1795 }
b34a580e 1796 card->private_data = chip;
1da177e4
LT		 1797
1798 strcpy(card->driver, "ES1938");
1799 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1800 sprintf(card->longname, "%s rev %i, irq %i",
1801 card->shortname,
1802 chip->revision,
1803 chip->irq);
1804
1805 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1806 snd_card_free(card);
1807 return err;
1808 }
1809 if ((err = snd_es1938_mixer(chip)) < 0) {
1810 snd_card_free(card);
1811 return err;
1812 }
1813 if (snd_opl3_create(card,
1814 SLSB_REG(chip, FMLOWADDR),
1815 SLSB_REG(chip, FMHIGHADDR),
1816 OPL3_HW_OPL3, 1, &opl3) < 0) {
1817 printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n",
1818 SLSB_REG(chip, FMLOWADDR));
1819 } else {
1820 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1821 snd_card_free(card);
1822 return err;
1823 }
1824 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1825 snd_card_free(card);
1826 return err;
1827 }
1828 }
1829 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
302e4c2f
TI		 1830 chip->mpu_port, MPU401_INFO_INTEGRATED,
1831 chip->irq, 0, &chip->rmidi) < 0) {
1da177e4
LT		 1832 printk(KERN_ERR "es1938: unable to initialize MPU-401\n");
1833 } else {
1834 // this line is vital for MIDI interrupt handling on ess-solo1
1835 // andreas@flying-snail.de
1836 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1837 }
1838
1839 snd_es1938_create_gameport(chip);
1840
1841 if ((err = snd_card_register(card)) < 0) {
1842 snd_card_free(card);
1843 return err;
1844 }
1845
1846 pci_set_drvdata(pci, card);
1847 dev++;
1848 return 0;
1849}
1850
1851static void __devexit snd_es1938_remove(struct pci_dev *pci)
1852{
1853 snd_card_free(pci_get_drvdata(pci));
1854 pci_set_drvdata(pci, NULL);
1855}
1856
1857static struct pci_driver driver = {
1858 .name = "ESS ES1938 (Solo-1)",
1859 .id_table = snd_es1938_ids,
1860 .probe = snd_es1938_probe,
1861 .remove = __devexit_p(snd_es1938_remove),
b34a580e
TI		 1862#ifdef CONFIG_PM
1863 .suspend = es1938_suspend,
1864 .resume = es1938_resume,
1865#endif
1da177e4
LT		 1866};
1867
1868static int __init alsa_card_es1938_init(void)
1869{
01d25d46 1870 return pci_register_driver(&driver);
1da177e4
LT		 1871}
1872
1873static void __exit alsa_card_es1938_exit(void)
1874{
1875 pci_unregister_driver(&driver);
1876}
1877
1878module_init(alsa_card_es1938_init)
1879module_exit(alsa_card_es1938_exit)
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