[net-next-2.6.git] / scripts / Makefile.build

# ==========================================================================
# Building
# ==========================================================================

src := $(obj)

.PHONY: __build
__build:

# Read .config if it exist, otherwise ignore
-include .config

include $(if $(wildcard $(obj)/Kbuild), $(obj)/Kbuild, $(obj)/Makefile)

include scripts/Kbuild.include
include scripts/Makefile.lib

ifdef host-progs
ifneq ($(hostprogs-y),$(host-progs))
$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
hostprogs-y += $(host-progs)
endif
endif

# Do not include host rules unles needed
ifneq ($(hostprogs-y)$(hostprogs-m),)
include scripts/Makefile.host
endif

ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))

# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
endif


ifdef EXTRA_TARGETS
$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
endif

ifdef build-targets
$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
endif

ifdef export-objs
$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
endif

ifdef O_TARGET
$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
endif

ifdef L_TARGET
$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
endif

ifdef list-multi
$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
endif

ifndef obj
$(warning kbuild: Makefile.build is included improperly)
endif

# ===========================================================================

ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
lib-target := $(obj)/lib.a
endif

ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
builtin-target := $(obj)/built-in.o
endif

# We keep a list of all modules in $(MODVERDIR)

__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
	 $(if $(KBUILD_MODULES),$(obj-m)) \
	 $(subdir-ym) $(always)
	@:

# Linus' kernel sanity checking tool
ifneq ($(KBUILD_CHECKSRC),0)
  ifeq ($(KBUILD_CHECKSRC),2)
    quiet_cmd_force_checksrc = CHECK   $<
          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  else
      quiet_cmd_checksrc     = CHECK   $<
            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  endif
endif


# Compile C sources (.c)
# ---------------------------------------------------------------------------

# Default is built-in, unless we know otherwise
modkern_cflags := $(CFLAGS_KERNEL)
quiet_modtag := $(empty)   $(empty)

$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)

$(real-objs-m)        : quiet_modtag := [M]
$(real-objs-m:.o=.i)  : quiet_modtag := [M]
$(real-objs-m:.o=.s)  : quiet_modtag := [M]
$(real-objs-m:.o=.lst): quiet_modtag := [M]

$(obj-m)              : quiet_modtag := [M]

# Default for not multi-part modules
modname = $(*F)

$(multi-objs-m)         : modname = $(modname-multi)
$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
$(multi-objs-y)         : modname = $(modname-multi)
$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
$(multi-objs-y:.o=.lst) : modname = $(modname-multi)

quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
cmd_cc_s_c       = $(CC) $(c_flags) -S -o $@ $< 

%.s: %.c FORCE
	$(call if_changed_dep,cc_s_c)

quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<

%.i: %.c FORCE
	$(call if_changed_dep,cc_i_c)

# C (.c) files
# The C file is compiled and updated dependency information is generated.
# (See cmd_cc_o_c + relevant part of rule_cc_o_c)

quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@

ifndef CONFIG_MODVERSIONS
cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

else
# When module versioning is enabled the following steps are executed:
# o compile a .tmp_<file>.o from <file>.c
# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
#   are done.
# o otherwise, we calculate symbol versions using the good old
#   genksyms on the preprocessed source and postprocess them in a way
#   that they are usable as a linker script
# o generate <file>.o from .tmp_<file>.o using the linker to
#   replace the unresolved symbols __crc_exported_symbol with
#   the actual value of the checksum generated by genksyms

cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
cmd_modversions =							\
	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then	\
		$(CPP) -D__GENKSYMS__ $(c_flags) $<			\
		| $(GENKSYMS)						\
		> $(@D)/.tmp_$(@F:.o=.ver);				\
									\
		$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 		\
			-T $(@D)/.tmp_$(@F:.o=.ver);			\
		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);	\
	else								\
		mv -f $(@D)/.tmp_$(@F) $@;				\
	fi;
endif

define rule_cc_o_c
	$(if $($(quiet)cmd_checksrc),echo '  $($(quiet)cmd_checksrc)';)   \
	$(cmd_checksrc)							  \
	$(if $($(quiet)cmd_cc_o_c),echo '  $(subst ','\'',$($(quiet)cmd_cc_o_c))';)  \
	$(cmd_cc_o_c);							  \
	$(cmd_modversions)						  \
	scripts/basic/fixdep $(depfile) $@ '$(subst ','\'',$(cmd_cc_o_c))' > $(@D)/.$(@F).tmp;  \
	rm -f $(depfile);						  \
	mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
endef

# Built-in and composite module parts

%.o: %.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)

# Single-part modules are special since we need to mark them in $(MODVERDIR)

$(single-used-m): %.o: %.c FORCE
	$(call cmd,force_checksrc)
	$(call if_changed_rule,cc_o_c)
	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)

quiet_cmd_cc_lst_c = MKLST   $@
      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
				     System.map $(OBJDUMP) > $@

%.lst: %.c FORCE
	$(call if_changed_dep,cc_lst_c)

# Compile assembler sources (.S)
# ---------------------------------------------------------------------------

modkern_aflags := $(AFLAGS_KERNEL)

$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)

quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $< 

%.s: %.S FORCE
	$(call if_changed_dep,as_s_S)

quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<

%.o: %.S FORCE
	$(call if_changed_dep,as_o_S)

targets += $(real-objs-y) $(real-objs-m) $(lib-y)
targets += $(extra-y) $(MAKECMDGOALS) $(always)

# Linker scripts preprocessor (.lds.S -> .lds)
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds_S = LDS     $@
      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<

%.lds: %.lds.S FORCE
	$(call if_changed_dep,cpp_lds_S)

# Build the compiled-in targets
# ---------------------------------------------------------------------------

# To build objects in subdirs, we need to descend into the directories
$(sort $(subdir-obj-y)): $(subdir-ym) ;

#
# Rule to compile a set of .o files into one .o file
#
ifdef builtin-target
quiet_cmd_link_o_target = LD      $@
# If the list of objects to link is empty, just create an empty built-in.o
cmd_link_o_target = $(if $(strip $(obj-y)),\
		      $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
		      rm -f $@; $(AR) rcs $@)

$(builtin-target): $(obj-y) FORCE
	$(call if_changed,link_o_target)

targets += $(builtin-target)
endif # builtin-target

#
# Rule to compile a set of .o files into one .a file
#
ifdef lib-target
quiet_cmd_link_l_target = AR      $@
cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)

$(lib-target): $(lib-y) FORCE
	$(call if_changed,link_l_target)

targets += $(lib-target)
endif

#
# Rule to link composite objects
#
#  Composite objects are specified in kbuild makefile as follows:
#    <composite-object>-objs := <list of .o files>
#  or
#    <composite-object>-y    := <list of .o files>
link_multi_deps =                     \
$(filter $(addprefix $(obj)/,         \
$($(subst $(obj)/,,$(@:.o=-objs)))    \
$($(subst $(obj)/,,$(@:.o=-y)))), $^)
 
quiet_cmd_link_multi-y = LD      $@
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)

quiet_cmd_link_multi-m = LD [M]  $@
cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)

# We would rather have a list of rules like
# 	foo.o: $(foo-objs)
# but that's not so easy, so we rather make all composite objects depend
# on the set of all their parts
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
	$(call if_changed,link_multi-y)

$(multi-used-m) : %.o: $(multi-objs-m) FORCE
	$(call if_changed,link_multi-m)
	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)

targets += $(multi-used-y) $(multi-used-m)


# Descending
# ---------------------------------------------------------------------------

.PHONY: $(subdir-ym)
$(subdir-ym):
	$(Q)$(MAKE) $(build)=$@

# Add FORCE to the prequisites of a target to force it to be always rebuilt.
# ---------------------------------------------------------------------------

.PHONY: FORCE

FORCE:

# Read all saved command lines and dependencies for the $(targets) we
# may be building above, using $(if_changed{,_dep}). As an
# optimization, we don't need to read them if the target does not
# exist, we will rebuild anyway in that case.

targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif
Commit	Line	Data
1da177e4 LT	1	# ==========================================================================
	2	# Building
	3	# ==========================================================================
	4
	5	src := $(obj)
	6
	7	.PHONY: __build
	8	__build:
	9
	10	# Read .config if it exist, otherwise ignore
	11	-include .config
	12
	13	include $(if $(wildcard $(obj)/Kbuild), $(obj)/Kbuild, $(obj)/Makefile)
	14
8ec4b4ff	15	include scripts/Kbuild.include
1da177e4 LT	16	include scripts/Makefile.lib
	17
	18	ifdef host-progs
	19	ifneq ($(hostprogs-y),$(host-progs))
	20	$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
	21	hostprogs-y += $(host-progs)
	22	endif
	23	endif
	24
	25	# Do not include host rules unles needed
	26	ifneq ($(hostprogs-y)$(hostprogs-m),)
	27	include scripts/Makefile.host
	28	endif
	29
	30	ifneq ($(KBUILD_SRC),)
	31	# Create output directory if not already present
	32	_dummy := $(shell [ -d $(obj) ] \|\| mkdir -p $(obj))
	33
	34	# Create directories for object files if directory does not exist
	35	# Needed when obj-y := dir/file.o syntax is used
	36	_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] \|\| mkdir -p $(d)))
	37	endif
	38
	39
	40	ifdef EXTRA_TARGETS
	41	$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
	42	endif
	43
	44	ifdef build-targets
	45	$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
	46	endif
	47
	48	ifdef export-objs
	49	$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
	50	endif
	51
	52	ifdef O_TARGET
	53	$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
	54	endif
	55
	56	ifdef L_TARGET
	57	$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
	58	endif
	59
	60	ifdef list-multi
	61	$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
	62	endif
	63
	64	ifndef obj
	65	$(warning kbuild: Makefile.build is included improperly)
	66	endif
	67
	68	# ===========================================================================
	69
	70	ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
	71	lib-target := $(obj)/lib.a
	72	endif
	73
	74	ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
	75	builtin-target := $(obj)/built-in.o
	76	endif
	77
	78	# We keep a list of all modules in $(MODVERDIR)
	79
80	__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
81	$(if $(KBUILD_MODULES),$(obj-m)) \
82	$(subdir-ym) $(always)
83	@:
84
85	# Linus' kernel sanity checking tool
86	ifneq ($(KBUILD_CHECKSRC),0)
87	ifeq ($(KBUILD_CHECKSRC),2)
88	quiet_cmd_force_checksrc = CHECK $<
89	cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
90	else
91	quiet_cmd_checksrc = CHECK $<
92	cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
93	endif
94	endif
95
96
97	# Compile C sources (.c)
98	# ---------------------------------------------------------------------------
99
100	# Default is built-in, unless we know otherwise
101	modkern_cflags := $(CFLAGS_KERNEL)
102	quiet_modtag := $(empty) $(empty)
103
104	$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
105	$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
106	$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
107	$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
108
109	$(real-objs-m) : quiet_modtag := [M]
110	$(real-objs-m:.o=.i) : quiet_modtag := [M]
111	$(real-objs-m:.o=.s) : quiet_modtag := [M]
112	$(real-objs-m:.o=.lst): quiet_modtag := [M]
113
114	$(obj-m) : quiet_modtag := [M]
115
116	# Default for not multi-part modules
117	modname = $(*F)
118
119	$(multi-objs-m) : modname = $(modname-multi)
120	$(multi-objs-m:.o=.i) : modname = $(modname-multi)
121	$(multi-objs-m:.o=.s) : modname = $(modname-multi)
122	$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
123	$(multi-objs-y) : modname = $(modname-multi)
124	$(multi-objs-y:.o=.i) : modname = $(modname-multi)
125	$(multi-objs-y:.o=.s) : modname = $(modname-multi)
126	$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
127
128	quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
129	cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
130
131	%.s: %.c FORCE
132	$(call if_changed_dep,cc_s_c)
133
134	quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
135	cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
136
137	%.i: %.c FORCE
138	$(call if_changed_dep,cc_i_c)
139
140	# C (.c) files
141	# The C file is compiled and updated dependency information is generated.
142	# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
143
144	quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
145
146	ifndef CONFIG_MODVERSIONS
147	cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
148
149	else
150	# When module versioning is enabled the following steps are executed:
151	# o compile a .tmp_<file>.o from <file>.c
152	# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
153	# not export symbols, we just rename .tmp_<file>.o to <file>.o and
154	# are done.
155	# o otherwise, we calculate symbol versions using the good old
156	# genksyms on the preprocessed source and postprocess them in a way
157	# that they are usable as a linker script
158	# o generate <file>.o from .tmp_<file>.o using the linker to
159	# replace the unresolved symbols __crc_exported_symbol with
160	# the actual value of the checksum generated by genksyms
161
162	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
163	cmd_modversions = \
164	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
165	$(CPP) -D__GENKSYMS__ $(c_flags) $< \
166	\| $(GENKSYMS) \
167	> $(@D)/.tmp_$(@F:.o=.ver); \
168	\
169	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
170	-T $(@D)/.tmp_$(@F:.o=.ver); \
171	rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
172	else \
cfca82f2	173	mv -f $(@D)/.tmp_$(@F) $@; \
1da177e4 LT	174	fi;
	175	endif
	176
	177	define rule_cc_o_c
	178	$(if $($(quiet)cmd_checksrc),echo ' $($(quiet)cmd_checksrc)';) \
	179	$(cmd_checksrc) \
8476994a	180	$(if $($(quiet)cmd_cc_o_c),echo ' $(subst ','\'',$($(quiet)cmd_cc_o_c))';) \
1da177e4 LT	181	$(cmd_cc_o_c); \
1da177e4 LT	182	$(cmd_modversions) \
8476994a	183	scripts/basic/fixdep $(depfile) $@ '$(subst ','\'',$(cmd_cc_o_c))' > $(@D)/.$(@F).tmp; \
1da177e4 LT	184	rm -f $(depfile); \
	185	mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
	186	endef
	187
	188	# Built-in and composite module parts
	189
	190	%.o: %.c FORCE
	191	$(call cmd,force_checksrc)
	192	$(call if_changed_rule,cc_o_c)
	193
	194	# Single-part modules are special since we need to mark them in $(MODVERDIR)
	195
	196	$(single-used-m): %.o: %.c FORCE
	197	$(call cmd,force_checksrc)
	198	$(call if_changed_rule,cc_o_c)
	199	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
	200
	201	quiet_cmd_cc_lst_c = MKLST $@
	202	cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
	203	$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
	204	System.map $(OBJDUMP) > $@
	205
	206	%.lst: %.c FORCE
	207	$(call if_changed_dep,cc_lst_c)
	208
	209	# Compile assembler sources (.S)
	210	# ---------------------------------------------------------------------------
	211
	212	modkern_aflags := $(AFLAGS_KERNEL)
	213
	214	$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
	215	$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
	216
	217	quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
	218	cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
	219
	220	%.s: %.S FORCE
	221	$(call if_changed_dep,as_s_S)
	222
	223	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
	224	cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	225
	226	%.o: %.S FORCE
	227	$(call if_changed_dep,as_o_S)
	228
	229	targets += $(real-objs-y) $(real-objs-m) $(lib-y)
	230	targets += $(extra-y) $(MAKECMDGOALS) $(always)
	231
	232	# Linker scripts preprocessor (.lds.S -> .lds)
	233	# ---------------------------------------------------------------------------
	234	quiet_cmd_cpp_lds_S = LDS $@
	235	cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
	236
	237	%.lds: %.lds.S FORCE
	238	$(call if_changed_dep,cpp_lds_S)
	239
	240	# Build the compiled-in targets
	241	# ---------------------------------------------------------------------------
	242
	243	# To build objects in subdirs, we need to descend into the directories
	244	$(sort $(subdir-obj-y)): $(subdir-ym) ;
	245
	246	#
	247	# Rule to compile a set of .o files into one .o file
248	#
249	ifdef builtin-target
250	quiet_cmd_link_o_target = LD $@
251	# If the list of objects to link is empty, just create an empty built-in.o
252	cmd_link_o_target = $(if $(strip $(obj-y)),\
253	$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
254	rm -f $@; $(AR) rcs $@)
255
256	$(builtin-target): $(obj-y) FORCE
257	$(call if_changed,link_o_target)
258
259	targets += $(builtin-target)
260	endif # builtin-target
261
262	#
263	# Rule to compile a set of .o files into one .a file
264	#
265	ifdef lib-target
266	quiet_cmd_link_l_target = AR $@
267	cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
268
269	$(lib-target): $(lib-y) FORCE
270	$(call if_changed,link_l_target)
271
272	targets += $(lib-target)
273	endif
274
275	#
276	# Rule to link composite objects
277	#
278	# Composite objects are specified in kbuild makefile as follows:
279	# <composite-object>-objs := <list of .o files>
280	# or
281	# <composite-object>-y := <list of .o files>
282	link_multi_deps = \
283	$(filter $(addprefix $(obj)/, \
284	$($(subst $(obj)/,,$(@:.o=-objs))) \
285	$($(subst $(obj)/,,$(@:.o=-y)))), $^)
286
287	quiet_cmd_link_multi-y = LD $@
288	cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
289
290	quiet_cmd_link_multi-m = LD [M] $@
291	cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
292
293	# We would rather have a list of rules like
294	# foo.o: $(foo-objs)
295	# but that's not so easy, so we rather make all composite objects depend
296	# on the set of all their parts
297	$(multi-used-y) : %.o: $(multi-objs-y) FORCE
298	$(call if_changed,link_multi-y)
299
300	$(multi-used-m) : %.o: $(multi-objs-m) FORCE
301	$(call if_changed,link_multi-m)
302	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
303
304	targets += $(multi-used-y) $(multi-used-m)
305
306
307	# Descending
308	# ---------------------------------------------------------------------------
309
310	.PHONY: $(subdir-ym)
311	$(subdir-ym):
312	$(Q)$(MAKE) $(build)=$@
313
314	# Add FORCE to the prequisites of a target to force it to be always rebuilt.
315	# ---------------------------------------------------------------------------
316
317	.PHONY: FORCE
318
319	FORCE:
320
321	# Read all saved command lines and dependencies for the $(targets) we
322	# may be building above, using $(if_changed{,_dep}). As an
323	# optimization, we don't need to read them if the target does not
324	# exist, we will rebuild anyway in that case.
325
326	targets := $(wildcard $(sort $(targets)))
327	cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
328
329	ifneq ($(cmd_files),)
330	include $(cmd_files)
331	endif