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Commit | Line | Data |
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dd87eb3a TG |
1 | /* |
2 | * linux/kernel/irq/chip.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
6 | * | |
7 | * This file contains the core interrupt handling code, for irq-chip | |
8 | * based architectures. | |
9 | * | |
10 | * Detailed information is available in Documentation/DocBook/genericirq | |
11 | */ | |
12 | ||
13 | #include <linux/irq.h> | |
7fe3730d | 14 | #include <linux/msi.h> |
dd87eb3a TG |
15 | #include <linux/module.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
3a16d713 EB |
21 | /** |
22 | * dynamic_irq_init - initialize a dynamically allocated irq | |
23 | * @irq: irq number to initialize | |
24 | */ | |
25 | void dynamic_irq_init(unsigned int irq) | |
26 | { | |
27 | struct irq_desc *desc; | |
28 | unsigned long flags; | |
29 | ||
cb5bc832 | 30 | /* first time to use this irq_desc */ |
ee32c973 | 31 | desc = irq_to_desc(irq); |
7d94f7ca | 32 | if (!desc) { |
261c40c1 | 33 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
3a16d713 EB |
34 | return; |
35 | } | |
36 | ||
37 | /* Ensure we don't have left over values from a previous use of this irq */ | |
3a16d713 EB |
38 | spin_lock_irqsave(&desc->lock, flags); |
39 | desc->status = IRQ_DISABLED; | |
40 | desc->chip = &no_irq_chip; | |
41 | desc->handle_irq = handle_bad_irq; | |
42 | desc->depth = 1; | |
5b912c10 | 43 | desc->msi_desc = NULL; |
3a16d713 EB |
44 | desc->handler_data = NULL; |
45 | desc->chip_data = NULL; | |
46 | desc->action = NULL; | |
47 | desc->irq_count = 0; | |
48 | desc->irqs_unhandled = 0; | |
49 | #ifdef CONFIG_SMP | |
d366f8cb | 50 | cpus_setall(desc->affinity); |
3a16d713 EB |
51 | #endif |
52 | spin_unlock_irqrestore(&desc->lock, flags); | |
53 | } | |
54 | ||
55 | /** | |
56 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq | |
57 | * @irq: irq number to initialize | |
58 | */ | |
59 | void dynamic_irq_cleanup(unsigned int irq) | |
60 | { | |
61 | struct irq_desc *desc; | |
62 | unsigned long flags; | |
63 | ||
cb5bc832 | 64 | desc = irq_to_desc(irq); |
7d94f7ca | 65 | if (!desc) { |
261c40c1 | 66 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
3a16d713 EB |
67 | return; |
68 | } | |
69 | ||
3a16d713 | 70 | spin_lock_irqsave(&desc->lock, flags); |
1f80025e EB |
71 | if (desc->action) { |
72 | spin_unlock_irqrestore(&desc->lock, flags); | |
261c40c1 | 73 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
1f80025e | 74 | irq); |
1f80025e EB |
75 | return; |
76 | } | |
5b912c10 EB |
77 | desc->msi_desc = NULL; |
78 | desc->handler_data = NULL; | |
79 | desc->chip_data = NULL; | |
3a16d713 EB |
80 | desc->handle_irq = handle_bad_irq; |
81 | desc->chip = &no_irq_chip; | |
82 | spin_unlock_irqrestore(&desc->lock, flags); | |
83 | } | |
84 | ||
85 | ||
dd87eb3a TG |
86 | /** |
87 | * set_irq_chip - set the irq chip for an irq | |
88 | * @irq: irq number | |
89 | * @chip: pointer to irq chip description structure | |
90 | */ | |
91 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | |
92 | { | |
93 | struct irq_desc *desc; | |
94 | unsigned long flags; | |
95 | ||
cb5bc832 | 96 | desc = irq_to_desc(irq); |
7d94f7ca | 97 | if (!desc) { |
261c40c1 | 98 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
dd87eb3a TG |
99 | return -EINVAL; |
100 | } | |
101 | ||
102 | if (!chip) | |
103 | chip = &no_irq_chip; | |
104 | ||
dd87eb3a TG |
105 | spin_lock_irqsave(&desc->lock, flags); |
106 | irq_chip_set_defaults(chip); | |
107 | desc->chip = chip; | |
dd87eb3a TG |
108 | spin_unlock_irqrestore(&desc->lock, flags); |
109 | ||
110 | return 0; | |
111 | } | |
112 | EXPORT_SYMBOL(set_irq_chip); | |
113 | ||
114 | /** | |
0c5d1eb7 | 115 | * set_irq_type - set the irq trigger type for an irq |
dd87eb3a | 116 | * @irq: irq number |
0c5d1eb7 | 117 | * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h |
dd87eb3a TG |
118 | */ |
119 | int set_irq_type(unsigned int irq, unsigned int type) | |
120 | { | |
121 | struct irq_desc *desc; | |
122 | unsigned long flags; | |
123 | int ret = -ENXIO; | |
124 | ||
cb5bc832 | 125 | desc = irq_to_desc(irq); |
7d94f7ca | 126 | if (!desc) { |
dd87eb3a TG |
127 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
128 | return -ENODEV; | |
129 | } | |
130 | ||
0c5d1eb7 DB |
131 | if (type == IRQ_TYPE_NONE) |
132 | return 0; | |
133 | ||
134 | spin_lock_irqsave(&desc->lock, flags); | |
135 | ret = __irq_set_trigger(desc, irq, flags); | |
136 | spin_unlock_irqrestore(&desc->lock, flags); | |
dd87eb3a TG |
137 | return ret; |
138 | } | |
139 | EXPORT_SYMBOL(set_irq_type); | |
140 | ||
141 | /** | |
142 | * set_irq_data - set irq type data for an irq | |
143 | * @irq: Interrupt number | |
144 | * @data: Pointer to interrupt specific data | |
145 | * | |
146 | * Set the hardware irq controller data for an irq | |
147 | */ | |
148 | int set_irq_data(unsigned int irq, void *data) | |
149 | { | |
150 | struct irq_desc *desc; | |
151 | unsigned long flags; | |
152 | ||
cb5bc832 | 153 | desc = irq_to_desc(irq); |
7d94f7ca | 154 | if (!desc) { |
dd87eb3a TG |
155 | printk(KERN_ERR |
156 | "Trying to install controller data for IRQ%d\n", irq); | |
157 | return -EINVAL; | |
158 | } | |
159 | ||
dd87eb3a TG |
160 | spin_lock_irqsave(&desc->lock, flags); |
161 | desc->handler_data = data; | |
162 | spin_unlock_irqrestore(&desc->lock, flags); | |
163 | return 0; | |
164 | } | |
165 | EXPORT_SYMBOL(set_irq_data); | |
166 | ||
5b912c10 EB |
167 | /** |
168 | * set_irq_data - set irq type data for an irq | |
169 | * @irq: Interrupt number | |
472900b8 | 170 | * @entry: Pointer to MSI descriptor data |
5b912c10 EB |
171 | * |
172 | * Set the hardware irq controller data for an irq | |
173 | */ | |
174 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | |
175 | { | |
176 | struct irq_desc *desc; | |
177 | unsigned long flags; | |
178 | ||
cb5bc832 | 179 | desc = irq_to_desc(irq); |
7d94f7ca | 180 | if (!desc) { |
5b912c10 EB |
181 | printk(KERN_ERR |
182 | "Trying to install msi data for IRQ%d\n", irq); | |
183 | return -EINVAL; | |
184 | } | |
7d94f7ca | 185 | |
5b912c10 EB |
186 | spin_lock_irqsave(&desc->lock, flags); |
187 | desc->msi_desc = entry; | |
7fe3730d ME |
188 | if (entry) |
189 | entry->irq = irq; | |
5b912c10 EB |
190 | spin_unlock_irqrestore(&desc->lock, flags); |
191 | return 0; | |
192 | } | |
193 | ||
dd87eb3a TG |
194 | /** |
195 | * set_irq_chip_data - set irq chip data for an irq | |
196 | * @irq: Interrupt number | |
197 | * @data: Pointer to chip specific data | |
198 | * | |
199 | * Set the hardware irq chip data for an irq | |
200 | */ | |
201 | int set_irq_chip_data(unsigned int irq, void *data) | |
202 | { | |
08678b08 | 203 | struct irq_desc *desc; |
dd87eb3a TG |
204 | unsigned long flags; |
205 | ||
cb5bc832 | 206 | desc = irq_to_desc(irq); |
7d94f7ca YL |
207 | if (!desc) { |
208 | printk(KERN_ERR | |
209 | "Trying to install chip data for IRQ%d\n", irq); | |
210 | return -EINVAL; | |
211 | } | |
212 | ||
213 | if (!desc->chip) { | |
dd87eb3a TG |
214 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
215 | return -EINVAL; | |
216 | } | |
217 | ||
218 | spin_lock_irqsave(&desc->lock, flags); | |
219 | desc->chip_data = data; | |
220 | spin_unlock_irqrestore(&desc->lock, flags); | |
221 | ||
222 | return 0; | |
223 | } | |
224 | EXPORT_SYMBOL(set_irq_chip_data); | |
225 | ||
226 | /* | |
227 | * default enable function | |
228 | */ | |
229 | static void default_enable(unsigned int irq) | |
230 | { | |
08678b08 | 231 | struct irq_desc *desc; |
dd87eb3a | 232 | |
08678b08 | 233 | desc = irq_to_desc(irq); |
dd87eb3a TG |
234 | desc->chip->unmask(irq); |
235 | desc->status &= ~IRQ_MASKED; | |
236 | } | |
237 | ||
238 | /* | |
239 | * default disable function | |
240 | */ | |
241 | static void default_disable(unsigned int irq) | |
242 | { | |
dd87eb3a TG |
243 | } |
244 | ||
245 | /* | |
246 | * default startup function | |
247 | */ | |
248 | static unsigned int default_startup(unsigned int irq) | |
249 | { | |
08678b08 YL |
250 | struct irq_desc *desc; |
251 | ||
252 | desc = irq_to_desc(irq); | |
253 | desc->chip->enable(irq); | |
dd87eb3a TG |
254 | |
255 | return 0; | |
256 | } | |
257 | ||
89d694b9 TG |
258 | /* |
259 | * default shutdown function | |
260 | */ | |
261 | static void default_shutdown(unsigned int irq) | |
262 | { | |
08678b08 | 263 | struct irq_desc *desc; |
89d694b9 | 264 | |
08678b08 | 265 | desc = irq_to_desc(irq); |
89d694b9 TG |
266 | desc->chip->mask(irq); |
267 | desc->status |= IRQ_MASKED; | |
268 | } | |
269 | ||
dd87eb3a TG |
270 | /* |
271 | * Fixup enable/disable function pointers | |
272 | */ | |
273 | void irq_chip_set_defaults(struct irq_chip *chip) | |
274 | { | |
275 | if (!chip->enable) | |
276 | chip->enable = default_enable; | |
277 | if (!chip->disable) | |
278 | chip->disable = default_disable; | |
279 | if (!chip->startup) | |
280 | chip->startup = default_startup; | |
89d694b9 TG |
281 | /* |
282 | * We use chip->disable, when the user provided its own. When | |
283 | * we have default_disable set for chip->disable, then we need | |
284 | * to use default_shutdown, otherwise the irq line is not | |
285 | * disabled on free_irq(): | |
286 | */ | |
dd87eb3a | 287 | if (!chip->shutdown) |
89d694b9 TG |
288 | chip->shutdown = chip->disable != default_disable ? |
289 | chip->disable : default_shutdown; | |
dd87eb3a TG |
290 | if (!chip->name) |
291 | chip->name = chip->typename; | |
b86432b4 ZY |
292 | if (!chip->end) |
293 | chip->end = dummy_irq_chip.end; | |
dd87eb3a TG |
294 | } |
295 | ||
296 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | |
297 | { | |
298 | if (desc->chip->mask_ack) | |
299 | desc->chip->mask_ack(irq); | |
300 | else { | |
301 | desc->chip->mask(irq); | |
302 | desc->chip->ack(irq); | |
303 | } | |
304 | } | |
305 | ||
306 | /** | |
307 | * handle_simple_irq - Simple and software-decoded IRQs. | |
308 | * @irq: the interrupt number | |
309 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
310 | * |
311 | * Simple interrupts are either sent from a demultiplexing interrupt | |
312 | * handler or come from hardware, where no interrupt hardware control | |
313 | * is necessary. | |
314 | * | |
315 | * Note: The caller is expected to handle the ack, clear, mask and | |
316 | * unmask issues if necessary. | |
317 | */ | |
7ad5b3a5 | 318 | void |
7d12e780 | 319 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
320 | { |
321 | struct irqaction *action; | |
322 | irqreturn_t action_ret; | |
dd87eb3a TG |
323 | |
324 | spin_lock(&desc->lock); | |
325 | ||
326 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
327 | goto out_unlock; | |
971e5b35 | 328 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 329 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
330 | |
331 | action = desc->action; | |
971e5b35 | 332 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
dd87eb3a TG |
333 | goto out_unlock; |
334 | ||
335 | desc->status |= IRQ_INPROGRESS; | |
336 | spin_unlock(&desc->lock); | |
337 | ||
7d12e780 | 338 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 339 | if (!noirqdebug) |
7d12e780 | 340 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
341 | |
342 | spin_lock(&desc->lock); | |
343 | desc->status &= ~IRQ_INPROGRESS; | |
344 | out_unlock: | |
345 | spin_unlock(&desc->lock); | |
346 | } | |
347 | ||
348 | /** | |
349 | * handle_level_irq - Level type irq handler | |
350 | * @irq: the interrupt number | |
351 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
352 | * |
353 | * Level type interrupts are active as long as the hardware line has | |
354 | * the active level. This may require to mask the interrupt and unmask | |
355 | * it after the associated handler has acknowledged the device, so the | |
356 | * interrupt line is back to inactive. | |
357 | */ | |
7ad5b3a5 | 358 | void |
7d12e780 | 359 | handle_level_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 360 | { |
dd87eb3a TG |
361 | struct irqaction *action; |
362 | irqreturn_t action_ret; | |
363 | ||
364 | spin_lock(&desc->lock); | |
365 | mask_ack_irq(desc, irq); | |
366 | ||
367 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
86998aa6 | 368 | goto out_unlock; |
dd87eb3a | 369 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 370 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
371 | |
372 | /* | |
373 | * If its disabled or no action available | |
374 | * keep it masked and get out of here | |
375 | */ | |
376 | action = desc->action; | |
49663421 | 377 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
86998aa6 | 378 | goto out_unlock; |
dd87eb3a TG |
379 | |
380 | desc->status |= IRQ_INPROGRESS; | |
381 | spin_unlock(&desc->lock); | |
382 | ||
7d12e780 | 383 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 384 | if (!noirqdebug) |
7d12e780 | 385 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
386 | |
387 | spin_lock(&desc->lock); | |
388 | desc->status &= ~IRQ_INPROGRESS; | |
dd87eb3a TG |
389 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
390 | desc->chip->unmask(irq); | |
86998aa6 | 391 | out_unlock: |
dd87eb3a TG |
392 | spin_unlock(&desc->lock); |
393 | } | |
394 | ||
395 | /** | |
47c2a3aa | 396 | * handle_fasteoi_irq - irq handler for transparent controllers |
dd87eb3a TG |
397 | * @irq: the interrupt number |
398 | * @desc: the interrupt description structure for this irq | |
dd87eb3a | 399 | * |
47c2a3aa | 400 | * Only a single callback will be issued to the chip: an ->eoi() |
dd87eb3a TG |
401 | * call when the interrupt has been serviced. This enables support |
402 | * for modern forms of interrupt handlers, which handle the flow | |
403 | * details in hardware, transparently. | |
404 | */ | |
7ad5b3a5 | 405 | void |
7d12e780 | 406 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 407 | { |
dd87eb3a TG |
408 | struct irqaction *action; |
409 | irqreturn_t action_ret; | |
410 | ||
411 | spin_lock(&desc->lock); | |
412 | ||
413 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
414 | goto out; | |
415 | ||
416 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
d6c88a50 | 417 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
418 | |
419 | /* | |
420 | * If its disabled or no action available | |
76d21601 | 421 | * then mask it and get out of here: |
dd87eb3a TG |
422 | */ |
423 | action = desc->action; | |
98bb244b BH |
424 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
425 | desc->status |= IRQ_PENDING; | |
76d21601 IM |
426 | if (desc->chip->mask) |
427 | desc->chip->mask(irq); | |
dd87eb3a | 428 | goto out; |
98bb244b | 429 | } |
dd87eb3a TG |
430 | |
431 | desc->status |= IRQ_INPROGRESS; | |
98bb244b | 432 | desc->status &= ~IRQ_PENDING; |
dd87eb3a TG |
433 | spin_unlock(&desc->lock); |
434 | ||
7d12e780 | 435 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 436 | if (!noirqdebug) |
7d12e780 | 437 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
438 | |
439 | spin_lock(&desc->lock); | |
440 | desc->status &= ~IRQ_INPROGRESS; | |
441 | out: | |
47c2a3aa | 442 | desc->chip->eoi(irq); |
dd87eb3a TG |
443 | |
444 | spin_unlock(&desc->lock); | |
445 | } | |
446 | ||
447 | /** | |
448 | * handle_edge_irq - edge type IRQ handler | |
449 | * @irq: the interrupt number | |
450 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
451 | * |
452 | * Interrupt occures on the falling and/or rising edge of a hardware | |
453 | * signal. The occurence is latched into the irq controller hardware | |
454 | * and must be acked in order to be reenabled. After the ack another | |
455 | * interrupt can happen on the same source even before the first one | |
456 | * is handled by the assosiacted event handler. If this happens it | |
457 | * might be necessary to disable (mask) the interrupt depending on the | |
458 | * controller hardware. This requires to reenable the interrupt inside | |
459 | * of the loop which handles the interrupts which have arrived while | |
460 | * the handler was running. If all pending interrupts are handled, the | |
461 | * loop is left. | |
462 | */ | |
7ad5b3a5 | 463 | void |
7d12e780 | 464 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 465 | { |
dd87eb3a TG |
466 | spin_lock(&desc->lock); |
467 | ||
468 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
469 | ||
470 | /* | |
471 | * If we're currently running this IRQ, or its disabled, | |
472 | * we shouldn't process the IRQ. Mark it pending, handle | |
473 | * the necessary masking and go out | |
474 | */ | |
475 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | |
476 | !desc->action)) { | |
477 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | |
478 | mask_ack_irq(desc, irq); | |
479 | goto out_unlock; | |
480 | } | |
d6c88a50 | 481 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
482 | |
483 | /* Start handling the irq */ | |
484 | desc->chip->ack(irq); | |
485 | ||
486 | /* Mark the IRQ currently in progress.*/ | |
487 | desc->status |= IRQ_INPROGRESS; | |
488 | ||
489 | do { | |
490 | struct irqaction *action = desc->action; | |
491 | irqreturn_t action_ret; | |
492 | ||
493 | if (unlikely(!action)) { | |
494 | desc->chip->mask(irq); | |
495 | goto out_unlock; | |
496 | } | |
497 | ||
498 | /* | |
499 | * When another irq arrived while we were handling | |
500 | * one, we could have masked the irq. | |
501 | * Renable it, if it was not disabled in meantime. | |
502 | */ | |
503 | if (unlikely((desc->status & | |
504 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | |
505 | (IRQ_PENDING | IRQ_MASKED))) { | |
506 | desc->chip->unmask(irq); | |
507 | desc->status &= ~IRQ_MASKED; | |
508 | } | |
509 | ||
510 | desc->status &= ~IRQ_PENDING; | |
511 | spin_unlock(&desc->lock); | |
7d12e780 | 512 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 513 | if (!noirqdebug) |
7d12e780 | 514 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
515 | spin_lock(&desc->lock); |
516 | ||
517 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | |
518 | ||
519 | desc->status &= ~IRQ_INPROGRESS; | |
520 | out_unlock: | |
521 | spin_unlock(&desc->lock); | |
522 | } | |
523 | ||
dd87eb3a TG |
524 | /** |
525 | * handle_percpu_IRQ - Per CPU local irq handler | |
526 | * @irq: the interrupt number | |
527 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
528 | * |
529 | * Per CPU interrupts on SMP machines without locking requirements | |
530 | */ | |
7ad5b3a5 | 531 | void |
7d12e780 | 532 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
533 | { |
534 | irqreturn_t action_ret; | |
535 | ||
d6c88a50 | 536 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
537 | |
538 | if (desc->chip->ack) | |
539 | desc->chip->ack(irq); | |
540 | ||
7d12e780 | 541 | action_ret = handle_IRQ_event(irq, desc->action); |
dd87eb3a | 542 | if (!noirqdebug) |
7d12e780 | 543 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
544 | |
545 | if (desc->chip->eoi) | |
546 | desc->chip->eoi(irq); | |
547 | } | |
548 | ||
dd87eb3a | 549 | void |
a460e745 IM |
550 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
551 | const char *name) | |
dd87eb3a TG |
552 | { |
553 | struct irq_desc *desc; | |
554 | unsigned long flags; | |
555 | ||
cb5bc832 | 556 | desc = irq_to_desc(irq); |
7d94f7ca | 557 | if (!desc) { |
dd87eb3a TG |
558 | printk(KERN_ERR |
559 | "Trying to install type control for IRQ%d\n", irq); | |
560 | return; | |
561 | } | |
562 | ||
dd87eb3a TG |
563 | if (!handle) |
564 | handle = handle_bad_irq; | |
9d7ac8be | 565 | else if (desc->chip == &no_irq_chip) { |
f8b5473f | 566 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
b039db8e | 567 | "for IRQ%d\n", is_chained ? "chained " : "", irq); |
f8b5473f TG |
568 | /* |
569 | * Some ARM implementations install a handler for really dumb | |
570 | * interrupt hardware without setting an irq_chip. This worked | |
571 | * with the ARM no_irq_chip but the check in setup_irq would | |
572 | * prevent us to setup the interrupt at all. Switch it to | |
573 | * dummy_irq_chip for easy transition. | |
574 | */ | |
575 | desc->chip = &dummy_irq_chip; | |
576 | } | |
dd87eb3a TG |
577 | |
578 | spin_lock_irqsave(&desc->lock, flags); | |
579 | ||
580 | /* Uninstall? */ | |
581 | if (handle == handle_bad_irq) { | |
5575ddf7 JB |
582 | if (desc->chip != &no_irq_chip) |
583 | mask_ack_irq(desc, irq); | |
dd87eb3a TG |
584 | desc->status |= IRQ_DISABLED; |
585 | desc->depth = 1; | |
586 | } | |
587 | desc->handle_irq = handle; | |
a460e745 | 588 | desc->name = name; |
dd87eb3a TG |
589 | |
590 | if (handle != handle_bad_irq && is_chained) { | |
591 | desc->status &= ~IRQ_DISABLED; | |
592 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | |
593 | desc->depth = 0; | |
7e6e178a | 594 | desc->chip->startup(irq); |
dd87eb3a TG |
595 | } |
596 | spin_unlock_irqrestore(&desc->lock, flags); | |
597 | } | |
598 | ||
599 | void | |
600 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
57a58a94 | 601 | irq_flow_handler_t handle) |
dd87eb3a TG |
602 | { |
603 | set_irq_chip(irq, chip); | |
a460e745 | 604 | __set_irq_handler(irq, handle, 0, NULL); |
dd87eb3a TG |
605 | } |
606 | ||
a460e745 IM |
607 | void |
608 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | |
609 | irq_flow_handler_t handle, const char *name) | |
dd87eb3a | 610 | { |
a460e745 IM |
611 | set_irq_chip(irq, chip); |
612 | __set_irq_handler(irq, handle, 0, name); | |
dd87eb3a | 613 | } |
46f4f8f6 RB |
614 | |
615 | void __init set_irq_noprobe(unsigned int irq) | |
616 | { | |
617 | struct irq_desc *desc; | |
618 | unsigned long flags; | |
619 | ||
cb5bc832 | 620 | desc = irq_to_desc(irq); |
7d94f7ca | 621 | if (!desc) { |
46f4f8f6 RB |
622 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); |
623 | ||
624 | return; | |
625 | } | |
626 | ||
46f4f8f6 RB |
627 | spin_lock_irqsave(&desc->lock, flags); |
628 | desc->status |= IRQ_NOPROBE; | |
629 | spin_unlock_irqrestore(&desc->lock, flags); | |
630 | } | |
631 | ||
632 | void __init set_irq_probe(unsigned int irq) | |
633 | { | |
634 | struct irq_desc *desc; | |
635 | unsigned long flags; | |
636 | ||
cb5bc832 | 637 | desc = irq_to_desc(irq); |
7d94f7ca | 638 | if (!desc) { |
46f4f8f6 RB |
639 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); |
640 | ||
641 | return; | |
642 | } | |
643 | ||
46f4f8f6 RB |
644 | spin_lock_irqsave(&desc->lock, flags); |
645 | desc->status &= ~IRQ_NOPROBE; | |
646 | spin_unlock_irqrestore(&desc->lock, flags); | |
647 | } |