]> bbs.cooldavid.org Git - net-next-2.6.git/blame - include/linux/perf_event.h
perf_event: Add alignment-faults and emulation-faults software events
[net-next-2.6.git] / include / linux / perf_event.h
CommitLineData
0793a61d 1/*
57c0c15b 2 * Performance events:
0793a61d 3 *
a308444c
IM
4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
0793a61d 7 *
57c0c15b 8 * Data type definitions, declarations, prototypes.
0793a61d 9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d 11 *
57c0c15b 12 * For licencing details see kernel-base/COPYING
0793a61d 13 */
cdd6c482
IM
14#ifndef _LINUX_PERF_EVENT_H
15#define _LINUX_PERF_EVENT_H
0793a61d 16
f3dfd265
PM
17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
0793a61d
TG
20
21/*
9f66a381
IM
22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
a308444c
IM
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
b8e83514 34
a308444c 35 PERF_TYPE_MAX, /* non-ABI */
b8e83514 36};
6c594c21 37
b8e83514 38/*
cdd6c482
IM
39 * Generalized performance event event_id types, used by the
40 * attr.event_id parameter of the sys_perf_event_open()
a308444c 41 * syscall:
b8e83514 42 */
1c432d89 43enum perf_hw_id {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
f4dbfa8f
PZ
47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
54
a308444c 55 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 56};
e077df4f 57
8326f44d 58/*
cdd6c482 59 * Generalized hardware cache events:
8326f44d 60 *
8be6e8f3 61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
8326f44d
IM
62 * { read, write, prefetch } x
63 * { accesses, misses }
64 */
1c432d89 65enum perf_hw_cache_id {
a308444c
IM
66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
72
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
8326f44d
IM
74};
75
1c432d89 76enum perf_hw_cache_op_id {
a308444c
IM
77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 80
a308444c 81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
8326f44d
IM
82};
83
1c432d89
PZ
84enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 87
a308444c 88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
8326f44d
IM
89};
90
b8e83514 91/*
cdd6c482
IM
92 * Special "software" events provided by the kernel, even if the hardware
93 * does not support performance events. These events measure various
b8e83514
PZ
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
96 */
1c432d89 97enum perf_sw_ids {
a308444c
IM
98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
f7d79860
AB
105 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
106 PERF_COUNT_SW_EMULATION_FAULTS = 8,
a308444c
IM
107
108 PERF_COUNT_SW_MAX, /* non-ABI */
0793a61d
TG
109};
110
8a057d84 111/*
0d48696f 112 * Bits that can be set in attr.sample_type to request information
8a057d84
PZ
113 * in the overflow packets.
114 */
cdd6c482 115enum perf_event_sample_format {
a308444c
IM
116 PERF_SAMPLE_IP = 1U << 0,
117 PERF_SAMPLE_TID = 1U << 1,
118 PERF_SAMPLE_TIME = 1U << 2,
119 PERF_SAMPLE_ADDR = 1U << 3,
3dab77fb 120 PERF_SAMPLE_READ = 1U << 4,
a308444c
IM
121 PERF_SAMPLE_CALLCHAIN = 1U << 5,
122 PERF_SAMPLE_ID = 1U << 6,
123 PERF_SAMPLE_CPU = 1U << 7,
124 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 125 PERF_SAMPLE_STREAM_ID = 1U << 9,
3a43ce68 126 PERF_SAMPLE_RAW = 1U << 10,
974802ea 127
f413cdb8 128 PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
8a057d84
PZ
129};
130
53cfbf59 131/*
cdd6c482 132 * The format of the data returned by read() on a perf event fd,
3dab77fb
PZ
133 * as specified by attr.read_format:
134 *
135 * struct read_format {
57c0c15b
IM
136 * { u64 value;
137 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
138 * { u64 time_running; } && PERF_FORMAT_RUNNING
139 * { u64 id; } && PERF_FORMAT_ID
140 * } && !PERF_FORMAT_GROUP
3dab77fb 141 *
57c0c15b
IM
142 * { u64 nr;
143 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
144 * { u64 time_running; } && PERF_FORMAT_RUNNING
145 * { u64 value;
146 * { u64 id; } && PERF_FORMAT_ID
147 * } cntr[nr];
148 * } && PERF_FORMAT_GROUP
3dab77fb 149 * };
53cfbf59 150 */
cdd6c482 151enum perf_event_read_format {
a308444c
IM
152 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
153 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
154 PERF_FORMAT_ID = 1U << 2,
3dab77fb 155 PERF_FORMAT_GROUP = 1U << 3,
974802ea 156
57c0c15b 157 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
53cfbf59
PM
158};
159
974802ea
PZ
160#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
161
9f66a381 162/*
cdd6c482 163 * Hardware event_id to monitor via a performance monitoring event:
9f66a381 164 */
cdd6c482 165struct perf_event_attr {
974802ea 166
f4a2deb4 167 /*
a21ca2ca
IM
168 * Major type: hardware/software/tracepoint/etc.
169 */
170 __u32 type;
974802ea
PZ
171
172 /*
173 * Size of the attr structure, for fwd/bwd compat.
174 */
175 __u32 size;
a21ca2ca
IM
176
177 /*
178 * Type specific configuration information.
f4a2deb4
PZ
179 */
180 __u64 config;
9f66a381 181
60db5e09 182 union {
b23f3325
PZ
183 __u64 sample_period;
184 __u64 sample_freq;
60db5e09
PZ
185 };
186
b23f3325
PZ
187 __u64 sample_type;
188 __u64 read_format;
9f66a381 189
2743a5b0 190 __u64 disabled : 1, /* off by default */
0475f9ea
PM
191 inherit : 1, /* children inherit it */
192 pinned : 1, /* must always be on PMU */
193 exclusive : 1, /* only group on PMU */
194 exclude_user : 1, /* don't count user */
195 exclude_kernel : 1, /* ditto kernel */
196 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 197 exclude_idle : 1, /* don't count when idle */
0a4a9391 198 mmap : 1, /* include mmap data */
8d1b2d93 199 comm : 1, /* include comm data */
60db5e09 200 freq : 1, /* use freq, not period */
bfbd3381 201 inherit_stat : 1, /* per task counts */
57e7986e 202 enable_on_exec : 1, /* next exec enables */
9f498cc5 203 task : 1, /* trace fork/exit */
2667de81 204 watermark : 1, /* wakeup_watermark */
0475f9ea 205
2667de81 206 __reserved_1 : 49;
2743a5b0 207
2667de81
PZ
208 union {
209 __u32 wakeup_events; /* wakeup every n events */
210 __u32 wakeup_watermark; /* bytes before wakeup */
211 };
974802ea 212 __u32 __reserved_2;
9f66a381 213
974802ea 214 __u64 __reserved_3;
eab656ae
TG
215};
216
d859e29f 217/*
cdd6c482 218 * Ioctls that can be done on a perf event fd:
d859e29f 219 */
cdd6c482 220#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
57c0c15b
IM
221#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
222#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
cdd6c482
IM
223#define PERF_EVENT_IOC_RESET _IO ('$', 3)
224#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, u64)
225#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
226
227enum perf_event_ioc_flags {
3df5edad
PZ
228 PERF_IOC_FLAG_GROUP = 1U << 0,
229};
d859e29f 230
37d81828
PM
231/*
232 * Structure of the page that can be mapped via mmap
233 */
cdd6c482 234struct perf_event_mmap_page {
37d81828
PM
235 __u32 version; /* version number of this structure */
236 __u32 compat_version; /* lowest version this is compat with */
38ff667b
PZ
237
238 /*
cdd6c482 239 * Bits needed to read the hw events in user-space.
38ff667b 240 *
92f22a38
PZ
241 * u32 seq;
242 * s64 count;
38ff667b 243 *
a2e87d06
PZ
244 * do {
245 * seq = pc->lock;
38ff667b 246 *
a2e87d06
PZ
247 * barrier()
248 * if (pc->index) {
249 * count = pmc_read(pc->index - 1);
250 * count += pc->offset;
251 * } else
252 * goto regular_read;
38ff667b 253 *
a2e87d06
PZ
254 * barrier();
255 * } while (pc->lock != seq);
38ff667b 256 *
92f22a38
PZ
257 * NOTE: for obvious reason this only works on self-monitoring
258 * processes.
38ff667b 259 */
37d81828 260 __u32 lock; /* seqlock for synchronization */
cdd6c482
IM
261 __u32 index; /* hardware event identifier */
262 __s64 offset; /* add to hardware event value */
263 __u64 time_enabled; /* time event active */
264 __u64 time_running; /* time event on cpu */
7b732a75 265
41f95331
PZ
266 /*
267 * Hole for extension of the self monitor capabilities
268 */
269
7f8b4e4e 270 __u64 __reserved[123]; /* align to 1k */
41f95331 271
38ff667b
PZ
272 /*
273 * Control data for the mmap() data buffer.
274 *
43a21ea8
PZ
275 * User-space reading the @data_head value should issue an rmb(), on
276 * SMP capable platforms, after reading this value -- see
cdd6c482 277 * perf_event_wakeup().
43a21ea8
PZ
278 *
279 * When the mapping is PROT_WRITE the @data_tail value should be
280 * written by userspace to reflect the last read data. In this case
281 * the kernel will not over-write unread data.
38ff667b 282 */
8e3747c1 283 __u64 data_head; /* head in the data section */
43a21ea8 284 __u64 data_tail; /* user-space written tail */
37d81828
PM
285};
286
cdd6c482
IM
287#define PERF_RECORD_MISC_CPUMODE_MASK (3 << 0)
288#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
289#define PERF_RECORD_MISC_KERNEL (1 << 0)
290#define PERF_RECORD_MISC_USER (2 << 0)
291#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
6fab0192 292
5c148194
PZ
293struct perf_event_header {
294 __u32 type;
6fab0192
PZ
295 __u16 misc;
296 __u16 size;
5c148194
PZ
297};
298
299enum perf_event_type {
5ed00415 300
0c593b34
PZ
301 /*
302 * The MMAP events record the PROT_EXEC mappings so that we can
303 * correlate userspace IPs to code. They have the following structure:
304 *
305 * struct {
0127c3ea 306 * struct perf_event_header header;
0c593b34 307 *
0127c3ea
IM
308 * u32 pid, tid;
309 * u64 addr;
310 * u64 len;
311 * u64 pgoff;
312 * char filename[];
0c593b34
PZ
313 * };
314 */
cdd6c482 315 PERF_RECORD_MMAP = 1,
0a4a9391 316
43a21ea8
PZ
317 /*
318 * struct {
57c0c15b
IM
319 * struct perf_event_header header;
320 * u64 id;
321 * u64 lost;
43a21ea8
PZ
322 * };
323 */
cdd6c482 324 PERF_RECORD_LOST = 2,
43a21ea8 325
8d1b2d93
PZ
326 /*
327 * struct {
0127c3ea 328 * struct perf_event_header header;
8d1b2d93 329 *
0127c3ea
IM
330 * u32 pid, tid;
331 * char comm[];
8d1b2d93
PZ
332 * };
333 */
cdd6c482 334 PERF_RECORD_COMM = 3,
8d1b2d93 335
9f498cc5
PZ
336 /*
337 * struct {
338 * struct perf_event_header header;
339 * u32 pid, ppid;
340 * u32 tid, ptid;
393b2ad8 341 * u64 time;
9f498cc5
PZ
342 * };
343 */
cdd6c482 344 PERF_RECORD_EXIT = 4,
9f498cc5 345
26b119bc
PZ
346 /*
347 * struct {
0127c3ea
IM
348 * struct perf_event_header header;
349 * u64 time;
689802b2 350 * u64 id;
7f453c24 351 * u64 stream_id;
a78ac325
PZ
352 * };
353 */
cdd6c482
IM
354 PERF_RECORD_THROTTLE = 5,
355 PERF_RECORD_UNTHROTTLE = 6,
a78ac325 356
60313ebe
PZ
357 /*
358 * struct {
a21ca2ca
IM
359 * struct perf_event_header header;
360 * u32 pid, ppid;
9f498cc5 361 * u32 tid, ptid;
a6f10a2f 362 * u64 time;
60313ebe
PZ
363 * };
364 */
cdd6c482 365 PERF_RECORD_FORK = 7,
60313ebe 366
38b200d6
PZ
367 /*
368 * struct {
369 * struct perf_event_header header;
370 * u32 pid, tid;
3dab77fb
PZ
371 *
372 * struct read_format values;
38b200d6
PZ
373 * };
374 */
cdd6c482 375 PERF_RECORD_READ = 8,
38b200d6 376
8a057d84 377 /*
0c593b34 378 * struct {
0127c3ea 379 * struct perf_event_header header;
0c593b34 380 *
43a21ea8
PZ
381 * { u64 ip; } && PERF_SAMPLE_IP
382 * { u32 pid, tid; } && PERF_SAMPLE_TID
383 * { u64 time; } && PERF_SAMPLE_TIME
384 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 385 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 386 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 387 * { u32 cpu, res; } && PERF_SAMPLE_CPU
57c0c15b 388 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 389 *
3dab77fb 390 * { struct read_format values; } && PERF_SAMPLE_READ
0c593b34 391 *
f9188e02 392 * { u64 nr,
43a21ea8 393 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
3dab77fb 394 *
57c0c15b
IM
395 * #
396 * # The RAW record below is opaque data wrt the ABI
397 * #
398 * # That is, the ABI doesn't make any promises wrt to
399 * # the stability of its content, it may vary depending
400 * # on event, hardware, kernel version and phase of
401 * # the moon.
402 * #
403 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
404 * #
3dab77fb 405 *
a044560c
PZ
406 * { u32 size;
407 * char data[size];}&& PERF_SAMPLE_RAW
0c593b34 408 * };
8a057d84 409 */
cdd6c482 410 PERF_RECORD_SAMPLE = 9,
e6e18ec7 411
cdd6c482 412 PERF_RECORD_MAX, /* non-ABI */
5c148194
PZ
413};
414
f9188e02
PZ
415enum perf_callchain_context {
416 PERF_CONTEXT_HV = (__u64)-32,
417 PERF_CONTEXT_KERNEL = (__u64)-128,
418 PERF_CONTEXT_USER = (__u64)-512,
7522060c 419
f9188e02
PZ
420 PERF_CONTEXT_GUEST = (__u64)-2048,
421 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
422 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
423
424 PERF_CONTEXT_MAX = (__u64)-4095,
7522060c
IM
425};
426
a4be7c27
PZ
427#define PERF_FLAG_FD_NO_GROUP (1U << 0)
428#define PERF_FLAG_FD_OUTPUT (1U << 1)
429
f3dfd265 430#ifdef __KERNEL__
9f66a381 431/*
f3dfd265 432 * Kernel-internal data types and definitions:
9f66a381
IM
433 */
434
cdd6c482
IM
435#ifdef CONFIG_PERF_EVENTS
436# include <asm/perf_event.h>
f3dfd265
PM
437#endif
438
439#include <linux/list.h>
440#include <linux/mutex.h>
441#include <linux/rculist.h>
442#include <linux/rcupdate.h>
443#include <linux/spinlock.h>
d6d020e9 444#include <linux/hrtimer.h>
3c446b3d 445#include <linux/fs.h>
709e50cf 446#include <linux/pid_namespace.h>
906010b2 447#include <linux/workqueue.h>
f3dfd265
PM
448#include <asm/atomic.h>
449
f9188e02
PZ
450#define PERF_MAX_STACK_DEPTH 255
451
452struct perf_callchain_entry {
453 __u64 nr;
454 __u64 ip[PERF_MAX_STACK_DEPTH];
455};
456
3a43ce68
FW
457struct perf_raw_record {
458 u32 size;
459 void *data;
f413cdb8
FW
460};
461
f3dfd265
PM
462struct task_struct;
463
0793a61d 464/**
cdd6c482 465 * struct hw_perf_event - performance event hardware details:
0793a61d 466 */
cdd6c482
IM
467struct hw_perf_event {
468#ifdef CONFIG_PERF_EVENTS
d6d020e9
PZ
469 union {
470 struct { /* hardware */
a308444c
IM
471 u64 config;
472 unsigned long config_base;
cdd6c482 473 unsigned long event_base;
a308444c 474 int idx;
d6d020e9
PZ
475 };
476 union { /* software */
a308444c
IM
477 atomic64_t count;
478 struct hrtimer hrtimer;
d6d020e9
PZ
479 };
480 };
ee06094f 481 atomic64_t prev_count;
b23f3325 482 u64 sample_period;
9e350de3 483 u64 last_period;
ee06094f 484 atomic64_t period_left;
60db5e09 485 u64 interrupts;
6a24ed6c
PZ
486
487 u64 freq_count;
488 u64 freq_interrupts;
bd2b5b12 489 u64 freq_stamp;
ee06094f 490#endif
0793a61d
TG
491};
492
cdd6c482 493struct perf_event;
621a01ea
IM
494
495/**
4aeb0b42 496 * struct pmu - generic performance monitoring unit
621a01ea 497 */
4aeb0b42 498struct pmu {
cdd6c482
IM
499 int (*enable) (struct perf_event *event);
500 void (*disable) (struct perf_event *event);
501 void (*read) (struct perf_event *event);
502 void (*unthrottle) (struct perf_event *event);
621a01ea
IM
503};
504
6a930700 505/**
cdd6c482 506 * enum perf_event_active_state - the states of a event
6a930700 507 */
cdd6c482 508enum perf_event_active_state {
57c0c15b 509 PERF_EVENT_STATE_ERROR = -2,
cdd6c482
IM
510 PERF_EVENT_STATE_OFF = -1,
511 PERF_EVENT_STATE_INACTIVE = 0,
57c0c15b 512 PERF_EVENT_STATE_ACTIVE = 1,
6a930700
IM
513};
514
9b51f66d
IM
515struct file;
516
7b732a75
PZ
517struct perf_mmap_data {
518 struct rcu_head rcu_head;
906010b2
PZ
519#ifdef CONFIG_PERF_USE_VMALLOC
520 struct work_struct work;
521#endif
522 int data_order;
8740f941 523 int nr_pages; /* nr of data pages */
43a21ea8 524 int writable; /* are we writable */
c5078f78 525 int nr_locked; /* nr pages mlocked */
8740f941 526
c33a0bc4 527 atomic_t poll; /* POLL_ for wakeups */
cdd6c482 528 atomic_t events; /* event_id limit */
8740f941 529
8e3747c1
PZ
530 atomic_long_t head; /* write position */
531 atomic_long_t done_head; /* completed head */
532
c33a0bc4 533 atomic_t lock; /* concurrent writes */
c66de4a5 534 atomic_t wakeup; /* needs a wakeup */
43a21ea8 535 atomic_t lost; /* nr records lost */
c66de4a5 536
2667de81
PZ
537 long watermark; /* wakeup watermark */
538
57c0c15b 539 struct perf_event_mmap_page *user_page;
0127c3ea 540 void *data_pages[0];
7b732a75
PZ
541};
542
671dec5d
PZ
543struct perf_pending_entry {
544 struct perf_pending_entry *next;
545 void (*func)(struct perf_pending_entry *);
925d519a
PZ
546};
547
0793a61d 548/**
cdd6c482 549 * struct perf_event - performance event kernel representation:
0793a61d 550 */
cdd6c482
IM
551struct perf_event {
552#ifdef CONFIG_PERF_EVENTS
65abc865 553 struct list_head group_entry;
592903cd 554 struct list_head event_entry;
04289bb9 555 struct list_head sibling_list;
0127c3ea 556 int nr_siblings;
cdd6c482
IM
557 struct perf_event *group_leader;
558 struct perf_event *output;
4aeb0b42 559 const struct pmu *pmu;
04289bb9 560
cdd6c482 561 enum perf_event_active_state state;
0793a61d 562 atomic64_t count;
ee06094f 563
53cfbf59 564 /*
cdd6c482 565 * These are the total time in nanoseconds that the event
53cfbf59 566 * has been enabled (i.e. eligible to run, and the task has
cdd6c482 567 * been scheduled in, if this is a per-task event)
53cfbf59
PM
568 * and running (scheduled onto the CPU), respectively.
569 *
570 * They are computed from tstamp_enabled, tstamp_running and
cdd6c482 571 * tstamp_stopped when the event is in INACTIVE or ACTIVE state.
53cfbf59
PM
572 */
573 u64 total_time_enabled;
574 u64 total_time_running;
575
576 /*
577 * These are timestamps used for computing total_time_enabled
cdd6c482 578 * and total_time_running when the event is in INACTIVE or
53cfbf59
PM
579 * ACTIVE state, measured in nanoseconds from an arbitrary point
580 * in time.
cdd6c482
IM
581 * tstamp_enabled: the notional time when the event was enabled
582 * tstamp_running: the notional time when the event was scheduled on
53cfbf59 583 * tstamp_stopped: in INACTIVE state, the notional time when the
cdd6c482 584 * event was scheduled off.
53cfbf59
PM
585 */
586 u64 tstamp_enabled;
587 u64 tstamp_running;
588 u64 tstamp_stopped;
589
cdd6c482
IM
590 struct perf_event_attr attr;
591 struct hw_perf_event hw;
0793a61d 592
cdd6c482 593 struct perf_event_context *ctx;
9b51f66d 594 struct file *filp;
0793a61d 595
53cfbf59
PM
596 /*
597 * These accumulate total time (in nanoseconds) that children
cdd6c482 598 * events have been enabled and running, respectively.
53cfbf59
PM
599 */
600 atomic64_t child_total_time_enabled;
601 atomic64_t child_total_time_running;
602
0793a61d 603 /*
d859e29f 604 * Protect attach/detach and child_list:
0793a61d 605 */
fccc714b
PZ
606 struct mutex child_mutex;
607 struct list_head child_list;
cdd6c482 608 struct perf_event *parent;
0793a61d
TG
609
610 int oncpu;
611 int cpu;
612
082ff5a2
PZ
613 struct list_head owner_entry;
614 struct task_struct *owner;
615
7b732a75
PZ
616 /* mmap bits */
617 struct mutex mmap_mutex;
618 atomic_t mmap_count;
619 struct perf_mmap_data *data;
37d81828 620
7b732a75 621 /* poll related */
0793a61d 622 wait_queue_head_t waitq;
3c446b3d 623 struct fasync_struct *fasync;
79f14641
PZ
624
625 /* delayed work for NMIs and such */
626 int pending_wakeup;
4c9e2542 627 int pending_kill;
79f14641 628 int pending_disable;
671dec5d 629 struct perf_pending_entry pending;
592903cd 630
79f14641
PZ
631 atomic_t event_limit;
632
cdd6c482 633 void (*destroy)(struct perf_event *);
592903cd 634 struct rcu_head rcu_head;
709e50cf
PZ
635
636 struct pid_namespace *ns;
8e5799b1 637 u64 id;
ee06094f 638#endif
0793a61d
TG
639};
640
641/**
cdd6c482 642 * struct perf_event_context - event context structure
0793a61d 643 *
cdd6c482 644 * Used as a container for task events and CPU events as well:
0793a61d 645 */
cdd6c482 646struct perf_event_context {
0793a61d 647 /*
cdd6c482 648 * Protect the states of the events in the list,
d859e29f 649 * nr_active, and the list:
0793a61d 650 */
a308444c 651 spinlock_t lock;
d859e29f 652 /*
cdd6c482 653 * Protect the list of events. Locking either mutex or lock
d859e29f
PM
654 * is sufficient to ensure the list doesn't change; to change
655 * the list you need to lock both the mutex and the spinlock.
656 */
a308444c 657 struct mutex mutex;
04289bb9 658
65abc865 659 struct list_head group_list;
a308444c 660 struct list_head event_list;
cdd6c482 661 int nr_events;
a308444c
IM
662 int nr_active;
663 int is_active;
bfbd3381 664 int nr_stat;
a308444c
IM
665 atomic_t refcount;
666 struct task_struct *task;
53cfbf59
PM
667
668 /*
4af4998b 669 * Context clock, runs when context enabled.
53cfbf59 670 */
a308444c
IM
671 u64 time;
672 u64 timestamp;
564c2b21
PM
673
674 /*
675 * These fields let us detect when two contexts have both
676 * been cloned (inherited) from a common ancestor.
677 */
cdd6c482 678 struct perf_event_context *parent_ctx;
a308444c
IM
679 u64 parent_gen;
680 u64 generation;
681 int pin_count;
682 struct rcu_head rcu_head;
0793a61d
TG
683};
684
685/**
cdd6c482 686 * struct perf_event_cpu_context - per cpu event context structure
0793a61d
TG
687 */
688struct perf_cpu_context {
cdd6c482
IM
689 struct perf_event_context ctx;
690 struct perf_event_context *task_ctx;
0793a61d
TG
691 int active_oncpu;
692 int max_pertask;
3b6f9e5c 693 int exclusive;
96f6d444
PZ
694
695 /*
696 * Recursion avoidance:
697 *
698 * task, softirq, irq, nmi context
699 */
22a4f650 700 int recursion[4];
0793a61d
TG
701};
702
5622f295 703struct perf_output_handle {
57c0c15b
IM
704 struct perf_event *event;
705 struct perf_mmap_data *data;
706 unsigned long head;
707 unsigned long offset;
708 int nmi;
709 int sample;
710 int locked;
711 unsigned long flags;
5622f295
MM
712};
713
cdd6c482 714#ifdef CONFIG_PERF_EVENTS
829b42dd 715
0793a61d
TG
716/*
717 * Set by architecture code:
718 */
cdd6c482 719extern int perf_max_events;
0793a61d 720
cdd6c482 721extern const struct pmu *hw_perf_event_init(struct perf_event *event);
621a01ea 722
cdd6c482
IM
723extern void perf_event_task_sched_in(struct task_struct *task, int cpu);
724extern void perf_event_task_sched_out(struct task_struct *task,
564c2b21 725 struct task_struct *next, int cpu);
cdd6c482
IM
726extern void perf_event_task_tick(struct task_struct *task, int cpu);
727extern int perf_event_init_task(struct task_struct *child);
728extern void perf_event_exit_task(struct task_struct *child);
729extern void perf_event_free_task(struct task_struct *task);
730extern void set_perf_event_pending(void);
731extern void perf_event_do_pending(void);
732extern void perf_event_print_debug(void);
9e35ad38
PZ
733extern void __perf_disable(void);
734extern bool __perf_enable(void);
735extern void perf_disable(void);
736extern void perf_enable(void);
cdd6c482
IM
737extern int perf_event_task_disable(void);
738extern int perf_event_task_enable(void);
739extern int hw_perf_group_sched_in(struct perf_event *group_leader,
3cbed429 740 struct perf_cpu_context *cpuctx,
cdd6c482
IM
741 struct perf_event_context *ctx, int cpu);
742extern void perf_event_update_userpage(struct perf_event *event);
5c92d124 743
df1a132b 744struct perf_sample_data {
5622f295
MM
745 u64 type;
746
747 u64 ip;
748 struct {
749 u32 pid;
750 u32 tid;
751 } tid_entry;
752 u64 time;
a308444c 753 u64 addr;
5622f295
MM
754 u64 id;
755 u64 stream_id;
756 struct {
757 u32 cpu;
758 u32 reserved;
759 } cpu_entry;
a308444c 760 u64 period;
5622f295 761 struct perf_callchain_entry *callchain;
3a43ce68 762 struct perf_raw_record *raw;
df1a132b
PZ
763};
764
5622f295
MM
765extern void perf_output_sample(struct perf_output_handle *handle,
766 struct perf_event_header *header,
767 struct perf_sample_data *data,
cdd6c482 768 struct perf_event *event);
5622f295
MM
769extern void perf_prepare_sample(struct perf_event_header *header,
770 struct perf_sample_data *data,
cdd6c482 771 struct perf_event *event,
5622f295
MM
772 struct pt_regs *regs);
773
cdd6c482 774extern int perf_event_overflow(struct perf_event *event, int nmi,
5622f295
MM
775 struct perf_sample_data *data,
776 struct pt_regs *regs);
df1a132b 777
3b6f9e5c 778/*
cdd6c482 779 * Return 1 for a software event, 0 for a hardware event
3b6f9e5c 780 */
cdd6c482 781static inline int is_software_event(struct perf_event *event)
3b6f9e5c 782{
cdd6c482
IM
783 return (event->attr.type != PERF_TYPE_RAW) &&
784 (event->attr.type != PERF_TYPE_HARDWARE) &&
785 (event->attr.type != PERF_TYPE_HW_CACHE);
3b6f9e5c
PM
786}
787
cdd6c482 788extern atomic_t perf_swevent_enabled[PERF_COUNT_SW_MAX];
f29ac756 789
cdd6c482 790extern void __perf_sw_event(u32, u64, int, struct pt_regs *, u64);
f29ac756
PZ
791
792static inline void
cdd6c482 793perf_sw_event(u32 event_id, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
f29ac756 794{
cdd6c482
IM
795 if (atomic_read(&perf_swevent_enabled[event_id]))
796 __perf_sw_event(event_id, nr, nmi, regs, addr);
f29ac756 797}
15dbf27c 798
cdd6c482 799extern void __perf_event_mmap(struct vm_area_struct *vma);
089dd79d 800
cdd6c482 801static inline void perf_event_mmap(struct vm_area_struct *vma)
089dd79d
PZ
802{
803 if (vma->vm_flags & VM_EXEC)
cdd6c482 804 __perf_event_mmap(vma);
089dd79d 805}
0a4a9391 806
cdd6c482
IM
807extern void perf_event_comm(struct task_struct *tsk);
808extern void perf_event_fork(struct task_struct *tsk);
8d1b2d93 809
394ee076
PZ
810extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
811
cdd6c482
IM
812extern int sysctl_perf_event_paranoid;
813extern int sysctl_perf_event_mlock;
814extern int sysctl_perf_event_sample_rate;
1ccd1549 815
cdd6c482
IM
816extern void perf_event_init(void);
817extern void perf_tp_event(int event_id, u64 addr, u64 count,
f4b5ffcc 818 void *record, int entry_size);
0d905bca 819
9d23a90a 820#ifndef perf_misc_flags
cdd6c482
IM
821#define perf_misc_flags(regs) (user_mode(regs) ? PERF_RECORD_MISC_USER : \
822 PERF_RECORD_MISC_KERNEL)
9d23a90a
PM
823#define perf_instruction_pointer(regs) instruction_pointer(regs)
824#endif
825
5622f295 826extern int perf_output_begin(struct perf_output_handle *handle,
cdd6c482 827 struct perf_event *event, unsigned int size,
5622f295
MM
828 int nmi, int sample);
829extern void perf_output_end(struct perf_output_handle *handle);
830extern void perf_output_copy(struct perf_output_handle *handle,
831 const void *buf, unsigned int len);
0793a61d
TG
832#else
833static inline void
cdd6c482 834perf_event_task_sched_in(struct task_struct *task, int cpu) { }
0793a61d 835static inline void
cdd6c482 836perf_event_task_sched_out(struct task_struct *task,
910431c7 837 struct task_struct *next, int cpu) { }
0793a61d 838static inline void
57c0c15b 839perf_event_task_tick(struct task_struct *task, int cpu) { }
cdd6c482
IM
840static inline int perf_event_init_task(struct task_struct *child) { return 0; }
841static inline void perf_event_exit_task(struct task_struct *child) { }
842static inline void perf_event_free_task(struct task_struct *task) { }
57c0c15b
IM
843static inline void perf_event_do_pending(void) { }
844static inline void perf_event_print_debug(void) { }
9e35ad38
PZ
845static inline void perf_disable(void) { }
846static inline void perf_enable(void) { }
57c0c15b
IM
847static inline int perf_event_task_disable(void) { return -EINVAL; }
848static inline int perf_event_task_enable(void) { return -EINVAL; }
15dbf27c 849
925d519a 850static inline void
cdd6c482 851perf_sw_event(u32 event_id, u64 nr, int nmi,
78f13e95 852 struct pt_regs *regs, u64 addr) { }
0a4a9391 853
57c0c15b 854static inline void perf_event_mmap(struct vm_area_struct *vma) { }
cdd6c482
IM
855static inline void perf_event_comm(struct task_struct *tsk) { }
856static inline void perf_event_fork(struct task_struct *tsk) { }
857static inline void perf_event_init(void) { }
5622f295 858
0793a61d
TG
859#endif
860
5622f295
MM
861#define perf_output_put(handle, x) \
862 perf_output_copy((handle), &(x), sizeof(x))
863
f3dfd265 864#endif /* __KERNEL__ */
cdd6c482 865#endif /* _LINUX_PERF_EVENT_H */