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0793a61d TG |
1 | /* |
2 | * Performance counters: | |
3 | * | |
4 | * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * Data type definitions, declarations, prototypes. | |
8 | * | |
9 | * Started by: Thomas Gleixner and Ingo Molnar | |
10 | * | |
11 | * For licencing details see kernel-base/COPYING | |
12 | */ | |
13 | #ifndef _LINUX_PERF_COUNTER_H | |
14 | #define _LINUX_PERF_COUNTER_H | |
15 | ||
f3dfd265 PM |
16 | #include <linux/types.h> |
17 | #include <linux/ioctl.h> | |
9aaa131a | 18 | #include <asm/byteorder.h> |
0793a61d TG |
19 | |
20 | /* | |
9f66a381 IM |
21 | * User-space ABI bits: |
22 | */ | |
23 | ||
24 | /* | |
b8e83514 | 25 | * hw_event.type |
0793a61d | 26 | */ |
b8e83514 PZ |
27 | enum perf_event_types { |
28 | PERF_TYPE_HARDWARE = 0, | |
29 | PERF_TYPE_SOFTWARE = 1, | |
30 | PERF_TYPE_TRACEPOINT = 2, | |
31 | ||
0793a61d | 32 | /* |
b8e83514 | 33 | * available TYPE space, raw is the max value. |
0793a61d | 34 | */ |
9f66a381 | 35 | |
b8e83514 PZ |
36 | PERF_TYPE_RAW = 128, |
37 | }; | |
6c594c21 | 38 | |
b8e83514 PZ |
39 | /* |
40 | * Generalized performance counter event types, used by the hw_event.event_id | |
41 | * parameter of the sys_perf_counter_open() syscall: | |
42 | */ | |
43 | enum hw_event_ids { | |
9f66a381 | 44 | /* |
b8e83514 | 45 | * Common hardware events, generalized by the kernel: |
9f66a381 | 46 | */ |
b8e83514 PZ |
47 | PERF_COUNT_CPU_CYCLES = 0, |
48 | PERF_COUNT_INSTRUCTIONS = 1, | |
49 | PERF_COUNT_CACHE_REFERENCES = 2, | |
50 | PERF_COUNT_CACHE_MISSES = 3, | |
51 | PERF_COUNT_BRANCH_INSTRUCTIONS = 4, | |
52 | PERF_COUNT_BRANCH_MISSES = 5, | |
53 | PERF_COUNT_BUS_CYCLES = 6, | |
54 | ||
55 | PERF_HW_EVENTS_MAX = 7, | |
56 | }; | |
e077df4f | 57 | |
b8e83514 PZ |
58 | /* |
59 | * Special "software" counters provided by the kernel, even if the hardware | |
60 | * does not support performance counters. These counters measure various | |
61 | * physical and sw events of the kernel (and allow the profiling of them as | |
62 | * well): | |
63 | */ | |
64 | enum sw_event_ids { | |
65 | PERF_COUNT_CPU_CLOCK = 0, | |
66 | PERF_COUNT_TASK_CLOCK = 1, | |
67 | PERF_COUNT_PAGE_FAULTS = 2, | |
68 | PERF_COUNT_CONTEXT_SWITCHES = 3, | |
69 | PERF_COUNT_CPU_MIGRATIONS = 4, | |
70 | PERF_COUNT_PAGE_FAULTS_MIN = 5, | |
71 | PERF_COUNT_PAGE_FAULTS_MAJ = 6, | |
72 | ||
73 | PERF_SW_EVENTS_MAX = 7, | |
0793a61d TG |
74 | }; |
75 | ||
76 | /* | |
77 | * IRQ-notification data record type: | |
78 | */ | |
9f66a381 | 79 | enum perf_counter_record_type { |
b8e83514 PZ |
80 | PERF_RECORD_SIMPLE = 0, |
81 | PERF_RECORD_IRQ = 1, | |
82 | PERF_RECORD_GROUP = 2, | |
0793a61d TG |
83 | }; |
84 | ||
9f66a381 IM |
85 | /* |
86 | * Hardware event to monitor via a performance monitoring counter: | |
87 | */ | |
88 | struct perf_counter_hw_event { | |
b8e83514 | 89 | union { |
9aaa131a | 90 | #ifndef __BIG_ENDIAN_BITFIELD |
b8e83514 PZ |
91 | struct { |
92 | __u64 event_id : 56, | |
93 | type : 8; | |
94 | }; | |
95 | struct { | |
96 | __u64 raw_event_id : 63, | |
97 | raw_type : 1; | |
98 | }; | |
9aaa131a PM |
99 | #else |
100 | struct { | |
101 | __u64 type : 8, | |
102 | event_id : 56; | |
103 | }; | |
104 | struct { | |
105 | __u64 raw_type : 1, | |
106 | raw_event_id : 63; | |
107 | }; | |
108 | #endif /* __BIT_ENDIAN_BITFIELD */ | |
b8e83514 PZ |
109 | __u64 event_config; |
110 | }; | |
9f66a381 | 111 | |
f3dfd265 | 112 | __u64 irq_period; |
2743a5b0 PM |
113 | __u64 record_type; |
114 | __u64 read_format; | |
9f66a381 | 115 | |
2743a5b0 | 116 | __u64 disabled : 1, /* off by default */ |
0475f9ea | 117 | nmi : 1, /* NMI sampling */ |
0475f9ea PM |
118 | inherit : 1, /* children inherit it */ |
119 | pinned : 1, /* must always be on PMU */ | |
120 | exclusive : 1, /* only group on PMU */ | |
121 | exclude_user : 1, /* don't count user */ | |
122 | exclude_kernel : 1, /* ditto kernel */ | |
123 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 124 | exclude_idle : 1, /* don't count when idle */ |
0475f9ea | 125 | |
b8e83514 | 126 | __reserved_1 : 55; |
2743a5b0 PM |
127 | |
128 | __u32 extra_config_len; | |
129 | __u32 __reserved_4; | |
9f66a381 | 130 | |
f3dfd265 | 131 | __u64 __reserved_2; |
2743a5b0 | 132 | __u64 __reserved_3; |
eab656ae TG |
133 | }; |
134 | ||
d859e29f PM |
135 | /* |
136 | * Ioctls that can be done on a perf counter fd: | |
137 | */ | |
138 | #define PERF_COUNTER_IOC_ENABLE _IO('$', 0) | |
139 | #define PERF_COUNTER_IOC_DISABLE _IO('$', 1) | |
140 | ||
f3dfd265 | 141 | #ifdef __KERNEL__ |
9f66a381 | 142 | /* |
f3dfd265 | 143 | * Kernel-internal data types and definitions: |
9f66a381 IM |
144 | */ |
145 | ||
f3dfd265 PM |
146 | #ifdef CONFIG_PERF_COUNTERS |
147 | # include <asm/perf_counter.h> | |
148 | #endif | |
149 | ||
150 | #include <linux/list.h> | |
151 | #include <linux/mutex.h> | |
152 | #include <linux/rculist.h> | |
153 | #include <linux/rcupdate.h> | |
154 | #include <linux/spinlock.h> | |
d6d020e9 | 155 | #include <linux/hrtimer.h> |
f3dfd265 PM |
156 | #include <asm/atomic.h> |
157 | ||
158 | struct task_struct; | |
159 | ||
0793a61d | 160 | /** |
9f66a381 | 161 | * struct hw_perf_counter - performance counter hardware details: |
0793a61d TG |
162 | */ |
163 | struct hw_perf_counter { | |
ee06094f | 164 | #ifdef CONFIG_PERF_COUNTERS |
d6d020e9 PZ |
165 | union { |
166 | struct { /* hardware */ | |
167 | u64 config; | |
168 | unsigned long config_base; | |
169 | unsigned long counter_base; | |
170 | int nmi; | |
171 | unsigned int idx; | |
172 | }; | |
173 | union { /* software */ | |
174 | atomic64_t count; | |
175 | struct hrtimer hrtimer; | |
176 | }; | |
177 | }; | |
ee06094f | 178 | atomic64_t prev_count; |
9f66a381 | 179 | u64 irq_period; |
ee06094f IM |
180 | atomic64_t period_left; |
181 | #endif | |
0793a61d TG |
182 | }; |
183 | ||
184 | /* | |
185 | * Hardcoded buffer length limit for now, for IRQ-fed events: | |
186 | */ | |
9f66a381 | 187 | #define PERF_DATA_BUFLEN 2048 |
0793a61d TG |
188 | |
189 | /** | |
190 | * struct perf_data - performance counter IRQ data sampling ... | |
191 | */ | |
192 | struct perf_data { | |
9f66a381 IM |
193 | int len; |
194 | int rd_idx; | |
195 | int overrun; | |
196 | u8 data[PERF_DATA_BUFLEN]; | |
0793a61d TG |
197 | }; |
198 | ||
621a01ea IM |
199 | struct perf_counter; |
200 | ||
201 | /** | |
202 | * struct hw_perf_counter_ops - performance counter hw ops | |
203 | */ | |
204 | struct hw_perf_counter_ops { | |
95cdd2e7 | 205 | int (*enable) (struct perf_counter *counter); |
7671581f IM |
206 | void (*disable) (struct perf_counter *counter); |
207 | void (*read) (struct perf_counter *counter); | |
621a01ea IM |
208 | }; |
209 | ||
6a930700 IM |
210 | /** |
211 | * enum perf_counter_active_state - the states of a counter | |
212 | */ | |
213 | enum perf_counter_active_state { | |
3b6f9e5c | 214 | PERF_COUNTER_STATE_ERROR = -2, |
6a930700 IM |
215 | PERF_COUNTER_STATE_OFF = -1, |
216 | PERF_COUNTER_STATE_INACTIVE = 0, | |
217 | PERF_COUNTER_STATE_ACTIVE = 1, | |
218 | }; | |
219 | ||
9b51f66d IM |
220 | struct file; |
221 | ||
0793a61d TG |
222 | /** |
223 | * struct perf_counter - performance counter kernel representation: | |
224 | */ | |
225 | struct perf_counter { | |
ee06094f | 226 | #ifdef CONFIG_PERF_COUNTERS |
04289bb9 | 227 | struct list_head list_entry; |
592903cd | 228 | struct list_head event_entry; |
04289bb9 IM |
229 | struct list_head sibling_list; |
230 | struct perf_counter *group_leader; | |
5c92d124 | 231 | const struct hw_perf_counter_ops *hw_ops; |
04289bb9 | 232 | |
6a930700 | 233 | enum perf_counter_active_state state; |
c07c99b6 | 234 | enum perf_counter_active_state prev_state; |
0793a61d | 235 | atomic64_t count; |
ee06094f | 236 | |
9f66a381 | 237 | struct perf_counter_hw_event hw_event; |
0793a61d TG |
238 | struct hw_perf_counter hw; |
239 | ||
240 | struct perf_counter_context *ctx; | |
241 | struct task_struct *task; | |
9b51f66d | 242 | struct file *filp; |
0793a61d | 243 | |
9b51f66d | 244 | struct perf_counter *parent; |
d859e29f PM |
245 | struct list_head child_list; |
246 | ||
0793a61d | 247 | /* |
d859e29f | 248 | * Protect attach/detach and child_list: |
0793a61d TG |
249 | */ |
250 | struct mutex mutex; | |
251 | ||
252 | int oncpu; | |
253 | int cpu; | |
254 | ||
0793a61d TG |
255 | /* read() / irq related data */ |
256 | wait_queue_head_t waitq; | |
257 | /* optional: for NMIs */ | |
258 | int wakeup_pending; | |
259 | struct perf_data *irqdata; | |
260 | struct perf_data *usrdata; | |
261 | struct perf_data data[2]; | |
592903cd | 262 | |
e077df4f | 263 | void (*destroy)(struct perf_counter *); |
592903cd | 264 | struct rcu_head rcu_head; |
ee06094f | 265 | #endif |
0793a61d TG |
266 | }; |
267 | ||
268 | /** | |
269 | * struct perf_counter_context - counter context structure | |
270 | * | |
271 | * Used as a container for task counters and CPU counters as well: | |
272 | */ | |
273 | struct perf_counter_context { | |
274 | #ifdef CONFIG_PERF_COUNTERS | |
275 | /* | |
d859e29f PM |
276 | * Protect the states of the counters in the list, |
277 | * nr_active, and the list: | |
0793a61d TG |
278 | */ |
279 | spinlock_t lock; | |
d859e29f PM |
280 | /* |
281 | * Protect the list of counters. Locking either mutex or lock | |
282 | * is sufficient to ensure the list doesn't change; to change | |
283 | * the list you need to lock both the mutex and the spinlock. | |
284 | */ | |
285 | struct mutex mutex; | |
04289bb9 IM |
286 | |
287 | struct list_head counter_list; | |
592903cd | 288 | struct list_head event_list; |
0793a61d TG |
289 | int nr_counters; |
290 | int nr_active; | |
d859e29f | 291 | int is_active; |
0793a61d TG |
292 | struct task_struct *task; |
293 | #endif | |
294 | }; | |
295 | ||
296 | /** | |
297 | * struct perf_counter_cpu_context - per cpu counter context structure | |
298 | */ | |
299 | struct perf_cpu_context { | |
300 | struct perf_counter_context ctx; | |
301 | struct perf_counter_context *task_ctx; | |
302 | int active_oncpu; | |
303 | int max_pertask; | |
3b6f9e5c | 304 | int exclusive; |
0793a61d TG |
305 | }; |
306 | ||
307 | /* | |
308 | * Set by architecture code: | |
309 | */ | |
310 | extern int perf_max_counters; | |
311 | ||
312 | #ifdef CONFIG_PERF_COUNTERS | |
5c92d124 | 313 | extern const struct hw_perf_counter_ops * |
621a01ea IM |
314 | hw_perf_counter_init(struct perf_counter *counter); |
315 | ||
0793a61d TG |
316 | extern void perf_counter_task_sched_in(struct task_struct *task, int cpu); |
317 | extern void perf_counter_task_sched_out(struct task_struct *task, int cpu); | |
318 | extern void perf_counter_task_tick(struct task_struct *task, int cpu); | |
9b51f66d IM |
319 | extern void perf_counter_init_task(struct task_struct *child); |
320 | extern void perf_counter_exit_task(struct task_struct *child); | |
0793a61d TG |
321 | extern void perf_counter_notify(struct pt_regs *regs); |
322 | extern void perf_counter_print_debug(void); | |
1b023a96 | 323 | extern void perf_counter_unthrottle(void); |
01b2838c IM |
324 | extern u64 hw_perf_save_disable(void); |
325 | extern void hw_perf_restore(u64 ctrl); | |
1d1c7ddb IM |
326 | extern int perf_counter_task_disable(void); |
327 | extern int perf_counter_task_enable(void); | |
3cbed429 PM |
328 | extern int hw_perf_group_sched_in(struct perf_counter *group_leader, |
329 | struct perf_cpu_context *cpuctx, | |
330 | struct perf_counter_context *ctx, int cpu); | |
5c92d124 | 331 | |
0322cd6e PZ |
332 | extern void perf_counter_output(struct perf_counter *counter, |
333 | int nmi, struct pt_regs *regs); | |
3b6f9e5c PM |
334 | /* |
335 | * Return 1 for a software counter, 0 for a hardware counter | |
336 | */ | |
337 | static inline int is_software_counter(struct perf_counter *counter) | |
338 | { | |
b8e83514 PZ |
339 | return !counter->hw_event.raw_type && |
340 | counter->hw_event.type != PERF_TYPE_HARDWARE; | |
3b6f9e5c PM |
341 | } |
342 | ||
b8e83514 | 343 | extern void perf_swcounter_event(u32, u64, int, struct pt_regs *); |
15dbf27c | 344 | |
0793a61d TG |
345 | #else |
346 | static inline void | |
347 | perf_counter_task_sched_in(struct task_struct *task, int cpu) { } | |
348 | static inline void | |
349 | perf_counter_task_sched_out(struct task_struct *task, int cpu) { } | |
350 | static inline void | |
351 | perf_counter_task_tick(struct task_struct *task, int cpu) { } | |
9b51f66d IM |
352 | static inline void perf_counter_init_task(struct task_struct *child) { } |
353 | static inline void perf_counter_exit_task(struct task_struct *child) { } | |
0793a61d TG |
354 | static inline void perf_counter_notify(struct pt_regs *regs) { } |
355 | static inline void perf_counter_print_debug(void) { } | |
1b023a96 | 356 | static inline void perf_counter_unthrottle(void) { } |
15dbf27c | 357 | static inline void hw_perf_restore(u64 ctrl) { } |
01b2838c | 358 | static inline u64 hw_perf_save_disable(void) { return 0; } |
1d1c7ddb IM |
359 | static inline int perf_counter_task_disable(void) { return -EINVAL; } |
360 | static inline int perf_counter_task_enable(void) { return -EINVAL; } | |
15dbf27c | 361 | |
b8e83514 | 362 | static inline void perf_swcounter_event(u32 event, u64 nr, |
15dbf27c | 363 | int nmi, struct pt_regs *regs) { } |
0793a61d TG |
364 | #endif |
365 | ||
f3dfd265 | 366 | #endif /* __KERNEL__ */ |
0793a61d | 367 | #endif /* _LINUX_PERF_COUNTER_H */ |