]> bbs.cooldavid.org Git - net-next-2.6.git/blame - include/linux/pci.h
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] PCI: quirk for asus a8v and a8v delux motherboards
[net-next-2.6.git] / include / linux / pci.h
CommitLineData
1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
20#include <linux/mod_devicetable.h>
21
4352dfd5
GKH		 22/* Include the pci register defines */
23#include <linux/pci_regs.h>
1da177e4
LT		 24
25/* Include the ID list */
1da177e4
LT		 26#include <linux/pci_ids.h>
27
28/*
29 * The PCI interface treats multi-function devices as independent
30 * devices. The slot/function address of each device is encoded
31 * in a single byte as follows:
32 *
33 * 7:3 = slot
34 * 2:0 = function
35 */
36#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
37#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
38#define PCI_FUNC(devfn) ((devfn) & 0x07)
39
40/* Ioctls for /proc/bus/pci/X/Y nodes. */
41#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
42#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
43#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
44#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
45#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
46
47#ifdef __KERNEL__
48
49#include <linux/types.h>
50#include <linux/config.h>
51#include <linux/ioport.h>
52#include <linux/list.h>
53#include <linux/errno.h>
54#include <linux/device.h>
55
56/* File state for mmap()s on /proc/bus/pci/X/Y */
57enum pci_mmap_state {
58 pci_mmap_io,
59 pci_mmap_mem
60};
61
62/* This defines the direction arg to the DMA mapping routines. */
63#define PCI_DMA_BIDIRECTIONAL 0
64#define PCI_DMA_TODEVICE 1
65#define PCI_DMA_FROMDEVICE 2
66#define PCI_DMA_NONE 3
67
68#define DEVICE_COUNT_COMPATIBLE 4
69#define DEVICE_COUNT_RESOURCE 12
70
71typedef int __bitwise pci_power_t;
72
4352dfd5
GKH		 73#define PCI_D0 ((pci_power_t __force) 0)
74#define PCI_D1 ((pci_power_t __force) 1)
75#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 76#define PCI_D3hot ((pci_power_t __force) 3)
77#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 78#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 79#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4 80
392a1ce7
LV		 81/** The pci_channel state describes connectivity between the CPU and
82 * the pci device. If some PCI bus between here and the pci device
83 * has crashed or locked up, this info is reflected here.
84 */
85typedef unsigned int __bitwise pci_channel_state_t;
86
87enum pci_channel_state {
88 /* I/O channel is in normal state */
89 pci_channel_io_normal = (__force pci_channel_state_t) 1,
90
91 /* I/O to channel is blocked */
92 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
93
94 /* PCI card is dead */
95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
96};
97
1da177e4
LT		 98/*
99 * The pci_dev structure is used to describe PCI devices.
100 */
101struct pci_dev {
102 struct list_head global_list; /* node in list of all PCI devices */
103 struct list_head bus_list; /* node in per-bus list */
104 struct pci_bus *bus; /* bus this device is on */
105 struct pci_bus *subordinate; /* bus this device bridges to */
106
107 void *sysdata; /* hook for sys-specific extension */
108 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
109
110 unsigned int devfn; /* encoded device & function index */
111 unsigned short vendor;
112 unsigned short device;
113 unsigned short subsystem_vendor;
114 unsigned short subsystem_device;
115 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
116 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
117 u8 rom_base_reg; /* which config register controls the ROM */
ffeff788 118 u8 pin; /* which interrupt pin this device uses */
1da177e4
LT		 119
120 struct pci_driver *driver; /* which driver has allocated this device */
121 u64 dma_mask; /* Mask of the bits of bus address this
122 device implements. Normally this is
123 0xffffffff. You only need to change
124 this if your device has broken DMA
125 or supports 64-bit transfers. */
126
127 pci_power_t current_state; /* Current operating state. In ACPI-speak,
128 this is D0-D3, D0 being fully functional,
129 and D3 being off. */
130
392a1ce7 131 pci_channel_state_t error_state; /* current connectivity state */
1da177e4
LT		 132 struct device dev; /* Generic device interface */
133
134 /* device is compatible with these IDs */
135 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
136 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
137
138 int cfg_size; /* Size of configuration space */
139
140 /*
141 * Instead of touching interrupt line and base address registers
142 * directly, use the values stored here. They might be different!
143 */
144 unsigned int irq;
145 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
146
147 /* These fields are used by common fixups */
148 unsigned int transparent:1; /* Transparent PCI bridge */
149 unsigned int multifunction:1;/* Part of multi-function device */
150 /* keep track of device state */
151 unsigned int is_enabled:1; /* pci_enable_device has been called */
152 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 153 unsigned int no_msi:1; /* device may not use msi */
e04b0ea2 154 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
4602b88d 155
1da177e4
LT		 156 u32 saved_config_space[16]; /* config space saved at suspend time */
157 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
158 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
159 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
1da177e4
LT		 160};
161
162#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
163#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
164#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
165#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
166
167/*
168 * For PCI devices, the region numbers are assigned this way:
169 *
170 * 0-5 standard PCI regions
171 * 6 expansion ROM
172 * 7-10 bridges: address space assigned to buses behind the bridge
173 */
174
4352dfd5
GKH		 175#define PCI_ROM_RESOURCE 6
176#define PCI_BRIDGE_RESOURCES 7
177#define PCI_NUM_RESOURCES 11
1da177e4
LT		 178
179#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 180#define PCI_BUS_NUM_RESOURCES 8
1da177e4 181#endif
4352dfd5
GKH		 182
183#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 184
185struct pci_bus {
186 struct list_head node; /* node in list of buses */
187 struct pci_bus *parent; /* parent bus this bridge is on */
188 struct list_head children; /* list of child buses */
189 struct list_head devices; /* list of devices on this bus */
190 struct pci_dev *self; /* bridge device as seen by parent */
191 struct resource *resource[PCI_BUS_NUM_RESOURCES];
192 /* address space routed to this bus */
193
194 struct pci_ops *ops; /* configuration access functions */
195 void *sysdata; /* hook for sys-specific extension */
196 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
197
198 unsigned char number; /* bus number */
199 unsigned char primary; /* number of primary bridge */
200 unsigned char secondary; /* number of secondary bridge */
201 unsigned char subordinate; /* max number of subordinate buses */
202
203 char name[48];
204
205 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
206 unsigned short pad2;
207 struct device *bridge;
208 struct class_device class_dev;
209 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
210 struct bin_attribute *legacy_mem; /* legacy mem */
211};
212
213#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
214#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
215
216/*
217 * Error values that may be returned by PCI functions.
218 */
219#define PCIBIOS_SUCCESSFUL 0x00
220#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
221#define PCIBIOS_BAD_VENDOR_ID 0x83
222#define PCIBIOS_DEVICE_NOT_FOUND 0x86
223#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
224#define PCIBIOS_SET_FAILED 0x88
225#define PCIBIOS_BUFFER_TOO_SMALL 0x89
226
227/* Low-level architecture-dependent routines */
228
229struct pci_ops {
230 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
231 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
232};
233
234struct pci_raw_ops {
235 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
236 int reg, int len, u32 *val);
237 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
238 int reg, int len, u32 val);
239};
240
241extern struct pci_raw_ops *raw_pci_ops;
242
243struct pci_bus_region {
244 unsigned long start;
245 unsigned long end;
246};
247
248struct pci_dynids {
249 spinlock_t lock; /* protects list, index */
250 struct list_head list; /* for IDs added at runtime */
251 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
252};
253
392a1ce7
LV		 254/* ---------------------------------------------------------------- */
255/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
256 * a set fof callbacks in struct pci_error_handlers, then that device driver
257 * will be notified of PCI bus errors, and will be driven to recovery
258 * when an error occurs.
259 */
260
261typedef unsigned int __bitwise pci_ers_result_t;
262
263enum pci_ers_result {
264 /* no result/none/not supported in device driver */
265 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
266
267 /* Device driver can recover without slot reset */
268 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
269
270 /* Device driver wants slot to be reset. */
271 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
272
273 /* Device has completely failed, is unrecoverable */
274 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
275
276 /* Device driver is fully recovered and operational */
277 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
278};
279
280/* PCI bus error event callbacks */
281struct pci_error_handlers
282{
283 /* PCI bus error detected on this device */
284 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
285 enum pci_channel_state error);
286
287 /* MMIO has been re-enabled, but not DMA */
288 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
289
290 /* PCI Express link has been reset */
291 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
292
293 /* PCI slot has been reset */
294 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
295
296 /* Device driver may resume normal operations */
297 void (*resume)(struct pci_dev *dev);
298};
299
300/* ---------------------------------------------------------------- */
301
1da177e4
LT		 302struct module;
303struct pci_driver {
304 struct list_head node;
305 char *name;
1da177e4
LT		 306 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
307 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
308 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
309 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
310 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 311 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 312 void (*shutdown) (struct pci_dev *dev);
1da177e4 313
392a1ce7 314 struct pci_error_handlers *err_handler;
1da177e4
LT		 315 struct device_driver driver;
316 struct pci_dynids dynids;
317};
318
319#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
320
321/**
322 * PCI_DEVICE - macro used to describe a specific pci device
323 * @vend: the 16 bit PCI Vendor ID
324 * @dev: the 16 bit PCI Device ID
325 *
326 * This macro is used to create a struct pci_device_id that matches a
327 * specific device. The subvendor and subdevice fields will be set to
328 * PCI_ANY_ID.
329 */
330#define PCI_DEVICE(vend,dev) \
331 .vendor = (vend), .device = (dev), \
332 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
333
334/**
335 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
336 * @dev_class: the class, subclass, prog-if triple for this device
337 * @dev_class_mask: the class mask for this device
338 *
339 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 340 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 341 * fields will be set to PCI_ANY_ID.
342 */
343#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
344 .class = (dev_class), .class_mask = (dev_class_mask), \
345 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
346 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
347
4352dfd5 348/*
1da177e4
LT		 349 * pci_module_init is obsolete, this stays here till we fix up all usages of it
350 * in the tree.
351 */
352#define pci_module_init pci_register_driver
353
354/* these external functions are only available when PCI support is enabled */
355#ifdef CONFIG_PCI
356
357extern struct bus_type pci_bus_type;
358
359/* Do NOT directly access these two variables, unless you are arch specific pci
360 * code, or pci core code. */
361extern struct list_head pci_root_buses; /* list of all known PCI buses */
362extern struct list_head pci_devices; /* list of all devices */
363
364void pcibios_fixup_bus(struct pci_bus *);
365int pcibios_enable_device(struct pci_dev *, int mask);
366char *pcibios_setup (char *str);
367
368/* Used only when drivers/pci/setup.c is used */
369void pcibios_align_resource(void *, struct resource *,
370 unsigned long, unsigned long);
371void pcibios_update_irq(struct pci_dev *, int irq);
372
373/* Generic PCI functions used internally */
374
375extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 376void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 377struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
378static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
379{
c431ada4
RS		 380 struct pci_bus *root_bus;
381 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
382 if (root_bus)
383 pci_bus_add_devices(root_bus);
384 return root_bus;
1da177e4 385}
cdb9b9f7
PM		 386struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
387struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 388int pci_scan_slot(struct pci_bus *bus, int devfn);
389struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 390void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4
LT		 391unsigned int pci_scan_child_bus(struct pci_bus *bus);
392void pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 393void pci_read_bridge_bases(struct pci_bus *child);
394struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
395int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
396extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
397extern void pci_dev_put(struct pci_dev *dev);
398extern void pci_remove_bus(struct pci_bus *b);
399extern void pci_remove_bus_device(struct pci_dev *dev);
b3743fa4 400void pci_setup_cardbus(struct pci_bus *bus);
1da177e4
LT		 401
402/* Generic PCI functions exported to card drivers */
403
404struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
405struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
406struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
407int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 408int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
1da177e4
LT		 409struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
410
411struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
412struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
413 unsigned int ss_vendor, unsigned int ss_device,
414 struct pci_dev *from);
415struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
416struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
417int pci_dev_present(const struct pci_device_id *ids);
418
419int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
420int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
421int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
422int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
423int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
424int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
425
426static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
427{
428 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
429}
430static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
431{
432 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
433}
434static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
435{
436 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
437}
438static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
439{
440 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
441}
442static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
443{
444 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
445}
446static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
447{
448 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
449}
450
9c8550ee
LT		 451int pci_enable_device(struct pci_dev *dev);
452int pci_enable_device_bars(struct pci_dev *dev, int mask);
1da177e4
LT		 453void pci_disable_device(struct pci_dev *dev);
454void pci_set_master(struct pci_dev *dev);
455#define HAVE_PCI_SET_MWI
9c8550ee 456int pci_set_mwi(struct pci_dev *dev);
1da177e4 457void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 458void pci_intx(struct pci_dev *dev, int enable);
9c8550ee
LT		 459int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
460int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 461void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
1da177e4 462int pci_assign_resource(struct pci_dev *dev, int i);
064b53db 463void pci_restore_bars(struct pci_dev *dev);
1da177e4
LT		 464
465/* ROM control related routines */
144a50ea
DJ		 466void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
467void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 468void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
469void pci_remove_rom(struct pci_dev *pdev);
470
471/* Power management related routines */
472int pci_save_state(struct pci_dev *dev);
473int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 474int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
475pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
476int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4
LT		 477
478/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
479void pci_bus_assign_resources(struct pci_bus *bus);
480void pci_bus_size_bridges(struct pci_bus *bus);
481int pci_claim_resource(struct pci_dev *, int);
482void pci_assign_unassigned_resources(void);
483void pdev_enable_device(struct pci_dev *);
484void pdev_sort_resources(struct pci_dev *, struct resource_list *);
485void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
486 int (*)(struct pci_dev *, u8, u8));
487#define HAVE_PCI_REQ_REGIONS 2
488int pci_request_regions(struct pci_dev *, char *);
489void pci_release_regions(struct pci_dev *);
490int pci_request_region(struct pci_dev *, int, char *);
491void pci_release_region(struct pci_dev *, int);
492
493/* drivers/pci/bus.c */
494int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
495 unsigned long size, unsigned long align,
496 unsigned long min, unsigned int type_mask,
497 void (*alignf)(void *, struct resource *,
498 unsigned long, unsigned long),
499 void *alignf_data);
500void pci_enable_bridges(struct pci_bus *bus);
501
863b18f4
L		 502/* Proper probing supporting hot-pluggable devices */
503int __pci_register_driver(struct pci_driver *, struct module *);
504static inline int pci_register_driver(struct pci_driver *driver)
505{
506 return __pci_register_driver(driver, THIS_MODULE);
507}
508
1da177e4
LT		 509void pci_unregister_driver(struct pci_driver *);
510void pci_remove_behind_bridge(struct pci_dev *);
511struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 512const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
513const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 514int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
515
cecf4864
PM		 516void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
517 void *userdata);
ac7dc65a 518int pci_cfg_space_size(struct pci_dev *dev);
b82db5ce 519unsigned char pci_bus_max_busnr(struct pci_bus* bus);
cecf4864 520
1da177e4
LT		 521/* kmem_cache style wrapper around pci_alloc_consistent() */
522
523#include <linux/dmapool.h>
524
525#define pci_pool dma_pool
526#define pci_pool_create(name, pdev, size, align, allocation) \
527 dma_pool_create(name, &pdev->dev, size, align, allocation)
528#define pci_pool_destroy(pool) dma_pool_destroy(pool)
529#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
530#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
531
e24c2d96
DM		 532enum pci_dma_burst_strategy {
533 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
534 strategy_parameter is N/A */
535 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
536 byte boundaries */
537 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
538 strategy_parameter byte boundaries */
539};
540
1da177e4
LT		 541#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
542extern struct pci_dev *isa_bridge;
543#endif
544
545struct msix_entry {
546 u16 vector; /* kernel uses to write allocated vector */
547 u16 entry; /* driver uses to specify entry, OS writes */
548};
549
550#ifndef CONFIG_PCI_MSI
551static inline void pci_scan_msi_device(struct pci_dev *dev) {}
552static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
553static inline void pci_disable_msi(struct pci_dev *dev) {}
554static inline int pci_enable_msix(struct pci_dev* dev,
555 struct msix_entry *entries, int nvec) {return -1;}
556static inline void pci_disable_msix(struct pci_dev *dev) {}
557static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
558#else
559extern void pci_scan_msi_device(struct pci_dev *dev);
560extern int pci_enable_msi(struct pci_dev *dev);
561extern void pci_disable_msi(struct pci_dev *dev);
562extern int pci_enable_msix(struct pci_dev* dev,
563 struct msix_entry *entries, int nvec);
564extern void pci_disable_msix(struct pci_dev *dev);
565extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
566#endif
567
e04b0ea2
BK		 568extern void pci_block_user_cfg_access(struct pci_dev *dev);
569extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
570
4352dfd5
GKH		 571/*
572 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
573 * a PCI domain is defined to be a set of PCI busses which share
574 * configuration space.
575 */
576#ifndef CONFIG_PCI_DOMAINS
577static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
578static inline int pci_proc_domain(struct pci_bus *bus)
579{
580 return 0;
581}
582#endif
1da177e4 583
4352dfd5 584#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 585
586/*
587 * If the system does not have PCI, clearly these return errors. Define
588 * these as simple inline functions to avoid hair in drivers.
589 */
590
1da177e4
LT		 591#define _PCI_NOP(o,s,t) \
592 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
593 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
594#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
595 _PCI_NOP(o,word,u16 x) \
596 _PCI_NOP(o,dword,u32 x)
597_PCI_NOP_ALL(read, *)
598_PCI_NOP_ALL(write,)
599
600static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
601{ return NULL; }
602
603static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
604{ return NULL; }
605
606static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
607{ return NULL; }
608
609static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
610unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
611{ return NULL; }
612
613static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
614{ return NULL; }
615
616#define pci_dev_present(ids) (0)
617#define pci_dev_put(dev) do { } while (0)
618
619static inline void pci_set_master(struct pci_dev *dev) { }
620static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
621static inline void pci_disable_device(struct pci_dev *dev) { }
622static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 623static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 624static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 625static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
626static inline void pci_unregister_driver(struct pci_driver *drv) { }
627static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 628static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
1da177e4
LT		 629static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
630
631/* Power management related routines */
632static inline int pci_save_state(struct pci_dev *dev) { return 0; }
633static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
634static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 635static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 636static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
637
638#define isa_bridge ((struct pci_dev *)NULL)
639
a46e8126
KG		 640#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
641
e04b0ea2
BK		 642static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
643static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
644
4352dfd5 645#endif /* CONFIG_PCI */
1da177e4 646
4352dfd5
GKH		 647/* Include architecture-dependent settings and functions */
648
649#include <asm/pci.h>
1da177e4
LT		 650
651/* these helpers provide future and backwards compatibility
652 * for accessing popular PCI BAR info */
653#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
654#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
655#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
656#define pci_resource_len(dev,bar) \
657 ((pci_resource_start((dev),(bar)) == 0 && \
658 pci_resource_end((dev),(bar)) == \
659 pci_resource_start((dev),(bar))) ? 0 : \
660 \
661 (pci_resource_end((dev),(bar)) - \
662 pci_resource_start((dev),(bar)) + 1))
663
664/* Similar to the helpers above, these manipulate per-pci_dev
665 * driver-specific data. They are really just a wrapper around
666 * the generic device structure functions of these calls.
667 */
668static inline void *pci_get_drvdata (struct pci_dev *pdev)
669{
670 return dev_get_drvdata(&pdev->dev);
671}
672
673static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
674{
675 dev_set_drvdata(&pdev->dev, data);
676}
677
678/* If you want to know what to call your pci_dev, ask this function.
679 * Again, it's a wrapper around the generic device.
680 */
681static inline char *pci_name(struct pci_dev *pdev)
682{
683 return pdev->dev.bus_id;
684}
685
2311b1f2
ME		 686
687/* Some archs don't want to expose struct resource to userland as-is
688 * in sysfs and /proc
689 */
690#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
691static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
692 const struct resource *rsrc, u64 *start, u64 *end)
693{
694 *start = rsrc->start;
695 *end = rsrc->end;
696}
697#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
698
699
1da177e4
LT		 700/*
701 * The world is not perfect and supplies us with broken PCI devices.
702 * For at least a part of these bugs we need a work-around, so both
703 * generic (drivers/pci/quirks.c) and per-architecture code can define
704 * fixup hooks to be called for particular buggy devices.
705 */
706
707struct pci_fixup {
708 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
709 void (*hook)(struct pci_dev *dev);
710};
711
712enum pci_fixup_pass {
713 pci_fixup_early, /* Before probing BARs */
714 pci_fixup_header, /* After reading configuration header */
715 pci_fixup_final, /* Final phase of device fixups */
716 pci_fixup_enable, /* pci_enable_device() time */
717};
718
719/* Anonymous variables would be nice... */
720#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 721 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 722 __attribute__((__section__(#section))) = { vendor, device, hook };
723#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
724 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
725 vendor##device##hook, vendor, device, hook)
726#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
727 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
728 vendor##device##hook, vendor, device, hook)
729#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
730 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
731 vendor##device##hook, vendor, device, hook)
732#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
733 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
734 vendor##device##hook, vendor, device, hook)
735
736
737void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
738
739extern int pci_pci_problems;
740#define PCIPCI_FAIL 1
741#define PCIPCI_TRITON 2
742#define PCIPCI_NATOMA 4
743#define PCIPCI_VIAETBF 8
744#define PCIPCI_VSFX 16
745#define PCIPCI_ALIMAGIK 32
746
747#endif /* __KERNEL__ */
748#endif /* LINUX_PCI_H */
Clone of davem's net-next-2.6 tree