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[net-next-2.6.git] / include / linux / pci.h
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1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
20#include <linux/mod_devicetable.h>
21
4352dfd5
GKH		 22/* Include the pci register defines */
23#include <linux/pci_regs.h>
1da177e4
LT		 24
25/* Include the ID list */
1da177e4
LT		 26#include <linux/pci_ids.h>
27
28/*
29 * The PCI interface treats multi-function devices as independent
30 * devices. The slot/function address of each device is encoded
31 * in a single byte as follows:
32 *
33 * 7:3 = slot
34 * 2:0 = function
35 */
36#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
37#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
38#define PCI_FUNC(devfn) ((devfn) & 0x07)
39
40/* Ioctls for /proc/bus/pci/X/Y nodes. */
41#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
42#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
43#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
44#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
45#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
46
47#ifdef __KERNEL__
48
49#include <linux/types.h>
50#include <linux/config.h>
51#include <linux/ioport.h>
52#include <linux/list.h>
53#include <linux/errno.h>
54#include <linux/device.h>
55
56/* File state for mmap()s on /proc/bus/pci/X/Y */
57enum pci_mmap_state {
58 pci_mmap_io,
59 pci_mmap_mem
60};
61
62/* This defines the direction arg to the DMA mapping routines. */
63#define PCI_DMA_BIDIRECTIONAL 0
64#define PCI_DMA_TODEVICE 1
65#define PCI_DMA_FROMDEVICE 2
66#define PCI_DMA_NONE 3
67
68#define DEVICE_COUNT_COMPATIBLE 4
69#define DEVICE_COUNT_RESOURCE 12
70
71typedef int __bitwise pci_power_t;
72
4352dfd5
GKH		 73#define PCI_D0 ((pci_power_t __force) 0)
74#define PCI_D1 ((pci_power_t __force) 1)
75#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 76#define PCI_D3hot ((pci_power_t __force) 3)
77#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 78#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 79#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4
LT		 80
81/*
82 * The pci_dev structure is used to describe PCI devices.
83 */
84struct pci_dev {
85 struct list_head global_list; /* node in list of all PCI devices */
86 struct list_head bus_list; /* node in per-bus list */
87 struct pci_bus *bus; /* bus this device is on */
88 struct pci_bus *subordinate; /* bus this device bridges to */
89
90 void *sysdata; /* hook for sys-specific extension */
91 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
92
93 unsigned int devfn; /* encoded device & function index */
94 unsigned short vendor;
95 unsigned short device;
96 unsigned short subsystem_vendor;
97 unsigned short subsystem_device;
98 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
99 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
100 u8 rom_base_reg; /* which config register controls the ROM */
ffeff788 101 u8 pin; /* which interrupt pin this device uses */
1da177e4
LT		 102
103 struct pci_driver *driver; /* which driver has allocated this device */
104 u64 dma_mask; /* Mask of the bits of bus address this
105 device implements. Normally this is
106 0xffffffff. You only need to change
107 this if your device has broken DMA
108 or supports 64-bit transfers. */
109
110 pci_power_t current_state; /* Current operating state. In ACPI-speak,
111 this is D0-D3, D0 being fully functional,
112 and D3 being off. */
113
114 struct device dev; /* Generic device interface */
115
116 /* device is compatible with these IDs */
117 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
118 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
119
120 int cfg_size; /* Size of configuration space */
121
122 /*
123 * Instead of touching interrupt line and base address registers
124 * directly, use the values stored here. They might be different!
125 */
126 unsigned int irq;
127 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
128
129 /* These fields are used by common fixups */
130 unsigned int transparent:1; /* Transparent PCI bridge */
131 unsigned int multifunction:1;/* Part of multi-function device */
132 /* keep track of device state */
133 unsigned int is_enabled:1; /* pci_enable_device has been called */
134 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 135 unsigned int no_msi:1; /* device may not use msi */
e04b0ea2 136 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
4602b88d 137
1da177e4
LT		 138 u32 saved_config_space[16]; /* config space saved at suspend time */
139 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
140 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
141 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
1da177e4
LT		 142};
143
144#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
145#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
146#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
147#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
148
149/*
150 * For PCI devices, the region numbers are assigned this way:
151 *
152 * 0-5 standard PCI regions
153 * 6 expansion ROM
154 * 7-10 bridges: address space assigned to buses behind the bridge
155 */
156
4352dfd5
GKH		 157#define PCI_ROM_RESOURCE 6
158#define PCI_BRIDGE_RESOURCES 7
159#define PCI_NUM_RESOURCES 11
1da177e4
LT		 160
161#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 162#define PCI_BUS_NUM_RESOURCES 8
1da177e4 163#endif
4352dfd5
GKH		 164
165#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 166
167struct pci_bus {
168 struct list_head node; /* node in list of buses */
169 struct pci_bus *parent; /* parent bus this bridge is on */
170 struct list_head children; /* list of child buses */
171 struct list_head devices; /* list of devices on this bus */
172 struct pci_dev *self; /* bridge device as seen by parent */
173 struct resource *resource[PCI_BUS_NUM_RESOURCES];
174 /* address space routed to this bus */
175
176 struct pci_ops *ops; /* configuration access functions */
177 void *sysdata; /* hook for sys-specific extension */
178 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
179
180 unsigned char number; /* bus number */
181 unsigned char primary; /* number of primary bridge */
182 unsigned char secondary; /* number of secondary bridge */
183 unsigned char subordinate; /* max number of subordinate buses */
184
185 char name[48];
186
187 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
188 unsigned short pad2;
189 struct device *bridge;
190 struct class_device class_dev;
191 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
192 struct bin_attribute *legacy_mem; /* legacy mem */
193};
194
195#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
196#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
197
198/*
199 * Error values that may be returned by PCI functions.
200 */
201#define PCIBIOS_SUCCESSFUL 0x00
202#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
203#define PCIBIOS_BAD_VENDOR_ID 0x83
204#define PCIBIOS_DEVICE_NOT_FOUND 0x86
205#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
206#define PCIBIOS_SET_FAILED 0x88
207#define PCIBIOS_BUFFER_TOO_SMALL 0x89
208
209/* Low-level architecture-dependent routines */
210
211struct pci_ops {
212 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
213 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
214};
215
216struct pci_raw_ops {
217 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
218 int reg, int len, u32 *val);
219 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
220 int reg, int len, u32 val);
221};
222
223extern struct pci_raw_ops *raw_pci_ops;
224
225struct pci_bus_region {
226 unsigned long start;
227 unsigned long end;
228};
229
230struct pci_dynids {
231 spinlock_t lock; /* protects list, index */
232 struct list_head list; /* for IDs added at runtime */
233 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
234};
235
236struct module;
237struct pci_driver {
238 struct list_head node;
239 char *name;
1da177e4
LT		 240 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
241 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
242 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
243 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
244 int (*resume) (struct pci_dev *dev); /* Device woken up */
438510f6 245 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
c8958177 246 void (*shutdown) (struct pci_dev *dev);
1da177e4
LT		 247
248 struct device_driver driver;
249 struct pci_dynids dynids;
250};
251
252#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
253
254/**
255 * PCI_DEVICE - macro used to describe a specific pci device
256 * @vend: the 16 bit PCI Vendor ID
257 * @dev: the 16 bit PCI Device ID
258 *
259 * This macro is used to create a struct pci_device_id that matches a
260 * specific device. The subvendor and subdevice fields will be set to
261 * PCI_ANY_ID.
262 */
263#define PCI_DEVICE(vend,dev) \
264 .vendor = (vend), .device = (dev), \
265 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
266
267/**
268 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
269 * @dev_class: the class, subclass, prog-if triple for this device
270 * @dev_class_mask: the class mask for this device
271 *
272 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 273 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 274 * fields will be set to PCI_ANY_ID.
275 */
276#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
277 .class = (dev_class), .class_mask = (dev_class_mask), \
278 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
279 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
280
4352dfd5 281/*
1da177e4
LT		 282 * pci_module_init is obsolete, this stays here till we fix up all usages of it
283 * in the tree.
284 */
285#define pci_module_init pci_register_driver
286
287/* these external functions are only available when PCI support is enabled */
288#ifdef CONFIG_PCI
289
290extern struct bus_type pci_bus_type;
291
292/* Do NOT directly access these two variables, unless you are arch specific pci
293 * code, or pci core code. */
294extern struct list_head pci_root_buses; /* list of all known PCI buses */
295extern struct list_head pci_devices; /* list of all devices */
296
297void pcibios_fixup_bus(struct pci_bus *);
298int pcibios_enable_device(struct pci_dev *, int mask);
299char *pcibios_setup (char *str);
300
301/* Used only when drivers/pci/setup.c is used */
302void pcibios_align_resource(void *, struct resource *,
303 unsigned long, unsigned long);
304void pcibios_update_irq(struct pci_dev *, int irq);
305
306/* Generic PCI functions used internally */
307
308extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 309void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 310struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
311static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
312{
c431ada4
RS		 313 struct pci_bus *root_bus;
314 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
315 if (root_bus)
316 pci_bus_add_devices(root_bus);
317 return root_bus;
1da177e4 318}
cdb9b9f7
PM		 319struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
320struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 321int pci_scan_slot(struct pci_bus *bus, int devfn);
322struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 323void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4
LT		 324unsigned int pci_scan_child_bus(struct pci_bus *bus);
325void pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 326void pci_read_bridge_bases(struct pci_bus *child);
327struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
328int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
329extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
330extern void pci_dev_put(struct pci_dev *dev);
331extern void pci_remove_bus(struct pci_bus *b);
332extern void pci_remove_bus_device(struct pci_dev *dev);
b3743fa4 333void pci_setup_cardbus(struct pci_bus *bus);
1da177e4
LT		 334
335/* Generic PCI functions exported to card drivers */
336
337struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
338struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
339struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
340int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 341int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
1da177e4
LT		 342int pci_find_ext_capability (struct pci_dev *dev, int cap);
343struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
344
345struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
346struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
347 unsigned int ss_vendor, unsigned int ss_device,
348 struct pci_dev *from);
349struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
350struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
351int pci_dev_present(const struct pci_device_id *ids);
352
353int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
354int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
355int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
356int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
357int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
358int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
359
360static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
361{
362 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
363}
364static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
365{
366 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
367}
368static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
369{
370 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
371}
372static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
373{
374 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
375}
376static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
377{
378 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
379}
380static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
381{
382 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
383}
384
9c8550ee
LT		 385int pci_enable_device(struct pci_dev *dev);
386int pci_enable_device_bars(struct pci_dev *dev, int mask);
1da177e4
LT		 387void pci_disable_device(struct pci_dev *dev);
388void pci_set_master(struct pci_dev *dev);
389#define HAVE_PCI_SET_MWI
9c8550ee 390int pci_set_mwi(struct pci_dev *dev);
1da177e4 391void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 392void pci_intx(struct pci_dev *dev, int enable);
9c8550ee
LT		 393int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
394int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
064b53db 395void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
1da177e4 396int pci_assign_resource(struct pci_dev *dev, int i);
064b53db 397void pci_restore_bars(struct pci_dev *dev);
1da177e4
LT		 398
399/* ROM control related routines */
144a50ea
DJ		 400void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
401void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 402void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
403void pci_remove_rom(struct pci_dev *pdev);
404
405/* Power management related routines */
406int pci_save_state(struct pci_dev *dev);
407int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 408int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
409pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
410int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4
LT		 411
412/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
413void pci_bus_assign_resources(struct pci_bus *bus);
414void pci_bus_size_bridges(struct pci_bus *bus);
415int pci_claim_resource(struct pci_dev *, int);
416void pci_assign_unassigned_resources(void);
417void pdev_enable_device(struct pci_dev *);
418void pdev_sort_resources(struct pci_dev *, struct resource_list *);
419void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
420 int (*)(struct pci_dev *, u8, u8));
421#define HAVE_PCI_REQ_REGIONS 2
422int pci_request_regions(struct pci_dev *, char *);
423void pci_release_regions(struct pci_dev *);
424int pci_request_region(struct pci_dev *, int, char *);
425void pci_release_region(struct pci_dev *, int);
426
427/* drivers/pci/bus.c */
428int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
429 unsigned long size, unsigned long align,
430 unsigned long min, unsigned int type_mask,
431 void (*alignf)(void *, struct resource *,
432 unsigned long, unsigned long),
433 void *alignf_data);
434void pci_enable_bridges(struct pci_bus *bus);
435
863b18f4
L		 436/* Proper probing supporting hot-pluggable devices */
437int __pci_register_driver(struct pci_driver *, struct module *);
438static inline int pci_register_driver(struct pci_driver *driver)
439{
440 return __pci_register_driver(driver, THIS_MODULE);
441}
442
1da177e4
LT		 443void pci_unregister_driver(struct pci_driver *);
444void pci_remove_behind_bridge(struct pci_dev *);
445struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 446const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
447const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 448int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
449
cecf4864
PM		 450void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
451 void *userdata);
ac7dc65a 452int pci_cfg_space_size(struct pci_dev *dev);
cecf4864 453
1da177e4
LT		 454/* kmem_cache style wrapper around pci_alloc_consistent() */
455
456#include <linux/dmapool.h>
457
458#define pci_pool dma_pool
459#define pci_pool_create(name, pdev, size, align, allocation) \
460 dma_pool_create(name, &pdev->dev, size, align, allocation)
461#define pci_pool_destroy(pool) dma_pool_destroy(pool)
462#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
463#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
464
e24c2d96
DM		 465enum pci_dma_burst_strategy {
466 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
467 strategy_parameter is N/A */
468 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
469 byte boundaries */
470 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
471 strategy_parameter byte boundaries */
472};
473
1da177e4
LT		 474#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
475extern struct pci_dev *isa_bridge;
476#endif
477
478struct msix_entry {
479 u16 vector; /* kernel uses to write allocated vector */
480 u16 entry; /* driver uses to specify entry, OS writes */
481};
482
483#ifndef CONFIG_PCI_MSI
484static inline void pci_scan_msi_device(struct pci_dev *dev) {}
485static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
486static inline void pci_disable_msi(struct pci_dev *dev) {}
487static inline int pci_enable_msix(struct pci_dev* dev,
488 struct msix_entry *entries, int nvec) {return -1;}
489static inline void pci_disable_msix(struct pci_dev *dev) {}
490static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
491#else
492extern void pci_scan_msi_device(struct pci_dev *dev);
493extern int pci_enable_msi(struct pci_dev *dev);
494extern void pci_disable_msi(struct pci_dev *dev);
495extern int pci_enable_msix(struct pci_dev* dev,
496 struct msix_entry *entries, int nvec);
497extern void pci_disable_msix(struct pci_dev *dev);
498extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
499#endif
500
e04b0ea2
BK		 501extern void pci_block_user_cfg_access(struct pci_dev *dev);
502extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
503
4352dfd5
GKH		 504/*
505 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
506 * a PCI domain is defined to be a set of PCI busses which share
507 * configuration space.
508 */
509#ifndef CONFIG_PCI_DOMAINS
510static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
511static inline int pci_proc_domain(struct pci_bus *bus)
512{
513 return 0;
514}
515#endif
1da177e4 516
4352dfd5 517#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 518
519/*
520 * If the system does not have PCI, clearly these return errors. Define
521 * these as simple inline functions to avoid hair in drivers.
522 */
523
1da177e4
LT		 524#define _PCI_NOP(o,s,t) \
525 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
526 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
527#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
528 _PCI_NOP(o,word,u16 x) \
529 _PCI_NOP(o,dword,u32 x)
530_PCI_NOP_ALL(read, *)
531_PCI_NOP_ALL(write,)
532
533static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
534{ return NULL; }
535
536static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
537{ return NULL; }
538
539static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
540{ return NULL; }
541
542static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
543unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
544{ return NULL; }
545
546static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
547{ return NULL; }
548
549#define pci_dev_present(ids) (0)
550#define pci_dev_put(dev) do { } while (0)
551
552static inline void pci_set_master(struct pci_dev *dev) { }
553static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
554static inline void pci_disable_device(struct pci_dev *dev) { }
555static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 556static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 557static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 558static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
559static inline void pci_unregister_driver(struct pci_driver *drv) { }
560static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 561static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
1da177e4
LT		 562static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
563static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
564
565/* Power management related routines */
566static inline int pci_save_state(struct pci_dev *dev) { return 0; }
567static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
568static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 569static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 570static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
571
572#define isa_bridge ((struct pci_dev *)NULL)
573
a46e8126
KG		 574#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
575
e04b0ea2
BK		 576static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
577static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
578
4352dfd5 579#endif /* CONFIG_PCI */
1da177e4 580
4352dfd5
GKH		 581/* Include architecture-dependent settings and functions */
582
583#include <asm/pci.h>
1da177e4
LT		 584
585/* these helpers provide future and backwards compatibility
586 * for accessing popular PCI BAR info */
587#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
588#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
589#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
590#define pci_resource_len(dev,bar) \
591 ((pci_resource_start((dev),(bar)) == 0 && \
592 pci_resource_end((dev),(bar)) == \
593 pci_resource_start((dev),(bar))) ? 0 : \
594 \
595 (pci_resource_end((dev),(bar)) - \
596 pci_resource_start((dev),(bar)) + 1))
597
598/* Similar to the helpers above, these manipulate per-pci_dev
599 * driver-specific data. They are really just a wrapper around
600 * the generic device structure functions of these calls.
601 */
602static inline void *pci_get_drvdata (struct pci_dev *pdev)
603{
604 return dev_get_drvdata(&pdev->dev);
605}
606
607static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
608{
609 dev_set_drvdata(&pdev->dev, data);
610}
611
612/* If you want to know what to call your pci_dev, ask this function.
613 * Again, it's a wrapper around the generic device.
614 */
615static inline char *pci_name(struct pci_dev *pdev)
616{
617 return pdev->dev.bus_id;
618}
619
2311b1f2
ME		 620
621/* Some archs don't want to expose struct resource to userland as-is
622 * in sysfs and /proc
623 */
624#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
625static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
626 const struct resource *rsrc, u64 *start, u64 *end)
627{
628 *start = rsrc->start;
629 *end = rsrc->end;
630}
631#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
632
633
1da177e4
LT		 634/*
635 * The world is not perfect and supplies us with broken PCI devices.
636 * For at least a part of these bugs we need a work-around, so both
637 * generic (drivers/pci/quirks.c) and per-architecture code can define
638 * fixup hooks to be called for particular buggy devices.
639 */
640
641struct pci_fixup {
642 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
643 void (*hook)(struct pci_dev *dev);
644};
645
646enum pci_fixup_pass {
647 pci_fixup_early, /* Before probing BARs */
648 pci_fixup_header, /* After reading configuration header */
649 pci_fixup_final, /* Final phase of device fixups */
650 pci_fixup_enable, /* pci_enable_device() time */
651};
652
653/* Anonymous variables would be nice... */
654#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 655 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 656 __attribute__((__section__(#section))) = { vendor, device, hook };
657#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
658 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
659 vendor##device##hook, vendor, device, hook)
660#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
661 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
662 vendor##device##hook, vendor, device, hook)
663#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
664 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
665 vendor##device##hook, vendor, device, hook)
666#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
667 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
668 vendor##device##hook, vendor, device, hook)
669
670
671void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
672
673extern int pci_pci_problems;
674#define PCIPCI_FAIL 1
675#define PCIPCI_TRITON 2
676#define PCIPCI_NATOMA 4
677#define PCIPCI_VIAETBF 8
678#define PCIPCI_VSFX 16
679#define PCIPCI_ALIMAGIK 32
680
681#endif /* __KERNEL__ */
682#endif /* LINUX_PCI_H */
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