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MTD: OneNAND: interrupt based wait support
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1/*
2 * linux/include/linux/mtd/onenand.h
3 *
28b79ff9 4 * Copyright (C) 2005-2006 Samsung Electronics
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5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __LINUX_MTD_ONENAND_H
13#define __LINUX_MTD_ONENAND_H
14
15#include <linux/spinlock.h>
2c22120f 16#include <linux/completion.h>
cd5f6346 17#include <linux/mtd/onenand_regs.h>
cdc00130 18#include <linux/mtd/bbm.h>
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19
20#define MAX_BUFFERRAM 2
21
22/* Scan and identify a OneNAND device */
23extern int onenand_scan(struct mtd_info *mtd, int max_chips);
24/* Free resources held by the OneNAND device */
25extern void onenand_release(struct mtd_info *mtd);
26
ea9b6dcc 27/*
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28 * onenand_state_t - chip states
29 * Enumeration for OneNAND flash chip state
30 */
31typedef enum {
32 FL_READY,
33 FL_READING,
34 FL_WRITING,
35 FL_ERASING,
36 FL_SYNCING,
37 FL_UNLOCKING,
38 FL_LOCKING,
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39 FL_RESETING,
40 FL_OTPING,
a41371eb 41 FL_PM_SUSPENDED,
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42} onenand_state_t;
43
44/**
45 * struct onenand_bufferram - OneNAND BufferRAM Data
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46 * @block: block address in BufferRAM
47 * @page: page address in BufferRAM
48 * @valid: valid flag
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49 */
50struct onenand_bufferram {
51 int block;
52 int page;
53 int valid;
54};
55
56/**
57 * struct onenand_chip - OneNAND Private Flash Chip Data
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58 * @base: [BOARDSPECIFIC] address to access OneNAND
59 * @chipsize: [INTERN] the size of one chip for multichip arrays
60 * @device_id: [INTERN] device ID
61 * @density_mask: chip density, used for DDP devices
62 * @verstion_id: [INTERN] version ID
63 * @options: [BOARDSPECIFIC] various chip options. They can
64 * partly be set to inform onenand_scan about
65 * @erase_shift: [INTERN] number of address bits in a block
66 * @page_shift: [INTERN] number of address bits in a page
67 * @ppb_shift: [INTERN] number of address bits in a pages per block
68 * @page_mask: [INTERN] a page per block mask
69 * @bufferram_index: [INTERN] BufferRAM index
70 * @bufferram: [INTERN] BufferRAM info
71 * @readw: [REPLACEABLE] hardware specific function for read short
72 * @writew: [REPLACEABLE] hardware specific function for write short
73 * @command: [REPLACEABLE] hardware specific function for writing
74 * commands to the chip
75 * @wait: [REPLACEABLE] hardware specific function for wait on ready
76 * @read_bufferram: [REPLACEABLE] hardware specific function for BufferRAM Area
77 * @write_bufferram: [REPLACEABLE] hardware specific function for BufferRAM Area
78 * @read_word: [REPLACEABLE] hardware specific function for read
79 * register of OneNAND
80 * @write_word: [REPLACEABLE] hardware specific function for write
81 * register of OneNAND
82 * @mmcontrol: sync burst read function
83 * @block_markbad: function to mark a block as bad
84 * @scan_bbt: [REPLACEALBE] hardware specific function for scanning
85 * Bad block Table
86 * @chip_lock: [INTERN] spinlock used to protect access to this
87 * structure and the chip
88 * @wq: [INTERN] wait queue to sleep on if a OneNAND
89 * operation is in progress
90 * @state: [INTERN] the current state of the OneNAND device
91 * @page_buf: data buffer
92 * @ecclayout: [REPLACEABLE] the default ecc placement scheme
93 * @bbm: [REPLACEABLE] pointer to Bad Block Management
94 * @priv: [OPTIONAL] pointer to private chip date
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95 */
96struct onenand_chip {
97 void __iomem *base;
98 unsigned int chipsize;
99 unsigned int device_id;
28b79ff9 100 unsigned int version_id;
83a36838 101 unsigned int density_mask;
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102 unsigned int options;
103
104 unsigned int erase_shift;
105 unsigned int page_shift;
106 unsigned int ppb_shift; /* Pages per block shift */
107 unsigned int page_mask;
108
109 unsigned int bufferram_index;
110 struct onenand_bufferram bufferram[MAX_BUFFERRAM];
111
112 int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len);
113 int (*wait)(struct mtd_info *mtd, int state);
114 int (*read_bufferram)(struct mtd_info *mtd, int area,
115 unsigned char *buffer, int offset, size_t count);
116 int (*write_bufferram)(struct mtd_info *mtd, int area,
117 const unsigned char *buffer, int offset, size_t count);
118 unsigned short (*read_word)(void __iomem *addr);
119 void (*write_word)(unsigned short value, void __iomem *addr);
52b0eea7 120 void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
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121 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
122 int (*scan_bbt)(struct mtd_info *mtd);
cd5f6346 123
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124 struct completion complete;
125 int irq;
126
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127 spinlock_t chip_lock;
128 wait_queue_head_t wq;
129 onenand_state_t state;
532a37cf 130 unsigned char *page_buf;
cd5f6346 131
5bd34c09 132 struct nand_ecclayout *ecclayout;
cd5f6346 133
5bd34c09 134 void *bbm;
cdc00130 135
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136 void *priv;
137};
138
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139/*
140 * Helper macros
141 */
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142#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index)
143#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1)
144#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1)
145
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146#define ONENAND_GET_SYS_CFG1(this) \
147 (this->read_word(this->base + ONENAND_REG_SYS_CFG1))
148#define ONENAND_SET_SYS_CFG1(v, this) \
149 (this->write_word(v, this->base + ONENAND_REG_SYS_CFG1))
150
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151/* Check byte access in OneNAND */
152#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
153
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154/*
155 * Options bits
156 */
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157#define ONENAND_HAS_CONT_LOCK (0x0001)
158#define ONENAND_HAS_UNLOCK_ALL (0x0002)
532a37cf 159#define ONENAND_PAGEBUF_ALLOC (0x1000)
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160
161/*
162 * OneNAND Flash Manufacturer ID Codes
163 */
164#define ONENAND_MFR_SAMSUNG 0xec
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165
166/**
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167 * struct onenand_manufacturers - NAND Flash Manufacturer ID Structure
168 * @name: Manufacturer name
169 * @id: manufacturer ID code of device.
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170*/
171struct onenand_manufacturers {
172 int id;
173 char *name;
174};
175
176#endif /* __LINUX_MTD_ONENAND_H */