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[PATCH] libata: implement ata_unpack_xfermask()
[net-next-2.6.git] / include / linux / libata.h
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1da177e4 1/*
af36d7f0
JG		 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT		 24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT		 33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
bfd60579
RD		 38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
1da177e4
LT		 40 */
41#undef ATA_DEBUG /* debugging output */
42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT		 45#undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50/* note: prints function name for you */
51#ifdef ATA_DEBUG
52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53#ifdef ATA_VERBOSE_DEBUG
54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55#else
56#define VPRINTK(fmt, args...)
57#endif /* ATA_VERBOSE_DEBUG */
58#else
59#define DPRINTK(fmt, args...)
60#define VPRINTK(fmt, args...)
61#endif /* ATA_DEBUG */
62
2c13b7ce
JG		 63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
bfd60579
RD		 65/* NEW: debug levels */
66#define HAVE_LIBATA_MSG 1
67
68enum {
69 ATA_MSG_DRV = 0x0001,
70 ATA_MSG_INFO = 0x0002,
71 ATA_MSG_PROBE = 0x0004,
72 ATA_MSG_WARN = 0x0008,
73 ATA_MSG_MALLOC = 0x0010,
74 ATA_MSG_CTL = 0x0020,
75 ATA_MSG_INTR = 0x0040,
76 ATA_MSG_ERR = 0x0080,
77};
78
79#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
80#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
81#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
82#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
83#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
84#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
85#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
86#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
87
88static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
89{
90 if (dval < 0 || dval >= (sizeof(u32) * 8))
91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
92 if (!dval)
93 return 0;
94 return (1 << dval) - 1;
95}
96
1da177e4
LT		 97/* defines only for the constants which don't work well as enums */
98#define ATA_TAG_POISON 0xfafbfcfdU
99
100/* move to PCI layer? */
101static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
102{
103 return &pdev->dev;
104}
105
106enum {
107 /* various global constants */
108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
109 ATA_MAX_PORTS = 8,
110 ATA_DEF_QUEUE = 1,
111 ATA_MAX_QUEUE = 1,
112 ATA_MAX_SECTORS = 200, /* FIXME */
113 ATA_MAX_BUS = 2,
114 ATA_DEF_BUSY_WAIT = 10000,
115 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
116
117 ATA_SHT_EMULATED = 1,
118 ATA_SHT_CMD_PER_LUN = 1,
119 ATA_SHT_THIS_ID = -1,
cf482935 120 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT		 121
122 /* struct ata_device stuff */
123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
b00eec1d 125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */
1da177e4
LT		 126
127 ATA_DEV_UNKNOWN = 0, /* unknown device */
128 ATA_DEV_ATA = 1, /* ATA device */
129 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
130 ATA_DEV_ATAPI = 3, /* ATAPI device */
131 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
132 ATA_DEV_NONE = 5, /* no device */
133
134 /* struct ata_port flags */
135 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
136 /* (doesn't imply presence) */
137 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
138 ATA_FLAG_SATA = (1 << 3),
139 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
c19ba8af 140 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */
1da177e4 141 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
c19ba8af 142 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */
1da177e4 143 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
c1389503
TH		 144 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
145 * proper HSM is in place. */
2c13b7ce 146 ATA_FLAG_DEBUGMSG = (1 << 10),
50630195 147 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
1da177e4 148
9b847548
JA		 149 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
150
8d238e01
AC		 151 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
152 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
153
2e755f68 154 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* Flush port task */
c18d06f8 155 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */
dde44589 156
1da177e4
LT		 157 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
158 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
159 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
160 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
341963b9 161 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */
1da177e4
LT		 162
163 /* various lengths of time */
8d238e01 164 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */
1da177e4 165 ATA_TMOUT_PIO = 30 * HZ,
8d238e01
AC		 166 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
167 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
1da177e4
LT		 168 ATA_TMOUT_CDB = 30 * HZ,
169 ATA_TMOUT_CDB_QUICK = 5 * HZ,
a2a7a662
TH		 170 ATA_TMOUT_INTERNAL = 30 * HZ,
171 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT		 172
173 /* ATA bus states */
174 BUS_UNKNOWN = 0,
175 BUS_DMA = 1,
176 BUS_IDLE = 2,
177 BUS_NOINTR = 3,
178 BUS_NODATA = 4,
179 BUS_TIMER = 5,
180 BUS_PIO = 6,
181 BUS_EDD = 7,
182 BUS_IDENTIFY = 8,
183 BUS_PACKET = 9,
184
185 /* SATA port states */
186 PORT_UNKNOWN = 0,
187 PORT_ENABLED = 1,
188 PORT_DISABLED = 2,
189
190 /* encoding various smaller bitmaps into a single
1da7b0d0 191 * unsigned int bitmap
1da177e4 192 */
1da7b0d0
TH		 193 ATA_BITS_PIO = 5,
194 ATA_BITS_MWDMA = 3,
195 ATA_BITS_UDMA = 8,
196
197 ATA_SHIFT_PIO = 0,
198 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
199 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
200
201 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
202 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
203 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
cedc9a47
JG		 204
205 /* size of buffer to pad xfers ending on unaligned boundaries */
206 ATA_DMA_PAD_SZ = 4,
207 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
47a86593
AC		 208
209 /* Masks for port functions */
210 ATA_PORT_PRIMARY = (1 << 0),
211 ATA_PORT_SECONDARY = (1 << 1),
1da177e4
LT		 212};
213
14be71f4
AL		 214enum hsm_task_states {
215 HSM_ST_UNKNOWN,
216 HSM_ST_IDLE,
217 HSM_ST_POLL,
218 HSM_ST_TMOUT,
219 HSM_ST,
220 HSM_ST_LAST,
221 HSM_ST_LAST_POLL,
222 HSM_ST_ERR,
1da177e4
LT		 223};
224
a7dac447 225enum ata_completion_errors {
11a56d24
TH		 226 AC_ERR_DEV = (1 << 0), /* device reported error */
227 AC_ERR_HSM = (1 << 1), /* host state machine violation */
228 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
229 AC_ERR_MEDIA = (1 << 3), /* media error */
230 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
231 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
232 AC_ERR_SYSTEM = (1 << 6), /* system error */
233 AC_ERR_INVALID = (1 << 7), /* invalid argument */
234 AC_ERR_OTHER = (1 << 8), /* unknown */
a7dac447
JG		 235};
236
1da177e4
LT		 237/* forward declarations */
238struct scsi_device;
239struct ata_port_operations;
240struct ata_port;
241struct ata_queued_cmd;
242
243/* typedefs */
77853bf2 244typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
7944ea95 245typedef void (*ata_probeinit_fn_t)(struct ata_port *);
a62c0fc5
TH		 246typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *);
247typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
1da177e4
LT		 248
249struct ata_ioports {
250 unsigned long cmd_addr;
251 unsigned long data_addr;
252 unsigned long error_addr;
253 unsigned long feature_addr;
254 unsigned long nsect_addr;
255 unsigned long lbal_addr;
256 unsigned long lbam_addr;
257 unsigned long lbah_addr;
258 unsigned long device_addr;
259 unsigned long status_addr;
260 unsigned long command_addr;
261 unsigned long altstatus_addr;
262 unsigned long ctl_addr;
263 unsigned long bmdma_addr;
264 unsigned long scr_addr;
265};
266
267struct ata_probe_ent {
268 struct list_head node;
269 struct device *dev;
057ace5e 270 const struct ata_port_operations *port_ops;
193515d5 271 struct scsi_host_template *sht;
1da177e4
LT		 272 struct ata_ioports port[ATA_MAX_PORTS];
273 unsigned int n_ports;
274 unsigned int hard_port_no;
275 unsigned int pio_mask;
276 unsigned int mwdma_mask;
277 unsigned int udma_mask;
278 unsigned int legacy_mode;
279 unsigned long irq;
280 unsigned int irq_flags;
281 unsigned long host_flags;
282 void __iomem *mmio_base;
283 void *private_data;
284};
285
286struct ata_host_set {
287 spinlock_t lock;
288 struct device *dev;
289 unsigned long irq;
290 void __iomem *mmio_base;
291 unsigned int n_ports;
292 void *private_data;
057ace5e 293 const struct ata_port_operations *ops;
1da177e4
LT		 294 struct ata_port * ports[0];
295};
296
297struct ata_queued_cmd {
298 struct ata_port *ap;
299 struct ata_device *dev;
300
301 struct scsi_cmnd *scsicmd;
302 void (*scsidone)(struct scsi_cmnd *);
303
304 struct ata_taskfile tf;
305 u8 cdb[ATAPI_CDB_LEN];
306
307 unsigned long flags; /* ATA_QCFLAG_xxx */
308 unsigned int tag;
309 unsigned int n_elem;
cedc9a47 310 unsigned int orig_n_elem;
1da177e4
LT		 311
312 int dma_dir;
313
cedc9a47
JG		 314 unsigned int pad_len;
315
1da177e4
LT		 316 unsigned int nsect;
317 unsigned int cursect;
318
319 unsigned int nbytes;
320 unsigned int curbytes;
321
322 unsigned int cursg;
323 unsigned int cursg_ofs;
324
325 struct scatterlist sgent;
cedc9a47 326 struct scatterlist pad_sgent;
1da177e4
LT		 327 void *buf_virt;
328
cedc9a47
JG		 329 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
330 struct scatterlist *__sg;
1da177e4 331
a22e2eb0
AL		 332 unsigned int err_mask;
333
1da177e4
LT		 334 ata_qc_cb_t complete_fn;
335
1da177e4
LT		 336 void *private_data;
337};
338
339struct ata_host_stats {
340 unsigned long unhandled_irq;
341 unsigned long idle_irq;
342 unsigned long rw_reqbuf;
343};
344
345struct ata_device {
346 u64 n_sectors; /* size of device, if ATA */
347 unsigned long flags; /* ATA_DFLAG_xxx */
348 unsigned int class; /* ATA_DEV_xxx */
349 unsigned int devno; /* 0 or 1 */
d9572b1d 350 u16 *id; /* IDENTIFY xxx DEVICE data */
1da177e4
LT		 351 u8 pio_mode;
352 u8 dma_mode;
353 u8 xfer_mode;
354 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
355
8cbd6df1
AL		 356 unsigned int multi_count; /* sectors count for
357 READ/WRITE MULTIPLE */
b00eec1d 358 unsigned int max_sectors; /* per-device max sectors */
6e7846e9 359 unsigned int cdb_len;
8bf62ece
AL		 360
361 /* for CHS addressing */
362 u16 cylinders; /* Number of cylinders */
363 u16 heads; /* Number of heads */
364 u16 sectors; /* Number of sectors per track */
1da177e4
LT		 365};
366
367struct ata_port {
368 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 369 const struct ata_port_operations *ops;
1da177e4
LT		 370 unsigned long flags; /* ATA_FLAG_xxx */
371 unsigned int id; /* unique id req'd by scsi midlyr */
372 unsigned int port_no; /* unique port #; from zero */
373 unsigned int hard_port_no; /* hardware port #; from zero */
374
375 struct ata_prd *prd; /* our SG list */
376 dma_addr_t prd_dma; /* and its DMA mapping */
377
cedc9a47
JG		 378 void *pad; /* array of DMA pad buffers */
379 dma_addr_t pad_dma;
380
1da177e4
LT		 381 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
382
383 u8 ctl; /* cache of ATA control register */
384 u8 last_ctl; /* Cache last written value */
1da177e4
LT		 385 unsigned int pio_mask;
386 unsigned int mwdma_mask;
387 unsigned int udma_mask;
388 unsigned int cbl; /* cable type; ATA_CBL_xxx */
1da177e4
LT		 389
390 struct ata_device device[ATA_MAX_DEVICES];
391
392 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
393 unsigned long qactive;
394 unsigned int active_tag;
395
396 struct ata_host_stats stats;
397 struct ata_host_set *host_set;
398
86e45b6b
TH		 399 struct work_struct port_task;
400
14be71f4 401 unsigned int hsm_task_state;
1da177e4
LT		 402 unsigned long pio_task_timeout;
403
bfd60579 404 u32 msg_enable;
a72ec4ce 405 struct list_head eh_done_q;
bfd60579 406
1da177e4
LT		 407 void *private_data;
408};
409
410struct ata_port_operations {
411 void (*port_disable) (struct ata_port *);
412
413 void (*dev_config) (struct ata_port *, struct ata_device *);
414
415 void (*set_piomode) (struct ata_port *, struct ata_device *);
416 void (*set_dmamode) (struct ata_port *, struct ata_device *);
417
057ace5e 418 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 419 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
420
057ace5e 421 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 422 u8 (*check_status)(struct ata_port *ap);
423 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT		 424 void (*dev_select)(struct ata_port *ap, unsigned int device);
425
c19ba8af
TH		 426 void (*phy_reset) (struct ata_port *ap); /* obsolete */
427 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
428
1da177e4
LT		 429 void (*post_set_mode) (struct ata_port *ap);
430
431 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
432
433 void (*bmdma_setup) (struct ata_queued_cmd *qc);
434 void (*bmdma_start) (struct ata_queued_cmd *qc);
435
436 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 437 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4
LT		 438
439 void (*eng_timeout) (struct ata_port *ap);
440
441 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
442 void (*irq_clear) (struct ata_port *);
443
444 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
445 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
446 u32 val);
447
448 int (*port_start) (struct ata_port *ap);
449 void (*port_stop) (struct ata_port *ap);
450
451 void (*host_stop) (struct ata_host_set *host_set);
452
b73fc89f 453 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT		 454 u8 (*bmdma_status) (struct ata_port *ap);
455};
456
457struct ata_port_info {
d0be4a7d 458 struct scsi_host_template *sht;
1da177e4
LT		 459 unsigned long host_flags;
460 unsigned long pio_mask;
461 unsigned long mwdma_mask;
462 unsigned long udma_mask;
057ace5e 463 const struct ata_port_operations *port_ops;
e99f8b5e 464 void *private_data;
1da177e4
LT		 465};
466
452503f9
AC		 467struct ata_timing {
468 unsigned short mode; /* ATA mode */
469 unsigned short setup; /* t1 */
470 unsigned short act8b; /* t2 for 8-bit I/O */
471 unsigned short rec8b; /* t2i for 8-bit I/O */
472 unsigned short cyc8b; /* t0 for 8-bit I/O */
473 unsigned short active; /* t2 or tD */
474 unsigned short recover; /* t2i or tK */
475 unsigned short cycle; /* t0 */
476 unsigned short udma; /* t2CYCTYP/2 */
477};
478
479#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT		 480
481extern void ata_port_probe(struct ata_port *);
482extern void __sata_phy_reset(struct ata_port *ap);
483extern void sata_phy_reset(struct ata_port *ap);
484extern void ata_bus_reset(struct ata_port *ap);
a62c0fc5 485extern int ata_drive_probe_reset(struct ata_port *ap,
7944ea95 486 ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 487 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
488 ata_postreset_fn_t postreset, unsigned int *classes);
8a19ac89 489extern void ata_std_probeinit(struct ata_port *ap);
c2bd5804
TH		 490extern int ata_std_softreset(struct ata_port *ap, int verbose,
491 unsigned int *classes);
492extern int sata_std_hardreset(struct ata_port *ap, int verbose,
493 unsigned int *class);
494extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
623a3128
TH		 495extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
496 int post_reset);
1da177e4
LT		 497extern void ata_port_disable(struct ata_port *);
498extern void ata_std_ports(struct ata_ioports *ioaddr);
499#ifdef CONFIG_PCI
500extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
501 unsigned int n_ports);
502extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA		 503extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
504extern int ata_pci_device_resume(struct pci_dev *pdev);
17bb34a3 505extern int ata_pci_clear_simplex(struct pci_dev *pdev);
1da177e4 506#endif /* CONFIG_PCI */
057ace5e 507extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 508extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 509extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT		 510extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
511extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
512extern int ata_scsi_error(struct Scsi_Host *host);
a72ec4ce
TH		 513extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
514extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
1da177e4
LT		 515extern int ata_scsi_release(struct Scsi_Host *host);
516extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
9b847548
JA		 517extern int ata_scsi_device_resume(struct scsi_device *);
518extern int ata_scsi_device_suspend(struct scsi_device *);
519extern int ata_device_resume(struct ata_port *, struct ata_device *);
520extern int ata_device_suspend(struct ata_port *, struct ata_device *);
67846b30 521extern int ata_ratelimit(void);
6f8b9958
TH		 522extern unsigned int ata_busy_sleep(struct ata_port *ap,
523 unsigned long timeout_pat,
524 unsigned long timeout);
86e45b6b
TH		 525extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
526 void *data, unsigned long delay);
67846b30 527
1da177e4
LT		 528/*
529 * Default driver ops implementations
530 */
057ace5e 531extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 532extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG		 533extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
534extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT		 535extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
536extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
537extern u8 ata_check_status(struct ata_port *ap);
538extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 539extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
c2bd5804 540extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes);
1da177e4
LT		 541extern int ata_port_start (struct ata_port *ap);
542extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 543extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT		 544extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
545extern void ata_qc_prep(struct ata_queued_cmd *qc);
e46834cd 546extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 547extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT		 548extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
549 unsigned int buflen);
550extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
551 unsigned int n_elem);
057ace5e 552extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
6a62a04d
TH		 553extern void ata_id_string(const u16 *id, unsigned char *s,
554 unsigned int ofs, unsigned int len);
555extern void ata_id_c_string(const u16 *id, unsigned char *s,
556 unsigned int ofs, unsigned int len);
1da177e4
LT		 557extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
558extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 559extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT		 560extern u8 ata_bmdma_status(struct ata_port *ap);
561extern void ata_bmdma_irq_clear(struct ata_port *ap);
76014427 562extern void __ata_qc_complete(struct ata_queued_cmd *qc);
1da177e4 563extern void ata_eng_timeout(struct ata_port *ap);
9a3dccc4
TH		 564extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
565 struct scsi_cmnd *cmd,
1da177e4
LT		 566 void (*done)(struct scsi_cmnd *));
567extern int ata_std_bios_param(struct scsi_device *sdev,
568 struct block_device *bdev,
569 sector_t capacity, int geom[]);
570extern int ata_scsi_slave_config(struct scsi_device *sdev);
571
452503f9
AC		 572/*
573 * Timing helpers
574 */
1bc4ccff
AC		 575
576extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC		 577extern int ata_timing_compute(struct ata_device *, unsigned short,
578 struct ata_timing *, int, int);
579extern void ata_timing_merge(const struct ata_timing *,
580 const struct ata_timing *, struct ata_timing *,
581 unsigned int);
582
583enum {
584 ATA_TIMING_SETUP = (1 << 0),
585 ATA_TIMING_ACT8B = (1 << 1),
586 ATA_TIMING_REC8B = (1 << 2),
587 ATA_TIMING_CYC8B = (1 << 3),
588 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
589 ATA_TIMING_CYC8B,
590 ATA_TIMING_ACTIVE = (1 << 4),
591 ATA_TIMING_RECOVER = (1 << 5),
592 ATA_TIMING_CYCLE = (1 << 6),
593 ATA_TIMING_UDMA = (1 << 7),
594 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
595 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
596 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
597 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
598};
599
1da177e4
LT		 600
601#ifdef CONFIG_PCI
602struct pci_bits {
603 unsigned int reg; /* PCI config register to read */
604 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
605 unsigned long mask;
606 unsigned long val;
607};
608
374b1873 609extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 610extern struct ata_probe_ent *
47a86593 611ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 612extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
17bb34a3 613extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
1da177e4
LT		 614#endif /* CONFIG_PCI */
615
616
972c26bd
JG		 617static inline int
618ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
619{
620 if (sg == &qc->pad_sgent)
621 return 1;
622 if (qc->pad_len)
623 return 0;
624 if (((sg - qc->__sg) + 1) == qc->n_elem)
625 return 1;
626 return 0;
627}
628
cc1887f3
TH		 629static inline struct scatterlist *
630ata_qc_first_sg(struct ata_queued_cmd *qc)
631{
632 if (qc->n_elem)
633 return qc->__sg;
634 if (qc->pad_len)
635 return &qc->pad_sgent;
636 return NULL;
637}
638
cedc9a47
JG		 639static inline struct scatterlist *
640ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
641{
642 if (sg == &qc->pad_sgent)
643 return NULL;
644 if (++sg - qc->__sg < qc->n_elem)
645 return sg;
cc1887f3
TH		 646 if (qc->pad_len)
647 return &qc->pad_sgent;
648 return NULL;
cedc9a47
JG		 649}
650
651#define ata_for_each_sg(sg, qc) \
cc1887f3 652 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
cedc9a47 653
1da177e4
LT		 654static inline unsigned int ata_tag_valid(unsigned int tag)
655{
656 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
657}
658
597afd21
TH		 659static inline unsigned int ata_class_present(unsigned int class)
660{
661 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
662}
663
057ace5e 664static inline unsigned int ata_dev_present(const struct ata_device *dev)
1da177e4 665{
597afd21 666 return ata_class_present(dev->class);
1da177e4
LT		 667}
668
669static inline u8 ata_chk_status(struct ata_port *ap)
670{
671 return ap->ops->check_status(ap);
672}
673
0baab86b
EF		 674
675/**
676 * ata_pause - Flush writes and pause 400 nanoseconds.
677 * @ap: Port to wait for.
678 *
679 * LOCKING:
680 * Inherited from caller.
681 */
682
1da177e4
LT		 683static inline void ata_pause(struct ata_port *ap)
684{
685 ata_altstatus(ap);
686 ndelay(400);
687}
688
0baab86b
EF		 689
690/**
691 * ata_busy_wait - Wait for a port status register
692 * @ap: Port to wait for.
693 *
694 * Waits up to max*10 microseconds for the selected bits in the port's
695 * status register to be cleared.
696 * Returns final value of status register.
697 *
698 * LOCKING:
699 * Inherited from caller.
700 */
701
1da177e4
LT		 702static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
703 unsigned int max)
704{
705 u8 status;
706
707 do {
708 udelay(10);
709 status = ata_chk_status(ap);
710 max--;
711 } while ((status & bits) && (max > 0));
712
713 return status;
714}
715
0baab86b
EF		 716
717/**
718 * ata_wait_idle - Wait for a port to be idle.
719 * @ap: Port to wait for.
720 *
721 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
722 * Returns final value of status register.
723 *
724 * LOCKING:
725 * Inherited from caller.
726 */
727
1da177e4
LT		 728static inline u8 ata_wait_idle(struct ata_port *ap)
729{
730 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
731
732 if (status & (ATA_BUSY | ATA_DRQ)) {
733 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD		 734 if (ata_msg_warn(ap))
735 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
736 status, l);
1da177e4
LT		 737 }
738
739 return status;
740}
741
742static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
743{
744 qc->tf.ctl |= ATA_NIEN;
745}
746
747static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
748 unsigned int tag)
749{
750 if (likely(ata_tag_valid(tag)))
751 return &ap->qcmd[tag];
752 return NULL;
753}
754
755static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
756{
757 memset(tf, 0, sizeof(*tf));
758
759 tf->ctl = ap->ctl;
760 if (device == 0)
761 tf->device = ATA_DEVICE_OBS;
762 else
763 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
764}
765
2c13b7ce
JG		 766static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
767{
768 qc->__sg = NULL;
769 qc->flags = 0;
770 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
771 qc->nsect = 0;
772 qc->nbytes = qc->curbytes = 0;
a22e2eb0 773 qc->err_mask = 0;
2c13b7ce
JG		 774
775 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
776}
777
76014427
TH		 778/**
779 * ata_qc_complete - Complete an active ATA command
780 * @qc: Command to complete
781 * @err_mask: ATA Status register contents
782 *
783 * Indicate to the mid and upper layers that an ATA
784 * command has completed, with either an ok or not-ok status.
785 *
786 * LOCKING:
787 * spin_lock_irqsave(host_set lock)
788 */
789static inline void ata_qc_complete(struct ata_queued_cmd *qc)
790{
791 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED))
792 return;
793
794 __ata_qc_complete(qc);
795}
0baab86b
EF		 796
797/**
798 * ata_irq_on - Enable interrupts on a port.
799 * @ap: Port on which interrupts are enabled.
800 *
801 * Enable interrupts on a legacy IDE device using MMIO or PIO,
802 * wait for idle, clear any pending interrupts.
803 *
804 * LOCKING:
805 * Inherited from caller.
806 */
807
1da177e4
LT		 808static inline u8 ata_irq_on(struct ata_port *ap)
809{
810 struct ata_ioports *ioaddr = &ap->ioaddr;
811 u8 tmp;
812
813 ap->ctl &= ~ATA_NIEN;
814 ap->last_ctl = ap->ctl;
815
816 if (ap->flags & ATA_FLAG_MMIO)
817 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
818 else
819 outb(ap->ctl, ioaddr->ctl_addr);
820 tmp = ata_wait_idle(ap);
821
822 ap->ops->irq_clear(ap);
823
824 return tmp;
825}
826
0baab86b
EF		 827
828/**
829 * ata_irq_ack - Acknowledge a device interrupt.
830 * @ap: Port on which interrupts are enabled.
831 *
832 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
833 * or BUSY+DRQ clear). Obtain dma status and port status from
834 * device. Clear the interrupt. Return port status.
835 *
836 * LOCKING:
837 */
838
1da177e4
LT		 839static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
840{
841 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
842 u8 host_stat, post_stat, status;
843
844 status = ata_busy_wait(ap, bits, 1000);
845 if (status & bits)
bfd60579
RD		 846 if (ata_msg_err(ap))
847 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT		 848
849 /* get controller status; clear intr, err bits */
850 if (ap->flags & ATA_FLAG_MMIO) {
851 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
852 host_stat = readb(mmio + ATA_DMA_STATUS);
853 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
854 mmio + ATA_DMA_STATUS);
855
856 post_stat = readb(mmio + ATA_DMA_STATUS);
857 } else {
858 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
859 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
860 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
861
862 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
863 }
864
bfd60579
RD		 865 if (ata_msg_intr(ap))
866 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
867 __FUNCTION__,
868 host_stat, post_stat, status);
1da177e4
LT		 869
870 return status;
871}
872
873static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
874{
875 return ap->ops->scr_read(ap, reg);
876}
877
878static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
879{
880 ap->ops->scr_write(ap, reg, val);
881}
882
8a60a071 883static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
cdcca89e
BR		 884 u32 val)
885{
886 ap->ops->scr_write(ap, reg, val);
887 (void) ap->ops->scr_read(ap, reg);
888}
889
1da177e4
LT		 890static inline unsigned int sata_dev_present(struct ata_port *ap)
891{
892 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
893}
894
057ace5e 895static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT		 896{
897 return ata_id_wcache_enabled(dev->id) ||
898 ata_id_has_flush(dev->id) ||
899 ata_id_has_flush_ext(dev->id);
900}
901
a7dac447
JG		 902static inline unsigned int ac_err_mask(u8 status)
903{
904 if (status & ATA_BUSY)
11a56d24 905 return AC_ERR_HSM;
a7dac447
JG		 906 if (status & (ATA_ERR | ATA_DF))
907 return AC_ERR_DEV;
908 return 0;
909}
910
911static inline unsigned int __ac_err_mask(u8 status)
912{
913 unsigned int mask = ac_err_mask(status);
914 if (mask == 0)
915 return AC_ERR_OTHER;
916 return mask;
917}
918
6037d6bb
JG		 919static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
920{
921 ap->pad_dma = 0;
922 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
923 &ap->pad_dma, GFP_KERNEL);
924 return (ap->pad == NULL) ? -ENOMEM : 0;
925}
926
927static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
928{
929 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
930}
931
1da177e4 932#endif /* __LINUX_LIBATA_H__ */
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