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[net-next-2.6.git] / include / linux / irq.h
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06fcb0c6
IM
1#ifndef _LINUX_IRQ_H
2#define _LINUX_IRQ_H
1da177e4
LT
3
4/*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
8 *
9 * Thanks. --rmk
10 */
11
23f9b317 12#include <linux/smp.h>
1da177e4 13
06fcb0c6 14#ifndef CONFIG_S390
1da177e4
LT
15
16#include <linux/linkage.h>
17#include <linux/cache.h>
18#include <linux/spinlock.h>
19#include <linux/cpumask.h>
908dcecd 20#include <linux/irqreturn.h>
dd3a1db9 21#include <linux/irqnr.h>
77904fd6 22#include <linux/errno.h>
1da177e4
LT
23
24#include <asm/irq.h>
25#include <asm/ptrace.h>
7d12e780 26#include <asm/irq_regs.h>
1da177e4 27
57a58a94 28struct irq_desc;
ec701584 29typedef void (*irq_flow_handler_t)(unsigned int irq,
7d12e780 30 struct irq_desc *desc);
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31
32
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LT
33/*
34 * IRQ line status.
6e213616 35 *
950f4427 36 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
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TG
37 *
38 * IRQ types
1da177e4 39 */
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TG
40#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
41#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
42#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
43#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
44#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
45#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
46#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
47#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
48
49/* Internal flags */
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TG
50#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
51#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
52#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
53#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
54#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
55#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
56#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
57#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
58#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
59#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
60#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
61#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
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62#define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
63#define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
64#define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
1adb0850 65#define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
f6d87f4b
TG
66#define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
67#define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
950f4427 68
0d7012a9 69#ifdef CONFIG_IRQ_PER_CPU
f26fdd59 70# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
950f4427 71# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
f26fdd59
KW
72#else
73# define CHECK_IRQ_PER_CPU(var) 0
950f4427 74# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
f26fdd59 75#endif
1da177e4 76
6a6de9ef 77struct proc_dir_entry;
5b912c10 78struct msi_desc;
6a6de9ef 79
8fee5c36 80/**
6a6de9ef 81 * struct irq_chip - hardware interrupt chip descriptor
8fee5c36
IM
82 *
83 * @name: name for /proc/interrupts
84 * @startup: start up the interrupt (defaults to ->enable if NULL)
85 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
86 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
87 * @disable: disable the interrupt (defaults to chip->mask if NULL)
8fee5c36
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88 * @ack: start of a new interrupt
89 * @mask: mask an interrupt source
90 * @mask_ack: ack and mask an interrupt source
91 * @unmask: unmask an interrupt source
47c2a3aa
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92 * @eoi: end of interrupt - chip level
93 * @end: end of interrupt - flow level
8fee5c36
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94 * @set_affinity: set the CPU affinity on SMP machines
95 * @retrigger: resend an IRQ to the CPU
96 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
97 * @set_wake: enable/disable power-management wake-on of an IRQ
98 *
99 * @release: release function solely used by UML
6a6de9ef 100 * @typename: obsoleted by name, kept as migration helper
1da177e4 101 */
6a6de9ef
TG
102struct irq_chip {
103 const char *name;
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IM
104 unsigned int (*startup)(unsigned int irq);
105 void (*shutdown)(unsigned int irq);
106 void (*enable)(unsigned int irq);
107 void (*disable)(unsigned int irq);
6a6de9ef 108
71d218b7 109 void (*ack)(unsigned int irq);
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TG
110 void (*mask)(unsigned int irq);
111 void (*mask_ack)(unsigned int irq);
112 void (*unmask)(unsigned int irq);
47c2a3aa 113 void (*eoi)(unsigned int irq);
6a6de9ef 114
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115 void (*end)(unsigned int irq);
116 void (*set_affinity)(unsigned int irq, cpumask_t dest);
c0ad90a3 117 int (*retrigger)(unsigned int irq);
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TG
118 int (*set_type)(unsigned int irq, unsigned int flow_type);
119 int (*set_wake)(unsigned int irq, unsigned int on);
c0ad90a3 120
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PBG
121 /* Currently used only by UML, might disappear one day.*/
122#ifdef CONFIG_IRQ_RELEASE_METHOD
71d218b7 123 void (*release)(unsigned int irq, void *dev_id);
b77d6adc 124#endif
6a6de9ef
TG
125 /*
126 * For compatibility, ->typename is copied into ->name.
127 * Will disappear.
128 */
129 const char *typename;
1da177e4
LT
130};
131
8fee5c36
IM
132/**
133 * struct irq_desc - interrupt descriptor
2ed1cdcf 134 * @irq: interrupt number for this descriptor
6a6de9ef
TG
135 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
136 * @chip: low level interrupt hardware access
472900b8 137 * @msi_desc: MSI descriptor
6a6de9ef
TG
138 * @handler_data: per-IRQ data for the irq_chip methods
139 * @chip_data: platform-specific per-chip private data for the chip
140 * methods, to allow shared chip implementations
8fee5c36
IM
141 * @action: the irq action chain
142 * @status: status information
143 * @depth: disable-depth, for nested irq_disable() calls
15a647eb 144 * @wake_depth: enable depth, for multiple set_irq_wake() callers
8fee5c36
IM
145 * @irq_count: stats field to detect stalled irqs
146 * @irqs_unhandled: stats field for spurious unhandled interrupts
5ac4d823 147 * @last_unhandled: aging timer for unhandled count
8fee5c36
IM
148 * @lock: locking for SMP
149 * @affinity: IRQ affinity on SMP
6a6de9ef 150 * @cpu: cpu index useful for balancing
8fee5c36 151 * @pending_mask: pending rebalanced interrupts
8fee5c36 152 * @dir: /proc/irq/ procfs entry
a460e745 153 * @name: flow handler name for /proc/interrupts output
1da177e4 154 */
34ffdb72 155struct irq_desc {
08678b08 156 unsigned int irq;
57a58a94 157 irq_flow_handler_t handle_irq;
6a6de9ef 158 struct irq_chip *chip;
5b912c10 159 struct msi_desc *msi_desc;
6a6de9ef 160 void *handler_data;
71d218b7
IM
161 void *chip_data;
162 struct irqaction *action; /* IRQ action list */
163 unsigned int status; /* IRQ status */
6a6de9ef 164
71d218b7 165 unsigned int depth; /* nested irq disables */
15a647eb 166 unsigned int wake_depth; /* nested wake enables */
71d218b7
IM
167 unsigned int irq_count; /* For detecting broken IRQs */
168 unsigned int irqs_unhandled;
4f27c00b 169 unsigned long last_unhandled; /* Aging timer for unhandled count */
71d218b7 170 spinlock_t lock;
a53da52f 171#ifdef CONFIG_SMP
71d218b7 172 cpumask_t affinity;
6a6de9ef 173 unsigned int cpu;
a53da52f 174#endif
8b8e8c1b 175#ifdef CONFIG_GENERIC_PENDING_IRQ
cd916d31 176 cpumask_t pending_mask;
54d5d424 177#endif
4a733ee1 178#ifdef CONFIG_PROC_FS
a460e745 179 struct proc_dir_entry *dir;
4a733ee1 180#endif
a460e745 181 const char *name;
e729aa16 182} ____cacheline_internodealigned_in_smp;
1da177e4 183
9059d8fa 184
34ffdb72 185extern struct irq_desc irq_desc[NR_IRQS];
9059d8fa 186
c6b7674f
TG
187static inline struct irq_desc *irq_to_desc(unsigned int irq)
188{
189 return (irq < nr_irqs) ? irq_desc + irq : NULL;
190}
191
34ffdb72
IM
192/*
193 * Migration helpers for obsolete names, they will go away:
194 */
6a6de9ef
TG
195#define hw_interrupt_type irq_chip
196typedef struct irq_chip hw_irq_controller;
197#define no_irq_type no_irq_chip
34ffdb72
IM
198typedef struct irq_desc irq_desc_t;
199
200/*
201 * Pick up the arch-dependent methods:
202 */
203#include <asm/hw_irq.h>
1da177e4 204
06fcb0c6 205extern int setup_irq(unsigned int irq, struct irqaction *new);
1da177e4
LT
206
207#ifdef CONFIG_GENERIC_HARDIRQS
06fcb0c6 208
54d5d424
AR
209#ifdef CONFIG_SMP
210
8b8e8c1b 211#ifdef CONFIG_GENERIC_PENDING_IRQ
54d5d424 212
c777ac55 213void move_native_irq(int irq);
e7b946e9 214void move_masked_irq(int irq);
54d5d424 215
8b8e8c1b 216#else /* CONFIG_GENERIC_PENDING_IRQ */
06fcb0c6
IM
217
218static inline void move_irq(int irq)
219{
220}
221
222static inline void move_native_irq(int irq)
223{
224}
225
e7b946e9
EB
226static inline void move_masked_irq(int irq)
227{
228}
229
06fcb0c6 230#endif /* CONFIG_GENERIC_PENDING_IRQ */
54d5d424 231
06fcb0c6 232#else /* CONFIG_SMP */
54d5d424 233
54d5d424 234#define move_native_irq(x)
e7b946e9 235#define move_masked_irq(x)
54d5d424 236
06fcb0c6 237#endif /* CONFIG_SMP */
54d5d424 238
1da177e4 239extern int no_irq_affinity;
1da177e4 240
950f4427
TG
241static inline int irq_balancing_disabled(unsigned int irq)
242{
08678b08
YL
243 struct irq_desc *desc;
244
245 desc = irq_to_desc(irq);
246 return desc->status & IRQ_NO_BALANCING_MASK;
950f4427
TG
247}
248
6a6de9ef 249/* Handle irq action chains: */
7d12e780 250extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
6a6de9ef
TG
251
252/*
253 * Built-in IRQ handlers for various IRQ types,
254 * callable via desc->chip->handle_irq()
255 */
ec701584
HH
256extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
257extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
258extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
259extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
260extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
261extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
6a6de9ef 262
2e60bbb6 263/*
6a6de9ef 264 * Monolithic do_IRQ implementation.
2e60bbb6 265 */
af8c65b5 266#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
ec701584 267extern unsigned int __do_IRQ(unsigned int irq);
af8c65b5 268#endif
2e60bbb6 269
dae86204
IM
270/*
271 * Architectures call this to let the generic IRQ layer
272 * handle an interrupt. If the descriptor is attached to an
273 * irqchip-style controller then we call the ->handle_irq() handler,
274 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
275 */
46926b67 276static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
dae86204 277{
af8c65b5 278#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
7d12e780 279 desc->handle_irq(irq, desc);
af8c65b5 280#else
dae86204 281 if (likely(desc->handle_irq))
7d12e780 282 desc->handle_irq(irq, desc);
dae86204 283 else
7d12e780 284 __do_IRQ(irq);
af8c65b5 285#endif
dae86204
IM
286}
287
46926b67
YL
288static inline void generic_handle_irq(unsigned int irq)
289{
290 generic_handle_irq_desc(irq, irq_to_desc(irq));
291}
292
6a6de9ef 293/* Handling of unhandled and spurious interrupts: */
34ffdb72 294extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
7d12e780 295 int action_ret);
1da177e4 296
a4633adc
TG
297/* Resending of interrupts :*/
298void check_irq_resend(struct irq_desc *desc, unsigned int irq);
299
6a6de9ef
TG
300/* Enable/disable irq debugging output: */
301extern int noirqdebug_setup(char *str);
302
303/* Checks whether the interrupt can be requested by request_irq(): */
304extern int can_request_irq(unsigned int irq, unsigned long irqflags);
305
f8b5473f 306/* Dummy irq-chip implementations: */
6a6de9ef 307extern struct irq_chip no_irq_chip;
f8b5473f 308extern struct irq_chip dummy_irq_chip;
6a6de9ef 309
145fc655
IM
310extern void
311set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
312 irq_flow_handler_t handle);
6a6de9ef 313extern void
a460e745
IM
314set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
315 irq_flow_handler_t handle, const char *name);
316
6a6de9ef 317extern void
a460e745
IM
318__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
319 const char *name);
1da177e4 320
b019e573
KH
321/* caller has locked the irq_desc and both params are valid */
322static inline void __set_irq_handler_unlocked(int irq,
323 irq_flow_handler_t handler)
324{
08678b08
YL
325 struct irq_desc *desc;
326
327 desc = irq_to_desc(irq);
328 desc->handle_irq = handler;
b019e573
KH
329}
330
6a6de9ef
TG
331/*
332 * Set a highlevel flow handler for a given IRQ:
333 */
334static inline void
57a58a94 335set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
6a6de9ef 336{
a460e745 337 __set_irq_handler(irq, handle, 0, NULL);
6a6de9ef
TG
338}
339
340/*
341 * Set a highlevel chained flow handler for a given IRQ.
342 * (a chained handler is automatically enabled and set to
343 * IRQ_NOREQUEST and IRQ_NOPROBE)
344 */
345static inline void
346set_irq_chained_handler(unsigned int irq,
57a58a94 347 irq_flow_handler_t handle)
6a6de9ef 348{
a460e745 349 __set_irq_handler(irq, handle, 1, NULL);
6a6de9ef
TG
350}
351
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RB
352extern void set_irq_noprobe(unsigned int irq);
353extern void set_irq_probe(unsigned int irq);
354
3a16d713 355/* Handle dynamic irq creation and destruction */
6d50bc26 356extern unsigned int create_irq_nr(unsigned int irq_want);
3a16d713
EB
357extern int create_irq(void);
358extern void destroy_irq(unsigned int irq);
359
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360/* Test to see if a driver has successfully requested an irq */
361static inline int irq_has_action(unsigned int irq)
362{
08678b08 363 struct irq_desc *desc = irq_to_desc(irq);
1f80025e
EB
364 return desc->action != NULL;
365}
366
3a16d713
EB
367/* Dynamic irq helper functions */
368extern void dynamic_irq_init(unsigned int irq);
369extern void dynamic_irq_cleanup(unsigned int irq);
dd87eb3a 370
3a16d713 371/* Set/get chip/data for an IRQ: */
dd87eb3a
TG
372extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
373extern int set_irq_data(unsigned int irq, void *data);
374extern int set_irq_chip_data(unsigned int irq, void *data);
375extern int set_irq_type(unsigned int irq, unsigned int type);
5b912c10 376extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
dd87eb3a 377
08678b08
YL
378#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
379#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
380#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
381#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
dd87eb3a 382
6a6de9ef 383#endif /* CONFIG_GENERIC_HARDIRQS */
1da177e4 384
06fcb0c6 385#endif /* !CONFIG_S390 */
1da177e4 386
06fcb0c6 387#endif /* _LINUX_IRQ_H */