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[net-next-2.6.git] / include / asm-mips / page.h
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 */
9#ifndef _ASM_PAGE_H
10#define _ASM_PAGE_H
11
1da177e4
LT
12#include <spaces.h>
13
1da177e4
LT
14/*
15 * PAGE_SHIFT determines the page size
16 */
17#ifdef CONFIG_PAGE_SIZE_4KB
18#define PAGE_SHIFT 12
19#endif
20#ifdef CONFIG_PAGE_SIZE_8KB
21#define PAGE_SHIFT 13
22#endif
23#ifdef CONFIG_PAGE_SIZE_16KB
24#define PAGE_SHIFT 14
25#endif
26#ifdef CONFIG_PAGE_SIZE_64KB
27#define PAGE_SHIFT 16
28#endif
29#define PAGE_SIZE (1UL << PAGE_SHIFT)
30#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
31
1da177e4
LT
32#ifndef __ASSEMBLY__
33
41b0483e 34#include <linux/pfn.h>
b1c65b39 35#include <asm/io.h>
6f284a2c
FBH
36
37/*
38 * It's normally defined only for FLATMEM config but it's
39 * used in our early mem init code for all memory models.
40 * So always define it.
41 */
42#define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET)
43
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LT
44extern void clear_page(void * page);
45extern void copy_page(void * to, void * from);
46
47extern unsigned long shm_align_mask;
48
49static inline unsigned long pages_do_alias(unsigned long addr1,
50 unsigned long addr2)
51{
52 return (addr1 ^ addr2) & shm_align_mask;
53}
54
55struct page;
56
57static inline void clear_user_page(void *addr, unsigned long vaddr,
58 struct page *page)
59{
60 extern void (*flush_data_cache_page)(unsigned long addr);
61
62 clear_page(addr);
585fa724 63 if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK))
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LT
64 flush_data_cache_page((unsigned long)addr);
65}
66
bcd02280
AN
67extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
68 struct page *to);
69struct vm_area_struct;
70extern void copy_user_highpage(struct page *to, struct page *from,
71 unsigned long vaddr, struct vm_area_struct *vma);
1da177e4 72
bcd02280 73#define __HAVE_ARCH_COPY_USER_HIGHPAGE
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LT
74
75/*
76 * These are used to make use of C type-checking..
77 */
78#ifdef CONFIG_64BIT_PHYS_ADDR
ec917c2c 79 #ifdef CONFIG_CPU_MIPS32
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LT
80 typedef struct { unsigned long pte_low, pte_high; } pte_t;
81 #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
d34555fb 82 #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
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LT
83 #else
84 typedef struct { unsigned long long pte; } pte_t;
85 #define pte_val(x) ((x).pte)
d34555fb 86 #define __pte(x) ((pte_t) { (x) } )
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87 #endif
88#else
89typedef struct { unsigned long pte; } pte_t;
90#define pte_val(x) ((x).pte)
c6e8b587 91#define __pte(x) ((pte_t) { (x) } )
d34555fb 92#endif
1da177e4 93
c6e8b587
RB
94/*
95 * For 3-level pagetables we defines these ourselves, for 2-level the
96 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
97 */
98#ifdef CONFIG_64BIT
1da177e4 99
c6e8b587 100typedef struct { unsigned long pmd; } pmd_t;
1da177e4 101#define pmd_val(x) ((x).pmd)
c6e8b587 102#define __pmd(x) ((pmd_t) { (x) } )
1da177e4 103
c6e8b587 104#endif
1da177e4 105
c6e8b587
RB
106/*
107 * Right now we don't support 4-level pagetables, so all pud-related
108 * definitions come from <asm-generic/pgtable-nopud.h>.
109 */
110
111/*
112 * Finall the top of the hierarchy, the pgd
113 */
114typedef struct { unsigned long pgd; } pgd_t;
115#define pgd_val(x) ((x).pgd)
1da177e4 116#define __pgd(x) ((pgd_t) { (x) } )
c6e8b587
RB
117
118/*
119 * Manipulate page protection bits
120 */
121typedef struct { unsigned long pgprot; } pgprot_t;
122#define pgprot_val(x) ((x).pgprot)
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123#define __pgprot(x) ((pgprot_t) { (x) } )
124
c6e8b587
RB
125/*
126 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
127 * pair of pages we only have a single global bit per pair of pages. When
128 * writing to the TLB make sure we always have the bit set for both pages
129 * or none. This macro is used to access the `buddy' of the pte we're just
130 * working on.
131 */
132#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
133
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LT
134#endif /* !__ASSEMBLY__ */
135
136/* to align the pointer to the (next) page boundary */
137#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
138
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FBH
139/*
140 * __pa()/__va() should be used only during mem init.
141 */
f4fae826 142#ifdef CONFIG_64BIT
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FBH
143#define __pa(x) \
144({ \
145 unsigned long __x = (unsigned long)(x); \
146 __x < CKSEG0 ? XPHYSADDR(__x) : CPHYSADDR(__x); \
147})
620a4802 148#else
b1c65b39
FBH
149#define __pa(x) \
150 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
620a4802 151#endif
6f284a2c 152#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
21a151d8 153#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
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LT
154
155#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
156
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RB
157#ifdef CONFIG_FLATMEM
158
6f284a2c 159#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
e53639d8 160
7de58fab
AN
161#elif defined(CONFIG_SPARSEMEM)
162
163/* pfn_valid is defined in linux/mmzone.h */
164
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RB
165#elif defined(CONFIG_NEED_MULTIPLE_NODES)
166
167#define pfn_valid(pfn) \
168({ \
169 unsigned long __pfn = (pfn); \
170 int __n = pfn_to_nid(__pfn); \
171 ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \
172 NODE_DATA(__n)->node_spanned_pages) \
173 : 0); \
174})
175
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RB
176#endif
177
99e3b942
FBH
178#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
179#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr)))
1da177e4
LT
180
181#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
182 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
183
184#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
185#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
186
a02036e7 187#include <asm-generic/memory_model.h>
fd4fd5aa
SR
188#include <asm-generic/page.h>
189
1da177e4 190#endif /* _ASM_PAGE_H */