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[net-next-2.6.git] / include / asm-ia64 / sn / sn_sal.h
CommitLineData
1da177e4
LT
1#ifndef _ASM_IA64_SN_SN_SAL_H
2#define _ASM_IA64_SN_SN_SAL_H
3
4/*
5 * System Abstraction Layer definitions for IA64
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
308a8782 11 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved.
1da177e4
LT
12 */
13
14
1da177e4
LT
15#include <asm/sal.h>
16#include <asm/sn/sn_cpuid.h>
17#include <asm/sn/arch.h>
18#include <asm/sn/geo.h>
19#include <asm/sn/nodepda.h>
20#include <asm/sn/shub_mmr.h>
21
22// SGI Specific Calls
23#define SN_SAL_POD_MODE 0x02000001
24#define SN_SAL_SYSTEM_RESET 0x02000002
25#define SN_SAL_PROBE 0x02000003
26#define SN_SAL_GET_MASTER_NASID 0x02000004
27#define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
28#define SN_SAL_LOG_CE 0x02000006
29#define SN_SAL_REGISTER_CE 0x02000007
30#define SN_SAL_GET_PARTITION_ADDR 0x02000009
31#define SN_SAL_XP_ADDR_REGION 0x0200000f
32#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
33#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
34#define SN_SAL_PRINT_ERROR 0x02000012
35#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
36#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
1da177e4 37#define SN_SAL_GET_SAPIC_INFO 0x0200001d
bf1cf98f 38#define SN_SAL_GET_SN_INFO 0x0200001e
1da177e4
LT
39#define SN_SAL_CONSOLE_PUTC 0x02000021
40#define SN_SAL_CONSOLE_GETC 0x02000022
41#define SN_SAL_CONSOLE_PUTS 0x02000023
42#define SN_SAL_CONSOLE_GETS 0x02000024
43#define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
44#define SN_SAL_CONSOLE_POLL 0x02000026
45#define SN_SAL_CONSOLE_INTR 0x02000027
46#define SN_SAL_CONSOLE_PUTB 0x02000028
47#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
48#define SN_SAL_CONSOLE_READC 0x0200002b
25732ad4 49#define SN_SAL_SYSCTL_OP 0x02000030
1da177e4
LT
50#define SN_SAL_SYSCTL_MODID_GET 0x02000031
51#define SN_SAL_SYSCTL_GET 0x02000032
52#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
53#define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
54#define SN_SAL_SYSCTL_SLAB_GET 0x02000036
55#define SN_SAL_BUS_CONFIG 0x02000037
56#define SN_SAL_SYS_SERIAL_GET 0x02000038
57#define SN_SAL_PARTITION_SERIAL_GET 0x02000039
771388dc 58#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
1da177e4
LT
59#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61#define SN_SAL_COHERENCE 0x0200003d
62#define SN_SAL_MEMPROTECT 0x0200003e
63#define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
64
65#define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
66#define SN_SAL_IROUTER_OP 0x02000043
67639deb 67#define SN_SAL_SYSCTL_EVENT 0x02000044
1da177e4
LT
68#define SN_SAL_IOIF_INTERRUPT 0x0200004a
69#define SN_SAL_HWPERF_OP 0x02000050 // lock
70#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
61b9cf7c 71#define SN_SAL_IOIF_PCI_SAFE 0x02000052
1da177e4
LT
72#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
73#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
74#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
75#define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
76#define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
6d6e4200
PB
77#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated
78#define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a
1da177e4 79
8ea6091f 80#define SN_SAL_IOIF_INIT 0x0200005f
1da177e4 81#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
93a07d0a 82#define SN_SAL_BTE_RECOVER 0x02000061
ecc3c30a
MG
83#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
84#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
1da177e4 85
a1cddb88
JS
86#define SN_SAL_GET_PROM_FEATURE_SET 0x02000065
87#define SN_SAL_SET_OS_FEATURE_SET 0x02000066
86db2f42 88#define SN_SAL_INJECT_ERROR 0x02000067
9d56d878 89#define SN_SAL_SET_CPU_NUMBER 0x02000068
a1cddb88 90
a7956113
ZN
91#define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069
92
1da177e4
LT
93/*
94 * Service-specific constants
95 */
96
97/* Console interrupt manipulation */
98 /* action codes */
99#define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */
100#define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */
101#define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */
102 /* interrupt specification & status return codes */
103#define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */
104#define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */
105
106/* interrupt handling */
107#define SAL_INTR_ALLOC 1
108#define SAL_INTR_FREE 2
0e17b560 109#define SAL_INTR_REDIRECT 3
1da177e4 110
25732ad4
BL
111/*
112 * operations available on the generic SN_SAL_SYSCTL_OP
113 * runtime service
114 */
115#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
116#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
117
1da177e4
LT
118/*
119 * IRouter (i.e. generalized system controller) operations
120 */
121#define SAL_IROUTER_OPEN 0 /* open a subchannel */
122#define SAL_IROUTER_CLOSE 1 /* close a subchannel */
123#define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */
124#define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */
125#define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for
126 * an open subchannel
127 */
128#define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */
129#define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */
130#define SAL_IROUTER_INIT 7 /* initialize IRouter driver */
131
132/* IRouter interrupt mask bits */
133#define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
134#define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
135
6872ec54
RA
136/*
137 * Error Handling Features
138 */
a1cddb88
JS
139#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete
140#define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete
6872ec54
RA
141#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
142#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
1da177e4
LT
143
144/*
145 * SAL Error Codes
146 */
147#define SALRET_MORE_PASSES 1
148#define SALRET_OK 0
149#define SALRET_NOT_IMPLEMENTED (-1)
150#define SALRET_INVALID_ARG (-2)
151#define SALRET_ERROR (-3)
152
71a5d027
JS
153#define SN_SAL_FAKE_PROM 0x02009999
154
1da177e4 155/**
283c7f6a
PB
156 * sn_sal_revision - get the SGI SAL revision number
157 *
158 * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor).
159 * This routine simply extracts the major and minor values and
160 * presents them in a u32 format.
161 *
162 * For example, version 4.05 would be represented at 0x0405.
163 */
164static inline u32
165sn_sal_rev(void)
1da177e4 166{
b2c99e3c 167 struct ia64_sal_systab *systab = __va(efi.sal_systab);
1da177e4 168
283c7f6a 169 return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor);
1da177e4
LT
170}
171
1da177e4
LT
172/*
173 * Returns the master console nasid, if the call fails, return an illegal
174 * value.
175 */
176static inline u64
177ia64_sn_get_console_nasid(void)
178{
179 struct ia64_sal_retval ret_stuff;
180
181 ret_stuff.status = 0;
182 ret_stuff.v0 = 0;
183 ret_stuff.v1 = 0;
184 ret_stuff.v2 = 0;
185 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0);
186
187 if (ret_stuff.status < 0)
188 return ret_stuff.status;
189
190 /* Master console nasid is in 'v0' */
191 return ret_stuff.v0;
192}
193
194/*
195 * Returns the master baseio nasid, if the call fails, return an illegal
196 * value.
197 */
198static inline u64
199ia64_sn_get_master_baseio_nasid(void)
200{
201 struct ia64_sal_retval ret_stuff;
202
203 ret_stuff.status = 0;
204 ret_stuff.v0 = 0;
205 ret_stuff.v1 = 0;
206 ret_stuff.v2 = 0;
207 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0);
208
209 if (ret_stuff.status < 0)
210 return ret_stuff.status;
211
212 /* Master baseio nasid is in 'v0' */
213 return ret_stuff.v0;
214}
215
24ee0a6d 216static inline void *
1da177e4
LT
217ia64_sn_get_klconfig_addr(nasid_t nasid)
218{
219 struct ia64_sal_retval ret_stuff;
1da177e4 220
1da177e4
LT
221 ret_stuff.status = 0;
222 ret_stuff.v0 = 0;
223 ret_stuff.v1 = 0;
224 ret_stuff.v2 = 0;
225 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
1da177e4
LT
226 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
227}
228
229/*
230 * Returns the next console character.
231 */
232static inline u64
233ia64_sn_console_getc(int *ch)
234{
235 struct ia64_sal_retval ret_stuff;
236
237 ret_stuff.status = 0;
238 ret_stuff.v0 = 0;
239 ret_stuff.v1 = 0;
240 ret_stuff.v2 = 0;
241 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0);
242
243 /* character is in 'v0' */
244 *ch = (int)ret_stuff.v0;
245
246 return ret_stuff.status;
247}
248
249/*
250 * Read a character from the SAL console device, after a previous interrupt
251 * or poll operation has given us to know that a character is available
252 * to be read.
253 */
254static inline u64
255ia64_sn_console_readc(void)
256{
257 struct ia64_sal_retval ret_stuff;
258
259 ret_stuff.status = 0;
260 ret_stuff.v0 = 0;
261 ret_stuff.v1 = 0;
262 ret_stuff.v2 = 0;
263 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0);
264
265 /* character is in 'v0' */
266 return ret_stuff.v0;
267}
268
269/*
270 * Sends the given character to the console.
271 */
272static inline u64
273ia64_sn_console_putc(char ch)
274{
275 struct ia64_sal_retval ret_stuff;
276
277 ret_stuff.status = 0;
278 ret_stuff.v0 = 0;
279 ret_stuff.v1 = 0;
280 ret_stuff.v2 = 0;
53493dcf 281 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0);
1da177e4
LT
282
283 return ret_stuff.status;
284}
285
286/*
287 * Sends the given buffer to the console.
288 */
289static inline u64
290ia64_sn_console_putb(const char *buf, int len)
291{
292 struct ia64_sal_retval ret_stuff;
293
294 ret_stuff.status = 0;
295 ret_stuff.v0 = 0;
296 ret_stuff.v1 = 0;
297 ret_stuff.v2 = 0;
53493dcf 298 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0);
1da177e4
LT
299
300 if ( ret_stuff.status == 0 ) {
301 return ret_stuff.v0;
302 }
303 return (u64)0;
304}
305
306/*
307 * Print a platform error record
308 */
309static inline u64
310ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
311{
312 struct ia64_sal_retval ret_stuff;
313
314 ret_stuff.status = 0;
315 ret_stuff.v0 = 0;
316 ret_stuff.v1 = 0;
317 ret_stuff.v2 = 0;
53493dcf 318 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0);
1da177e4
LT
319
320 return ret_stuff.status;
321}
322
323/*
324 * Check for Platform errors
325 */
326static inline u64
327ia64_sn_plat_cpei_handler(void)
328{
329 struct ia64_sal_retval ret_stuff;
330
331 ret_stuff.status = 0;
332 ret_stuff.v0 = 0;
333 ret_stuff.v1 = 0;
334 ret_stuff.v2 = 0;
335 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0);
336
337 return ret_stuff.status;
338}
339
6872ec54 340/*
a1cddb88 341 * Set Error Handling Features (Obsolete)
6872ec54
RA
342 */
343static inline u64
344ia64_sn_plat_set_error_handling_features(void)
345{
346 struct ia64_sal_retval ret_stuff;
347
348 ret_stuff.status = 0;
349 ret_stuff.v0 = 0;
350 ret_stuff.v1 = 0;
351 ret_stuff.v2 = 0;
352 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
ea95972f 353 SAL_ERR_FEAT_LOG_SBES,
6872ec54
RA
354 0, 0, 0, 0, 0, 0);
355
356 return ret_stuff.status;
357}
358
1da177e4
LT
359/*
360 * Checks for console input.
361 */
362static inline u64
363ia64_sn_console_check(int *result)
364{
365 struct ia64_sal_retval ret_stuff;
366
367 ret_stuff.status = 0;
368 ret_stuff.v0 = 0;
369 ret_stuff.v1 = 0;
370 ret_stuff.v2 = 0;
371 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0);
372
373 /* result is in 'v0' */
374 *result = (int)ret_stuff.v0;
375
376 return ret_stuff.status;
377}
378
379/*
380 * Checks console interrupt status
381 */
382static inline u64
383ia64_sn_console_intr_status(void)
384{
385 struct ia64_sal_retval ret_stuff;
386
387 ret_stuff.status = 0;
388 ret_stuff.v0 = 0;
389 ret_stuff.v1 = 0;
390 ret_stuff.v2 = 0;
391 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
392 0, SAL_CONSOLE_INTR_STATUS,
393 0, 0, 0, 0, 0);
394
395 if (ret_stuff.status == 0) {
396 return ret_stuff.v0;
397 }
398
399 return 0;
400}
401
402/*
403 * Enable an interrupt on the SAL console device.
404 */
405static inline void
53493dcf 406ia64_sn_console_intr_enable(u64 intr)
1da177e4
LT
407{
408 struct ia64_sal_retval ret_stuff;
409
410 ret_stuff.status = 0;
411 ret_stuff.v0 = 0;
412 ret_stuff.v1 = 0;
413 ret_stuff.v2 = 0;
414 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
415 intr, SAL_CONSOLE_INTR_ON,
416 0, 0, 0, 0, 0);
417}
418
419/*
420 * Disable an interrupt on the SAL console device.
421 */
422static inline void
53493dcf 423ia64_sn_console_intr_disable(u64 intr)
1da177e4
LT
424{
425 struct ia64_sal_retval ret_stuff;
426
427 ret_stuff.status = 0;
428 ret_stuff.v0 = 0;
429 ret_stuff.v1 = 0;
430 ret_stuff.v2 = 0;
431 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
432 intr, SAL_CONSOLE_INTR_OFF,
433 0, 0, 0, 0, 0);
434}
435
436/*
437 * Sends a character buffer to the console asynchronously.
438 */
439static inline u64
440ia64_sn_console_xmit_chars(char *buf, int len)
441{
442 struct ia64_sal_retval ret_stuff;
443
444 ret_stuff.status = 0;
445 ret_stuff.v0 = 0;
446 ret_stuff.v1 = 0;
447 ret_stuff.v2 = 0;
448 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
53493dcf 449 (u64)buf, (u64)len,
1da177e4
LT
450 0, 0, 0, 0, 0);
451
452 if (ret_stuff.status == 0) {
453 return ret_stuff.v0;
454 }
455
456 return 0;
457}
458
459/*
460 * Returns the iobrick module Id
461 */
462static inline u64
463ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
464{
465 struct ia64_sal_retval ret_stuff;
466
467 ret_stuff.status = 0;
468 ret_stuff.v0 = 0;
469 ret_stuff.v1 = 0;
470 ret_stuff.v2 = 0;
471 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0);
472
473 /* result is in 'v0' */
474 *result = (int)ret_stuff.v0;
475
476 return ret_stuff.status;
477}
478
479/**
480 * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function
481 *
482 * SN_SAL_POD_MODE actually takes an argument, but it's always
483 * 0 when we call it from the kernel, so we don't have to expose
484 * it to the caller.
485 */
486static inline u64
487ia64_sn_pod_mode(void)
488{
489 struct ia64_sal_retval isrv;
8eac3757 490 SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
1da177e4
LT
491 if (isrv.status)
492 return 0;
493 return isrv.v0;
494}
495
496/**
497 * ia64_sn_probe_mem - read from memory safely
498 * @addr: address to probe
499 * @size: number bytes to read (1,2,4,8)
500 * @data_ptr: address to store value read by probe (-1 returned if probe fails)
501 *
502 * Call into the SAL to do a memory read. If the read generates a machine
503 * check, this routine will recover gracefully and return -1 to the caller.
504 * @addr is usually a kernel virtual address in uncached space (i.e. the
505 * address starts with 0xc), but if called in physical mode, @addr should
506 * be a physical address.
507 *
508 * Return values:
509 * 0 - probe successful
510 * 1 - probe failed (generated MCA)
511 * 2 - Bad arg
512 * <0 - PAL error
513 */
514static inline u64
515ia64_sn_probe_mem(long addr, long size, void *data_ptr)
516{
517 struct ia64_sal_retval isrv;
518
519 SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0);
520
521 if (data_ptr) {
522 switch (size) {
523 case 1:
524 *((u8*)data_ptr) = (u8)isrv.v0;
525 break;
526 case 2:
527 *((u16*)data_ptr) = (u16)isrv.v0;
528 break;
529 case 4:
530 *((u32*)data_ptr) = (u32)isrv.v0;
531 break;
532 case 8:
533 *((u64*)data_ptr) = (u64)isrv.v0;
534 break;
535 default:
536 isrv.status = 2;
537 }
538 }
539 return isrv.status;
540}
541
542/*
543 * Retrieve the system serial number as an ASCII string.
544 */
545static inline u64
546ia64_sn_sys_serial_get(char *buf)
547{
548 struct ia64_sal_retval ret_stuff;
549 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0);
550 return ret_stuff.status;
551}
552
553extern char sn_system_serial_number_string[];
554extern u64 sn_partition_serial_number;
555
556static inline char *
557sn_system_serial_number(void) {
558 if (sn_system_serial_number_string[0]) {
559 return(sn_system_serial_number_string);
560 } else {
561 ia64_sn_sys_serial_get(sn_system_serial_number_string);
562 return(sn_system_serial_number_string);
563 }
564}
565
566
567/*
568 * Returns a unique id number for this system and partition (suitable for
569 * use with license managers), based in part on the system serial number.
570 */
571static inline u64
572ia64_sn_partition_serial_get(void)
573{
574 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
575 ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
576 0, 0, 0, 0, 0, 0);
1da177e4
LT
577 if (ret_stuff.status != 0)
578 return 0;
579 return ret_stuff.v0;
580}
581
582static inline u64
583sn_partition_serial_number_val(void) {
b48fc7bb
DN
584 if (unlikely(sn_partition_serial_number == 0)) {
585 sn_partition_serial_number = ia64_sn_partition_serial_get();
1da177e4 586 }
b48fc7bb 587 return sn_partition_serial_number;
1da177e4
LT
588}
589
771388dc
JS
590/*
591 * Returns the partition id of the nasid passed in as an argument,
592 * or INVALID_PARTID if the partition id cannot be retrieved.
593 */
594static inline partid_t
595ia64_sn_sysctl_partition_get(nasid_t nasid)
596{
597 struct ia64_sal_retval ret_stuff;
598 SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
599 0, 0, 0, 0, 0, 0);
600 if (ret_stuff.status != 0)
601 return -1;
602 return ((partid_t)ret_stuff.v0);
603}
604
b48fc7bb
DN
605/*
606 * Returns the physical address of the partition's reserved page through
607 * an iterative number of calls.
608 *
609 * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
610 * set to the nasid of the partition whose reserved page's address is
611 * being sought.
612 * On subsequent calls, pass the values, that were passed back on the
613 * previous call.
614 *
615 * While the return status equals SALRET_MORE_PASSES, keep calling
616 * this function after first copying 'len' bytes starting at 'addr'
617 * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
618 * be the physical address of the partition's reserved page. If the
619 * return status equals neither of these, an error as occurred.
620 */
621static inline s64
622sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
623{
624 struct ia64_sal_retval rv;
625 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
626 *addr, buf, *len, 0, 0, 0);
627 *cookie = rv.v0;
628 *addr = rv.v1;
629 *len = rv.v2;
630 return rv.status;
1da177e4
LT
631}
632
633/*
634 * Register or unregister a physical address range being referenced across
635 * a partition boundary for which certain SAL errors should be scanned for,
636 * cleaned up and ignored. This is of value for kernel partitioning code only.
637 * Values for the operation argument:
638 * 1 = register this address range with SAL
639 * 0 = unregister this address range with SAL
640 *
641 * SAL maintains a reference count on an address range in case it is registered
642 * multiple times.
643 *
644 * On success, returns the reference count of the address range after the SAL
645 * call has performed the current registration/unregistration. Returns a
646 * negative value if an error occurred.
647 */
648static inline int
649sn_register_xp_addr_region(u64 paddr, u64 len, int operation)
650{
651 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
652 ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
653 (u64)operation, 0, 0, 0, 0);
1da177e4
LT
654 return ret_stuff.status;
655}
656
657/*
658 * Register or unregister an instruction range for which SAL errors should
659 * be ignored. If an error occurs while in the registered range, SAL jumps
660 * to return_addr after ignoring the error. Values for the operation argument:
661 * 1 = register this instruction range with SAL
662 * 0 = unregister this instruction range with SAL
663 *
664 * Returns 0 on success, or a negative value if an error occurred.
665 */
666static inline int
667sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
668 int virtual, int operation)
669{
670 struct ia64_sal_retval ret_stuff;
671 u64 call;
672 if (virtual) {
673 call = SN_SAL_NO_FAULT_ZONE_VIRTUAL;
674 } else {
675 call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
676 }
b48fc7bb
DN
677 ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
678 (u64)1, 0, 0, 0);
1da177e4
LT
679 return ret_stuff.status;
680}
681
682/*
683 * Change or query the coherence domain for this partition. Each cpu-based
684 * nasid is represented by a bit in an array of 64-bit words:
685 * 0 = not in this partition's coherency domain
686 * 1 = in this partition's coherency domain
687 *
688 * It is not possible for the local system's nasids to be removed from
689 * the coherency domain. Purpose of the domain arguments:
690 * new_domain = set the coherence domain to the given nasids
691 * old_domain = return the current coherence domain
692 *
693 * Returns 0 on success, or a negative value if an error occurred.
694 */
695static inline int
696sn_change_coherence(u64 *new_domain, u64 *old_domain)
697{
698 struct ia64_sal_retval ret_stuff;
eaf6c766
DN
699 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
700 (u64)old_domain, 0, 0, 0, 0, 0);
1da177e4
LT
701 return ret_stuff.status;
702}
703
704/*
705 * Change memory access protections for a physical address range.
706 * nasid_array is not used on Altix, but may be in future architectures.
707 * Available memory protection access classes are defined after the function.
708 */
709static inline int
710sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
711{
712 struct ia64_sal_retval ret_stuff;
1da177e4 713
b48fc7bb
DN
714 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
715 (u64)nasid_array, perms, 0, 0, 0);
1da177e4
LT
716 return ret_stuff.status;
717}
718#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
719#define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
720#define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
721#define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
722#define SN_MEMPROT_ACCESS_CLASS_6 0x084080
723#define SN_MEMPROT_ACCESS_CLASS_7 0x021080
724
725/*
726 * Turns off system power.
727 */
728static inline void
729ia64_sn_power_down(void)
730{
731 struct ia64_sal_retval ret_stuff;
732 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
68b9753f
JS
733 while(1)
734 cpu_relax();
1da177e4
LT
735 /* never returns */
736}
737
738/**
739 * ia64_sn_fru_capture - tell the system controller to capture hw state
740 *
741 * This routine will call the SAL which will tell the system controller(s)
742 * to capture hw mmr information from each SHub in the system.
743 */
744static inline u64
745ia64_sn_fru_capture(void)
746{
747 struct ia64_sal_retval isrv;
748 SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0);
749 if (isrv.status)
750 return 0;
751 return isrv.v0;
752}
753
754/*
755 * Performs an operation on a PCI bus or slot -- power up, power down
756 * or reset.
757 */
758static inline u64
759ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type,
760 u64 bus, char slot,
761 u64 action)
762{
763 struct ia64_sal_retval rv = {0, 0, 0, 0};
764
765 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action,
766 bus, (u64) slot, 0, 0);
767 if (rv.status)
768 return rv.v0;
769 return 0;
770}
771
772
773/*
774 * Open a subchannel for sending arbitrary data to the system
775 * controller network via the system controller device associated with
776 * 'nasid'. Return the subchannel number or a negative error code.
777 */
778static inline int
779ia64_sn_irtr_open(nasid_t nasid)
780{
781 struct ia64_sal_retval rv;
782 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid,
783 0, 0, 0, 0, 0);
784 return (int) rv.v0;
785}
786
787/*
788 * Close system controller subchannel 'subch' previously opened on 'nasid'.
789 */
790static inline int
791ia64_sn_irtr_close(nasid_t nasid, int subch)
792{
793 struct ia64_sal_retval rv;
794 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE,
795 (u64) nasid, (u64) subch, 0, 0, 0, 0);
796 return (int) rv.status;
797}
798
799/*
800 * Read data from system controller associated with 'nasid' on
801 * subchannel 'subch'. The buffer to be filled is pointed to by
802 * 'buf', and its capacity is in the integer pointed to by 'len'. The
803 * referent of 'len' is set to the number of bytes read by the SAL
804 * call. The return value is either SALRET_OK (for bytes read) or
805 * SALRET_ERROR (for error or "no data available").
806 */
807static inline int
808ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len)
809{
810 struct ia64_sal_retval rv;
811 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV,
812 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
813 0, 0);
814 return (int) rv.status;
815}
816
817/*
818 * Write data to the system controller network via the system
819 * controller associated with 'nasid' on suchannel 'subch'. The
820 * buffer to be written out is pointed to by 'buf', and 'len' is the
821 * number of bytes to be written. The return value is either the
822 * number of bytes written (which could be zero) or a negative error
823 * code.
824 */
825static inline int
826ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len)
827{
828 struct ia64_sal_retval rv;
829 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND,
830 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
831 0, 0);
832 return (int) rv.v0;
833}
834
835/*
836 * Check whether any interrupts are pending for the system controller
837 * associated with 'nasid' and its subchannel 'subch'. The return
838 * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or
839 * SAL_IROUTER_INTR_RECV).
840 */
841static inline int
842ia64_sn_irtr_intr(nasid_t nasid, int subch)
843{
844 struct ia64_sal_retval rv;
845 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS,
846 (u64) nasid, (u64) subch, 0, 0, 0, 0);
847 return (int) rv.v0;
848}
849
850/*
851 * Enable the interrupt indicated by the intr parameter (either
852 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
853 */
854static inline int
855ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr)
856{
857 struct ia64_sal_retval rv;
858 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON,
859 (u64) nasid, (u64) subch, intr, 0, 0, 0);
860 return (int) rv.v0;
861}
862
863/*
864 * Disable the interrupt indicated by the intr parameter (either
865 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
866 */
867static inline int
868ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
869{
870 struct ia64_sal_retval rv;
871 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF,
872 (u64) nasid, (u64) subch, intr, 0, 0, 0);
873 return (int) rv.v0;
874}
875
67639deb
GH
876/*
877 * Set up a node as the point of contact for system controller
878 * environmental event delivery.
879 */
880static inline int
881ia64_sn_sysctl_event_init(nasid_t nasid)
882{
883 struct ia64_sal_retval rv;
884 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
885 0, 0, 0, 0, 0, 0);
886 return (int) rv.v0;
887}
888
25732ad4
BL
889/*
890 * Ask the system controller on the specified nasid to reset
891 * the CX corelet clock. Only valid on TIO nodes.
892 */
893static inline int
894ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
895{
896 struct ia64_sal_retval rv;
897 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
898 nasid, 0, 0, 0, 0, 0);
899 if (rv.status != 0)
900 return (int)rv.status;
901 if (rv.v0 != 0)
902 return (int)rv.v0;
903
904 return 0;
905}
906
907/*
908 * Get the associated ioboard type for a given nasid.
909 */
f90aa8c4
PB
910static inline s64
911ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
25732ad4 912{
f90aa8c4
PB
913 struct ia64_sal_retval isrv;
914 SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
915 nasid, 0, 0, 0, 0, 0);
916 if (isrv.v0 != 0) {
917 *ioboard = isrv.v0;
918 return isrv.status;
919 }
920 if (isrv.v1 != 0) {
921 *ioboard = isrv.v1;
922 return isrv.status;
923 }
924
925 return isrv.status;
25732ad4
BL
926}
927
1da177e4
LT
928/**
929 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
930 * @nasid: NASID of node to read
931 * @index: FIT entry index to be retrieved (0..n)
932 * @fitentry: 16 byte buffer where FIT entry will be stored.
933 * @banbuf: optional buffer for retrieving banner
934 * @banlen: length of banner buffer
935 *
936 * Access to the physical PROM chips needs to be serialized since reads and
937 * writes can't occur at the same time, so we need to call into the SAL when
938 * we want to look at the FIT entries on the chips.
939 *
940 * Returns:
941 * %SALRET_OK if ok
942 * %SALRET_INVALID_ARG if index too big
943 * %SALRET_NOT_IMPLEMENTED if running on older PROM
944 * ??? if nasid invalid OR banner buffer not large enough
945 */
946static inline int
947ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf,
948 u64 banlen)
949{
950 struct ia64_sal_retval rv;
951 SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry,
952 banbuf, banlen, 0, 0);
953 return (int) rv.status;
954}
955
956/*
957 * Initialize the SAL components of the system controller
958 * communication driver; specifically pass in a sizable buffer that
959 * can be used for allocation of subchannel queues as new subchannels
960 * are opened. "buf" points to the buffer, and "len" specifies its
961 * length.
962 */
963static inline int
964ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
965{
966 struct ia64_sal_retval rv;
967 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT,
968 (u64) nasid, (u64) buf, (u64) len, 0, 0, 0);
969 return (int) rv.status;
970}
971
972/*
973 * Returns the nasid, subnode & slice corresponding to a SAPIC ID
974 *
975 * In:
976 * arg0 - SN_SAL_GET_SAPIC_INFO
977 * arg1 - sapicid (lid >> 16)
978 * Out:
979 * v0 - nasid
980 * v1 - subnode
981 * v2 - slice
982 */
983static inline u64
984ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
985{
986 struct ia64_sal_retval ret_stuff;
987
988 ret_stuff.status = 0;
989 ret_stuff.v0 = 0;
990 ret_stuff.v1 = 0;
991 ret_stuff.v2 = 0;
992 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
993
994/***** BEGIN HACK - temp til old proms no longer supported ********/
995 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
996 if (nasid) *nasid = sapicid & 0xfff;
997 if (subnode) *subnode = (sapicid >> 13) & 1;
998 if (slice) *slice = (sapicid >> 12) & 3;
999 return 0;
1000 }
1001/***** END HACK *******/
1002
1003 if (ret_stuff.status < 0)
1004 return ret_stuff.status;
1005
1006 if (nasid) *nasid = (int) ret_stuff.v0;
1007 if (subnode) *subnode = (int) ret_stuff.v1;
1008 if (slice) *slice = (int) ret_stuff.v2;
1009 return 0;
1010}
1011
1012/*
1013 * Returns information about the HUB/SHUB.
1014 * In:
1015 * arg0 - SN_SAL_GET_SN_INFO
1016 * arg1 - 0 (other values reserved for future use)
1017 * Out:
1018 * v0
1019 * [7:0] - shub type (0=shub1, 1=shub2)
1020 * [15:8] - Log2 max number of nodes in entire system (includes
1021 * C-bricks, I-bricks, etc)
1022 * [23:16] - Log2 of nodes per sharing domain
1023 * [31:24] - partition ID
1024 * [39:32] - coherency_id
1025 * [47:40] - regionsize
1026 * v1
1027 * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
1028 * [23:15] - bit position of low nasid bit
1029 */
1030static inline u64
1031ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1032 u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg)
1033{
1034 struct ia64_sal_retval ret_stuff;
1035
1036 ret_stuff.status = 0;
1037 ret_stuff.v0 = 0;
1038 ret_stuff.v1 = 0;
1039 ret_stuff.v2 = 0;
1040 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1041
771388dc
JS
1042/***** BEGIN HACK - temp til old proms no longer supported ********/
1043 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
53b3531b 1044 int nasid = get_sapicid() & 0xfff;
771388dc
JS
1045#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1046#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1047 if (shubtype) *shubtype = 0;
1048 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1049 if (nasid_shift) *nasid_shift = 38;
1050 if (systemsize) *systemsize = 10;
1051 if (sharing_domain_size) *sharing_domain_size = 8;
1052 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1053 if (coher) *coher = nasid >> 9;
1054 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1055 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1056 return 0;
1057 }
1058/***** END HACK *******/
1059
1da177e4
LT
1060 if (ret_stuff.status < 0)
1061 return ret_stuff.status;
1062
1063 if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
1064 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
1065 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
1066 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
1067 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
1068 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
1069 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
1070 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
1071 return 0;
1072}
1073
1074/*
1075 * This is the access point to the Altix PROM hardware performance
1076 * and status monitoring interface. For info on using this, see
1077 * include/asm-ia64/sn/sn2/sn_hwperf.h
1078 */
1079static inline int
1080ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
1081 u64 a3, u64 a4, int *v0)
1082{
1083 struct ia64_sal_retval rv;
1084 SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid,
1085 opcode, a0, a1, a2, a3, a4);
1086 if (v0)
1087 *v0 = (int) rv.v0;
1088 return (int) rv.status;
1089}
1090
4a5c13c7 1091static inline int
ecc3c30a 1092ia64_sn_ioif_get_pci_topology(u64 buf, u64 len)
4a5c13c7
MG
1093{
1094 struct ia64_sal_retval rv;
ecc3c30a 1095 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0);
4a5c13c7
MG
1096 return (int) rv.status;
1097}
1098
93a07d0a
RA
1099/*
1100 * BTE error recovery is implemented in SAL
1101 */
1102static inline int
1103ia64_sn_bte_recovery(nasid_t nasid)
1104{
1105 struct ia64_sal_retval rv;
1106
1107 rv.status = 0;
17e8ce0e 1108 SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, (u64)nasid, 0, 0, 0, 0, 0, 0);
93a07d0a
RA
1109 if (rv.status == SALRET_NOT_IMPLEMENTED)
1110 return 0;
1111 return (int) rv.status;
1112}
1113
71a5d027
JS
1114static inline int
1115ia64_sn_is_fake_prom(void)
1116{
1117 struct ia64_sal_retval rv;
1118 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
1119 return (rv.status == 0);
1120}
1121
a1cddb88
JS
1122static inline int
1123ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set)
1124{
1125 struct ia64_sal_retval rv;
1126
1127 SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0);
1128 if (rv.status != 0)
1129 return rv.status;
1130 *feature_set = rv.v0;
1131 return 0;
1132}
1133
1134static inline int
1135ia64_sn_set_os_feature(int feature)
1136{
1137 struct ia64_sal_retval rv;
1138
1139 SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0);
1140 return rv.status;
1141}
1142
86db2f42
RA
1143static inline int
1144sn_inject_error(u64 paddr, u64 *data, u64 *ecc)
1145{
1146 struct ia64_sal_retval ret_stuff;
86db2f42 1147
86db2f42
RA
1148 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data,
1149 (u64)ecc, 0, 0, 0, 0);
86db2f42
RA
1150 return ret_stuff.status;
1151}
9d56d878
JS
1152
1153static inline int
1154ia64_sn_set_cpu_number(int cpu)
1155{
1156 struct ia64_sal_retval rv;
1157
1158 SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
1159 return rv.status;
1160}
a7956113
ZN
1161static inline int
1162ia64_sn_kernel_launch_event(void)
1163{
1164 struct ia64_sal_retval rv;
1165 SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0);
1166 return rv.status;
1167}
1da177e4 1168#endif /* _ASM_IA64_SN_SN_SAL_H */