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[IA64] hotplug/ia64: SN Hotplug Driver - new SN PROM version code
[net-next-2.6.git] / include / asm-ia64 / sn / sn_sal.h
CommitLineData
1da177e4
LT
1#ifndef _ASM_IA64_SN_SN_SAL_H
2#define _ASM_IA64_SN_SN_SAL_H
3
4/*
5 * System Abstraction Layer definitions for IA64
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
93a07d0a 11 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All rights reserved.
1da177e4
LT
12 */
13
14
15#include <linux/config.h>
16#include <asm/sal.h>
17#include <asm/sn/sn_cpuid.h>
18#include <asm/sn/arch.h>
19#include <asm/sn/geo.h>
20#include <asm/sn/nodepda.h>
21#include <asm/sn/shub_mmr.h>
22
23// SGI Specific Calls
24#define SN_SAL_POD_MODE 0x02000001
25#define SN_SAL_SYSTEM_RESET 0x02000002
26#define SN_SAL_PROBE 0x02000003
27#define SN_SAL_GET_MASTER_NASID 0x02000004
28#define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
29#define SN_SAL_LOG_CE 0x02000006
30#define SN_SAL_REGISTER_CE 0x02000007
31#define SN_SAL_GET_PARTITION_ADDR 0x02000009
32#define SN_SAL_XP_ADDR_REGION 0x0200000f
33#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
34#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
35#define SN_SAL_PRINT_ERROR 0x02000012
36#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
37#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
1da177e4 38#define SN_SAL_GET_SAPIC_INFO 0x0200001d
bf1cf98f 39#define SN_SAL_GET_SN_INFO 0x0200001e
1da177e4
LT
40#define SN_SAL_CONSOLE_PUTC 0x02000021
41#define SN_SAL_CONSOLE_GETC 0x02000022
42#define SN_SAL_CONSOLE_PUTS 0x02000023
43#define SN_SAL_CONSOLE_GETS 0x02000024
44#define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
45#define SN_SAL_CONSOLE_POLL 0x02000026
46#define SN_SAL_CONSOLE_INTR 0x02000027
47#define SN_SAL_CONSOLE_PUTB 0x02000028
48#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
49#define SN_SAL_CONSOLE_READC 0x0200002b
50#define SN_SAL_SYSCTL_MODID_GET 0x02000031
51#define SN_SAL_SYSCTL_GET 0x02000032
52#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
53#define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
54#define SN_SAL_SYSCTL_SLAB_GET 0x02000036
55#define SN_SAL_BUS_CONFIG 0x02000037
56#define SN_SAL_SYS_SERIAL_GET 0x02000038
57#define SN_SAL_PARTITION_SERIAL_GET 0x02000039
58#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
59#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61#define SN_SAL_COHERENCE 0x0200003d
62#define SN_SAL_MEMPROTECT 0x0200003e
63#define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
64
65#define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
66#define SN_SAL_IROUTER_OP 0x02000043
67639deb 67#define SN_SAL_SYSCTL_EVENT 0x02000044
1da177e4
LT
68#define SN_SAL_IOIF_INTERRUPT 0x0200004a
69#define SN_SAL_HWPERF_OP 0x02000050 // lock
70#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
71
72#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
73#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
74#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
75#define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
76#define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
77#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058
78
79#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
93a07d0a 80#define SN_SAL_BTE_RECOVER 0x02000061
0985ea8f 81#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000062
1da177e4
LT
82
83/*
84 * Service-specific constants
85 */
86
87/* Console interrupt manipulation */
88 /* action codes */
89#define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */
90#define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */
91#define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */
92 /* interrupt specification & status return codes */
93#define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */
94#define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */
95
96/* interrupt handling */
97#define SAL_INTR_ALLOC 1
98#define SAL_INTR_FREE 2
99
100/*
101 * IRouter (i.e. generalized system controller) operations
102 */
103#define SAL_IROUTER_OPEN 0 /* open a subchannel */
104#define SAL_IROUTER_CLOSE 1 /* close a subchannel */
105#define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */
106#define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */
107#define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for
108 * an open subchannel
109 */
110#define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */
111#define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */
112#define SAL_IROUTER_INIT 7 /* initialize IRouter driver */
113
114/* IRouter interrupt mask bits */
115#define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
116#define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
117
6872ec54
RA
118/*
119 * Error Handling Features
120 */
121#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1
122#define SAL_ERR_FEAT_LOG_SBES 0x2
123#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
124#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
1da177e4
LT
125
126/*
127 * SAL Error Codes
128 */
129#define SALRET_MORE_PASSES 1
130#define SALRET_OK 0
131#define SALRET_NOT_IMPLEMENTED (-1)
132#define SALRET_INVALID_ARG (-2)
133#define SALRET_ERROR (-3)
134
71a5d027
JS
135#define SN_SAL_FAKE_PROM 0x02009999
136
1da177e4 137/**
283c7f6a
PB
138 * sn_sal_revision - get the SGI SAL revision number
139 *
140 * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor).
141 * This routine simply extracts the major and minor values and
142 * presents them in a u32 format.
143 *
144 * For example, version 4.05 would be represented at 0x0405.
145 */
146static inline u32
147sn_sal_rev(void)
1da177e4
LT
148{
149 struct ia64_sal_systab *systab = efi.sal_systab;
150
283c7f6a 151 return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor);
1da177e4
LT
152}
153
154/*
155 * Specify the minimum PROM revsion required for this kernel.
156 * Note that they're stored in hex format...
157 */
283c7f6a 158#define SN_SAL_MIN_VERSION 0x0404
1da177e4
LT
159
160/*
161 * Returns the master console nasid, if the call fails, return an illegal
162 * value.
163 */
164static inline u64
165ia64_sn_get_console_nasid(void)
166{
167 struct ia64_sal_retval ret_stuff;
168
169 ret_stuff.status = 0;
170 ret_stuff.v0 = 0;
171 ret_stuff.v1 = 0;
172 ret_stuff.v2 = 0;
173 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0);
174
175 if (ret_stuff.status < 0)
176 return ret_stuff.status;
177
178 /* Master console nasid is in 'v0' */
179 return ret_stuff.v0;
180}
181
182/*
183 * Returns the master baseio nasid, if the call fails, return an illegal
184 * value.
185 */
186static inline u64
187ia64_sn_get_master_baseio_nasid(void)
188{
189 struct ia64_sal_retval ret_stuff;
190
191 ret_stuff.status = 0;
192 ret_stuff.v0 = 0;
193 ret_stuff.v1 = 0;
194 ret_stuff.v2 = 0;
195 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0);
196
197 if (ret_stuff.status < 0)
198 return ret_stuff.status;
199
200 /* Master baseio nasid is in 'v0' */
201 return ret_stuff.v0;
202}
203
204static inline char *
205ia64_sn_get_klconfig_addr(nasid_t nasid)
206{
207 struct ia64_sal_retval ret_stuff;
208 int cnodeid;
209
210 cnodeid = nasid_to_cnodeid(nasid);
211 ret_stuff.status = 0;
212 ret_stuff.v0 = 0;
213 ret_stuff.v1 = 0;
214 ret_stuff.v2 = 0;
215 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
216
217 /*
218 * We should panic if a valid cnode nasid does not produce
219 * a klconfig address.
220 */
221 if (ret_stuff.status != 0) {
222 panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status);
223 }
224 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
225}
226
227/*
228 * Returns the next console character.
229 */
230static inline u64
231ia64_sn_console_getc(int *ch)
232{
233 struct ia64_sal_retval ret_stuff;
234
235 ret_stuff.status = 0;
236 ret_stuff.v0 = 0;
237 ret_stuff.v1 = 0;
238 ret_stuff.v2 = 0;
239 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0);
240
241 /* character is in 'v0' */
242 *ch = (int)ret_stuff.v0;
243
244 return ret_stuff.status;
245}
246
247/*
248 * Read a character from the SAL console device, after a previous interrupt
249 * or poll operation has given us to know that a character is available
250 * to be read.
251 */
252static inline u64
253ia64_sn_console_readc(void)
254{
255 struct ia64_sal_retval ret_stuff;
256
257 ret_stuff.status = 0;
258 ret_stuff.v0 = 0;
259 ret_stuff.v1 = 0;
260 ret_stuff.v2 = 0;
261 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0);
262
263 /* character is in 'v0' */
264 return ret_stuff.v0;
265}
266
267/*
268 * Sends the given character to the console.
269 */
270static inline u64
271ia64_sn_console_putc(char ch)
272{
273 struct ia64_sal_retval ret_stuff;
274
275 ret_stuff.status = 0;
276 ret_stuff.v0 = 0;
277 ret_stuff.v1 = 0;
278 ret_stuff.v2 = 0;
279 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (uint64_t)ch, 0, 0, 0, 0, 0, 0);
280
281 return ret_stuff.status;
282}
283
284/*
285 * Sends the given buffer to the console.
286 */
287static inline u64
288ia64_sn_console_putb(const char *buf, int len)
289{
290 struct ia64_sal_retval ret_stuff;
291
292 ret_stuff.status = 0;
293 ret_stuff.v0 = 0;
294 ret_stuff.v1 = 0;
295 ret_stuff.v2 = 0;
296 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0);
297
298 if ( ret_stuff.status == 0 ) {
299 return ret_stuff.v0;
300 }
301 return (u64)0;
302}
303
304/*
305 * Print a platform error record
306 */
307static inline u64
308ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
309{
310 struct ia64_sal_retval ret_stuff;
311
312 ret_stuff.status = 0;
313 ret_stuff.v0 = 0;
314 ret_stuff.v1 = 0;
315 ret_stuff.v2 = 0;
316 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (uint64_t)hook, (uint64_t)rec, 0, 0, 0, 0, 0);
317
318 return ret_stuff.status;
319}
320
321/*
322 * Check for Platform errors
323 */
324static inline u64
325ia64_sn_plat_cpei_handler(void)
326{
327 struct ia64_sal_retval ret_stuff;
328
329 ret_stuff.status = 0;
330 ret_stuff.v0 = 0;
331 ret_stuff.v1 = 0;
332 ret_stuff.v2 = 0;
333 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0);
334
335 return ret_stuff.status;
336}
337
6872ec54
RA
338/*
339 * Set Error Handling Features
340 */
341static inline u64
342ia64_sn_plat_set_error_handling_features(void)
343{
344 struct ia64_sal_retval ret_stuff;
345
346 ret_stuff.status = 0;
347 ret_stuff.v0 = 0;
348 ret_stuff.v1 = 0;
349 ret_stuff.v2 = 0;
350 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
351 (SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV | SAL_ERR_FEAT_LOG_SBES),
352 0, 0, 0, 0, 0, 0);
353
354 return ret_stuff.status;
355}
356
1da177e4
LT
357/*
358 * Checks for console input.
359 */
360static inline u64
361ia64_sn_console_check(int *result)
362{
363 struct ia64_sal_retval ret_stuff;
364
365 ret_stuff.status = 0;
366 ret_stuff.v0 = 0;
367 ret_stuff.v1 = 0;
368 ret_stuff.v2 = 0;
369 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0);
370
371 /* result is in 'v0' */
372 *result = (int)ret_stuff.v0;
373
374 return ret_stuff.status;
375}
376
377/*
378 * Checks console interrupt status
379 */
380static inline u64
381ia64_sn_console_intr_status(void)
382{
383 struct ia64_sal_retval ret_stuff;
384
385 ret_stuff.status = 0;
386 ret_stuff.v0 = 0;
387 ret_stuff.v1 = 0;
388 ret_stuff.v2 = 0;
389 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
390 0, SAL_CONSOLE_INTR_STATUS,
391 0, 0, 0, 0, 0);
392
393 if (ret_stuff.status == 0) {
394 return ret_stuff.v0;
395 }
396
397 return 0;
398}
399
400/*
401 * Enable an interrupt on the SAL console device.
402 */
403static inline void
404ia64_sn_console_intr_enable(uint64_t intr)
405{
406 struct ia64_sal_retval ret_stuff;
407
408 ret_stuff.status = 0;
409 ret_stuff.v0 = 0;
410 ret_stuff.v1 = 0;
411 ret_stuff.v2 = 0;
412 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
413 intr, SAL_CONSOLE_INTR_ON,
414 0, 0, 0, 0, 0);
415}
416
417/*
418 * Disable an interrupt on the SAL console device.
419 */
420static inline void
421ia64_sn_console_intr_disable(uint64_t intr)
422{
423 struct ia64_sal_retval ret_stuff;
424
425 ret_stuff.status = 0;
426 ret_stuff.v0 = 0;
427 ret_stuff.v1 = 0;
428 ret_stuff.v2 = 0;
429 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
430 intr, SAL_CONSOLE_INTR_OFF,
431 0, 0, 0, 0, 0);
432}
433
434/*
435 * Sends a character buffer to the console asynchronously.
436 */
437static inline u64
438ia64_sn_console_xmit_chars(char *buf, int len)
439{
440 struct ia64_sal_retval ret_stuff;
441
442 ret_stuff.status = 0;
443 ret_stuff.v0 = 0;
444 ret_stuff.v1 = 0;
445 ret_stuff.v2 = 0;
446 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
447 (uint64_t)buf, (uint64_t)len,
448 0, 0, 0, 0, 0);
449
450 if (ret_stuff.status == 0) {
451 return ret_stuff.v0;
452 }
453
454 return 0;
455}
456
457/*
458 * Returns the iobrick module Id
459 */
460static inline u64
461ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
462{
463 struct ia64_sal_retval ret_stuff;
464
465 ret_stuff.status = 0;
466 ret_stuff.v0 = 0;
467 ret_stuff.v1 = 0;
468 ret_stuff.v2 = 0;
469 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0);
470
471 /* result is in 'v0' */
472 *result = (int)ret_stuff.v0;
473
474 return ret_stuff.status;
475}
476
477/**
478 * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function
479 *
480 * SN_SAL_POD_MODE actually takes an argument, but it's always
481 * 0 when we call it from the kernel, so we don't have to expose
482 * it to the caller.
483 */
484static inline u64
485ia64_sn_pod_mode(void)
486{
487 struct ia64_sal_retval isrv;
8eac3757 488 SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
1da177e4
LT
489 if (isrv.status)
490 return 0;
491 return isrv.v0;
492}
493
494/**
495 * ia64_sn_probe_mem - read from memory safely
496 * @addr: address to probe
497 * @size: number bytes to read (1,2,4,8)
498 * @data_ptr: address to store value read by probe (-1 returned if probe fails)
499 *
500 * Call into the SAL to do a memory read. If the read generates a machine
501 * check, this routine will recover gracefully and return -1 to the caller.
502 * @addr is usually a kernel virtual address in uncached space (i.e. the
503 * address starts with 0xc), but if called in physical mode, @addr should
504 * be a physical address.
505 *
506 * Return values:
507 * 0 - probe successful
508 * 1 - probe failed (generated MCA)
509 * 2 - Bad arg
510 * <0 - PAL error
511 */
512static inline u64
513ia64_sn_probe_mem(long addr, long size, void *data_ptr)
514{
515 struct ia64_sal_retval isrv;
516
517 SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0);
518
519 if (data_ptr) {
520 switch (size) {
521 case 1:
522 *((u8*)data_ptr) = (u8)isrv.v0;
523 break;
524 case 2:
525 *((u16*)data_ptr) = (u16)isrv.v0;
526 break;
527 case 4:
528 *((u32*)data_ptr) = (u32)isrv.v0;
529 break;
530 case 8:
531 *((u64*)data_ptr) = (u64)isrv.v0;
532 break;
533 default:
534 isrv.status = 2;
535 }
536 }
537 return isrv.status;
538}
539
540/*
541 * Retrieve the system serial number as an ASCII string.
542 */
543static inline u64
544ia64_sn_sys_serial_get(char *buf)
545{
546 struct ia64_sal_retval ret_stuff;
547 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0);
548 return ret_stuff.status;
549}
550
551extern char sn_system_serial_number_string[];
552extern u64 sn_partition_serial_number;
553
554static inline char *
555sn_system_serial_number(void) {
556 if (sn_system_serial_number_string[0]) {
557 return(sn_system_serial_number_string);
558 } else {
559 ia64_sn_sys_serial_get(sn_system_serial_number_string);
560 return(sn_system_serial_number_string);
561 }
562}
563
564
565/*
566 * Returns a unique id number for this system and partition (suitable for
567 * use with license managers), based in part on the system serial number.
568 */
569static inline u64
570ia64_sn_partition_serial_get(void)
571{
572 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
573 ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
574 0, 0, 0, 0, 0, 0);
1da177e4
LT
575 if (ret_stuff.status != 0)
576 return 0;
577 return ret_stuff.v0;
578}
579
580static inline u64
581sn_partition_serial_number_val(void) {
b48fc7bb
DN
582 if (unlikely(sn_partition_serial_number == 0)) {
583 sn_partition_serial_number = ia64_sn_partition_serial_get();
1da177e4 584 }
b48fc7bb 585 return sn_partition_serial_number;
1da177e4
LT
586}
587
588/*
589 * Returns the partition id of the nasid passed in as an argument,
590 * or INVALID_PARTID if the partition id cannot be retrieved.
591 */
592static inline partid_t
593ia64_sn_sysctl_partition_get(nasid_t nasid)
594{
595 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
596 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
597 0, 0, 0, 0, 0, 0);
1da177e4
LT
598 if (ret_stuff.status != 0)
599 return INVALID_PARTID;
600 return ((partid_t)ret_stuff.v0);
601}
602
603/*
604 * Returns the partition id of the current processor.
605 */
606
607extern partid_t sn_partid;
608
609static inline partid_t
610sn_local_partid(void) {
b48fc7bb
DN
611 if (unlikely(sn_partid < 0)) {
612 sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id()));
1da177e4 613 }
b48fc7bb
DN
614 return sn_partid;
615}
616
617/*
618 * Returns the physical address of the partition's reserved page through
619 * an iterative number of calls.
620 *
621 * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
622 * set to the nasid of the partition whose reserved page's address is
623 * being sought.
624 * On subsequent calls, pass the values, that were passed back on the
625 * previous call.
626 *
627 * While the return status equals SALRET_MORE_PASSES, keep calling
628 * this function after first copying 'len' bytes starting at 'addr'
629 * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
630 * be the physical address of the partition's reserved page. If the
631 * return status equals neither of these, an error as occurred.
632 */
633static inline s64
634sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
635{
636 struct ia64_sal_retval rv;
637 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
638 *addr, buf, *len, 0, 0, 0);
639 *cookie = rv.v0;
640 *addr = rv.v1;
641 *len = rv.v2;
642 return rv.status;
1da177e4
LT
643}
644
645/*
646 * Register or unregister a physical address range being referenced across
647 * a partition boundary for which certain SAL errors should be scanned for,
648 * cleaned up and ignored. This is of value for kernel partitioning code only.
649 * Values for the operation argument:
650 * 1 = register this address range with SAL
651 * 0 = unregister this address range with SAL
652 *
653 * SAL maintains a reference count on an address range in case it is registered
654 * multiple times.
655 *
656 * On success, returns the reference count of the address range after the SAL
657 * call has performed the current registration/unregistration. Returns a
658 * negative value if an error occurred.
659 */
660static inline int
661sn_register_xp_addr_region(u64 paddr, u64 len, int operation)
662{
663 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
664 ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
665 (u64)operation, 0, 0, 0, 0);
1da177e4
LT
666 return ret_stuff.status;
667}
668
669/*
670 * Register or unregister an instruction range for which SAL errors should
671 * be ignored. If an error occurs while in the registered range, SAL jumps
672 * to return_addr after ignoring the error. Values for the operation argument:
673 * 1 = register this instruction range with SAL
674 * 0 = unregister this instruction range with SAL
675 *
676 * Returns 0 on success, or a negative value if an error occurred.
677 */
678static inline int
679sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
680 int virtual, int operation)
681{
682 struct ia64_sal_retval ret_stuff;
683 u64 call;
684 if (virtual) {
685 call = SN_SAL_NO_FAULT_ZONE_VIRTUAL;
686 } else {
687 call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
688 }
b48fc7bb
DN
689 ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
690 (u64)1, 0, 0, 0);
1da177e4
LT
691 return ret_stuff.status;
692}
693
694/*
695 * Change or query the coherence domain for this partition. Each cpu-based
696 * nasid is represented by a bit in an array of 64-bit words:
697 * 0 = not in this partition's coherency domain
698 * 1 = in this partition's coherency domain
699 *
700 * It is not possible for the local system's nasids to be removed from
701 * the coherency domain. Purpose of the domain arguments:
702 * new_domain = set the coherence domain to the given nasids
703 * old_domain = return the current coherence domain
704 *
705 * Returns 0 on success, or a negative value if an error occurred.
706 */
707static inline int
708sn_change_coherence(u64 *new_domain, u64 *old_domain)
709{
710 struct ia64_sal_retval ret_stuff;
b48fc7bb
DN
711 ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
712 (u64)old_domain, 0, 0, 0, 0, 0);
1da177e4
LT
713 return ret_stuff.status;
714}
715
716/*
717 * Change memory access protections for a physical address range.
718 * nasid_array is not used on Altix, but may be in future architectures.
719 * Available memory protection access classes are defined after the function.
720 */
721static inline int
722sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
723{
724 struct ia64_sal_retval ret_stuff;
725 int cnodeid;
726 unsigned long irq_flags;
727
728 cnodeid = nasid_to_cnodeid(get_node_number(paddr));
729 // spin_lock(&NODEPDA(cnodeid)->bist_lock);
730 local_irq_save(irq_flags);
b48fc7bb
DN
731 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
732 (u64)nasid_array, perms, 0, 0, 0);
1da177e4
LT
733 local_irq_restore(irq_flags);
734 // spin_unlock(&NODEPDA(cnodeid)->bist_lock);
735 return ret_stuff.status;
736}
737#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
738#define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
739#define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
740#define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
741#define SN_MEMPROT_ACCESS_CLASS_6 0x084080
742#define SN_MEMPROT_ACCESS_CLASS_7 0x021080
743
744/*
745 * Turns off system power.
746 */
747static inline void
748ia64_sn_power_down(void)
749{
750 struct ia64_sal_retval ret_stuff;
751 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
752 while(1);
753 /* never returns */
754}
755
756/**
757 * ia64_sn_fru_capture - tell the system controller to capture hw state
758 *
759 * This routine will call the SAL which will tell the system controller(s)
760 * to capture hw mmr information from each SHub in the system.
761 */
762static inline u64
763ia64_sn_fru_capture(void)
764{
765 struct ia64_sal_retval isrv;
766 SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0);
767 if (isrv.status)
768 return 0;
769 return isrv.v0;
770}
771
772/*
773 * Performs an operation on a PCI bus or slot -- power up, power down
774 * or reset.
775 */
776static inline u64
777ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type,
778 u64 bus, char slot,
779 u64 action)
780{
781 struct ia64_sal_retval rv = {0, 0, 0, 0};
782
783 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action,
784 bus, (u64) slot, 0, 0);
785 if (rv.status)
786 return rv.v0;
787 return 0;
788}
789
790
791/*
792 * Open a subchannel for sending arbitrary data to the system
793 * controller network via the system controller device associated with
794 * 'nasid'. Return the subchannel number or a negative error code.
795 */
796static inline int
797ia64_sn_irtr_open(nasid_t nasid)
798{
799 struct ia64_sal_retval rv;
800 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid,
801 0, 0, 0, 0, 0);
802 return (int) rv.v0;
803}
804
805/*
806 * Close system controller subchannel 'subch' previously opened on 'nasid'.
807 */
808static inline int
809ia64_sn_irtr_close(nasid_t nasid, int subch)
810{
811 struct ia64_sal_retval rv;
812 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE,
813 (u64) nasid, (u64) subch, 0, 0, 0, 0);
814 return (int) rv.status;
815}
816
817/*
818 * Read data from system controller associated with 'nasid' on
819 * subchannel 'subch'. The buffer to be filled is pointed to by
820 * 'buf', and its capacity is in the integer pointed to by 'len'. The
821 * referent of 'len' is set to the number of bytes read by the SAL
822 * call. The return value is either SALRET_OK (for bytes read) or
823 * SALRET_ERROR (for error or "no data available").
824 */
825static inline int
826ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len)
827{
828 struct ia64_sal_retval rv;
829 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV,
830 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
831 0, 0);
832 return (int) rv.status;
833}
834
835/*
836 * Write data to the system controller network via the system
837 * controller associated with 'nasid' on suchannel 'subch'. The
838 * buffer to be written out is pointed to by 'buf', and 'len' is the
839 * number of bytes to be written. The return value is either the
840 * number of bytes written (which could be zero) or a negative error
841 * code.
842 */
843static inline int
844ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len)
845{
846 struct ia64_sal_retval rv;
847 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND,
848 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
849 0, 0);
850 return (int) rv.v0;
851}
852
853/*
854 * Check whether any interrupts are pending for the system controller
855 * associated with 'nasid' and its subchannel 'subch'. The return
856 * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or
857 * SAL_IROUTER_INTR_RECV).
858 */
859static inline int
860ia64_sn_irtr_intr(nasid_t nasid, int subch)
861{
862 struct ia64_sal_retval rv;
863 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS,
864 (u64) nasid, (u64) subch, 0, 0, 0, 0);
865 return (int) rv.v0;
866}
867
868/*
869 * Enable the interrupt indicated by the intr parameter (either
870 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
871 */
872static inline int
873ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr)
874{
875 struct ia64_sal_retval rv;
876 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON,
877 (u64) nasid, (u64) subch, intr, 0, 0, 0);
878 return (int) rv.v0;
879}
880
881/*
882 * Disable the interrupt indicated by the intr parameter (either
883 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
884 */
885static inline int
886ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
887{
888 struct ia64_sal_retval rv;
889 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF,
890 (u64) nasid, (u64) subch, intr, 0, 0, 0);
891 return (int) rv.v0;
892}
893
67639deb
GH
894/*
895 * Set up a node as the point of contact for system controller
896 * environmental event delivery.
897 */
898static inline int
899ia64_sn_sysctl_event_init(nasid_t nasid)
900{
901 struct ia64_sal_retval rv;
902 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
903 0, 0, 0, 0, 0, 0);
904 return (int) rv.v0;
905}
906
1da177e4
LT
907/**
908 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
909 * @nasid: NASID of node to read
910 * @index: FIT entry index to be retrieved (0..n)
911 * @fitentry: 16 byte buffer where FIT entry will be stored.
912 * @banbuf: optional buffer for retrieving banner
913 * @banlen: length of banner buffer
914 *
915 * Access to the physical PROM chips needs to be serialized since reads and
916 * writes can't occur at the same time, so we need to call into the SAL when
917 * we want to look at the FIT entries on the chips.
918 *
919 * Returns:
920 * %SALRET_OK if ok
921 * %SALRET_INVALID_ARG if index too big
922 * %SALRET_NOT_IMPLEMENTED if running on older PROM
923 * ??? if nasid invalid OR banner buffer not large enough
924 */
925static inline int
926ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf,
927 u64 banlen)
928{
929 struct ia64_sal_retval rv;
930 SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry,
931 banbuf, banlen, 0, 0);
932 return (int) rv.status;
933}
934
935/*
936 * Initialize the SAL components of the system controller
937 * communication driver; specifically pass in a sizable buffer that
938 * can be used for allocation of subchannel queues as new subchannels
939 * are opened. "buf" points to the buffer, and "len" specifies its
940 * length.
941 */
942static inline int
943ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
944{
945 struct ia64_sal_retval rv;
946 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT,
947 (u64) nasid, (u64) buf, (u64) len, 0, 0, 0);
948 return (int) rv.status;
949}
950
951/*
952 * Returns the nasid, subnode & slice corresponding to a SAPIC ID
953 *
954 * In:
955 * arg0 - SN_SAL_GET_SAPIC_INFO
956 * arg1 - sapicid (lid >> 16)
957 * Out:
958 * v0 - nasid
959 * v1 - subnode
960 * v2 - slice
961 */
962static inline u64
963ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
964{
965 struct ia64_sal_retval ret_stuff;
966
967 ret_stuff.status = 0;
968 ret_stuff.v0 = 0;
969 ret_stuff.v1 = 0;
970 ret_stuff.v2 = 0;
971 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
972
973/***** BEGIN HACK - temp til old proms no longer supported ********/
974 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
975 if (nasid) *nasid = sapicid & 0xfff;
976 if (subnode) *subnode = (sapicid >> 13) & 1;
977 if (slice) *slice = (sapicid >> 12) & 3;
978 return 0;
979 }
980/***** END HACK *******/
981
982 if (ret_stuff.status < 0)
983 return ret_stuff.status;
984
985 if (nasid) *nasid = (int) ret_stuff.v0;
986 if (subnode) *subnode = (int) ret_stuff.v1;
987 if (slice) *slice = (int) ret_stuff.v2;
988 return 0;
989}
990
991/*
992 * Returns information about the HUB/SHUB.
993 * In:
994 * arg0 - SN_SAL_GET_SN_INFO
995 * arg1 - 0 (other values reserved for future use)
996 * Out:
997 * v0
998 * [7:0] - shub type (0=shub1, 1=shub2)
999 * [15:8] - Log2 max number of nodes in entire system (includes
1000 * C-bricks, I-bricks, etc)
1001 * [23:16] - Log2 of nodes per sharing domain
1002 * [31:24] - partition ID
1003 * [39:32] - coherency_id
1004 * [47:40] - regionsize
1005 * v1
1006 * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
1007 * [23:15] - bit position of low nasid bit
1008 */
1009static inline u64
1010ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1011 u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg)
1012{
1013 struct ia64_sal_retval ret_stuff;
1014
1015 ret_stuff.status = 0;
1016 ret_stuff.v0 = 0;
1017 ret_stuff.v1 = 0;
1018 ret_stuff.v2 = 0;
1019 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1020
1021/***** BEGIN HACK - temp til old proms no longer supported ********/
1022 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
1023 int nasid = get_sapicid() & 0xfff;;
1024#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1025#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1026 if (shubtype) *shubtype = 0;
1027 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1028 if (nasid_shift) *nasid_shift = 38;
1029 if (systemsize) *systemsize = 11;
1030 if (sharing_domain_size) *sharing_domain_size = 9;
1031 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1032 if (coher) *coher = nasid >> 9;
1033 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1034 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1035 return 0;
1036 }
1037/***** END HACK *******/
1038
1039 if (ret_stuff.status < 0)
1040 return ret_stuff.status;
1041
1042 if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
1043 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
1044 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
1045 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
1046 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
1047 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
1048 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
1049 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
1050 return 0;
1051}
1052
1053/*
1054 * This is the access point to the Altix PROM hardware performance
1055 * and status monitoring interface. For info on using this, see
1056 * include/asm-ia64/sn/sn2/sn_hwperf.h
1057 */
1058static inline int
1059ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
1060 u64 a3, u64 a4, int *v0)
1061{
1062 struct ia64_sal_retval rv;
1063 SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid,
1064 opcode, a0, a1, a2, a3, a4);
1065 if (v0)
1066 *v0 = (int) rv.v0;
1067 return (int) rv.status;
1068}
1069
4a5c13c7
MG
1070static inline int
1071ia64_sn_ioif_get_pci_topology(u64 rack, u64 bay, u64 slot, u64 slab,
0985ea8f 1072 u64 buf, u64 len)
4a5c13c7
MG
1073{
1074 struct ia64_sal_retval rv;
1075 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY,
1076 rack, bay, slot, slab, buf, len, 0);
1077 return (int) rv.status;
1078}
1079
93a07d0a
RA
1080/*
1081 * BTE error recovery is implemented in SAL
1082 */
1083static inline int
1084ia64_sn_bte_recovery(nasid_t nasid)
1085{
1086 struct ia64_sal_retval rv;
1087
1088 rv.status = 0;
1089 SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, 0, 0, 0, 0, 0, 0, 0);
1090 if (rv.status == SALRET_NOT_IMPLEMENTED)
1091 return 0;
1092 return (int) rv.status;
1093}
1094
71a5d027
JS
1095static inline int
1096ia64_sn_is_fake_prom(void)
1097{
1098 struct ia64_sal_retval rv;
1099 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
1100 return (rv.status == 0);
1101}
1102
1da177e4 1103#endif /* _ASM_IA64_SN_SN_SAL_H */