[net-next-2.6.git] / include / asm-i386 / pgtable.h

#ifndef _I386_PGTABLE_H
#define _I386_PGTABLE_H

#include <linux/config.h>

/*
 * The Linux memory management assumes a three-level page table setup. On
 * the i386, we use that, but "fold" the mid level into the top-level page
 * table, so that we physically have the same two-level page table as the
 * i386 mmu expects.
 *
 * This file contains the functions and defines necessary to modify and use
 * the i386 page table tree.
 */
#ifndef __ASSEMBLY__
#include <asm/processor.h>
#include <asm/fixmap.h>
#include <linux/threads.h>

#ifndef _I386_BITOPS_H
#include <asm/bitops.h>
#endif

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/spinlock.h>

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
extern unsigned long empty_zero_page[1024];
extern pgd_t swapper_pg_dir[1024];
extern kmem_cache_t *pgd_cache;
extern kmem_cache_t *pmd_cache;
extern spinlock_t pgd_lock;
extern struct page *pgd_list;

void pmd_ctor(void *, kmem_cache_t *, unsigned long);
void pgd_ctor(void *, kmem_cache_t *, unsigned long);
void pgd_dtor(void *, kmem_cache_t *, unsigned long);
void pgtable_cache_init(void);
void paging_init(void);

/*
 * The Linux x86 paging architecture is 'compile-time dual-mode', it
 * implements both the traditional 2-level x86 page tables and the
 * newer 3-level PAE-mode page tables.
 */
#ifdef CONFIG_X86_PAE
# include <asm/pgtable-3level-defs.h>
# define PMD_SIZE	(1UL << PMD_SHIFT)
# define PMD_MASK	(~(PMD_SIZE-1))
#else
# include <asm/pgtable-2level-defs.h>
#endif

#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
#define PGDIR_MASK	(~(PGDIR_SIZE-1))

#define USER_PTRS_PER_PGD	(TASK_SIZE/PGDIR_SIZE)
#define FIRST_USER_ADDRESS	0

#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)

#define TWOLEVEL_PGDIR_SHIFT	22
#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
#define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)

/* Just any arbitrary offset to the start of the vmalloc VM area: the
 * current 8MB value just means that there will be a 8MB "hole" after the
 * physical memory until the kernel virtual memory starts.  That means that
 * any out-of-bounds memory accesses will hopefully be caught.
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * area for the same reason. ;)
 */
#define VMALLOC_OFFSET	(8*1024*1024)
#define VMALLOC_START	(((unsigned long) high_memory + vmalloc_earlyreserve + \
			2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
#ifdef CONFIG_HIGHMEM
# define VMALLOC_END	(PKMAP_BASE-2*PAGE_SIZE)
#else
# define VMALLOC_END	(FIXADDR_START-2*PAGE_SIZE)
#endif

/*
 * _PAGE_PSE set in the page directory entry just means that
 * the page directory entry points directly to a 4MB-aligned block of
 * memory. 
 */
#define _PAGE_BIT_PRESENT	0
#define _PAGE_BIT_RW		1
#define _PAGE_BIT_USER		2
#define _PAGE_BIT_PWT		3
#define _PAGE_BIT_PCD		4
#define _PAGE_BIT_ACCESSED	5
#define _PAGE_BIT_DIRTY		6
#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page, Pentium+, if present.. */
#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
#define _PAGE_BIT_UNUSED1	9	/* available for programmer */
#define _PAGE_BIT_UNUSED2	10
#define _PAGE_BIT_UNUSED3	11
#define _PAGE_BIT_NX		63

#define _PAGE_PRESENT	0x001
#define _PAGE_RW	0x002
#define _PAGE_USER	0x004
#define _PAGE_PWT	0x008
#define _PAGE_PCD	0x010
#define _PAGE_ACCESSED	0x020
#define _PAGE_DIRTY	0x040
#define _PAGE_PSE	0x080	/* 4 MB (or 2MB) page, Pentium+, if present.. */
#define _PAGE_GLOBAL	0x100	/* Global TLB entry PPro+ */
#define _PAGE_UNUSED1	0x200	/* available for programmer */
#define _PAGE_UNUSED2	0x400
#define _PAGE_UNUSED3	0x800

/* If _PAGE_PRESENT is clear, we use these: */
#define _PAGE_FILE	0x040	/* nonlinear file mapping, saved PTE; unset:swap */
#define _PAGE_PROTNONE	0x080	/* if the user mapped it with PROT_NONE;
				   pte_present gives true */
#ifdef CONFIG_X86_PAE
#define _PAGE_NX	(1ULL<<_PAGE_BIT_NX)
#else
#define _PAGE_NX	0
#endif

#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
#define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
#define _PAGE_CHG_MASK	(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)

#define PAGE_NONE \
	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
#define PAGE_SHARED \
	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)

#define PAGE_SHARED_EXEC \
	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_COPY_NOEXEC \
	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_COPY_EXEC \
	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_COPY \
	PAGE_COPY_NOEXEC
#define PAGE_READONLY \
	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
#define PAGE_READONLY_EXEC \
	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)

#define _PAGE_KERNEL \
	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
#define _PAGE_KERNEL_EXEC \
	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)

extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
#define __PAGE_KERNEL_RO		(__PAGE_KERNEL & ~_PAGE_RW)
#define __PAGE_KERNEL_NOCACHE		(__PAGE_KERNEL | _PAGE_PCD)
#define __PAGE_KERNEL_LARGE		(__PAGE_KERNEL | _PAGE_PSE)
#define __PAGE_KERNEL_LARGE_EXEC	(__PAGE_KERNEL_EXEC | _PAGE_PSE)

#define PAGE_KERNEL		__pgprot(__PAGE_KERNEL)
#define PAGE_KERNEL_RO		__pgprot(__PAGE_KERNEL_RO)
#define PAGE_KERNEL_EXEC	__pgprot(__PAGE_KERNEL_EXEC)
#define PAGE_KERNEL_NOCACHE	__pgprot(__PAGE_KERNEL_NOCACHE)
#define PAGE_KERNEL_LARGE	__pgprot(__PAGE_KERNEL_LARGE)
#define PAGE_KERNEL_LARGE_EXEC	__pgprot(__PAGE_KERNEL_LARGE_EXEC)

/*
 * The i386 can't do page protection for execute, and considers that
 * the same are read. Also, write permissions imply read permissions.
 * This is the closest we can get..
 */
#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY_EXEC
#define __P101	PAGE_READONLY_EXEC
#define __P110	PAGE_COPY_EXEC
#define __P111	PAGE_COPY_EXEC

#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY_EXEC
#define __S101	PAGE_READONLY_EXEC
#define __S110	PAGE_SHARED_EXEC
#define __S111	PAGE_SHARED_EXEC

/*
 * Define this if things work differently on an i386 and an i486:
 * it will (on an i486) warn about kernel memory accesses that are
 * done without a 'access_ok(VERIFY_WRITE,..)'
 */
#undef TEST_ACCESS_OK

/* The boot page tables (all created as a single array) */
extern unsigned long pg0[];

#define pte_present(x)	((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
#define pte_clear(mm,addr,xp)	do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)

#define pmd_none(x)	(!pmd_val(x))
#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
#define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
#define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)


#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
#define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT)
static inline int pte_user(pte_t pte)		{ return (pte).pte_low & _PAGE_USER; }
static inline int pte_read(pte_t pte)		{ return (pte).pte_low & _PAGE_USER; }
static inline int pte_dirty(pte_t pte)		{ return (pte).pte_low & _PAGE_DIRTY; }
static inline int pte_young(pte_t pte)		{ return (pte).pte_low & _PAGE_ACCESSED; }
static inline int pte_write(pte_t pte)		{ return (pte).pte_low & _PAGE_RW; }
static inline int pte_huge(pte_t pte)		{ return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }

/*
 * The following only works if pte_present() is not true.
 */
static inline int pte_file(pte_t pte)		{ return (pte).pte_low & _PAGE_FILE; }

static inline pte_t pte_rdprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_USER; return pte; }
static inline pte_t pte_exprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_USER; return pte; }
static inline pte_t pte_mkclean(pte_t pte)	{ (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
static inline pte_t pte_mkold(pte_t pte)	{ (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
static inline pte_t pte_wrprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_RW; return pte; }
static inline pte_t pte_mkread(pte_t pte)	{ (pte).pte_low |= _PAGE_USER; return pte; }
static inline pte_t pte_mkexec(pte_t pte)	{ (pte).pte_low |= _PAGE_USER; return pte; }
static inline pte_t pte_mkdirty(pte_t pte)	{ (pte).pte_low |= _PAGE_DIRTY; return pte; }
static inline pte_t pte_mkyoung(pte_t pte)	{ (pte).pte_low |= _PAGE_ACCESSED; return pte; }
static inline pte_t pte_mkwrite(pte_t pte)	{ (pte).pte_low |= _PAGE_RW; return pte; }
static inline pte_t pte_mkhuge(pte_t pte)	{ (pte).pte_low |= __LARGE_PTE; return pte; }

#ifdef CONFIG_X86_PAE
# include <asm/pgtable-3level.h>
#else
# include <asm/pgtable-2level.h>
#endif

static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
{
	if (!pte_dirty(*ptep))
		return 0;
	return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte_low);
}

static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
{
	if (!pte_young(*ptep))
		return 0;
	return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
}

static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
{
	pte_t pte;
	if (full) {
		pte = *ptep;
		*ptep = __pte(0);
	} else {
		pte = ptep_get_and_clear(mm, addr, ptep);
	}
	return pte;
}

static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
}

/*
 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
 *
 *  dst - pointer to pgd range anwhere on a pgd page
 *  src - ""
 *  count - the number of pgds to copy.
 *
 * dst and src can be on the same page, but the range must not overlap,
 * and must not cross a page boundary.
 */
static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
{
       memcpy(dst, src, count * sizeof(pgd_t));
}

/*
 * Macro to mark a page protection value as "uncacheable".  On processors which do not support
 * it, this is a no-op.
 */
#define pgprot_noncached(prot)	((boot_cpu_data.x86 > 3)					  \
				 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */

#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))

static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	pte.pte_low &= _PAGE_CHG_MASK;
	pte.pte_low |= pgprot_val(newprot);
#ifdef CONFIG_X86_PAE
	/*
	 * Chop off the NX bit (if present), and add the NX portion of
	 * the newprot (if present):
	 */
	pte.pte_high &= ~(1 << (_PAGE_BIT_NX - 32));
	pte.pte_high |= (pgprot_val(newprot) >> 32) & \
					(__supported_pte_mask >> 32);
#endif
	return pte;
}

#define page_pte(page) page_pte_prot(page, __pgprot(0))

#define pmd_large(pmd) \
((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT))

/*
 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
 *
 * this macro returns the index of the entry in the pgd page which would
 * control the given virtual address
 */
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
#define pgd_index_k(addr) pgd_index(addr)

/*
 * pgd_offset() returns a (pgd_t *)
 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
 */
#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))

/*
 * a shortcut which implies the use of the kernel's pgd, instead
 * of a process's
 */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)

/*
 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
 *
 * this macro returns the index of the entry in the pmd page which would
 * control the given virtual address
 */
#define pmd_index(address) \
		(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))

/*
 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 *
 * this macro returns the index of the entry in the pte page which would
 * control the given virtual address
 */
#define pte_index(address) \
		(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
#define pte_offset_kernel(dir, address) \
	((pte_t *) pmd_page_kernel(*(dir)) +  pte_index(address))

/*
 * Helper function that returns the kernel pagetable entry controlling
 * the virtual address 'address'. NULL means no pagetable entry present.
 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
 * as a pte too.
 */
extern pte_t *lookup_address(unsigned long address);

/*
 * Make a given kernel text page executable/non-executable.
 * Returns the previous executability setting of that page (which
 * is used to restore the previous state). Used by the SMP bootup code.
 * NOTE: this is an __init function for security reasons.
 */
#ifdef CONFIG_X86_PAE
 extern int set_kernel_exec(unsigned long vaddr, int enable);
#else
 static inline int set_kernel_exec(unsigned long vaddr, int enable) { return 0;}
#endif

extern void noexec_setup(const char *str);

#if defined(CONFIG_HIGHPTE)
#define pte_offset_map(dir, address) \
	((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
#define pte_offset_map_nested(dir, address) \
	((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
#else
#define pte_offset_map(dir, address) \
	((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
#define pte_unmap(pte) do { } while (0)
#define pte_unmap_nested(pte) do { } while (0)
#endif

/*
 * The i386 doesn't have any external MMU info: the kernel page
 * tables contain all the necessary information.
 *
 * Also, we only update the dirty/accessed state if we set
 * the dirty bit by hand in the kernel, since the hardware
 * will do the accessed bit for us, and we don't want to
 * race with other CPU's that might be updating the dirty
 * bit at the same time.
 */
#define update_mmu_cache(vma,address,pte) do { } while (0)
#define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
	do {								  \
		if (__dirty) {						  \
			(__ptep)->pte_low = (__entry).pte_low;	  	  \
			flush_tlb_page(__vma, __address);		  \
		}							  \
	} while (0)

#endif /* !__ASSEMBLY__ */

#ifdef CONFIG_FLATMEM
#define kern_addr_valid(addr)	(1)
#endif /* CONFIG_FLATMEM */

#define io_remap_page_range(vma, vaddr, paddr, size, prot)		\
		remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)

#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
		remap_pfn_range(vma, vaddr, pfn, size, prot)

#define MK_IOSPACE_PFN(space, pfn)	(pfn)
#define GET_IOSPACE(pfn)		0
#define GET_PFN(pfn)			(pfn)

#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
#define __HAVE_ARCH_PTE_SAME
#include <asm-generic/pgtable.h>

#endif /* _I386_PGTABLE_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _I386_PGTABLE_H
	2	#define _I386_PGTABLE_H
	3
	4	#include <linux/config.h>
	5
	6	/*
	7	* The Linux memory management assumes a three-level page table setup. On
	8	* the i386, we use that, but "fold" the mid level into the top-level page
	9	* table, so that we physically have the same two-level page table as the
	10	* i386 mmu expects.
	11	*
	12	* This file contains the functions and defines necessary to modify and use
	13	* the i386 page table tree.
	14	*/
	15	#ifndef __ASSEMBLY__
	16	#include <asm/processor.h>
	17	#include <asm/fixmap.h>
	18	#include <linux/threads.h>
	19
	20	#ifndef _I386_BITOPS_H
	21	#include <asm/bitops.h>
	22	#endif
	23
	24	#include <linux/slab.h>
	25	#include <linux/list.h>
	26	#include <linux/spinlock.h>
	27
	28	/*
	29	* ZERO_PAGE is a global shared page that is always zero: used
	30	* for zero-mapped memory areas etc..
	31	*/
	32	#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
	33	extern unsigned long empty_zero_page[1024];
	34	extern pgd_t swapper_pg_dir[1024];
	35	extern kmem_cache_t *pgd_cache;
	36	extern kmem_cache_t *pmd_cache;
	37	extern spinlock_t pgd_lock;
	38	extern struct page *pgd_list;
	39
	40	void pmd_ctor(void , kmem_cache_t , unsigned long);
	41	void pgd_ctor(void , kmem_cache_t , unsigned long);
	42	void pgd_dtor(void , kmem_cache_t , unsigned long);
	43	void pgtable_cache_init(void);
	44	void paging_init(void);
	45
	46	/*
	47	* The Linux x86 paging architecture is 'compile-time dual-mode', it
	48	* implements both the traditional 2-level x86 page tables and the
	49	* newer 3-level PAE-mode page tables.
	50	*/
	51	#ifdef CONFIG_X86_PAE
	52	# include <asm/pgtable-3level-defs.h>
	53	# define PMD_SIZE (1UL << PMD_SHIFT)
	54	# define PMD_MASK (~(PMD_SIZE-1))
	55	#else
	56	# include <asm/pgtable-2level-defs.h>
	57	#endif
	58
	59	#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
	60	#define PGDIR_MASK (~(PGDIR_SIZE-1))
	61
	62	#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
d455a369	63	#define FIRST_USER_ADDRESS 0
1da177e4 LT	64
	65	#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
	66	#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
	67
	68	#define TWOLEVEL_PGDIR_SHIFT 22
	69	#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
	70	#define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
	71
	72	/* Just any arbitrary offset to the start of the vmalloc VM area: the
	73	* current 8MB value just means that there will be a 8MB "hole" after the
	74	* physical memory until the kernel virtual memory starts. That means that
	75	* any out-of-bounds memory accesses will hopefully be caught.
	76	* The vmalloc() routines leaves a hole of 4kB between each vmalloced
	77	* area for the same reason. ;)
	78	*/
	79	#define VMALLOC_OFFSET (810241024)
	80	#define VMALLOC_START (((unsigned long) high_memory + vmalloc_earlyreserve + \
	81	2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
	82	#ifdef CONFIG_HIGHMEM
	83	# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
	84	#else
	85	# define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
	86	#endif
	87
	88	/*
9b4ee40e	89	* _PAGE_PSE set in the page directory entry just means that
1da177e4 LT	90	* the page directory entry points directly to a 4MB-aligned block of
	91	* memory.
	92	*/
	93	#define _PAGE_BIT_PRESENT 0
	94	#define _PAGE_BIT_RW 1
	95	#define _PAGE_BIT_USER 2
	96	#define _PAGE_BIT_PWT 3
	97	#define _PAGE_BIT_PCD 4
	98	#define _PAGE_BIT_ACCESSED 5
	99	#define _PAGE_BIT_DIRTY 6
	100	#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page, Pentium+, if present.. */
	101	#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
	102	#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
	103	#define _PAGE_BIT_UNUSED2 10
	104	#define _PAGE_BIT_UNUSED3 11
	105	#define _PAGE_BIT_NX 63
	106
	107	#define _PAGE_PRESENT 0x001
	108	#define _PAGE_RW 0x002
	109	#define _PAGE_USER 0x004
	110	#define _PAGE_PWT 0x008
	111	#define _PAGE_PCD 0x010
	112	#define _PAGE_ACCESSED 0x020
	113	#define _PAGE_DIRTY 0x040
	114	#define _PAGE_PSE 0x080 /* 4 MB (or 2MB) page, Pentium+, if present.. */
	115	#define _PAGE_GLOBAL 0x100 /* Global TLB entry PPro+ */
	116	#define _PAGE_UNUSED1 0x200 /* available for programmer */
	117	#define _PAGE_UNUSED2 0x400
	118	#define _PAGE_UNUSED3 0x800
	119
9b4ee40e PBG	120	/* If _PAGE_PRESENT is clear, we use these: */
	121	#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
	122	#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
	123	pte_present gives true */
1da177e4 LT	124	#ifdef CONFIG_X86_PAE
	125	#define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
	126	#else
	127	#define _PAGE_NX 0
	128	#endif
	129
	130	#define _PAGE_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	131	#define _KERNPG_TABLE (_PAGE_PRESENT \| _PAGE_RW \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	132	#define _PAGE_CHG_MASK (PTE_MASK \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	133
	134	#define PAGE_NONE \
	135	__pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED)
	136	#define PAGE_SHARED \
	137	__pgprot(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| _PAGE_ACCESSED)
	138
	139	#define PAGE_SHARED_EXEC \
	140	__pgprot(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_USER \| _PAGE_ACCESSED)
	141	#define PAGE_COPY_NOEXEC \
	142	__pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_NX)
	143	#define PAGE_COPY_EXEC \
	144	__pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED)
	145	#define PAGE_COPY \
	146	PAGE_COPY_NOEXEC
	147	#define PAGE_READONLY \
	148	__pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED \| _PAGE_NX)
	149	#define PAGE_READONLY_EXEC \
	150	__pgprot(_PAGE_PRESENT \| _PAGE_USER \| _PAGE_ACCESSED)
	151
	152	#define _PAGE_KERNEL \
	153	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_ACCESSED \| _PAGE_NX)
	154	#define _PAGE_KERNEL_EXEC \
	155	(_PAGE_PRESENT \| _PAGE_RW \| _PAGE_DIRTY \| _PAGE_ACCESSED)
	156
	157	extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
	158	#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
	159	#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL \| _PAGE_PCD)
	160	#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL \| _PAGE_PSE)
	161	#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC \| _PAGE_PSE)
	162
	163	#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
	164	#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
	165	#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
	166	#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
	167	#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
	168	#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
	169
	170	/*
	171	* The i386 can't do page protection for execute, and considers that
	172	* the same are read. Also, write permissions imply read permissions.
	173	* This is the closest we can get..
	174	*/
	175	#define __P000 PAGE_NONE
	176	#define __P001 PAGE_READONLY
	177	#define __P010 PAGE_COPY
	178	#define __P011 PAGE_COPY
	179	#define __P100 PAGE_READONLY_EXEC
	180	#define __P101 PAGE_READONLY_EXEC
	181	#define __P110 PAGE_COPY_EXEC
	182	#define __P111 PAGE_COPY_EXEC
	183
	184	#define __S000 PAGE_NONE
	185	#define __S001 PAGE_READONLY
	186	#define __S010 PAGE_SHARED
	187	#define __S011 PAGE_SHARED
188	#define __S100 PAGE_READONLY_EXEC
189	#define __S101 PAGE_READONLY_EXEC
190	#define __S110 PAGE_SHARED_EXEC
191	#define __S111 PAGE_SHARED_EXEC
192
193	/*
194	* Define this if things work differently on an i386 and an i486:
195	* it will (on an i486) warn about kernel memory accesses that are
e49332bd	196	* done without a 'access_ok(VERIFY_WRITE,..)'
1da177e4	197	*/
e49332bd	198	#undef TEST_ACCESS_OK
1da177e4 LT	199
	200	/* The boot page tables (all created as a single array) */
	201	extern unsigned long pg0[];
	202
	203	#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT \| _PAGE_PROTNONE))
	204	#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
	205
	206	#define pmd_none(x) (!pmd_val(x))
	207	#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
	208	#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
	209	#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
	210
	211
	212	#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
	213
	214	/*
	215	* The following only work if pte_present() is true.
	216	* Undefined behaviour if not..
	217	*/
32e51a8c	218	#define __LARGE_PTE (_PAGE_PSE \| _PAGE_PRESENT)
1da177e4 LT	219	static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
	220	static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
	221	static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
	222	static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
	223	static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
32e51a8c	224	static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }
1da177e4 LT	225
	226	/*
	227	* The following only works if pte_present() is not true.
	228	*/
	229	static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; }
	230
	231	static inline pte_t pte_rdprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
	232	static inline pte_t pte_exprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
	233	static inline pte_t pte_mkclean(pte_t pte) { (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
	234	static inline pte_t pte_mkold(pte_t pte) { (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
	235	static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_RW; return pte; }
	236	static inline pte_t pte_mkread(pte_t pte) { (pte).pte_low \|= _PAGE_USER; return pte; }
	237	static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low \|= _PAGE_USER; return pte; }
	238	static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low \|= _PAGE_DIRTY; return pte; }
	239	static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low \|= _PAGE_ACCESSED; return pte; }
	240	static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low \|= _PAGE_RW; return pte; }
32e51a8c	241	static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low \|= __LARGE_PTE; return pte; }
1da177e4 LT	242
	243	#ifdef CONFIG_X86_PAE
	244	# include <asm/pgtable-3level.h>
	245	#else
	246	# include <asm/pgtable-2level.h>
	247	#endif
	248
	249	static inline int ptep_test_and_clear_dirty(struct vm_area_struct vma, unsigned long addr, pte_t ptep)
	250	{
	251	if (!pte_dirty(*ptep))
	252	return 0;
	253	return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte_low);
	254	}
	255
	256	static inline int ptep_test_and_clear_young(struct vm_area_struct vma, unsigned long addr, pte_t ptep)
	257	{
	258	if (!pte_young(*ptep))
	259	return 0;
	260	return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
	261	}
	262
a600388d ZA	263	static inline pte_t ptep_get_and_clear_full(struct mm_struct mm, unsigned long addr, pte_t ptep, int full)
	264	{
	265	pte_t pte;
	266	if (full) {
	267	pte = *ptep;
	268	*ptep = __pte(0);
	269	} else {
	270	pte = ptep_get_and_clear(mm, addr, ptep);
	271	}
	272	return pte;
	273	}
	274
1da177e4 LT	275	static inline void ptep_set_wrprotect(struct mm_struct mm, unsigned long addr, pte_t ptep)
	276	{
	277	clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
	278	}
	279
d7271b14 ZA	280	/*
	281	* clone_pgd_range(pgd_t dst, pgd_t src, int count);
	282	*
	283	* dst - pointer to pgd range anwhere on a pgd page
	284	* src - ""
	285	* count - the number of pgds to copy.
	286	*
	287	* dst and src can be on the same page, but the range must not overlap,
	288	* and must not cross a page boundary.
	289	*/
	290	static inline void clone_pgd_range(pgd_t dst, pgd_t src, int count)
	291	{
	292	memcpy(dst, src, count * sizeof(pgd_t));
	293	}
	294
1da177e4 LT	295	/*
	296	* Macro to mark a page protection value as "uncacheable". On processors which do not support
	297	* it, this is a no-op.
	298	*/
	299	#define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
	300	? (__pgprot(pgprot_val(prot) \| _PAGE_PCD \| _PAGE_PWT)) : (prot))
	301
	302	/*
	303	* Conversion functions: convert a page and protection to a page entry,
	304	* and a page entry and page directory to the page they refer to.
	305	*/
	306
	307	#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
1da177e4 LT	308
	309	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
	310	{
	311	pte.pte_low &= _PAGE_CHG_MASK;
	312	pte.pte_low \|= pgprot_val(newprot);
	313	#ifdef CONFIG_X86_PAE
	314	/*
	315	* Chop off the NX bit (if present), and add the NX portion of
	316	* the newprot (if present):
	317	*/
	318	pte.pte_high &= ~(1 << (_PAGE_BIT_NX - 32));
	319	pte.pte_high \|= (pgprot_val(newprot) >> 32) & \
	320	(__supported_pte_mask >> 32);
	321	#endif
	322	return pte;
	323	}
	324
	325	#define page_pte(page) page_pte_prot(page, __pgprot(0))
	326
	327	#define pmd_large(pmd) \
	328	((pmd_val(pmd) & (_PAGE_PSE\|_PAGE_PRESENT)) == (_PAGE_PSE\|_PAGE_PRESENT))
	329
	330	/*
	331	* the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
	332	*
	333	* this macro returns the index of the entry in the pgd page which would
	334	* control the given virtual address
	335	*/
	336	#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
	337	#define pgd_index_k(addr) pgd_index(addr)
	338
	339	/*
	340	* pgd_offset() returns a (pgd_t *)
	341	* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
	342	*/
	343	#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
	344
	345	/*
	346	* a shortcut which implies the use of the kernel's pgd, instead
	347	* of a process's
	348	*/
	349	#define pgd_offset_k(address) pgd_offset(&init_mm, address)
	350
	351	/*
	352	* the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
	353	*
	354	* this macro returns the index of the entry in the pmd page which would
	355	* control the given virtual address
	356	*/
	357	#define pmd_index(address) \
	358	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
	359
	360	/*
	361	* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
	362	*
	363	* this macro returns the index of the entry in the pte page which would
	364	* control the given virtual address
	365	*/
	366	#define pte_index(address) \
	367	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
	368	#define pte_offset_kernel(dir, address) \
	369	((pte_t ) pmd_page_kernel((dir)) + pte_index(address))
	370
	371	/*
372	* Helper function that returns the kernel pagetable entry controlling
373	* the virtual address 'address'. NULL means no pagetable entry present.
374	* NOTE: the return type is pte_t but if the pmd is PSE then we return it
375	* as a pte too.
376	*/
377	extern pte_t *lookup_address(unsigned long address);
378
379	/*
380	* Make a given kernel text page executable/non-executable.
381	* Returns the previous executability setting of that page (which
382	* is used to restore the previous state). Used by the SMP bootup code.
383	* NOTE: this is an __init function for security reasons.
384	*/
385	#ifdef CONFIG_X86_PAE
386	extern int set_kernel_exec(unsigned long vaddr, int enable);
387	#else
388	static inline int set_kernel_exec(unsigned long vaddr, int enable) { return 0;}
389	#endif
390
391	extern void noexec_setup(const char *str);
392
393	#if defined(CONFIG_HIGHPTE)
394	#define pte_offset_map(dir, address) \
395	((pte_t )kmap_atomic(pmd_page((dir)),KM_PTE0) + pte_index(address))
396	#define pte_offset_map_nested(dir, address) \
397	((pte_t )kmap_atomic(pmd_page((dir)),KM_PTE1) + pte_index(address))
398	#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
399	#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
400	#else
401	#define pte_offset_map(dir, address) \
402	((pte_t )page_address(pmd_page((dir))) + pte_index(address))
403	#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
404	#define pte_unmap(pte) do { } while (0)
405	#define pte_unmap_nested(pte) do { } while (0)
406	#endif
407
408	/*
409	* The i386 doesn't have any external MMU info: the kernel page
410	* tables contain all the necessary information.
411	*
412	* Also, we only update the dirty/accessed state if we set
413	* the dirty bit by hand in the kernel, since the hardware
414	* will do the accessed bit for us, and we don't want to
415	* race with other CPU's that might be updating the dirty
416	* bit at the same time.
417	*/
418	#define update_mmu_cache(vma,address,pte) do { } while (0)
419	#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
420	#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
421	do { \
422	if (__dirty) { \
423	(__ptep)->pte_low = (__entry).pte_low; \
424	flush_tlb_page(__vma, __address); \
425	} \
426	} while (0)
427
428	#endif /* !__ASSEMBLY__ */
429
05b79bdc	430	#ifdef CONFIG_FLATMEM
1da177e4	431	#define kern_addr_valid(addr) (1)
05b79bdc	432	#endif /* CONFIG_FLATMEM */
1da177e4 LT	433
	434	#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
	435	remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
	436
	437	#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
	438	remap_pfn_range(vma, vaddr, pfn, size, prot)
	439
	440	#define MK_IOSPACE_PFN(space, pfn) (pfn)
	441	#define GET_IOSPACE(pfn) 0
	442	#define GET_PFN(pfn) (pfn)
	443
	444	#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
	445	#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
	446	#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
a600388d	447	#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1da177e4 LT	448	#define __HAVE_ARCH_PTEP_SET_WRPROTECT
	449	#define __HAVE_ARCH_PTE_SAME
	450	#include <asm-generic/pgtable.h>
	451
	452	#endif /* _I386_PGTABLE_H */