[net-next-2.6.git] / drivers / video / cg14.c

/* cg14.c: CGFOURTEEN frame buffer driver
 *
 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
 *
 * Driver layout based loosely on tgafb.c, see that file for credits.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/fb.h>
#include <linux/mm.h>

#include <asm/io.h>
#include <asm/prom.h>
#include <asm/of_device.h>
#include <asm/fbio.h>

#include "sbuslib.h"

/*
 * Local functions.
 */

static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
			 unsigned, struct fb_info *);

static int cg14_mmap(struct fb_info *, struct vm_area_struct *);
static int cg14_ioctl(struct fb_info *, unsigned int, unsigned long);
static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *);

/*
 *  Frame buffer operations
 */

static struct fb_ops cg14_ops = {
	.owner			= THIS_MODULE,
	.fb_setcolreg		= cg14_setcolreg,
	.fb_pan_display		= cg14_pan_display,
	.fb_fillrect		= cfb_fillrect,
	.fb_copyarea		= cfb_copyarea,
	.fb_imageblit		= cfb_imageblit,
	.fb_mmap		= cg14_mmap,
	.fb_ioctl		= cg14_ioctl,
#ifdef CONFIG_COMPAT
	.fb_compat_ioctl	= sbusfb_compat_ioctl,
#endif
};

#define CG14_MCR_INTENABLE_SHIFT	7
#define CG14_MCR_INTENABLE_MASK		0x80
#define CG14_MCR_VIDENABLE_SHIFT	6
#define CG14_MCR_VIDENABLE_MASK		0x40
#define CG14_MCR_PIXMODE_SHIFT		4
#define CG14_MCR_PIXMODE_MASK		0x30
#define CG14_MCR_TMR_SHIFT		2
#define CG14_MCR_TMR_MASK		0x0c
#define CG14_MCR_TMENABLE_SHIFT		1
#define CG14_MCR_TMENABLE_MASK		0x02
#define CG14_MCR_RESET_SHIFT		0
#define CG14_MCR_RESET_MASK		0x01
#define CG14_REV_REVISION_SHIFT		4
#define CG14_REV_REVISION_MASK		0xf0
#define CG14_REV_IMPL_SHIFT		0
#define CG14_REV_IMPL_MASK		0x0f
#define CG14_VBR_FRAMEBASE_SHIFT	12
#define CG14_VBR_FRAMEBASE_MASK		0x00fff000
#define CG14_VMCR1_SETUP_SHIFT		0
#define CG14_VMCR1_SETUP_MASK		0x000001ff
#define CG14_VMCR1_VCONFIG_SHIFT	9
#define CG14_VMCR1_VCONFIG_MASK		0x00000e00
#define CG14_VMCR2_REFRESH_SHIFT	0
#define CG14_VMCR2_REFRESH_MASK		0x00000001
#define CG14_VMCR2_TESTROWCNT_SHIFT	1
#define CG14_VMCR2_TESTROWCNT_MASK	0x00000002
#define CG14_VMCR2_FBCONFIG_SHIFT	2
#define CG14_VMCR2_FBCONFIG_MASK	0x0000000c
#define CG14_VCR_REFRESHREQ_SHIFT	0
#define CG14_VCR_REFRESHREQ_MASK	0x000003ff
#define CG14_VCR1_REFRESHENA_SHIFT	10
#define CG14_VCR1_REFRESHENA_MASK	0x00000400
#define CG14_VCA_CAD_SHIFT		0
#define CG14_VCA_CAD_MASK		0x000003ff
#define CG14_VCA_VERS_SHIFT		10
#define CG14_VCA_VERS_MASK		0x00000c00
#define CG14_VCA_RAMSPEED_SHIFT		12
#define CG14_VCA_RAMSPEED_MASK		0x00001000
#define CG14_VCA_8MB_SHIFT		13
#define CG14_VCA_8MB_MASK		0x00002000

#define CG14_MCR_PIXMODE_8		0
#define CG14_MCR_PIXMODE_16		2
#define CG14_MCR_PIXMODE_32		3

struct cg14_regs{
	u8 mcr;	/* Master Control Reg */
	u8 ppr;	/* Packed Pixel Reg */
	u8 tms[2];	/* Test Mode Status Regs */
	u8 msr;	/* Master Status Reg */
	u8 fsr;	/* Fault Status Reg */
	u8 rev;	/* Revision & Impl */
	u8 ccr;	/* Clock Control Reg */
	u32 tmr;	/* Test Mode Read Back */
	u8 mod;	/* Monitor Operation Data Reg */
	u8 acr;	/* Aux Control */
	u8 xxx0[6];
	u16 hct;	/* Hor Counter */
	u16 vct;	/* Vert Counter */
	u16 hbs;	/* Hor Blank Start */
	u16 hbc;	/* Hor Blank Clear */
	u16 hss;	/* Hor Sync Start */
	u16 hsc;	/* Hor Sync Clear */
	u16 csc;	/* Composite Sync Clear */
	u16 vbs;	/* Vert Blank Start */
	u16 vbc;	/* Vert Blank Clear */
	u16 vss;	/* Vert Sync Start */
	u16 vsc;	/* Vert Sync Clear */
	u16 xcs;
	u16 xcc;
	u16 fsa;	/* Fault Status Address */
	u16 adr;	/* Address Registers */
	u8 xxx1[0xce];
	u8 pcg[0x100]; /* Pixel Clock Generator */
	u32 vbr;	/* Frame Base Row */
	u32 vmcr;	/* VBC Master Control */
	u32 vcr;	/* VBC refresh */
	u32 vca;	/* VBC Config */
};

#define CG14_CCR_ENABLE	0x04
#define CG14_CCR_SELECT 0x02	/* HW/Full screen */

struct cg14_cursor {
	u32 cpl0[32];	/* Enable plane 0 */
	u32 cpl1[32];  /* Color selection plane */
	u8 ccr;	/* Cursor Control Reg */
	u8 xxx0[3];
	u16 cursx;	/* Cursor x,y position */
	u16 cursy;	/* Cursor x,y position */
	u32 color0;
	u32 color1;
	u32 xxx1[0x1bc];
	u32 cpl0i[32];	/* Enable plane 0 autoinc */
	u32 cpl1i[32]; /* Color selection autoinc */
};

struct cg14_dac {
	u8 addr;	/* Address Register */
	u8 xxx0[255];
	u8 glut;	/* Gamma table */
	u8 xxx1[255];
	u8 select;	/* Register Select */
	u8 xxx2[255];
	u8 mode;	/* Mode Register */
};

struct cg14_xlut{
	u8 x_xlut [256];
	u8 x_xlutd [256];
	u8 xxx0[0x600];
	u8 x_xlut_inc [256];
	u8 x_xlutd_inc [256];
};

/* Color look up table (clut) */
/* Each one of these arrays hold the color lookup table (for 256
 * colors) for each MDI page (I assume then there should be 4 MDI
 * pages, I still wonder what they are.  I have seen NeXTStep split
 * the screen in four parts, while operating in 24 bits mode.  Each
 * integer holds 4 values: alpha value (transparency channel, thanks
 * go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
 *
 * I currently use the clut instead of the Xlut
 */
struct cg14_clut {
	u32 c_clut [256];
	u32 c_clutd [256];    /* i wonder what the 'd' is for */
	u32 c_clut_inc [256];
	u32 c_clutd_inc [256];
};

#define CG14_MMAP_ENTRIES	16

struct cg14_par {
	spinlock_t		lock;
	struct cg14_regs	__iomem *regs;
	struct cg14_clut	__iomem *clut;
	struct cg14_cursor	__iomem *cursor;

	u32			flags;
#define CG14_FLAG_BLANKED	0x00000001

	unsigned long		physbase;
	unsigned long		iospace;
	unsigned long		fbsize;

	struct sbus_mmap_map	mmap_map[CG14_MMAP_ENTRIES];

	int			mode;
	int			ramsize;
};

static void __cg14_reset(struct cg14_par *par)
{
	struct cg14_regs __iomem *regs = par->regs;
	u8 val;

	val = sbus_readb(&regs->mcr);
	val &= ~(CG14_MCR_PIXMODE_MASK);
	sbus_writeb(val, &regs->mcr);
}

static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
{
	struct cg14_par *par = (struct cg14_par *) info->par;
	unsigned long flags;

	/* We just use this to catch switches out of
	 * graphics mode.
	 */
	spin_lock_irqsave(&par->lock, flags);
	__cg14_reset(par);
	spin_unlock_irqrestore(&par->lock, flags);

	if (var->xoffset || var->yoffset || var->vmode)
		return -EINVAL;
	return 0;
}

/**
 *      cg14_setcolreg - Optional function. Sets a color register.
 *      @regno: boolean, 0 copy local, 1 get_user() function
 *      @red: frame buffer colormap structure
 *      @green: The green value which can be up to 16 bits wide
 *      @blue:  The blue value which can be up to 16 bits wide.
 *      @transp: If supported the alpha value which can be up to 16 bits wide.
 *      @info: frame buffer info structure
 */
static int cg14_setcolreg(unsigned regno,
			  unsigned red, unsigned green, unsigned blue,
			  unsigned transp, struct fb_info *info)
{
	struct cg14_par *par = (struct cg14_par *) info->par;
	struct cg14_clut __iomem *clut = par->clut;
	unsigned long flags;
	u32 val;

	if (regno >= 256)
		return 1;

	red >>= 8;
	green >>= 8;
	blue >>= 8;
	val = (red | (green << 8) | (blue << 16));

	spin_lock_irqsave(&par->lock, flags);
	sbus_writel(val, &clut->c_clut[regno]);
	spin_unlock_irqrestore(&par->lock, flags);

	return 0;
}

static int cg14_mmap(struct fb_info *info, struct vm_area_struct *vma)
{
	struct cg14_par *par = (struct cg14_par *) info->par;

	return sbusfb_mmap_helper(par->mmap_map,
				  par->physbase, par->fbsize,
				  par->iospace, vma);
}

static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
{
	struct cg14_par *par = (struct cg14_par *) info->par;
	struct cg14_regs __iomem *regs = par->regs;
	struct mdi_cfginfo kmdi, __user *mdii;
	unsigned long flags;
	int cur_mode, mode, ret = 0;

	switch (cmd) {
	case MDI_RESET:
		spin_lock_irqsave(&par->lock, flags);
		__cg14_reset(par);
		spin_unlock_irqrestore(&par->lock, flags);
		break;

	case MDI_GET_CFGINFO:
		memset(&kmdi, 0, sizeof(kmdi));

		spin_lock_irqsave(&par->lock, flags);
		kmdi.mdi_type = FBTYPE_MDICOLOR;
		kmdi.mdi_height = info->var.yres;
		kmdi.mdi_width = info->var.xres;
		kmdi.mdi_mode = par->mode;
		kmdi.mdi_pixfreq = 72; /* FIXME */
		kmdi.mdi_size = par->ramsize;
		spin_unlock_irqrestore(&par->lock, flags);

		mdii = (struct mdi_cfginfo __user *) arg;
		if (copy_to_user(mdii, &kmdi, sizeof(kmdi)))
			ret = -EFAULT;
		break;

	case MDI_SET_PIXELMODE:
		if (get_user(mode, (int __user *) arg)) {
			ret = -EFAULT;
			break;
		}

		spin_lock_irqsave(&par->lock, flags);
		cur_mode = sbus_readb(&regs->mcr);
		cur_mode &= ~CG14_MCR_PIXMODE_MASK;
		switch(mode) {
		case MDI_32_PIX:
			cur_mode |= (CG14_MCR_PIXMODE_32 <<
				     CG14_MCR_PIXMODE_SHIFT);
			break;

		case MDI_16_PIX:
			cur_mode |= (CG14_MCR_PIXMODE_16 <<
				     CG14_MCR_PIXMODE_SHIFT);
			break;

		case MDI_8_PIX:
			break;

		default:
			ret = -ENOSYS;
			break;
		};
		if (!ret) {
			sbus_writeb(cur_mode, &regs->mcr);
			par->mode = mode;
		}
		spin_unlock_irqrestore(&par->lock, flags);
		break;

	default:
		ret = sbusfb_ioctl_helper(cmd, arg, info,
					  FBTYPE_MDICOLOR, 8, par->fbsize);
		break;
	};

	return ret;
}

/*
 *  Initialisation
 */

static void __devinit cg14_init_fix(struct fb_info *info, int linebytes,
				    struct device_node *dp)
{
	const char *name = dp->name;

	strlcpy(info->fix.id, name, sizeof(info->fix.id));

	info->fix.type = FB_TYPE_PACKED_PIXELS;
	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;

	info->fix.line_length = linebytes;

	info->fix.accel = FB_ACCEL_SUN_CG14;
}

static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __devinitdata = {
	{
		.voff	= CG14_REGS,
		.poff	= 0x80000000,
		.size	= 0x1000
	},
	{
		.voff	= CG14_XLUT,
		.poff	= 0x80003000,
		.size	= 0x1000
	},
	{
		.voff	= CG14_CLUT1,
		.poff	= 0x80004000,
		.size	= 0x1000
	},
	{
		.voff	= CG14_CLUT2,
		.poff	= 0x80005000,
		.size	= 0x1000
	},
	{
		.voff	= CG14_CLUT3,
		.poff	= 0x80006000,
		.size	= 0x1000
	},
	{
		.voff	= CG3_MMAP_OFFSET - 0x7000,
		.poff	= 0x80000000,
		.size	= 0x7000
	},
	{
		.voff	= CG3_MMAP_OFFSET,
		.poff	= 0x00000000,
		.size	= SBUS_MMAP_FBSIZE(1)
	},
	{
		.voff	= MDI_CURSOR_MAP,
		.poff	= 0x80001000,
		.size	= 0x1000
	},
	{
		.voff	= MDI_CHUNKY_BGR_MAP,
		.poff	= 0x01000000,
		.size	= 0x400000
	},
	{
		.voff	= MDI_PLANAR_X16_MAP,
		.poff	= 0x02000000,
		.size	= 0x200000
	},
	{
		.voff	= MDI_PLANAR_C16_MAP,
		.poff	= 0x02800000,
		.size	= 0x200000
	},
	{
		.voff	= MDI_PLANAR_X32_MAP,
		.poff	= 0x03000000,
		.size	= 0x100000
	},
	{
		.voff	= MDI_PLANAR_B32_MAP,
		.poff	= 0x03400000,
		.size	= 0x100000
	},
	{
		.voff	= MDI_PLANAR_G32_MAP,
		.poff	= 0x03800000,
		.size	= 0x100000
	},
	{
		.voff	= MDI_PLANAR_R32_MAP,
		.poff	= 0x03c00000,
		.size	= 0x100000
	},
	{ .size = 0 }
};

struct all_info {
	struct fb_info info;
	struct cg14_par par;
};

static void cg14_unmap_regs(struct of_device *op, struct all_info *all)
{
	if (all->par.regs)
		of_iounmap(&op->resource[0],
			   all->par.regs, sizeof(struct cg14_regs));
	if (all->par.clut)
		of_iounmap(&op->resource[0],
			   all->par.clut, sizeof(struct cg14_clut));
	if (all->par.cursor)
		of_iounmap(&op->resource[0],
			   all->par.cursor, sizeof(struct cg14_cursor));
	if (all->info.screen_base)
		of_iounmap(&op->resource[1],
			   all->info.screen_base, all->par.fbsize);
}

static int __devinit cg14_init_one(struct of_device *op)
{
	struct device_node *dp = op->node;
	struct all_info *all;
	int is_8mb, linebytes, i, err;

	all = kzalloc(sizeof(*all), GFP_KERNEL);
	if (!all)
		return -ENOMEM;

	spin_lock_init(&all->par.lock);

	sbusfb_fill_var(&all->info.var, dp->node, 8);
	all->info.var.red.length = 8;
	all->info.var.green.length = 8;
	all->info.var.blue.length = 8;

	linebytes = of_getintprop_default(dp, "linebytes",
					  all->info.var.xres);
	all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);

	if (!strcmp(dp->parent->name, "sbus") ||
	    !strcmp(dp->parent->name, "sbi")) {
		all->par.physbase = op->resource[0].start;
		all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
	} else {
		all->par.physbase = op->resource[1].start;
		all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
	}

	all->par.regs = of_ioremap(&op->resource[0], 0,
				   sizeof(struct cg14_regs), "cg14 regs");
	all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1,
				   sizeof(struct cg14_clut), "cg14 clut");
	all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
				   sizeof(struct cg14_cursor), "cg14 cursor");

	all->info.screen_base = of_ioremap(&op->resource[1], 0,
					   all->par.fbsize, "cg14 ram");

	if (!all->par.regs || !all->par.clut || !all->par.cursor ||
	    !all->info.screen_base)
		cg14_unmap_regs(op, all);

	is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
		  (8 * 1024 * 1024));

	BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map));
		
	memcpy(&all->par.mmap_map, &__cg14_mmap_map,
	       sizeof(all->par.mmap_map));

	for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
		struct sbus_mmap_map *map = &all->par.mmap_map[i];

		if (!map->size)
			break;
		if (map->poff & 0x80000000)
			map->poff = (map->poff & 0x7fffffff) +
				(op->resource[0].start -
				 op->resource[1].start);
		if (is_8mb &&
		    map->size >= 0x100000 &&
		    map->size <= 0x400000)
			map->size *= 2;
	}

	all->par.mode = MDI_8_PIX;
	all->par.ramsize = (is_8mb ? 0x800000 : 0x400000);

	all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
	all->info.fbops = &cg14_ops;
	all->info.par = &all->par;

	__cg14_reset(&all->par);

	if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
		cg14_unmap_regs(op, all);
		kfree(all);
		return -ENOMEM;
	}
	fb_set_cmap(&all->info.cmap, &all->info);

	cg14_init_fix(&all->info, linebytes, dp);

	err = register_framebuffer(&all->info);
	if (err < 0) {
		fb_dealloc_cmap(&all->info.cmap);
		cg14_unmap_regs(op, all);
		kfree(all);
		return err;
	}

	dev_set_drvdata(&op->dev, all);

	printk("%s: cgfourteen at %lx:%lx, %dMB\n",
	       dp->full_name,
	       all->par.iospace, all->par.physbase,
	       all->par.ramsize >> 20);

	return 0;
}

static int __devinit cg14_probe(struct of_device *dev, const struct of_device_id *match)
{
	struct of_device *op = to_of_device(&dev->dev);

	return cg14_init_one(op);
}

static int __devexit cg14_remove(struct of_device *op)
{
	struct all_info *all = dev_get_drvdata(&op->dev);

	unregister_framebuffer(&all->info);
	fb_dealloc_cmap(&all->info.cmap);

	cg14_unmap_regs(op, all);

	kfree(all);

	dev_set_drvdata(&op->dev, NULL);

	return 0;
}

static struct of_device_id cg14_match[] = {
	{
		.name = "cgfourteen",
	},
	{},
};
MODULE_DEVICE_TABLE(of, cg14_match);

static struct of_platform_driver cg14_driver = {
	.name		= "cg14",
	.match_table	= cg14_match,
	.probe		= cg14_probe,
	.remove		= __devexit_p(cg14_remove),
};

int __init cg14_init(void)
{
	if (fb_get_options("cg14fb", NULL))
		return -ENODEV;

	return of_register_driver(&cg14_driver, &of_bus_type);
}

void __exit cg14_exit(void)
{
	of_unregister_driver(&cg14_driver);
}

module_init(cg14_init);
module_exit(cg14_exit);

MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/* cg14.c: CGFOURTEEN frame buffer driver
1da177e4 LT	2	*
50312ce9	3	* Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
1da177e4 LT	4	* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
	5	* Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
	6	*
	7	* Driver layout based loosely on tgafb.c, see that file for credits.
	8	*/
	9
	10	#include <linux/module.h>
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/string.h>
	14	#include <linux/slab.h>
	15	#include <linux/delay.h>
	16	#include <linux/init.h>
	17	#include <linux/fb.h>
	18	#include <linux/mm.h>
	19
	20	#include <asm/io.h>
50312ce9 DM	21	#include <asm/prom.h>
50312ce9 DM	22	#include <asm/of_device.h>
1da177e4 LT	23	#include <asm/fbio.h>
	24
	25	#include "sbuslib.h"
	26
	27	/*
	28	* Local functions.
	29	*/
	30
	31	static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
	32	unsigned, struct fb_info *);
	33
216d526c	34	static int cg14_mmap(struct fb_info , struct vm_area_struct );
67a6680d	35	static int cg14_ioctl(struct fb_info *, unsigned int, unsigned long);
1da177e4 LT	36	static int cg14_pan_display(struct fb_var_screeninfo , struct fb_info );
	37
	38	/*
	39	* Frame buffer operations
	40	*/
	41
	42	static struct fb_ops cg14_ops = {
	43	.owner = THIS_MODULE,
	44	.fb_setcolreg = cg14_setcolreg,
	45	.fb_pan_display = cg14_pan_display,
	46	.fb_fillrect = cfb_fillrect,
	47	.fb_copyarea = cfb_copyarea,
	48	.fb_imageblit = cfb_imageblit,
	49	.fb_mmap = cg14_mmap,
	50	.fb_ioctl = cg14_ioctl,
9ffb83bc CH	51	#ifdef CONFIG_COMPAT
	52	.fb_compat_ioctl = sbusfb_compat_ioctl,
	53	#endif
1da177e4 LT	54	};
	55
	56	#define CG14_MCR_INTENABLE_SHIFT 7
	57	#define CG14_MCR_INTENABLE_MASK 0x80
	58	#define CG14_MCR_VIDENABLE_SHIFT 6
	59	#define CG14_MCR_VIDENABLE_MASK 0x40
	60	#define CG14_MCR_PIXMODE_SHIFT 4
	61	#define CG14_MCR_PIXMODE_MASK 0x30
	62	#define CG14_MCR_TMR_SHIFT 2
	63	#define CG14_MCR_TMR_MASK 0x0c
	64	#define CG14_MCR_TMENABLE_SHIFT 1
	65	#define CG14_MCR_TMENABLE_MASK 0x02
	66	#define CG14_MCR_RESET_SHIFT 0
	67	#define CG14_MCR_RESET_MASK 0x01
	68	#define CG14_REV_REVISION_SHIFT 4
	69	#define CG14_REV_REVISION_MASK 0xf0
	70	#define CG14_REV_IMPL_SHIFT 0
	71	#define CG14_REV_IMPL_MASK 0x0f
	72	#define CG14_VBR_FRAMEBASE_SHIFT 12
	73	#define CG14_VBR_FRAMEBASE_MASK 0x00fff000
	74	#define CG14_VMCR1_SETUP_SHIFT 0
	75	#define CG14_VMCR1_SETUP_MASK 0x000001ff
	76	#define CG14_VMCR1_VCONFIG_SHIFT 9
	77	#define CG14_VMCR1_VCONFIG_MASK 0x00000e00
	78	#define CG14_VMCR2_REFRESH_SHIFT 0
	79	#define CG14_VMCR2_REFRESH_MASK 0x00000001
	80	#define CG14_VMCR2_TESTROWCNT_SHIFT 1
	81	#define CG14_VMCR2_TESTROWCNT_MASK 0x00000002
	82	#define CG14_VMCR2_FBCONFIG_SHIFT 2
	83	#define CG14_VMCR2_FBCONFIG_MASK 0x0000000c
	84	#define CG14_VCR_REFRESHREQ_SHIFT 0
	85	#define CG14_VCR_REFRESHREQ_MASK 0x000003ff
	86	#define CG14_VCR1_REFRESHENA_SHIFT 10
	87	#define CG14_VCR1_REFRESHENA_MASK 0x00000400
	88	#define CG14_VCA_CAD_SHIFT 0
	89	#define CG14_VCA_CAD_MASK 0x000003ff
	90	#define CG14_VCA_VERS_SHIFT 10
	91	#define CG14_VCA_VERS_MASK 0x00000c00
	92	#define CG14_VCA_RAMSPEED_SHIFT 12
	93	#define CG14_VCA_RAMSPEED_MASK 0x00001000
	94	#define CG14_VCA_8MB_SHIFT 13
	95	#define CG14_VCA_8MB_MASK 0x00002000
	96
	97	#define CG14_MCR_PIXMODE_8 0
	98	#define CG14_MCR_PIXMODE_16 2
	99	#define CG14_MCR_PIXMODE_32 3
	100
	101	struct cg14_regs{
50312ce9 DM	102	u8 mcr; /* Master Control Reg */
	103	u8 ppr; /* Packed Pixel Reg */
	104	u8 tms[2]; /* Test Mode Status Regs */
	105	u8 msr; /* Master Status Reg */
	106	u8 fsr; /* Fault Status Reg */
	107	u8 rev; /* Revision & Impl */
	108	u8 ccr; /* Clock Control Reg */
	109	u32 tmr; /* Test Mode Read Back */
	110	u8 mod; /* Monitor Operation Data Reg */
	111	u8 acr; /* Aux Control */
1da177e4	112	u8 xxx0[6];
50312ce9 DM	113	u16 hct; /* Hor Counter */
	114	u16 vct; /* Vert Counter */
	115	u16 hbs; /* Hor Blank Start */
	116	u16 hbc; /* Hor Blank Clear */
	117	u16 hss; /* Hor Sync Start */
	118	u16 hsc; /* Hor Sync Clear */
	119	u16 csc; /* Composite Sync Clear */
	120	u16 vbs; /* Vert Blank Start */
	121	u16 vbc; /* Vert Blank Clear */
	122	u16 vss; /* Vert Sync Start */
	123	u16 vsc; /* Vert Sync Clear */
	124	u16 xcs;
	125	u16 xcc;
	126	u16 fsa; /* Fault Status Address */
	127	u16 adr; /* Address Registers */
1da177e4	128	u8 xxx1[0xce];
50312ce9 DM	129	u8 pcg[0x100]; /* Pixel Clock Generator */
	130	u32 vbr; /* Frame Base Row */
	131	u32 vmcr; /* VBC Master Control */
	132	u32 vcr; /* VBC refresh */
	133	u32 vca; /* VBC Config */
1da177e4 LT	134	};
	135
	136	#define CG14_CCR_ENABLE 0x04
	137	#define CG14_CCR_SELECT 0x02 /* HW/Full screen */
	138
	139	struct cg14_cursor {
50312ce9 DM	140	u32 cpl0[32]; /* Enable plane 0 */
	141	u32 cpl1[32]; /* Color selection plane */
	142	u8 ccr; /* Cursor Control Reg */
1da177e4	143	u8 xxx0[3];
50312ce9 DM	144	u16 cursx; /* Cursor x,y position */
	145	u16 cursy; /* Cursor x,y position */
	146	u32 color0;
	147	u32 color1;
1da177e4	148	u32 xxx1[0x1bc];
50312ce9 DM	149	u32 cpl0i[32]; /* Enable plane 0 autoinc */
50312ce9 DM	150	u32 cpl1i[32]; /* Color selection autoinc */
1da177e4 LT	151	};
	152
	153	struct cg14_dac {
50312ce9	154	u8 addr; /* Address Register */
1da177e4	155	u8 xxx0[255];
50312ce9	156	u8 glut; /* Gamma table */
1da177e4	157	u8 xxx1[255];
50312ce9	158	u8 select; /* Register Select */
1da177e4	159	u8 xxx2[255];
50312ce9	160	u8 mode; /* Mode Register */
1da177e4 LT	161	};
	162
	163	struct cg14_xlut{
50312ce9 DM	164	u8 x_xlut [256];
50312ce9 DM	165	u8 x_xlutd [256];
1da177e4	166	u8 xxx0[0x600];
50312ce9 DM	167	u8 x_xlut_inc [256];
50312ce9 DM	168	u8 x_xlutd_inc [256];
1da177e4 LT	169	};
	170
	171	/* Color look up table (clut) */
	172	/* Each one of these arrays hold the color lookup table (for 256
	173	* colors) for each MDI page (I assume then there should be 4 MDI
	174	* pages, I still wonder what they are. I have seen NeXTStep split
	175	* the screen in four parts, while operating in 24 bits mode. Each
	176	* integer holds 4 values: alpha value (transparency channel, thanks
	177	* go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
	178	*
	179	* I currently use the clut instead of the Xlut
	180	*/
	181	struct cg14_clut {
	182	u32 c_clut [256];
	183	u32 c_clutd [256]; /* i wonder what the 'd' is for */
	184	u32 c_clut_inc [256];
	185	u32 c_clutd_inc [256];
	186	};
	187
	188	#define CG14_MMAP_ENTRIES 16
	189
	190	struct cg14_par {
	191	spinlock_t lock;
	192	struct cg14_regs __iomem *regs;
	193	struct cg14_clut __iomem *clut;
	194	struct cg14_cursor __iomem *cursor;
	195
	196	u32 flags;
	197	#define CG14_FLAG_BLANKED 0x00000001
	198
	199	unsigned long physbase;
	200	unsigned long iospace;
	201	unsigned long fbsize;
	202
	203	struct sbus_mmap_map mmap_map[CG14_MMAP_ENTRIES];
	204
	205	int mode;
	206	int ramsize;
1da177e4 LT	207	};
	208
	209	static void __cg14_reset(struct cg14_par *par)
	210	{
	211	struct cg14_regs __iomem *regs = par->regs;
	212	u8 val;
	213
	214	val = sbus_readb(&regs->mcr);
	215	val &= ~(CG14_MCR_PIXMODE_MASK);
	216	sbus_writeb(val, &regs->mcr);
	217	}
	218
	219	static int cg14_pan_display(struct fb_var_screeninfo var, struct fb_info info)
	220	{
	221	struct cg14_par par = (struct cg14_par ) info->par;
	222	unsigned long flags;
	223
	224	/* We just use this to catch switches out of
	225	* graphics mode.
	226	*/
	227	spin_lock_irqsave(&par->lock, flags);
	228	__cg14_reset(par);
	229	spin_unlock_irqrestore(&par->lock, flags);
	230
	231	if (var->xoffset \|\| var->yoffset \|\| var->vmode)
	232	return -EINVAL;
	233	return 0;
	234	}
	235
	236	/**
	237	* cg14_setcolreg - Optional function. Sets a color register.
	238	* @regno: boolean, 0 copy local, 1 get_user() function
	239	* @red: frame buffer colormap structure
	240	* @green: The green value which can be up to 16 bits wide
	241	* @blue: The blue value which can be up to 16 bits wide.
	242	* @transp: If supported the alpha value which can be up to 16 bits wide.
	243	* @info: frame buffer info structure
	244	*/
	245	static int cg14_setcolreg(unsigned regno,
	246	unsigned red, unsigned green, unsigned blue,
	247	unsigned transp, struct fb_info *info)
	248	{
	249	struct cg14_par par = (struct cg14_par ) info->par;
	250	struct cg14_clut __iomem *clut = par->clut;
	251	unsigned long flags;
	252	u32 val;
	253
	254	if (regno >= 256)
	255	return 1;
	256
	257	red >>= 8;
	258	green >>= 8;
	259	blue >>= 8;
	260	val = (red \| (green << 8) \| (blue << 16));
	261
	262	spin_lock_irqsave(&par->lock, flags);
	263	sbus_writel(val, &clut->c_clut[regno]);
	264	spin_unlock_irqrestore(&par->lock, flags);
	265
	266	return 0;
	267	}
	268
216d526c	269	static int cg14_mmap(struct fb_info info, struct vm_area_struct vma)
1da177e4 LT	270	{
	271	struct cg14_par par = (struct cg14_par ) info->par;
	272
	273	return sbusfb_mmap_helper(par->mmap_map,
	274	par->physbase, par->fbsize,
	275	par->iospace, vma);
	276	}
	277
67a6680d	278	static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
1da177e4 LT	279	{
	280	struct cg14_par par = (struct cg14_par ) info->par;
	281	struct cg14_regs __iomem *regs = par->regs;
	282	struct mdi_cfginfo kmdi, __user *mdii;
	283	unsigned long flags;
	284	int cur_mode, mode, ret = 0;
	285
	286	switch (cmd) {
	287	case MDI_RESET:
	288	spin_lock_irqsave(&par->lock, flags);
	289	__cg14_reset(par);
	290	spin_unlock_irqrestore(&par->lock, flags);
	291	break;
	292
	293	case MDI_GET_CFGINFO:
	294	memset(&kmdi, 0, sizeof(kmdi));
	295
	296	spin_lock_irqsave(&par->lock, flags);
	297	kmdi.mdi_type = FBTYPE_MDICOLOR;
	298	kmdi.mdi_height = info->var.yres;
	299	kmdi.mdi_width = info->var.xres;
	300	kmdi.mdi_mode = par->mode;
	301	kmdi.mdi_pixfreq = 72; /* FIXME */
	302	kmdi.mdi_size = par->ramsize;
	303	spin_unlock_irqrestore(&par->lock, flags);
	304
	305	mdii = (struct mdi_cfginfo __user *) arg;
	306	if (copy_to_user(mdii, &kmdi, sizeof(kmdi)))
	307	ret = -EFAULT;
	308	break;
	309
	310	case MDI_SET_PIXELMODE:
	311	if (get_user(mode, (int __user *) arg)) {
	312	ret = -EFAULT;
	313	break;
	314	}
	315
	316	spin_lock_irqsave(&par->lock, flags);
	317	cur_mode = sbus_readb(&regs->mcr);
	318	cur_mode &= ~CG14_MCR_PIXMODE_MASK;
	319	switch(mode) {
	320	case MDI_32_PIX:
	321	cur_mode \|= (CG14_MCR_PIXMODE_32 <<
	322	CG14_MCR_PIXMODE_SHIFT);
	323	break;
	324
	325	case MDI_16_PIX:
	326	cur_mode \|= (CG14_MCR_PIXMODE_16 <<
	327	CG14_MCR_PIXMODE_SHIFT);
	328	break;
	329
	330	case MDI_8_PIX:
	331	break;
	332
	333	default:
	334	ret = -ENOSYS;
	335	break;
	336	};
	337	if (!ret) {
	338	sbus_writeb(cur_mode, &regs->mcr);
	339	par->mode = mode;
	340	}
	341	spin_unlock_irqrestore(&par->lock, flags);
	342	break;
343
344	default:
345	ret = sbusfb_ioctl_helper(cmd, arg, info,
346	FBTYPE_MDICOLOR, 8, par->fbsize);
347	break;
348	};
349
350	return ret;
351	}
352
353	/*
354	* Initialisation
355	*/
356
8fdab476 RR	357	static void __devinit cg14_init_fix(struct fb_info *info, int linebytes,
8fdab476 RR	358	struct device_node *dp)
1da177e4	359	{
50312ce9	360	const char *name = dp->name;
1da177e4 LT	361
	362	strlcpy(info->fix.id, name, sizeof(info->fix.id));
	363
	364	info->fix.type = FB_TYPE_PACKED_PIXELS;
	365	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
	366
	367	info->fix.line_length = linebytes;
	368
	369	info->fix.accel = FB_ACCEL_SUN_CG14;
	370	}
	371
8fdab476	372	static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __devinitdata = {
1da177e4 LT	373	{
	374	.voff = CG14_REGS,
	375	.poff = 0x80000000,
	376	.size = 0x1000
	377	},
	378	{
	379	.voff = CG14_XLUT,
	380	.poff = 0x80003000,
	381	.size = 0x1000
	382	},
	383	{
	384	.voff = CG14_CLUT1,
	385	.poff = 0x80004000,
	386	.size = 0x1000
	387	},
	388	{
	389	.voff = CG14_CLUT2,
	390	.poff = 0x80005000,
	391	.size = 0x1000
	392	},
	393	{
	394	.voff = CG14_CLUT3,
	395	.poff = 0x80006000,
	396	.size = 0x1000
	397	},
	398	{
	399	.voff = CG3_MMAP_OFFSET - 0x7000,
	400	.poff = 0x80000000,
	401	.size = 0x7000
	402	},
	403	{
	404	.voff = CG3_MMAP_OFFSET,
	405	.poff = 0x00000000,
	406	.size = SBUS_MMAP_FBSIZE(1)
	407	},
	408	{
	409	.voff = MDI_CURSOR_MAP,
	410	.poff = 0x80001000,
	411	.size = 0x1000
	412	},
	413	{
	414	.voff = MDI_CHUNKY_BGR_MAP,
	415	.poff = 0x01000000,
	416	.size = 0x400000
	417	},
	418	{
	419	.voff = MDI_PLANAR_X16_MAP,
	420	.poff = 0x02000000,
	421	.size = 0x200000
	422	},
	423	{
	424	.voff = MDI_PLANAR_C16_MAP,
	425	.poff = 0x02800000,
	426	.size = 0x200000
	427	},
	428	{
	429	.voff = MDI_PLANAR_X32_MAP,
	430	.poff = 0x03000000,
	431	.size = 0x100000
	432	},
	433	{
	434	.voff = MDI_PLANAR_B32_MAP,
	435	.poff = 0x03400000,
	436	.size = 0x100000
437	},
438	{
439	.voff = MDI_PLANAR_G32_MAP,
440	.poff = 0x03800000,
441	.size = 0x100000
442	},
443	{
444	.voff = MDI_PLANAR_R32_MAP,
445	.poff = 0x03c00000,
446	.size = 0x100000
447	},
448	{ .size = 0 }
449	};
450
451	struct all_info {
452	struct fb_info info;
453	struct cg14_par par;
1da177e4	454	};
1da177e4	455
e3a411a3	456	static void cg14_unmap_regs(struct of_device op, struct all_info all)
1da177e4	457	{
50312ce9	458	if (all->par.regs)
e3a411a3 DM	459	of_iounmap(&op->resource[0],
e3a411a3 DM	460	all->par.regs, sizeof(struct cg14_regs));
50312ce9	461	if (all->par.clut)
e3a411a3 DM	462	of_iounmap(&op->resource[0],
e3a411a3 DM	463	all->par.clut, sizeof(struct cg14_clut));
50312ce9	464	if (all->par.cursor)
e3a411a3 DM	465	of_iounmap(&op->resource[0],
e3a411a3 DM	466	all->par.cursor, sizeof(struct cg14_cursor));
50312ce9	467	if (all->info.screen_base)
e3a411a3 DM	468	of_iounmap(&op->resource[1],
e3a411a3 DM	469	all->info.screen_base, all->par.fbsize);
50312ce9	470	}
1da177e4	471
50312ce9 DM	472	static int __devinit cg14_init_one(struct of_device *op)
	473	{
	474	struct device_node *dp = op->node;
	475	struct all_info *all;
	476	int is_8mb, linebytes, i, err;
1da177e4	477
50312ce9 DM	478	all = kzalloc(sizeof(*all), GFP_KERNEL);
	479	if (!all)
	480	return -ENOMEM;
1da177e4 LT	481
	482	spin_lock_init(&all->par.lock);
	483
50312ce9	484	sbusfb_fill_var(&all->info.var, dp->node, 8);
1da177e4 LT	485	all->info.var.red.length = 8;
	486	all->info.var.green.length = 8;
	487	all->info.var.blue.length = 8;
	488
50312ce9 DM	489	linebytes = of_getintprop_default(dp, "linebytes",
50312ce9 DM	490	all->info.var.xres);
1da177e4 LT	491	all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
1da177e4 LT	492
50312ce9 DM	493	if (!strcmp(dp->parent->name, "sbus") \|\|
	494	!strcmp(dp->parent->name, "sbi")) {
	495	all->par.physbase = op->resource[0].start;
	496	all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
1da177e4	497	} else {
50312ce9 DM	498	all->par.physbase = op->resource[1].start;
50312ce9 DM	499	all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
1da177e4 LT	500	}
1da177e4 LT	501
50312ce9 DM	502	all->par.regs = of_ioremap(&op->resource[0], 0,
	503	sizeof(struct cg14_regs), "cg14 regs");
	504	all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1,
	505	sizeof(struct cg14_clut), "cg14 clut");
	506	all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
	507	sizeof(struct cg14_cursor), "cg14 cursor");
1da177e4	508
50312ce9 DM	509	all->info.screen_base = of_ioremap(&op->resource[1], 0,
50312ce9 DM	510	all->par.fbsize, "cg14 ram");
1da177e4	511
50312ce9 DM	512	if (!all->par.regs \|\| !all->par.clut \|\| !all->par.cursor \|\|
50312ce9 DM	513	!all->info.screen_base)
e3a411a3	514	cg14_unmap_regs(op, all);
50312ce9 DM	515
	516	is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
	517	(8 * 1024 * 1024));
	518
	519	BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map));
1da177e4	520
50312ce9 DM	521	memcpy(&all->par.mmap_map, &__cg14_mmap_map,
	522	sizeof(all->par.mmap_map));
	523
1da177e4 LT	524	for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
	525	struct sbus_mmap_map *map = &all->par.mmap_map[i];
	526
	527	if (!map->size)
	528	break;
	529	if (map->poff & 0x80000000)
50312ce9 DM	530	map->poff = (map->poff & 0x7fffffff) +
	531	(op->resource[0].start -
	532	op->resource[1].start);
1da177e4 LT	533	if (is_8mb &&
	534	map->size >= 0x100000 &&
	535	map->size <= 0x400000)
	536	map->size *= 2;
	537	}
	538
	539	all->par.mode = MDI_8_PIX;
	540	all->par.ramsize = (is_8mb ? 0x800000 : 0x400000);
	541
	542	all->info.flags = FBINFO_DEFAULT \| FBINFO_HWACCEL_YPAN;
	543	all->info.fbops = &cg14_ops;
	544	all->info.par = &all->par;
	545
	546	__cg14_reset(&all->par);
	547
	548	if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
e3a411a3	549	cg14_unmap_regs(op, all);
1da177e4	550	kfree(all);
50312ce9	551	return -ENOMEM;
1da177e4 LT	552	}
	553	fb_set_cmap(&all->info.cmap, &all->info);
	554
50312ce9	555	cg14_init_fix(&all->info, linebytes, dp);
1da177e4	556
50312ce9 DM	557	err = register_framebuffer(&all->info);
50312ce9 DM	558	if (err < 0) {
1da177e4	559	fb_dealloc_cmap(&all->info.cmap);
e3a411a3	560	cg14_unmap_regs(op, all);
1da177e4	561	kfree(all);
50312ce9	562	return err;
1da177e4 LT	563	}
1da177e4 LT	564
50312ce9	565	dev_set_drvdata(&op->dev, all);
1da177e4	566
50312ce9 DM	567	printk("%s: cgfourteen at %lx:%lx, %dMB\n",
	568	dp->full_name,
	569	all->par.iospace, all->par.physbase,
	570	all->par.ramsize >> 20);
1da177e4	571
50312ce9	572	return 0;
1da177e4 LT	573	}
1da177e4 LT	574
50312ce9	575	static int __devinit cg14_probe(struct of_device dev, const struct of_device_id match)
1da177e4	576	{
50312ce9	577	struct of_device *op = to_of_device(&dev->dev);
1da177e4	578
50312ce9 DM	579	return cg14_init_one(op);
50312ce9 DM	580	}
1da177e4	581
e3a411a3	582	static int __devexit cg14_remove(struct of_device *op)
50312ce9	583	{
e3a411a3	584	struct all_info *all = dev_get_drvdata(&op->dev);
50312ce9 DM	585
	586	unregister_framebuffer(&all->info);
	587	fb_dealloc_cmap(&all->info.cmap);
	588
e3a411a3	589	cg14_unmap_regs(op, all);
50312ce9 DM	590
	591	kfree(all);
	592
e3a411a3	593	dev_set_drvdata(&op->dev, NULL);
1da177e4 LT	594
	595	return 0;
	596	}
	597
50312ce9 DM	598	static struct of_device_id cg14_match[] = {
	599	{
	600	.name = "cgfourteen",
	601	},
	602	{},
	603	};
	604	MODULE_DEVICE_TABLE(of, cg14_match);
1da177e4	605
50312ce9 DM	606	static struct of_platform_driver cg14_driver = {
	607	.name = "cg14",
	608	.match_table = cg14_match,
	609	.probe = cg14_probe,
	610	.remove = __devexit_p(cg14_remove),
	611	};
1da177e4	612
50312ce9 DM	613	int __init cg14_init(void)
	614	{
	615	if (fb_get_options("cg14fb", NULL))
	616	return -ENODEV;
	617
	618	return of_register_driver(&cg14_driver, &of_bus_type);
1da177e4 LT	619	}
1da177e4 LT	620
50312ce9	621	void __exit cg14_exit(void)
1da177e4	622	{
50312ce9	623	of_unregister_driver(&cg14_driver);
1da177e4 LT	624	}
	625
	626	module_init(cg14_init);
1da177e4	627	module_exit(cg14_exit);
1da177e4 LT	628
1da177e4 LT	629	MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
50312ce9 DM	630	MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
50312ce9 DM	631	MODULE_VERSION("2.0");
1da177e4	632	MODULE_LICENSE("GPL");