[net-next-2.6.git] / drivers / uwb / whc-rc.c

/*
 * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
 * Radio Control command/event transport to the UWB stack
 *
 * Copyright (C) 2005-2006 Intel Corporation
 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version
 * 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 * 02110-1301, USA.
 *
 *
 * Initialize and hook up the Radio Control interface.
 *
 * For each device probed, creates an 'struct whcrc' which contains
 * just the representation of the UWB Radio Controller, and the logic
 * for reading notifications and passing them to the UWB Core.
 *
 * So we initialize all of those, register the UWB Radio Controller
 * and setup the notification/event handle to pipe the notifications
 * to the UWB management Daemon.
 *
 * Once uwb_rc_add() is called, the UWB stack takes control, resets
 * the radio and readies the device to take commands the UWB
 * API/user-space.
 *
 * Note this driver is just a transport driver; the commands are
 * formed at the UWB stack and given to this driver who will deliver
 * them to the hw and transfer the replies/notifications back to the
 * UWB stack through the UWB daemon (UWBD).
 */
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/uwb.h>
#include <linux/uwb/whci.h>
#include <linux/uwb/umc.h>

#include "uwb-internal.h"

/**
 * Descriptor for an instance of the UWB Radio Control Driver that
 * attaches to the URC interface of the WHCI PCI card.
 *
 * Unless there is a lock specific to the 'data members', all access
 * is protected by uwb_rc->mutex.
 */
struct whcrc {
	struct umc_dev *umc_dev;
	struct uwb_rc *uwb_rc;		/* UWB host controller */

	unsigned long area;
	void __iomem *rc_base;
	size_t rc_len;
	spinlock_t irq_lock;

	void *evt_buf, *cmd_buf;
	dma_addr_t evt_dma_buf, cmd_dma_buf;
	wait_queue_head_t cmd_wq;
	struct work_struct event_work;
};

/**
 * Execute an UWB RC command on WHCI/RC
 *
 * @rc:       Instance of a Radio Controller that is a whcrc
 * @cmd:      Buffer containing the RCCB and payload to execute
 * @cmd_size: Size of the command buffer.
 *
 * We copy the command into whcrc->cmd_buf (as it is pretty and
 * aligned`and physically contiguous) and then press the right keys in
 * the controller's URCCMD register to get it to read it. We might
 * have to wait for the cmd_sem to be open to us.
 *
 * NOTE: rc's mutex has to be locked
 */
static int whcrc_cmd(struct uwb_rc *uwb_rc,
	      const struct uwb_rccb *cmd, size_t cmd_size)
{
	int result = 0;
	struct whcrc *whcrc = uwb_rc->priv;
	struct device *dev = &whcrc->umc_dev->dev;
	u32 urccmd;

	if (cmd_size >= 4096)
		return -EINVAL;

	/*
	 * If the URC is halted, then the hardware has reset itself.
	 * Attempt to recover by restarting the device and then return
	 * an error as it's likely that the current command isn't
	 * valid for a newly started RC.
	 */
	if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
		dev_err(dev, "requesting reset of halted radio controller\n");
		uwb_rc_reset_all(uwb_rc);
		return -EIO;
	}

	result = wait_event_timeout(whcrc->cmd_wq,
		!(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
	if (result == 0) {
		dev_err(dev, "device is not ready to execute commands\n");
		return -ETIMEDOUT;
	}

	memmove(whcrc->cmd_buf, cmd, cmd_size);
	le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);

	spin_lock(&whcrc->irq_lock);
	urccmd = le_readl(whcrc->rc_base + URCCMD);
	urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK);
	le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size,
		  whcrc->rc_base + URCCMD);
	spin_unlock(&whcrc->irq_lock);

	return 0;
}

static int whcrc_reset(struct uwb_rc *rc)
{
	struct whcrc *whcrc = rc->priv;

	return umc_controller_reset(whcrc->umc_dev);
}

/**
 * Reset event reception mechanism and tell hw we are ready to get more
 *
 * We have read all the events in the event buffer, so we are ready to
 * reset it to the beginning.
 *
 * This is only called during initialization or after an event buffer
 * has been retired.  This means we can be sure that event processing
 * is disabled and it's safe to update the URCEVTADDR register.
 *
 * There's no need to wait for the event processing to start as the
 * URC will not clear URCCMD_ACTIVE until (internal) event buffer
 * space is available.
 */
static
void whcrc_enable_events(struct whcrc *whcrc)
{
	u32 urccmd;

	le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);

	spin_lock(&whcrc->irq_lock);
	urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
	le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD);
	spin_unlock(&whcrc->irq_lock);
}

static void whcrc_event_work(struct work_struct *work)
{
	struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
	size_t size;
	u64 urcevtaddr;

	urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
	size = urcevtaddr & URCEVTADDR_OFFSET_MASK;

	uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
	whcrc_enable_events(whcrc);
}

/**
 * Catch interrupts?
 *
 * We ack inmediately (and expect the hw to do the right thing and
 * raise another IRQ if things have changed :)
 */
static
irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
{
	struct whcrc *whcrc = _whcrc;
	struct device *dev = &whcrc->umc_dev->dev;
	u32 urcsts;

	urcsts = le_readl(whcrc->rc_base + URCSTS);
	if (!(urcsts & URCSTS_INT_MASK))
		return IRQ_NONE;
	le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);

	if (urcsts & URCSTS_HSE) {
		dev_err(dev, "host system error -- hardware halted\n");
		/* FIXME: do something sensible here */
		goto out;
	}
	if (urcsts & URCSTS_ER)
		schedule_work(&whcrc->event_work);
	if (urcsts & URCSTS_RCI)
		wake_up_all(&whcrc->cmd_wq);
out:
	return IRQ_HANDLED;
}


/**
 * Initialize a UMC RC interface: map regions, get (shared) IRQ
 */
static
int whcrc_setup_rc_umc(struct whcrc *whcrc)
{
	int result = 0;
	struct device *dev = &whcrc->umc_dev->dev;
	struct umc_dev *umc_dev = whcrc->umc_dev;

	whcrc->area = umc_dev->resource.start;
	whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
	result = -EBUSY;
	if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) == NULL) {
		dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
			whcrc->rc_len, whcrc->area, result);
		goto error_request_region;
	}

	whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
	if (whcrc->rc_base == NULL) {
		dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
			whcrc->rc_len, whcrc->area, result);
		goto error_ioremap_nocache;
	}

	result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
			     KBUILD_MODNAME, whcrc);
	if (result < 0) {
		dev_err(dev, "can't allocate IRQ %d: %d\n",
			umc_dev->irq, result);
		goto error_request_irq;
	}

	result = -ENOMEM;
	whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
					    &whcrc->cmd_dma_buf, GFP_KERNEL);
	if (whcrc->cmd_buf == NULL) {
		dev_err(dev, "Can't allocate cmd transfer buffer\n");
		goto error_cmd_buffer;
	}

	whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
					    &whcrc->evt_dma_buf, GFP_KERNEL);
	if (whcrc->evt_buf == NULL) {
		dev_err(dev, "Can't allocate evt transfer buffer\n");
		goto error_evt_buffer;
	}
	return 0;

error_evt_buffer:
	dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
			  whcrc->cmd_dma_buf);
error_cmd_buffer:
	free_irq(umc_dev->irq, whcrc);
error_request_irq:
	iounmap(whcrc->rc_base);
error_ioremap_nocache:
	release_mem_region(whcrc->area, whcrc->rc_len);
error_request_region:
	return result;
}


/**
 * Release RC's UMC resources
 */
static
void whcrc_release_rc_umc(struct whcrc *whcrc)
{
	struct umc_dev *umc_dev = whcrc->umc_dev;

	dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
			  whcrc->evt_dma_buf);
	dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
			  whcrc->cmd_dma_buf);
	free_irq(umc_dev->irq, whcrc);
	iounmap(whcrc->rc_base);
	release_mem_region(whcrc->area, whcrc->rc_len);
}


/**
 * whcrc_start_rc - start a WHCI radio controller
 * @whcrc: the radio controller to start
 *
 * Reset the UMC device, start the radio controller, enable events and
 * finally enable interrupts.
 */
static int whcrc_start_rc(struct uwb_rc *rc)
{
	struct whcrc *whcrc = rc->priv;
	struct device *dev = &whcrc->umc_dev->dev;

	/* Reset the thing */
	le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
	if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
			  5000, "hardware reset") < 0)
		return -EBUSY;

	/* Set the event buffer, start the controller (enable IRQs later) */
	le_writel(0, whcrc->rc_base + URCINTR);
	le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
	if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
			  5000, "radio controller start") < 0)
		return -ETIMEDOUT;
	whcrc_enable_events(whcrc);
	le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
	return 0;
}


/**
 * whcrc_stop_rc - stop a WHCI radio controller
 * @whcrc: the radio controller to stop
 *
 * Disable interrupts and cancel any pending event processing work
 * before clearing the Run/Stop bit.
 */
static
void whcrc_stop_rc(struct uwb_rc *rc)
{
	struct whcrc *whcrc = rc->priv;
	struct umc_dev *umc_dev = whcrc->umc_dev;

	le_writel(0, whcrc->rc_base + URCINTR);
	cancel_work_sync(&whcrc->event_work);

	le_writel(0, whcrc->rc_base + URCCMD);
	whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
		      URCSTS_HALTED, URCSTS_HALTED, 100, "radio controller stop");
}

static void whcrc_init(struct whcrc *whcrc)
{
	spin_lock_init(&whcrc->irq_lock);
	init_waitqueue_head(&whcrc->cmd_wq);
	INIT_WORK(&whcrc->event_work, whcrc_event_work);
}

/**
 * Initialize the radio controller.
 *
 * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
 *       IRQ handler we use that to determine if the hw is ready to
 *       handle events. Looks like a race condition, but it really is
 *       not.
 */
static
int whcrc_probe(struct umc_dev *umc_dev)
{
	int result;
	struct uwb_rc *uwb_rc;
	struct whcrc *whcrc;
	struct device *dev = &umc_dev->dev;

	result = -ENOMEM;
	uwb_rc = uwb_rc_alloc();
	if (uwb_rc == NULL) {
		dev_err(dev, "unable to allocate RC instance\n");
		goto error_rc_alloc;
	}
	whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
	if (whcrc == NULL) {
		dev_err(dev, "unable to allocate WHC-RC instance\n");
		goto error_alloc;
	}
	whcrc_init(whcrc);
	whcrc->umc_dev = umc_dev;

	result = whcrc_setup_rc_umc(whcrc);
	if (result < 0) {
		dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
		goto error_setup_rc_umc;
	}
	whcrc->uwb_rc = uwb_rc;

	uwb_rc->owner = THIS_MODULE;
	uwb_rc->cmd   = whcrc_cmd;
	uwb_rc->reset = whcrc_reset;
	uwb_rc->start = whcrc_start_rc;
	uwb_rc->stop  = whcrc_stop_rc;

	result = uwb_rc_add(uwb_rc, dev, whcrc);
	if (result < 0)
		goto error_rc_add;
	umc_set_drvdata(umc_dev, whcrc);
	return 0;

error_rc_add:
	whcrc_release_rc_umc(whcrc);
error_setup_rc_umc:
	kfree(whcrc);
error_alloc:
	uwb_rc_put(uwb_rc);
error_rc_alloc:
	return result;
}

/**
 * Clean up the radio control resources
 *
 * When we up the command semaphore, everybody possibly held trying to
 * execute a command should be granted entry and then they'll see the
 * host is quiescing and up it (so it will chain to the next waiter).
 * This should not happen (in any case), as we can only remove when
 * there are no handles open...
 */
static void whcrc_remove(struct umc_dev *umc_dev)
{
	struct whcrc *whcrc = umc_get_drvdata(umc_dev);
	struct uwb_rc *uwb_rc = whcrc->uwb_rc;

	umc_set_drvdata(umc_dev, NULL);
	uwb_rc_rm(uwb_rc);
	whcrc_release_rc_umc(whcrc);
	kfree(whcrc);
	uwb_rc_put(uwb_rc);
}

static int whcrc_pre_reset(struct umc_dev *umc)
{
	struct whcrc *whcrc = umc_get_drvdata(umc);
	struct uwb_rc *uwb_rc = whcrc->uwb_rc;

	uwb_rc_pre_reset(uwb_rc);
	return 0;
}

static int whcrc_post_reset(struct umc_dev *umc)
{
	struct whcrc *whcrc = umc_get_drvdata(umc);
	struct uwb_rc *uwb_rc = whcrc->uwb_rc;

	return uwb_rc_post_reset(uwb_rc);
}

/* PCI device ID's that we handle [so it gets loaded] */
static struct pci_device_id whcrc_id_table[] = {
	{ PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
	{ /* empty last entry */ }
};
MODULE_DEVICE_TABLE(pci, whcrc_id_table);

static struct umc_driver whcrc_driver = {
	.name       = "whc-rc",
	.cap_id     = UMC_CAP_ID_WHCI_RC,
	.probe      = whcrc_probe,
	.remove     = whcrc_remove,
	.pre_reset  = whcrc_pre_reset,
	.post_reset = whcrc_post_reset,
};

static int __init whcrc_driver_init(void)
{
	return umc_driver_register(&whcrc_driver);
}
module_init(whcrc_driver_init);

static void __exit whcrc_driver_exit(void)
{
	umc_driver_unregister(&whcrc_driver);
}
module_exit(whcrc_driver_exit);

MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>");
MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
b6e06983 IPG	1	/*
	2	* Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
	3	* Radio Control command/event transport to the UWB stack
	4	*
	5	* Copyright (C) 2005-2006 Intel Corporation
	6	* Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License version
	10	* 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
	20	* 02110-1301, USA.
	21	*
	22	*
	23	* Initialize and hook up the Radio Control interface.
	24	*
	25	* For each device probed, creates an 'struct whcrc' which contains
	26	* just the representation of the UWB Radio Controller, and the logic
	27	* for reading notifications and passing them to the UWB Core.
	28	*
	29	* So we initialize all of those, register the UWB Radio Controller
	30	* and setup the notification/event handle to pipe the notifications
	31	* to the UWB management Daemon.
	32	*
	33	* Once uwb_rc_add() is called, the UWB stack takes control, resets
	34	* the radio and readies the device to take commands the UWB
	35	* API/user-space.
	36	*
	37	* Note this driver is just a transport driver; the commands are
	38	* formed at the UWB stack and given to this driver who will deliver
	39	* them to the hw and transfer the replies/notifications back to the
	40	* UWB stack through the UWB daemon (UWBD).
	41	*/
b6e06983 IPG	42	#include <linux/init.h>
	43	#include <linux/module.h>
	44	#include <linux/pci.h>
d43c36dc	45	#include <linux/sched.h>
b6e06983 IPG	46	#include <linux/dma-mapping.h>
	47	#include <linux/interrupt.h>
	48	#include <linux/workqueue.h>
	49	#include <linux/uwb.h>
	50	#include <linux/uwb/whci.h>
	51	#include <linux/uwb/umc.h>
b6e06983	52
bce83697	53	#include "uwb-internal.h"
b6e06983 IPG	54
	55	/**
	56	* Descriptor for an instance of the UWB Radio Control Driver that
	57	* attaches to the URC interface of the WHCI PCI card.
	58	*
	59	* Unless there is a lock specific to the 'data members', all access
	60	* is protected by uwb_rc->mutex.
	61	*/
	62	struct whcrc {
	63	struct umc_dev *umc_dev;
	64	struct uwb_rc uwb_rc; / UWB host controller */
	65
	66	unsigned long area;
	67	void __iomem *rc_base;
	68	size_t rc_len;
	69	spinlock_t irq_lock;
	70
	71	void evt_buf, cmd_buf;
	72	dma_addr_t evt_dma_buf, cmd_dma_buf;
	73	wait_queue_head_t cmd_wq;
	74	struct work_struct event_work;
	75	};
	76
	77	/**
	78	* Execute an UWB RC command on WHCI/RC
	79	*
	80	* @rc: Instance of a Radio Controller that is a whcrc
	81	* @cmd: Buffer containing the RCCB and payload to execute
	82	* @cmd_size: Size of the command buffer.
	83	*
	84	* We copy the command into whcrc->cmd_buf (as it is pretty and
	85	* aligned`and physically contiguous) and then press the right keys in
	86	* the controller's URCCMD register to get it to read it. We might
	87	* have to wait for the cmd_sem to be open to us.
	88	*
	89	* NOTE: rc's mutex has to be locked
	90	*/
	91	static int whcrc_cmd(struct uwb_rc *uwb_rc,
	92	const struct uwb_rccb *cmd, size_t cmd_size)
	93	{
	94	int result = 0;
	95	struct whcrc *whcrc = uwb_rc->priv;
	96	struct device *dev = &whcrc->umc_dev->dev;
	97	u32 urccmd;
	98
bce83697 DV	99	if (cmd_size >= 4096)
bce83697 DV	100	return -EINVAL;
b6e06983 IPG	101
	102	/*
	103	* If the URC is halted, then the hardware has reset itself.
	104	* Attempt to recover by restarting the device and then return
	105	* an error as it's likely that the current command isn't
	106	* valid for a newly started RC.
	107	*/
	108	if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
	109	dev_err(dev, "requesting reset of halted radio controller\n");
	110	uwb_rc_reset_all(uwb_rc);
bce83697	111	return -EIO;
b6e06983 IPG	112	}
	113
	114	result = wait_event_timeout(whcrc->cmd_wq,
	115	!(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
	116	if (result == 0) {
	117	dev_err(dev, "device is not ready to execute commands\n");
bce83697	118	return -ETIMEDOUT;
b6e06983 IPG	119	}
	120
	121	memmove(whcrc->cmd_buf, cmd, cmd_size);
	122	le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);
	123
	124	spin_lock(&whcrc->irq_lock);
	125	urccmd = le_readl(whcrc->rc_base + URCCMD);
	126	urccmd &= ~(URCCMD_EARV \| URCCMD_SIZE_MASK);
	127	le_writel(urccmd \| URCCMD_ACTIVE \| URCCMD_IWR \| cmd_size,
	128	whcrc->rc_base + URCCMD);
	129	spin_unlock(&whcrc->irq_lock);
	130
bce83697	131	return 0;
b6e06983 IPG	132	}
	133
	134	static int whcrc_reset(struct uwb_rc *rc)
	135	{
	136	struct whcrc *whcrc = rc->priv;
	137
	138	return umc_controller_reset(whcrc->umc_dev);
	139	}
	140
	141	/**
	142	* Reset event reception mechanism and tell hw we are ready to get more
	143	*
	144	* We have read all the events in the event buffer, so we are ready to
	145	* reset it to the beginning.
	146	*
	147	* This is only called during initialization or after an event buffer
	148	* has been retired. This means we can be sure that event processing
	149	* is disabled and it's safe to update the URCEVTADDR register.
	150	*
	151	* There's no need to wait for the event processing to start as the
	152	* URC will not clear URCCMD_ACTIVE until (internal) event buffer
	153	* space is available.
	154	*/
	155	static
	156	void whcrc_enable_events(struct whcrc *whcrc)
	157	{
b6e06983 IPG	158	u32 urccmd;
b6e06983 IPG	159
b6e06983 IPG	160	le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);
	161
	162	spin_lock(&whcrc->irq_lock);
	163	urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
	164	le_writel(urccmd \| URCCMD_EARV, whcrc->rc_base + URCCMD);
	165	spin_unlock(&whcrc->irq_lock);
b6e06983 IPG	166	}
	167
	168	static void whcrc_event_work(struct work_struct *work)
	169	{
	170	struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
b6e06983 IPG	171	size_t size;
	172	u64 urcevtaddr;
	173
	174	urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
	175	size = urcevtaddr & URCEVTADDR_OFFSET_MASK;
	176
b6e06983 IPG	177	uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
	178	whcrc_enable_events(whcrc);
	179	}
	180
	181	/**
	182	* Catch interrupts?
	183	*
	184	* We ack inmediately (and expect the hw to do the right thing and
	185	* raise another IRQ if things have changed :)
	186	*/
	187	static
	188	irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
	189	{
	190	struct whcrc *whcrc = _whcrc;
	191	struct device *dev = &whcrc->umc_dev->dev;
	192	u32 urcsts;
	193
b6e06983 IPG	194	urcsts = le_readl(whcrc->rc_base + URCSTS);
	195	if (!(urcsts & URCSTS_INT_MASK))
	196	return IRQ_NONE;
	197	le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);
	198
b6e06983 IPG	199	if (urcsts & URCSTS_HSE) {
	200	dev_err(dev, "host system error -- hardware halted\n");
	201	/* FIXME: do something sensible here */
	202	goto out;
	203	}
bce83697	204	if (urcsts & URCSTS_ER)
b6e06983	205	schedule_work(&whcrc->event_work);
bce83697	206	if (urcsts & URCSTS_RCI)
b6e06983	207	wake_up_all(&whcrc->cmd_wq);
b6e06983 IPG	208	out:
	209	return IRQ_HANDLED;
	210	}
	211
	212
	213	/**
	214	* Initialize a UMC RC interface: map regions, get (shared) IRQ
	215	*/
	216	static
	217	int whcrc_setup_rc_umc(struct whcrc *whcrc)
	218	{
	219	int result = 0;
	220	struct device *dev = &whcrc->umc_dev->dev;
	221	struct umc_dev *umc_dev = whcrc->umc_dev;
	222
	223	whcrc->area = umc_dev->resource.start;
	224	whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
	225	result = -EBUSY;
bce83697	226	if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) == NULL) {
b6e06983 IPG	227	dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
	228	whcrc->rc_len, whcrc->area, result);
	229	goto error_request_region;
	230	}
	231
	232	whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
	233	if (whcrc->rc_base == NULL) {
	234	dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
	235	whcrc->rc_len, whcrc->area, result);
	236	goto error_ioremap_nocache;
	237	}
	238
	239	result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
	240	KBUILD_MODNAME, whcrc);
	241	if (result < 0) {
	242	dev_err(dev, "can't allocate IRQ %d: %d\n",
	243	umc_dev->irq, result);
	244	goto error_request_irq;
	245	}
	246
	247	result = -ENOMEM;
	248	whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
	249	&whcrc->cmd_dma_buf, GFP_KERNEL);
	250	if (whcrc->cmd_buf == NULL) {
	251	dev_err(dev, "Can't allocate cmd transfer buffer\n");
	252	goto error_cmd_buffer;
	253	}
	254
	255	whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
	256	&whcrc->evt_dma_buf, GFP_KERNEL);
	257	if (whcrc->evt_buf == NULL) {
	258	dev_err(dev, "Can't allocate evt transfer buffer\n");
	259	goto error_evt_buffer;
	260	}
b6e06983 IPG	261	return 0;
	262
	263	error_evt_buffer:
	264	dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
	265	whcrc->cmd_dma_buf);
	266	error_cmd_buffer:
	267	free_irq(umc_dev->irq, whcrc);
	268	error_request_irq:
	269	iounmap(whcrc->rc_base);
	270	error_ioremap_nocache:
	271	release_mem_region(whcrc->area, whcrc->rc_len);
	272	error_request_region:
	273	return result;
	274	}
	275
	276
	277	/**
	278	* Release RC's UMC resources
	279	*/
	280	static
	281	void whcrc_release_rc_umc(struct whcrc *whcrc)
	282	{
	283	struct umc_dev *umc_dev = whcrc->umc_dev;
	284
	285	dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
	286	whcrc->evt_dma_buf);
	287	dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
	288	whcrc->cmd_dma_buf);
	289	free_irq(umc_dev->irq, whcrc);
	290	iounmap(whcrc->rc_base);
	291	release_mem_region(whcrc->area, whcrc->rc_len);
	292	}
	293
	294
	295	/**
	296	* whcrc_start_rc - start a WHCI radio controller
	297	* @whcrc: the radio controller to start
	298	*
	299	* Reset the UMC device, start the radio controller, enable events and
	300	* finally enable interrupts.
	301	*/
	302	static int whcrc_start_rc(struct uwb_rc *rc)
	303	{
	304	struct whcrc *whcrc = rc->priv;
b6e06983	305	struct device *dev = &whcrc->umc_dev->dev;
b6e06983 IPG	306
	307	/* Reset the thing */
	308	le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
b6e06983	309	if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
5a4e1a79 DV	310	5000, "hardware reset") < 0)
5a4e1a79 DV	311	return -EBUSY;
b6e06983 IPG	312
	313	/* Set the event buffer, start the controller (enable IRQs later) */
	314	le_writel(0, whcrc->rc_base + URCINTR);
	315	le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
b6e06983	316	if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
5a4e1a79 DV	317	5000, "radio controller start") < 0)
5a4e1a79 DV	318	return -ETIMEDOUT;
b6e06983	319	whcrc_enable_events(whcrc);
b6e06983	320	le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
5a4e1a79	321	return 0;
b6e06983 IPG	322	}
	323
	324
	325	/**
	326	* whcrc_stop_rc - stop a WHCI radio controller
	327	* @whcrc: the radio controller to stop
	328	*
	329	* Disable interrupts and cancel any pending event processing work
	330	* before clearing the Run/Stop bit.
	331	*/
	332	static
	333	void whcrc_stop_rc(struct uwb_rc *rc)
	334	{
	335	struct whcrc *whcrc = rc->priv;
	336	struct umc_dev *umc_dev = whcrc->umc_dev;
	337
	338	le_writel(0, whcrc->rc_base + URCINTR);
	339	cancel_work_sync(&whcrc->event_work);
	340
	341	le_writel(0, whcrc->rc_base + URCCMD);
	342	whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
5a4e1a79	343	URCSTS_HALTED, URCSTS_HALTED, 100, "radio controller stop");
b6e06983 IPG	344	}
	345
	346	static void whcrc_init(struct whcrc *whcrc)
	347	{
	348	spin_lock_init(&whcrc->irq_lock);
	349	init_waitqueue_head(&whcrc->cmd_wq);
	350	INIT_WORK(&whcrc->event_work, whcrc_event_work);
	351	}
	352
	353	/**
	354	* Initialize the radio controller.
	355	*
	356	* NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
	357	* IRQ handler we use that to determine if the hw is ready to
	358	* handle events. Looks like a race condition, but it really is
	359	* not.
	360	*/
	361	static
	362	int whcrc_probe(struct umc_dev *umc_dev)
	363	{
	364	int result;
	365	struct uwb_rc *uwb_rc;
	366	struct whcrc *whcrc;
	367	struct device *dev = &umc_dev->dev;
	368
b6e06983 IPG	369	result = -ENOMEM;
	370	uwb_rc = uwb_rc_alloc();
	371	if (uwb_rc == NULL) {
	372	dev_err(dev, "unable to allocate RC instance\n");
	373	goto error_rc_alloc;
	374	}
	375	whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
	376	if (whcrc == NULL) {
	377	dev_err(dev, "unable to allocate WHC-RC instance\n");
	378	goto error_alloc;
	379	}
	380	whcrc_init(whcrc);
	381	whcrc->umc_dev = umc_dev;
	382
	383	result = whcrc_setup_rc_umc(whcrc);
	384	if (result < 0) {
	385	dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
	386	goto error_setup_rc_umc;
	387	}
	388	whcrc->uwb_rc = uwb_rc;
	389
	390	uwb_rc->owner = THIS_MODULE;
	391	uwb_rc->cmd = whcrc_cmd;
	392	uwb_rc->reset = whcrc_reset;
	393	uwb_rc->start = whcrc_start_rc;
	394	uwb_rc->stop = whcrc_stop_rc;
	395
	396	result = uwb_rc_add(uwb_rc, dev, whcrc);
	397	if (result < 0)
	398	goto error_rc_add;
	399	umc_set_drvdata(umc_dev, whcrc);
b6e06983 IPG	400	return 0;
	401
	402	error_rc_add:
	403	whcrc_release_rc_umc(whcrc);
	404	error_setup_rc_umc:
	405	kfree(whcrc);
	406	error_alloc:
	407	uwb_rc_put(uwb_rc);
	408	error_rc_alloc:
b6e06983 IPG	409	return result;
	410	}
	411
	412	/**
	413	* Clean up the radio control resources
	414	*
	415	* When we up the command semaphore, everybody possibly held trying to
	416	* execute a command should be granted entry and then they'll see the
	417	* host is quiescing and up it (so it will chain to the next waiter).
	418	* This should not happen (in any case), as we can only remove when
	419	* there are no handles open...
	420	*/
	421	static void whcrc_remove(struct umc_dev *umc_dev)
	422	{
	423	struct whcrc *whcrc = umc_get_drvdata(umc_dev);
	424	struct uwb_rc *uwb_rc = whcrc->uwb_rc;
	425
	426	umc_set_drvdata(umc_dev, NULL);
	427	uwb_rc_rm(uwb_rc);
	428	whcrc_release_rc_umc(whcrc);
	429	kfree(whcrc);
	430	uwb_rc_put(uwb_rc);
b6e06983 IPG	431	}
b6e06983 IPG	432
307ba6dd DV	433	static int whcrc_pre_reset(struct umc_dev *umc)
	434	{
	435	struct whcrc *whcrc = umc_get_drvdata(umc);
	436	struct uwb_rc *uwb_rc = whcrc->uwb_rc;
	437
	438	uwb_rc_pre_reset(uwb_rc);
	439	return 0;
	440	}
	441
	442	static int whcrc_post_reset(struct umc_dev *umc)
	443	{
	444	struct whcrc *whcrc = umc_get_drvdata(umc);
	445	struct uwb_rc *uwb_rc = whcrc->uwb_rc;
	446
0396c215	447	return uwb_rc_post_reset(uwb_rc);
307ba6dd DV	448	}
307ba6dd DV	449
b6e06983 IPG	450	/* PCI device ID's that we handle [so it gets loaded] */
	451	static struct pci_device_id whcrc_id_table[] = {
	452	{ PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
	453	{ /* empty last entry */ }
	454	};
	455	MODULE_DEVICE_TABLE(pci, whcrc_id_table);
	456
	457	static struct umc_driver whcrc_driver = {
307ba6dd DV	458	.name = "whc-rc",
	459	.cap_id = UMC_CAP_ID_WHCI_RC,
	460	.probe = whcrc_probe,
	461	.remove = whcrc_remove,
	462	.pre_reset = whcrc_pre_reset,
	463	.post_reset = whcrc_post_reset,
b6e06983 IPG	464	};
	465
	466	static int __init whcrc_driver_init(void)
	467	{
	468	return umc_driver_register(&whcrc_driver);
	469	}
	470	module_init(whcrc_driver_init);
	471
	472	static void __exit whcrc_driver_exit(void)
	473	{
	474	umc_driver_unregister(&whcrc_driver);
	475	}
	476	module_exit(whcrc_driver_exit);
	477
	478	MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>");
	479	MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
	480	MODULE_LICENSE("GPL");