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1/*
2 * MUSB OTG driver defines
3 *
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35#ifndef __MUSB_CORE_H__
36#define __MUSB_CORE_H__
37
38#include <linux/slab.h>
39#include <linux/list.h>
40#include <linux/interrupt.h>
550a7375 41#include <linux/errno.h>
f7f9d63e 42#include <linux/timer.h>
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43#include <linux/clk.h>
44#include <linux/device.h>
45#include <linux/usb/ch9.h>
46#include <linux/usb/gadget.h>
47#include <linux/usb.h>
48#include <linux/usb/otg.h>
49#include <linux/usb/musb.h>
50
51struct musb;
52struct musb_hw_ep;
53struct musb_ep;
54
55
56#include "musb_debug.h"
57#include "musb_dma.h"
58
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59#include "musb_io.h"
60#include "musb_regs.h"
61
62#include "musb_gadget.h"
63#include "../core/hcd.h"
64#include "musb_host.h"
65
66
67
68#ifdef CONFIG_USB_MUSB_OTG
69
70#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
71#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
72#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
73
74/* NOTE: otg and peripheral-only state machines start at B_IDLE.
75 * OTG or host-only go to A_IDLE when ID is sensed.
76 */
77#define is_peripheral_active(m) (!(m)->is_host)
78#define is_host_active(m) ((m)->is_host)
79
80#else
81#define is_peripheral_enabled(musb) is_peripheral_capable()
82#define is_host_enabled(musb) is_host_capable()
83#define is_otg_enabled(musb) 0
84
85#define is_peripheral_active(musb) is_peripheral_capable()
86#define is_host_active(musb) is_host_capable()
87#endif
88
89#if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
90/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
91 * override that choice selection (often USB_GADGET_DUMMY_HCD).
92 */
93#ifndef CONFIG_USB_GADGET_MUSB_HDRC
94#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
95#endif
96#endif /* need MUSB gadget selection */
97
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98#ifndef CONFIG_HAVE_CLK
99/* Dummy stub for clk framework */
100#define clk_get(dev, id) NULL
101#define clk_put(clock) do {} while (0)
102#define clk_enable(clock) do {} while (0)
103#define clk_disable(clock) do {} while (0)
104#endif
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105
106#ifdef CONFIG_PROC_FS
107#include <linux/fs.h>
108#define MUSB_CONFIG_PROC_FS
109#endif
110
111/****************************** PERIPHERAL ROLE *****************************/
112
113#ifdef CONFIG_USB_GADGET_MUSB_HDRC
114
115#define is_peripheral_capable() (1)
116
117extern irqreturn_t musb_g_ep0_irq(struct musb *);
118extern void musb_g_tx(struct musb *, u8);
119extern void musb_g_rx(struct musb *, u8);
120extern void musb_g_reset(struct musb *);
121extern void musb_g_suspend(struct musb *);
122extern void musb_g_resume(struct musb *);
123extern void musb_g_wakeup(struct musb *);
124extern void musb_g_disconnect(struct musb *);
125
126#else
127
128#define is_peripheral_capable() (0)
129
130static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
131static inline void musb_g_reset(struct musb *m) {}
132static inline void musb_g_suspend(struct musb *m) {}
133static inline void musb_g_resume(struct musb *m) {}
134static inline void musb_g_wakeup(struct musb *m) {}
135static inline void musb_g_disconnect(struct musb *m) {}
136
137#endif
138
139/****************************** HOST ROLE ***********************************/
140
141#ifdef CONFIG_USB_MUSB_HDRC_HCD
142
143#define is_host_capable() (1)
144
145extern irqreturn_t musb_h_ep0_irq(struct musb *);
146extern void musb_host_tx(struct musb *, u8);
147extern void musb_host_rx(struct musb *, u8);
148
149#else
150
151#define is_host_capable() (0)
152
153static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
154static inline void musb_host_tx(struct musb *m, u8 e) {}
155static inline void musb_host_rx(struct musb *m, u8 e) {}
156
157#endif
158
159
160/****************************** CONSTANTS ********************************/
161
162#ifndef MUSB_C_NUM_EPS
163#define MUSB_C_NUM_EPS ((u8)16)
164#endif
165
166#ifndef MUSB_MAX_END0_PACKET
167#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
168#endif
169
170/* host side ep0 states */
171enum musb_h_ep0_state {
172 MUSB_EP0_IDLE,
173 MUSB_EP0_START, /* expect ack of setup */
174 MUSB_EP0_IN, /* expect IN DATA */
175 MUSB_EP0_OUT, /* expect ack of OUT DATA */
176 MUSB_EP0_STATUS, /* expect ack of STATUS */
177} __attribute__ ((packed));
178
179/* peripheral side ep0 states */
180enum musb_g_ep0_state {
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181 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
182 MUSB_EP0_STAGE_SETUP, /* received SETUP */
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183 MUSB_EP0_STAGE_TX, /* IN data */
184 MUSB_EP0_STAGE_RX, /* OUT data */
185 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
186 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
187 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
188} __attribute__ ((packed));
189
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190/*
191 * OTG protocol constants. See USB OTG 1.3 spec,
192 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
193 */
550a7375 194#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
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195#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
196#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
197#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
198
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199
200/*************************** REGISTER ACCESS ********************************/
201
202/* Endpoint registers (other than dynfifo setup) can be accessed either
203 * directly with the "flat" model, or after setting up an index register.
204 */
205
206#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
c6cf8b00 207 || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN)
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208/* REVISIT indexed access seemed to
209 * misbehave (on DaVinci) for at least peripheral IN ...
210 */
211#define MUSB_FLAT_REG
212#endif
213
214/* TUSB mapping: "flat" plus ep0 special cases */
215#if defined(CONFIG_USB_TUSB6010)
216#define musb_ep_select(_mbase, _epnum) \
217 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
218#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
219
220/* "flat" mapping: each endpoint has its own i/o address */
221#elif defined(MUSB_FLAT_REG)
222#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
223#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
224
225/* "indexed" mapping: INDEX register controls register bank select */
226#else
227#define musb_ep_select(_mbase, _epnum) \
228 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
229#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
230#endif
231
232/****************************** FUNCTIONS ********************************/
233
234#define MUSB_HST_MODE(_musb)\
235 { (_musb)->is_host = true; }
236#define MUSB_DEV_MODE(_musb) \
237 { (_musb)->is_host = false; }
238
239#define test_devctl_hst_mode(_x) \
240 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
241
242#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
243
244/******************************** TYPES *************************************/
245
246/*
247 * struct musb_hw_ep - endpoint hardware (bidirectional)
248 *
249 * Ordered slightly for better cacheline locality.
250 */
251struct musb_hw_ep {
252 struct musb *musb;
253 void __iomem *fifo;
254 void __iomem *regs;
255
256#ifdef CONFIG_USB_TUSB6010
257 void __iomem *conf;
258#endif
259
260 /* index in musb->endpoints[] */
261 u8 epnum;
262
263 /* hardware configuration, possibly dynamic */
264 bool is_shared_fifo;
265 bool tx_double_buffered;
266 bool rx_double_buffered;
267 u16 max_packet_sz_tx;
268 u16 max_packet_sz_rx;
269
270 struct dma_channel *tx_channel;
271 struct dma_channel *rx_channel;
272
273#ifdef CONFIG_USB_TUSB6010
274 /* TUSB has "asynchronous" and "synchronous" dma modes */
275 dma_addr_t fifo_async;
276 dma_addr_t fifo_sync;
277 void __iomem *fifo_sync_va;
278#endif
279
280#ifdef CONFIG_USB_MUSB_HDRC_HCD
281 void __iomem *target_regs;
282
283 /* currently scheduled peripheral endpoint */
284 struct musb_qh *in_qh;
285 struct musb_qh *out_qh;
286
287 u8 rx_reinit;
288 u8 tx_reinit;
289#endif
290
291#ifdef CONFIG_USB_GADGET_MUSB_HDRC
292 /* peripheral side */
293 struct musb_ep ep_in; /* TX */
294 struct musb_ep ep_out; /* RX */
295#endif
296};
297
298static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
299{
300#ifdef CONFIG_USB_GADGET_MUSB_HDRC
301 return next_request(&hw_ep->ep_in);
302#else
303 return NULL;
304#endif
305}
306
307static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
308{
309#ifdef CONFIG_USB_GADGET_MUSB_HDRC
310 return next_request(&hw_ep->ep_out);
311#else
312 return NULL;
313#endif
314}
315
316/*
317 * struct musb - Driver instance data.
318 */
319struct musb {
320 /* device lock */
321 spinlock_t lock;
322 struct clk *clock;
323 irqreturn_t (*isr)(int, void *);
324 struct work_struct irq_work;
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325#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
326#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
327#define MUSB_HWVERS_RC 0x8000
328#define MUSB_HWVERS_1300 0x52C
329#define MUSB_HWVERS_1400 0x590
330#define MUSB_HWVERS_1800 0x720
331#define MUSB_HWVERS_2000 0x800
332 u16 hwvers;
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333
334/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
335#define MUSB_PORT_STAT_RESUME (1 << 31)
336
337 u32 port1_status;
338
339#ifdef CONFIG_USB_MUSB_HDRC_HCD
340 unsigned long rh_timer;
341
342 enum musb_h_ep0_state ep0_stage;
343
344 /* bulk traffic normally dedicates endpoint hardware, and each
345 * direction has its own ring of host side endpoints.
346 * we try to progress the transfer at the head of each endpoint's
347 * queue until it completes or NAKs too much; then we try the next
348 * endpoint.
349 */
350 struct musb_hw_ep *bulk_ep;
351
352 struct list_head control; /* of musb_qh */
353 struct list_head in_bulk; /* of musb_qh */
354 struct list_head out_bulk; /* of musb_qh */
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355
356 struct timer_list otg_timer;
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357#endif
358
359 /* called with IRQs blocked; ON/nonzero implies starting a session,
360 * and waiting at least a_wait_vrise_tmout.
361 */
362 void (*board_set_vbus)(struct musb *, int is_on);
363
364 struct dma_controller *dma_controller;
365
366 struct device *controller;
367 void __iomem *ctrl_base;
368 void __iomem *mregs;
369
370#ifdef CONFIG_USB_TUSB6010
371 dma_addr_t async;
372 dma_addr_t sync;
373 void __iomem *sync_va;
374#endif
375
376 /* passed down from chip/board specific irq handlers */
377 u8 int_usb;
378 u16 int_rx;
379 u16 int_tx;
380
84e250ff 381 struct otg_transceiver *xceiv;
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382
383 int nIrq;
c48a5155 384 unsigned irq_wake:1;
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385
386 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
387#define control_ep endpoints
388
389#define VBUSERR_RETRY_COUNT 3
390 u16 vbuserr_retry;
391 u16 epmask;
392 u8 nr_endpoints;
393
394 u8 board_mode; /* enum musb_mode */
395 int (*board_set_power)(int state);
396
397 int (*set_clock)(struct clk *clk, int is_active);
398
399 u8 min_power; /* vbus for periph, in mA/2 */
400
401 bool is_host;
402
403 int a_wait_bcon; /* VBUS timeout in msecs */
404 unsigned long idle_timeout; /* Next timeout in jiffies */
405
406 /* active means connected and not suspended */
407 unsigned is_active:1;
408
409 unsigned is_multipoint:1;
410 unsigned ignore_disconnect:1; /* during bus resets */
411
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412 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
413 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
414
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415#ifdef C_MP_TX
416 unsigned bulk_split:1;
417#define can_bulk_split(musb,type) \
418 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
419#else
420#define can_bulk_split(musb, type) 0
421#endif
422
423#ifdef C_MP_RX
424 unsigned bulk_combine:1;
425#define can_bulk_combine(musb,type) \
426 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
427#else
428#define can_bulk_combine(musb, type) 0
429#endif
430
431#ifdef CONFIG_USB_GADGET_MUSB_HDRC
432 /* is_suspended means USB B_PERIPHERAL suspend */
433 unsigned is_suspended:1;
434
435 /* may_wakeup means remote wakeup is enabled */
436 unsigned may_wakeup:1;
437
438 /* is_self_powered is reported in device status and the
439 * config descriptor. is_bus_powered means B_PERIPHERAL
440 * draws some VBUS current; both can be true.
441 */
442 unsigned is_self_powered:1;
443 unsigned is_bus_powered:1;
444
445 unsigned set_address:1;
446 unsigned test_mode:1;
447 unsigned softconnect:1;
448
449 u8 address;
450 u8 test_mode_nr;
451 u16 ackpend; /* ep0 */
452 enum musb_g_ep0_state ep0_state;
453 struct usb_gadget g; /* the gadget */
454 struct usb_gadget_driver *gadget_driver; /* its driver */
455#endif
456
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457 struct musb_hdrc_config *config;
458
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459#ifdef MUSB_CONFIG_PROC_FS
460 struct proc_dir_entry *proc_entry;
461#endif
462};
463
464static inline void musb_set_vbus(struct musb *musb, int is_on)
465{
466 musb->board_set_vbus(musb, is_on);
467}
468
469#ifdef CONFIG_USB_GADGET_MUSB_HDRC
470static inline struct musb *gadget_to_musb(struct usb_gadget *g)
471{
472 return container_of(g, struct musb, g);
473}
474#endif
475
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476#ifdef CONFIG_BLACKFIN
477static inline int musb_read_fifosize(struct musb *musb,
478 struct musb_hw_ep *hw_ep, u8 epnum)
479{
480 musb->nr_endpoints++;
481 musb->epmask |= (1 << epnum);
482
483 if (epnum < 5) {
484 hw_ep->max_packet_sz_tx = 128;
485 hw_ep->max_packet_sz_rx = 128;
486 } else {
487 hw_ep->max_packet_sz_tx = 1024;
488 hw_ep->max_packet_sz_rx = 1024;
489 }
490 hw_ep->is_shared_fifo = false;
491
492 return 0;
493}
494
495static inline void musb_configure_ep0(struct musb *musb)
496{
497 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
498 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
499 musb->endpoints[0].is_shared_fifo = true;
500}
501
502#else
503
504static inline int musb_read_fifosize(struct musb *musb,
505 struct musb_hw_ep *hw_ep, u8 epnum)
506{
32233716 507 void *mbase = musb->mregs;
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508 u8 reg = 0;
509
510 /* read from core using indexed model */
32233716 511 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
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512 /* 0's returned when no more endpoints */
513 if (!reg)
514 return -ENODEV;
515
516 musb->nr_endpoints++;
517 musb->epmask |= (1 << epnum);
518
519 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
520
521 /* shared TX/RX FIFO? */
522 if ((reg & 0xf0) == 0xf0) {
523 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
524 hw_ep->is_shared_fifo = true;
525 return 0;
526 } else {
527 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
528 hw_ep->is_shared_fifo = false;
529 }
530
531 return 0;
532}
533
534static inline void musb_configure_ep0(struct musb *musb)
535{
536 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
537 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716 538 musb->endpoints[0].is_shared_fifo = true;
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539}
540#endif /* CONFIG_BLACKFIN */
541
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542
543/***************************** Glue it together *****************************/
544
545extern const char musb_driver_name[];
546
547extern void musb_start(struct musb *musb);
548extern void musb_stop(struct musb *musb);
549
550extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
551extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
552
553extern void musb_load_testpacket(struct musb *);
554
555extern irqreturn_t musb_interrupt(struct musb *);
556
557extern void musb_platform_enable(struct musb *musb);
558extern void musb_platform_disable(struct musb *musb);
559
560extern void musb_hnp_stop(struct musb *musb);
561
96a274d1 562extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);
550a7375 563
c6cf8b00 564#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \
a8eb7ca0 565 defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
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566extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
567#else
568#define musb_platform_try_idle(x, y) do {} while (0)
569#endif
570
c6cf8b00 571#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN)
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572extern int musb_platform_get_vbus_status(struct musb *musb);
573#else
574#define musb_platform_get_vbus_status(x) 0
575#endif
576
577extern int __init musb_platform_init(struct musb *musb);
578extern int musb_platform_exit(struct musb *musb);
579
550a7375 580#endif /* __MUSB_CORE_H__ */