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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[net-next-2.6.git] / drivers / usb / host / uhci-hub.c
CommitLineData
1da177e4
LT
1/*
2 * Universal Host Controller Interface driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
13 */
14
15static __u8 root_hub_hub_des[] =
16{
17 0x09, /* __u8 bLength; */
18 0x29, /* __u8 bDescriptorType; Hub-descriptor */
19 0x02, /* __u8 bNbrPorts; */
20 0x0a, /* __u16 wHubCharacteristics; */
21 0x00, /* (per-port OC, no power switching) */
22 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
23 0x00, /* __u8 bHubContrCurrent; 0 mA */
24 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
25 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
26};
27
28#define UHCI_RH_MAXCHILD 7
29
30/* must write as zeroes */
31#define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
32
33/* status change bits: nonzero writes will clear */
34#define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
35
f5946f82
AS
36/* A port that either is connected or has a changed-bit set will prevent
37 * us from AUTO_STOPPING.
38 */
39static int any_ports_active(struct uhci_hcd *uhci)
40{
41 int port;
42
43 for (port = 0; port < uhci->rh_numports; ++port) {
44 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) &
45 (USBPORTSC_CCS | RWC_BITS)) ||
46 test_bit(port, &uhci->port_c_suspend))
47 return 1;
48 }
49 return 0;
50}
51
6c1b445c 52static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
1da177e4 53{
1da177e4
LT
54 int port;
55
56 *buf = 0;
57 for (port = 0; port < uhci->rh_numports; ++port) {
58 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & RWC_BITS) ||
59 test_bit(port, &uhci->port_c_suspend))
60 *buf |= (1 << (port + 1));
61 }
1da177e4
LT
62 return !!*buf;
63}
64
65#define OK(x) len = (x); break
66
67#define CLR_RH_PORTSTAT(x) \
68 status = inw(port_addr); \
69 status &= ~(RWC_BITS|WZ_BITS); \
70 status &= ~(x); \
71 status |= RWC_BITS & (x); \
72 outw(status, port_addr)
73
74#define SET_RH_PORTSTAT(x) \
75 status = inw(port_addr); \
76 status |= (x); \
77 status &= ~(RWC_BITS|WZ_BITS); \
78 outw(status, port_addr)
79
80/* UHCI controllers don't automatically stop resume signalling after 20 msec,
81 * so we have to poll and check timeouts in order to take care of it.
82 */
83static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
84 unsigned long port_addr)
85{
86 int status;
de06a3b8 87 int i;
1da177e4 88
8e326406 89 if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) {
1da177e4 90 CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
8e326406
AS
91 if (test_bit(port, &uhci->resuming_ports))
92 set_bit(port, &uhci->port_c_suspend);
1da177e4
LT
93
94 /* The controller won't actually turn off the RD bit until
95 * it has had a chance to send a low-speed EOP sequence,
de06a3b8
AS
96 * which is supposed to take 3 bit times (= 2 microseconds).
97 * Experiments show that some controllers take longer, so
98 * we'll poll for completion. */
99 for (i = 0; i < 10; ++i) {
100 if (!(inw(port_addr) & USBPORTSC_RD))
101 break;
102 udelay(1);
103 }
1da177e4 104 }
8e326406 105 clear_bit(port, &uhci->resuming_ports);
1da177e4
LT
106}
107
ae557175
AS
108/* Wait for the UHCI controller in HP's iLO2 server management chip.
109 * It can take up to 250 us to finish a reset and set the CSC bit.
110 */
111static void wait_for_HP(unsigned long port_addr)
112{
113 int i;
114
115 for (i = 10; i < 250; i += 10) {
116 if (inw(port_addr) & USBPORTSC_CSC)
117 return;
118 udelay(10);
119 }
120 /* Log a warning? */
121}
122
1da177e4
LT
123static void uhci_check_ports(struct uhci_hcd *uhci)
124{
125 unsigned int port;
126 unsigned long port_addr;
127 int status;
128
129 for (port = 0; port < uhci->rh_numports; ++port) {
130 port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
131 status = inw(port_addr);
132 if (unlikely(status & USBPORTSC_PR)) {
133 if (time_after_eq(jiffies, uhci->ports_timeout)) {
134 CLR_RH_PORTSTAT(USBPORTSC_PR);
135 udelay(10);
136
ae557175
AS
137 /* HP's server management chip requires
138 * a longer delay. */
139 if (to_pci_dev(uhci_dev(uhci))->vendor ==
140 PCI_VENDOR_ID_HP)
141 wait_for_HP(port_addr);
142
1da177e4
LT
143 /* If the port was enabled before, turning
144 * reset on caused a port enable change.
145 * Turning reset off causes a port connect
146 * status change. Clear these changes. */
147 CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
148 SET_RH_PORTSTAT(USBPORTSC_PE);
149 }
150 }
151 if (unlikely(status & USBPORTSC_RD)) {
152 if (!test_bit(port, &uhci->resuming_ports)) {
153
154 /* Port received a wakeup request */
155 set_bit(port, &uhci->resuming_ports);
156 uhci->ports_timeout = jiffies +
157 msecs_to_jiffies(20);
6c1b445c
AS
158
159 /* Make sure we see the port again
160 * after the resuming period is over. */
161 mod_timer(&uhci_to_hcd(uhci)->rh_timer,
162 uhci->ports_timeout);
1da177e4
LT
163 } else if (time_after_eq(jiffies,
164 uhci->ports_timeout)) {
165 uhci_finish_suspend(uhci, port, port_addr);
166 }
167 }
168 }
169}
170
6c1b445c
AS
171static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
172{
173 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
174 unsigned long flags;
1f09df8b 175 int status = 0;
6c1b445c
AS
176
177 spin_lock_irqsave(&uhci->lock, flags);
6c1b445c 178
7d12e780 179 uhci_scan_schedule(uhci);
e323de46 180 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
1f09df8b 181 goto done;
6c1b445c 182 uhci_check_ports(uhci);
1f09df8b 183
6c1b445c
AS
184 status = get_hub_status_data(uhci, buf);
185
186 switch (uhci->rh_state) {
187 case UHCI_RH_SUSPENDING:
188 case UHCI_RH_SUSPENDED:
189 /* if port change, ask to be resumed */
190 if (status)
191 usb_hcd_resume_root_hub(hcd);
192 break;
193
194 case UHCI_RH_AUTO_STOPPED:
195 /* if port change, auto start */
196 if (status)
197 wakeup_rh(uhci);
198 break;
199
200 case UHCI_RH_RUNNING:
201 /* are any devices attached? */
202 if (!any_ports_active(uhci)) {
203 uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
204 uhci->auto_stop_time = jiffies + HZ;
205 }
206 break;
207
208 case UHCI_RH_RUNNING_NODEVS:
209 /* auto-stop if nothing connected for 1 second */
210 if (any_ports_active(uhci))
211 uhci->rh_state = UHCI_RH_RUNNING;
212 else if (time_after_eq(jiffies, uhci->auto_stop_time))
213 suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
214 break;
215
216 default:
217 break;
218 }
219
220done:
221 spin_unlock_irqrestore(&uhci->lock, flags);
222 return status;
223}
224
1da177e4
LT
225/* size of returned buffer is part of USB spec */
226static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
227 u16 wIndex, char *buf, u16 wLength)
228{
229 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
230 int status, lstatus, retval = 0, len = 0;
231 unsigned int port = wIndex - 1;
232 unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
233 u16 wPortChange, wPortStatus;
234 unsigned long flags;
235
e323de46 236 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
a8bed8b6
AS
237 return -ETIMEDOUT;
238
1da177e4
LT
239 spin_lock_irqsave(&uhci->lock, flags);
240 switch (typeReq) {
241
242 case GetHubStatus:
243 *(__le32 *)buf = cpu_to_le32(0);
244 OK(4); /* hub power */
245 case GetPortStatus:
246 if (port >= uhci->rh_numports)
247 goto err;
248
249 uhci_check_ports(uhci);
250 status = inw(port_addr);
251
252 /* Intel controllers report the OverCurrent bit active on.
253 * VIA controllers report it active off, so we'll adjust the
254 * bit value. (It's not standardized in the UHCI spec.)
255 */
256 if (to_pci_dev(hcd->self.controller)->vendor ==
257 PCI_VENDOR_ID_VIA)
258 status ^= USBPORTSC_OC;
259
260 /* UHCI doesn't support C_RESET (always false) */
261 wPortChange = lstatus = 0;
262 if (status & USBPORTSC_CSC)
263 wPortChange |= USB_PORT_STAT_C_CONNECTION;
264 if (status & USBPORTSC_PEC)
265 wPortChange |= USB_PORT_STAT_C_ENABLE;
266 if (status & USBPORTSC_OCC)
267 wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
268
269 if (test_bit(port, &uhci->port_c_suspend)) {
270 wPortChange |= USB_PORT_STAT_C_SUSPEND;
271 lstatus |= 1;
272 }
1da177e4
LT
273 if (test_bit(port, &uhci->resuming_ports))
274 lstatus |= 4;
275
276 /* UHCI has no power switching (always on) */
277 wPortStatus = USB_PORT_STAT_POWER;
278 if (status & USBPORTSC_CCS)
279 wPortStatus |= USB_PORT_STAT_CONNECTION;
280 if (status & USBPORTSC_PE) {
281 wPortStatus |= USB_PORT_STAT_ENABLE;
282 if (status & (USBPORTSC_SUSP | USBPORTSC_RD))
283 wPortStatus |= USB_PORT_STAT_SUSPEND;
284 }
285 if (status & USBPORTSC_OC)
286 wPortStatus |= USB_PORT_STAT_OVERCURRENT;
287 if (status & USBPORTSC_PR)
288 wPortStatus |= USB_PORT_STAT_RESET;
289 if (status & USBPORTSC_LSDA)
290 wPortStatus |= USB_PORT_STAT_LOW_SPEED;
291
292 if (wPortChange)
293 dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
294 wIndex, status, lstatus);
295
296 *(__le16 *)buf = cpu_to_le16(wPortStatus);
297 *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
298 OK(4);
299 case SetHubFeature: /* We don't implement these */
300 case ClearHubFeature:
301 switch (wValue) {
302 case C_HUB_OVER_CURRENT:
303 case C_HUB_LOCAL_POWER:
304 OK(0);
305 default:
306 goto err;
307 }
308 break;
309 case SetPortFeature:
310 if (port >= uhci->rh_numports)
311 goto err;
312
313 switch (wValue) {
314 case USB_PORT_FEAT_SUSPEND:
1da177e4
LT
315 SET_RH_PORTSTAT(USBPORTSC_SUSP);
316 OK(0);
317 case USB_PORT_FEAT_RESET:
318 SET_RH_PORTSTAT(USBPORTSC_PR);
319
320 /* Reset terminates Resume signalling */
321 uhci_finish_suspend(uhci, port, port_addr);
322
323 /* USB v2.0 7.1.7.5 */
324 uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
325 OK(0);
326 case USB_PORT_FEAT_POWER:
327 /* UHCI has no power switching */
328 OK(0);
329 default:
330 goto err;
331 }
332 break;
333 case ClearPortFeature:
334 if (port >= uhci->rh_numports)
335 goto err;
336
337 switch (wValue) {
338 case USB_PORT_FEAT_ENABLE:
339 CLR_RH_PORTSTAT(USBPORTSC_PE);
340
341 /* Disable terminates Resume signalling */
342 uhci_finish_suspend(uhci, port, port_addr);
343 OK(0);
344 case USB_PORT_FEAT_C_ENABLE:
345 CLR_RH_PORTSTAT(USBPORTSC_PEC);
346 OK(0);
347 case USB_PORT_FEAT_SUSPEND:
8e326406
AS
348 if (!(inw(port_addr) & USBPORTSC_SUSP)) {
349
350 /* Make certain the port isn't suspended */
351 uhci_finish_suspend(uhci, port, port_addr);
352 } else if (!test_and_set_bit(port,
1da177e4
LT
353 &uhci->resuming_ports)) {
354 SET_RH_PORTSTAT(USBPORTSC_RD);
355
356 /* The controller won't allow RD to be set
357 * if the port is disabled. When this happens
358 * just skip the Resume signalling.
359 */
360 if (!(inw(port_addr) & USBPORTSC_RD))
361 uhci_finish_suspend(uhci, port,
362 port_addr);
363 else
364 /* USB v2.0 7.1.7.7 */
365 uhci->ports_timeout = jiffies +
366 msecs_to_jiffies(20);
367 }
368 OK(0);
369 case USB_PORT_FEAT_C_SUSPEND:
370 clear_bit(port, &uhci->port_c_suspend);
371 OK(0);
372 case USB_PORT_FEAT_POWER:
373 /* UHCI has no power switching */
374 goto err;
375 case USB_PORT_FEAT_C_CONNECTION:
376 CLR_RH_PORTSTAT(USBPORTSC_CSC);
377 OK(0);
378 case USB_PORT_FEAT_C_OVER_CURRENT:
379 CLR_RH_PORTSTAT(USBPORTSC_OCC);
380 OK(0);
381 case USB_PORT_FEAT_C_RESET:
382 /* this driver won't report these */
383 OK(0);
384 default:
385 goto err;
386 }
387 break;
388 case GetHubDescriptor:
389 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
390 memcpy(buf, root_hub_hub_des, len);
391 if (len > 2)
392 buf[2] = uhci->rh_numports;
393 OK(len);
394 default:
395err:
396 retval = -EPIPE;
397 }
398 spin_unlock_irqrestore(&uhci->lock, flags);
399
400 return retval;
401}