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Commit | Line | Data |
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7e797abf | 1 | #include "sysdef.h" |
80aba536 PE |
2 | #include "wbhal_f.h" |
3 | #include "wblinux_f.h" | |
66101de1 | 4 | |
8e41b4b6 | 5 | void hal_set_ethernet_address( struct hw_data * pHwData, u8 *current_address ) |
66101de1 PM |
6 | { |
7 | u32 ltmp[2]; | |
8 | ||
9 | if( pHwData->SurpriseRemove ) return; | |
10 | ||
bd37b7fd | 11 | memcpy( pHwData->CurrentMacAddress, current_address, ETH_ALEN ); |
66101de1 | 12 | |
8b384e0c PE |
13 | ltmp[0]= cpu_to_le32( *(u32 *)pHwData->CurrentMacAddress ); |
14 | ltmp[1]= cpu_to_le32( *(u32 *)(pHwData->CurrentMacAddress + 4) ) & 0xffff; | |
66101de1 PM |
15 | |
16 | Wb35Reg_BurstWrite( pHwData, 0x03e8, ltmp, 2, AUTO_INCREMENT ); | |
17 | } | |
18 | ||
8e41b4b6 | 19 | void hal_get_permanent_address( struct hw_data * pHwData, u8 *pethernet_address ) |
66101de1 PM |
20 | { |
21 | if( pHwData->SurpriseRemove ) return; | |
22 | ||
23 | memcpy( pethernet_address, pHwData->PermanentMacAddress, 6 ); | |
24 | } | |
25 | ||
66101de1 | 26 | //--------------------------------------------------------------------------------------------------- |
8e41b4b6 | 27 | void hal_set_beacon_period( struct hw_data * pHwData, u16 beacon_period ) |
66101de1 PM |
28 | { |
29 | u32 tmp; | |
30 | ||
31 | if( pHwData->SurpriseRemove ) return; | |
32 | ||
33 | pHwData->BeaconPeriod = beacon_period; | |
34 | tmp = pHwData->BeaconPeriod << 16; | |
35 | tmp |= pHwData->ProbeDelay; | |
36 | Wb35Reg_Write( pHwData, 0x0848, tmp ); | |
37 | } | |
38 | ||
39 | ||
8e41b4b6 | 40 | static void hal_set_current_channel_ex( struct hw_data * pHwData, ChanInfo channel ) |
66101de1 | 41 | { |
65144de7 | 42 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
43 | |
44 | if( pHwData->SurpriseRemove ) | |
45 | return; | |
46 | ||
47 | printk("Going to channel: %d/%d\n", channel.band, channel.ChanNo); | |
48 | ||
49 | RFSynthesizer_SwitchingChannel( pHwData, channel );// Switch channel | |
50 | pHwData->Channel = channel.ChanNo; | |
51 | pHwData->band = channel.band; | |
52 | #ifdef _PE_STATE_DUMP_ | |
0c59dbaa | 53 | printk("Set channel is %d, band =%d\n", pHwData->Channel, pHwData->band); |
66101de1 | 54 | #endif |
65144de7 PE |
55 | reg->M28_MacControl &= ~0xff; // Clean channel information field |
56 | reg->M28_MacControl |= channel.ChanNo; | |
57 | Wb35Reg_WriteWithCallbackValue( pHwData, 0x0828, reg->M28_MacControl, | |
8b384e0c | 58 | (s8 *)&channel, sizeof(ChanInfo)); |
66101de1 PM |
59 | } |
60 | //--------------------------------------------------------------------------------------------------- | |
8e41b4b6 | 61 | void hal_set_current_channel( struct hw_data * pHwData, ChanInfo channel ) |
66101de1 PM |
62 | { |
63 | hal_set_current_channel_ex( pHwData, channel ); | |
64 | } | |
65 | //--------------------------------------------------------------------------------------------------- | |
8e41b4b6 | 66 | void hal_set_accept_broadcast( struct hw_data * pHwData, u8 enable ) |
66101de1 | 67 | { |
65144de7 | 68 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
69 | |
70 | if( pHwData->SurpriseRemove ) return; | |
71 | ||
65144de7 | 72 | reg->M00_MacControl &= ~0x02000000;//The HW value |
66101de1 PM |
73 | |
74 | if (enable) | |
65144de7 | 75 | reg->M00_MacControl |= 0x02000000;//The HW value |
66101de1 | 76 | |
65144de7 | 77 | Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl ); |
66101de1 PM |
78 | } |
79 | ||
80 | //for wep key error detection, we need to accept broadcast packets to be received temporary. | |
8e41b4b6 | 81 | void hal_set_accept_promiscuous( struct hw_data * pHwData, u8 enable) |
66101de1 | 82 | { |
65144de7 | 83 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
84 | |
85 | if (pHwData->SurpriseRemove) return; | |
86 | if (enable) { | |
65144de7 PE |
87 | reg->M00_MacControl |= 0x00400000; |
88 | Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl ); | |
66101de1 | 89 | } else { |
65144de7 PE |
90 | reg->M00_MacControl&=~0x00400000; |
91 | Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl ); | |
66101de1 PM |
92 | } |
93 | } | |
94 | ||
8e41b4b6 | 95 | void hal_set_accept_multicast( struct hw_data * pHwData, u8 enable ) |
66101de1 | 96 | { |
65144de7 | 97 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
98 | |
99 | if( pHwData->SurpriseRemove ) return; | |
100 | ||
65144de7 PE |
101 | reg->M00_MacControl &= ~0x01000000;//The HW value |
102 | if (enable) reg->M00_MacControl |= 0x01000000;//The HW value | |
103 | Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl ); | |
66101de1 PM |
104 | } |
105 | ||
8e41b4b6 | 106 | void hal_set_accept_beacon( struct hw_data * pHwData, u8 enable ) |
66101de1 | 107 | { |
65144de7 | 108 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
109 | |
110 | if( pHwData->SurpriseRemove ) return; | |
111 | ||
112 | // 20040108 debug | |
113 | if( !enable )//Due to SME and MLME are not suitable for 35 | |
114 | return; | |
115 | ||
65144de7 | 116 | reg->M00_MacControl &= ~0x04000000;//The HW value |
66101de1 | 117 | if( enable ) |
65144de7 | 118 | reg->M00_MacControl |= 0x04000000;//The HW value |
66101de1 | 119 | |
65144de7 | 120 | Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl ); |
66101de1 PM |
121 | } |
122 | //--------------------------------------------------------------------------------------------------- | |
66101de1 | 123 | |
8e41b4b6 | 124 | void hal_stop( struct hw_data * pHwData ) |
66101de1 | 125 | { |
65144de7 | 126 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
127 | |
128 | pHwData->Wb35Rx.rx_halt = 1; | |
129 | Wb35Rx_stop( pHwData ); | |
130 | ||
deee7c81 PE |
131 | pHwData->Wb35Tx.tx_halt = 1; |
132 | Wb35Tx_stop( pHwData ); | |
66101de1 | 133 | |
deee7c81 PE |
134 | reg->D00_DmaControl &= ~0xc0000000;//Tx Off, Rx Off |
135 | Wb35Reg_Write( pHwData, 0x0400, reg->D00_DmaControl ); | |
136 | } | |
66101de1 | 137 | |
8e41b4b6 | 138 | unsigned char hal_idle(struct hw_data * pHwData) |
deee7c81 PE |
139 | { |
140 | struct wb35_reg *reg = &pHwData->reg; | |
eb62f3ea | 141 | struct wb_usb *pWbUsb = &pHwData->WbUsb; |
66101de1 | 142 | |
deee7c81 PE |
143 | if( !pHwData->SurpriseRemove && ( pWbUsb->DetectCount || reg->EP0vm_state!=VM_STOP ) ) |
144 | return false; | |
66101de1 | 145 | |
deee7c81 PE |
146 | return true; |
147 | } | |
148 | //--------------------------------------------------------------------------------------------------- | |
8e41b4b6 | 149 | void hal_set_phy_type( struct hw_data * pHwData, u8 PhyType ) |
66101de1 PM |
150 | { |
151 | pHwData->phy_type = PhyType; | |
152 | } | |
153 | ||
8e41b4b6 | 154 | void hal_set_radio_mode( struct hw_data * pHwData, unsigned char radio_off) |
66101de1 | 155 | { |
65144de7 | 156 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
157 | |
158 | if( pHwData->SurpriseRemove ) return; | |
159 | ||
160 | if (radio_off) //disable Baseband receive off | |
161 | { | |
162 | pHwData->CurrentRadioSw = 1; // off | |
65144de7 | 163 | reg->M24_MacControl &= 0xffffffbf; |
66101de1 PM |
164 | } |
165 | else | |
166 | { | |
167 | pHwData->CurrentRadioSw = 0; // on | |
65144de7 | 168 | reg->M24_MacControl |= 0x00000040; |
66101de1 | 169 | } |
65144de7 | 170 | Wb35Reg_Write( pHwData, 0x0824, reg->M24_MacControl ); |
66101de1 PM |
171 | } |
172 | ||
8e41b4b6 | 173 | u8 hal_get_antenna_number( struct hw_data * pHwData ) |
66101de1 | 174 | { |
65144de7 | 175 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 | 176 | |
65144de7 | 177 | if ((reg->BB2C & BIT(11)) == 0) |
66101de1 PM |
178 | return 0; |
179 | else | |
180 | return 1; | |
181 | } | |
182 | ||
66101de1 PM |
183 | //---------------------------------------------------------------------------------------------------- |
184 | //0 : radio on; 1: radio off | |
8e41b4b6 | 185 | u8 hal_get_hw_radio_off( struct hw_data * pHwData ) |
66101de1 | 186 | { |
65144de7 | 187 | struct wb35_reg *reg = &pHwData->reg; |
66101de1 PM |
188 | |
189 | if( pHwData->SurpriseRemove ) return 1; | |
190 | ||
191 | //read the bit16 of register U1B0 | |
65144de7 PE |
192 | Wb35Reg_Read( pHwData, 0x3b0, ®->U1B0 ); |
193 | if ((reg->U1B0 & 0x00010000)) { | |
66101de1 PM |
194 | pHwData->CurrentRadioHw = 1; |
195 | return 1; | |
196 | } else { | |
197 | pHwData->CurrentRadioHw = 0; | |
198 | return 0; | |
199 | } | |
200 | } | |
201 | ||
8e41b4b6 | 202 | unsigned char hal_get_dxx_reg( struct hw_data * pHwData, u16 number, u32 * pValue ) |
66101de1 PM |
203 | { |
204 | if( number < 0x1000 ) | |
205 | number += 0x1000; | |
206 | return Wb35Reg_ReadSync( pHwData, number, pValue ); | |
207 | } | |
208 | ||
8e41b4b6 | 209 | unsigned char hal_set_dxx_reg( struct hw_data * pHwData, u16 number, u32 value ) |
66101de1 PM |
210 | { |
211 | unsigned char ret; | |
212 | ||
213 | if( number < 0x1000 ) | |
214 | number += 0x1000; | |
215 | ret = Wb35Reg_WriteSync( pHwData, number, value ); | |
216 | return ret; | |
217 | } | |
218 | ||
8e41b4b6 | 219 | void hal_set_rf_power(struct hw_data * pHwData, u8 PowerIndex) |
66101de1 PM |
220 | { |
221 | RFSynthesizer_SetPowerIndex( pHwData, PowerIndex ); | |
222 | } |