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staging: stradis: fix error handling and information leak to userland
[net-next-2.6.git] / drivers / staging / stradis / stradis.c
CommitLineData
d56410e0 1/*
1da177e4
LT		 2 * stradis.c - stradis 4:2:2 mpeg decoder driver
3 *
4 * Stradis 4:2:2 MPEG-2 Decoder Driver
5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/fs.h>
26#include <linux/kernel.h>
27#include <linux/major.h>
28#include <linux/slab.h>
405f5571 29#include <linux/smp_lock.h>
1da177e4
LT		 30#include <linux/mm.h>
31#include <linux/init.h>
32#include <linux/poll.h>
33#include <linux/pci.h>
34#include <linux/signal.h>
35#include <asm/io.h>
36#include <linux/ioport.h>
37#include <asm/pgtable.h>
38#include <asm/page.h>
39#include <linux/sched.h>
40#include <asm/types.h>
41#include <linux/types.h>
42#include <linux/interrupt.h>
43#include <asm/uaccess.h>
44#include <linux/vmalloc.h>
45#include <linux/videodev.h>
5e87efa3 46#include <media/v4l2-common.h>
2864462e 47#include <media/v4l2-ioctl.h>
1da177e4
LT		 48
49#include "saa7146.h"
50#include "saa7146reg.h"
51#include "ibmmpeg2.h"
52#include "saa7121.h"
53#include "cs8420.h"
54
f823f679
JS		 55#define DEBUG(x) /* debug driver */
56#undef IDEBUG /* debug irq handler */
57#undef MDEBUG /* debug memory management */
1da177e4
LT		 58
59#define SAA7146_MAX 6
60
61static struct saa7146 saa7146s[SAA7146_MAX];
62
ff699e6b 63static int saa_num; /* number of SAA7146s in use */
1da177e4
LT		 64
65static int video_nr = -1;
66module_param(video_nr, int, 0);
67MODULE_LICENSE("GPL");
68
1da177e4
LT		 69#define nDebNormal 0x00480000
70#define nDebNoInc 0x00480000
71#define nDebVideo 0xd0480000
72#define nDebAudio 0xd0400000
73#define nDebDMA 0x02c80000
74
75#define oDebNormal 0x13c80000
76#define oDebNoInc 0x13c80000
77#define oDebVideo 0xd1080000
78#define oDebAudio 0xd1080000
79#define oDebDMA 0x03080000
80
81#define NewCard (saa->boardcfg[3])
82#define ChipControl (saa->boardcfg[1])
83#define NTSCFirstActive (saa->boardcfg[4])
84#define PALFirstActive (saa->boardcfg[5])
85#define NTSCLastActive (saa->boardcfg[54])
86#define PALLastActive (saa->boardcfg[55])
87#define Have2MB (saa->boardcfg[18] & 0x40)
88#define HaveCS8420 (saa->boardcfg[18] & 0x04)
89#define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
90#define HaveCS3310 (saa->boardcfg[18] & 0x01)
91#define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
92#define HaveCS4341 (saa->boardcfg[40] == 2)
93#define SDIType (saa->boardcfg[27])
94#define CurrentMode (saa->boardcfg[2])
95
96#define debNormal (NewCard ? nDebNormal : oDebNormal)
97#define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
98#define debVideo (NewCard ? nDebVideo : oDebVideo)
99#define debAudio (NewCard ? nDebAudio : oDebAudio)
100#define debDMA (NewCard ? nDebDMA : oDebDMA)
101
102#ifdef USE_RESCUE_EEPROM_SDM275
103static unsigned char rescue_eeprom[64] = {
f823f679
JS		 104 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63,
105 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l',
106 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2,
107 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a',
108 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 0x00, 0x00, 0x00, 0x00,
1da177e4
LT		 110};
111#endif
112
113/* ----------------------------------------------------------------------- */
114/* Hardware I2C functions */
115static void I2CWipe(struct saa7146 *saa)
116{
117 int i;
118 /* set i2c to ~=100kHz, abort transfer, clear busy */
119 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
120 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
121 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
122 /* wait for i2c registers to be programmed */
123 for (i = 0; i < 1000 &&
124 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
125 schedule();
126 saawrite(0x600, SAA7146_I2C_STATUS);
127 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
128 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
129 /* wait for i2c registers to be programmed */
130 for (i = 0; i < 1000 &&
131 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
132 schedule();
133 saawrite(0x600, SAA7146_I2C_STATUS);
134 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
135 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
136 /* wait for i2c registers to be programmed */
137 for (i = 0; i < 1000 &&
138 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
139 schedule();
140}
141
142/* read I2C */
143static int I2CRead(struct saa7146 *saa, unsigned char addr,
144 unsigned char subaddr, int dosub)
145{
146 int i;
147
148 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
149 I2CWipe(saa);
f823f679
JS		 150 for (i = 0;
151 i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY);
152 i++)
1da177e4
LT		 153 schedule();
154 if (i == 1000)
155 I2CWipe(saa);
156 if (dosub)
157 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
f823f679 158 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
1da177e4
LT		 159 else
160 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
f823f679 161 0xf1, SAA7146_I2C_TRANSFER);
1da177e4
LT		 162 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
163 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
164 /* wait for i2c registers to be programmed */
165 for (i = 0; i < 1000 &&
166 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
167 schedule();
168 /* wait for valid data */
169 for (i = 0; i < 1000 &&
170 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
171 schedule();
172 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
173 return -1;
f823f679 174 if (i == 1000)
1da177e4
LT		 175 printk("i2c setup read timeout\n");
176 saawrite(0x41, SAA7146_I2C_TRANSFER);
177 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
178 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
179 /* wait for i2c registers to be programmed */
180 for (i = 0; i < 1000 &&
181 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
182 schedule();
183 /* wait for valid data */
184 for (i = 0; i < 1000 &&
185 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
186 schedule();
187 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
188 return -1;
f823f679 189 if (i == 1000)
1da177e4
LT		 190 printk("i2c read timeout\n");
191 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
192}
193
194/* set both to write both bytes, reset it to write only b1 */
195
196static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
197 unsigned char b2, int both)
198{
199 int i;
200 u32 data;
201
202 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
203 I2CWipe(saa);
204 for (i = 0; i < 1000 &&
205 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
206 schedule();
207 if (i == 1000)
208 I2CWipe(saa);
209 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
210 if (both)
211 data |= ((b2 & 0xff) << 8) | 0xe5;
212 else
213 data |= 0xd1;
214 saawrite(data, SAA7146_I2C_TRANSFER);
215 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
216 SAA7146_MC2);
217 return 0;
218}
219
220static void attach_inform(struct saa7146 *saa, int id)
221{
222 int i;
223
f823f679
JS		 224 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr,
225 id));
226 if (id == 0xa0) { /* we have rev2 or later board, fill in info */
1da177e4
LT		 227 for (i = 0; i < 64; i++)
228 saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
229#ifdef USE_RESCUE_EEPROM_SDM275
230 if (saa->boardcfg[0] != 0) {
f823f679
JS		 231 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE "
232 "BEEN IGNORED\n", saa->nr);
1da177e4
LT		 233 for (i = 0; i < 64; i++)
234 saa->boardcfg[i] = rescue_eeprom[i];
235 }
236#endif
237 printk("stradis%d: config =", saa->nr);
238 for (i = 0; i < 51; i++) {
f823f679 239 printk(" %02x", saa->boardcfg[i]);
1da177e4
LT		 240 }
241 printk("\n");
242 }
243}
244
245static void I2CBusScan(struct saa7146 *saa)
246{
247 int i;
248 for (i = 0; i < 0xff; i += 2)
249 if ((I2CRead(saa, i, 0, 0)) >= 0)
250 attach_inform(saa, i);
251}
252
ff699e6b 253static int debiwait_maxwait;
1da177e4
LT		 254
255static int wait_for_debi_done(struct saa7146 *saa)
256{
257 int i;
258
259 /* wait for registers to be programmed */
260 for (i = 0; i < 100000 &&
261 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
262 saaread(SAA7146_MC2);
263 /* wait for transfer to complete */
264 for (i = 0; i < 500000 &&
265 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
266 saaread(SAA7146_MC2);
f823f679 267
1da177e4
LT		 268 if (i > debiwait_maxwait)
269 printk("wait-for-debi-done maxwait: %d\n",
270 debiwait_maxwait = i);
f823f679 271
1da177e4
LT		 272 if (i == 500000)
273 return -1;
f823f679 274
1da177e4
LT		 275 return 0;
276}
277
278static int debiwrite(struct saa7146 *saa, u32 config, int addr,
f823f679 279 u32 val, int count)
1da177e4
LT		 280{
281 u32 cmd;
282 if (count <= 0 || count > 32764)
283 return -1;
284 if (wait_for_debi_done(saa) < 0)
285 return -1;
286 saawrite(config, SAA7146_DEBI_CONFIG);
287 if (count <= 4) /* immediate transfer */
288 saawrite(val, SAA7146_DEBI_AD);
289 else /* block transfer */
290 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
291 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
292 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
293 SAA7146_MC2);
294 return 0;
295}
296
297static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
298{
299 u32 result = 0;
300
301 if (count > 32764 || count <= 0)
302 return 0;
303 if (wait_for_debi_done(saa) < 0)
304 return 0;
305 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
306 saawrite((count << 17) | 0x10000 | (addr & 0xffff),
307 SAA7146_DEBI_COMMAND);
308 saawrite(config, SAA7146_DEBI_CONFIG);
309 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
310 SAA7146_MC2);
311 if (count > 4) /* not an immediate transfer */
312 return count;
313 wait_for_debi_done(saa);
314 result = saaread(SAA7146_DEBI_AD);
315 if (count == 1)
316 result &= 0xff;
317 if (count == 2)
318 result &= 0xffff;
319 if (count == 3)
320 result &= 0xffffff;
321 return result;
322}
323
1da177e4
LT		 324static void do_irq_send_data(struct saa7146 *saa)
325{
326 int split, audbytes, vidbytes;
327
328 saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
329 /* if special feature mode in effect, disable audio sending */
330 if (saa->playmode != VID_PLAY_NORMAL)
331 saa->audtail = saa->audhead = 0;
332 if (saa->audhead <= saa->audtail)
333 audbytes = saa->audtail - saa->audhead;
334 else
335 audbytes = 65536 - (saa->audhead - saa->audtail);
336 if (saa->vidhead <= saa->vidtail)
337 vidbytes = saa->vidtail - saa->vidhead;
338 else
339 vidbytes = 524288 - (saa->vidhead - saa->vidtail);
340 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
341 saawrite(0, SAA7146_IER);
342 return;
343 }
344 /* if at least 1 block audio waiting and audio fifo isn't full */
f823f679
JS		 345 if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2)
346 & 0xff) < 60) {
1da177e4
LT		 347 if (saa->audhead > saa->audtail)
348 split = 65536 - saa->audhead;
349 else
350 split = 0;
351 audbytes = 2048;
352 if (split > 0 && split < 2048) {
f823f679 353 memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split);
1da177e4
LT		 354 saa->audhead = 0;
355 audbytes -= split;
356 } else
357 split = 0;
358 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
359 audbytes);
360 saa->audhead += audbytes;
361 saa->audhead &= 0xffff;
f823f679
JS		 362 debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO :
363 IBM_MP2_AUD_FIFOW), 0, 2048);
1da177e4 364 wake_up_interruptible(&saa->audq);
f823f679 365 /* if at least 1 block video waiting and video fifo isn't full */
1da177e4 366 } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
f823f679 367 IBM_MP2_FIFO, 2)) < 16384) {
1da177e4
LT		 368 if (saa->vidhead > saa->vidtail)
369 split = 524288 - saa->vidhead;
370 else
371 split = 0;
372 vidbytes = 30720;
373 if (split > 0 && split < 30720) {
f823f679 374 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split);
1da177e4
LT		 375 saa->vidhead = 0;
376 vidbytes -= split;
377 } else
378 split = 0;
379 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
380 vidbytes);
381 saa->vidhead += vidbytes;
382 saa->vidhead &= 0x7ffff;
383 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
f823f679 384 IBM_MP2_FIFOW), 0, 30720);
1da177e4
LT		 385 wake_up_interruptible(&saa->vidq);
386 }
387 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
388}
389
390static void send_osd_data(struct saa7146 *saa)
391{
392 int size = saa->osdtail - saa->osdhead;
393 if (size > 30720)
394 size = 30720;
395 /* ensure some multiple of 8 bytes is transferred */
f823f679 396 size = 8 * ((size + 8) >> 3);
1da177e4
LT		 397 if (size) {
398 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
f823f679 399 (saa->osdhead >> 3), 2);
1da177e4
LT		 400 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
401 saa->osdhead += size;
402 /* block transfer of next 8 bytes to ~32k bytes */
403 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
404 }
405 if (saa->osdhead >= saa->osdtail) {
406 saa->osdhead = saa->osdtail = 0;
407 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
408 }
409}
410
7d12e780 411static irqreturn_t saa7146_irq(int irq, void *dev_id)
1da177e4 412{
f823f679 413 struct saa7146 *saa = dev_id;
1da177e4
LT		 414 u32 stat, astat;
415 int count;
416 int handled = 0;
417
418 count = 0;
419 while (1) {
420 /* get/clear interrupt status bits */
421 stat = saaread(SAA7146_ISR);
422 astat = stat & saaread(SAA7146_IER);
423 if (!astat)
424 break;
425 handled = 1;
426 saawrite(astat, SAA7146_ISR);
427 if (astat & SAA7146_PSR_DEBI_S) {
428 do_irq_send_data(saa);
429 }
430 if (astat & SAA7146_PSR_PIN1) {
431 int istat;
432 /* the following read will trigger DEBI_S */
433 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
434 if (istat & 1) {
435 saawrite(0, SAA7146_IER);
436 send_osd_data(saa);
437 saawrite(SAA7146_PSR_DEBI_S |
438 SAA7146_PSR_PIN1, SAA7146_IER);
439 }
440 if (istat & 0x20) { /* Video Start */
441 saa->vidinfo.frame_count++;
442 }
443 if (istat & 0x400) { /* Picture Start */
444 /* update temporal reference */
445 }
446 if (istat & 0x200) { /* Picture Resolution Change */
447 /* read new resolution */
448 }
449 if (istat & 0x100) { /* New User Data found */
450 /* read new user data */
451 }
452 if (istat & 0x1000) { /* new GOP/SMPTE */
453 /* read new SMPTE */
454 }
455 if (istat & 0x8000) { /* Sequence Start Code */
456 /* reset frame counter, load sizes */
457 saa->vidinfo.frame_count = 0;
458 saa->vidinfo.h_size = 704;
459 saa->vidinfo.v_size = 480;
460#if 0
461 if (saa->endmarkhead != saa->endmarktail) {
f823f679 462 saa->audhead =
1da177e4
LT		 463 saa->endmark[saa->endmarkhead];
464 saa->endmarkhead++;
465 if (saa->endmarkhead >= MAX_MARKS)
466 saa->endmarkhead = 0;
467 }
468#endif
469 }
470 if (istat & 0x4000) { /* Sequence Error Code */
471 if (saa->endmarkhead != saa->endmarktail) {
f823f679 472 saa->audhead =
1da177e4
LT		 473 saa->endmark[saa->endmarkhead];
474 saa->endmarkhead++;
475 if (saa->endmarkhead >= MAX_MARKS)
476 saa->endmarkhead = 0;
477 }
478 }
479 }
480#ifdef IDEBUG
481 if (astat & SAA7146_PSR_PPEF) {
482 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
483 }
484 if (astat & SAA7146_PSR_PABO) {
485 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
486 }
487 if (astat & SAA7146_PSR_PPED) {
488 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
489 }
490 if (astat & SAA7146_PSR_RPS_I1) {
491 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
492 }
493 if (astat & SAA7146_PSR_RPS_I0) {
494 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
495 }
496 if (astat & SAA7146_PSR_RPS_LATE1) {
497 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
498 }
499 if (astat & SAA7146_PSR_RPS_LATE0) {
500 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
501 }
502 if (astat & SAA7146_PSR_RPS_E1) {
503 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
504 }
505 if (astat & SAA7146_PSR_RPS_E0) {
506 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
507 }
508 if (astat & SAA7146_PSR_RPS_TO1) {
509 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
510 }
511 if (astat & SAA7146_PSR_RPS_TO0) {
512 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
513 }
514 if (astat & SAA7146_PSR_UPLD) {
515 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
516 }
517 if (astat & SAA7146_PSR_DEBI_E) {
518 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
519 }
520 if (astat & SAA7146_PSR_I2C_S) {
521 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
522 }
523 if (astat & SAA7146_PSR_I2C_E) {
524 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
525 }
526 if (astat & SAA7146_PSR_A2_IN) {
527 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
528 }
529 if (astat & SAA7146_PSR_A2_OUT) {
530 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
531 }
532 if (astat & SAA7146_PSR_A1_IN) {
533 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
534 }
535 if (astat & SAA7146_PSR_A1_OUT) {
536 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
537 }
538 if (astat & SAA7146_PSR_AFOU) {
539 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
540 }
541 if (astat & SAA7146_PSR_V_PE) {
542 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
543 }
544 if (astat & SAA7146_PSR_VFOU) {
545 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
546 }
547 if (astat & SAA7146_PSR_FIDA) {
548 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
549 }
550 if (astat & SAA7146_PSR_FIDB) {
551 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
552 }
553 if (astat & SAA7146_PSR_PIN3) {
554 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
555 }
556 if (astat & SAA7146_PSR_PIN2) {
557 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
558 }
559 if (astat & SAA7146_PSR_PIN0) {
560 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
561 }
562 if (astat & SAA7146_PSR_ECS) {
563 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
564 }
565 if (astat & SAA7146_PSR_EC3S) {
566 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
567 }
568 if (astat & SAA7146_PSR_EC0S) {
569 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
570 }
571#endif
572 count++;
573 if (count > 15)
574 printk(KERN_WARNING "stradis%d: irq loop %d\n",
575 saa->nr, count);
576 if (count > 20) {
577 saawrite(0, SAA7146_IER);
578 printk(KERN_ERR
579 "stradis%d: IRQ loop cleared\n", saa->nr);
580 }
581 }
582 return IRQ_RETVAL(handled);
583}
584
585static int ibm_send_command(struct saa7146 *saa,
586 int command, int data, int chain)
587{
588 int i;
589
590 if (chain)
f823f679 591 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2);
1da177e4
LT		 592 else
593 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
594 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
595 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
596 for (i = 0; i < 100 &&
597 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
598 schedule();
599 if (i == 100)
600 return -1;
601 return 0;
602}
603
604static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
605{
606 I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
607 I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
608}
609
610static void initialize_cs4341(struct saa7146 *saa)
611{
612 int i;
613 for (i = 0; i < 200; i++) {
614 /* auto mute off, power on, no de-emphasis */
615 /* I2S data up to 24-bit 64xFs internal SCLK */
616 I2CWrite(saa, 0x22, 0x01, 0x11, 2);
617 /* ATAPI mixer settings */
618 I2CWrite(saa, 0x22, 0x02, 0x49, 2);
619 /* attenuation left 3db */
620 I2CWrite(saa, 0x22, 0x03, 0x00, 2);
621 /* attenuation right 3db */
622 I2CWrite(saa, 0x22, 0x04, 0x00, 2);
623 I2CWrite(saa, 0x22, 0x01, 0x10, 2);
624 if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
625 break;
626 schedule();
627 }
628 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
629 return;
630}
631
632static void initialize_cs8420(struct saa7146 *saa, int pro)
633{
634 int i;
635 u8 *sequence;
636 if (pro)
637 sequence = mode8420pro;
638 else
639 sequence = mode8420con;
640 for (i = 0; i < INIT8420LEN; i++)
f823f679 641 I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2);
1da177e4 642 for (i = 0; i < MODE8420LEN; i++)
f823f679 643 I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2);
1da177e4
LT		 644 printk("stradis%d: CS8420 initialized\n", saa->nr);
645}
646
647static void initialize_saa7121(struct saa7146 *saa, int dopal)
648{
649 int i, mod;
650 u8 *sequence;
651 if (dopal)
652 sequence = init7121pal;
653 else
654 sequence = init7121ntsc;
655 mod = saaread(SAA7146_PSR) & 0x08;
656 /* initialize PAL/NTSC video encoder */
657 for (i = 0; i < INIT7121LEN; i++) {
658 if (NewCard) { /* handle new card encoder differences */
f823f679 659 if (sequence[i * 2] == 0x3a)
1da177e4 660 I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
f823f679 661 else if (sequence[i * 2] == 0x6b)
1da177e4 662 I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
f823f679 663 else if (sequence[i * 2] == 0x6c)
1da177e4
LT		 664 I2CWrite(saa, 0x88, 0x6c,
665 dopal ? 0x09 : 0xf5, 2);
f823f679 666 else if (sequence[i * 2] == 0x6d)
1da177e4
LT		 667 I2CWrite(saa, 0x88, 0x6d,
668 dopal ? 0x20 : 0x00, 2);
f823f679 669 else if (sequence[i * 2] == 0x7a)
1da177e4
LT		 670 I2CWrite(saa, 0x88, 0x7a,
671 dopal ? (PALFirstActive - 1) :
672 (NTSCFirstActive - 4), 2);
f823f679 673 else if (sequence[i * 2] == 0x7b)
1da177e4
LT		 674 I2CWrite(saa, 0x88, 0x7b,
675 dopal ? PALLastActive :
676 NTSCLastActive, 2);
f823f679
JS		 677 else
678 I2CWrite(saa, 0x88, sequence[i * 2],
679 sequence[i * 2 + 1], 2);
1da177e4 680 } else {
f823f679
JS		 681 if (sequence[i * 2] == 0x6b && mod)
682 I2CWrite(saa, 0x88, 0x6b,
683 (sequence[i * 2 + 1] ^ 0x09), 2);
684 else if (sequence[i * 2] == 0x7a)
1da177e4
LT		 685 I2CWrite(saa, 0x88, 0x7a,
686 dopal ? (PALFirstActive - 1) :
687 (NTSCFirstActive - 4), 2);
f823f679 688 else if (sequence[i * 2] == 0x7b)
1da177e4
LT		 689 I2CWrite(saa, 0x88, 0x7b,
690 dopal ? PALLastActive :
691 NTSCLastActive, 2);
692 else
693 I2CWrite(saa, 0x88, sequence[i * 2],
694 sequence[i * 2 + 1], 2);
695 }
696 }
697}
698
699static void set_genlock_offset(struct saa7146 *saa, int noffset)
700{
701 int nCode;
702 int PixelsPerLine = 858;
703 if (CurrentMode == VIDEO_MODE_PAL)
704 PixelsPerLine = 864;
705 if (noffset > 500)
706 noffset = 500;
707 else if (noffset < -500)
708 noffset = -500;
709 nCode = noffset + 0x100;
710 if (nCode == 1)
711 nCode = 0x401;
f823f679
JS		 712 else if (nCode < 1)
713 nCode = 0x400 + PixelsPerLine + nCode;
1da177e4
LT		 714 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
715}
716
717static void set_out_format(struct saa7146 *saa, int mode)
718{
719 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
720 saa->boardcfg[2] = mode;
721 /* do not adjust analog video parameters here, use saa7121 init */
722 /* you will affect the SDI output on the new card */
f823f679 723 if (mode == VIDEO_MODE_PAL) { /* PAL */
1da177e4
LT		 724 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
725 mdelay(50);
726 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
727 if (NewCard) {
f823f679 728 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2);
1da177e4
LT		 729 mdelay(50);
730 }
731 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
f823f679 732 NewCard ? 0xe500 : 0x6500, 2);
1da177e4
LT		 733 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
734 (1 << 8) |
f823f679 735 (NewCard ? PALFirstActive : PALFirstActive - 6), 2);
1da177e4
LT		 736 } else { /* NTSC */
737 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
738 mdelay(50);
739 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
740 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
f823f679 741 NewCard ? 0xe100 : 0x6100, 2);
1da177e4
LT		 742 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
743 (1 << 8) |
f823f679 744 (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2);
1da177e4
LT		 745 }
746}
747
1da177e4
LT		 748/* Intialize bitmangler to map from a byte value to the mangled word that
749 * must be output to program the Xilinx part through the DEBI port.
750 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
751 * transfer FPGA code, init IBM chip, transfer IBM microcode
752 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
753 */
754static u16 bitmangler[256];
755
756static int initialize_fpga(struct video_code *bitdata)
757{
758 int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
759 u16 *dmabuf;
760 u8 *newdma;
761 struct saa7146 *saa;
762
763 /* verify fpga code */
764 for (startindex = 0; startindex < bitdata->datasize; startindex++)
765 if (bitdata->data[startindex] == 255)
766 break;
767 if (startindex == bitdata->datasize) {
768 printk(KERN_INFO "stradis: bad fpga code\n");
769 return -1;
770 }
771 /* initialize all detected cards */
772 for (num = 0; num < saa_num; num++) {
773 saa = &saa7146s[num];
774 if (saa->boardcfg[0] > 20)
f823f679 775 continue; /* card was programmed */
1da177e4
LT		 776 loadtwo = (saa->boardcfg[18] & 0x10);
777 if (!NewCard) /* we have an old board */
778 for (i = 0; i < 256; i++)
f823f679
JS		 779 bitmangler[i] = ((i & 0x01) << 15) |
780 ((i & 0x02) << 6) | ((i & 0x04) << 4) |
781 ((i & 0x08) << 9) | ((i & 0x10) << 7) |
782 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
783 ((i & 0x80) >> 7);
784 else /* else we have a new board */
1da177e4 785 for (i = 0; i < 256; i++)
f823f679
JS		 786 bitmangler[i] = ((i & 0x01) << 7) |
787 ((i & 0x02) << 5) | ((i & 0x04) << 3) |
788 ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
789 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
790 ((i & 0x80) >> 7);
1da177e4
LT		 791
792 dmabuf = (u16 *) saa->dmadebi;
793 newdma = (u8 *) saa->dmadebi;
794 if (NewCard) { /* SDM2xxx */
795 if (!strncmp(bitdata->loadwhat, "decoder2", 8))
796 continue; /* fpga not for this card */
f823f679 797 if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8))
1da177e4 798 loadfile = 1;
f823f679
JS		 799 else if (loadtwo && !strncmp(&saa->boardcfg[19],
800 bitdata->loadwhat, 8))
1da177e4 801 loadfile = 2;
f823f679
JS		 802 else if (!saa->boardcfg[42] && !strncmp("decxl",
803 bitdata->loadwhat, 8))
804 loadfile = 1; /* special */
805 else
1da177e4 806 continue; /* fpga not for this card */
f823f679 807 if (loadfile != 1 && loadfile != 2)
1da177e4 808 continue; /* skip to next card */
f823f679 809 if (saa->boardcfg[0] && loadfile == 1)
1da177e4
LT		 810 continue; /* skip to next card */
811 if (saa->boardcfg[0] != 1 && loadfile == 2)
812 continue; /* skip to next card */
813 saa->boardcfg[0]++; /* mark fpga handled */
814 printk("stradis%d: loading %s\n", saa->nr,
815 bitdata->loadwhat);
816 if (loadtwo && loadfile == 2)
817 goto send_fpga_stuff;
818 /* turn on the Audio interface to set PROG low */
819 saawrite(0x00400040, SAA7146_GPIO_CTRL);
820 saaread(SAA7146_PSR); /* ensure posted write */
821 /* wait for everyone to reset */
822 mdelay(10);
823 saawrite(0x00400000, SAA7146_GPIO_CTRL);
824 } else { /* original card */
825 if (strncmp(bitdata->loadwhat, "decoder2", 8))
826 continue; /* fpga not for this card */
827 /* Pull the Xilinx PROG signal WS3 low */
828 saawrite(0x02000200, SAA7146_MC1);
829 /* Turn on the Audio interface so can set PROG low */
830 saawrite(0x000000c0, SAA7146_ACON1);
831 /* Pull the Xilinx INIT signal (GPIO2) low */
832 saawrite(0x00400000, SAA7146_GPIO_CTRL);
833 /* Make sure everybody resets */
834 saaread(SAA7146_PSR); /* ensure posted write */
835 mdelay(10);
836 /* Release the Xilinx PROG signal */
837 saawrite(0x00000000, SAA7146_ACON1);
838 /* Turn off the Audio interface */
839 saawrite(0x02000000, SAA7146_MC1);
840 }
841 /* Release Xilinx INIT signal (WS2) */
842 saawrite(0x00000000, SAA7146_GPIO_CTRL);
843 /* Wait for the INIT to go High */
f823f679
JS		 844 for (i = 0;
845 i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
846 i++)
1da177e4
LT		 847 schedule();
848 if (i == 1000) {
849 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
850 return -1;
851 }
852send_fpga_stuff:
853 if (NewCard) {
854 for (i = startindex; i < bitdata->datasize; i++)
855 newdma[i - startindex] =
f823f679 856 bitmangler[bitdata->data[i]];
1da177e4
LT		 857 debiwrite(saa, 0x01420000, 0, 0,
858 ((bitdata->datasize - startindex) + 5));
f823f679
JS		 859 if (loadtwo && loadfile == 1) {
860 printk("stradis%d: awaiting 2nd FPGA bitfile\n",
861 saa->nr);
862 continue; /* skip to next card */
1da177e4
LT		 863 }
864 } else {
865 for (i = startindex; i < bitdata->datasize; i++)
866 dmabuf[i - startindex] =
867 bitmangler[bitdata->data[i]];
868 debiwrite(saa, 0x014a0000, 0, 0,
869 ((bitdata->datasize - startindex) + 5) * 2);
870 }
f823f679
JS		 871 for (i = 0;
872 i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
873 i++)
1da177e4
LT		 874 schedule();
875 if (i == 1000) {
876 printk(KERN_INFO "stradis%d: FPGA load failed\n",
877 saa->nr);
878 failure++;
879 continue;
880 }
881 if (!NewCard) {
882 /* Pull the Xilinx INIT signal (GPIO2) low */
883 saawrite(0x00400000, SAA7146_GPIO_CTRL);
884 saaread(SAA7146_PSR); /* ensure posted write */
885 mdelay(2);
886 saawrite(0x00000000, SAA7146_GPIO_CTRL);
887 mdelay(2);
888 }
889 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
890 saa->boardcfg[0] = 26; /* mark fpga programmed */
891 /* set VXCO to its lowest frequency */
892 debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
893 if (NewCard) {
894 /* mute CS3310 */
895 if (HaveCS3310)
896 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
f823f679 897 0, 2);
1da177e4
LT		 898 /* set VXCO to PWM mode, release reset, blank on */
899 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
900 mdelay(10);
901 /* unmute CS3310 */
902 if (HaveCS3310)
903 debiwrite(saa, debNormal, XILINX_CTL0,
f823f679 904 0x2020, 2);
1da177e4
LT		 905 }
906 /* set source Black */
907 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
908 saa->boardcfg[4] = 22; /* set NTSC First Active Line */
909 saa->boardcfg[5] = 23; /* set PAL First Active Line */
910 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
911 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
912 set_out_format(saa, VIDEO_MODE_NTSC);
913 mdelay(50);
914 /* begin IBM chip init */
915 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
916 saaread(SAA7146_PSR); /* wait for reset */
917 mdelay(5);
918 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
919 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
920 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
921 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
922 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
923 if (NewCard) {
924 mdelay(5);
925 /* set i2s rate converter to 48KHz */
926 debiwrite(saa, debNormal, 0x80c0, 6, 2);
927 /* we must init CS8420 first since rev b pulls i2s */
928 /* master clock low and CS4341 needs i2s master to */
929 /* run the i2c port. */
f823f679 930 if (HaveCS8420)
1da177e4
LT		 931 /* 0=consumer, 1=pro */
932 initialize_cs8420(saa, 0);
f823f679 933
1da177e4
LT		 934 mdelay(5);
935 if (HaveCS4341)
936 initialize_cs4341(saa);
937 }
938 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
939 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
940 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
941 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
942 if (NewCard)
943 set_genlock_offset(saa, 0);
944 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
945#if 0
946 /* enable genlock */
947 debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
948#else
949 /* disable genlock */
950 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
951#endif
952 }
f823f679 953
1da177e4
LT		 954 return failure;
955}
956
957static int do_ibm_reset(struct saa7146 *saa)
958{
959 /* failure if decoder not previously programmed */
960 if (saa->boardcfg[0] < 37)
961 return -EIO;
962 /* mute CS3310 */
963 if (HaveCS3310)
964 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
965 /* disable interrupts */
966 saawrite(0, SAA7146_IER);
967 saa->audhead = saa->audtail = 0;
968 saa->vidhead = saa->vidtail = 0;
969 /* tristate debi bus, disable debi transfers */
970 saawrite(0x00880000, SAA7146_MC1);
971 /* ensure posted write */
972 saaread(SAA7146_MC1);
973 mdelay(50);
974 /* re-enable debi transfers */
975 saawrite(0x00880088, SAA7146_MC1);
976 /* set source Black */
977 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
978 /* begin IBM chip init */
979 set_out_format(saa, CurrentMode);
980 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
981 saaread(SAA7146_PSR); /* wait for reset */
982 mdelay(5);
983 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
984 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
985 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
986 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
987 if (NewCard) {
988 mdelay(5);
989 /* set i2s rate converter to 48KHz */
990 debiwrite(saa, debNormal, 0x80c0, 6, 2);
991 /* we must init CS8420 first since rev b pulls i2s */
992 /* master clock low and CS4341 needs i2s master to */
993 /* run the i2c port. */
f823f679 994 if (HaveCS8420)
1da177e4
LT		 995 /* 0=consumer, 1=pro */
996 initialize_cs8420(saa, 1);
f823f679 997
1da177e4
LT		 998 mdelay(5);
999 if (HaveCS4341)
1000 initialize_cs4341(saa);
1001 }
1002 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1003 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1004 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1005 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1006 if (NewCard)
1007 set_genlock_offset(saa, 0);
1008 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1009 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1010 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1011 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
f823f679 1012 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
1da177e4
LT		 1013 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
1014 }
1015 if (HaveCS3310) {
1016 int i = CS3310MaxLvl;
f823f679 1017 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2);
1da177e4
LT		 1018 }
1019 /* start video decoder */
1020 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1021 /* 256k vid, 3520 bytes aud */
1022 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
1023 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1024 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1025 /* enable buffer threshold irq */
1026 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1027 /* clear pending interrupts */
1028 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1029 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
f823f679 1030
1da177e4
LT		 1031 return 0;
1032}
1033
1034/* load the decoder microcode */
1035static int initialize_ibmmpeg2(struct video_code *microcode)
1036{
1037 int i, num;
1038 struct saa7146 *saa;
1039
1040 for (num = 0; num < saa_num; num++) {
1041 saa = &saa7146s[num];
1042 /* check that FPGA is loaded */
1043 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
f823f679
JS		 1044 i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2);
1045 if (i != 0xa55a) {
1da177e4
LT		 1046 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
1047 saa->nr, i);
1048#if 0
1049 return -1;
1050#endif
1051 }
1052 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
1053 if (saa->boardcfg[0] > 27)
1054 continue; /* skip to next card */
1055 /* load video control store */
f823f679 1056 saa->boardcfg[1] = 0x13; /* no-sync default */
1da177e4
LT		 1057 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1058 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1059 for (i = 0; i < microcode->datasize / 2; i++)
1060 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
1061 (microcode->data[i * 2] << 8) |
f823f679 1062 microcode->data[i * 2 + 1], 2);
1da177e4
LT		 1063 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1064 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1065 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
f823f679 1066 ChipControl, 2);
1da177e4
LT		 1067 saa->boardcfg[0] = 28;
1068 }
1069 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
1070 if (saa->boardcfg[0] > 35)
1071 continue; /* skip to next card */
1072 /* load audio control store */
1073 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1074 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1075 for (i = 0; i < microcode->datasize; i++)
1076 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
1077 microcode->data[i], 1);
1078 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1079 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1080 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1081 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1082 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
f823f679
JS		 1083 0xe000, 1)) {
1084 printk(KERN_ERR "stradis%d: IBM config "
1085 "failed\n", saa->nr);
1da177e4
LT		 1086 return -1;
1087 }
1088 /* set PWM to center value */
1089 if (NewCard) {
1090 debiwrite(saa, debNormal, XILINX_PWM,
f823f679
JS		 1091 saa->boardcfg[14] +
1092 (saa->boardcfg[13] << 8), 2);
1da177e4 1093 } else
f823f679
JS		 1094 debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2);
1095
1da177e4
LT		 1096 if (HaveCS3310) {
1097 i = CS3310MaxLvl;
f823f679
JS		 1098 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
1099 (i << 8) | i, 2);
1da177e4 1100 }
f823f679
JS		 1101 printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n",
1102 saa->nr, 18 + (debiread(saa, debNormal,
1103 IBM_MP2_CHIP_CONTROL, 2) >> 12));
1da177e4
LT		 1104 /* start video decoder */
1105 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1106 ChipControl, 2);
f823f679
JS		 1107 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037,
1108 2); /* 256k vid, 3520 bytes aud */
1da177e4
LT		 1109 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1110 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1111 /* enable buffer threshold irq */
1112 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1113 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1114 /* enable gpio irq */
1115 saawrite(0x00002000, SAA7146_GPIO_CTRL);
1116 /* enable decoder output to HPS */
1117 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1118 saa->boardcfg[0] = 37;
1119 }
1120 }
f823f679 1121
1da177e4
LT		 1122 return 0;
1123}
1124
f823f679
JS		 1125static u32 palette2fmt[] = { /* some of these YUV translations are wrong */
1126 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
1127 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
1128 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
1da177e4 1129};
f823f679 1130static int bpp2fmt[4] = {
1da177e4
LT		 1131 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
1132 VIDEO_PALETTE_RGB32
1133};
1134
1135/* I wish I could find a formula to calculate these... */
f823f679
JS		 1136static u32 h_prescale[64] = {
1137 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
1138 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
1139 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
1140 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
1141 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
1142 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
1143 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
1144 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
1145 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
1146 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
1147 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
1da177e4 1148};
f823f679
JS		 1149static u32 v_gain[64] = {
1150 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
1151 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
1152 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
1153 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1154 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1155 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1156 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1157 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1158 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1159 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1160 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1da177e4
LT		 1161};
1162
1da177e4
LT		 1163static void saa7146_set_winsize(struct saa7146 *saa)
1164{
1165 u32 format;
1166 int offset, yacl, ysci;
1167 saa->win.color_fmt = format =
1168 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
1169 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
1170 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
1171 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
1172 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
1173 saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
1174 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
1175 SAA7146_PROT_ADDR1);
1176 saawrite(0, SAA7146_PAGE1);
f823f679 1177 saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL);
1da177e4
LT		 1178 offset = (704 / (saa->win.width - 1)) & 0x3f;
1179 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
1180 offset = (720896 / saa->win.width) / (offset + 1);
f823f679 1181 saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE);
1da177e4 1182 if (CurrentMode == VIDEO_MODE_NTSC) {
f823f679 1183 yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0;
1da177e4
LT		 1184 ysci = 1024 - (saa->win.height * 1024 / 480);
1185 } else {
f823f679 1186 yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0;
1da177e4
LT		 1187 ysci = 1024 - (saa->win.height * 1024 / 576);
1188 }
f823f679 1189 saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE);
1da177e4
LT		 1190 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
1191 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
f823f679
JS		 1192 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
1193 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2);
1da177e4
LT		 1194}
1195
1196/* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
d56410e0
MCC		 1197 * bitmap is fixed width, 128 bytes (1024 pixels represented)
1198 * arranged most-sigificant-bit-left in 32-bit words
1199 * based on saa7146 clipping hardware, it swaps bytes if LE
1da177e4
LT		 1200 * much of this makes up for egcs brain damage -- so if you
1201 * are wondering "why did he do this?" it is because the C
1202 * was adjusted to generate the optimal asm output without
1203 * writing non-portable __asm__ directives.
1204 */
1205
1206static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
1207{
1208 register int startword, endword;
1209 register u32 bitsleft, bitsright;
1210 u32 *temp;
1211 if (x < 0) {
1212 w += x;
1213 x = 0;
1214 }
1215 if (y < 0) {
1216 h += y;
1217 y = 0;
1218 }
1219 if (w <= 0 || h <= 0 || x > 1023 || y > 639)
1220 return; /* throw away bad clips */
1221 if (x + w > 1024)
1222 w = 1024 - x;
1223 if (y + h > 640)
1224 h = 640 - y;
1225 startword = (x >> 5);
1226 endword = ((x + w) >> 5);
1227 bitsleft = (0xffffffff >> (x & 31));
f823f679
JS		 1228 bitsright = (0xffffffff << (~((x + w) - (endword << 5))));
1229 temp = &clipmap[(y << 5) + startword];
1da177e4
LT		 1230 w = endword - startword;
1231 if (!w) {
1232 bitsleft |= bitsright;
1233 for (y = 0; y < h; y++) {
1234 *temp |= bitsleft;
1235 temp += 32;
1236 }
1237 } else {
1238 for (y = 0; y < h; y++) {
1239 *temp++ |= bitsleft;
1240 for (x = 1; x < w; x++)
1241 *temp++ = 0xffffffff;
1242 *temp |= bitsright;
1243 temp += (32 - w);
1244 }
1245 }
1246}
1247
1248static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
1249{
1250 int i, width, height;
1251 u32 *clipmap;
1252
1253 clipmap = saa->dmavid2;
f823f679
JS		 1254 if ((width = saa->win.width) > 1023)
1255 width = 1023; /* sanity check */
1256 if ((height = saa->win.height) > 640)
1257 height = 639; /* sanity check */
1258 if (ncr > 0) { /* rectangles pased */
1da177e4 1259 /* convert rectangular clips to a bitmap */
f823f679 1260 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
1da177e4
LT		 1261 for (i = 0; i < ncr; i++)
1262 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
1263 cr[i].width, cr[i].height);
1264 }
d56410e0 1265 /* clip against viewing window AND screen
1da177e4
LT		 1266 so we do not have to rely on the user program
1267 */
f823f679
JS		 1268 clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ?
1269 (saa->win.swidth - saa->win.x) : width, 0, 1024, 768);
1270 clip_draw_rectangle(clipmap, 0,
1271 (saa->win.y + height > saa->win.sheight) ?
1272 (saa->win.sheight - saa->win.y) : height, 1024, 768);
1273 if (saa->win.x < 0)
1274 clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768);
1275 if (saa->win.y < 0)
1276 clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y);
1da177e4
LT		 1277}
1278
069b7479 1279static long saa_ioctl(struct file *file,
1da177e4
LT		 1280 unsigned int cmd, unsigned long argl)
1281{
1282 struct saa7146 *saa = file->private_data;
1283 void __user *arg = (void __user *)argl;
1284
1285 switch (cmd) {
1286 case VIDIOCGCAP:
1287 {
1288 struct video_capability b;
ea07a9f2 1289 memset(&b, 0, sizeof(b));
1da177e4 1290 strcpy(b.name, saa->video_dev.name);
f823f679
JS		 1291 b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY |
1292 VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM |
1293 VID_TYPE_SCALES;
1da177e4
LT		 1294 b.channels = 1;
1295 b.audios = 1;
1296 b.maxwidth = 768;
1297 b.maxheight = 576;
1298 b.minwidth = 32;
1299 b.minheight = 32;
1300 if (copy_to_user(arg, &b, sizeof(b)))
1301 return -EFAULT;
1302 return 0;
1303 }
1304 case VIDIOCGPICT:
1305 {
1306 struct video_picture p = saa->picture;
1307 if (saa->win.depth == 8)
1308 p.palette = VIDEO_PALETTE_HI240;
1309 if (saa->win.depth == 15)
1310 p.palette = VIDEO_PALETTE_RGB555;
1311 if (saa->win.depth == 16)
1312 p.palette = VIDEO_PALETTE_RGB565;
1313 if (saa->win.depth == 24)
1314 p.palette = VIDEO_PALETTE_RGB24;
1315 if (saa->win.depth == 32)
1316 p.palette = VIDEO_PALETTE_RGB32;
1317 if (copy_to_user(arg, &p, sizeof(p)))
1318 return -EFAULT;
1319 return 0;
1320 }
1321 case VIDIOCSPICT:
1322 {
1323 struct video_picture p;
1324 u32 format;
1325 if (copy_from_user(&p, arg, sizeof(p)))
1326 return -EFAULT;
ba2cf982 1327 if (p.palette < ARRAY_SIZE(palette2fmt)) {
1da177e4
LT		 1328 format = palette2fmt[p.palette];
1329 saa->win.color_fmt = format;
f823f679
JS		 1330 saawrite(format | 0x60,
1331 SAA7146_CLIP_FORMAT_CTRL);
1da177e4
LT		 1332 }
1333 saawrite(((p.brightness & 0xff00) << 16) |
f823f679
JS		 1334 ((p.contrast & 0xfe00) << 7) |
1335 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
1da177e4
LT		 1336 saa->picture = p;
1337 /* upload changed registers */
1338 saawrite(((SAA7146_MC2_UPLD_HPS_H |
f823f679
JS		 1339 SAA7146_MC2_UPLD_HPS_V) << 16) |
1340 SAA7146_MC2_UPLD_HPS_H |
1341 SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2);
1da177e4
LT		 1342 return 0;
1343 }
1344 case VIDIOCSWIN:
1345 {
1346 struct video_window vw;
1347 struct video_clip *vcp = NULL;
1348
1349 if (copy_from_user(&vw, arg, sizeof(vw)))
1350 return -EFAULT;
1351
f823f679
JS		 1352 /* stop capture */
1353 if (vw.flags || vw.width < 16 || vw.height < 16) {
1354 saawrite((SAA7146_MC1_TR_E_1 << 16),
1355 SAA7146_MC1);
1da177e4
LT		 1356 return -EINVAL;
1357 }
f823f679
JS		 1358 /* 32-bit align start and adjust width */
1359 if (saa->win.bpp < 4) {
1da177e4
LT		 1360 int i = vw.x;
1361 vw.x = (vw.x + 3) & ~3;
1362 i = vw.x - i;
1363 vw.width -= i;
1364 }
1365 saa->win.x = vw.x;
1366 saa->win.y = vw.y;
1367 saa->win.width = vw.width;
1368 if (saa->win.width > 768)
1369 saa->win.width = 768;
1370 saa->win.height = vw.height;
1371 if (CurrentMode == VIDEO_MODE_NTSC) {
1372 if (saa->win.height > 480)
1373 saa->win.height = 480;
1374 } else {
1375 if (saa->win.height > 576)
1376 saa->win.height = 576;
1377 }
1378
1379 /* stop capture */
1380 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1381 saa7146_set_winsize(saa);
1382
1383 /*
1384 * Do any clips.
1385 */
1386 if (vw.clipcount < 0) {
1387 if (copy_from_user(saa->dmavid2, vw.clips,
f823f679 1388 VIDEO_CLIPMAP_SIZE))
1da177e4 1389 return -EFAULT;
f823f679 1390 } else if (vw.clipcount > 16384) {
1da177e4
LT		 1391 return -EINVAL;
1392 } else if (vw.clipcount > 0) {
f823f679
JS		 1393 vcp = vmalloc(sizeof(struct video_clip) *
1394 vw.clipcount);
1395 if (vcp == NULL)
1396 return -ENOMEM;
1da177e4 1397 if (copy_from_user(vcp, vw.clips,
f823f679
JS		 1398 sizeof(struct video_clip) *
1399 vw.clipcount)) {
1da177e4
LT		 1400 vfree(vcp);
1401 return -EFAULT;
1402 }
1403 } else /* nothing clipped */
1404 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
f823f679 1405
1da177e4
LT		 1406 make_clip_tab(saa, vcp, vw.clipcount);
1407 if (vw.clipcount > 0)
1408 vfree(vcp);
1409
1410 /* start capture & clip dma if we have an address */
1411 if ((saa->cap & 3) && saa->win.vidadr != 0)
1412 saawrite(((SAA7146_MC1_TR_E_1 |
1413 SAA7146_MC1_TR_E_2) << 16) | 0xffff,
1414 SAA7146_MC1);
1415 return 0;
1416 }
1417 case VIDIOCGWIN:
1418 {
1419 struct video_window vw;
ea07a9f2 1420 memset(&vw, 0, sizeof(vw));
1da177e4
LT		 1421 vw.x = saa->win.x;
1422 vw.y = saa->win.y;
1423 vw.width = saa->win.width;
1424 vw.height = saa->win.height;
1425 vw.chromakey = 0;
1426 vw.flags = 0;
1427 if (copy_to_user(arg, &vw, sizeof(vw)))
1428 return -EFAULT;
1429 return 0;
1430 }
1431 case VIDIOCCAPTURE:
1432 {
1433 int v;
1434 if (copy_from_user(&v, arg, sizeof(v)))
1435 return -EFAULT;
1436 if (v == 0) {
1437 saa->cap &= ~1;
1438 saawrite((SAA7146_MC1_TR_E_1 << 16),
f823f679 1439 SAA7146_MC1);
1da177e4
LT		 1440 } else {
1441 if (saa->win.vidadr == 0 || saa->win.width == 0
f823f679 1442 || saa->win.height == 0)
1da177e4
LT		 1443 return -EINVAL;
1444 saa->cap |= 1;
1445 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
f823f679 1446 SAA7146_MC1);
1da177e4
LT		 1447 }
1448 return 0;
1449 }
1450 case VIDIOCGFBUF:
1451 {
1452 struct video_buffer v;
ea07a9f2 1453 memset(&v, 0, sizeof(v));
f823f679 1454 v.base = (void *)saa->win.vidadr;
1da177e4
LT		 1455 v.height = saa->win.sheight;
1456 v.width = saa->win.swidth;
1457 v.depth = saa->win.depth;
1458 v.bytesperline = saa->win.bpl;
1459 if (copy_to_user(arg, &v, sizeof(v)))
1460 return -EFAULT;
1461 return 0;
1462
1463 }
1464 case VIDIOCSFBUF:
1465 {
1466 struct video_buffer v;
1467 if (!capable(CAP_SYS_ADMIN))
1468 return -EPERM;
1469 if (copy_from_user(&v, arg, sizeof(v)))
1470 return -EFAULT;
1471 if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
f823f679 1472 v.depth != 24 && v.depth != 32 && v.width > 16 &&
1da177e4
LT		 1473 v.height > 16 && v.bytesperline > 16)
1474 return -EINVAL;
1475 if (v.base)
f823f679 1476 saa->win.vidadr = (unsigned long)v.base;
1da177e4
LT		 1477 saa->win.sheight = v.height;
1478 saa->win.swidth = v.width;
1479 saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
1480 saa->win.depth = v.depth;
1481 saa->win.bpl = v.bytesperline;
1482
f823f679
JS		 1483 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, "
1484 "bpl %d\n", v.base, v.width, v.height,
1485 saa->win.bpp, saa->win.bpl));
1da177e4
LT		 1486 saa7146_set_winsize(saa);
1487 return 0;
1488 }
1489 case VIDIOCKEY:
1490 {
1491 /* Will be handled higher up .. */
1492 return 0;
1493 }
1494
1495 case VIDIOCGAUDIO:
1496 {
1497 struct video_audio v;
ea07a9f2 1498 memset(&v, 0, sizeof(v));
1da177e4
LT		 1499 v = saa->audio_dev;
1500 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
1501 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
1502 strcpy(v.name, "MPEG");
1503 v.mode = VIDEO_SOUND_STEREO;
1504 if (copy_to_user(arg, &v, sizeof(v)))
1505 return -EFAULT;
1506 return 0;
1507 }
1508 case VIDIOCSAUDIO:
1509 {
1510 struct video_audio v;
1511 int i;
1512 if (copy_from_user(&v, arg, sizeof(v)))
1513 return -EFAULT;
f823f679 1514 i = (~(v.volume >> 8)) & 0xff;
1da177e4 1515 if (!HaveCS4341) {
f823f679 1516 if (v.flags & VIDEO_AUDIO_MUTE)
1da177e4 1517 debiwrite(saa, debNormal,
f823f679 1518 IBM_MP2_FRNT_ATTEN, 0xffff, 2);
1da177e4
LT		 1519 if (!(v.flags & VIDEO_AUDIO_MUTE))
1520 debiwrite(saa, debNormal,
f823f679 1521 IBM_MP2_FRNT_ATTEN, 0x0000, 2);
1da177e4
LT		 1522 if (v.flags & VIDEO_AUDIO_VOLUME)
1523 debiwrite(saa, debNormal,
1524 IBM_MP2_FRNT_ATTEN,
f823f679 1525 (i << 8) | i, 2);
1da177e4
LT		 1526 } else {
1527 if (v.flags & VIDEO_AUDIO_MUTE)
1528 cs4341_setlevel(saa, 0xff, 0xff);
1529 if (!(v.flags & VIDEO_AUDIO_MUTE))
1530 cs4341_setlevel(saa, 0, 0);
1531 if (v.flags & VIDEO_AUDIO_VOLUME)
1532 cs4341_setlevel(saa, i, i);
1533 }
1534 saa->audio_dev = v;
1535 return 0;
1536 }
1537
1538 case VIDIOCGUNIT:
1539 {
1540 struct video_unit vu;
ea07a9f2 1541 memset(&vu, 0, sizeof(vu));
1da177e4
LT		 1542 vu.video = saa->video_dev.minor;
1543 vu.vbi = VIDEO_NO_UNIT;
1544 vu.radio = VIDEO_NO_UNIT;
1545 vu.audio = VIDEO_NO_UNIT;
1546 vu.teletext = VIDEO_NO_UNIT;
1547 if (copy_to_user(arg, &vu, sizeof(vu)))
1548 return -EFAULT;
1549 return 0;
1550 }
1551 case VIDIOCSPLAYMODE:
1552 {
1553 struct video_play_mode pmode;
f823f679
JS		 1554 if (copy_from_user((void *)&pmode, arg,
1555 sizeof(struct video_play_mode)))
1da177e4
LT		 1556 return -EFAULT;
1557 switch (pmode.mode) {
f823f679
JS		 1558 case VID_PLAY_VID_OUT_MODE:
1559 if (pmode.p1 != VIDEO_MODE_NTSC &&
1da177e4 1560 pmode.p1 != VIDEO_MODE_PAL)
f823f679
JS		 1561 return -EINVAL;
1562 set_out_format(saa, pmode.p1);
1563 return 0;
1564 case VID_PLAY_GENLOCK:
1565 debiwrite(saa, debNormal, XILINX_CTL0,
1566 pmode.p1 ? 0x8000 : 0x8080, 2);
1567 if (NewCard)
1568 set_genlock_offset(saa, pmode.p2);
1569 return 0;
1570 case VID_PLAY_NORMAL:
1571 debiwrite(saa, debNormal,
1572 IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1573 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1574 saa->playmode = pmode.mode;
1575 return 0;
1576 case VID_PLAY_PAUSE:
1577 /* IBM removed the PAUSE command */
1578 /* they say use SINGLE_FRAME now */
1579 case VID_PLAY_SINGLE_FRAME:
1580 ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0);
1581 if (saa->playmode == pmode.mode) {
1da177e4
LT		 1582 debiwrite(saa, debNormal,
1583 IBM_MP2_CHIP_CONTROL,
1584 ChipControl, 2);
f823f679
JS		 1585 }
1586 saa->playmode = pmode.mode;
1587 return 0;
1588 case VID_PLAY_FAST_FORWARD:
1589 ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0);
1590 saa->playmode = pmode.mode;
1591 return 0;
1592 case VID_PLAY_SLOW_MOTION:
1593 ibm_send_command(saa, IBM_MP2_SLOW_MOTION,
1594 pmode.p1, 0);
1595 saa->playmode = pmode.mode;
1596 return 0;
1597 case VID_PLAY_IMMEDIATE_NORMAL:
1598 /* ensure transfers resume */
1599 debiwrite(saa, debNormal,
1600 IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1601 ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY,
1602 0, 0);
1603 saa->playmode = VID_PLAY_NORMAL;
1604 return 0;
1605 case VID_PLAY_SWITCH_CHANNELS:
1606 saa->audhead = saa->audtail = 0;
1607 saa->vidhead = saa->vidtail = 0;
1608 ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1);
1609 ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE,
1610 0, 1);
1611 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1612 0, 2);
1613 ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH,
1614 0, 1);
1615 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1616 ChipControl, 2);
1617 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1618 saa->playmode = VID_PLAY_NORMAL;
1619 return 0;
1620 case VID_PLAY_FREEZE_FRAME:
1621 ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0);
1622 saa->playmode = pmode.mode;
1623 return 0;
1624 case VID_PLAY_STILL_MODE:
1625 ibm_send_command(saa, IBM_MP2_SET_STILL_MODE,
1626 0, 0);
1627 saa->playmode = pmode.mode;
1628 return 0;
1629 case VID_PLAY_MASTER_MODE:
1630 if (pmode.p1 == VID_PLAY_MASTER_NONE)
1631 saa->boardcfg[1] = 0x13;
1632 else if (pmode.p1 == VID_PLAY_MASTER_VIDEO)
1633 saa->boardcfg[1] = 0x23;
1634 else if (pmode.p1 == VID_PLAY_MASTER_AUDIO)
1635 saa->boardcfg[1] = 0x43;
1636 else
1637 return -EINVAL;
1638 debiwrite(saa, debNormal,
1639 IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1640 return 0;
1641 case VID_PLAY_ACTIVE_SCANLINES:
1642 if (CurrentMode == VIDEO_MODE_PAL) {
1643 if (pmode.p1 < 1 || pmode.p2 > 625)
1da177e4 1644 return -EINVAL;
f823f679
JS		 1645 saa->boardcfg[5] = pmode.p1;
1646 saa->boardcfg[55] = (pmode.p1 +
1647 (pmode.p2 / 2) - 1) & 0xff;
1648 } else {
1649 if (pmode.p1 < 4 || pmode.p2 > 525)
1650 return -EINVAL;
1651 saa->boardcfg[4] = pmode.p1;
1652 saa->boardcfg[54] = (pmode.p1 +
1653 (pmode.p2 / 2) - 4) & 0xff;
1654 }
1655 set_out_format(saa, CurrentMode);
1656 case VID_PLAY_RESET:
1657 return do_ibm_reset(saa);
1658 case VID_PLAY_END_MARK:
1659 if (saa->endmarktail < saa->endmarkhead) {
1660 if (saa->endmarkhead -
1da177e4 1661 saa->endmarktail < 2)
1da177e4 1662 return -ENOSPC;
f823f679
JS		 1663 } else if (saa->endmarkhead <=saa->endmarktail){
1664 if (saa->endmarktail - saa->endmarkhead
1665 > (MAX_MARKS - 2))
1666 return -ENOSPC;
1667 } else
1668 return -ENOSPC;
1669 saa->endmark[saa->endmarktail] = saa->audtail;
1670 saa->endmarktail++;
1671 if (saa->endmarktail >= MAX_MARKS)
1672 saa->endmarktail = 0;
1da177e4
LT		 1673 }
1674 return -EINVAL;
1675 }
1676 case VIDIOCSWRITEMODE:
1677 {
1678 int mode;
f823f679
JS		 1679 if (copy_from_user((void *)&mode, arg, sizeof(int)))
1680 return -EFAULT;
1da177e4 1681 if (mode == VID_WRITE_MPEG_AUD ||
f823f679
JS		 1682 mode == VID_WRITE_MPEG_VID ||
1683 mode == VID_WRITE_CC ||
1684 mode == VID_WRITE_TTX ||
1685 mode == VID_WRITE_OSD) {
1da177e4
LT		 1686 saa->writemode = mode;
1687 return 0;
1688 }
1689 return -EINVAL;
1690 }
1691 case VIDIOCSMICROCODE:
1692 {
1693 struct video_code ucode;
1694 __u8 *udata;
1695 int i;
1696 if (copy_from_user(&ucode, arg, sizeof(ucode)))
1697 return -EFAULT;
1698 if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
f823f679 1699 strncmp(ucode.loadwhat, "dec", 3))
1da177e4
LT		 1700 return -EINVAL;
1701 if ((udata = vmalloc(ucode.datasize)) == NULL)
1702 return -ENOMEM;
1703 if (copy_from_user(udata, ucode.data, ucode.datasize)) {
1704 vfree(udata);
1705 return -EFAULT;
1706 }
1707 ucode.data = udata;
f823f679
JS		 1708 if (!strncmp(ucode.loadwhat, "decoder.aud", 11) ||
1709 !strncmp(ucode.loadwhat, "decoder.vid", 11))
1da177e4
LT		 1710 i = initialize_ibmmpeg2(&ucode);
1711 else
1712 i = initialize_fpga(&ucode);
1713 vfree(udata);
1714 if (i)
1715 return -EINVAL;
1716 return 0;
1717
1718 }
1719 case VIDIOCGCHAN: /* this makes xawtv happy */
1720 {
1721 struct video_channel v;
1722 if (copy_from_user(&v, arg, sizeof(v)))
1723 return -EFAULT;
1724 v.flags = VIDEO_VC_AUDIO;
1725 v.tuners = 0;
1726 v.type = VID_TYPE_MPEG_DECODER;
1727 v.norm = CurrentMode;
1728 strcpy(v.name, "MPEG2");
1729 if (copy_to_user(arg, &v, sizeof(v)))
1730 return -EFAULT;
1731 return 0;
1732 }
1733 case VIDIOCSCHAN: /* this makes xawtv happy */
1734 {
1735 struct video_channel v;
1736 if (copy_from_user(&v, arg, sizeof(v)))
1737 return -EFAULT;
1738 /* do nothing */
1739 return 0;
1740 }
1741 default:
1742 return -ENOIOCTLCMD;
1743 }
1744 return 0;
1745}
1746
1747static int saa_mmap(struct file *file, struct vm_area_struct *vma)
1748{
1749 struct saa7146 *saa = file->private_data;
1750 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
1751 return -EINVAL;
1752}
1753
f823f679
JS		 1754static ssize_t saa_read(struct file *file, char __user * buf,
1755 size_t count, loff_t * ppos)
1da177e4
LT		 1756{
1757 return -EINVAL;
1758}
1759
f823f679
JS		 1760static ssize_t saa_write(struct file *file, const char __user * buf,
1761 size_t count, loff_t * ppos)
1da177e4
LT		 1762{
1763 struct saa7146 *saa = file->private_data;
1764 unsigned long todo = count;
1765 int blocksize, split;
1766 unsigned long flags;
1767
1768 while (todo > 0) {
1769 if (saa->writemode == VID_WRITE_MPEG_AUD) {
1770 spin_lock_irqsave(&saa->lock, flags);
1771 if (saa->audhead <= saa->audtail)
f823f679
JS		 1772 blocksize = 65536 -
1773 (saa->audtail - saa->audhead);
1da177e4
LT		 1774 else
1775 blocksize = saa->audhead - saa->audtail;
1776 spin_unlock_irqrestore(&saa->lock, flags);
1777 if (blocksize < 16384) {
1778 saawrite(SAA7146_PSR_DEBI_S |
f823f679 1779 SAA7146_PSR_PIN1, SAA7146_IER);
1da177e4
LT		 1780 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1781 /* wait for buffer space to open */
1782 interruptible_sleep_on(&saa->audq);
1783 }
1784 spin_lock_irqsave(&saa->lock, flags);
1785 if (saa->audhead <= saa->audtail) {
f823f679
JS		 1786 blocksize = 65536 -
1787 (saa->audtail - saa->audhead);
1da177e4
LT		 1788 split = 65536 - saa->audtail;
1789 } else {
1790 blocksize = saa->audhead - saa->audtail;
1791 split = 65536;
1792 }
1793 spin_unlock_irqrestore(&saa->lock, flags);
1794 blocksize--;
1795 if (blocksize > todo)
1796 blocksize = todo;
1797 /* double check that we really have space */
1798 if (!blocksize)
1799 return -ENOSPC;
1800 if (split < blocksize) {
1801 if (copy_from_user(saa->audbuf +
f823f679 1802 saa->audtail, buf, split))
1da177e4
LT		 1803 return -EFAULT;
1804 buf += split;
1805 todo -= split;
1806 blocksize -= split;
1807 saa->audtail = 0;
1808 }
1809 if (copy_from_user(saa->audbuf + saa->audtail, buf,
f823f679 1810 blocksize))
1da177e4
LT		 1811 return -EFAULT;
1812 saa->audtail += blocksize;
1813 todo -= blocksize;
1814 buf += blocksize;
1815 saa->audtail &= 0xffff;
1816 } else if (saa->writemode == VID_WRITE_MPEG_VID) {
1817 spin_lock_irqsave(&saa->lock, flags);
1818 if (saa->vidhead <= saa->vidtail)
f823f679
JS		 1819 blocksize = 524288 -
1820 (saa->vidtail - saa->vidhead);
1da177e4
LT		 1821 else
1822 blocksize = saa->vidhead - saa->vidtail;
1823 spin_unlock_irqrestore(&saa->lock, flags);
1824 if (blocksize < 65536) {
1825 saawrite(SAA7146_PSR_DEBI_S |
f823f679 1826 SAA7146_PSR_PIN1, SAA7146_IER);
1da177e4
LT		 1827 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1828 /* wait for buffer space to open */
1829 interruptible_sleep_on(&saa->vidq);
1830 }
1831 spin_lock_irqsave(&saa->lock, flags);
1832 if (saa->vidhead <= saa->vidtail) {
f823f679
JS		 1833 blocksize = 524288 -
1834 (saa->vidtail - saa->vidhead);
1da177e4
LT		 1835 split = 524288 - saa->vidtail;
1836 } else {
1837 blocksize = saa->vidhead - saa->vidtail;
1838 split = 524288;
1839 }
1840 spin_unlock_irqrestore(&saa->lock, flags);
1841 blocksize--;
1842 if (blocksize > todo)
1843 blocksize = todo;
1844 /* double check that we really have space */
1845 if (!blocksize)
1846 return -ENOSPC;
1847 if (split < blocksize) {
1848 if (copy_from_user(saa->vidbuf +
f823f679 1849 saa->vidtail, buf, split))
1da177e4
LT		 1850 return -EFAULT;
1851 buf += split;
1852 todo -= split;
1853 blocksize -= split;
1854 saa->vidtail = 0;
1855 }
1856 if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
f823f679 1857 blocksize))
1da177e4
LT		 1858 return -EFAULT;
1859 saa->vidtail += blocksize;
1860 todo -= blocksize;
1861 buf += blocksize;
1862 saa->vidtail &= 0x7ffff;
1863 } else if (saa->writemode == VID_WRITE_OSD) {
1864 if (count > 131072)
1865 return -ENOSPC;
1866 if (copy_from_user(saa->osdbuf, buf, count))
1867 return -EFAULT;
1868 buf += count;
1869 saa->osdhead = 0;
1870 saa->osdtail = count;
1871 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
1872 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
1873 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
1874 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
f823f679
JS		 1875 debiread(saa, debNormal,
1876 IBM_MP2_DISP_MODE, 2) | 1, 2);
1da177e4
LT		 1877 /* trigger osd data transfer */
1878 saawrite(SAA7146_PSR_DEBI_S |
1879 SAA7146_PSR_PIN1, SAA7146_IER);
1880 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1881 }
1882 }
1883 return count;
1884}
1885
bec43661 1886static int saa_open(struct file *file)
1da177e4 1887{
91fb8357
JS		 1888 struct video_device *vdev = video_devdata(file);
1889 struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev);
1da177e4 1890
d56dc612 1891 lock_kernel();
1da177e4
LT		 1892 file->private_data = saa;
1893
1da177e4 1894 saa->user++;
d56dc612 1895 if (saa->user > 1) {
ea07a9f2 1896 saa->user--;
d56dc612 1897 unlock_kernel();
1da177e4 1898 return 0; /* device open already, don't reset */
d56dc612 1899 }
1da177e4 1900 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
d56dc612 1901 unlock_kernel();
1da177e4
LT		 1902 return 0;
1903}
1904
bec43661 1905static int saa_release(struct file *file)
1da177e4
LT		 1906{
1907 struct saa7146 *saa = file->private_data;
1908 saa->user--;
91fb8357 1909
1da177e4
LT		 1910 if (saa->user > 0) /* still someone using device */
1911 return 0;
1912 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
1913 return 0;
1914}
1915
bec43661 1916static const struct v4l2_file_operations saa_fops = {
f823f679
JS		 1917 .owner = THIS_MODULE,
1918 .open = saa_open,
1919 .release = saa_release,
1920 .ioctl = saa_ioctl,
f823f679 1921 .read = saa_read,
f823f679
JS		 1922 .write = saa_write,
1923 .mmap = saa_mmap,
1da177e4
LT		 1924};
1925
1926/* template for video_device-structure */
f823f679
JS		 1927static struct video_device saa_template = {
1928 .name = "SAA7146A",
f823f679 1929 .fops = &saa_fops,
aa5e90af 1930 .release = video_device_release_empty,
1da177e4
LT		 1931};
1932
9ae82293 1933static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
1da177e4 1934{
91fb8357
JS		 1935 int retval;
1936 struct saa7146 *saa = pci_get_drvdata(pdev);
f823f679 1937
1da177e4
LT		 1938 saa->endmarkhead = saa->endmarktail = 0;
1939 saa->win.x = saa->win.y = 0;
1940 saa->win.width = saa->win.cropwidth = 720;
1941 saa->win.height = saa->win.cropheight = 480;
1942 saa->win.cropx = saa->win.cropy = 0;
1943 saa->win.bpp = 2;
1944 saa->win.depth = 16;
1945 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
1946 saa->win.bpl = 1024 * saa->win.bpp;
1947 saa->win.swidth = 1024;
1948 saa->win.sheight = 768;
1949 saa->picture.brightness = 32768;
1950 saa->picture.contrast = 38768;
1951 saa->picture.colour = 32768;
1952 saa->cap = 0;
1da177e4
LT		 1953 saa->nr = num;
1954 saa->playmode = VID_PLAY_NORMAL;
1955 memset(saa->boardcfg, 0, 64); /* clear board config area */
1956 saa->saa7146_mem = NULL;
1957 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
1958 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
1959 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
1960 saa->pagea1out = saa->pagea2in = saa->pagea2out =
1961 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
1962 saa->pageRPS2 = NULL;
1963 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
1964 saa->audhead = saa->vidtail = 0;
1965
1966 init_waitqueue_head(&saa->i2cq);
1967 init_waitqueue_head(&saa->audq);
1968 init_waitqueue_head(&saa->debiq);
1969 init_waitqueue_head(&saa->vidq);
1970 spin_lock_init(&saa->lock);
1971
91fb8357
JS		 1972 retval = pci_enable_device(pdev);
1973 if (retval) {
1974 dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num);
1975 goto err;
1976 }
f823f679 1977
9ae82293
JS		 1978 saa->id = pdev->device;
1979 saa->irq = pdev->irq;
9ae82293
JS		 1980 saa->saa7146_adr = pci_resource_start(pdev, 0);
1981 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
1da177e4
LT		 1982
1983 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
91fb8357
JS		 1984 if (saa->saa7146_mem == NULL) {
1985 dev_err(&pdev->dev, "%d: ioremap failed!\n", num);
1986 retval = -EIO;
1987 goto err;
1988 }
1da177e4
LT		 1989
1990 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
1991 saawrite(0, SAA7146_IER); /* turn off all interrupts */
91fb8357 1992
8076fe32 1993 retval = request_irq(saa->irq, saa7146_irq, IRQF_SHARED | IRQF_DISABLED,
91fb8357
JS		 1994 "stradis", saa);
1995 if (retval == -EINVAL)
9ae82293 1996 dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num);
91fb8357 1997 else if (retval == -EBUSY)
9ae82293
JS		 1998 dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config "
1999 "in BIOS\n", num, saa->irq);
91fb8357
JS		 2000 if (retval < 0)
2001 goto errio;
2002
9ae82293 2003 pci_set_master(pdev);
91fb8357
JS		 2004 retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER,
2005 video_nr);
f823f679 2006 if (retval < 0) {
91fb8357
JS		 2007 dev_err(&pdev->dev, "%d: error in registering video device!\n",
2008 num);
ea07a9f2 2009 goto errirq;
1da177e4 2010 }
91fb8357 2011
1da177e4 2012 return 0;
ea07a9f2
VK		 2013
2014errirq:
2015 free_irq(saa->irq, saa);
91fb8357
JS		 2016errio:
2017 iounmap(saa->saa7146_mem);
2018err:
2019 return retval;
1da177e4
LT		 2020}
2021
91fb8357 2022static int __devinit init_saa7146(struct pci_dev *pdev)
1da177e4 2023{
91fb8357 2024 struct saa7146 *saa = pci_get_drvdata(pdev);
1da177e4
LT		 2025
2026 saa->user = 0;
2027 /* reset the saa7146 */
2028 saawrite(0xffff0000, SAA7146_MC1);
2029 mdelay(5);
2030 /* enable debi and i2c transfers and pins */
2031 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
2032 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
2033 /* ensure proper state of chip */
2034 saawrite(0x00000000, SAA7146_PAGE1);
2035 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
2036 saawrite(0x00000000, SAA7146_PAGE2);
2037 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
2038 saawrite(0x00000000, SAA7146_DD1_INIT);
2039 saawrite(0x00000000, SAA7146_DD1_STREAM_B);
2040 saawrite(0x00000000, SAA7146_DD1_STREAM_A);
2041 saawrite(0x00000000, SAA7146_BRS_CTRL);
2042 saawrite(0x80400040, SAA7146_BCS_CTRL);
f823f679 2043 saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL);
1da177e4
LT		 2044 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
2045 saawrite(0x00000000, SAA7146_ACON1);
2046 saawrite(0x00000000, SAA7146_ACON2);
2047 saawrite(0x00000600, SAA7146_I2C_STATUS);
2048 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
f823f679
JS		 2049 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
2050 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
2051 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
2052 SAA7146_MC2);
1da177e4
LT		 2053 /* setup arbitration control registers */
2054 saawrite(0x1412121a, SAA7146_PCI_BT_V1);
2055
2056 /* allocate 32k dma buffer + 4k for page table */
2057 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
91fb8357
JS		 2058 dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr);
2059 goto err;
1da177e4
LT		 2060 }
2061#if 0
2062 saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
2063 saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
2064 for (i = 0; i < 12; i++) /* setup mmu page table */
2065 saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
2066#endif
2067 saa->audhead = saa->vidhead = saa->osdhead = 0;
2068 saa->audtail = saa->vidtail = saa->osdtail = 0;
91fb8357
JS		 2069 if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) {
2070 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
2071 goto err;
2072 }
2073 if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) {
2074 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
805f123d 2075 goto errfree;
91fb8357
JS		 2076 }
2077 if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) {
2078 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
805f123d 2079 goto errfree;
91fb8357 2080 }
1da177e4 2081 /* allocate 81920 byte buffer for clipping */
91fb8357
JS		 2082 if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
2083 dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr);
805f123d 2084 goto errfree;
1da177e4 2085 }
1da177e4
LT		 2086 /* setup clipping registers */
2087 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
2088 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
2089 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
f823f679 2090 SAA7146_PROT_ADDR2);
1da177e4 2091 saawrite(256, SAA7146_PITCH2);
f823f679 2092 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
1da177e4
LT		 2093 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
2094 SAA7146_MC2);
2095 I2CBusScan(saa);
91fb8357 2096
1da177e4 2097 return 0;
805f123d 2098errfree:
91fb8357 2099 vfree(saa->osdbuf);
91fb8357 2100 vfree(saa->audbuf);
91fb8357 2101 vfree(saa->vidbuf);
805f123d 2102 saa->audbuf = saa->osdbuf = saa->vidbuf = NULL;
91fb8357
JS		 2103err:
2104 return -ENOMEM;
1da177e4
LT		 2105}
2106
9ae82293 2107static void stradis_release_saa(struct pci_dev *pdev)
1da177e4
LT		 2108{
2109 u8 command;
91fb8357 2110 struct saa7146 *saa = pci_get_drvdata(pdev);
1da177e4 2111
9ae82293
JS		 2112 /* turn off all capturing, DMA and IRQs */
2113 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
2114 saawrite(0, SAA7146_MC2);
2115 saawrite(0, SAA7146_IER);
2116 saawrite(0xffffffffUL, SAA7146_ISR);
2117
2118 /* disable PCI bus-mastering */
2119 pci_read_config_byte(pdev, PCI_COMMAND, &command);
2120 command &= ~PCI_COMMAND_MASTER;
2121 pci_write_config_byte(pdev, PCI_COMMAND, command);
2122
2123 /* unmap and free memory */
2124 saa->audhead = saa->audtail = saa->osdhead = 0;
2125 saa->vidhead = saa->vidtail = saa->osdtail = 0;
2126 vfree(saa->vidbuf);
2127 vfree(saa->audbuf);
2128 vfree(saa->osdbuf);
2129 kfree(saa->dmavid2);
2130 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
2131 saa->dmavid2 = NULL;
2132 kfree(saa->dmadebi);
2133 kfree(saa->dmavid1);
2134 kfree(saa->dmavid3);
2135 kfree(saa->dmaa1in);
2136 kfree(saa->dmaa1out);
2137 kfree(saa->dmaa2in);
2138 kfree(saa->dmaa2out);
2139 kfree(saa->dmaRPS1);
2140 kfree(saa->dmaRPS2);
2141 free_irq(saa->irq, saa);
2142 if (saa->saa7146_mem)
2143 iounmap(saa->saa7146_mem);
f0813b4c 2144 if (video_is_registered(&saa->video_dev))
9ae82293
JS		 2145 video_unregister_device(&saa->video_dev);
2146}
1da177e4 2147
9ae82293
JS		 2148static int __devinit stradis_probe(struct pci_dev *pdev,
2149 const struct pci_device_id *ent)
2150{
2151 int retval = -EINVAL;
1da177e4 2152
9ae82293
JS		 2153 if (saa_num >= SAA7146_MAX)
2154 goto err;
1da177e4 2155
9ae82293
JS		 2156 if (!pdev->subsystem_vendor)
2157 dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num);
2158 else
2159 dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num);
2160
91fb8357 2161 pci_set_drvdata(pdev, &saa7146s[saa_num]);
9ae82293
JS		 2162
2163 retval = configure_saa7146(pdev, saa_num);
2164 if (retval) {
2165 dev_err(&pdev->dev, "%d: error in configuring\n", saa_num);
2166 goto err;
2167 }
2168
91fb8357 2169 if (init_saa7146(pdev) < 0) {
9ae82293
JS		 2170 dev_err(&pdev->dev, "%d: error in initialization\n", saa_num);
2171 retval = -EIO;
2172 goto errrel;
1da177e4 2173 }
9ae82293
JS		 2174
2175 saa_num++;
2176
2177 return 0;
2178errrel:
2179 stradis_release_saa(pdev);
2180err:
2181 return retval;
1da177e4
LT		 2182}
2183
9ae82293
JS		 2184static void __devexit stradis_remove(struct pci_dev *pdev)
2185{
2186 stradis_release_saa(pdev);
2187}
2188
2189static struct pci_device_id stradis_pci_tbl[] = {
2190 { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) },
2191 { 0 }
2192};
f823f679 2193
9ae82293
JS		 2194
2195static struct pci_driver stradis_driver = {
f823f679
JS		 2196 .name = "stradis",
2197 .id_table = stradis_pci_tbl,
2198 .probe = stradis_probe,
2199 .remove = __devexit_p(stradis_remove)
9ae82293 2200};
1da177e4 2201
b9553d7b 2202static int __init stradis_init(void)
1da177e4 2203{
9ae82293 2204 int retval;
1da177e4
LT		 2205
2206 saa_num = 0;
2207
9ae82293
JS		 2208 retval = pci_register_driver(&stradis_driver);
2209 if (retval)
2210 printk(KERN_ERR "stradis: Unable to register pci driver.\n");
2211
2212 return retval;
1da177e4
LT		 2213}
2214
b9553d7b 2215static void __exit stradis_exit(void)
1da177e4 2216{
9ae82293 2217 pci_unregister_driver(&stradis_driver);
1da177e4
LT		 2218 printk(KERN_INFO "stradis: module cleanup complete\n");
2219}
2220
1da177e4
LT		 2221module_init(stradis_init);
2222module_exit(stradis_exit);
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