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staging: rtl8192su: move to EEPROM_93CX
[net-next-2.6.git] / drivers / staging / rtl8192su / r8192U_core.c
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5f53d8ca
JC		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 * Linux device driver for RTL8192U
4 *
5 * Based on the r8187 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
d1aed899 27#include <linux/vmalloc.h>
5a0e3ad6 28#include <linux/slab.h>
e3133b28 29#include <linux/eeprom_93cx6.h>
5f53d8ca
JC		 30
31#undef LOOP_TEST
32#undef DUMP_RX
33#undef DUMP_TX
34#undef DEBUG_TX_DESC2
35#undef RX_DONT_PASS_UL
36#undef DEBUG_EPROM
37#undef DEBUG_RX_VERBOSE
38#undef DUMMY_RX
39#undef DEBUG_ZERO_RX
40#undef DEBUG_RX_SKB
41#undef DEBUG_TX_FRAG
42#undef DEBUG_RX_FRAG
43#undef DEBUG_TX_FILLDESC
44#undef DEBUG_TX
45#undef DEBUG_IRQ
46#undef DEBUG_RX
47#undef DEBUG_RXALLOC
48#undef DEBUG_REGISTERS
49#undef DEBUG_RING
50#undef DEBUG_IRQ_TASKLET
51#undef DEBUG_TX_ALLOC
52#undef DEBUG_TX_DESC
53
54#define CONFIG_RTL8192_IO_MAP
55
5f53d8ca
JC		 56#include <asm/uaccess.h>
57#include "r8192U.h"
5f53d8ca
JC		 58#include "r8192U_wx.h"
59
60#include "r8192S_rtl8225.h"
61#include "r8192S_hw.h"
62#include "r8192S_phy.h"
63#include "r8192S_phyreg.h"
64#include "r8192S_Efuse.h"
65
66#include "r819xU_cmdpkt.h"
67#include "r8192U_dm.h"
68//#include "r8192xU_phyreg.h"
69#include <linux/usb.h>
5f53d8ca 70
5f53d8ca 71#include "r8192U_pm.h"
5f53d8ca 72
2a7d71ad 73#include "ieee80211/dot11d.h"
5f53d8ca 74
5f53d8ca
JC		 75
76
5f53d8ca
JC		 77u32 rt_global_debug_component = \
78// COMP_TRACE |
79// COMP_DBG |
80// COMP_INIT |
81// COMP_RECV |
82// COMP_SEND |
83// COMP_IO |
84 COMP_POWER |
85// COMP_EPROM |
86 COMP_SWBW |
87 COMP_POWER_TRACKING |
88 COMP_TURBO |
89 COMP_QOS |
90// COMP_RATE |
91// COMP_RM |
92 COMP_DIG |
93// COMP_EFUSE |
94// COMP_CH |
95// COMP_TXAGC |
96 COMP_HIPWR |
97// COMP_HALDM |
98 COMP_SEC |
99 COMP_LED |
100// COMP_RF |
101// COMP_RXDESC |
102 COMP_FIRMWARE |
103 COMP_HT |
104 COMP_AMSDU |
105 COMP_SCAN |
106// COMP_CMD |
107 COMP_DOWN |
108 COMP_RESET |
109 COMP_ERR; //always open err flags on
5f53d8ca
JC		 110
111#define TOTAL_CAM_ENTRY 32
112#define CAM_CONTENT_COUNT 8
113
a457732b 114static const struct usb_device_id rtl8192_usb_id_tbl[] = {
5f53d8ca
JC		 115 /* Realtek */
116 {USB_DEVICE(0x0bda, 0x8192)},
117 {USB_DEVICE(0x0bda, 0x8709)},
118 /* Corega */
119 {USB_DEVICE(0x07aa, 0x0043)},
120 /* Belkin */
121 {USB_DEVICE(0x050d, 0x805E)},
122 /* Sitecom */
123 {USB_DEVICE(0x0df6, 0x0031)},
124 /* EnGenius */
125 {USB_DEVICE(0x1740, 0x9201)},
126 /* Dlink */
127 {USB_DEVICE(0x2001, 0x3301)},
128 /* Zinwell */
129 {USB_DEVICE(0x5a57, 0x0290)},
488d3749
SG		 130 /* Guillemot */
131 {USB_DEVICE(0x06f8, 0xe031)},
5f53d8ca
JC		 132 //92SU
133 {USB_DEVICE(0x0bda, 0x8172)},
134 {}
135};
136
137MODULE_LICENSE("GPL");
5f53d8ca 138MODULE_VERSION("V 1.1");
5f53d8ca
JC		 139MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
140MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
141
142static char* ifname = "wlan%d";
5f53d8ca
JC		 143static int hwwep = 1; //default use hw. set 0 to use software security
144static int channels = 0x3fff;
145
146
147
5f53d8ca
JC		 148module_param(ifname, charp, S_IRUGO|S_IWUSR );
149//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
150module_param(hwwep,int, S_IRUGO|S_IWUSR);
151module_param(channels,int, S_IRUGO|S_IWUSR);
5f53d8ca
JC		 152
153MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
154//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
155MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
156MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
157
5f53d8ca
JC		 158static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
159 const struct usb_device_id *id);
160static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
5f53d8ca
JC		 161
162static struct usb_driver rtl8192_usb_driver = {
5f53d8ca
JC		 163 .name = RTL819xU_MODULE_NAME, /* Driver name */
164 .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */
165 .probe = rtl8192_usb_probe, /* probe fn */
166 .disconnect = rtl8192_usb_disconnect, /* remove fn */
5f53d8ca
JC		 167 .suspend = rtl8192U_suspend, /* PM suspend fn */
168 .resume = rtl8192U_resume, /* PM resume fn */
5f53d8ca 169 .reset_resume = rtl8192U_resume, /* PM reset resume fn */
5f53d8ca
JC		 170};
171
172
5f53d8ca
JC		 173static void rtl8192SU_read_eeprom_info(struct net_device *dev);
174short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
175void rtl8192SU_rx_nomal(struct sk_buff* skb);
176void rtl8192SU_rx_cmd(struct sk_buff *skb);
177bool rtl8192SU_adapter_start(struct net_device *dev);
178short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
179void rtl8192SU_link_change(struct net_device *dev);
180void InitialGain8192S(struct net_device *dev,u8 Operation);
181void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
182
183struct rtl819x_ops rtl8192su_ops = {
184 .nic_type = NIC_8192SU,
185 .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
186 .rtl819x_tx = rtl8192SU_tx,
187 .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
188 .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
189 .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
190 .rtl819x_adapter_start = rtl8192SU_adapter_start,
191 .rtl819x_link_change = rtl8192SU_link_change,
192 .rtl819x_initial_gain = InitialGain8192S,
193 .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
194};
5f53d8ca 195
5f53d8ca
JC		 196
197typedef struct _CHANNEL_LIST
198{
199 u8 Channel[32];
200 u8 Len;
201}CHANNEL_LIST, *PCHANNEL_LIST;
202
203static CHANNEL_LIST ChannelPlan[] = {
204 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
205 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
206 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
207 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
208 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
209 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
210 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
211 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
212 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
213 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
214 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
215};
216
e3133b28
FS		 217static void rtl819x_eeprom_register_read(struct eeprom_93cx6 *eeprom)
218{
219 struct net_device *dev = eeprom->data;
220 u8 reg = read_nic_byte(dev, EPROM_CMD);
221
222 eeprom->reg_data_in = reg & RTL819X_EEPROM_CMD_WRITE;
223 eeprom->reg_data_out = reg & RTL819X_EEPROM_CMD_READ;
224 eeprom->reg_data_clock = reg & RTL819X_EEPROM_CMD_CK;
225 eeprom->reg_chip_select = reg & RTL819X_EEPROM_CMD_CS;
226}
227
228static void rtl819x_eeprom_register_write(struct eeprom_93cx6 *eeprom)
229{
230 struct net_device *dev = eeprom->data;
231 u8 reg = 2 << 6;
232
233 if (eeprom->reg_data_in)
234 reg |= RTL819X_EEPROM_CMD_WRITE;
235 if (eeprom->reg_data_out)
236 reg |= RTL819X_EEPROM_CMD_READ;
237 if (eeprom->reg_data_clock)
238 reg |= RTL819X_EEPROM_CMD_CK;
239 if (eeprom->reg_chip_select)
240 reg |= RTL819X_EEPROM_CMD_CS;
241
242 write_nic_byte(dev, EPROM_CMD, reg);
243 read_nic_byte(dev, EPROM_CMD);
244 udelay(10);
245}
246
5f53d8ca
JC		 247static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
248{
249 int i, max_chan=-1, min_chan=-1;
250 struct ieee80211_device* ieee = priv->ieee80211;
251 switch (channel_plan)
252 {
253 case COUNTRY_CODE_FCC:
254 case COUNTRY_CODE_IC:
255 case COUNTRY_CODE_ETSI:
256 case COUNTRY_CODE_SPAIN:
257 case COUNTRY_CODE_FRANCE:
258 case COUNTRY_CODE_MKK:
259 case COUNTRY_CODE_MKK1:
260 case COUNTRY_CODE_ISRAEL:
261 case COUNTRY_CODE_TELEC:
262 case COUNTRY_CODE_MIC:
263 {
264 Dot11d_Init(ieee);
265 ieee->bGlobalDomain = false;
266 //acturally 8225 & 8256 rf chip only support B,G,24N mode
267 if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
268 {
269 min_chan = 1;
270 max_chan = 14;
271 }
272 else
273 {
274 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
275 }
276 if (ChannelPlan[channel_plan].Len != 0){
277 // Clear old channel map
278 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
279 // Set new channel map
280 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
281 {
282 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
283 break;
284 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
285 }
286 }
287 break;
288 }
289 case COUNTRY_CODE_GLOBAL_DOMAIN:
290 {
291 GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
292 Dot11d_Reset(ieee);
293 ieee->bGlobalDomain = true;
294 break;
295 }
296 default:
297 break;
298 }
299 return;
300}
5f53d8ca
JC		 301
302#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
303
5f53d8ca
JC		 304#define rx_hal_is_cck_rate(_pDesc)\
305 ((_pDesc->RxMCS == DESC92S_RATE1M ||\
306 _pDesc->RxMCS == DESC92S_RATE2M ||\
307 _pDesc->RxMCS == DESC92S_RATE5_5M ||\
308 _pDesc->RxMCS == DESC92S_RATE11M) &&\
309 !_pDesc->RxHT)
310
311#define tx_hal_is_cck_rate(_DataRate)\
312 ( _DataRate == MGN_1M ||\
313 _DataRate == MGN_2M ||\
314 _DataRate == MGN_5_5M ||\
315 _DataRate == MGN_11M )
316
5f53d8ca
JC		 317
318
319
320void CamResetAllEntry(struct net_device *dev)
321{
322#if 1
323 u32 ulcommand = 0;
324 //2004/02/11 In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
325 // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
326 // In this condition, Cam can not be reset because upper layer will not set this static key again.
327 //if(Adapter->EncAlgorithm == WEP_Encryption)
328 // return;
329//debug
330 //DbgPrint("========================================\n");
331 //DbgPrint(" Call ResetAllEntry \n");
332 //DbgPrint("========================================\n\n");
333 ulcommand |= BIT31|BIT30;
334 write_nic_dword(dev, RWCAM, ulcommand);
335#else
336 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
337 CAM_mark_invalid(dev, ucIndex);
338 for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
339 CAM_empty_entry(dev, ucIndex);
340#endif
341
342}
343
344
345void write_cam(struct net_device *dev, u8 addr, u32 data)
346{
347 write_nic_dword(dev, WCAMI, data);
348 write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
349}
350
351u32 read_cam(struct net_device *dev, u8 addr)
352{
353 write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
354 return read_nic_dword(dev, 0xa8);
355}
356
357void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
358{
359 int status;
360 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
361 struct usb_device *udev = priv->udev;
362
363 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
364 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
365 indx|0xfe00, 0, &data, 1, HZ / 2);
366
367 if (status < 0)
368 {
369 printk("write_nic_byte_E TimeOut! status:%d\n", status);
370 }
371}
372
373u8 read_nic_byte_E(struct net_device *dev, int indx)
374{
375 int status;
376 u8 data;
377 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
378 struct usb_device *udev = priv->udev;
379
380 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
381 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
382 indx|0xfe00, 0, &data, 1, HZ / 2);
383
384 if (status < 0)
385 {
386 printk("read_nic_byte_E TimeOut! status:%d\n", status);
387 }
388
389 return data;
390}
391//as 92U has extend page from 4 to 16, so modify functions below.
392void write_nic_byte(struct net_device *dev, int indx, u8 data)
393{
394 int status;
395
396 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
397 struct usb_device *udev = priv->udev;
398
399 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
400 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 401 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 402
403 if (status < 0)
404 {
405 printk("write_nic_byte TimeOut! status:%d\n", status);
406 }
407
408
409}
410
411
412void write_nic_word(struct net_device *dev, int indx, u16 data)
413{
414
415 int status;
416
417 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
418 struct usb_device *udev = priv->udev;
419
420 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
421 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 422 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 423
424 if (status < 0)
425 {
426 printk("write_nic_word TimeOut! status:%d\n", status);
427 }
428
429}
430
431
432void write_nic_dword(struct net_device *dev, int indx, u32 data)
433{
434
435 int status;
436
437 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
438 struct usb_device *udev = priv->udev;
439
440 status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
441 RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
5f53d8ca 442 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 443
444
445 if (status < 0)
446 {
447 printk("write_nic_dword TimeOut! status:%d\n", status);
448 }
449
450}
451
452
453
454u8 read_nic_byte(struct net_device *dev, int indx)
455{
456 u8 data;
457 int status;
458 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
459 struct usb_device *udev = priv->udev;
460
461 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
462 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 463 indx, 0, &data, 1, HZ / 2);
5f53d8ca
JC		 464
465 if (status < 0)
466 {
467 printk("read_nic_byte TimeOut! status:%d\n", status);
468 }
469
470 return data;
471}
472
473
474
475u16 read_nic_word(struct net_device *dev, int indx)
476{
477 u16 data;
478 int status;
479 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
480 struct usb_device *udev = priv->udev;
481
482 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
483 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 484 indx, 0, &data, 2, HZ / 2);
5f53d8ca
JC		 485
486 if (status < 0)
487 {
488 printk("read_nic_word TimeOut! status:%d\n", status);
489 }
490
491
492 return data;
493}
494
495u16 read_nic_word_E(struct net_device *dev, int indx)
496{
497 u16 data;
498 int status;
499 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
500 struct usb_device *udev = priv->udev;
501
502 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
503 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
504 indx|0xfe00, 0, &data, 2, HZ / 2);
505
506 if (status < 0)
507 {
508 printk("read_nic_word TimeOut! status:%d\n", status);
509 }
510
511
512 return data;
513}
514
515u32 read_nic_dword(struct net_device *dev, int indx)
516{
517 u32 data;
518 int status;
519// int result;
520
521 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
522 struct usb_device *udev = priv->udev;
523
524 status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
525 RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
5f53d8ca 526 indx, 0, &data, 4, HZ / 2);
5f53d8ca
JC		 527// if(0 != result) {
528// printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
529// }
530
531 if (status < 0)
532 {
533 printk("read_nic_dword TimeOut! status:%d\n", status);
534 if(status == -ENODEV) {
535 priv->usb_error = true;
536 }
537 }
538
539
540
541 return data;
542}
543
544
545//u8 read_phy_cck(struct net_device *dev, u8 adr);
546//u8 read_phy_ofdm(struct net_device *dev, u8 adr);
547/* this might still called in what was the PHY rtl8185/rtl8192 common code
548 * plans are to possibilty turn it again in one common code...
549 */
550inline void force_pci_posting(struct net_device *dev)
551{
552}
553
554
555static struct net_device_stats *rtl8192_stats(struct net_device *dev);
556void rtl8192_commit(struct net_device *dev);
557//void rtl8192_restart(struct net_device *dev);
5f53d8ca
JC		 558void rtl8192_restart(struct work_struct *work);
559//void rtl8192_rq_tx_ack(struct work_struct *work);
5f53d8ca
JC		 560
561void watch_dog_timer_callback(unsigned long data);
562
563/****************************************************************************
564 -----------------------------PROCFS STUFF-------------------------
565*****************************************************************************/
566
567static struct proc_dir_entry *rtl8192_proc = NULL;
568
569
570
571static int proc_get_stats_ap(char *page, char **start,
572 off_t offset, int count,
573 int *eof, void *data)
574{
575 struct net_device *dev = data;
576 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
577 struct ieee80211_device *ieee = priv->ieee80211;
578 struct ieee80211_network *target;
579
580 int len = 0;
581
582 list_for_each_entry(target, &ieee->network_list, list) {
583
584 len += snprintf(page + len, count - len,
585 "%s ", target->ssid);
586
587 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
588 len += snprintf(page + len, count - len,
589 "WPA\n");
590 }
591 else{
592 len += snprintf(page + len, count - len,
593 "non_WPA\n");
594 }
595
596 }
597
598 *eof = 1;
599 return len;
600}
601
5f53d8ca
JC		 602static int proc_get_registers(char *page, char **start,
603 off_t offset, int count,
604 int *eof, void *data)
605{
606 struct net_device *dev = data;
607// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
608
609 int len = 0;
610 int i,n,page0,page1,page2;
611
612 int max=0xff;
613 page0 = 0x000;
614 page1 = 0x100;
615 page2 = 0x800;
616
617 /* This dump the current register page */
618 if(!IS_BB_REG_OFFSET_92S(page0)){
619 len += snprintf(page + len, count - len,
620 "\n####################page %x##################\n ", (page0>>8));
621 for(n=0;n<=max;)
622 {
623 len += snprintf(page + len, count - len,
624 "\nD: %2x > ",n);
625 for(i=0;i<16 && n<=max;i++,n++)
626 len += snprintf(page + len, count - len,
627 "%2.2x ",read_nic_byte(dev,(page0|n)));
628 }
629 }else{
630 len += snprintf(page + len, count - len,
631 "\n####################page %x##################\n ", (page0>>8));
632 for(n=0;n<=max;)
633 {
634 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
635 for(i=0;i<4 && n<=max;n+=4,i++)
636 len += snprintf(page + len, count - len,
637 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
638 }
639 }
640 len += snprintf(page + len, count - len,"\n");
641 *eof = 1;
642 return len;
643
644}
645static int proc_get_registers_1(char *page, char **start,
646 off_t offset, int count,
647 int *eof, void *data)
648{
649 struct net_device *dev = data;
650// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
651
652 int len = 0;
653 int i,n,page0;
654
655 int max=0xff;
656 page0 = 0x100;
657
658 /* This dump the current register page */
659 len += snprintf(page + len, count - len,
660 "\n####################page %x##################\n ", (page0>>8));
661 for(n=0;n<=max;)
662 {
663 len += snprintf(page + len, count - len,
664 "\nD: %2x > ",n);
665 for(i=0;i<16 && n<=max;i++,n++)
666 len += snprintf(page + len, count - len,
667 "%2.2x ",read_nic_byte(dev,(page0|n)));
668 }
669 len += snprintf(page + len, count - len,"\n");
670 *eof = 1;
671 return len;
672
673}
674static int proc_get_registers_2(char *page, char **start,
675 off_t offset, int count,
676 int *eof, void *data)
677{
678 struct net_device *dev = data;
679// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
680
681 int len = 0;
682 int i,n,page0;
683
684 int max=0xff;
685 page0 = 0x200;
686
687 /* This dump the current register page */
688 len += snprintf(page + len, count - len,
689 "\n####################page %x##################\n ", (page0>>8));
690 for(n=0;n<=max;)
691 {
692 len += snprintf(page + len, count - len,
693 "\nD: %2x > ",n);
694 for(i=0;i<16 && n<=max;i++,n++)
695 len += snprintf(page + len, count - len,
696 "%2.2x ",read_nic_byte(dev,(page0|n)));
697 }
698 len += snprintf(page + len, count - len,"\n");
699 *eof = 1;
700 return len;
701
702}
703static int proc_get_registers_8(char *page, char **start,
704 off_t offset, int count,
705 int *eof, void *data)
706{
707 struct net_device *dev = data;
708
709 int len = 0;
710 int i,n,page0;
711
712 int max=0xff;
713 page0 = 0x800;
714
715 /* This dump the current register page */
716 len += snprintf(page + len, count - len,
717 "\n####################page %x##################\n ", (page0>>8));
718 for(n=0;n<=max;)
719 {
720 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
721 for(i=0;i<4 && n<=max;n+=4,i++)
722 len += snprintf(page + len, count - len,
723 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
724 }
725 len += snprintf(page + len, count - len,"\n");
726 *eof = 1;
727 return len;
728
729 }
730static int proc_get_registers_9(char *page, char **start,
731 off_t offset, int count,
732 int *eof, void *data)
733{
734 struct net_device *dev = data;
735// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
736
737 int len = 0;
738 int i,n,page0;
739
740 int max=0xff;
741 page0 = 0x900;
742
743 /* This dump the current register page */
744 len += snprintf(page + len, count - len,
745 "\n####################page %x##################\n ", (page0>>8));
746 for(n=0;n<=max;)
747 {
748 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
749 for(i=0;i<4 && n<=max;n+=4,i++)
750 len += snprintf(page + len, count - len,
751 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
752 }
753 len += snprintf(page + len, count - len,"\n");
754 *eof = 1;
755 return len;
756}
757static int proc_get_registers_a(char *page, char **start,
758 off_t offset, int count,
759 int *eof, void *data)
760{
761 struct net_device *dev = data;
762// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
763
764 int len = 0;
765 int i,n,page0;
766
767 int max=0xff;
768 page0 = 0xa00;
769
770 /* This dump the current register page */
771 len += snprintf(page + len, count - len,
772 "\n####################page %x##################\n ", (page0>>8));
773 for(n=0;n<=max;)
774 {
775 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
776 for(i=0;i<4 && n<=max;n+=4,i++)
777 len += snprintf(page + len, count - len,
778 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
779 }
780 len += snprintf(page + len, count - len,"\n");
781 *eof = 1;
782 return len;
783}
784static int proc_get_registers_b(char *page, char **start,
785 off_t offset, int count,
786 int *eof, void *data)
787{
788 struct net_device *dev = data;
789// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
790
791 int len = 0;
792 int i,n,page0;
793
794 int max=0xff;
795 page0 = 0xb00;
796
797 /* This dump the current register page */
798 len += snprintf(page + len, count - len,
799 "\n####################page %x##################\n ", (page0>>8));
800 for(n=0;n<=max;)
801 {
802 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
803 for(i=0;i<4 && n<=max;n+=4,i++)
804 len += snprintf(page + len, count - len,
805 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
806 }
807 len += snprintf(page + len, count - len,"\n");
808 *eof = 1;
809 return len;
810 }
811static int proc_get_registers_c(char *page, char **start,
812 off_t offset, int count,
813 int *eof, void *data)
814{
815 struct net_device *dev = data;
816// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
817
818 int len = 0;
819 int i,n,page0;
820
821 int max=0xff;
822 page0 = 0xc00;
823
824 /* This dump the current register page */
825 len += snprintf(page + len, count - len,
826 "\n####################page %x##################\n ", (page0>>8));
827 for(n=0;n<=max;)
828 {
829 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
830 for(i=0;i<4 && n<=max;n+=4,i++)
831 len += snprintf(page + len, count - len,
832 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
833 }
834 len += snprintf(page + len, count - len,"\n");
835 *eof = 1;
836 return len;
837}
838static int proc_get_registers_d(char *page, char **start,
839 off_t offset, int count,
840 int *eof, void *data)
841{
842 struct net_device *dev = data;
843// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
844
845 int len = 0;
846 int i,n,page0;
847
848 int max=0xff;
849 page0 = 0xd00;
850
851 /* This dump the current register page */
852 len += snprintf(page + len, count - len,
853 "\n####################page %x##################\n ", (page0>>8));
854 for(n=0;n<=max;)
855 {
856 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
857 for(i=0;i<4 && n<=max;n+=4,i++)
858 len += snprintf(page + len, count - len,
859 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
860 }
861 len += snprintf(page + len, count - len,"\n");
862 *eof = 1;
863 return len;
864}
865static int proc_get_registers_e(char *page, char **start,
866 off_t offset, int count,
867 int *eof, void *data)
868{
869 struct net_device *dev = data;
870// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
871
872 int len = 0;
873 int i,n,page0;
874
875 int max=0xff;
876 page0 = 0xe00;
877
878 /* This dump the current register page */
879 len += snprintf(page + len, count - len,
880 "\n####################page %x##################\n ", (page0>>8));
881 for(n=0;n<=max;)
882 {
883 len += snprintf(page + len, count - len, "\nD: %2x > ",n);
884 for(i=0;i<4 && n<=max;n+=4,i++)
885 len += snprintf(page + len, count - len,
886 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
887 }
888 len += snprintf(page + len, count - len,"\n");
889 *eof = 1;
890 return len;
891}
5f53d8ca 892
5f53d8ca
JC		 893static int proc_get_stats_tx(char *page, char **start,
894 off_t offset, int count,
895 int *eof, void *data)
896{
897 struct net_device *dev = data;
898 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
899
900 int len = 0;
901
902 len += snprintf(page + len, count - len,
903 "TX VI priority ok int: %lu\n"
904 "TX VI priority error int: %lu\n"
905 "TX VO priority ok int: %lu\n"
906 "TX VO priority error int: %lu\n"
907 "TX BE priority ok int: %lu\n"
908 "TX BE priority error int: %lu\n"
909 "TX BK priority ok int: %lu\n"
910 "TX BK priority error int: %lu\n"
911 "TX MANAGE priority ok int: %lu\n"
912 "TX MANAGE priority error int: %lu\n"
913 "TX BEACON priority ok int: %lu\n"
914 "TX BEACON priority error int: %lu\n"
915// "TX high priority ok int: %lu\n"
916// "TX high priority failed error int: %lu\n"
917 "TX queue resume: %lu\n"
918 "TX queue stopped?: %d\n"
919 "TX fifo overflow: %lu\n"
920// "TX beacon: %lu\n"
921 "TX VI queue: %d\n"
922 "TX VO queue: %d\n"
923 "TX BE queue: %d\n"
924 "TX BK queue: %d\n"
925// "TX HW queue: %d\n"
926 "TX VI dropped: %lu\n"
927 "TX VO dropped: %lu\n"
928 "TX BE dropped: %lu\n"
929 "TX BK dropped: %lu\n"
930 "TX total data packets %lu\n",
931// "TX beacon aborted: %lu\n",
932 priv->stats.txviokint,
933 priv->stats.txvierr,
934 priv->stats.txvookint,
935 priv->stats.txvoerr,
936 priv->stats.txbeokint,
937 priv->stats.txbeerr,
938 priv->stats.txbkokint,
939 priv->stats.txbkerr,
940 priv->stats.txmanageokint,
941 priv->stats.txmanageerr,
942 priv->stats.txbeaconokint,
943 priv->stats.txbeaconerr,
944// priv->stats.txhpokint,
945// priv->stats.txhperr,
946 priv->stats.txresumed,
947 netif_queue_stopped(dev),
948 priv->stats.txoverflow,
949// priv->stats.txbeacon,
950 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
951 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
952 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
953 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
954// read_nic_byte(dev, TXFIFOCOUNT),
955 priv->stats.txvidrop,
956 priv->stats.txvodrop,
957 priv->stats.txbedrop,
958 priv->stats.txbkdrop,
959 priv->stats.txdatapkt
960// priv->stats.txbeaconerr
961 );
962
963 *eof = 1;
964 return len;
965}
966
967
968
969static int proc_get_stats_rx(char *page, char **start,
970 off_t offset, int count,
971 int *eof, void *data)
972{
973 struct net_device *dev = data;
974 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
975
976 int len = 0;
977
978 len += snprintf(page + len, count - len,
979 "RX packets: %lu\n"
980 "RX urb status error: %lu\n"
981 "RX invalid urb error: %lu\n",
982 priv->stats.rxoktotal,
983 priv->stats.rxstaterr,
984 priv->stats.rxurberr);
985
986 *eof = 1;
987 return len;
988}
5f53d8ca 989
5f53d8ca
JC		 990void rtl8192_proc_module_init(void)
991{
992 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
5f53d8ca 993 rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
5f53d8ca
JC		 994}
995
996
997void rtl8192_proc_module_remove(void)
998{
5f53d8ca 999 remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
5f53d8ca
JC		 1000}
1001
1002
1003void rtl8192_proc_remove_one(struct net_device *dev)
1004{
1005 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1006
1007
1008 if (priv->dir_dev) {
1009 // remove_proc_entry("stats-hw", priv->dir_dev);
1010 remove_proc_entry("stats-tx", priv->dir_dev);
1011 remove_proc_entry("stats-rx", priv->dir_dev);
1012 // remove_proc_entry("stats-ieee", priv->dir_dev);
1013 remove_proc_entry("stats-ap", priv->dir_dev);
1014 remove_proc_entry("registers", priv->dir_dev);
1015 remove_proc_entry("registers-1", priv->dir_dev);
1016 remove_proc_entry("registers-2", priv->dir_dev);
1017 remove_proc_entry("registers-8", priv->dir_dev);
1018 remove_proc_entry("registers-9", priv->dir_dev);
1019 remove_proc_entry("registers-a", priv->dir_dev);
1020 remove_proc_entry("registers-b", priv->dir_dev);
1021 remove_proc_entry("registers-c", priv->dir_dev);
1022 remove_proc_entry("registers-d", priv->dir_dev);
1023 remove_proc_entry("registers-e", priv->dir_dev);
1024 // remove_proc_entry("cck-registers",priv->dir_dev);
1025 // remove_proc_entry("ofdm-registers",priv->dir_dev);
1026 //remove_proc_entry(dev->name, rtl8192_proc);
1027 remove_proc_entry("wlan0", rtl8192_proc);
1028 priv->dir_dev = NULL;
1029 }
1030}
1031
1032
1033void rtl8192_proc_init_one(struct net_device *dev)
1034{
1035 struct proc_dir_entry *e;
1036 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1037 priv->dir_dev = create_proc_entry(dev->name,
1038 S_IFDIR | S_IRUGO | S_IXUGO,
1039 rtl8192_proc);
1040 if (!priv->dir_dev) {
1041 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1042 dev->name);
1043 return;
1044 }
5f53d8ca
JC		 1045 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1046 priv->dir_dev, proc_get_stats_rx, dev);
1047
1048 if (!e) {
1049 RT_TRACE(COMP_ERR,"Unable to initialize "
1050 "/proc/net/rtl8192/%s/stats-rx\n",
1051 dev->name);
1052 }
1053
1054
1055 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1056 priv->dir_dev, proc_get_stats_tx, dev);
1057
1058 if (!e) {
1059 RT_TRACE(COMP_ERR, "Unable to initialize "
1060 "/proc/net/rtl8192/%s/stats-tx\n",
1061 dev->name);
1062 }
5f53d8ca
JC		 1063
1064 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1065 priv->dir_dev, proc_get_stats_ap, dev);
1066
1067 if (!e) {
1068 RT_TRACE(COMP_ERR, "Unable to initialize "
1069 "/proc/net/rtl8192/%s/stats-ap\n",
1070 dev->name);
1071 }
1072
1073 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1074 priv->dir_dev, proc_get_registers, dev);
1075 if (!e) {
1076 RT_TRACE(COMP_ERR, "Unable to initialize "
1077 "/proc/net/rtl8192/%s/registers\n",
1078 dev->name);
1079 }
5f53d8ca
JC		 1080 e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1081 priv->dir_dev, proc_get_registers_1, dev);
1082 if (!e) {
1083 RT_TRACE(COMP_ERR, "Unable to initialize "
1084 "/proc/net/rtl8192/%s/registers-1\n",
1085 dev->name);
1086 }
1087 e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1088 priv->dir_dev, proc_get_registers_2, dev);
1089 if (!e) {
1090 RT_TRACE(COMP_ERR, "Unable to initialize "
1091 "/proc/net/rtl8192/%s/registers-2\n",
1092 dev->name);
1093 }
1094 e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1095 priv->dir_dev, proc_get_registers_8, dev);
1096 if (!e) {
1097 RT_TRACE(COMP_ERR, "Unable to initialize "
1098 "/proc/net/rtl8192/%s/registers-8\n",
1099 dev->name);
1100 }
1101 e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1102 priv->dir_dev, proc_get_registers_9, dev);
1103 if (!e) {
1104 RT_TRACE(COMP_ERR, "Unable to initialize "
1105 "/proc/net/rtl8192/%s/registers-9\n",
1106 dev->name);
1107 }
1108 e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1109 priv->dir_dev, proc_get_registers_a, dev);
1110 if (!e) {
1111 RT_TRACE(COMP_ERR, "Unable to initialize "
1112 "/proc/net/rtl8192/%s/registers-a\n",
1113 dev->name);
1114 }
1115 e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1116 priv->dir_dev, proc_get_registers_b, dev);
1117 if (!e) {
1118 RT_TRACE(COMP_ERR, "Unable to initialize "
1119 "/proc/net/rtl8192/%s/registers-b\n",
1120 dev->name);
1121 }
1122 e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1123 priv->dir_dev, proc_get_registers_c, dev);
1124 if (!e) {
1125 RT_TRACE(COMP_ERR, "Unable to initialize "
1126 "/proc/net/rtl8192/%s/registers-c\n",
1127 dev->name);
1128 }
1129 e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1130 priv->dir_dev, proc_get_registers_d, dev);
1131 if (!e) {
1132 RT_TRACE(COMP_ERR, "Unable to initialize "
1133 "/proc/net/rtl8192/%s/registers-d\n",
1134 dev->name);
1135 }
1136 e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1137 priv->dir_dev, proc_get_registers_e, dev);
1138 if (!e) {
1139 RT_TRACE(COMP_ERR, "Unable to initialize "
1140 "/proc/net/rtl8192/%s/registers-e\n",
1141 dev->name);
1142 }
5f53d8ca
JC		 1143}
1144/****************************************************************************
1145 -----------------------------MISC STUFF-------------------------
1146*****************************************************************************/
1147
1148/* this is only for debugging */
1149void print_buffer(u32 *buffer, int len)
1150{
1151 int i;
1152 u8 *buf =(u8*)buffer;
1153
1154 printk("ASCII BUFFER DUMP (len: %x):\n",len);
1155
1156 for(i=0;i<len;i++)
1157 printk("%c",buf[i]);
1158
1159 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1160
1161 for(i=0;i<len;i++)
1162 printk("%x",buf[i]);
1163
1164 printk("\n");
1165}
1166
1167//short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1168short check_nic_enough_desc(struct net_device *dev,int queue_index)
1169{
1170 struct r8192_priv *priv = ieee80211_priv(dev);
1171 int used = atomic_read(&priv->tx_pending[queue_index]);
1172
1173 return (used < MAX_TX_URB);
1174}
1175
1176void tx_timeout(struct net_device *dev)
1177{
1178 struct r8192_priv *priv = ieee80211_priv(dev);
1179 //rtl8192_commit(dev);
1180
5f53d8ca 1181 schedule_work(&priv->reset_wq);
5f53d8ca
JC		 1182 //DMESG("TXTIMEOUT");
1183}
1184
5f53d8ca
JC		 1185/* this is only for debug */
1186void rtl8192_dump_reg(struct net_device *dev)
1187{
1188 int i;
1189 int n;
1190 int max=0x1ff;
1191
1192 RT_TRACE(COMP_PHY, "Dumping NIC register map");
1193
1194 for(n=0;n<=max;)
1195 {
1196 printk( "\nD: %2x> ", n);
1197 for(i=0;i<16 && n<=max;i++,n++)
1198 printk("%2x ",read_nic_byte(dev,n));
1199 }
1200 printk("\n");
1201}
1202
1203/****************************************************************************
1204 ------------------------------HW STUFF---------------------------
1205*****************************************************************************/
1206
5f53d8ca
JC		 1207void rtl8192_set_mode(struct net_device *dev,int mode)
1208{
1209 u8 ecmd;
1210 ecmd=read_nic_byte(dev, EPROM_CMD);
1211 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1212 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1213 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1214 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1215 write_nic_byte(dev, EPROM_CMD, ecmd);
1216}
1217
1218
1219void rtl8192_update_msr(struct net_device *dev)
1220{
1221 struct r8192_priv *priv = ieee80211_priv(dev);
1222 u8 msr;
1223
1224 msr = read_nic_byte(dev, MSR);
1225 msr &= ~ MSR_LINK_MASK;
1226
1227 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1228 * msr must be updated if the state is ASSOCIATING.
1229 * this is intentional and make sense for ad-hoc and
1230 * master (see the create BSS/IBSS func)
1231 */
1232 if (priv->ieee80211->state == IEEE80211_LINKED){
1233
1234 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1235 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1236 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1237 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1238 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1239 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1240
1241 }else
1242 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1243
1244 write_nic_byte(dev, MSR, msr);
1245}
1246
1247void rtl8192_set_chan(struct net_device *dev,short ch)
1248{
1249 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1250// u32 tx;
1251 RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1252 //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1253 priv->chan=ch;
5f53d8ca
JC		 1254
1255 /* this hack should avoid frame TX during channel setting*/
1256
1257
1258// tx = read_nic_dword(dev,TX_CONF);
1259// tx &= ~TX_LOOPBACK_MASK;
1260
1261#ifndef LOOP_TEST
1262// write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1263
1264 //need to implement rf set channel here WB
1265
1266 if (priv->rf_set_chan)
1267 priv->rf_set_chan(dev,priv->chan);
1268 mdelay(10);
1269// write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1270#endif
1271}
1272
5f53d8ca 1273static void rtl8192_rx_isr(struct urb *urb);
5f53d8ca
JC		 1274
1275u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1276{
1277
5f53d8ca
JC		 1278 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1279 + pstats->RxBufShift);
1280
1281}
1282static int rtl8192_rx_initiate(struct net_device*dev)
1283{
1284 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1285 struct urb *entry;
1286 struct sk_buff *skb;
1287 struct rtl8192_rx_info *info;
1288
1289 /* nomal packet rx procedure */
1290 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1291 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1292 if (!skb)
1293 break;
5f53d8ca 1294 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1295 if (!entry) {
1296 kfree_skb(skb);
1297 break;
1298 }
1299// printk("nomal packet IN request!\n");
1300 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1301 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
5f53d8ca
JC		 1302 RX_URB_SIZE, rtl8192_rx_isr, skb);
1303 info = (struct rtl8192_rx_info *) skb->cb;
1304 info->urb = entry;
1305 info->dev = dev;
1306 info->out_pipe = 3; //denote rx normal packet queue
1307 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1308 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1309 }
1310
1311 /* command packet rx procedure */
1312 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1313// printk("command packet IN request!\n");
1314 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1315 if (!skb)
1316 break;
5f53d8ca 1317 entry = usb_alloc_urb(0, GFP_KERNEL);
5f53d8ca
JC		 1318 if (!entry) {
1319 kfree_skb(skb);
1320 break;
1321 }
1322 usb_fill_bulk_urb(entry, priv->udev,
8109c2fd 1323 usb_rcvbulkpipe(priv->udev, 9), skb_tail_pointer(skb),
5f53d8ca
JC		 1324 RX_URB_SIZE, rtl8192_rx_isr, skb);
1325 info = (struct rtl8192_rx_info *) skb->cb;
1326 info->urb = entry;
1327 info->dev = dev;
1328 info->out_pipe = 9; //denote rx cmd packet queue
1329 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1330 usb_submit_urb(entry, GFP_KERNEL);
5f53d8ca
JC		 1331 }
1332
1333 return 0;
1334}
1335
1336void rtl8192_set_rxconf(struct net_device *dev)
1337{
1338 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1339 u32 rxconf;
1340
1341 rxconf=read_nic_dword(dev,RCR);
1342 rxconf = rxconf &~ MAC_FILTER_MASK;
1343 rxconf = rxconf | RCR_AMF;
1344 rxconf = rxconf | RCR_ADF;
1345 rxconf = rxconf | RCR_AB;
1346 rxconf = rxconf | RCR_AM;
1347 //rxconf = rxconf | RCR_ACF;
1348
1349 if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1350
1351 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1352 dev->flags & IFF_PROMISC){
1353 rxconf = rxconf | RCR_AAP;
1354 } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1355 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1356 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1357 }*/else{
1358 rxconf = rxconf | RCR_APM;
1359 rxconf = rxconf | RCR_CBSSID;
1360 }
1361
1362
1363 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1364 rxconf = rxconf | RCR_AICV;
1365 rxconf = rxconf | RCR_APWRMGT;
1366 }
1367
1368 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1369 rxconf = rxconf | RCR_ACRC32;
1370
1371
1372 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1373 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1374 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1375 rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1376
1377// rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1378 rxconf = rxconf | RCR_ONLYERLPKT;
1379
1380// rxconf = rxconf &~ RCR_CS_MASK;
1381// rxconf = rxconf | (1<<RCR_CS_SHIFT);
1382
1383 write_nic_dword(dev, RCR, rxconf);
1384
1385 #ifdef DEBUG_RX
1386 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1387 #endif
1388}
1389//wait to be removed
1390void rtl8192_rx_enable(struct net_device *dev)
1391{
1392 //u8 cmd;
1393
1394 //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1395
1396 rtl8192_rx_initiate(dev);
1397
1398// rtl8192_set_rxconf(dev);
5f53d8ca
JC		 1399}
1400
1401
1402void rtl8192_tx_enable(struct net_device *dev)
1403{
5f53d8ca
JC		 1404}
1405
5f53d8ca
JC		 1406void rtl8192_rtx_disable(struct net_device *dev)
1407{
1408 u8 cmd;
1409 struct r8192_priv *priv = ieee80211_priv(dev);
1410 struct sk_buff *skb;
1411 struct rtl8192_rx_info *info;
1412
1413 cmd=read_nic_byte(dev,CMDR);
1414 write_nic_byte(dev, CMDR, cmd &~ \
1415 (CR_TE|CR_RE));
1416 force_pci_posting(dev);
1417 mdelay(10);
1418
1419 while ((skb = __skb_dequeue(&priv->rx_queue))) {
1420 info = (struct rtl8192_rx_info *) skb->cb;
1421 if (!info->urb)
1422 continue;
1423
1424 usb_kill_urb(info->urb);
1425 kfree_skb(skb);
1426 }
1427
1428 if (skb_queue_len(&priv->skb_queue)) {
1429 printk(KERN_WARNING "skb_queue not empty\n");
1430 }
1431
1432 skb_queue_purge(&priv->skb_queue);
1433 return;
1434}
1435
1436
1437int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1438{
5f53d8ca
JC		 1439 return 0;
1440}
1441
5f53d8ca
JC		 1442inline u16 ieeerate2rtlrate(int rate)
1443{
1444 switch(rate){
1445 case 10:
1446 return 0;
1447 case 20:
1448 return 1;
1449 case 55:
1450 return 2;
1451 case 110:
1452 return 3;
1453 case 60:
1454 return 4;
1455 case 90:
1456 return 5;
1457 case 120:
1458 return 6;
1459 case 180:
1460 return 7;
1461 case 240:
1462 return 8;
1463 case 360:
1464 return 9;
1465 case 480:
1466 return 10;
1467 case 540:
1468 return 11;
1469 default:
1470 return 3;
1471
1472 }
1473}
1474static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1475inline u16 rtl8192_rate2rate(short rate)
1476{
1477 if (rate >11) return 0;
1478 return rtl_rate[rate];
1479}
1480
5f53d8ca 1481static void rtl8192_rx_isr(struct urb *urb)
5f53d8ca
JC		 1482{
1483 struct sk_buff *skb = (struct sk_buff *) urb->context;
1484 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1485 struct net_device *dev = info->dev;
1486 struct r8192_priv *priv = ieee80211_priv(dev);
1487 int out_pipe = info->out_pipe;
1488 int err;
1489 if(!priv->up)
1490 return;
1491 if (unlikely(urb->status)) {
1492 info->urb = NULL;
1493 priv->stats.rxstaterr++;
1494 priv->ieee80211->stats.rx_errors++;
1495 usb_free_urb(urb);
1496 // printk("%s():rx status err\n",__FUNCTION__);
1497 return;
1498 }
1ec9e48d 1499
5f53d8ca 1500 skb_unlink(skb, &priv->rx_queue);
5f53d8ca
JC		 1501 skb_put(skb, urb->actual_length);
1502
1503 skb_queue_tail(&priv->skb_queue, skb);
1504 tasklet_schedule(&priv->irq_rx_tasklet);
1505
1506 skb = dev_alloc_skb(RX_URB_SIZE);
1507 if (unlikely(!skb)) {
1508 usb_free_urb(urb);
1509 printk("%s():can,t alloc skb\n",__FUNCTION__);
1510 /* TODO check rx queue length and refill *somewhere* */
1511 return;
1512 }
1513
1514 usb_fill_bulk_urb(urb, priv->udev,
8109c2fd
JM		 1515 usb_rcvbulkpipe(priv->udev, out_pipe),
1516 skb_tail_pointer(skb),
5f53d8ca
JC		 1517 RX_URB_SIZE, rtl8192_rx_isr, skb);
1518
1519 info = (struct rtl8192_rx_info *) skb->cb;
1520 info->urb = urb;
1521 info->dev = dev;
1522 info->out_pipe = out_pipe;
1523
8109c2fd 1524 urb->transfer_buffer = skb_tail_pointer(skb);
5f53d8ca
JC		 1525 urb->context = skb;
1526 skb_queue_tail(&priv->rx_queue, skb);
5f53d8ca 1527 err = usb_submit_urb(urb, GFP_ATOMIC);
aad445f8 1528 if(err && err != -EPERM)
5f53d8ca
JC		 1529 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1530}
1531
1532u32
1533rtl819xusb_rx_command_packet(
1534 struct net_device *dev,
1535 struct ieee80211_rx_stats *pstats
1536 )
1537{
1538 u32 status;
1539
1540 //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
1541
1542 status = cmpk_message_handle_rx(dev, pstats);
1543 if (status)
1544 {
1545 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
1546 }
1547 else
1548 {
1549 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
1550 }
1551
1552 //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
1553 return status;
1554}
1555
5f53d8ca
JC		 1556void rtl8192_data_hard_stop(struct net_device *dev)
1557{
1558 //FIXME !!
5f53d8ca
JC		 1559}
1560
1561
1562void rtl8192_data_hard_resume(struct net_device *dev)
1563{
1564 // FIXME !!
5f53d8ca
JC		 1565}
1566
1567/* this function TX data frames when the ieee80211 stack requires this.
1568 * It checks also if we need to stop the ieee tx queue, eventually do it
1569 */
1570void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
1571{
1572 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1573 int ret;
1574 unsigned long flags;
1575 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1576 u8 queue_index = tcb_desc->queue_index;
1577
1578 /* shall not be referred by command packet */
1579 assert(queue_index != TXCMD_QUEUE);
1580
1581 spin_lock_irqsave(&priv->tx_lock,flags);
1582
1583 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1584// tcb_desc->RATRIndex = 7;
1585// tcb_desc->bTxDisableRateFallBack = 1;
1586// tcb_desc->bTxUseDriverAssingedRate = 1;
1587 tcb_desc->bTxEnableFwCalcDur = 1;
1588 skb_push(skb, priv->ieee80211->tx_headroom);
1589 ret = priv->ops->rtl819x_tx(dev, skb);
1590
1591 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1592 //priv->ieee80211->stats.tx_packets++;
1593
1594 spin_unlock_irqrestore(&priv->tx_lock,flags);
1595
1596// return ret;
1597 return;
1598}
1599
1600/* This is a rough attempt to TX a frame
1601 * This is called by the ieee 80211 stack to TX management frames.
1602 * If the ring is full packet are dropped (for data frame the queue
1603 * is stopped before this can happen).
1604 */
1605int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1606{
1607 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1608 int ret;
1609 unsigned long flags;
1610 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1611 u8 queue_index = tcb_desc->queue_index;
1612
1613
1614 spin_lock_irqsave(&priv->tx_lock,flags);
1615
1616 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
1617 if(queue_index == TXCMD_QUEUE) {
1618 skb_push(skb, USB_HWDESC_HEADER_LEN);
1619 priv->ops->rtl819x_tx_cmd(dev, skb);
1620 ret = 1;
1621 spin_unlock_irqrestore(&priv->tx_lock,flags);
1622 return ret;
1623 } else {
1624 skb_push(skb, priv->ieee80211->tx_headroom);
1625 ret = priv->ops->rtl819x_tx(dev, skb);
1626 }
1627
1628 spin_unlock_irqrestore(&priv->tx_lock,flags);
1629
1630 return ret;
1631}
1632
1633
1634void rtl8192_try_wake_queue(struct net_device *dev, int pri);
1635
5f53d8ca 1636
5f53d8ca 1637static void rtl8192_tx_isr(struct urb *tx_urb)
5f53d8ca
JC		 1638{
1639 struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
1640 struct net_device *dev = NULL;
1641 struct r8192_priv *priv = NULL;
1642 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1643 u8 queue_index = tcb_desc->queue_index;
1644// bool bToSend0Byte;
1645// u16 BufLen = skb->len;
1646
1647 memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
1648 priv = ieee80211_priv(dev);
1649
1650 if(tcb_desc->queue_index != TXCMD_QUEUE) {
1651 if(tx_urb->status == 0) {
1652 // dev->trans_start = jiffies;
1653 // As act as station mode, destion shall be unicast address.
1654 //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
1655 //priv->ieee80211->stats.tx_packets++;
1656 priv->stats.txoktotal++;
1657 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
1658 priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
1659 } else {
1660 priv->ieee80211->stats.tx_errors++;
1661 //priv->stats.txmanageerr++;
1662 /* TODO */
1663 }
1664 }
1665
1666 /* free skb and tx_urb */
1667 if(skb != NULL) {
1668 dev_kfree_skb_any(skb);
1669 usb_free_urb(tx_urb);
1670 atomic_dec(&priv->tx_pending[queue_index]);
1671 }
1672
5f53d8ca
JC		 1673 {
1674 //
1675 // Handle HW Beacon:
1676 // We had transfer our beacon frame to host controler at this moment.
1677 //
5f53d8ca
JC		 1678 //
1679 // Caution:
1680 // Handling the wait queue of command packets.
1681 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
1682 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
1683 //
1684 if (queue_index == MGNT_QUEUE){
1685 if (priv->ieee80211->ack_tx_to_ieee){
1686 if (rtl8192_is_tx_queue_empty(dev)){
1687 priv->ieee80211->ack_tx_to_ieee = 0;
1688 ieee80211_ps_tx_ack(priv->ieee80211, 1);
1689 }
1690 }
1691 }
1692 /* Handle MPDU in wait queue. */
1693 if(queue_index != BEACON_QUEUE) {
1694 /* Don't send data frame during scanning.*/
1695 if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
1696 (!(priv->ieee80211->queue_stop))) {
1697 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
1698 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
1699
1700 return; //modified by david to avoid further processing AMSDU
1701 }
5f53d8ca
JC		 1702 }
1703 }
5f53d8ca
JC		 1704}
1705
1706void rtl8192_beacon_stop(struct net_device *dev)
1707{
1708 u8 msr, msrm, msr2;
1709 struct r8192_priv *priv = ieee80211_priv(dev);
1710
1711 msr = read_nic_byte(dev, MSR);
1712 msrm = msr & MSR_LINK_MASK;
1713 msr2 = msr & ~MSR_LINK_MASK;
1714
1715 if(NIC_8192U == priv->card_8192) {
1716 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
1717 }
1718 if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
1719 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
1720 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
1721 write_nic_byte(dev, MSR, msr);
1722 }
1723}
1724
1725void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
1726{
1727 struct r8192_priv *priv = ieee80211_priv(dev);
1728 struct ieee80211_network *net;
1729 u8 i=0, basic_rate = 0;
1730 net = & priv->ieee80211->current_network;
1731
1732 for (i=0; i<net->rates_len; i++)
1733 {
1734 basic_rate = net->rates[i]&0x7f;
1735 switch(basic_rate)
1736 {
1737 case MGN_1M: *rate_config |= RRSR_1M; break;
1738 case MGN_2M: *rate_config |= RRSR_2M; break;
1739 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1740 case MGN_11M: *rate_config |= RRSR_11M; break;
1741 case MGN_6M: *rate_config |= RRSR_6M; break;
1742 case MGN_9M: *rate_config |= RRSR_9M; break;
1743 case MGN_12M: *rate_config |= RRSR_12M; break;
1744 case MGN_18M: *rate_config |= RRSR_18M; break;
1745 case MGN_24M: *rate_config |= RRSR_24M; break;
1746 case MGN_36M: *rate_config |= RRSR_36M; break;
1747 case MGN_48M: *rate_config |= RRSR_48M; break;
1748 case MGN_54M: *rate_config |= RRSR_54M; break;
1749 }
1750 }
1751 for (i=0; i<net->rates_ex_len; i++)
1752 {
1753 basic_rate = net->rates_ex[i]&0x7f;
1754 switch(basic_rate)
1755 {
1756 case MGN_1M: *rate_config |= RRSR_1M; break;
1757 case MGN_2M: *rate_config |= RRSR_2M; break;
1758 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
1759 case MGN_11M: *rate_config |= RRSR_11M; break;
1760 case MGN_6M: *rate_config |= RRSR_6M; break;
1761 case MGN_9M: *rate_config |= RRSR_9M; break;
1762 case MGN_12M: *rate_config |= RRSR_12M; break;
1763 case MGN_18M: *rate_config |= RRSR_18M; break;
1764 case MGN_24M: *rate_config |= RRSR_24M; break;
1765 case MGN_36M: *rate_config |= RRSR_36M; break;
1766 case MGN_48M: *rate_config |= RRSR_48M; break;
1767 case MGN_54M: *rate_config |= RRSR_54M; break;
1768 }
1769 }
1770}
1771
1772
1773#define SHORT_SLOT_TIME 9
1774#define NON_SHORT_SLOT_TIME 20
1775
1776void rtl8192_update_cap(struct net_device* dev, u16 cap)
1777{
1778 //u32 tmp = 0;
1779 struct r8192_priv *priv = ieee80211_priv(dev);
1780 struct ieee80211_network *net = &priv->ieee80211->current_network;
1781 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1782
1783 //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
5f53d8ca
JC		 1784 if(0)
1785 {
1786 u8 tmp = 0;
1787 tmp = ((priv->nCur40MhzPrimeSC) << 5);
1788 if (priv->short_preamble)
1789 tmp |= 0x80;
1790 write_nic_byte(dev, RRSR+2, tmp);
1791 }
5f53d8ca
JC		 1792
1793 if (net->mode & (IEEE_G|IEEE_N_24G))
1794 {
1795 u8 slot_time = 0;
1796 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1797 {//short slot time
1798 slot_time = SHORT_SLOT_TIME;
1799 }
1800 else //long slot time
1801 slot_time = NON_SHORT_SLOT_TIME;
1802 priv->slot_time = slot_time;
1803 write_nic_byte(dev, SLOT_TIME, slot_time);
1804 }
1805
1806}
1807void rtl8192_net_update(struct net_device *dev)
1808{
1809
1810 struct r8192_priv *priv = ieee80211_priv(dev);
1811 struct ieee80211_network *net;
1812 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1813 u16 rate_config = 0;
1814 net = & priv->ieee80211->current_network;
1815
1816 rtl8192_config_rate(dev, &rate_config);
1817 priv->basic_rate = rate_config &= 0x15f;
1818
1819 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
1820 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
1821 //for(i=0;i<ETH_ALEN;i++)
1822 // write_nic_byte(dev,BSSID+i,net->bssid[i]);
1823
1824 rtl8192_update_msr(dev);
1825// rtl8192_update_cap(dev, net->capability);
1826 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1827 {
1828 write_nic_word(dev, ATIMWND, 2);
1829 write_nic_word(dev, BCN_DMATIME, 1023);
1830 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
1831// write_nic_word(dev, BcnIntTime, 100);
1832 write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
1833 write_nic_byte(dev, BCN_ERR_THRESH, 100);
1834 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
1835 // TODO: BcnIFS may required to be changed on ASIC
1836 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
1837
1838 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
1839 }
1840
1841
1842
1843}
1844
1845//temporary hw beacon is not used any more.
1846//open it when necessary
1847#if 1
1848void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
1849{
5f53d8ca
JC		 1850}
1851#endif
1852inline u8 rtl8192_IsWirelessBMode(u16 rate)
1853{
1854 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1855 return 1;
1856 else return 0;
1857}
1858
1859u16 N_DBPSOfRate(u16 DataRate);
1860
1861u16 ComputeTxTime(
1862 u16 FrameLength,
1863 u16 DataRate,
1864 u8 bManagementFrame,
1865 u8 bShortPreamble
1866)
1867{
1868 u16 FrameTime;
1869 u16 N_DBPS;
1870 u16 Ceiling;
1871
1872 if( rtl8192_IsWirelessBMode(DataRate) )
1873 {
1874 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1875 { // long preamble
1876 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1877 }
1878 else
1879 { // Short preamble
1880 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1881 }
1882 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1883 FrameTime ++;
1884 } else { //802.11g DSSS-OFDM PLCP length field calculation.
1885 N_DBPS = N_DBPSOfRate(DataRate);
1886 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1887 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1888 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1889 }
1890 return FrameTime;
1891}
1892
1893u16 N_DBPSOfRate(u16 DataRate)
1894{
1895 u16 N_DBPS = 24;
1896
1897 switch(DataRate)
1898 {
1899 case 60:
1900 N_DBPS = 24;
1901 break;
1902
1903 case 90:
1904 N_DBPS = 36;
1905 break;
1906
1907 case 120:
1908 N_DBPS = 48;
1909 break;
1910
1911 case 180:
1912 N_DBPS = 72;
1913 break;
1914
1915 case 240:
1916 N_DBPS = 96;
1917 break;
1918
1919 case 360:
1920 N_DBPS = 144;
1921 break;
1922
1923 case 480:
1924 N_DBPS = 192;
1925 break;
1926
1927 case 540:
1928 N_DBPS = 216;
1929 break;
1930
1931 default:
1932 break;
1933 }
1934
1935 return N_DBPS;
1936}
1937
1938void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
1939{
5f53d8ca
JC		 1940 usb_free_urb(tx_cmd_urb);
1941}
1942
1943unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
1944
1945 if(tx_queue >= 9)
1946 {
1947 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
1948 return 0x04;
1949 }
1950 return priv->txqueue_to_outpipemap[tx_queue];
1951}
1952
5f53d8ca
JC		 1953short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
1954{
1955 struct r8192_priv *priv = ieee80211_priv(dev);
1956 int status;
1957 struct urb *tx_urb;
1958 unsigned int idx_pipe;
1959 tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
1960 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1961 u8 queue_index = tcb_desc->queue_index;
1962 u32 PktSize = 0;
1963
1964 //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
1965 atomic_inc(&priv->tx_pending[queue_index]);
1966
5f53d8ca 1967 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 1968 if(!tx_urb){
1969 dev_kfree_skb(skb);
1970 return -ENOMEM;
1971 }
1972
1973 memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
1974
1975 /* Tx descriptor ought to be set according to the skb->cb */
1976 pdesc->LINIP = tcb_desc->bLastIniPkt;
1977 PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
1978 pdesc->PktSize = PktSize;
1979 //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
1980 //----------------------------------------------------------------------------
1981 // Fill up USB_OUT_CONTEXT.
1982 //----------------------------------------------------------------------------
1983 // Get index to out pipe from specified QueueID.
1984 idx_pipe = txqueue2outpipe(priv,queue_index);
1985 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
1986
5f53d8ca
JC		 1987 usb_fill_bulk_urb(tx_urb,
1988 priv->udev,
1989 usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
1990 skb->data,
1991 skb->len,
1992 rtl8192_tx_isr,
1993 skb);
1994
5f53d8ca 1995 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
5f53d8ca
JC		 1996 if (!status){
1997 return 0;
1998 }else{
1999 printk("Error TX CMD URB, error %d",
2000 status);
2001 return -1;
2002 }
2003}
5f53d8ca
JC		 2004
2005/*
2006 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
2007 * in TxFwInfo data structure
2008 * 2006.10.30 by Emily
2009 *
2010 * \param QUEUEID Software Queue
2011*/
2012u8 MapHwQueueToFirmwareQueue(u8 QueueID)
2013{
2014 u8 QueueSelect = 0x0; //defualt set to
2015
2016 switch(QueueID) {
2017 case BE_QUEUE:
2018 QueueSelect = QSLT_BE; //or QSelect = pTcb->priority;
2019 break;
2020
2021 case BK_QUEUE:
2022 QueueSelect = QSLT_BK; //or QSelect = pTcb->priority;
2023 break;
2024
2025 case VO_QUEUE:
2026 QueueSelect = QSLT_VO; //or QSelect = pTcb->priority;
2027 break;
2028
2029 case VI_QUEUE:
2030 QueueSelect = QSLT_VI; //or QSelect = pTcb->priority;
2031 break;
2032 case MGNT_QUEUE:
2033 QueueSelect = QSLT_MGNT;
2034 break;
2035
2036 case BEACON_QUEUE:
2037 QueueSelect = QSLT_BEACON;
2038 break;
2039
2040 // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2041 // TODO: Remove Assertions
2042//#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2043 case TXCMD_QUEUE:
2044 QueueSelect = QSLT_CMD;
2045 break;
2046//#endif
2047 case HIGH_QUEUE:
2048 QueueSelect = QSLT_HIGH;
2049 break;
2050
2051 default:
2052 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2053 break;
2054 }
2055 return QueueSelect;
2056}
2057
5f53d8ca
JC		 2058u8 MRateToHwRate8190Pci(u8 rate)
2059{
2060 u8 ret = DESC92S_RATE1M;
2061
2062 switch(rate)
2063 {
2064 // CCK and OFDM non-HT rates
2065 case MGN_1M: ret = DESC92S_RATE1M; break;
2066 case MGN_2M: ret = DESC92S_RATE2M; break;
2067 case MGN_5_5M: ret = DESC92S_RATE5_5M; break;
2068 case MGN_11M: ret = DESC92S_RATE11M; break;
2069 case MGN_6M: ret = DESC92S_RATE6M; break;
2070 case MGN_9M: ret = DESC92S_RATE9M; break;
2071 case MGN_12M: ret = DESC92S_RATE12M; break;
2072 case MGN_18M: ret = DESC92S_RATE18M; break;
2073 case MGN_24M: ret = DESC92S_RATE24M; break;
2074 case MGN_36M: ret = DESC92S_RATE36M; break;
2075 case MGN_48M: ret = DESC92S_RATE48M; break;
2076 case MGN_54M: ret = DESC92S_RATE54M; break;
2077
2078 // HT rates since here
2079 case MGN_MCS0: ret = DESC92S_RATEMCS0; break;
2080 case MGN_MCS1: ret = DESC92S_RATEMCS1; break;
2081 case MGN_MCS2: ret = DESC92S_RATEMCS2; break;
2082 case MGN_MCS3: ret = DESC92S_RATEMCS3; break;
2083 case MGN_MCS4: ret = DESC92S_RATEMCS4; break;
2084 case MGN_MCS5: ret = DESC92S_RATEMCS5; break;
2085 case MGN_MCS6: ret = DESC92S_RATEMCS6; break;
2086 case MGN_MCS7: ret = DESC92S_RATEMCS7; break;
2087 case MGN_MCS8: ret = DESC92S_RATEMCS8; break;
2088 case MGN_MCS9: ret = DESC92S_RATEMCS9; break;
2089 case MGN_MCS10: ret = DESC92S_RATEMCS10; break;
2090 case MGN_MCS11: ret = DESC92S_RATEMCS11; break;
2091 case MGN_MCS12: ret = DESC92S_RATEMCS12; break;
2092 case MGN_MCS13: ret = DESC92S_RATEMCS13; break;
2093 case MGN_MCS14: ret = DESC92S_RATEMCS14; break;
2094 case MGN_MCS15: ret = DESC92S_RATEMCS15; break;
2095
2096 // Set the highest SG rate
2097 case MGN_MCS0_SG:
2098 case MGN_MCS1_SG:
2099 case MGN_MCS2_SG:
2100 case MGN_MCS3_SG:
2101 case MGN_MCS4_SG:
2102 case MGN_MCS5_SG:
2103 case MGN_MCS6_SG:
2104 case MGN_MCS7_SG:
2105 case MGN_MCS8_SG:
2106 case MGN_MCS9_SG:
2107 case MGN_MCS10_SG:
2108 case MGN_MCS11_SG:
2109 case MGN_MCS12_SG:
2110 case MGN_MCS13_SG:
2111 case MGN_MCS14_SG:
2112 case MGN_MCS15_SG:
2113 {
2114 ret = DESC92S_RATEMCS15_SG;
2115 break;
2116 }
2117
2118 default: break;
2119 }
2120 return ret;
2121}
5f53d8ca
JC		 2122
2123u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2124{
2125 u8 tmp_Short;
2126
2127 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2128
2129 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2130 tmp_Short = 0;
2131
2132 return tmp_Short;
2133}
2134
5f53d8ca 2135static void tx_zero_isr(struct urb *tx_urb)
5f53d8ca
JC		 2136{
2137 return;
2138}
2139
2140
5f53d8ca
JC		 2141/*
2142 * The tx procedure is just as following, skb->cb will contain all the following
2143 *information: * priority, morefrag, rate, &dev.
2144 * */
2145 // <Note> Buffer format for 8192S Usb bulk out:
2146//
2147// --------------------------------------------------
2148// | 8192S Usb Tx Desc | 802_11_MAC_header | data |
2149// --------------------------------------------------
2150// | 32 bytes | 24 bytes |0-2318 bytes|
2151// --------------------------------------------------
2152// |<------------ BufferLen ------------------------->|
2153
2154short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2155{
2156 struct r8192_priv *priv = ieee80211_priv(dev);
2157 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2158 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2159 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2160 struct usb_device *udev = priv->udev;
2161 int pend;
2162 int status;
2163 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2164 //int urb_len;
2165 unsigned int idx_pipe;
2166 u16 MPDUOverhead = 0;
2167 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2168
5f53d8ca
JC		 2169 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2170 /* we are locked here so the two atomic_read and inc are executed
2171 * without interleaves * !!! For debug purpose */
2172 if( pend > MAX_TX_URB){
2173 switch (tcb_desc->queue_index) {
2174 case VO_PRIORITY:
2175 priv->stats.txvodrop++;
2176 break;
2177 case VI_PRIORITY:
2178 priv->stats.txvidrop++;
2179 break;
2180 case BE_PRIORITY:
2181 priv->stats.txbedrop++;
2182 break;
2183 default://BK_PRIORITY
2184 priv->stats.txbkdrop++;
2185 break;
2186 }
2187 printk("To discard skb packet!\n");
2188 dev_kfree_skb_any(skb);
2189 return -1;
2190 }
2191
5f53d8ca 2192 tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
5f53d8ca
JC		 2193 if(!tx_urb){
2194 dev_kfree_skb_any(skb);
2195 return -ENOMEM;
2196 }
2197
2198 memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2199
2200
5f53d8ca 2201 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
5f53d8ca
JC		 2202
2203 /* Fill Tx descriptor */
2204 //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2205
2206 // This part can just fill to the first descriptor of the frame.
2207 /* DWORD 0 */
2208 tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2209
5f53d8ca
JC		 2210
2211 tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2212 //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2213 tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2214
2215
2216 // Aggregation related
2217 if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2218 tx_desc->AllowAggregation = 1;
2219 /* DWORD 1 */
2220 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2221 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2222 } else {
2223 tx_desc->AllowAggregation = 0;
2224 /* DWORD 1 */
2225 //tx_fwinfo->RxMF = 0;
2226 //tx_fwinfo->RxAMD = 0;
2227 }
2228
2229 //
2230 // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
2231 // FW according as this SSN to do necessary packet retry.
2232 // 2008.06.06.
2233 //
2234 {
2235 u8 *pSeq;
2236 u16 Temp;
2237 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
2238 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
2239 Temp = pSeq[0];
2240 Temp <<= 12;
2241 Temp |= (*(u16 *)pSeq)>>4;
2242 tx_desc->Seq = Temp;
2243 }
2244
2245 /* Protection mode related */
2246 tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
2247 tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
2248 tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
2249 tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
2250 tx_desc->RTSRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
2251 tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
2252 tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
2253 tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
2254 (tcb_desc->bRTSUseShortGI?1:0);
2255 //LZM 090219
2256 tx_desc->DisRTSFB = 0;
2257 tx_desc->RTSRateFBLmt = 0xf;
2258
2259 // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
2260 //tx_desc->DisRTSFB = 0x01;
2261
2262 /* Set Bandwidth and sub-channel settings. */
2263 if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
2264 {
2265 if(tcb_desc->bPacketBW) {
2266 tx_desc->TxBandwidth = 1;
2267 tx_desc->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
2268 } else {
2269 tx_desc->TxBandwidth = 0;
2270 tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
2271 }
2272 } else {
2273 tx_desc->TxBandwidth = 0;
2274 tx_desc->TxSubCarrier = 0;
2275 }
2276
5f53d8ca
JC		 2277
2278 //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2279 /* DWORD 0 */
2280 tx_desc->LINIP = 0;
2281 //tx_desc->CmdInit = 1; //92su del
2282 tx_desc->Offset = USB_HWDESC_HEADER_LEN;
2283
5f53d8ca
JC		 2284 {
2285 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
2286 }
2287
2288 /*DWORD 1*/
2289 //tx_desc->SecCAMID= 0;//92su del
2290 tx_desc->RaBRSRID= tcb_desc->RATRIndex;
2291//#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
5f53d8ca 2292
5f53d8ca
JC		 2293 {
2294 MPDUOverhead = 0;
2295 //tx_desc->NoEnc = 1;//92su del
2296 }
35c1b462 2297
5f53d8ca 2298 tx_desc->SecType = 0x0;
35c1b462 2299
5f53d8ca
JC		 2300 if (tcb_desc->bHwSec)
2301 {
2302 switch (priv->ieee80211->pairwise_key_type)
2303 {
2304 case KEY_TYPE_WEP40:
2305 case KEY_TYPE_WEP104:
2306 tx_desc->SecType = 0x1;
2307 //tx_desc->NoEnc = 0;//92su del
2308 break;
2309 case KEY_TYPE_TKIP:
2310 tx_desc->SecType = 0x2;
2311 //tx_desc->NoEnc = 0;//92su del
2312 break;
2313 case KEY_TYPE_CCMP:
2314 tx_desc->SecType = 0x3;
2315 //tx_desc->NoEnc = 0;//92su del
2316 break;
2317 case KEY_TYPE_NA:
2318 tx_desc->SecType = 0x0;
2319 //tx_desc->NoEnc = 1;//92su del
2320 break;
2321 default:
2322 tx_desc->SecType = 0x0;
2323 //tx_desc->NoEnc = 1;//92su del
2324 break;
2325 }
2326 }
2327
2328 //tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);//92su del
2329
2330
2331 tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
2332 tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
2333 tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
2334
2335 tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
2336
2337
2338 /* Fill fields that are required to be initialized in all of the descriptors */
2339 //DWORD 0
5f53d8ca
JC		 2340 tx_desc->FirstSeg = 1;
2341 tx_desc->LastSeg = 1;
5f53d8ca
JC		 2342 tx_desc->OWN = 1;
2343
5f53d8ca
JC		 2344 {
2345 //DWORD 2
2346 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
2347 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
2348 }
2349
5f53d8ca
JC		 2350 /* Get index to out pipe from specified QueueID */
2351 idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
2352 //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
2353
2354 //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
2355 //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
2356
2357 /* To submit bulk urb */
2358 usb_fill_bulk_urb(tx_urb,
2359 udev,
2360 usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
2361 skb->data,
2362 skb->len, rtl8192_tx_isr, skb);
2363
5f53d8ca 2364 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
29a1fbc8
FS		 2365 if (!status) {
2366 /*
2367 * we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted.
2368 * Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
2369 */
5f53d8ca
JC		 2370 bool bSend0Byte = false;
2371 u8 zero = 0;
29a1fbc8 2372 if(udev->speed == USB_SPEED_HIGH) {
5f53d8ca
JC		 2373 if (skb->len > 0 && skb->len % 512 == 0)
2374 bSend0Byte = true;
2375 }
29a1fbc8 2376 else {
5f53d8ca
JC		 2377 if (skb->len > 0 && skb->len % 64 == 0)
2378 bSend0Byte = true;
2379 }
29a1fbc8 2380 if (bSend0Byte) {
5f53d8ca 2381 tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
29a1fbc8 2382 if(!tx_urb_zero) {
5f53d8ca
JC		 2383 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
2384 return -ENOMEM;
2385 }
2386 usb_fill_bulk_urb(tx_urb_zero,udev,
2387 usb_sndbulkpipe(udev,idx_pipe), &zero,
2388 0, tx_zero_isr, dev);
5f53d8ca 2389 status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
29a1fbc8
FS		 2390 switch (status) {
2391 case 0:
2392 break;
2393 case -ECONNRESET:
2394 case -ENOENT:
2395 case -ESHUTDOWN:
2396 break;
2397 default:
2398 RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d",
2399 atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
2400 return -1;
5f53d8ca 2401 }
5f53d8ca
JC		 2402 }
2403 dev->trans_start = jiffies;
2404 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
2405 return 0;
29a1fbc8 2406 } else {
5f53d8ca
JC		 2407 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
2408 status);
2409 return -1;
2410 }
2411}
5f53d8ca 2412
35c1b462 2413void rtl8192SU_net_update(struct net_device *dev)
5f53d8ca
JC		 2414{
2415
2416 struct r8192_priv *priv = ieee80211_priv(dev);
2417 struct ieee80211_device* ieee = priv->ieee80211;
2418 struct ieee80211_network *net = &priv->ieee80211->current_network;
2419 //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2420 u16 rate_config = 0;
2421 u32 regTmp = 0;
2422 u8 rateIndex = 0;
2423 u8 retrylimit = 0x30;
2424 u16 cap = net->capability;
2425
2426 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2427
2428//HW_VAR_BASIC_RATE
2429 //update Basic rate: RR, BRSR
2430 rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
2431
5f53d8ca 2432 priv->basic_rate = rate_config = rate_config & 0x15f;
5f53d8ca
JC		 2433
2434 // Set RRSR rate table.
2435 write_nic_byte(dev, RRSR, rate_config&0xff);
2436 write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
2437
2438 // Set RTS initial rate
2439 while(rate_config > 0x1)
2440 {
2441 rate_config = (rate_config>> 1);
2442 rateIndex++;
2443 }
2444 write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
2445//HW_VAR_BASIC_RATE
2446
2447 //set ack preample
2448 regTmp = (priv->nCur40MhzPrimeSC) << 5;
2449 if (priv->short_preamble)
2450 regTmp |= 0x80;
2451 write_nic_byte(dev, RRSR+2, regTmp);
2452
2453 write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2454 write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2455
2456 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2457 //2008.10.24 added by tynli for beacon changed.
2458 PHY_SetBeaconHwReg( dev, net->beacon_interval);
2459
2460 rtl8192_update_cap(dev, cap);
2461
2462 if (ieee->iw_mode == IW_MODE_ADHOC){
2463 retrylimit = 7;
2464 //we should enable ibss interrupt here, but disable it temporarily
2465 if (0){
2466 priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2467 //rtl8192_irq_disable(dev);
2468 //rtl8192_irq_enable(dev);
2469 }
2470 }
2471 else{
2472 if (0){
2473 priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2474 //rtl8192_irq_disable(dev);
2475 //rtl8192_irq_enable(dev);
2476 }
2477 }
2478
2479 priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
2480
2481 write_nic_word(dev, RETRY_LIMIT,
2482 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
2483 retrylimit << RETRY_LIMIT_LONG_SHIFT);
2484}
2485
2486void rtl8192SU_update_ratr_table(struct net_device* dev)
2487{
2488 struct r8192_priv* priv = ieee80211_priv(dev);
2489 struct ieee80211_device* ieee = priv->ieee80211;
2490 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2491 //struct ieee80211_network *net = &ieee->current_network;
2492 u32 ratr_value = 0;
2493
2494 u8 rate_index = 0;
2495 int WirelessMode = ieee->mode;
2496 u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
2497
2498 u8 bNMode = 0;
2499
2500 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2501 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2502
2503 //switch (ieee->mode)
2504 switch (WirelessMode)
2505 {
2506 case IEEE_A:
2507 ratr_value &= 0x00000FF0;
2508 break;
2509 case IEEE_B:
2510 ratr_value &= 0x0000000D;
2511 break;
2512 case IEEE_G:
2513 ratr_value &= 0x00000FF5;
2514 break;
2515 case IEEE_N_24G:
2516 case IEEE_N_5G:
2517 {
2518 bNMode = 1;
2519
2520 if (MimoPs == 0) //MIMO_PS_STATIC
2521 {
2522 ratr_value &= 0x0007F005;
2523 }
2524 else
2525 { // MCS rate only => for 11N mode.
2526 u32 ratr_mask;
2527
2528 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
2529 if ( priv->rf_type == RF_1T2R ||
2530 priv->rf_type == RF_1T1R ||
2531 (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
2532 ratr_mask = 0x000ff005;
2533 else
2534 ratr_mask = 0x0f0ff005;
2535
2536 if((ieee->pHTInfo->bCurTxBW40MHz) &&
2537 !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
2538 ratr_mask |= 0x00000010; // Set 6MBps
2539
2540 // Select rates for rate adaptive mechanism.
2541 ratr_value &= ratr_mask;
2542 }
2543 }
2544 break;
2545 default:
2546 if(0)
2547 {
2548 if(priv->rf_type == RF_1T2R) // 1T2R, Spatial Stream 2 should be disabled
2549 {
2550 ratr_value &= 0x000ff0f5;
2551 }
2552 else
2553 {
2554 ratr_value &= 0x0f0ff0f5;
2555 }
2556 }
2557 //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
2558 break;
2559 }
2560
5f53d8ca 2561 ratr_value &= 0x0FFFFFFF;
5f53d8ca
JC		 2562
2563 // Get MAX MCS available.
2564 if ( (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
2565 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
2566 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
2567 {
2568 u8 shortGI_rate = 0;
2569 u32 tmp_ratr_value = 0;
2570 ratr_value |= 0x10000000;//???
2571 tmp_ratr_value = (ratr_value>>12);
2572 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
2573 {
2574 if((1<<shortGI_rate) & tmp_ratr_value)
2575 break;
2576 }
2577 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
2578 write_nic_byte(dev, SG_RATE, shortGI_rate);
2579 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
2580 }
2581 write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
2582 printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
2583
2584 //2 UFWP
2585 if (ratr_value & 0xfffff000){
2586 //printk("===>set to N mode\n");
2587 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
2588 }
2589 else {
2590 //printk("===>set to B/G mode\n");
2591 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
2592 }
2593}
2594
2595void rtl8192SU_link_change(struct net_device *dev)
2596{
2597 struct r8192_priv *priv = ieee80211_priv(dev);
2598 struct ieee80211_device* ieee = priv->ieee80211;
2599 //unsigned long flags;
2600 u32 reg = 0;
2601
2602 printk("=====>%s 1\n", __func__);
2603 reg = read_nic_dword(dev, RCR);
2604
2605 if (ieee->state == IEEE80211_LINKED)
2606 {
2607
2608 rtl8192SU_net_update(dev);
2609 rtl8192SU_update_ratr_table(dev);
2610 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2611 priv->ReceiveConfig = reg |= RCR_CBSSID;
2612
2613 }else{
2614 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2615
2616 }
2617
2618 write_nic_dword(dev, RCR, reg);
2619 rtl8192_update_msr(dev);
2620
2621 printk("<=====%s 2\n", __func__);
2622}
5f53d8ca
JC		 2623
2624static struct ieee80211_qos_parameters def_qos_parameters = {
2625 {3,3,3,3},/* cw_min */
2626 {7,7,7,7},/* cw_max */
2627 {2,2,2,2},/* aifs */
2628 {0,0,0,0},/* flags */
2629 {0,0,0,0} /* tx_op_limit */
2630};
2631
2632
5f53d8ca
JC		 2633void rtl8192_update_beacon(struct work_struct * work)
2634{
2635 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
2636 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2637 struct ieee80211_device* ieee = priv->ieee80211;
2638 struct ieee80211_network* net = &ieee->current_network;
2639
2640 if (ieee->pHTInfo->bCurrentHTSupport)
2641 HTUpdateSelfAndPeerSetting(ieee, net);
2642 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
2643 // Joseph test for turbo mode with AP
2644 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
2645 rtl8192_update_cap(dev, net->capability);
2646}
2647/*
2648* background support to run QoS activate functionality
2649*/
2650int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
1ec9e48d 2651
5f53d8ca
JC		 2652void rtl8192_qos_activate(struct work_struct * work)
2653{
2654 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
2655 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 2656 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2657 u8 mode = priv->ieee80211->current_network.mode;
2658 //u32 size = sizeof(struct ieee80211_qos_parameters);
2659 u8 u1bAIFS;
2660 u32 u4bAcParam;
2661 int i;
2662
2663 if (priv == NULL)
2664 return;
2665
5f53d8ca 2666 mutex_lock(&priv->mutex);
1ec9e48d 2667
5f53d8ca
JC		 2668 if(priv->ieee80211->state != IEEE80211_LINKED)
2669 goto success;
2670 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
2671 /* It better set slot time at first */
2672 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
2673 /* update the ac parameter to related registers */
2674 for(i = 0; i < QOS_QUEUE_NUM; i++) {
2675 //Mode G/A: slotTimeTimer = 9; Mode B: 20
2676 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
2677 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
2678 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
2679 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
2680 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2681
2682 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
2683 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
2684 }
2685
2686success:
5f53d8ca 2687 mutex_unlock(&priv->mutex);
5f53d8ca
JC		 2688}
2689
2690static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
2691 int active_network,
2692 struct ieee80211_network *network)
2693{
2694 int ret = 0;
2695 u32 size = sizeof(struct ieee80211_qos_parameters);
2696
2697 if(priv->ieee80211->state !=IEEE80211_LINKED)
2698 return ret;
2699
2700 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2701 return ret;
2702
2703 if (network->flags & NETWORK_HAS_QOS_MASK) {
2704 if (active_network &&
2705 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
2706 network->qos_data.active = network->qos_data.supported;
2707
2708 if ((network->qos_data.active == 1) && (active_network == 1) &&
2709 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
2710 (network->qos_data.old_param_count !=
2711 network->qos_data.param_count)) {
2712 network->qos_data.old_param_count =
2713 network->qos_data.param_count;
5f53d8ca 2714 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2715 RT_TRACE (COMP_QOS, "QoS parameters change call "
2716 "qos_activate\n");
2717 }
2718 } else {
2719 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2720 &def_qos_parameters, size);
2721
2722 if ((network->qos_data.active == 1) && (active_network == 1)) {
5f53d8ca 2723 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2724 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
2725 }
2726 network->qos_data.active = 0;
2727 network->qos_data.supported = 0;
2728 }
2729
2730 return 0;
2731}
2732
2733/* handle manage frame frame beacon and probe response */
2734static int rtl8192_handle_beacon(struct net_device * dev,
f59d0127
BZ		 2735 struct ieee80211_probe_response *beacon,
2736 struct ieee80211_network *network)
5f53d8ca
JC		 2737{
2738 struct r8192_priv *priv = ieee80211_priv(dev);
2739
2740 rtl8192_qos_handle_probe_response(priv,1,network);
5f53d8ca 2741 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
5f53d8ca 2742
5f53d8ca
JC		 2743 return 0;
2744
2745}
2746
2747/*
2748* handling the beaconing responses. if we get different QoS setting
2749* off the network from the associated setting, adjust the QoS
2750* setting
2751*/
2752static int rtl8192_qos_association_resp(struct r8192_priv *priv,
2753 struct ieee80211_network *network)
2754{
2755 int ret = 0;
2756 unsigned long flags;
2757 u32 size = sizeof(struct ieee80211_qos_parameters);
2758 int set_qos_param = 0;
2759
2760 if ((priv == NULL) || (network == NULL))
2761 return ret;
2762
2763 if(priv->ieee80211->state !=IEEE80211_LINKED)
2764 return ret;
2765
2766 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
2767 return ret;
2768
2769 spin_lock_irqsave(&priv->ieee80211->lock, flags);
2770 if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
2771 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2772 &network->qos_data.parameters,\
2773 sizeof(struct ieee80211_qos_parameters));
2774 priv->ieee80211->current_network.qos_data.active = 1;
5f53d8ca
JC		 2775 {
2776 set_qos_param = 1;
2777 /* update qos parameter for current network */
2778 priv->ieee80211->current_network.qos_data.old_param_count = \
2779 priv->ieee80211->current_network.qos_data.param_count;
2780 priv->ieee80211->current_network.qos_data.param_count = \
2781 network->qos_data.param_count;
2782 }
2783 } else {
2784 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
2785 &def_qos_parameters, size);
2786 priv->ieee80211->current_network.qos_data.active = 0;
2787 priv->ieee80211->current_network.qos_data.supported = 0;
2788 set_qos_param = 1;
2789 }
2790
2791 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
2792
2793 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
2794 if (set_qos_param == 1)
5f53d8ca 2795 queue_work(priv->priv_wq, &priv->qos_activate);
5f53d8ca
JC		 2796
2797 return ret;
2798}
2799
2800
2801static int rtl8192_handle_assoc_response(struct net_device *dev,
2802 struct ieee80211_assoc_response_frame *resp,
2803 struct ieee80211_network *network)
2804{
2805 struct r8192_priv *priv = ieee80211_priv(dev);
2806 rtl8192_qos_association_resp(priv, network);
2807 return 0;
2808}
2809
2810
2811void rtl8192_update_ratr_table(struct net_device* dev)
2812 // POCTET_STRING posLegacyRate,
2813 // u8* pMcsRate)
2814 // PRT_WLAN_STA pEntry)
2815{
2816 struct r8192_priv* priv = ieee80211_priv(dev);
2817 struct ieee80211_device* ieee = priv->ieee80211;
2818 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
2819 //struct ieee80211_network *net = &ieee->current_network;
2820 u32 ratr_value = 0;
2821 u8 rate_index = 0;
2822 rtl8192_config_rate(dev, (u16*)(&ratr_value));
2823 ratr_value |= (*(u16*)(pMcsRate)) << 12;
2824// switch (net->mode)
2825 switch (ieee->mode)
2826 {
2827 case IEEE_A:
2828 ratr_value &= 0x00000FF0;
2829 break;
2830 case IEEE_B:
2831 ratr_value &= 0x0000000F;
2832 break;
2833 case IEEE_G:
2834 ratr_value &= 0x00000FF7;
2835 break;
2836 case IEEE_N_24G:
2837 case IEEE_N_5G:
2838 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
2839 ratr_value &= 0x0007F007;
2840 else{
2841 if (priv->rf_type == RF_1T2R)
2842 ratr_value &= 0x000FF007;
2843 else
2844 ratr_value &= 0x0F81F007;
2845 }
2846 break;
2847 default:
2848 break;
2849 }
2850 ratr_value &= 0x0FFFFFFF;
2851 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
2852 ratr_value |= 0x80000000;
2853 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
2854 ratr_value |= 0x80000000;
2855 }
2856 write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2857 write_nic_byte(dev, UFWP, 1);
2858}
2859
2860static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
2861static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
2862bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
2863{
2864#if 1
2865 struct r8192_priv* priv = ieee80211_priv(dev);
2866 struct ieee80211_device* ieee = priv->ieee80211;
2867 struct ieee80211_network * network = &ieee->current_network;
2868 int wpa_ie_len= ieee->wpa_ie_len;
2869 struct ieee80211_crypt_data* crypt;
2870 int encrypt;
5f53d8ca 2871 return TRUE;
5f53d8ca
JC		 2872
2873 crypt = ieee->crypt[ieee->tx_keyidx];
2874 //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
2875 encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
2876
2877 /* simply judge */
2878 if(encrypt && (wpa_ie_len == 0)) {
2879 /* wep encryption, no N mode setting */
2880 return false;
2881// } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
2882 } else if((wpa_ie_len != 0)) {
2883 /* parse pairwise key type */
2884 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
2885 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
2886 return true;
2887 else
2888 return false;
2889 } else {
2890 return true;
2891 }
2892
5f53d8ca
JC		 2893 return true;
2894#endif
2895}
2896
2897bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
2898{
2899 bool Reval;
2900 struct r8192_priv* priv = ieee80211_priv(dev);
2901 struct ieee80211_device* ieee = priv->ieee80211;
2902
2903// Added by Roger, 2008.08.29.
5f53d8ca 2904 return false;
5f53d8ca
JC		 2905
2906 if(ieee->bHalfWirelessN24GMode == true)
2907 Reval = true;
2908 else
2909 Reval = false;
2910
2911 return Reval;
2912}
2913
2914void rtl8192_refresh_supportrate(struct r8192_priv* priv)
2915{
2916 struct ieee80211_device* ieee = priv->ieee80211;
2917 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
2918 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
2919 {
2920 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
2921 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
2922 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
2923 }
2924 else
2925 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
2926 return;
2927}
2928
2929u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
2930{
2931 struct r8192_priv *priv = ieee80211_priv(dev);
2932 u8 ret = 0;
2933 switch(priv->rf_chip)
2934 {
2935 case RF_8225:
2936 case RF_8256:
2937 case RF_PSEUDO_11N:
2938 case RF_6052:
2939 ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
2940 break;
2941 case RF_8258:
2942 ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
2943 break;
2944 default:
2945 ret = WIRELESS_MODE_B;
2946 break;
2947 }
2948 return ret;
2949}
2950void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
2951{
2952 struct r8192_priv *priv = ieee80211_priv(dev);
2953 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
2954
2955#if 1
2956 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
2957 {
2958 if(bSupportMode & WIRELESS_MODE_N_24G)
2959 {
2960 wireless_mode = WIRELESS_MODE_N_24G;
2961 }
2962 else if(bSupportMode & WIRELESS_MODE_N_5G)
2963 {
2964 wireless_mode = WIRELESS_MODE_N_5G;
2965 }
2966 else if((bSupportMode & WIRELESS_MODE_A))
2967 {
2968 wireless_mode = WIRELESS_MODE_A;
2969 }
2970 else if((bSupportMode & WIRELESS_MODE_G))
2971 {
2972 wireless_mode = WIRELESS_MODE_G;
2973 }
2974 else if((bSupportMode & WIRELESS_MODE_B))
2975 {
2976 wireless_mode = WIRELESS_MODE_B;
2977 }
2978 else{
2979 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
2980 wireless_mode = WIRELESS_MODE_B;
2981 }
2982 }
39cfb97b 2983#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we should wait for FPGA
5f53d8ca
JC		 2984 ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
2985#endif
5f53d8ca
JC		 2986 //LZM 090306 usb crash here, mark it temp
2987 //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
5f53d8ca
JC		 2988 priv->ieee80211->mode = wireless_mode;
2989
2990 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
2991 priv->ieee80211->pHTInfo->bEnableHT = 1;
2992 else
2993 priv->ieee80211->pHTInfo->bEnableHT = 0;
2994 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
2995 rtl8192_refresh_supportrate(priv);
2996#endif
2997
2998}
2999
3000
3001short rtl8192_is_tx_queue_empty(struct net_device *dev)
3002{
3003 int i=0;
3004 struct r8192_priv *priv = ieee80211_priv(dev);
3005 //struct ieee80211_device* ieee = priv->ieee80211;
3006 for (i=0; i<=MGNT_QUEUE; i++)
3007 {
3008 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
3009 continue;
3010 if (atomic_read(&priv->tx_pending[i]))
3011 {
3012 printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
3013 return 0;
3014 }
3015 }
3016 return 1;
3017}
35c1b462 3018
5f53d8ca
JC		 3019void rtl8192_hw_sleep_down(struct net_device *dev)
3020{
3021 RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
3022#ifdef TODO
3023// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3024#endif
3025}
1ec9e48d 3026
5f53d8ca
JC		 3027void rtl8192_hw_sleep_wq (struct work_struct *work)
3028{
3029// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3030// struct ieee80211_device * ieee = (struct ieee80211_device*)
3031// container_of(work, struct ieee80211_device, watch_dog_wq);
3032 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3033 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
3034 struct net_device *dev = ieee->dev;
1ec9e48d 3035
5f53d8ca
JC		 3036 //printk("=========>%s()\n", __FUNCTION__);
3037 rtl8192_hw_sleep_down(dev);
3038}
3039// printk("dev is %d\n",dev);
3040// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
3041void rtl8192_hw_wakeup(struct net_device* dev)
3042{
3043// u32 flags = 0;
3044
3045// spin_lock_irqsave(&priv->ps_lock,flags);
3046 RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
3047#ifdef TODO
3048// MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
3049#endif
3050 //FIXME: will we send package stored while nic is sleep?
3051// spin_unlock_irqrestore(&priv->ps_lock,flags);
3052}
1ec9e48d 3053
5f53d8ca
JC		 3054void rtl8192_hw_wakeup_wq (struct work_struct *work)
3055{
3056// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
3057// struct ieee80211_device * ieee = (struct ieee80211_device*)
3058// container_of(work, struct ieee80211_device, watch_dog_wq);
3059 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3060 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
3061 struct net_device *dev = ieee->dev;
5f53d8ca 3062
1ec9e48d 3063 rtl8192_hw_wakeup(dev);
5f53d8ca
JC		 3064}
3065
3066#define MIN_SLEEP_TIME 50
3067#define MAX_SLEEP_TIME 10000
3068void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
3069{
3070
3071 struct r8192_priv *priv = ieee80211_priv(dev);
3072
3073 u32 rb = jiffies;
3074 unsigned long flags;
3075
3076 spin_lock_irqsave(&priv->ps_lock,flags);
3077
3078 /* Writing HW register with 0 equals to disable
3079 * the timer, that is not really what we want
3080 */
3081 tl -= MSECS(4+16+7);
3082
3083 //if(tl == 0) tl = 1;
3084
3085 /* FIXME HACK FIXME HACK */
3086// force_pci_posting(dev);
3087 //mdelay(1);
3088
3089// rb = read_nic_dword(dev, TSFTR);
3090
3091 /* If the interval in witch we are requested to sleep is too
3092 * short then give up and remain awake
3093 */
3094 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3095 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3096 spin_unlock_irqrestore(&priv->ps_lock,flags);
3097 printk("too short to sleep\n");
3098 return;
3099 }
3100
3101// write_nic_dword(dev, TimerInt, tl);
3102// rb = read_nic_dword(dev, TSFTR);
3103 {
3104 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3105 // if (tl<rb)
3106
5f53d8ca 3107 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
5f53d8ca
JC		 3108 }
3109 /* if we suspect the TimerInt is gone beyond tl
3110 * while setting it, then give up
3111 */
3112#if 1
3113 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3114 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3115 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
3116 spin_unlock_irqrestore(&priv->ps_lock,flags);
3117 return;
3118 }
3119#endif
3120// if(priv->rf_sleep)
3121// priv->rf_sleep(dev);
3122
3123 //printk("<=========%s()\n", __FUNCTION__);
5f53d8ca 3124 queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
1ec9e48d 3125
5f53d8ca
JC		 3126 spin_unlock_irqrestore(&priv->ps_lock,flags);
3127}
3128//init priv variables here. only non_zero value should be initialized here.
3129static void rtl8192_init_priv_variable(struct net_device* dev)
3130{
3131 struct r8192_priv *priv = ieee80211_priv(dev);
3132 u8 i;
3133 priv->card_8192 = NIC_8192U;
3134 priv->chan = 1; //set to channel 1
3135 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
3136 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3137 priv->ieee80211->ieee_up=0;
3138 priv->retry_rts = DEFAULT_RETRY_RTS;
3139 priv->retry_data = DEFAULT_RETRY_DATA;
3140 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
3141 priv->ieee80211->rate = 110; //11 mbps
3142 priv->ieee80211->short_slot = 1;
3143 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3144 priv->CckPwEnl = 6;
3145 //for silent reset
3146 priv->IrpPendingCount = 1;
3147 priv->ResetProgress = RESET_TYPE_NORESET;
3148 priv->bForcedSilentReset = 0;
3149 priv->bDisableNormalResetCheck = false;
3150 priv->force_reset = false;
3151
3152 priv->ieee80211->FwRWRF = 0; //we don't use FW read/write RF until stable firmware is available.
3153 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3154 priv->ieee80211->iw_mode = IW_MODE_INFRA;
3155 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
3156 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3157 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
3158 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
3159
3160 priv->ieee80211->active_scan = 1;
3161 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
3162 priv->ieee80211->host_encrypt = 1;
3163 priv->ieee80211->host_decrypt = 1;
3164 priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
3165 priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
3166 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
3167 priv->ieee80211->set_chan = rtl8192_set_chan;
3168 priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
3169 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
3170 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
3171 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
3172 priv->ieee80211->init_wmmparam_flag = 0;
3173 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3174 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
3175 priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
3176 priv->ieee80211->qos_support = 1;
3177
3178 //added by WB
3179// priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
3180 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
3181 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
3182 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
3183 //for LPS
3184 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
3185// priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
3186 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
3187 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
3188 //added by david
3189 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
3190 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
3191 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
3192 //added by amy
3193 priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
3194 priv->card_type = USB;
3195
5f53d8ca
JC		 3196//1 RTL8192SU/
3197 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3198 priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
3199 priv->bRFSiOrPi = 0;//o=si,1=pi;
3200 //lzm add
3201 priv->bInHctTest = false;
3202
3203 priv->MidHighPwrTHR_L1 = 0x3B;
3204 priv->MidHighPwrTHR_L2 = 0x40;
3205
3206 if(priv->bInHctTest)
3207 {
3208 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3209 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
3210 }
3211 else
3212 {
3213 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
3214 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
3215 }
3216
3217 priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
3218 priv->CurrentFwCmdIO = 0;
3219
3220 priv->MinSpaceCfg = 0;
3221
3222 priv->EarlyRxThreshold = 7;
3223 priv->enable_gpio0 = 0;
3224 priv->TransmitConfig =
3225 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3226 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
3227 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
3228 (false ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3229 if(priv->bInHctTest)
3230 priv->ReceiveConfig = //priv->CSMethod |
3231 RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
3232 RCR_ACF |RCR_APPFCS| //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3233 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
3234 RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
3235 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3236 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3237 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3238 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
3239 else
3240 priv->ReceiveConfig = //priv->CSMethod |
3241 RCR_AMF | RCR_ADF | RCR_AB |
3242 RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
3243 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF | // Accept PHY status
3244 RCR_APP_MIC | RCR_APPFCS;
3245
3246 // <Roger_EXP> 2008.06.16.
3247 priv->IntrMask = (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | \
3248 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | \
3249 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW | \
3250 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3251
3252//1 End
3253
5f53d8ca
JC		 3254
3255 priv->AcmControl = 0;
3256 priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
3257 if (priv->pFirmware)
3258 memset(priv->pFirmware, 0, sizeof(rt_firmware));
3259
3260 /* rx related queue */
3261 skb_queue_head_init(&priv->rx_queue);
3262 skb_queue_head_init(&priv->skb_queue);
3263
3264 /* Tx related queue */
3265 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3266 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
3267 }
3268 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3269 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
3270 }
3271 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
3272 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
3273 }
3274 priv->rf_set_chan = rtl8192_phy_SwChnl;
3275}
3276
3277//init lock here
3278static void rtl8192_init_priv_lock(struct r8192_priv* priv)
3279{
3280 spin_lock_init(&priv->tx_lock);
3281 spin_lock_init(&priv->irq_lock);//added by thomas
3282 //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
3283 sema_init(&priv->wx_sem,1);
3284 sema_init(&priv->rf_sem,1);
3285 spin_lock_init(&priv->ps_lock);
5f53d8ca 3286 mutex_init(&priv->mutex);
5f53d8ca
JC		 3287}
3288
5f53d8ca 3289extern void rtl819x_watchdog_wqcallback(struct work_struct *work);
5f53d8ca
JC		 3290
3291void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
3292//init tasklet and wait_queue here. only 2.6 above kernel is considered
3293#define DRV_NAME "wlan0"
3294static void rtl8192_init_priv_task(struct net_device* dev)
3295{
3296 struct r8192_priv *priv = ieee80211_priv(dev);
3297
5f53d8ca
JC		 3298#ifdef PF_SYNCTHREAD
3299 priv->priv_wq = create_workqueue(DRV_NAME,0);
3300#else
3301 priv->priv_wq = create_workqueue(DRV_NAME);
3302#endif
5f53d8ca 3303
5f53d8ca
JC		 3304 INIT_WORK(&priv->reset_wq, rtl8192_restart);
3305
3306 //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
3307 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
3308 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
3309// INIT_DELAYED_WORK(&priv->gpio_change_rf_wq, dm_gpio_change_rf_callback);
3310 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
3311 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
3312 INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
3313 //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem);
3314 //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem);
3315 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
3316 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
3317 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
3318
5f53d8ca
JC		 3319 tasklet_init(&priv->irq_rx_tasklet,
3320 (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
3321 (unsigned long)priv);
3322}
3323
3324static void rtl8192_get_eeprom_size(struct net_device* dev)
3325{
3326 u16 curCR = 0;
3327 struct r8192_priv *priv = ieee80211_priv(dev);
3328 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3329 curCR = read_nic_word_E(dev,EPROM_CMD);
3330 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3331 //whether need I consider BIT5?
3332 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3333 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3334}
3335
3336//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3337static inline u16 endian_swap(u16* data)
3338{
3339 u16 tmp = *data;
3340 *data = (tmp >> 8) | (tmp << 8);
3341 return *data;
3342}
3343
5f53d8ca
JC		 3344u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
3345{
3346 u8 nEndPoint = 0;
3347 switch(UsbOption)
3348 {
3349 case 0:
3350 nEndPoint = 6;
3351 break;
3352 case 1:
3353 nEndPoint = 11;
3354 break;
3355 case 2:
3356 nEndPoint = 4;
3357 break;
3358 default:
3359 RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
3360 break;
3361 }
3362 return nEndPoint;
3363}
3364
3365u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev, u8 Boardtype)
3366{
3367 u8 RFtype = RF_1T2R;
3368
3369 switch(Boardtype)
3370 {
3371 case 0:
3372 RFtype = RF_1T1R;
3373 break;
3374 case 1:
3375 RFtype = RF_1T2R;
3376 break;
3377 case 2:
3378 RFtype = RF_2T2R;
3379 break;
3380 case 3:
3381 RFtype = RF_2T2R_GREEN;
3382 break;
3383 default:
3384 break;
3385 }
3386
3387 return RFtype;
3388}
3389
88e05d85
DC		 3390void update_hal_variables(struct r8192_priv *priv)
3391{
3392 int rf_path;
3393 int i;
3394 u8 index;
3395
3396 for (rf_path = 0; rf_path < 2; rf_path++) {
3397 for (i = 0; i < 3; i++) {
3398 RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfCckChnlAreaTxPwr[rf_path][i]);
3399 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
3400 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
3401 }
3402 /* Assign dedicated channel tx power */
3403 for(i = 0; i < 14; i++) {
3404 /* channel 1-3 use the same Tx Power Level. */
3405 if (i < 3) /* Channel 1-3 */
3406 index = 0;
3407 else if (i < 9) /* Channel 4-9 */
3408 index = 1;
3409 else /* Channel 10-14 */
3410 index = 2;
3411 /* Record A & B CCK /OFDM - 1T/2T Channel area tx power */
3412 priv->RfTxPwrLevelCck[rf_path][i] = priv->RfCckChnlAreaTxPwr[rf_path][index];
3413 priv->RfTxPwrLevelOfdm1T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
3414 priv->RfTxPwrLevelOfdm2T[rf_path][i] = priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
3415 if (rf_path == 0) {
3416 priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
3417 priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
3418 }
3419 }
3420 for(i = 0; i < 14; i++) {
3421 RT_TRACE((COMP_INIT),
3422 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
3423 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
3424 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
3425 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
3426 }
3427 }
3428}
3429
5f53d8ca
JC		 3430//
3431// Description:
3432// Config HW adapter information into initial value.
3433//
3434// Assumption:
3435// 1. After Auto load fail(i.e, check CR9346 fail)
3436//
3437// Created by Roger, 2008.10.21.
3438//
3439void
3440rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3441{
3442 struct r8192_priv *priv = ieee80211_priv(dev);
3443 //u16 i,usValue;
3444 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
88e05d85 3445 u8 rf_path; // For EEPROM/EFUSE After V0.6_1117
5f53d8ca
JC		 3446 int i;
3447
3448 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3449
3450 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3451 //PlatformStallExecution(10000);
3452 mdelay(10);
3453 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3454
3455 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3456
3457 // Initialize IC Version && Channel Plan
3458 priv->eeprom_vid = 0;
3459 priv->eeprom_pid = 0;
3460 priv->card_8192_version = 0;
3461 priv->eeprom_ChannelPlan = 0;
3462 priv->eeprom_CustomerID = 0;
3463 priv->eeprom_SubCustomerID = 0;
3464 priv->bIgnoreDiffRateTxPowerOffset = false;
3465
3466 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3467 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3468 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3469 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3470 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3471 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3472
3473
3474
3475 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3476 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3477
35c1b462
BZ		 3478 for(i=0; i<5; i++)
3479 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
5f53d8ca 3480
35c1b462 3481 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
5f53d8ca 3482
35c1b462
BZ		 3483 {
3484 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
5f53d8ca
JC		 3485 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3486 u8 i;
3487
35c1b462 3488 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
5f53d8ca
JC		 3489
3490 for(i = 0; i < 6; i++)
3491 dev->dev_addr[i] = sMacAddr[i];
3492 }
5f53d8ca
JC		 3493 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3494 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3495 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3496
6756993b
HS		 3497 RT_TRACE(COMP_INIT,
3498 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3499 dev->dev_addr);
5f53d8ca 3500
35c1b462
BZ		 3501 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3502 priv->rf_type = RF_1T2R; //RF_2T2R
3503 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3504 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3505 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3506 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3507 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3508 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3509 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
5f53d8ca 3510
5f53d8ca 3511
5f53d8ca 3512
35c1b462
BZ		 3513 for (rf_path = 0; rf_path < 2; rf_path++)
3514 {
3515 for (i = 0; i < 3; i++)
5f53d8ca 3516 {
35c1b462
BZ		 3517 // Read CCK RF A & B Tx power
3518 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3519 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3520 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3521 (u8)(EEPROM_Default_TxPower & 0xff);
5f53d8ca 3522 }
35c1b462 3523 }
5f53d8ca 3524
88e05d85 3525 update_hal_variables(priv);
5f53d8ca 3526
35c1b462
BZ		 3527 //
3528 // Update remained HAL variables.
3529 //
3530 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3531 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
3532 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3533 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
3534 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
3535 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15
3536 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
5f53d8ca
JC		 3537 priv->LedStrategy = SW_LED_MODE0;
3538
3539 init_rate_adaptive(dev);
3540
35c1b462 3541 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
5f53d8ca
JC		 3542
3543}
5f53d8ca
JC		 3544
3545//
3546// Description:
3547// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
3548//
3549// Assumption:
3550// 1. CR9346 regiser has verified.
3551// 2. PASSIVE_LEVEL (USB interface)
3552//
3553// Created by Roger, 2008.10.21.
3554//
e3133b28 3555void rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
5f53d8ca 3556{
e3133b28
FS		 3557 struct r8192_priv *priv = ieee80211_priv(dev);
3558 u16 i;
3559 u8 tmpU1b, tempval;
3560 u16 EEPROMId;
3561 u8 hwinfo[HWSET_MAX_SIZE_92S];
3562 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
3563 struct eeprom_93cx6 eeprom;
3564 u16 eeprom_val;
3565
3566 eeprom.data = dev;
3567 eeprom.register_read = rtl819x_eeprom_register_read;
3568 eeprom.register_write = rtl819x_eeprom_register_write;
3569 if (priv->epromtype == EPROM_93c46)
3570 eeprom.width = PCI_EEPROM_WIDTH_93C46;
3571 else
3572 eeprom.width = PCI_EEPROM_WIDTH_93C56;
5f53d8ca
JC		 3573
3574 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
3575
e3133b28
FS		 3576 /*
3577 * The following operation are prevent Efuse leakage by turn on 2.5V..
3578 */
5f53d8ca
JC		 3579 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3580 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
5f53d8ca
JC		 3581 mdelay(10);
3582 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3583
3584 // Retrieve Chip version.
3585 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3586 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3587
e3133b28
FS		 3588 switch (priv->card_8192_version) {
3589 case 0:
3590 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3591 break;
3592 case 1:
3593 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3594 break;
3595 case 2:
3596 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3597 break;
3598 default:
3599 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3600 priv->card_8192_version = VERSION_8192S_BCUT;
3601 break;
5f53d8ca
JC		 3602 }
3603
3604 //if (IS_BOOT_FROM_EEPROM(Adapter))
3605 if(priv->EepromOrEfuse)
3606 { // Read frin EEPROM
3607 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3608 //PlatformStallExecution(10000);
3609 mdelay(10);
3610 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
3611 // Read all Content from EEPROM or EFUSE.
3612 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
3613 {
e3133b28
FS		 3614 eeprom_93cx6_read(&eeprom, (u16) (i>>1), &eeprom_val);
3615 *((u16 *)(&hwinfo[i])) = eeprom_val;
5f53d8ca
JC		 3616 }
3617 }
3618 else if (!(priv->EepromOrEfuse))
3619 { // Read from EFUSE
3620
3621 //
3622 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3623 // from suspend mode.
3624 // 2008.10.21.
3625 //
3626 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3627 //PlatformStallExecution(10000);
3628 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3629 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3630
3631 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3632 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3633 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3634 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3635
3636 // Read EFUSE real map to shadow.
3637 EFUSE_ShadowMapUpdate(dev);
3638 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3639 }
3640 else
3641 {
3642 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3643 }
3644
3645 //YJ,test,090106
3646 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3647 //
3648 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3649 //
3650 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3651
3652 //
3653 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
3654 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
3655 // 2008.10.21.
3656 //
3657 EEPROMId = *((u16 *)&hwinfo[0]);
3658
3659 if( EEPROMId != RTL8190_EEPROM_ID )
3660 {
3661 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3662 priv->bTXPowerDataReadFromEEPORM = FALSE;
3663 priv->AutoloadFailFlag=TRUE;
3664 }
3665 else
3666 {
3667 priv->AutoloadFailFlag=FALSE;
5f53d8ca 3668 priv->bTXPowerDataReadFromEEPORM = TRUE;
5f53d8ca
JC		 3669 }
3670 // Read IC Version && Channel Plan
3671 if(!priv->AutoloadFailFlag)
3672 {
3673 // VID, PID
3674 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3675 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3676 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3677
3678
3679 // EEPROM Version ID, Channel plan
3680 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3681 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3682
3683 // Customer ID, 0x00 and 0xff are reserved for Realtek.
3684 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3685 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3686 }
3687 else
3688 {
3689 //priv->eeprom_vid = 0;
3690 //priv->eeprom_pid = 0;
3691 //priv->EEPROMVersion = 0;
3692 //priv->eeprom_ChannelPlan = 0;
3693 //priv->eeprom_CustomerID = 0;
3694 //priv->eeprom_SubCustomerID = 0;
3695
3696 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3697 return;
3698 }
3699
3700
3701 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3702 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3703 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3704 RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
3705 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
3706 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
3707 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3708 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3709
3710
3711 // Read USB optional function.
3712 if(!priv->AutoloadFailFlag)
3713 {
3714 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3715 }
3716 else
3717 {
3718 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3719 }
3720
3721
3722 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3723
3724 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
3725 RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
3726
3727#ifdef TO_DO_LIST
3728 //
3729 // Decide CustomerID according to VID/DID or EEPROM
3730 //
3731 switch(pHalData->EEPROMCustomerID)
3732 {
3733 case EEPROM_CID_ALPHA:
3734 pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
3735 break;
3736
3737 case EEPROM_CID_CAMEO:
3738 pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
3739 break;
3740
3741 case EEPROM_CID_SITECOM:
3742 pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
3743 RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
3744
3745 break;
3746
3747 case EEPROM_CID_WHQL:
3748 Adapter->bInHctTest = TRUE;
3749
3750 pMgntInfo->bSupportTurboMode = FALSE;
3751 pMgntInfo->bAutoTurboBy8186 = FALSE;
3752
3753 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
3754 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
3755 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
3756 pMgntInfo->keepAliveLevel = 0;
3757 break;
3758
3759 default:
3760 pMgntInfo->CustomerID = RT_CID_DEFAULT;
3761 break;
3762
3763 }
3764
3765 //
3766 // Led mode
3767 //
3768 switch(pMgntInfo->CustomerID)
3769 {
3770 case RT_CID_DEFAULT:
3771 case RT_CID_819x_ALPHA:
3772 pHalData->LedStrategy = SW_LED_MODE1;
3773 pHalData->bRegUseLed = TRUE;
3774 pHalData->SwLed1.bLedOn = TRUE;
3775 break;
3776 case RT_CID_819x_CAMEO:
3777 pHalData->LedStrategy = SW_LED_MODE1;
3778 pHalData->bRegUseLed = TRUE;
3779 break;
3780
3781 case RT_CID_819x_Sitecom:
3782 pHalData->LedStrategy = SW_LED_MODE2;
3783 pHalData->bRegUseLed = TRUE;
3784 break;
3785
3786 default:
3787 pHalData->LedStrategy = SW_LED_MODE0;
3788 break;
3789 }
3790#endif
3791
3792 // Read USB PHY parameters.
3793 for(i=0; i<5; i++)
3794 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
3795
3796 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
3797
3798
3799 //Read Permanent MAC address
3800 for(i=0; i<6; i++)
3801 dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
3802
3803 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
3804 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3805 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3806
6756993b
HS		 3807 RT_TRACE(COMP_INIT,
3808 "ReadAdapterInfo8192SEFuse(), Permanent Address = %pM\n",
3809 dev->dev_addr);
5f53d8ca
JC		 3810
3811 //
3812 // Get CustomerID(Boad Type)
3813 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
3814 // Others: Reserved. Default is 0x2: RTL8192SU.
3815 //
3816 //if(!priv->AutoloadFailFlag)
3817 //{
3818 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
3819 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
3820 //}
3821 //else
3822 //{
3823 // priv->EEPROMBoardType = EEPROM_Default_BoardType;
3824 // priv->rf_type = RF_1T2R;
3825 //}
3826
5f53d8ca 3827 priv->rf_chip = RF_6052;
5f53d8ca
JC		 3828
3829 priv->rf_chip = RF_6052;//lzm test
3830 RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
3831 RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
3832
3833 //
3834 // Read antenna tx power offset of B/C/D to A from EEPROM
3835 // and read ThermalMeter from EEPROM
3836 //
3837 //if(!priv->AutoloadFailFlag)
3838 {
3839 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
3840 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
3841 }
3842 //else
3843 //{
3844 // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3845 // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3846 //}
3847
3848 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
3849 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
3850
3851 //
3852 // Read Tx Power gain offset of legacy OFDM to HT rate.
3853 // Read CrystalCap from EEPROM
3854 //
3855 //if(!priv->AutoloadFailFlag)
3856 {
3857 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
3858 }
3859 //else
3860 //{
3861 // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
3862 //}
3863
3864 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
3865
3866 //
3867 // Get Tx Power Base.
3868 //
3869 //if(!priv->AutoloadFailFlag)
3870 {
3871 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
3872 }
3873 //else
3874 //{
3875 // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
3876 //}
3877
3878 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
3879
3880
3881 //
3882 // Get TSSI value for each path.
3883 //
3884 //if(!priv->AutoloadFailFlag)
3885 {
3886 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
3887 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
3888 }
3889 //else
3890 //{ // Default setting for Empty EEPROM
3891 // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
3892 // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3893 //}
3894
3895 RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
3896
3897 //
3898 // Get Tx Power tracking mode.
3899 //
3900 //if(!priv->AutoloadFailFlag)
3901 {
3902 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
3903 }
3904
3905 RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
3906
3907
5f53d8ca
JC		 3908 {
3909 //
3910 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
3911 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
3912 //
3913
3914 //
3915 // Get Tx Power Level by Channel
3916 //
3917 //if(!priv->AutoloadFailFlag)
3918 {
3919 // Read Tx power of Channel 1 ~ 14 from EFUSE.
3920 // 92S suupport RF A & B
3921 for (rf_path = 0; rf_path < 2; rf_path++)
3922 {
3923 for (i = 0; i < 3; i++)
3924 {
3925 // Read CCK RF A & B Tx power
3926 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3927 hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
3928
3929 // Read OFDM RF A & B Tx power for 1T
3930 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3931 hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
3932
3933 // Read OFDM RF A & B Tx power for 2T
3934 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
3935 hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
3936 }
3937 }
3938
3939 }
88e05d85 3940 update_hal_variables(priv);
5f53d8ca
JC		 3941 }
3942
3943 //
3944 // 2009/02/09 Cosa add for new EEPROM format
3945 //
3946 for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
3947 {
3948 // Read tx power difference between HT OFDM 20/40 MHZ
3949 if (i < 3) // Cjanel 1-3
3950 index = 0;
3951 else if (i < 9) // Channel 4-9
3952 index = 1;
3953 else // Channel 10-14
3954 index = 2;
3955
3956 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
3957 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
3958 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3959
3960 // Read OFDM<->HT tx power diff
3961 if (i < 3) // Cjanel 1-3
3962 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
3963 else if (i < 9) // Channel 4-9
3964 tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
3965 else // Channel 10-14
3966 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
3967
3968 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
3969 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
3970 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
3971
3972 //
3973 // Read Band Edge tx power offset and check if user enable the ability
3974 //
3975 // HT 40 band edge channel
3976 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
3977 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3978 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3979 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
3980 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3981 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3982 // HT 20 band edge channel
3983 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
3984 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3985 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3986 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
3987 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3988 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3989 // OFDM band edge channel
3990 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
3991 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
3992 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
3993 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
3994 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
3995 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
3996
3997 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
3998 }
3999
4000 for(i=0; i<14; i++)
4001 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
4002 for(i=0; i<14; i++)
4003 RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
4004 for(i=0; i<14; i++)
4005 RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
4006 for(i=0; i<14; i++)
4007 RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
4008 RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4009 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
4010 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
4011 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
4012 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
4013 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
4014
4015 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4016 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
4017 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
4018 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
4019 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
4020 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
4021
4022 RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4023 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
4024 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
4025 RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
4026 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
4027 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
4028 RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
5f53d8ca
JC		 4029
4030 //
4031 // Update remained HAL variables.
4032 //
4033 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4034 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
4035 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4036 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
4037 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
4038 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
4039 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4040 priv->LedStrategy = SW_LED_MODE0;
4041
4042 init_rate_adaptive(dev);
4043
4044 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4045
4046 //return RT_STATUS_SUCCESS;
4047}
4048
4049
4050//
4051// Description:
4052// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
4053//
4054// Assumption:
4055// 1. CR9346 regiser has verified.
4056// 2. PASSIVE_LEVEL (USB interface)
4057//
4058// Created by Roger, 2008.10.21.
4059//
4060static void rtl8192SU_read_eeprom_info(struct net_device *dev)
4061{
4062 struct r8192_priv *priv = ieee80211_priv(dev);
4063 u8 tmpU1b;
4064
4065 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
4066
4067 // Retrieve Chip version.
4068 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
4069 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
4070
4071 tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
4072
4073 // To check system boot selection.
4074 if (tmpU1b & CmdEERPOMSEL)
4075 {
4076 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
4077 priv->EepromOrEfuse = TRUE;
4078 }
4079 else
4080 {
4081 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
4082 priv->EepromOrEfuse = FALSE;
4083 }
4084
4085 // To check autoload success or not.
4086 if (tmpU1b & CmdEEPROM_En)
4087 {
4088 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
4089 priv->AutoloadFailFlag=FALSE;
4090 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
4091 }
4092 else
4093 { // Auto load fail.
4094 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
4095 priv->AutoloadFailFlag=TRUE;
4096 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
4097
4098 //if (IS_BOOT_FROM_EFUSE(Adapter))
4099 if(!priv->EepromOrEfuse)
4100 {
4101 RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
4102 EFUSE_ShadowMapUpdate(dev);
4103 }
4104 }
4105#ifdef TO_DO_LIST
4106 if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
4107 {
4108 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
4109 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
4110 }
4111 else
4112 {
4113 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
4114 }
4115
4116 switch(pMgntInfo->ChannelPlan)
4117 {
4118 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
4119 {
4120 PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
4121
4122 pDot11dInfo->bEnabled = TRUE;
4123 }
4124 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
4125 break;
4126 }
4127
4128 RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
4129 RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
4130
4131 RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
4132#endif
4133
4134 RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
4135
4136 //return RT_STATUS_SUCCESS;
4137}
0f29f587
BZ		 4138
4139short rtl8192_get_channel_map(struct net_device * dev)
5f53d8ca 4140{
5f53d8ca 4141 struct r8192_priv *priv = ieee80211_priv(dev);
0f29f587
BZ		 4142 if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
4143 printk("rtl8180_init:Error channel plan! Set to default.\n");
4144 priv->ChannelPlan= 0;
5f53d8ca 4145 }
0f29f587 4146 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
5f53d8ca 4147
0f29f587
BZ		 4148 rtl819x_set_channel_map(priv->ChannelPlan, priv);
4149 return 0;
4150}
5f53d8ca
JC		 4151
4152short rtl8192_init(struct net_device *dev)
4153{
4154
4155 struct r8192_priv *priv = ieee80211_priv(dev);
4156
5f53d8ca
JC		 4157 rtl8192_init_priv_variable(dev);
4158 rtl8192_init_priv_lock(priv);
4159 rtl8192_init_priv_task(dev);
4160 rtl8192_get_eeprom_size(dev);
4161 priv->ops->rtl819x_read_eeprom_info(dev);
4162 rtl8192_get_channel_map(dev);
4163 init_hal_dm(dev);
4164 init_timer(&priv->watch_dog_timer);
4165 priv->watch_dog_timer.data = (unsigned long)dev;
4166 priv->watch_dog_timer.function = watch_dog_timer_callback;
5f53d8ca
JC		 4167 return 0;
4168}
4169
4170/******************************************************************************
4171 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
4172 * not to do all the hw config as its name says
4173 * input: net_device dev
4174 * output: none
4175 * return: none
4176 * notice: This part need to modified according to the rate set we filtered
4177 * ****************************************************************************/
4178void rtl8192_hwconfig(struct net_device* dev)
4179{
4180 u32 regRATR = 0, regRRSR = 0;
4181 u8 regBwOpMode = 0, regTmp = 0;
4182 struct r8192_priv *priv = ieee80211_priv(dev);
4183
4184// Set RRSR, RATR, and BW_OPMODE registers
4185 //
4186 switch(priv->ieee80211->mode)
4187 {
4188 case WIRELESS_MODE_B:
4189 regBwOpMode = BW_OPMODE_20MHZ;
4190 regRATR = RATE_ALL_CCK;
4191 regRRSR = RATE_ALL_CCK;
4192 break;
4193 case WIRELESS_MODE_A:
4194 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4195 regRATR = RATE_ALL_OFDM_AG;
4196 regRRSR = RATE_ALL_OFDM_AG;
4197 break;
4198 case WIRELESS_MODE_G:
4199 regBwOpMode = BW_OPMODE_20MHZ;
4200 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4201 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4202 break;
4203 case WIRELESS_MODE_AUTO:
4204#ifdef TO_DO_LIST
4205 if (Adapter->bInHctTest)
4206 {
4207 regBwOpMode = BW_OPMODE_20MHZ;
4208 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4209 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4210 }
4211 else
4212#endif
4213 {
4214 regBwOpMode = BW_OPMODE_20MHZ;
4215 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4216 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4217 }
4218 break;
4219 case WIRELESS_MODE_N_24G:
4220 // It support CCK rate by default.
4221 // CCK rate will be filtered out only when associated AP does not support it.
4222 regBwOpMode = BW_OPMODE_20MHZ;
4223 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4224 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4225 break;
4226 case WIRELESS_MODE_N_5G:
4227 regBwOpMode = BW_OPMODE_5G;
4228 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4229 regRRSR = RATE_ALL_OFDM_AG;
4230 break;
4231 }
4232
4233 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4234 {
4235 u32 ratr_value = 0;
4236 ratr_value = regRATR;
4237 if (priv->rf_type == RF_1T2R)
4238 {
4239 ratr_value &= ~(RATE_ALL_OFDM_2SS);
4240 }
4241 write_nic_dword(dev, RATR0, ratr_value);
4242 write_nic_byte(dev, UFWP, 1);
4243 }
4244 regTmp = read_nic_byte(dev, 0x313);
4245 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
4246 write_nic_dword(dev, RRSR, regRRSR);
4247
4248 //
4249 // Set Retry Limit here
4250 //
4251 write_nic_word(dev, RETRY_LIMIT,
4252 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
4253 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
4254 // Set Contention Window here
4255
4256 // Set Tx AGC
4257
4258 // Set Tx Antenna including Feedback control
4259
4260 // Set Auto Rate fallback control
4261
4262
4263}
4264
5f53d8ca
JC		 4265
4266//
4267// Description:
4268// Initial HW relted registers.
4269//
4270// Assumption:
4271// Config RTL8192S USB MAC, we should config MAC before download FW.
4272//
4273// 2008.09.03, Added by Roger.
4274//
4275static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
4276{
4277 u8 tmpU1b;// i;
4278// u16 tmpU2b;
4279// u32 tmpU4b;
4280 u8 PollingCnt = 20;
4281
4282 RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
4283
4284 //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
4285
4286 //
4287 //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
4288 // MAC I/O to solve FW download fail when system from resume sate.
4289 // 2008.11.04.
4290 //
4291 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4292 if(tmpU1b & 0x80)
4293 {
4294 tmpU1b &= 0x3f;
4295 write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
4296 }
4297 // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
4298 write_nic_byte(dev, RPWM, 0x0);
4299
4300 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4301 tmpU1b &= 0x73;
4302 write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
4303 udelay(1000);
4304
4305 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4306 write_nic_byte(dev, SPS0_CTRL+1, 0x53);
4307 write_nic_byte(dev, SPS0_CTRL, 0x57);
4308
4309 //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
4310 tmpU1b = read_nic_byte(dev, AFE_MISC);
4311 write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
4312
4313 //Enable PLL Power (LDOA15V)
4314 tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
4315 write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
4316
4317 //Enable LDOV12D block
4318 tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
4319 write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
4320
4321 //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4322 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
4323
4324 //PlatformSleepUs(2000);
4325
4326 //Enable Switch Regulator Block
4327 //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
4328 //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
4329
4330 //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
4331
4332 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4333 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
4334
4335 //Engineer Packet CP test Enable
4336 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4337 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
4338
4339 //Support 64k IMEM, suggested by SD1 Alex.
4340 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
4341 write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
4342
4343 //Enable AFE clock
4344 tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
4345 write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
4346
4347 //Enable AFE PLL Macro Block
4348 tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
4349 write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
4350
4351 //Attatch AFE PLL to MACTOP/BB/PCIe Digital
4352 tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
4353 write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
4354
4355 // Switch to 40M clock
4356 write_nic_byte(dev, SYS_CLKR, 0x00);
4357
4358 //SSC Disable
4359 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4360 //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
4361 write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
4362
4363 //Enable MAC clock
4364 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4365 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
4366
4367 //Revised POS, suggested by SD1 Alex, 2008.09.27.
4368 write_nic_byte(dev, PMC_FSM, 0x02);
4369
4370 //Enable Core digital and enable IOREG R/W
4371 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4372 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
4373
4374 //Enable REG_EN
4375 tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
4376 write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
4377
4378 //Switch the control path to FW
4379 tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
4380 write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
4381
4382 write_nic_byte(dev, CMDR, 0xFC);
4383 write_nic_byte(dev, CMDR+1, 0x37);
4384
4385 //Fix the RX FIFO issue(usb error), 970410
4386 tmpU1b = read_nic_byte_E(dev, 0x5c);
4387 write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
4388
4389 //For power save, used this in the bit file after 970621
4390 tmpU1b = read_nic_byte(dev, SYS_CLKR);
4391 write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
4392
4393 // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
4394 write_nic_byte_E(dev, 0x1c, 0x80);
4395
4396 //
4397 // <Roger_EXP> To make sure that TxDMA can ready to download FW.
4398 // We should reset TxDMA if IMEM RPT was not ready.
4399 // Suggested by SD1 Alex. 2008.10.23.
4400 //
4401 do
4402 {
4403 tmpU1b = read_nic_byte(dev, TCR);
4404 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
4405 break;
4406 //PlatformStallExecution(5);
4407 udelay(5);
4408 }while(PollingCnt--); // Delay 1ms
4409
4410 if(PollingCnt <= 0 )
4411 {
4412 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
4413 tmpU1b = read_nic_byte(dev, CMDR);
4414 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
4415 udelay(2);
4416 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
4417 }
4418
4419
4420 RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
4421}
5f53d8ca 4422
5f53d8ca
JC		 4423//
4424// Description:
4425// Initial HW relted registers.
4426//
4427// Assumption:
4428// 1. This function is only invoked at driver intialization once.
4429// 2. PASSIVE LEVEL.
4430//
4431// 2008.06.10, Added by Roger.
4432//
4433static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
4434{
4435 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
4436 //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
4437 //u8 tmpU1b, RxPageCfg, i;
4438 u16 tmpU2b;
4439 u8 tmpU1b;//, i;
4440
4441
4442 RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
4443
4444 // Enable Tx/Rx
4445 tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
4446 FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
4447 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
4448 write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
4449
4450 // Loopback mode or not
4451 priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
4452 if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
4453 tmpU1b = LBK_NORMAL;
4454 else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
4455 tmpU1b = LBK_MAC_DLB;
4456 else
4457 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
4458
4459 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
4460 write_nic_byte(dev, LBKMD_SEL, tmpU1b);
4461
4462 // Set RCR
4463 write_nic_dword(dev, RCR, priv->ReceiveConfig);
4464 RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
4465
4466
4467 // Set RQPN
4468 //
4469 // <Roger_Notes> 2008.08.18.
4470 // 6 endpoints:
4471 // (1) Page number on CMDQ is 0x03.
4472 // (2) Page number on BCNQ, HQ and MGTQ is 0.
4473 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4474 // (4) Page number on PUBQ is 0xdd
4475 //
4476 // 11 endpoints:
4477 // (1) Page number on CMDQ is 0x00.
4478 // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
4479 // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
4480 // (4) Page number on PUBQ is 0xd8
4481 //
4482 //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
4483 //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
5f53d8ca
JC		 4484
4485 // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
4486 tmpU1b = read_nic_byte_E(dev, 0x5C);
4487 write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
4488
5f53d8ca
JC		 4489 // For EFUSE init configuration.
4490 //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
4491 if (priv->bBootFromEfuse)
4492 {
4493 u8 tempval;
4494
4495 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
4496 tempval &= 0xFE;
4497 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
4498
4499 // Enable LDO 2.5V for write action
4500 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
4501 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
4502
4503 // Change Efuse Clock for write action
4504 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
4505
4506 // Change Program timing
4507 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
4508 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
4509 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
4510 }
4511
4512
4513 RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
4514}
4515
4516void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
4517{
4518
4519 struct r8192_priv *priv = ieee80211_priv(dev);
4520 u8 regBwOpMode = 0;
4521 u32 regRATR = 0, regRRSR = 0;
4522 u8 regTmp = 0;
4523 u32 i = 0;
4524
4525 //1 This part need to modified according to the rate set we filtered!!
4526 //
4527 // Set RRSR, RATR, and BW_OPMODE registers
4528 //
4529 switch(priv->ieee80211->mode)
4530 {
4531 case WIRELESS_MODE_B:
4532 regBwOpMode = BW_OPMODE_20MHZ;
4533 regRATR = RATE_ALL_CCK;
4534 regRRSR = RATE_ALL_CCK;
4535 break;
4536 case WIRELESS_MODE_A:
4537 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
4538 regRATR = RATE_ALL_OFDM_AG;
4539 regRRSR = RATE_ALL_OFDM_AG;
4540 break;
4541 case WIRELESS_MODE_G:
4542 regBwOpMode = BW_OPMODE_20MHZ;
4543 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4544 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4545 break;
4546 case WIRELESS_MODE_AUTO:
4547 if (priv->bInHctTest)
4548 {
4549 regBwOpMode = BW_OPMODE_20MHZ;
4550 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4551 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4552 }
4553 else
4554 {
4555 regBwOpMode = BW_OPMODE_20MHZ;
4556 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4557 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4558 }
4559 break;
4560 case WIRELESS_MODE_N_24G:
4561 // It support CCK rate by default.
4562 // CCK rate will be filtered out only when associated AP does not support it.
4563 regBwOpMode = BW_OPMODE_20MHZ;
4564 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4565 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
4566 break;
4567 case WIRELESS_MODE_N_5G:
4568 regBwOpMode = BW_OPMODE_5G;
4569 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
4570 regRRSR = RATE_ALL_OFDM_AG;
4571 break;
4572 }
4573
4574 //
4575 // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
4576 // 2008.09.23.
4577 //
4578 regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
5f53d8ca 4579 regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
5f53d8ca
JC		 4580
4581 //
4582 // Update SIFS timing.
4583 //
4584 //priv->SifsTime = 0x0e0e0a0a;
4585 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
4586 { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
4587 // SIFS for CCK Data ACK
4588 write_nic_byte(dev, SIFS_CCK, val[0]);
4589 // SIFS for CCK consecutive tx like CTS data!
4590 write_nic_byte(dev, SIFS_CCK+1, val[1]);
4591
4592 // SIFS for OFDM Data ACK
4593 write_nic_byte(dev, SIFS_OFDM, val[2]);
4594 // SIFS for OFDM consecutive tx like CTS data!
4595 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
4596 }
4597
4598 write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
4599 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
4600
4601 //
4602 // Suggested by SD1 Alex, 2008-06-14.
4603 //
4604 //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
4605
4606 //
4607 // Set Data Auto Rate Fallback Retry Count register.
4608 //
4609 write_nic_dword(dev, DARFRC, 0x02010000);
4610 write_nic_dword(dev, DARFRC+4, 0x06050403);
4611 write_nic_dword(dev, RARFRC, 0x02010000);
4612 write_nic_dword(dev, RARFRC+4, 0x06050403);
4613
4614 // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
4615 for (i = 0; i < 8; i++)
5f53d8ca 4616 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
5f53d8ca
JC		 4617
4618 //
4619 // Aggregation length limit. Revised by Roger. 2008.09.22.
4620 //
4621 write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
4622 write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
4623 write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
4624
4625 // Set NAV protection length
4626 write_nic_word(dev, NAV_PROT_LEN, 0x0080);
4627
4628 // Set TXOP stall control for several queue/HI/BCN/MGT/
4629 write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
4630
4631 // Set MSDU lifetime.
4632 write_nic_byte(dev, MLT, 0x8f);
4633
4634 // Set CCK/OFDM SIFS
4635 write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
4636 write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4637
4638 write_nic_byte(dev, ACK_TIMEOUT, 0x40);
4639
4640 // CF-END Threshold
4641 write_nic_byte(dev, CFEND_TH, 0xFF);
4642
4643 //
4644 // For Min Spacing configuration.
4645 //
4646 switch(priv->rf_type)
4647 {
4648 case RF_1T2R:
4649 case RF_1T1R:
4650 RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
4651 priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
4652 break;
4653 case RF_2T2R:
4654 case RF_2T2R_GREEN:
4655 RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
4656 priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
4657 break;
4658 }
4659 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
4660
4661 //LZM 090219
4662 //
4663 // For Min Spacing configuration.
4664 //
4665 //priv->MinSpaceCfg = 0x00;
4666 //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
4667}
4668
5f53d8ca 4669
5f53d8ca
JC		 4670// Description: Initial HW relted registers.
4671//
4672// Assumption: This function is only invoked at driver intialization once.
4673//
4674// 2008.06.10, Added by Roger.
4675bool rtl8192SU_adapter_start(struct net_device *dev)
4676{
4677 struct r8192_priv *priv = ieee80211_priv(dev);
4678 //u32 dwRegRead = 0;
4679 //bool init_status = true;
4680 //u32 ulRegRead;
4681 bool rtStatus = true;
4682 //u8 PipeIndex;
4683 //u8 eRFPath, tmpU1b;
4684 u8 fw_download_times = 1;
4685
4686
4687 RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
4688
4689 //pHalData->bGPIOChangeRF = FALSE;
4690
4691
4692 //
4693 // <Roger_Notes> 2008.06.15.
4694 //
4695 // Initialization Steps on RTL8192SU:
4696 // a. MAC initialization prior to sending down firmware code.
4697 // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4698 // c. MAC configuration after firmware has been download successfully.
4699 // d. Initialize BB related configurations.
4700 // e. Initialize RF related configurations.
4701 // f. Start to BulkIn transfer.
4702 //
4703
4704 //
4705 //a. MAC initialization prior to send down firmware code.
4706 //
4707start:
4708 rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
4709
4710 //
4711 //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
4712 //
4713 rtStatus = FirmwareDownload92S(dev);
4714 if(rtStatus != true)
4715 {
4716 if(fw_download_times == 1){
4717 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
4718 fw_download_times = fw_download_times + 1;
4719 goto start;
4720 }else{
4721 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
4722 goto end;
4723 }
4724 }
4725 //
4726 //c. MAC configuration after firmware has been download successfully.
4727 //
4728 rtl8192SU_MacConfigAfterFwDownload(dev);
4729
5f53d8ca
JC		 4730 //priv->bLbusEnable = TRUE;
4731 //if(priv->RegRfOff == TRUE)
4732 // priv->eRFPowerState = eRfOff;
4733
4734 // Save target channel
4735 // <Roger_Notes> Current Channel will be updated again later.
4736 //priv->CurrentChannel = Channel;
4737 rtStatus = PHY_MACConfig8192S(dev);//===>ok
4738 if(rtStatus != true)
4739 {
4740 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
4741 goto end;
4742 }
4743 if (1){
4744 int i;
4745 for (i=0; i<4; i++)
4746 write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
4747 write_nic_byte(dev,AcmHwCtrl, 0x01);
4748 }
4749
4750
4751 //
4752 //d. Initialize BB related configurations.
4753 //
4754
4755 rtStatus = PHY_BBConfig8192S(dev);//===>ok
4756 if(rtStatus != true)
4757 {
4758 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
4759 goto end;
4760 }
4761
4762 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
4763
4764 //
4765 // e. Initialize RF related configurations.
4766 //
4767 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
4768 priv->Rf_Mode = RF_OP_By_SW_3wire;
4769
4770 // For RF test only from Scott's suggestion
4771 //write_nic_byte(dev, 0x27, 0xDB);
4772 //write_nic_byte(dev, 0x1B, 0x07);
4773
4774
4775 write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
4776
4777 // <Roger_Notes> The following IOs are configured for each RF modules.
4778 // Enable RF module and reset RF and SDM module. 2008.11.17.
4779 if(priv->card_8192_version == VERSION_8192S_ACUT)
4780 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
4781 else
4782 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
4783
4784 rtStatus = PHY_RFConfig8192S(dev);//===>ok
4785 if(rtStatus != true)
4786 {
4787 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
4788 goto end;
4789 }
4790
4791
4792 // Set CCK and OFDM Block "ON"
4793 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4794 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4795
4796 //
4797 // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
4798 // Revised by Roger, 2008.12.18.
4799 //
4800 if(priv->rf_type == RF_1T1R)
4801 {
4802 // This is needed for PHY_REG after 20081219
4803 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
4804 // This is needed for PHY_REG before 20081219
4805 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
4806 }
4807
5f53d8ca
JC		 4808
4809 //LZM 090219
4810 // Set CCK and OFDM Block "ON"
4811 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
4812 //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
4813
4814
4815 //3//Get hardware version, do it in read eeprom?
4816 //GetHardwareVersion819xUsb(Adapter);
4817
4818 //3//
4819 //3 //Set Hardware
4820 //3//
4821 rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
4822
4823 //
4824 // <Roger_Notes> We set MAC address here if autoload was failed before,
4825 // otherwise IDR0 will NOT contain any value.
4826 //
4827 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4828 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4829 if(!priv->bInHctTest)
4830 {
4831 if(priv->ResetProgress == RESET_TYPE_NORESET)
4832 {
4833 //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
4834 //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
4835 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
4836 }
4837 }
4838 else
4839 {
4840 priv->ieee80211->mode = WIRELESS_MODE_G;
4841 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
4842 }
4843
4844 //Security related.
4845 //-----------------------------------------------------------------------------
4846 // Set up security related. 070106, by rcnjko:
4847 // 1. Clear all H/W keys.
4848 // 2. Enable H/W encryption/decryption.
4849 //-----------------------------------------------------------------------------
4850 //CamResetAllEntry(Adapter);
4851 //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
4852
4853 //SecClearAllKeys(Adapter);
4854 CamResetAllEntry(dev);
4855 //SecInit(Adapter);
4856 {
4857 u8 SECR_value = 0x0;
4858 SECR_value |= SCR_TxEncEnable;
4859 SECR_value |= SCR_RxDecEnable;
4860 SECR_value |= SCR_NoSKMC;
4861 write_nic_byte(dev, SECR, SECR_value);
4862 }
4863
5f53d8ca
JC		 4864#ifdef TO_DO_LIST
4865
4866 //PHY_UpdateInitialGain(dev);
4867
4868 if(priv->RegRfOff == true)
4869 { // User disable RF via registry.
4870 u8 eRFPath = 0;
4871
4872 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
4873 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
4874 // Those action will be discard in MgntActSet_RF_State because off the same state
4875 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
4876 rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
4877 }
4878 else if(priv->RfOffReason > RF_CHANGE_BY_PS)
4879 { // H/W or S/W RF OFF before sleep.
4880 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
4881 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
4882 }
4883 else
4884 {
4885 priv->eRFPowerState = eRfOn;
4886 priv->RfOffReason = 0;
4887 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
4888 }
4889
4890#endif
4891
4892
4893//
4894// f. Start to BulkIn transfer.
4895//
4896#ifdef TO_DO_LIST
4897
4898#ifndef UNDER_VISTA
4899 {
4900 u8 i;
4901 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
4902
4903 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
4904 {
4905 if (PipeIndex == 0)
4906 {
4907 for(i=0; i<32; i++)
4908 HalUsbInMpdu(Adapter, PipeIndex);
4909 }
4910 else
4911 {
4912 //HalUsbInMpdu(Adapter, PipeIndex);
4913 //HalUsbInMpdu(Adapter, PipeIndex);
4914 //HalUsbInMpdu(Adapter, PipeIndex);
4915 }
4916 }
4917 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
4918 }
4919#else
4920 // Joseph add to 819X code base for Vista USB platform.
4921 // This part may need to be add to Hal819xU code base. too.
4922 PlatformUsbEnableInPipes(Adapter);
4923#endif
4924
4925 RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
4926
4927 PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
4928
4929 //
4930 // <Roger_EXP> The following configurations are for ASIC verification temporally.
4931 // 2008.07.10.
4932 //
4933
4934#endif
4935
4936 //
4937 // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
4938 // TX power index for different rate set.
4939 //
4940 //if(priv->card_8192_version >= VERSION_8192S_ACUT)
4941 {
4942 // Get original hw reg values
4943 PHY_GetHWRegOriginalValue(dev);
4944
4945 // Write correct tx power index//FIXLZM
4946 PHY_SetTxPowerLevel8192S(dev, priv->chan);
4947 }
4948
4949 {
4950 u8 tmpU1b = 0;
4951 // EEPROM R/W workaround
4952 tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
4953 write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
4954 }
4955
4956//
4957//<Roger_Notes> 2008.08.19.
4958// We return status here for temporal FPGA verification, 2008.08.19.
4959
4960#ifdef RTL8192SU_FW_IQK
4961 write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
4962 ChkFwCmdIoDone(dev);
4963#endif
4964
4965 //
4966 // <Roger_Notes> We enable high power mechanism after NIC initialized.
4967 // 2008.11.27.
4968 //
4969 write_nic_dword(dev, WFM5, FW_RA_RESET);
4970 ChkFwCmdIoDone(dev);
4971 write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
4972 ChkFwCmdIoDone(dev);
4973 write_nic_dword(dev, WFM5, FW_RA_REFRESH);
4974 ChkFwCmdIoDone(dev);
4975 write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
4976
4977// <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
4978//
5f53d8ca 4979
5f53d8ca
JC		 4980end:
4981return rtStatus;
4982}
4983
5f53d8ca
JC		 4984/***************************************************************************
4985 -------------------------------NET STUFF---------------------------
4986***************************************************************************/
4987
4988static struct net_device_stats *rtl8192_stats(struct net_device *dev)
4989{
4990 struct r8192_priv *priv = ieee80211_priv(dev);
4991
4992 return &priv->ieee80211->stats;
4993}
4994
4995bool
4996HalTxCheckStuck819xUsb(
4997 struct net_device *dev
4998 )
4999{
5000 struct r8192_priv *priv = ieee80211_priv(dev);
5001 u16 RegTxCounter = read_nic_word(dev, 0x128);
5002 bool bStuck = FALSE;
5003 RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
5004 if(priv->TxCounter==RegTxCounter)
5005 bStuck = TRUE;
5006
5007 priv->TxCounter = RegTxCounter;
5008
5009 return bStuck;
5010}
5011
5012/*
5013* <Assumption: RT_TX_SPINLOCK is acquired.>
5014* First added: 2006.11.19 by emily
5015*/
5016RESET_TYPE
5017TxCheckStuck(struct net_device *dev)
5018{
5019 struct r8192_priv *priv = ieee80211_priv(dev);
5020 u8 QueueID;
5021// PRT_TCB pTcb;
5022// u8 ResetThreshold;
5023 bool bCheckFwTxCnt = false;
5024 //unsigned long flags;
5025
5026 //
5027 // Decide Stuch threshold according to current power save mode
5028 //
5029
5030// RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
5031// PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
5032// spin_lock_irqsave(&priv->ieee80211->lock,flags);
5033 for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
5034 {
5035 if(QueueID == TXCMD_QUEUE)
5036 continue;
5037#if 1
5f53d8ca 5038 if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0) && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
5f53d8ca
JC		 5039 continue;
5040#endif
5041
5042 bCheckFwTxCnt = true;
5043 }
5044// PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
5045// spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
5046// RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
5047#if 1
5048 if(bCheckFwTxCnt)
5049 {
5050 if(HalTxCheckStuck819xUsb(dev))
5051 {
5052 RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
5053 return RESET_TYPE_SILENT;
5054 }
5055 }
5056#endif
5057 return RESET_TYPE_NORESET;
5058}
5059
5060bool
5061HalRxCheckStuck819xUsb(struct net_device *dev)
5062{
5063 u16 RegRxCounter = read_nic_word(dev, 0x130);
5064 struct r8192_priv *priv = ieee80211_priv(dev);
5065 bool bStuck = FALSE;
5066//#ifdef RTL8192SU
5067
5068//#else
5069 static u8 rx_chk_cnt = 0;
5070 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
5071 // If rssi is small, we should check rx for long time because of bad rx.
5072 // or maybe it will continuous silent reset every 2 seconds.
5073 rx_chk_cnt++;
5074 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
5075 {
5076 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
5077 }
5078 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
5079 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
5080 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
5081 {
5082 if(rx_chk_cnt < 2)
5083 {
5084 return bStuck;
5085 }
5086 else
5087 {
5088 rx_chk_cnt = 0;
5089 }
5090 }
5091 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
5092 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
5093 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
5094 {
5095 if(rx_chk_cnt < 4)
5096 {
5097 //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5098 return bStuck;
5099 }
5100 else
5101 {
5102 rx_chk_cnt = 0;
5103 //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
5104 }
5105 }
5106 else
5107 {
5108 if(rx_chk_cnt < 8)
5109 {
5110 //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
5111 return bStuck;
5112 }
5113 else
5114 {
5115 rx_chk_cnt = 0;
5116 //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
5117 }
5118 }
5119//#endif
5120
5121 if(priv->RxCounter==RegRxCounter)
5122 bStuck = TRUE;
5123
5124 priv->RxCounter = RegRxCounter;
5125
5126 return bStuck;
5127}
5128
5129RESET_TYPE
5130RxCheckStuck(struct net_device *dev)
5131{
5132 struct r8192_priv *priv = ieee80211_priv(dev);
5133 //int i;
5134 bool bRxCheck = FALSE;
5135
5136// RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
5137 //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
5138
5139 if(priv->IrpPendingCount > 1)
5140 bRxCheck = TRUE;
5141 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
5142
5143// RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
5144 if(bRxCheck)
5145 {
5146 if(HalRxCheckStuck819xUsb(dev))
5147 {
5148 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
5149 return RESET_TYPE_SILENT;
5150 }
5151 }
5152 return RESET_TYPE_NORESET;
5153}
5154
5155
5156/**
5157* This function is called by Checkforhang to check whether we should ask OS to reset driver
5158*
5159* \param pAdapter The adapter context for this miniport
5160*
5161* Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
5162* to judge whether there is tx stuck.
5163* Note: This function may be required to be rewrite for Vista OS.
5164* <<<Assumption: Tx spinlock has been acquired >>>
5165*
5166* 8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
5167*/
5168RESET_TYPE
5169rtl819x_ifcheck_resetornot(struct net_device *dev)
5170{
5171 struct r8192_priv *priv = ieee80211_priv(dev);
5172 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
5173 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
5174 RT_RF_POWER_STATE rfState;
5175
5f53d8ca 5176 return RESET_TYPE_NORESET;
5f53d8ca
JC		 5177
5178 rfState = priv->ieee80211->eRFPowerState;
5179
5180 TxResetType = TxCheckStuck(dev);
5181#if 1
5182 if( rfState != eRfOff ||
5183 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
5184 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
5185 {
5186 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
5187 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
5188 // if driver is in firmware download failure status, driver should initialize RF in the following
5189 // silent reset procedure Emily, 2008.01.21
5190
5191 // Driver should not check RX stuck in IBSS mode because it is required to
5192 // set Check BSSID in order to send beacon, however, if check BSSID is
5193 // set, STA cannot hear any packet a all. Emily, 2008.04.12
5194 RxResetType = RxCheckStuck(dev);
5195 }
5196#endif
5197 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
5198 return RESET_TYPE_NORMAL;
5199 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
5200 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
5201 return RESET_TYPE_SILENT;
5202 }
5203 else
5204 return RESET_TYPE_NORESET;
5205
5206}
5207
5208void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
5209int _rtl8192_up(struct net_device *dev);
5210int rtl8192_close(struct net_device *dev);
5211
5212
5213
5214void
5215CamRestoreAllEntry( struct net_device *dev)
5216{
5217 u8 EntryId = 0;
5218 struct r8192_priv *priv = ieee80211_priv(dev);
5219 u8* MacAddr = priv->ieee80211->current_network.bssid;
5220
5221 static u8 CAM_CONST_ADDR[4][6] = {
5222 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
5223 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
5224 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
5225 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
5226 static u8 CAM_CONST_BROAD[] =
5227 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5228
5229 RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
5230
5231
5232 if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
5233 (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
5234 {
5235
5236 for(EntryId=0; EntryId<4; EntryId++)
5237 {
5238 {
5239 MacAddr = CAM_CONST_ADDR[EntryId];
5240 setKey(dev,
5241 EntryId ,
5242 EntryId,
5243 priv->ieee80211->pairwise_key_type,
5244 MacAddr,
5245 0,
5246 NULL);
5247 }
5248 }
5249
5250 }
5251 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
5252 {
5253
5254 {
5255 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5256 setKey(dev,
5257 4,
5258 0,
5259 priv->ieee80211->pairwise_key_type,
5260 (u8*)dev->dev_addr,
5261 0,
5262 NULL);
5263 else
5264 setKey(dev,
5265 4,
5266 0,
5267 priv->ieee80211->pairwise_key_type,
5268 MacAddr,
5269 0,
5270 NULL);
5271 }
5272 }
5273 else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
5274 {
5275
5276 {
5277 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5278 setKey(dev,
5279 4,
5280 0,
5281 priv->ieee80211->pairwise_key_type,
5282 (u8*)dev->dev_addr,
5283 0,
5284 NULL);
5285 else
5286 setKey(dev,
5287 4,
5288 0,
5289 priv->ieee80211->pairwise_key_type,
5290 MacAddr,
5291 0,
5292 NULL);
5293 }
5294 }
5295
5296
5297
5298 if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
5299 {
5300 MacAddr = CAM_CONST_BROAD;
5301 for(EntryId=1 ; EntryId<4 ; EntryId++)
5302 {
5303 {
5304 setKey(dev,
5305 EntryId,
5306 EntryId,
5307 priv->ieee80211->group_key_type,
5308 MacAddr,
5309 0,
5310 NULL);
5311 }
5312 }
5313 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5314 setKey(dev,
5315 0,
5316 0,
5317 priv->ieee80211->group_key_type,
5318 CAM_CONST_ADDR[0],
5319 0,
5320 NULL);
5321 }
5322 else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
5323 {
5324 MacAddr = CAM_CONST_BROAD;
5325 for(EntryId=1; EntryId<4 ; EntryId++)
5326 {
5327 {
5328 setKey(dev,
5329 EntryId ,
5330 EntryId,
5331 priv->ieee80211->group_key_type,
5332 MacAddr,
5333 0,
5334 NULL);
5335 }
5336 }
5337
5338 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5339 setKey(dev,
5340 0 ,
5341 0,
5342 priv->ieee80211->group_key_type,
5343 CAM_CONST_ADDR[0],
5344 0,
5345 NULL);
5346 }
5347}
5348//////////////////////////////////////////////////////////////
5349// This function is used to fix Tx/Rx stop bug temporarily.
5350// This function will do "system reset" to NIC when Tx or Rx is stuck.
5351// The method checking Tx/Rx stuck of this function is supported by FW,
5352// which reports Tx and Rx counter to register 0x128 and 0x130.
5353//////////////////////////////////////////////////////////////
5354void
5355rtl819x_ifsilentreset(struct net_device *dev)
5356{
5357 //OCTET_STRING asocpdu;
5358 struct r8192_priv *priv = ieee80211_priv(dev);
5359 u8 reset_times = 0;
5360 int reset_status = 0;
5361 struct ieee80211_device *ieee = priv->ieee80211;
5362
5363
5364 // 2007.07.20. If we need to check CCK stop, please uncomment this line.
5365 //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
5366
5367 if(priv->ResetProgress==RESET_TYPE_NORESET)
5368 {
5369RESET_START:
5370
5371 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
5372
5373 // Set the variable for reset.
5374 priv->ResetProgress = RESET_TYPE_SILENT;
5375// rtl8192_close(dev);
5376#if 1
5377 down(&priv->wx_sem);
5378 if(priv->up == 0)
5379 {
5380 RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
5381 up(&priv->wx_sem);
5382 return ;
5383 }
5384 priv->up = 0;
5385 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
5386// if(!netif_queue_stopped(dev))
5387// netif_stop_queue(dev);
5388
5389 rtl8192_rtx_disable(dev);
5390 rtl8192_cancel_deferred_work(priv);
5391 deinit_hal_dm(dev);
5392 del_timer_sync(&priv->watch_dog_timer);
5393
5394 ieee->sync_scan_hurryup = 1;
5395 if(ieee->state == IEEE80211_LINKED)
5396 {
5397 down(&ieee->wx_sem);
5398 printk("ieee->state is IEEE80211_LINKED\n");
5399 ieee80211_stop_send_beacons(priv->ieee80211);
5400 del_timer_sync(&ieee->associate_timer);
5f53d8ca 5401 cancel_delayed_work(&ieee->associate_retry_wq);
5f53d8ca
JC		 5402 ieee80211_stop_scan(ieee);
5403 netif_carrier_off(dev);
5404 up(&ieee->wx_sem);
5405 }
5406 else{
5407 printk("ieee->state is NOT LINKED\n");
5408 ieee80211_softmac_stop_protocol(priv->ieee80211); }
5409 up(&priv->wx_sem);
5410 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
5411 //rtl8192_irq_disable(dev);
5412 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
5413 reset_status = _rtl8192_up(dev);
5414
5415 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
5416 if(reset_status == -EAGAIN)
5417 {
5418 if(reset_times < 3)
5419 {
5420 reset_times++;
5421 goto RESET_START;
5422 }
5423 else
5424 {
5425 RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n", __FUNCTION__);
5426 }
5427 }
5428#endif
5429 ieee->is_silent_reset = 1;
5430#if 1
5431 EnableHWSecurityConfig8192(dev);
5432#if 1
5433 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
5434 {
5435 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5436
5437#if 1
5f53d8ca 5438 queue_work(ieee->wq, &ieee->associate_complete_wq);
5f53d8ca
JC		 5439#endif
5440
5441 }
5442 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
5443 {
5444 ieee->set_chan(ieee->dev, ieee->current_network.channel);
5445 ieee->link_change(ieee->dev);
5446
5447 // notify_wx_assoc_event(ieee);
5448
5449 ieee80211_start_send_beacons(ieee);
5450
5451 if (ieee->data_hard_resume)
5452 ieee->data_hard_resume(ieee->dev);
5453 netif_carrier_on(ieee->dev);
5454 }
5455#endif
5456
5457 CamRestoreAllEntry(dev);
5458
5459 priv->ResetProgress = RESET_TYPE_NORESET;
5460 priv->reset_count++;
5461
5462 priv->bForcedSilentReset =false;
5463 priv->bResetInProgress = false;
5464
5465 // For test --> force write UFWP.
5466 write_nic_byte(dev, UFWP, 1);
5467 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
5468#endif
5469 }
5470}
5471
5472void CAM_read_entry(
5473 struct net_device *dev,
5474 u32 iIndex
5475)
5476{
5477 u32 target_command=0;
5478 u32 target_content=0;
5479 u8 entry_i=0;
5480 u32 ulStatus;
5481 s32 i=100;
5482// printk("=======>start read CAM\n");
5483 for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
5484 {
5485 // polling bit, and No Write enable, and address
5486 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
5487 target_command= target_command | BIT31;
5488
5489 //Check polling bit is clear
5490// mdelay(1);
5491#if 1
5492 while((i--)>=0)
5493 {
5494 ulStatus = read_nic_dword(dev, RWCAM);
5495 if(ulStatus & BIT31){
5496 continue;
5497 }
5498 else{
5499 break;
5500 }
5501 }
5502#endif
5503 write_nic_dword(dev, RWCAM, target_command);
5504 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
5505 // printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
5506 target_content = read_nic_dword(dev, RCAMO);
5507 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
5508 // printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
5509 }
5510 printk("\n");
5511}
5512
5513void rtl819x_update_rxcounts(
5514 struct r8192_priv *priv,
5515 u32* TotalRxBcnNum,
5516 u32* TotalRxDataNum
5517)
5518{
5519 u16 SlotIndex;
5520 u8 i;
5521
5522 *TotalRxBcnNum = 0;
5523 *TotalRxDataNum = 0;
5524
5525 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
5526 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
5527 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
5528 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
5529 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
5530 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
5531 }
5532}
5533
5f53d8ca
JC		 5534extern void rtl819x_watchdog_wqcallback(struct work_struct *work)
5535{
5536 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5537 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
5538 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5539 struct ieee80211_device* ieee = priv->ieee80211;
5540 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5541 static u8 check_reset_cnt=0;
5542 bool bBusyTraffic = false;
5543
5544 if(!priv->up)
5545 return;
5546 hal_dm_watchdog(dev);
5547
5548 {//to get busy traffic condition
5549 if(ieee->state == IEEE80211_LINKED)
5550 {
5551 //windows mod 666 to 100.
5552 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5553 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5554 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5555 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5556 bBusyTraffic = true;
5557 }
5558 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5559 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5560 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5561 }
5562 }
5563 //added by amy for AP roaming
5564 {
5565 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5566 {
5567 u32 TotalRxBcnNum = 0;
5568 u32 TotalRxDataNum = 0;
5569
5570 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5571 if((TotalRxBcnNum+TotalRxDataNum) == 0)
5572 {
5573 #ifdef TODO
5574 if(rfState == eRfOff)
5575 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
5576 #endif
5577 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
5578 // Dot11d_Reset(dev);
5579 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5580 notify_wx_assoc_event(priv->ieee80211);
5581 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
5582 ieee->is_roaming = true;
5583 priv->ieee80211->link_change(dev);
5f53d8ca 5584 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5f53d8ca
JC		 5585 }
5586 }
5587 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5588 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5589 }
5590// CAM_read_entry(dev,4);
5591 //check if reset the driver
5592 if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
5593 {
5594 ResetType = rtl819x_ifcheck_resetornot(dev);
5595 check_reset_cnt = 3;
5596 //DbgPrint("Start to check silent reset\n");
5597 }
5598 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5599#if 1
5600 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5601 (priv->bForcedSilentReset ||
5602 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
5603 {
5604 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
5605 rtl819x_ifsilentreset(dev);
5606 }
5607#endif
5608 priv->force_reset = false;
5609 priv->bForcedSilentReset = false;
5610 priv->bResetInProgress = false;
5611 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5612
5613}
5614
5615void watch_dog_timer_callback(unsigned long data)
5616{
5617 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
5618 //printk("===============>watch_dog timer\n");
5f53d8ca 5619 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
5f53d8ca 5620 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
5f53d8ca
JC		 5621}
5622int _rtl8192_up(struct net_device *dev)
5623{
5624 struct r8192_priv *priv = ieee80211_priv(dev);
5625 //int i;
5626 int init_status = 0;
5627 priv->up=1;
5628 priv->ieee80211->ieee_up=1;
5629 RT_TRACE(COMP_INIT, "Bringing up iface");
5630 init_status = priv->ops->rtl819x_adapter_start(dev);
5631 if(!init_status)
5632 {
5633 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
5634 priv->up=priv->ieee80211->ieee_up = 0;
5635 return -EAGAIN;
5636 }
5637 RT_TRACE(COMP_INIT, "start adapter finished\n");
5638 rtl8192_rx_enable(dev);
5639// rtl8192_tx_enable(dev);
5640 if(priv->ieee80211->state != IEEE80211_LINKED)
5641 ieee80211_softmac_start_protocol(priv->ieee80211);
5642 ieee80211_reset_queue(priv->ieee80211);
5643 watch_dog_timer_callback((unsigned long) dev);
5644 if(!netif_queue_stopped(dev))
5645 netif_start_queue(dev);
5646 else
5647 netif_wake_queue(dev);
5648
5649 /*
5650 * Make sure that drop_unencrypted is initialized as "0"
5651 * No packets will be sent in non-security mode if we had set drop_unencrypted.
5652 * ex, After kill wpa_supplicant process, make the driver up again.
5653 * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
5654 */
5655 priv->ieee80211->drop_unencrypted = 0;
5656
5657 return 0;
5658}
5659
5660
5661int rtl8192_open(struct net_device *dev)
5662{
5663 struct r8192_priv *priv = ieee80211_priv(dev);
5664 int ret;
5665 down(&priv->wx_sem);
5666 ret = rtl8192_up(dev);
5667 up(&priv->wx_sem);
5668 return ret;
5669
5670}
5671
5672
5673int rtl8192_up(struct net_device *dev)
5674{
5675 struct r8192_priv *priv = ieee80211_priv(dev);
5676
5677 if (priv->up == 1) return -1;
5678
5679 return _rtl8192_up(dev);
5680}
5681
5682
5683int rtl8192_close(struct net_device *dev)
5684{
5685 struct r8192_priv *priv = ieee80211_priv(dev);
5686 int ret;
5687
5688 down(&priv->wx_sem);
5689
5690 ret = rtl8192_down(dev);
5691
5692 up(&priv->wx_sem);
5693
5694 return ret;
5695
5696}
5697
5698int rtl8192_down(struct net_device *dev)
5699{
5700 struct r8192_priv *priv = ieee80211_priv(dev);
5701 int i;
5702
5703 if (priv->up == 0) return -1;
5704
5705 priv->up=0;
5706 priv->ieee80211->ieee_up = 0;
5707 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
5708/* FIXME */
5709 if (!netif_queue_stopped(dev))
5710 netif_stop_queue(dev);
5711
5712 rtl8192_rtx_disable(dev);
5713 //rtl8192_irq_disable(dev);
5714
5715 /* Tx related queue release */
5716 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5717 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
5718 }
5719 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5720 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
5721 }
5722
5723 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
5724 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
5725 }
5726
5727 //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
5728// flush_scheduled_work();
5729 rtl8192_cancel_deferred_work(priv);
5730 deinit_hal_dm(dev);
5731 del_timer_sync(&priv->watch_dog_timer);
5732
5733
5734 ieee80211_softmac_stop_protocol(priv->ieee80211);
5735 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
5736 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
5737
5738 return 0;
5739}
5740
5741
5742void rtl8192_commit(struct net_device *dev)
5743{
5744 struct r8192_priv *priv = ieee80211_priv(dev);
5745 int reset_status = 0;
5746 //u8 reset_times = 0;
5747 if (priv->up == 0) return ;
5748 priv->up = 0;
5749
5750 rtl8192_cancel_deferred_work(priv);
5751 del_timer_sync(&priv->watch_dog_timer);
5752 //cancel_delayed_work(&priv->SwChnlWorkItem);
5753
5754 ieee80211_softmac_stop_protocol(priv->ieee80211);
5755
5756 //rtl8192_irq_disable(dev);
5757 rtl8192_rtx_disable(dev);
5758 reset_status = _rtl8192_up(dev);
5759
5760}
5761
5762/*
5763void rtl8192_restart(struct net_device *dev)
5764{
5765 struct r8192_priv *priv = ieee80211_priv(dev);
5766*/
5f53d8ca
JC		 5767void rtl8192_restart(struct work_struct *work)
5768{
5769 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
5770 struct net_device *dev = priv->ieee80211->dev;
5f53d8ca
JC		 5771
5772 down(&priv->wx_sem);
5773
5774 rtl8192_commit(dev);
5775
5776 up(&priv->wx_sem);
5777}
5778
5779static void r8192_set_multicast(struct net_device *dev)
5780{
5781 struct r8192_priv *priv = ieee80211_priv(dev);
5782 short promisc;
5783
5784 //down(&priv->wx_sem);
5785
5786 /* FIXME FIXME */
5787
5788 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5789
5790 if (promisc != priv->promisc)
5791 // rtl8192_commit(dev);
5792
5793 priv->promisc = promisc;
5794
5795 //schedule_work(&priv->reset_wq);
5796 //up(&priv->wx_sem);
5797}
5798
5799
5800int r8192_set_mac_adr(struct net_device *dev, void *mac)
5801{
5802 struct r8192_priv *priv = ieee80211_priv(dev);
5803 struct sockaddr *addr = mac;
5804
5805 down(&priv->wx_sem);
5806
5807 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5808
5f53d8ca 5809 schedule_work(&priv->reset_wq);
1ec9e48d 5810
5f53d8ca
JC		 5811 up(&priv->wx_sem);
5812
5813 return 0;
5814}
5815
5816/* based on ipw2200 driver */
5817int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5818{
5819 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5820 struct iwreq *wrq = (struct iwreq *)rq;
5821 int ret=-1;
5822 struct ieee80211_device *ieee = priv->ieee80211;
5823 u32 key[4];
5824 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
5825 u8 zero_addr[6] = {0};
5826 struct iw_point *p = &wrq->u.data;
5827 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
5828
5829 down(&priv->wx_sem);
5830
5831
5832 if (p->length < sizeof(struct ieee_param) || !p->pointer){
5833 ret = -EINVAL;
5834 goto out;
5835 }
5836
5837 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
5838 if (ipw == NULL){
5839 ret = -ENOMEM;
5840 goto out;
5841 }
5842 if (copy_from_user(ipw, p->pointer, p->length)) {
5843 kfree(ipw);
5844 ret = -EFAULT;
5845 goto out;
5846 }
5847
5848 switch (cmd) {
5849 case RTL_IOCTL_WPA_SUPPLICANT:
5850 //parse here for HW security
5851 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
5852 {
5853 if (ipw->u.crypt.set_tx)
5854 {
5855 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5856 ieee->pairwise_key_type = KEY_TYPE_CCMP;
5857 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5858 ieee->pairwise_key_type = KEY_TYPE_TKIP;
5859 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5860 {
5861 if (ipw->u.crypt.key_len == 13)
5862 ieee->pairwise_key_type = KEY_TYPE_WEP104;
5863 else if (ipw->u.crypt.key_len == 5)
5864 ieee->pairwise_key_type = KEY_TYPE_WEP40;
5865 }
5866 else
5867 ieee->pairwise_key_type = KEY_TYPE_NA;
5868
5869 if (ieee->pairwise_key_type)
5870 {
5871 // FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
5872 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
5873 ieee->iw_mode = IW_MODE_ADHOC;
5874 memcpy((u8*)key, ipw->u.crypt.key, 16);
5875 EnableHWSecurityConfig8192(dev);
5876 //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
5877 //added by WB.
5878 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5879 if (ieee->iw_mode == IW_MODE_ADHOC)
5880 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
5881 }
5882 }
5883 else //if (ipw->u.crypt.idx) //group key use idx > 0
5884 {
5885 memcpy((u8*)key, ipw->u.crypt.key, 16);
5886 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
5887 ieee->group_key_type= KEY_TYPE_CCMP;
5888 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
5889 ieee->group_key_type = KEY_TYPE_TKIP;
5890 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
5891 {
5892 if (ipw->u.crypt.key_len == 13)
5893 ieee->group_key_type = KEY_TYPE_WEP104;
5894 else if (ipw->u.crypt.key_len == 5)
5895 ieee->group_key_type = KEY_TYPE_WEP40;
5896 }
5897 else
5898 ieee->group_key_type = KEY_TYPE_NA;
5899
5900 if (ieee->group_key_type)
5901 {
5902 setKey( dev,
5903 ipw->u.crypt.idx,
5904 ipw->u.crypt.idx, //KeyIndex
5905 ieee->group_key_type, //KeyType
5906 broadcast_addr, //MacAddr
5907 0, //DefaultKey
5908 key); //KeyContent
5909 }
5910 }
5911 }
5912#ifdef JOHN_HWSEC_DEBUG
5913 //john's test 0711
5914 printk("@@ wrq->u pointer = ");
5915 for(i=0;i<wrq->u.data.length;i++){
5916 if(i%10==0) printk("\n");
5917 printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
5918 }
5919 printk("\n");
5920#endif /*JOHN_HWSEC_DEBUG*/
5921 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5922 break;
5923
5924 default:
5925 ret = -EOPNOTSUPP;
5926 break;
5927 }
5928 kfree(ipw);
5929 ipw = NULL;
5930out:
5931 up(&priv->wx_sem);
5932 return ret;
5933}
5934
5f53d8ca
JC		 5935u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
5936{
5937
5938 u8 ret_rate = 0x02;
5939
5940 if( bFirstAMPDU )
5941 {
5942 if(!bIsHT)
5943 {
5944 switch(rate)
5945 {
5946
5947 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
5948 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
5949 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
5950 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
5951 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
5952 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
5953 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
5954 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
5955 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
5956 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
5957 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
5958 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
5959
5960 default:
5961 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
5962 break;
5963 }
5964 }
5965 else
5966 {
5967 switch(rate)
5968 {
5969
5970 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
5971 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
5972 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
5973 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
5974 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
5975 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
5976 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
5977 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
5978 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
5979 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
5980 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
5981 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
5982 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
5983 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
5984 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
5985 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
5986 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
5987
5988 default:
5989 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
5990 break;
5991 }
5992
5993 }
5994 }
5995 else
5996 {
5997 switch(rate)
5998 {
5999
6000 case DESC92S_RATE1M: ret_rate = MGN_1M; break;
6001 case DESC92S_RATE2M: ret_rate = MGN_2M; break;
6002 case DESC92S_RATE5_5M: ret_rate = MGN_5_5M; break;
6003 case DESC92S_RATE11M: ret_rate = MGN_11M; break;
6004 case DESC92S_RATE6M: ret_rate = MGN_6M; break;
6005 case DESC92S_RATE9M: ret_rate = MGN_9M; break;
6006 case DESC92S_RATE12M: ret_rate = MGN_12M; break;
6007 case DESC92S_RATE18M: ret_rate = MGN_18M; break;
6008 case DESC92S_RATE24M: ret_rate = MGN_24M; break;
6009 case DESC92S_RATE36M: ret_rate = MGN_36M; break;
6010 case DESC92S_RATE48M: ret_rate = MGN_48M; break;
6011 case DESC92S_RATE54M: ret_rate = MGN_54M; break;
6012 case DESC92S_RATEMCS0: ret_rate = MGN_MCS0; break;
6013 case DESC92S_RATEMCS1: ret_rate = MGN_MCS1; break;
6014 case DESC92S_RATEMCS2: ret_rate = MGN_MCS2; break;
6015 case DESC92S_RATEMCS3: ret_rate = MGN_MCS3; break;
6016 case DESC92S_RATEMCS4: ret_rate = MGN_MCS4; break;
6017 case DESC92S_RATEMCS5: ret_rate = MGN_MCS5; break;
6018 case DESC92S_RATEMCS6: ret_rate = MGN_MCS6; break;
6019 case DESC92S_RATEMCS7: ret_rate = MGN_MCS7; break;
6020 case DESC92S_RATEMCS8: ret_rate = MGN_MCS8; break;
6021 case DESC92S_RATEMCS9: ret_rate = MGN_MCS9; break;
6022 case DESC92S_RATEMCS10: ret_rate = MGN_MCS10; break;
6023 case DESC92S_RATEMCS11: ret_rate = MGN_MCS11; break;
6024 case DESC92S_RATEMCS12: ret_rate = MGN_MCS12; break;
6025 case DESC92S_RATEMCS13: ret_rate = MGN_MCS13; break;
6026 case DESC92S_RATEMCS14: ret_rate = MGN_MCS14; break;
6027 case DESC92S_RATEMCS15: ret_rate = MGN_MCS15; break;
6028 case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
6029
6030 default:
6031 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
6032 break;
6033 }
6034 }
6035 return ret_rate;
6036}
5f53d8ca
JC		 6037
6038u8 HwRateToMRate90(bool bIsHT, u8 rate)
6039{
6040 u8 ret_rate = 0xff;
6041
6042 if(!bIsHT) {
6043 switch(rate) {
6044 case DESC90_RATE1M: ret_rate = MGN_1M; break;
6045 case DESC90_RATE2M: ret_rate = MGN_2M; break;
6046 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
6047 case DESC90_RATE11M: ret_rate = MGN_11M; break;
6048 case DESC90_RATE6M: ret_rate = MGN_6M; break;
6049 case DESC90_RATE9M: ret_rate = MGN_9M; break;
6050 case DESC90_RATE12M: ret_rate = MGN_12M; break;
6051 case DESC90_RATE18M: ret_rate = MGN_18M; break;
6052 case DESC90_RATE24M: ret_rate = MGN_24M; break;
6053 case DESC90_RATE36M: ret_rate = MGN_36M; break;
6054 case DESC90_RATE48M: ret_rate = MGN_48M; break;
6055 case DESC90_RATE54M: ret_rate = MGN_54M; break;
6056
6057 default:
6058 ret_rate = 0xff;
6059 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
6060 break;
6061 }
6062
6063 } else {
6064 switch(rate) {
6065 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
6066 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
6067 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
6068 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
6069 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
6070 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
6071 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
6072 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
6073 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
6074 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
6075 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
6076 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
6077 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
6078 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
6079 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
6080 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
6081 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
6082
6083 default:
6084 ret_rate = 0xff;
6085 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
6086 break;
6087 }
6088 }
6089
6090 return ret_rate;
6091}
6092
6093/**
6094 * Function: UpdateRxPktTimeStamp
6095 * Overview: Recored down the TSF time stamp when receiving a packet
6096 *
6097 * Input:
6098 * PADAPTER Adapter
6099 * PRT_RFD pRfd,
6100 *
6101 * Output:
6102 * PRT_RFD pRfd
6103 * (pRfd->Status.TimeStampHigh is updated)
6104 * (pRfd->Status.TimeStampLow is updated)
6105 * Return:
6106 * None
6107 */
6108void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
6109{
6110 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6111
6112 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
6113 stats->mac_time[0] = priv->LastRxDescTSFLow;
6114 stats->mac_time[1] = priv->LastRxDescTSFHigh;
6115 } else {
6116 priv->LastRxDescTSFLow = stats->mac_time[0];
6117 priv->LastRxDescTSFHigh = stats->mac_time[1];
6118 }
6119}
6120
6121//by amy 080606
6122
6123long rtl819x_translate_todbm(u8 signal_strength_index )// 0-100 index.
6124{
6125 long signal_power; // in dBm.
6126
6127 // Translate to dBm (x=0.5y-95).
6128 signal_power = (long)((signal_strength_index + 1) >> 1);
6129 signal_power -= 95;
6130
6131 return signal_power;
6132}
6133
6134
6135/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
6136 be a local static. Otherwise, it may increase when we return from S3/S4. The
6137 value will be kept in memory or disk. We must delcare the value in adapter
6138 and it will be reinitialized when return from S3/S4. */
6139void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
6140{
6141 bool bcheck = false;
6142 u8 rfpath;
6143 u32 nspatial_stream, tmp_val;
6144 //u8 i;
6145 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
6146 static u32 slide_evm_index=0, slide_evm_statistics=0;
6147 static u32 last_rssi=0, last_evm=0;
6148
6149 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
6150 static u32 last_beacon_adc_pwdb=0;
6151
6152 struct ieee80211_hdr_3addr *hdr;
6153 u16 sc ;
6154 unsigned int frag,seq;
6155 hdr = (struct ieee80211_hdr_3addr *)buffer;
e2117cea 6156 sc = le16_to_cpu(hdr->seq_ctrl);
5f53d8ca
JC		 6157 frag = WLAN_GET_SEQ_FRAG(sc);
6158 seq = WLAN_GET_SEQ_SEQ(sc);
6159 //cosa add 04292008 to record the sequence number
6160 pcurrent_stats->Seq_Num = seq;
6161 //
6162 // Check whether we should take the previous packet into accounting
6163 //
6164 if(!pprevious_stats->bIsAMPDU)
6165 {
6166 // if previous packet is not aggregated packet
6167 bcheck = true;
6168 }else
6169 {
5f53d8ca
JC		 6170 }
6171
6172
6173 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
6174 {
6175 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
6176 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
6177 priv->stats.slide_rssi_total -= last_rssi;
6178 }
6179 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
6180
6181 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
6182 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
6183 slide_rssi_index = 0;
6184
6185 // <1> Showed on UI for user, in dbm
6186 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
6187 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
6188 pcurrent_stats->rssi = priv->stats.signal_strength;
6189 //
6190 // If the previous packet does not match the criteria, neglect it
6191 //
6192 if(!pprevious_stats->bPacketMatchBSSID)
6193 {
6194 if(!pprevious_stats->bToSelfBA)
6195 return;
6196 }
6197
6198 if(!bcheck)
6199 return;
6200
6201
6202 //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
6203
6204 //
6205 // Check RSSI
6206 //
6207 priv->stats.num_process_phyinfo++;
6208
6209 /* record the general signal strength to the sliding window. */
6210
6211
6212 // <2> Showed on UI for engineering
6213 // hardware does not provide rssi information for each rf path in CCK
6214 if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
6215 {
6216 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
6217 {
6218 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
6219 continue;
6220
6221 //Fixed by Jacken 2008-03-20
6222 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
6223 {
6224 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
6225 //DbgPrint("MIMO RSSI initialize \n");
6226 }
6227 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
6228 {
6229 priv->stats.rx_rssi_percentage[rfpath] =
6230 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6231 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6232 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
6233 }
6234 else
6235 {
6236 priv->stats.rx_rssi_percentage[rfpath] =
6237 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
6238 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
6239 }
6240 RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
6241 }
6242 }
6243
6244
6245 //
6246 // Check PWDB.
6247 //
6248 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6249 pprevious_stats->bIsCCK? "CCK": "OFDM",
6250 pprevious_stats->RxPWDBAll);
6251
6252 if(pprevious_stats->bPacketBeacon)
6253 {
6254/* record the beacon pwdb to the sliding window. */
6255 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6256 {
6257 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
6258 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
6259 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
6260 //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
6261 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
6262 }
6263 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
6264 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
6265 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
6266 slide_beacon_adc_pwdb_index++;
6267 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
6268 slide_beacon_adc_pwdb_index = 0;
6269 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
6270 if(pprevious_stats->RxPWDBAll >= 3)
6271 pprevious_stats->RxPWDBAll -= 3;
6272 }
6273
6274 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
6275 pprevious_stats->bIsCCK? "CCK": "OFDM",
6276 pprevious_stats->RxPWDBAll);
6277
6278
6279 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6280 {
6281 if(priv->undecorated_smoothed_pwdb < 0) // initialize
6282 {
6283 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
6284 //DbgPrint("First pwdb initialize \n");
6285 }
6286#if 1
6287 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
6288 {
6289 priv->undecorated_smoothed_pwdb =
6290 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6291 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6292 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
6293 }
6294 else
6295 {
6296 priv->undecorated_smoothed_pwdb =
6297 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
6298 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
6299 }
6300#else
6301 //Fixed by Jacken 2008-03-20
6302 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
6303 {
6304 pHalData->UndecoratedSmoothedPWDB =
6305 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6306 pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
6307 }
6308 else
6309 {
6310 pHalData->UndecoratedSmoothedPWDB =
6311 ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
6312 }
6313#endif
6314
6315 }
6316
6317 //
6318 // Check EVM
6319 //
6320 /* record the general EVM to the sliding window. */
6321 if(pprevious_stats->SignalQuality == 0)
6322 {
6323 }
6324 else
6325 {
6326 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
6327 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
6328 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
6329 last_evm = priv->stats.slide_evm[slide_evm_index];
6330 priv->stats.slide_evm_total -= last_evm;
6331 }
6332
6333 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
6334
6335 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
6336 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
6337 slide_evm_index = 0;
6338
6339 // <1> Showed on UI for user, in percentage.
6340 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
6341 priv->stats.signal_quality = tmp_val;
6342 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
6343 priv->stats.last_signal_strength_inpercent = tmp_val;
6344 }
6345
6346 // <2> Showed on UI for engineering
6347 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
6348 {
6349 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
6350 {
6351 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
6352 {
6353 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
6354 {
6355 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
6356 }
6357 priv->stats.rx_evm_percentage[nspatial_stream] =
6358 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
6359 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
6360 }
6361 }
6362 }
6363 }
6364
6365
6366}
6367
6368/*-----------------------------------------------------------------------------
6369 * Function: rtl819x_query_rxpwrpercentage()
6370 *
6371 * Overview:
6372 *
6373 * Input: char antpower
6374 *
6375 * Output: NONE
6376 *
6377 * Return: 0-100 percentage
6378 *
6379 * Revised History:
6380 * When Who Remark
6381 * 05/26/2008 amy Create Version 0 porting from windows code.
6382 *
6383 *---------------------------------------------------------------------------*/
6384static u8 rtl819x_query_rxpwrpercentage(
6385 char antpower
6386 )
6387{
6388 if ((antpower <= -100) || (antpower >= 20))
6389 {
6390 return 0;
6391 }
6392 else if (antpower >= 0)
6393 {
6394 return 100;
6395 }
6396 else
6397 {
6398 return (100+antpower);
6399 }
6400
6401} /* QueryRxPwrPercentage */
6402
6403static u8
6404rtl819x_evm_dbtopercentage(
6405 char value
6406 )
6407{
6408 char ret_val;
6409
6410 ret_val = value;
6411
6412 if(ret_val >= 0)
6413 ret_val = 0;
6414 if(ret_val <= -33)
6415 ret_val = -33;
6416 ret_val = 0 - ret_val;
6417 ret_val*=3;
6418 if(ret_val == 99)
6419 ret_val = 100;
6420 return(ret_val);
6421}
6422//
6423// Description:
6424// We want good-looking for signal strength/quality
6425// 2007/7/19 01:09, by cosa.
6426//
6427long
6428rtl819x_signal_scale_mapping(
6429 long currsig
6430 )
6431{
6432 long retsig;
6433
6434 // Step 1. Scale mapping.
6435 if(currsig >= 61 && currsig <= 100)
6436 {
6437 retsig = 90 + ((currsig - 60) / 4);
6438 }
6439 else if(currsig >= 41 && currsig <= 60)
6440 {
6441 retsig = 78 + ((currsig - 40) / 2);
6442 }
6443 else if(currsig >= 31 && currsig <= 40)
6444 {
6445 retsig = 66 + (currsig - 30);
6446 }
6447 else if(currsig >= 21 && currsig <= 30)
6448 {
6449 retsig = 54 + (currsig - 20);
6450 }
6451 else if(currsig >= 5 && currsig <= 20)
6452 {
6453 retsig = 42 + (((currsig - 5) * 2) / 3);
6454 }
6455 else if(currsig == 4)
6456 {
6457 retsig = 36;
6458 }
6459 else if(currsig == 3)
6460 {
6461 retsig = 27;
6462 }
6463 else if(currsig == 2)
6464 {
6465 retsig = 18;
6466 }
6467 else if(currsig == 1)
6468 {
6469 retsig = 9;
6470 }
6471 else
6472 {
6473 retsig = currsig;
6474 }
6475
6476 return retsig;
6477}
6478
5f53d8ca
JC		 6479/*-----------------------------------------------------------------------------
6480 * Function: QueryRxPhyStatus8192S()
6481 *
6482 * Overview:
6483 *
6484 * Input: NONE
6485 *
6486 * Output: NONE
6487 *
6488 * Return: NONE
6489 *
6490 * Revised History:
6491 * When Who Remark
6492 * 06/01/2007 MHC Create Version 0.
6493 * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
6494 * descriptor definition.
6495 * 07/04/2007 MHC According to Jerry and Bryant's document. We read
6496 * ir_isolation and ext_lna for RF's init value and use
6497 * to compensate RSSI after receiving packets.
6498 * 09/10/2008 MHC Modify name and PHY status field for 92SE.
6499 * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
6500 *
6501 *---------------------------------------------------------------------------*/
6502static void rtl8192SU_query_rxphystatus(
6503 struct r8192_priv * priv,
6504 struct ieee80211_rx_stats * pstats,
6505 rx_desc_819x_usb *pDesc,
6506 rx_drvinfo_819x_usb * pdrvinfo,
6507 struct ieee80211_rx_stats * precord_stats,
6508 bool bpacket_match_bssid,
6509 bool bpacket_toself,
6510 bool bPacketBeacon,
6511 bool bToSelfBA
6512 )
6513{
6514 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
6515 //PHY_STS_CCK_8192S_T *pCck_buf;
6516 phy_sts_cck_819xusb_t * pcck_buf;
6517 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
6518 //u8 *prxpkt;
6519 //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
6520 u8 i, max_spatial_stream, rxsc_sgien_exflg;
6521 char rx_pwr[4], rx_pwr_all=0;
6522 //long rx_avg_pwr = 0;
6523 //char rx_snrX, rx_evmX;
6524 u8 evm, pwdb_all;
6525 u32 RSSI, total_rssi=0;//, total_evm=0;
6526// long signal_strength_index = 0;
6527 u8 is_cck_rate=0;
6528 u8 rf_rx_num = 0;
6529
6530
6531
6532 priv->stats.numqry_phystatus++;
6533
6534 is_cck_rate = rx_hal_is_cck_rate(pDesc);
6535
6536 // Record it for next packet processing
6537 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
6538 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
6539 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
6540 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
6541 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
6542 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
6543
5f53d8ca
JC		 6544
6545 pstats->RxMIMOSignalQuality[0] = -1;
6546 pstats->RxMIMOSignalQuality[1] = -1;
6547 precord_stats->RxMIMOSignalQuality[0] = -1;
6548 precord_stats->RxMIMOSignalQuality[1] = -1;
6549
6550 if(is_cck_rate)
6551 {
6552 u8 report;//, tmp_pwdb;
6553 //char cck_adc_pwdb[4];
6554
6555 // CCK Driver info Structure is not the same as OFDM packet.
6556 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
6557
6558 //
6559 // (1)Hardware does not provide RSSI for CCK
6560 //
6561
6562 //
6563 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6564 //
6565
6566 priv->stats.numqry_phystatusCCK++;
6567
6568 if(!priv->bCckHighPower)
6569 {
6570 report = pcck_buf->cck_agc_rpt & 0xc0;
6571 report = report>>6;
6572 switch(report)
6573 {
6574 //Fixed by Jacken from Bryant 2008-03-20
6575 //Original value is -38 , -26 , -14 , -2
6576 //Fixed value is -35 , -23 , -11 , 6
6577 case 0x3:
6578 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
6579 break;
6580 case 0x2:
6581 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
6582 break;
6583 case 0x1:
6584 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
6585 break;
6586 case 0x0:
6587 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
6588 break;
6589 }
6590 }
6591 else
6592 {
6593 report = pdrvinfo->cfosho[0] & 0x60;
6594 report = report>>5;
6595 switch(report)
6596 {
6597 case 0x3:
6598 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6599 break;
6600 case 0x2:
6601 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
6602 break;
6603 case 0x1:
6604 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
6605 break;
6606 case 0x0:
6607 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
6608 break;
6609 }
6610 }
6611
6612 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
6613 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6614 //pstats->RecvSignalPower = pwdb_all;
6615 pstats->RecvSignalPower = rx_pwr_all;
6616
6617 //
6618 // (3) Get Signal Quality (EVM)
6619 //
6620 //if(bpacket_match_bssid)
6621 {
6622 u8 sq;
6623
6624 if(pstats->RxPWDBAll > 40)
6625 {
6626 sq = 100;
6627 }else
6628 {
6629 sq = pcck_buf->sq_rpt;
6630
6631 if(pcck_buf->sq_rpt > 64)
6632 sq = 0;
6633 else if (pcck_buf->sq_rpt < 20)
6634 sq = 100;
6635 else
6636 sq = ((64-sq) * 100) / 44;
6637 }
6638 pstats->SignalQuality = precord_stats->SignalQuality = sq;
6639 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
6640 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
6641 }
6642 }
6643 else
6644 {
6645 priv->stats.numqry_phystatusHT++;
6646
6647 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
6648 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
6649
6650 //
6651 // (1)Get RSSI for HT rate
6652 //
6653 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
6654 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
6655 {
6656 // 2008/01/30 MH we will judge RF RX path now.
6657 if (priv->brfpath_rxenable[i])
6658 rf_rx_num++;
6659 //else
6660 // continue;
6661
6662 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
6663 // continue;
6664
6665 //Fixed by Jacken from Bryant 2008-03-20
6666 //Original value is 106
6667 //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
6668 rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
6669
6670 /* Translate DBM to percentage. */
6671 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
6672 total_rssi += RSSI;
6673 RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
6674
6675 //Get Rx snr value in DB
6676 //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
6677 //rx_snrX = (char)(tmp_rxsnr);
6678 //rx_snrX /= 2;
6679 //priv->stats.rxSNRdB[i] = (long)rx_snrX;
6680 priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
6681
6682 /* Translate DBM to percentage. */
6683 //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
6684 //total_rssi += RSSI;
6685
6686 /* Record Signal Strength for next packet */
6687 //if(bpacket_match_bssid)
6688 {
6689 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
6690 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
6691 }
6692 }
6693
6694
6695 //
6696 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
6697 //
6698 //Fixed by Jacken from Bryant 2008-03-20
6699 //Original value is 106
6700 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
6701 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
6702 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
6703
6704 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
6705 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
6706 pstats->RecvSignalPower = rx_pwr_all;
6707
6708 //
6709 // (3)EVM of HT rate
6710 //
6711 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
6712 // pdrvinfo->RxRate<=DESC90_RATEMCS15)
6713 if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
6714 pDesc->RxMCS<=DESC92S_RATEMCS15)
6715 max_spatial_stream = 2; //both spatial stream make sense
6716 else
6717 max_spatial_stream = 1; //only spatial stream 1 makes sense
6718
6719 for(i=0; i<max_spatial_stream; i++)
6720 {
6721 //tmp_rxevm = pofdm_buf->rxevm_X[i];
6722 //rx_evmX = (char)(tmp_rxevm);
6723
6724 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
6725 // fill most significant bit to "zero" when doing shifting operation which may change a negative
6726 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
6727 //rx_evmX /= 2; //dbm
6728
6729 //evm = rtl819x_evm_dbtopercentage(rx_evmX);
6730 evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
6731 RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
5f53d8ca
JC		 6732
6733 //if(bpacket_match_bssid)
6734 {
6735 if(i==0) // Fill value in RFD, Get the first spatial stream only
6736 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
6737 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
6738 }
6739 }
6740
6741
6742 /* record rx statistics for debug */
6743 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
6744 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
6745 //if(pdrvinfo->BW) //40M channel
6746 if(pDesc->BW) //40M channel
6747 priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
6748 else //20M channel
6749 priv->stats.received_bwtype[0]++;
6750 }
6751
6752 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
6753 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
6754 if(is_cck_rate)
6755 {
6756 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
6757
6758 }
6759 else
6760 {
6761 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
6762 // We can judge RX path number now.
6763 if (rf_rx_num != 0)
6764 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
6765 }
6766}/* QueryRxPhyStatus8192S */
0f29f587
BZ		 6767
6768void
6769rtl8192_record_rxdesc_forlateruse(
6770 struct ieee80211_rx_stats * psrc_stats,
6771 struct ieee80211_rx_stats * ptarget_stats
6772)
6773{
6774 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
6775 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
6776 ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
6777}
6778
6779static void rtl8192SU_query_rxphystatus(
5f53d8ca
JC		 6780 struct r8192_priv * priv,
6781 struct ieee80211_rx_stats * pstats,
0f29f587 6782 rx_desc_819x_usb *pDesc,
5f53d8ca
JC		 6783 rx_drvinfo_819x_usb * pdrvinfo,
6784 struct ieee80211_rx_stats * precord_stats,
6785 bool bpacket_match_bssid,
6786 bool bpacket_toself,
6787 bool bPacketBeacon,
6788 bool bToSelfBA
0f29f587
BZ		 6789 );
6790void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
6791 struct ieee80211_rx_stats * pstats,
6792 rx_desc_819x_usb *pDesc,
6793 rx_drvinfo_819x_usb *pdrvinfo)
5f53d8ca 6794{
0f29f587
BZ		 6795 // TODO: We must only check packet for current MAC address. Not finish
6796 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6797 struct net_device *dev=info->dev;
6798 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6799 bool bpacket_match_bssid, bpacket_toself;
6800 bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
6801 static struct ieee80211_rx_stats previous_stats;
6802 struct ieee80211_hdr_3addr *hdr;//by amy
6803 u16 fc,type;
5f53d8ca 6804
0f29f587 6805 // Get Signal Quality for only RX data queue (but not command queue)
5f53d8ca 6806
0f29f587
BZ		 6807 u8* tmp_buf;
6808 //u16 tmp_buf_len = 0;
6809 u8 *praddr;
5f53d8ca 6810
0f29f587
BZ		 6811 /* Get MAC frame start address. */
6812 tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
5f53d8ca 6813
0f29f587 6814 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
e2117cea 6815 fc = le16_to_cpu(hdr->frame_control);
0f29f587
BZ		 6816 type = WLAN_FC_GET_TYPE(fc);
6817 praddr = hdr->addr1;
5f53d8ca 6818
0f29f587
BZ		 6819 /* Check if the received packet is acceptabe. */
6820 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
6821 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
6822 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
6823 bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
5f53d8ca
JC		 6824
6825#if 1//cosa
6826 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
6827 {
6828 bPacketBeacon = true;
6829 //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6830 }
6831 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
6832 {
6833 if((eqMacAddr(praddr,dev->dev_addr)))
6834 bToSelfBA = true;
6835 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
6836 }
6837
6838#endif
6839
6840
6841 if(bpacket_match_bssid)
6842 {
6843 priv->stats.numpacket_matchbssid++;
6844 }
6845 if(bpacket_toself){
6846 priv->stats.numpacket_toself++;
6847 }
6848 //
6849 // Process PHY information for previous packet (RSSI/PWDB/EVM)
6850 //
6851 // Because phy information is contained in the last packet of AMPDU only, so driver
6852 // should process phy information of previous packet
6853 rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
6854 rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
6855 rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
6856
6857}
5f53d8ca
JC		 6858
6859/**
6860* Function: UpdateReceivedRateHistogramStatistics
6861* Overview: Recored down the received data rate
6862*
6863* Input:
6864* struct net_device *dev
6865* struct ieee80211_rx_stats *stats
6866*
6867* Output:
6868*
6869* (priv->stats.ReceivedRateHistogram[] is updated)
6870* Return:
6871* None
6872*/
6873void
6874UpdateReceivedRateHistogramStatistics8190(
6875 struct net_device *dev,
6876 struct ieee80211_rx_stats *stats
6877 )
6878{
6879 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6880 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
6881 u32 rateIndex;
6882 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
6883
6884
6885 if(stats->bCRC)
6886 rcvType = 2;
6887 else if(stats->bICV)
6888 rcvType = 3;
6889
6890 if(stats->bShortPreamble)
6891 preamble_guardinterval = 1;// short
6892 else
6893 preamble_guardinterval = 0;// long
6894
6895 switch(stats->rate)
6896 {
6897 //
6898 // CCK rate
6899 //
6900 case MGN_1M: rateIndex = 0; break;
6901 case MGN_2M: rateIndex = 1; break;
6902 case MGN_5_5M: rateIndex = 2; break;
6903 case MGN_11M: rateIndex = 3; break;
6904 //
6905 // Legacy OFDM rate
6906 //
6907 case MGN_6M: rateIndex = 4; break;
6908 case MGN_9M: rateIndex = 5; break;
6909 case MGN_12M: rateIndex = 6; break;
6910 case MGN_18M: rateIndex = 7; break;
6911 case MGN_24M: rateIndex = 8; break;
6912 case MGN_36M: rateIndex = 9; break;
6913 case MGN_48M: rateIndex = 10; break;
6914 case MGN_54M: rateIndex = 11; break;
6915 //
6916 // 11n High throughput rate
6917 //
6918 case MGN_MCS0: rateIndex = 12; break;
6919 case MGN_MCS1: rateIndex = 13; break;
6920 case MGN_MCS2: rateIndex = 14; break;
6921 case MGN_MCS3: rateIndex = 15; break;
6922 case MGN_MCS4: rateIndex = 16; break;
6923 case MGN_MCS5: rateIndex = 17; break;
6924 case MGN_MCS6: rateIndex = 18; break;
6925 case MGN_MCS7: rateIndex = 19; break;
6926 case MGN_MCS8: rateIndex = 20; break;
6927 case MGN_MCS9: rateIndex = 21; break;
6928 case MGN_MCS10: rateIndex = 22; break;
6929 case MGN_MCS11: rateIndex = 23; break;
6930 case MGN_MCS12: rateIndex = 24; break;
6931 case MGN_MCS13: rateIndex = 25; break;
6932 case MGN_MCS14: rateIndex = 26; break;
6933 case MGN_MCS15: rateIndex = 27; break;
6934 default: rateIndex = 28; break;
6935 }
6936 priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
6937 priv->stats.received_rate_histogram[0][rateIndex]++; //total
6938 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
6939}
6940
5f53d8ca
JC		 6941void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
6942{
6943 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
6944 struct net_device *dev=info->dev;
6945 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
6946 //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6947 rx_drvinfo_819x_usb *driver_info = NULL;
6948
6949 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
6950 //PHAL_DATA_8192SUSB pHalData = GET_HAL_DATA(Adapter);
6951 //pu1Byte pDesc = (pu1Byte)pDescIn;
6952 //PRX_DRIVER_INFO_8192S pDrvInfo;
6953
5f53d8ca
JC		 6954 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
6955
6956 if(0)
6957 {
6958 int m = 0;
6959 printk("========================");
6960 for(m=0; m<skb->len; m++){
6961 if((m%32) == 0)
6962 printk("\n");
6963 printk("%2x ",((u8*)skb->data)[m]);
6964 }
6965 printk("\n========================\n");
6966
6967 }
6968
6969
6970 //
6971 //Get Rx Descriptor Raw Information
6972 //
6973 stats->Length = desc->Length ;
6974 stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
6975 stats->RxBufShift = (desc->Shift)&0x03;
6976 stats->bICV = desc->ICV;
6977 stats->bCRC = desc->CRC32;
6978 stats->bHwError = stats->bCRC|stats->bICV;
6979 stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
6980 stats->bIsAMPDU = (desc->AMSDU==1);
6981 stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
6982 stats->bShortPreamble = desc->SPLCP;
6983 stats->RxIs40MHzPacket = (desc->BW==1);
6984 stats->TimeStampLow = desc->TSFL;
6985
6986 if((desc->FAGGR==1) || (desc->PAGGR==1))
6987 {// Rx A-MPDU
6988 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
6989 }
6990//YJ,test,090310
6991if(stats->bHwError)
6992{
6993 if(stats->bICV)
6994 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
6995 if(stats->bCRC)
6996 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
6997}
6998
6999 if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
7000 {
7001 // Always received ICV error packets in AES mode.
7002 // This fixed HW later MIC write bug.
7003 if(stats->bICV && !stats->bCRC)
7004 {
7005 stats->bICV = FALSE;
7006 stats->bHwError = FALSE;
7007 }
7008 }
7009
7010 // Transform HwRate to MRate
7011 if(!stats->bHwError)
7012 //stats->DataRate = HwRateToMRate(
7013 // (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
7014 // (u1Byte)GET_RX_DESC_RXMCS(pDesc),
7015 // (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
7016 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
7017 else
7018 stats->rate = MGN_1M;
7019
7020 //
7021 // Collect Rx rate/AMPDU/TSFL
7022 //
7023 //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
7024 //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
7025 //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
7026 UpdateReceivedRateHistogramStatistics8190(dev, stats);
7027 //UpdateRxAMPDUHistogramStatistics8192S(dev, stats); //FIXLZM
7028 UpdateRxPktTimeStamp8190(dev, stats);
7029
7030 //
7031 // Get PHY Status and RSVD parts.
7032 // <Roger_Notes> It only appears on last aggregated packet.
7033 //
7034 if (desc->PHYStatus)
7035 {
7036 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
7037 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
7038 stats->RxBufShift);
7039 if(0)
7040 {
7041 int m = 0;
7042 printk("========================\n");
7043 printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
7044 RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
7045 for(m=0; m<32; m++){
7046 printk("%2x ",((u8*)driver_info)[m]);
7047 }
7048 printk("\n========================\n");
7049
7050 }
7051
7052 }
7053
7054 //YJ,add,090107
7055 skb_pull(skb, sizeof(rx_desc_819x_usb));
7056 //YJ,add,090107,end
7057
7058 //
7059 // Get Total offset of MPDU Frame Body
7060 //
7061 if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
7062 {
7063 stats->bShift = 1;
7064 //YJ,add,090107
7065 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
7066 //YJ,add,090107,end
7067 }
7068
7069 //
7070 // Get PHY Status and RSVD parts.
7071 // <Roger_Notes> It only appears on last aggregated packet.
7072 //
7073 if (desc->PHYStatus)
7074 {
7075 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
7076 }
7077}
5f53d8ca 7078
5f53d8ca
JC		 7079//
7080// Description:
7081// The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
7082// (1) QoS control : shift 2 bytes
7083// (2) Mesh Network : shift 1 or 3 bytes
7084// (3) RxDriverInfo occupies the front parts of Rx Packets buffer(shift units is in 8Bytes)
7085//
7086// It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
7087// of IP header is not double word alignment.
7088// This features is supported in 818xb and 8190 only, but not 818x.
7089//
7090// parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
7091// Rx Descriptor
7092// return value: unsigned int, number of total shifted bytes
7093//
7094// Notes: 2008/06/28, created by Roger
7095//
7096u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
7097{
7098 //PRT_RFD_STATUS pRtRfdStatus = &pRfd->Status;
7099
7100 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
7101}
7102
7103void rtl8192SU_rx_nomal(struct sk_buff* skb)
7104{
7105 rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7106 struct net_device *dev=info->dev;
7107 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7108 struct ieee80211_rx_stats stats = {
7109 .signal = 0,
7110 .noise = -98,
7111 .rate = 0,
7112 // .mac_time = jiffies,
7113 .freq = IEEE80211_24GHZ_BAND,
7114 };
7115 u32 rx_pkt_len = 0;
7116 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
7117 bool unicast_packet = false;
7118
5f53d8ca
JC		 7119 //printk("**********skb->len = %d\n", skb->len);
7120 /* 20 is for ps-poll */
7121 if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
7122
7123 /* first packet should not contain Rx aggregation header */
7124 rtl8192SU_query_rxdesc_status(skb, &stats, false);
7125 /* TODO */
7126
7127 /* hardware related info */
5f53d8ca
JC		 7128 priv->stats.rxoktotal++; //YJ,test,090108
7129
7130 /* Process the MPDU recevied */
7131 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
7132
7133 rx_pkt_len = skb->len;
7134 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
7135 unicast_packet = false;
7136 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
7137 //TODO
7138 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
7139 //TODO
7140 }else {
7141 /* unicast packet */
7142 unicast_packet = true;
7143 }
7144
55c7d5fc 7145 if(!ieee80211_rtl_rx(priv->ieee80211,skb, &stats)) {
5f53d8ca
JC		 7146 dev_kfree_skb_any(skb);
7147 } else {
7148 // priv->stats.rxoktotal++; //YJ,test,090108
7149 if(unicast_packet) {
7150 priv->stats.rxbytesunicast += rx_pkt_len;
7151 }
7152 }
7153
7154 //up is firs pkt, follow is next and next
5f53d8ca
JC		 7155 }
7156 else
7157 {
7158 priv->stats.rxurberr++;
7159 printk("actual_length:%d\n", skb->len);
7160 dev_kfree_skb_any(skb);
7161 }
7162
7163}
5f53d8ca
JC		 7164
7165void
7166rtl819xusb_process_received_packet(
7167 struct net_device *dev,
7168 struct ieee80211_rx_stats *pstats
7169 )
7170{
7171// bool bfreerfd=false, bqueued=false;
7172 u8* frame;
7173 u16 frame_len=0;
7174 struct r8192_priv *priv = ieee80211_priv(dev);
7175// u8 index = 0;
7176// u8 TID = 0;
7177 //u16 seqnum = 0;
7178 //PRX_TS_RECORD pts = NULL;
7179
7180 // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
7181 //porting by amy 080508
7182 pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
7183 frame = pstats->virtual_address;
7184 frame_len = pstats->packetlength;
7185#ifdef TODO // by amy about HCT
7186 if(!Adapter->bInHctTest)
7187 CountRxErrStatistics(Adapter, pRfd);
7188#endif
7189 {
7190 #ifdef ENABLE_PS //by amy for adding ps function in future
7191 RT_RF_POWER_STATE rtState;
7192 // When RF is off, we should not count the packet for hw/sw synchronize
7193 // reason, ie. there may be a duration while sw switch is changed and hw
7194 // switch is being changed. 2006.12.04, by shien chang.
7195 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
7196 if (rtState == eRfOff)
7197 {
7198 return;
7199 }
7200 #endif
7201 priv->stats.rxframgment++;
7202
7203 }
7204#ifdef TODO
7205 RmMonitorSignalStrength(Adapter, pRfd);
7206#endif
7207 /* 2007/01/16 MH Add RX command packet handle here. */
7208 /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
7209 if (rtl819xusb_rx_command_packet(dev, pstats))
7210 {
7211 return;
7212 }
7213
7214#ifdef SW_CRC_CHECK
7215 SwCrcCheck();
7216#endif
7217
7218
7219}
7220
7221void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
7222{
7223// rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7224// struct net_device *dev=info->dev;
7225// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7226 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
7227// rx_drvinfo_819x_usb *driver_info;
7228
7229 //
7230 //Get Rx Descriptor Information
7231 //
7232 stats->virtual_address = (u8*)skb->data;
7233 stats->Length = desc->Length;
7234 stats->RxDrvInfoSize = 0;
7235 stats->RxBufShift = 0;
7236 stats->packetlength = stats->Length-scrclng;
7237 stats->fraglength = stats->packetlength;
7238 stats->fragoffset = 0;
7239 stats->ntotalfrag = 1;
7240}
7241
5f53d8ca
JC		 7242void rtl8192SU_rx_cmd(struct sk_buff *skb)
7243{
7244 struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
7245 struct net_device *dev = info->dev;
7246
7247 /* TODO */
7248 struct ieee80211_rx_stats stats = {
7249 .signal = 0,
7250 .noise = -98,
7251 .rate = 0,
7252 // .mac_time = jiffies,
7253 .freq = IEEE80211_24GHZ_BAND,
7254 };
7255
7256 //
7257 // Check buffer length to determine if this is a valid MPDU.
7258 //
7259 if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
7260 //(pHalData->SwChnlInProgress == FALSE))
7261 {
7262 //
7263 // Collection information in Rx descriptor.
7264 //
5f53d8ca
JC		 7265 query_rx_cmdpkt_desc_status(skb,&stats);
7266 // this is to be done by amy 080508 prfd->queue_id = 1;
7267
7268 //
7269 // Process the MPDU recevied.
7270 //
7271 rtl819xusb_process_received_packet(dev,&stats);
7272
7273 dev_kfree_skb_any(skb);
7274 }
7275 else
7276 {
7277 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
7278 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
7279 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
7280 //pContext->BufLenUsed, pAdapter->NumIdleRfd));
7281 }
7282
7283 //
7284 // Reuse USB_IN_CONTEXT since we had finished processing the
7285 // buffer in USB_IN_CONTEXT.
7286 //
7287 //HalUsbReturnInContext(pAdapter, pContext);
7288
7289 //
7290 // Issue another bulk IN transfer.
7291 //
7292 //HalUsbInMpdu(pAdapter, PipeIndex);
7293
7294 RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
7295
7296}
5f53d8ca
JC		 7297
7298void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
7299{
7300 struct sk_buff *skb;
7301 struct rtl8192_rx_info *info;
7302
7303 while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
7304 info = (struct rtl8192_rx_info *)skb->cb;
7305 switch (info->out_pipe) {
7306 /* Nomal packet pipe */
7307 case 3:
7308 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
7309 priv->IrpPendingCount--;
7310 priv->ops->rtl819x_rx_nomal(skb);
7311 break;
7312
7313 /* Command packet pipe */
7314 case 9:
7315 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
7316 info->out_pipe);
7317 priv->ops->rtl819x_rx_cmd(skb);
7318 break;
7319
7320 default: /* should never get here! */
7321 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
7322 info->out_pipe);
7323 dev_kfree_skb(skb);
7324 break;
7325
7326 }
7327 }
7328}
7329
7330
7331
7332/****************************************************************************
7333 ---------------------------- USB_STUFF---------------------------
7334*****************************************************************************/
5f53d8ca
JC		 7335//LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
7336static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
7337{
7338 struct r8192_priv *priv = ieee80211_priv(dev);
7339 struct usb_host_interface *iface_desc;
7340 struct usb_endpoint_descriptor *endpoint;
7341 u8 i = 0;
7342
7343 priv->ep_in_num = 0;
7344 priv->ep_out_num = 0;
7345 memset(priv->RtOutPipes,0,16);
7346 memset(priv->RtInPipes,0,16);
7347
5f53d8ca
JC		 7348 iface_desc = intf->cur_altsetting;
7349 priv->ep_num = iface_desc->desc.bNumEndpoints;
7350
7351 for (i = 0; i < priv->ep_num; ++i) {
7352 endpoint = &iface_desc->endpoint[i].desc;
5f53d8ca
JC		 7353 if (usb_endpoint_is_bulk_in(endpoint)) {
7354 priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
7355 priv->ep_in_num ++;
7356 //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7357 } else if (usb_endpoint_is_bulk_out(endpoint)) {
7358 priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
7359 priv->ep_out_num ++;
7360 //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
7361 }
5f53d8ca
JC		 7362 }
7363 {
7364 memset(priv->txqueue_to_outpipemap,0,9);
7365 if (priv->ep_num == 6) {
7366 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7367 u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
7368
7369 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7370 } else if (priv->ep_num == 4) {
7371 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7372 u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
7373
7374 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7375 } else if (priv->ep_num > 9) {
7376 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7377 u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
7378
7379 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7380 } else {//use sigle pipe
7381 // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
7382 u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
7383 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
7384 }
7385 }
7386 printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
7387
7388 printk("==>RtInPipes:");
7389 for(i=0; i < priv->ep_in_num; i++)
7390 printk("%d ", priv->RtInPipes[i]);
7391 printk("\n");
7392
7393 printk("==>RtOutPipes:");
7394 for(i=0; i < priv->ep_out_num; i++)
7395 printk("%d ", priv->RtOutPipes[i]);
7396 printk("\n");
7397
7398 printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
7399 for(i=0; i < 9; i++)
7400 printk("%d ", priv->txqueue_to_outpipemap[i]);
7401 printk("\n");
5f53d8ca
JC		 7402
7403 return;
7404}
5f53d8ca 7405
77b92881
BZ		 7406static const struct net_device_ops rtl8192_netdev_ops = {
7407 .ndo_open = rtl8192_open,
7408 .ndo_stop = rtl8192_close,
7409 .ndo_get_stats = rtl8192_stats,
7410 .ndo_tx_timeout = tx_timeout,
7411 .ndo_do_ioctl = rtl8192_ioctl,
7412 .ndo_set_multicast_list = r8192_set_multicast,
7413 .ndo_set_mac_address = r8192_set_mac_adr,
7414 .ndo_validate_addr = eth_validate_addr,
7415 .ndo_change_mtu = eth_change_mtu,
55c7d5fc 7416 .ndo_start_xmit = rtl8192_ieee80211_rtl_xmit,
77b92881
BZ		 7417};
7418
5f53d8ca
JC		 7419static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
7420 const struct usb_device_id *id)
5f53d8ca
JC		 7421{
7422// unsigned long ioaddr = 0;
7423 struct net_device *dev = NULL;
7424 struct r8192_priv *priv= NULL;
5f53d8ca 7425 struct usb_device *udev = interface_to_usbdev(intf);
1ec9e48d 7426
5f53d8ca
JC		 7427 RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
7428
7429 dev = alloc_ieee80211(sizeof(struct r8192_priv));
7430
5f53d8ca
JC		 7431 usb_set_intfdata(intf, dev);
7432 SET_NETDEV_DEV(dev, &intf->dev);
5f53d8ca 7433 priv = ieee80211_priv(dev);
5f53d8ca 7434 priv->ieee80211 = netdev_priv(dev);
5f53d8ca
JC		 7435 priv->udev=udev;
7436
5f53d8ca 7437 HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
5f53d8ca 7438
5f53d8ca
JC		 7439 //printk("===============>NIC 8192SU\n");
7440 priv->ops = &rtl8192su_ops;
5f53d8ca 7441
77b92881 7442 dev->netdev_ops = &rtl8192_netdev_ops;
5f53d8ca
JC		 7443
7444 //DMESG("Oops: i'm coming\n");
5f53d8ca 7445 dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
3bd709f2 7446
5f53d8ca
JC		 7447 dev->type=ARPHRD_ETHER;
7448
7449 dev->watchdog_timeo = HZ*3; //modified by john, 0805
7450
7451 if (dev_alloc_name(dev, ifname) < 0){
7452 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
7453 ifname = "wlan%d";
7454 dev_alloc_name(dev, ifname);
7455 }
7456
7457 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
7458#if 1
7459 if(rtl8192_init(dev)!=0){
7460 RT_TRACE(COMP_ERR, "Initialization failed");
7461 goto fail;
7462 }
7463#endif
7464 netif_carrier_off(dev);
7465 netif_stop_queue(dev);
7466
7467 register_netdev(dev);
7468 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
7469 rtl8192_proc_init_one(dev);
7470
7471
7472 RT_TRACE(COMP_INIT, "Driver probe completed\n");
5f53d8ca 7473 return 0;
5f53d8ca
JC		 7474fail:
7475 free_ieee80211(dev);
7476
7477 RT_TRACE(COMP_ERR, "wlan driver load failed\n");
5f53d8ca 7478 return -ENODEV;
5f53d8ca
JC		 7479}
7480
7481//detach all the work and timer structure declared or inititialize in r8192U_init function.
7482void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
7483{
5f53d8ca
JC		 7484 cancel_work_sync(&priv->reset_wq);
7485 cancel_work_sync(&priv->qos_activate);
7486 cancel_delayed_work(&priv->watch_dog_wq);
7487 cancel_delayed_work(&priv->update_beacon_wq);
7488 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
7489 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
7490 //cancel_work_sync(&priv->SetBWModeWorkItem);
7491 //cancel_work_sync(&priv->SwChnlWorkItem);
5f53d8ca
JC		 7492}
7493
5f53d8ca 7494static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
5f53d8ca 7495{
5f53d8ca 7496 struct net_device *dev = usb_get_intfdata(intf);
5f53d8ca
JC		 7497 struct r8192_priv *priv = ieee80211_priv(dev);
7498 if(dev){
7499
7500 unregister_netdev(dev);
7501
7502 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
7503 rtl8192_proc_remove_one(dev);
7504
7505 rtl8192_down(dev);
7506 if (priv->pFirmware)
7507 {
7508 vfree(priv->pFirmware);
7509 priv->pFirmware = NULL;
7510 }
7511 // priv->rf_close(dev);
7512// rtl8192_SetRFPowerState(dev, eRfOff);
5f53d8ca 7513 destroy_workqueue(priv->priv_wq);
5f53d8ca
JC		 7514 //rtl8192_irq_disable(dev);
7515 //rtl8192_reset(dev);
7516 mdelay(10);
7517
7518 }
7519 free_ieee80211(dev);
7520 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
7521}
7522
5d9baea9
BZ		 7523/* fun with the built-in ieee80211 stack... */
7524extern int ieee80211_debug_init(void);
7525extern void ieee80211_debug_exit(void);
7526extern int ieee80211_crypto_init(void);
7527extern void ieee80211_crypto_deinit(void);
7528extern int ieee80211_crypto_tkip_init(void);
7529extern void ieee80211_crypto_tkip_exit(void);
7530extern int ieee80211_crypto_ccmp_init(void);
7531extern void ieee80211_crypto_ccmp_exit(void);
7532extern int ieee80211_crypto_wep_init(void);
7533extern void ieee80211_crypto_wep_exit(void);
7534
5f53d8ca
JC		 7535static int __init rtl8192_usb_module_init(void)
7536{
5d9baea9
BZ		 7537 int ret;
7538
7539#ifdef CONFIG_IEEE80211_DEBUG
7540 ret = ieee80211_debug_init();
7541 if (ret) {
7542 printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
7543 return ret;
7544 }
7545#endif
7546 ret = ieee80211_crypto_init();
7547 if (ret) {
7548 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
7549 return ret;
7550 }
7551
7552 ret = ieee80211_crypto_tkip_init();
7553 if (ret) {
7554 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
7555 ret);
7556 return ret;
7557 }
7558
7559 ret = ieee80211_crypto_ccmp_init();
7560 if (ret) {
7561 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
7562 ret);
7563 return ret;
7564 }
7565
7566 ret = ieee80211_crypto_wep_init();
7567 if (ret) {
7568 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
7569 return ret;
7570 }
7571
5f53d8ca
JC		 7572 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
7573 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
7574 RT_TRACE(COMP_INIT, "Initializing module");
7575 RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
7576 rtl8192_proc_module_init();
7577 return usb_register(&rtl8192_usb_driver);
7578}
7579
7580
7581static void __exit rtl8192_usb_module_exit(void)
7582{
7583 usb_deregister(&rtl8192_usb_driver);
7584
7585 RT_TRACE(COMP_DOWN, "Exiting");
7586 rtl8192_proc_module_remove();
5d9baea9
BZ		 7587
7588 ieee80211_crypto_tkip_exit();
7589 ieee80211_crypto_ccmp_exit();
7590 ieee80211_crypto_wep_exit();
7591 ieee80211_crypto_deinit();
7592#ifdef CONFIG_IEEE80211_DEBUG
7593 ieee80211_debug_exit();
7594#endif
5f53d8ca
JC		 7595}
7596
7597
7598void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7599{
7600 unsigned long flags;
7601 short enough_desc;
7602 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7603
7604 spin_lock_irqsave(&priv->tx_lock,flags);
7605 enough_desc = check_nic_enough_desc(dev,pri);
7606 spin_unlock_irqrestore(&priv->tx_lock,flags);
7607
7608 if(enough_desc)
55c7d5fc 7609 ieee80211_rtl_wake_queue(priv->ieee80211);
5f53d8ca
JC		 7610}
7611
5f53d8ca
JC		 7612void EnableHWSecurityConfig8192(struct net_device *dev)
7613{
7614 u8 SECR_value = 0x0;
7615 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7616 struct ieee80211_device* ieee = priv->ieee80211;
7617
7618 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7619#if 1
7620 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
7621 {
7622 SECR_value |= SCR_RxUseDK;
7623 SECR_value |= SCR_TxUseDK;
7624 }
7625 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
7626 {
7627 SECR_value |= SCR_RxUseDK;
7628 SECR_value |= SCR_TxUseDK;
7629 }
7630#endif
7631 //add HWSec active enable here.
7632//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7633
7634 ieee->hwsec_active = 1;
7635
7636 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
7637 {
7638 ieee->hwsec_active = 0;
7639 SECR_value &= ~SCR_RxDecEnable;
7640 }
7641
7642 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
7643 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
7644 {
7645 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
7646 }
7647}
7648
7649
7650void setKey( struct net_device *dev,
7651 u8 EntryNo,
7652 u8 KeyIndex,
7653 u16 KeyType,
7654 u8 *MacAddr,
7655 u8 DefaultKey,
7656 u32 *KeyContent )
7657{
7658 u32 TargetCommand = 0;
7659 u32 TargetContent = 0;
7660 u16 usConfig = 0;
7661 u8 i;
7662 if (EntryNo >= TOTAL_CAM_ENTRY)
7663 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
7664
0ee9f67c 7665 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
5f53d8ca
JC		 7666
7667 if (DefaultKey)
7668 usConfig |= BIT15 | (KeyType<<2);
7669 else
7670 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
7671// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7672
7673
7674 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
7675 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7676 TargetCommand |= BIT31|BIT16;
7677
7678 if(i==0){//MAC|Config
7679 TargetContent = (u32)(*(MacAddr+0)) << 16|
7680 (u32)(*(MacAddr+1)) << 24|
7681 (u32)usConfig;
7682
7683 write_nic_dword(dev, WCAMI, TargetContent);
7684 write_nic_dword(dev, RWCAM, TargetCommand);
7685 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
7686 }
7687 else if(i==1){//MAC
7688 TargetContent = (u32)(*(MacAddr+2)) |
7689 (u32)(*(MacAddr+3)) << 8|
7690 (u32)(*(MacAddr+4)) << 16|
7691 (u32)(*(MacAddr+5)) << 24;
7692 write_nic_dword(dev, WCAMI, TargetContent);
7693 write_nic_dword(dev, RWCAM, TargetCommand);
7694 }
7695 else {
7696 //Key Material
7697 if(KeyContent !=NULL){
7698 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7699 write_nic_dword(dev, RWCAM, TargetCommand);
7700 }
7701 }
7702 }
7703
7704}
7705
7706/***************************************************************************
7707 ------------------- module init / exit stubs ----------------
7708****************************************************************************/
7709module_init(rtl8192_usb_module_init);
7710module_exit(rtl8192_usb_module_exit);
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