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Staging: rtl8187se: Fix compilation warnings and procfs directory leak
[net-next-2.6.git] / drivers / staging / rtl8187se / r8180_core.c
CommitLineData
c8d86be3
GKH		 1/*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25*/
26
27#if 0
28double __floatsidf (int i) { return i; }
29unsigned int __fixunsdfsi (double d) { return d; }
30double __adddf3(double a, double b) { return a+b; }
31double __addsf3(float a, float b) { return a+b; }
32double __subdf3(double a, double b) { return a-b; }
33double __extendsfdf2(float a) {return a;}
34#endif
35
36
37#undef DEBUG_TX_DESC2
38#undef RX_DONT_PASS_UL
39#undef DEBUG_EPROM
40#undef DEBUG_RX_VERBOSE
41#undef DUMMY_RX
42#undef DEBUG_ZERO_RX
43#undef DEBUG_RX_SKB
44#undef DEBUG_TX_FRAG
45#undef DEBUG_RX_FRAG
46#undef DEBUG_TX_FILLDESC
47#undef DEBUG_TX
48#undef DEBUG_IRQ
49#undef DEBUG_RX
50#undef DEBUG_RXALLOC
51#undef DEBUG_REGISTERS
52#undef DEBUG_RING
53#undef DEBUG_IRQ_TASKLET
54#undef DEBUG_TX_ALLOC
55#undef DEBUG_TX_DESC
56
57//#define DEBUG_TX
58//#define DEBUG_TX_DESC2
59//#define DEBUG_RX
60//#define DEBUG_RX_SKB
61
62//#define CONFIG_RTL8180_IO_MAP
63#include <linux/syscalls.h>
64//#include <linux/fcntl.h>
65//#include <asm/uaccess.h>
66#include "r8180_hw.h"
67#include "r8180.h"
68#include "r8180_sa2400.h" /* PHILIPS Radio frontend */
69#include "r8180_max2820.h" /* MAXIM Radio frontend */
70#include "r8180_gct.h" /* GCT Radio frontend */
71#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
72#include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
73#include "r8180_93cx6.h" /* Card EEPROM */
74#include "r8180_wx.h"
75#include "r8180_dm.h"
76
77#ifdef CONFIG_RTL8180_PM
78#include "r8180_pm.h"
79#endif
80
81#ifdef ENABLE_DOT11D
82#include "dot11d.h"
83#endif
84
85#ifdef CONFIG_RTL8185B
86//#define CONFIG_RTL8180_IO_MAP
87#endif
88
89#ifndef PCI_VENDOR_ID_BELKIN
90 #define PCI_VENDOR_ID_BELKIN 0x1799
91#endif
92#ifndef PCI_VENDOR_ID_DLINK
93 #define PCI_VENDOR_ID_DLINK 0x1186
94#endif
95
96static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
97 {
98 .vendor = PCI_VENDOR_ID_REALTEK,
99// .device = 0x8180,
100 .device = 0x8199,
101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID,
103 .driver_data = 0,
104 },
1fa511ad 105#if 0
c8d86be3
GKH		 106 {
107 .vendor = PCI_VENDOR_ID_BELKIN,
108 .device = 0x6001,
109 .subvendor = PCI_ANY_ID,
110 .subdevice = PCI_ANY_ID,
111 .driver_data = 1,
112 },
113 { /* Belkin F5D6020 v3 */
114 .vendor = PCI_VENDOR_ID_BELKIN,
115 .device = 0x6020,
116 .subvendor = PCI_ANY_ID,
117 .subdevice = PCI_ANY_ID,
118 .driver_data = 2,
119 },
120 { /* D-Link DWL-610 */
121 .vendor = PCI_VENDOR_ID_DLINK,
122 .device = 0x3300,
123 .subvendor = PCI_ANY_ID,
124 .subdevice = PCI_ANY_ID,
125 .driver_data = 3,
126 },
127 {
128 .vendor = PCI_VENDOR_ID_REALTEK,
129 .device = 0x8185,
130 .subvendor = PCI_ANY_ID,
131 .subdevice = PCI_ANY_ID,
132 .driver_data = 4,
133 },
1fa511ad 134#endif
c8d86be3
GKH		 135 {
136 .vendor = 0,
137 .device = 0,
138 .subvendor = 0,
139 .subdevice = 0,
140 .driver_data = 0,
141 }
142};
143
144
145static char* ifname = "wlan%d";
146static int hwseqnum = 0;
147//static char* ifname = "ath%d";
148static int hwwep = 0;
149static int channels = 0x3fff;
150
151#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
152#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
153MODULE_LICENSE("GPL");
154MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
155MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
156MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
157
158
159
160/*
161MODULE_PARM(ifname, "s");
162MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
163
164MODULE_PARM(hwseqnum,"i");
165MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
166
167MODULE_PARM(hwwep,"i");
168MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
169
170MODULE_PARM(channels,"i");
171MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
172*/
173
174#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
175module_param(ifname, charp, S_IRUGO|S_IWUSR );
176module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
177module_param(hwwep,int, S_IRUGO|S_IWUSR);
178module_param(channels,int, S_IRUGO|S_IWUSR);
179#else
180MODULE_PARM(ifname, "s");
181MODULE_PARM(hwseqnum,"i");
182MODULE_PARM(hwwep,"i");
183MODULE_PARM(channels,"i");
184#endif
185
186MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
187//MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
188MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
189MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
190MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
191
192
193static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
194 const struct pci_device_id *id);
195
196static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
197
198static void rtl8180_shutdown (struct pci_dev *pdev)
199{
200 struct net_device *dev = pci_get_drvdata(pdev);
201 dev->stop(dev);
202 pci_disable_device(pdev);
203}
204
205static struct pci_driver rtl8180_pci_driver = {
206 .name = RTL8180_MODULE_NAME, /* Driver name */
207 .id_table = rtl8180_pci_id_tbl, /* PCI_ID table */
208 .probe = rtl8180_pci_probe, /* probe fn */
209 .remove = __devexit_p(rtl8180_pci_remove),/* remove fn */
210#ifdef CONFIG_RTL8180_PM
211 .suspend = rtl8180_suspend, /* PM suspend fn */
212 .resume = rtl8180_resume, /* PM resume fn */
213#else
214 .suspend = NULL, /* PM suspend fn */
215 .resume = NULL, /* PM resume fn */
216#endif
217 .shutdown = rtl8180_shutdown,
218};
219
220
221
222#ifdef CONFIG_RTL8180_IO_MAP
223
224u8 read_nic_byte(struct net_device *dev, int x)
225{
226 return 0xff&inb(dev->base_addr +x);
227}
228
229u32 read_nic_dword(struct net_device *dev, int x)
230{
231 return inl(dev->base_addr +x);
232}
233
234u16 read_nic_word(struct net_device *dev, int x)
235{
236 return inw(dev->base_addr +x);
237}
238
239void write_nic_byte(struct net_device *dev, int x,u8 y)
240{
241 outb(y&0xff,dev->base_addr +x);
242}
243
244void write_nic_word(struct net_device *dev, int x,u16 y)
245{
246 outw(y,dev->base_addr +x);
247}
248
249void write_nic_dword(struct net_device *dev, int x,u32 y)
250{
251 outl(y,dev->base_addr +x);
252}
253
254#else /* RTL_IO_MAP */
255
256u8 read_nic_byte(struct net_device *dev, int x)
257{
258 return 0xff&readb((u8*)dev->mem_start +x);
259}
260
261u32 read_nic_dword(struct net_device *dev, int x)
262{
263 return readl((u8*)dev->mem_start +x);
264}
265
266u16 read_nic_word(struct net_device *dev, int x)
267{
268 return readw((u8*)dev->mem_start +x);
269}
270
271void write_nic_byte(struct net_device *dev, int x,u8 y)
272{
273 writeb(y,(u8*)dev->mem_start +x);
274 udelay(20);
275}
276
277void write_nic_dword(struct net_device *dev, int x,u32 y)
278{
279 writel(y,(u8*)dev->mem_start +x);
280 udelay(20);
281}
282
283void write_nic_word(struct net_device *dev, int x,u16 y)
284{
285 writew(y,(u8*)dev->mem_start +x);
286 udelay(20);
287}
288
289#endif /* RTL_IO_MAP */
290
291
292
293
294
295inline void force_pci_posting(struct net_device *dev)
296{
297 read_nic_byte(dev,EPROM_CMD);
298#ifndef CONFIG_RTL8180_IO_MAP
299 mb();
300#endif
301}
302
303
304irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
305void set_nic_rxring(struct net_device *dev);
306void set_nic_txring(struct net_device *dev);
307static struct net_device_stats *rtl8180_stats(struct net_device *dev);
308void rtl8180_commit(struct net_device *dev);
309void rtl8180_start_tx_beacon(struct net_device *dev);
310
311/****************************************************************************
312 -----------------------------PROCFS STUFF-------------------------
313*****************************************************************************/
314
315static struct proc_dir_entry *rtl8180_proc = NULL;
316
317static int proc_get_registers(char *page, char **start,
318 off_t offset, int count,
319 int *eof, void *data)
320{
321 struct net_device *dev = data;
322// struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
323
324 int len = 0;
325 int i,n;
326
327 int max=0xff;
328
329 /* This dump the current register page */
330 for(n=0;n<=max;)
331 {
332 //printk( "\nD: %2x> ", n);
333 len += snprintf(page + len, count - len,
334 "\nD: %2x > ",n);
335
336 for(i=0;i<16 && n<=max;i++,n++)
337 len += snprintf(page + len, count - len,
338 "%2x ",read_nic_byte(dev,n));
339
340 // printk("%2x ",read_nic_byte(dev,n));
341 }
342 len += snprintf(page + len, count - len,"\n");
343
344
345
346 *eof = 1;
347 return len;
348
349}
350
351int get_curr_tx_free_desc(struct net_device *dev, int priority);
352
353static int proc_get_stats_hw(char *page, char **start,
354 off_t offset, int count,
355 int *eof, void *data)
356{
357 //struct net_device *dev = data;
358 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
359
360 int len = 0;
361#ifdef CONFIG_RTL8185B
362
363#else
364 len += snprintf(page + len, count - len,
365 "NIC int: %lu\n"
366 "Total int: %lu\n"
367 "--------------------\n"
368 "LP avail desc %d\n"
369 "NP avail desc %d\n"
370 "--------------------\n"
371 "LP phys dma addr %x\n"
372 "LP NIC ptr %x\n"
373 "LP virt 32base %x\n"
374 "LP virt 32tail %x\n"
375 "--------------------\n"
376 "NP phys dma addr %x\n"
377 "NP NIC ptr %x\n"
378 "NP virt 32base %x\n"
379 "NP virt 32tail %x\n"
380 "--------------------\n"
381 "BP phys dma addr %x\n"
382 "BP NIC ptr %x\n"
383 "BP virt 32base %x\n"
384 "BP virt 32tail %x\n",
385 priv->stats.ints,
386 priv->stats.shints,
387 get_curr_tx_free_desc(dev,LOW_PRIORITY),
388 get_curr_tx_free_desc(dev,NORM_PRIORITY),
389 (u32)priv->txvipringdma,
390 read_nic_dword(dev,TLPDA),
391 (u32)priv->txvipring,
392 (u32)priv->txvipringtail,
393 (u32)priv->txvopringdma,
394 read_nic_dword(dev,TNPDA),
395 (u32)priv->txvopring,
396 (u32)priv->txvopringtail,
397 (u32)priv->txbeaconringdma,
398 read_nic_dword(dev,TBDA),
399 (u32)priv->txbeaconring,
400 (u32)priv->txbeaconringtail);
401#endif
402 *eof = 1;
403 return len;
404}
405
406
407static int proc_get_stats_rx(char *page, char **start,
408 off_t offset, int count,
409 int *eof, void *data)
410{
411 struct net_device *dev = data;
412 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
413
414 int len = 0;
415
416 len += snprintf(page + len, count - len,
417 /* "RX descriptor not available: %lu\n"
418 "RX incomplete (missing last descriptor): %lu\n"
419 "RX not data: %lu\n"
420 //"RX descriptor pointer reset: %lu\n"
421 "RX descriptor pointer lost: %lu\n"
422 //"RX pointer workaround: %lu\n"
423 "RX error int: %lu\n"
424 "RX fifo overflow: %lu\n"
425 "RX int: %lu\n"
426 "RX packet: %lu\n"
427 "RX bytes: %lu\n"
428 "RX DMA fail: %lu\n",
429 priv->stats.rxrdu,
430 priv->stats.rxnolast,
431 priv->stats.rxnodata,
432 //priv->stats.rxreset,
433 priv->stats.rxnopointer,
434 //priv->stats.rxwrkaround,
435 priv->stats.rxerr,
436 priv->stats.rxoverflow,
437 priv->stats.rxint,
438 priv->ieee80211->stats.rx_packets,
439 priv->ieee80211->stats.rx_bytes,
440 priv->stats.rxdmafail */
441 "RX OK: %lu\n"
442 "RX Retry: %lu\n"
443 "RX CRC Error(0-500): %lu\n"
444 "RX CRC Error(500-1000): %lu\n"
445 "RX CRC Error(>1000): %lu\n"
446 "RX ICV Error: %lu\n",
447 priv->stats.rxint,
448 priv->stats.rxerr,
449 priv->stats.rxcrcerrmin,
450 priv->stats.rxcrcerrmid,
451 priv->stats.rxcrcerrmax,
452 priv->stats.rxicverr
453 );
454
455 *eof = 1;
456 return len;
457}
458
459#if 0
460static int proc_get_stats_ieee(char *page, char **start,
461 off_t offset, int count,
462 int *eof, void *data)
463{
464 struct net_device *dev = data;
465 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
466
467 int len = 0;
468
469 len += snprintf(page + len, count - len,
470 "TXed association requests: %u\n"
471 "TXed authentication requests: %u\n"
472 "RXed successful association response: %u\n"
473 "RXed failed association response: %u\n"
474 "RXed successful authentication response: %u\n"
475 "RXed failed authentication response: %u\n"
476 "Association requests without response: %u\n"
477 "Authentication requests without response: %u\n"
478 "TX probe response: %u\n"
479 "RX probe request: %u\n"
480 "TX probe request: %lu\n"
481 "RX authentication requests: %lu\n"
482 "RX association requests: %lu\n"
483 "Reassociations: %lu\n",
484 priv->ieee80211->ieee_stats.tx_ass,
485 priv->ieee80211->ieee_stats.tx_aut,
486 priv->ieee80211->ieee_stats.rx_ass_ok,
487 priv->ieee80211->ieee_stats.rx_ass_err,
488 priv->ieee80211->ieee_stats.rx_aut_ok,
489 priv->ieee80211->ieee_stats.rx_aut_err,
490 priv->ieee80211->ieee_stats.ass_noresp,
491 priv->ieee80211->ieee_stats.aut_noresp,
492 priv->ieee80211->ieee_stats.tx_probe,
493 priv->ieee80211->ieee_stats.rx_probe,
494 priv->ieee80211->ieee_stats.tx_probe_rq,
495 priv->ieee80211->ieee_stats.rx_auth_rq,
496 priv->ieee80211->ieee_stats.rx_assoc_rq,
497 priv->ieee80211->ieee_stats.reassoc);
498
499 *eof = 1;
500 return len;
501}
502#endif
503#if 0
504static int proc_get_stats_ap(char *page, char **start,
505 off_t offset, int count,
506 int *eof, void *data)
507{
508 struct net_device *dev = data;
509 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
510 struct mac_htable_t *list;
511 int i;
512 int len = 0;
513
514 if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
515 len += snprintf(page + len, count - len,
516 "Card is not acting as AP...\n"
517 );
518 }else{
519 len += snprintf(page + len, count - len,
520 "List of associated STA:\n"
521 );
522
523 for(i=0;i<MAC_HTABLE_ENTRY;i++)
524 for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
525 len += snprintf(page + len, count - len,
526 MACSTR"\n",MAC2STR(list->adr));
527 }
528
529 }
530 *eof = 1;
531 return len;
532}
533#endif
534
535static int proc_get_stats_tx(char *page, char **start,
536 off_t offset, int count,
537 int *eof, void *data)
538{
539 struct net_device *dev = data;
540 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
541
542 int len = 0;
543 unsigned long totalOK;
544
545 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
546 len += snprintf(page + len, count - len,
547 /* "TX normal priority ok int: %lu\n"
548 "TX normal priority error int: %lu\n"
549 "TX high priority ok int: %lu\n"
550 "TX high priority failed error int: %lu\n"
551 "TX low priority ok int: %lu\n"
552 "TX low priority failed error int: %lu\n"
553 "TX bytes: %lu\n"
554 "TX packets: %lu\n"
555 "TX queue resume: %lu\n"
556 "TX queue stopped?: %d\n"
557 "TX fifo overflow: %lu\n"
558 //"SW TX stop: %lu\n"
559 //"SW TX wake: %lu\n"
560 "TX beacon: %lu\n"
561 "TX beacon aborted: %lu\n",
562 priv->stats.txnpokint,
563 priv->stats.txnperr,
564 priv->stats.txhpokint,
565 priv->stats.txhperr,
566 priv->stats.txlpokint,
567 priv->stats.txlperr,
568 priv->ieee80211->stats.tx_bytes,
569 priv->ieee80211->stats.tx_packets,
570 priv->stats.txresumed,
571 netif_queue_stopped(dev),
572 priv->stats.txoverflow,
573 //priv->ieee80211->ieee_stats.swtxstop,
574 //priv->ieee80211->ieee_stats.swtxawake,
575 priv->stats.txbeacon,
576 priv->stats.txbeaconerr */
577 "TX OK: %lu\n"
578 "TX Error: %lu\n"
579 "TX Retry: %lu\n"
580 "TX beacon OK: %lu\n"
581 "TX beacon error: %lu\n",
582 totalOK,
583 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
584 priv->stats.txretry,
585 priv->stats.txbeacon,
586 priv->stats.txbeaconerr
587 );
588
589 *eof = 1;
590 return len;
591}
592
593
594#if WIRELESS_EXT < 17
595static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
596{
597 struct r8180_priv *priv = ieee80211_priv(dev);
598
599 return &priv->wstats;
600}
601#endif
602void rtl8180_proc_module_init(void)
603{
604 DMESG("Initializing proc filesystem");
605#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
606 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, proc_net);
607#else
608 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
609#endif
610}
611
612
613void rtl8180_proc_module_remove(void)
614{
615#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
616 remove_proc_entry(RTL8180_MODULE_NAME, proc_net);
617#else
618 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
619#endif
620}
621
622
623void rtl8180_proc_remove_one(struct net_device *dev)
624{
625 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
626 if (priv->dir_dev) {
627 remove_proc_entry("stats-hw", priv->dir_dev);
628 remove_proc_entry("stats-tx", priv->dir_dev);
629 remove_proc_entry("stats-rx", priv->dir_dev);
630// remove_proc_entry("stats-ieee", priv->dir_dev);
631// remove_proc_entry("stats-ap", priv->dir_dev);
632 remove_proc_entry("registers", priv->dir_dev);
633 remove_proc_entry(dev->name, rtl8180_proc);
634 priv->dir_dev = NULL;
635 }
636}
637
638
639void rtl8180_proc_init_one(struct net_device *dev)
640{
641 struct proc_dir_entry *e;
642 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
be286fd2 643 priv->dir_dev = rtl8180_proc;
c8d86be3 644 if (!priv->dir_dev) {
be286fd2 645 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
c8d86be3
GKH		 646 dev->name);
647 return;
648 }
649
650 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
651 priv->dir_dev, proc_get_stats_hw, dev);
652
653 if (!e) {
654 DMESGE("Unable to initialize "
be286fd2 655 "/proc/net/r8180/%s/stats-hw\n",
c8d86be3
GKH		 656 dev->name);
657 }
658
659 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
660 priv->dir_dev, proc_get_stats_rx, dev);
661
662 if (!e) {
663 DMESGE("Unable to initialize "
be286fd2 664 "/proc/net/r8180/%s/stats-rx\n",
c8d86be3
GKH		 665 dev->name);
666 }
667
668
669 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
670 priv->dir_dev, proc_get_stats_tx, dev);
671
672 if (!e) {
673 DMESGE("Unable to initialize "
be286fd2 674 "/proc/net/r8180/%s/stats-tx\n",
c8d86be3
GKH		 675 dev->name);
676 }
677 #if 0
678 e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
679 priv->dir_dev, proc_get_stats_ieee, dev);
680
681 if (!e) {
682 DMESGE("Unable to initialize "
683 "/proc/net/rtl8180/%s/stats-ieee\n",
684 dev->name);
685 }
686 #endif
687 #if 0
688 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
689 priv->dir_dev, proc_get_stats_ap, dev);
690
691 if (!e) {
692 DMESGE("Unable to initialize "
693 "/proc/net/rtl8180/%s/stats-ap\n",
694 dev->name);
695 }
696 #endif
697
698 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
699 priv->dir_dev, proc_get_registers, dev);
700
701 if (!e) {
702 DMESGE("Unable to initialize "
be286fd2 703 "/proc/net/r8180/%s/registers\n",
c8d86be3
GKH		 704 dev->name);
705 }
706}
707/****************************************************************************
708 -----------------------------MISC STUFF-------------------------
709*****************************************************************************/
710/*
711 FIXME: check if we can use some standard already-existent
712 data type+functions in kernel
713*/
714
715short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
716 struct buffer **bufferhead)
717{
718#ifdef DEBUG_RING
719 DMESG("adding buffer to TX/RX struct");
720#endif
721
722 struct buffer *tmp;
723
724 if(! *buffer){
725
726 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
727
728 if (*buffer == NULL) {
729 DMESGE("Failed to kmalloc head of TX/RX struct");
730 return -1;
731 }
732 (*buffer)->next=*buffer;
733 (*buffer)->buf=buf;
734 (*buffer)->dma=dma;
735 if(bufferhead !=NULL)
736 (*bufferhead) = (*buffer);
737 return 0;
738 }
739 tmp=*buffer;
740
741 while(tmp->next!=(*buffer)) tmp=tmp->next;
742 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
743 DMESGE("Failed to kmalloc TX/RX struct");
744 return -1;
745 }
746 tmp->next->buf=buf;
747 tmp->next->dma=dma;
748 tmp->next->next=*buffer;
749
750 return 0;
751}
752
753
754void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
755consistent)
756{
757
758 struct buffer *tmp,*next;
759 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
760 struct pci_dev *pdev=priv->pdev;
761 //int i;
762
763 if(! *buffer) return;
764
765 /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
766
767 */
768 tmp=*buffer;
769 do{
770 next=tmp->next;
771 if(consistent){
772 pci_free_consistent(pdev,len,
773 tmp->buf,tmp->dma);
774 }else{
775 pci_unmap_single(pdev, tmp->dma,
776 len,PCI_DMA_FROMDEVICE);
777 kfree(tmp->buf);
778 }
779 kfree(tmp);
780 tmp = next;
781 }
782 while(next != *buffer);
783
784 *buffer=NULL;
785}
786
787
788void print_buffer(u32 *buffer, int len)
789{
790 int i;
791 u8 *buf =(u8*)buffer;
792
793 printk("ASCII BUFFER DUMP (len: %x):\n",len);
794
795 for(i=0;i<len;i++)
796 printk("%c",buf[i]);
797
798 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
799
800 for(i=0;i<len;i++)
801 printk("%02x",buf[i]);
802
803 printk("\n");
804}
805
806
807int get_curr_tx_free_desc(struct net_device *dev, int priority)
808{
809 struct r8180_priv *priv = ieee80211_priv(dev);
810 u32* tail;
811 u32* head;
812 int ret;
813
814 switch (priority){
815 case MANAGE_PRIORITY:
816 head = priv->txmapringhead;
817 tail = priv->txmapringtail;
818 break;
819 case BK_PRIORITY:
820 head = priv->txbkpringhead;
821 tail = priv->txbkpringtail;
822 break;
823 case BE_PRIORITY:
824 head = priv->txbepringhead;
825 tail = priv->txbepringtail;
826 break;
827 case VI_PRIORITY:
828 head = priv->txvipringhead;
829 tail = priv->txvipringtail;
830 break;
831 case VO_PRIORITY:
832 head = priv->txvopringhead;
833 tail = priv->txvopringtail;
834 break;
835 case HI_PRIORITY:
836 head = priv->txhpringhead;
837 tail = priv->txhpringtail;
838 break;
839 default:
840 return -1;
841 }
842
843 //DMESG("%x %x", head, tail);
844
845 /* FIXME FIXME FIXME FIXME */
846
847#if 0
848 if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
849 return (head - tail)/8/4;
850#else
851 if( head <= tail )
852 ret = priv->txringcount - (tail - head)/8;
853 else
854 ret = (head - tail)/8;
855
856 if(ret > priv->txringcount ) DMESG("BUG");
857 return ret;
858#endif
859}
860
861
862short check_nic_enought_desc(struct net_device *dev, int priority)
863{
864 struct r8180_priv *priv = ieee80211_priv(dev);
865 struct ieee80211_device *ieee = netdev_priv(dev);
866
867 int requiredbyte, required;
868 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
869
870 if(ieee->current_network.QoS_Enable) {
871 requiredbyte += 2;
872 };
873
874 required = requiredbyte / (priv->txbuffsize-4);
875 if (requiredbyte % priv->txbuffsize) required++;
876 /* for now we keep two free descriptor as a safety boundary
877 * between the tail and the head
878 */
879
880 return (required+2 < get_curr_tx_free_desc(dev,priority));
881}
882
883
884/* This function is only for debuging purpose */
885void check_tx_ring(struct net_device *dev, int pri)
886{
887 static int maxlog =3;
888 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
889 u32* tmp;
890 struct buffer *buf;
891 int i;
892 int nic;
893 u32* tail;
894 u32* head;
895 u32* begin;
896 u32 nicbegin;
897 struct buffer* buffer;
898
899 maxlog --;
900 if (maxlog <0 ) return;
901
902 switch(pri) {
903 case MANAGE_PRIORITY:
904 tail = priv->txmapringtail;
905 begin = priv->txmapring;
906 head = priv->txmapringhead;
907 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
908 buffer = priv->txmapbufs;
909 nicbegin = priv->txmapringdma;
910 break;
911
912
913 case BK_PRIORITY:
914 tail = priv->txbkpringtail;
915 begin = priv->txbkpring;
916 head = priv->txbkpringhead;
917 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
918 buffer = priv->txbkpbufs;
919 nicbegin = priv->txbkpringdma;
920 break;
921
922 case BE_PRIORITY:
923 tail = priv->txbepringtail;
924 begin = priv->txbepring;
925 head = priv->txbepringhead;
926 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
927 buffer = priv->txbepbufs;
928 nicbegin = priv->txbepringdma;
929 break;
930
931 case VI_PRIORITY:
932 tail = priv->txvipringtail;
933 begin = priv->txvipring;
934 head = priv->txvipringhead;
935 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
936 buffer = priv->txvipbufs;
937 nicbegin = priv->txvipringdma;
938 break;
939
940
941 case VO_PRIORITY:
942 tail = priv->txvopringtail;
943 begin = priv->txvopring;
944 head = priv->txvopringhead;
945 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
946 buffer = priv->txvopbufs;
947 nicbegin = priv->txvopringdma;
948 break;
949
950 case HI_PRIORITY:
951 tail = priv->txhpringtail;
952 begin = priv->txhpring;
953 head = priv->txhpringhead;
954 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
955 buffer = priv->txhpbufs;
956 nicbegin = priv->txhpringdma;
957 break;
958
959 default:
960 return ;
961 break;
962 }
963
964 if(!priv->txvopbufs)
965 DMESGE ("NIC TX ack, but TX queue corrupted!");
966 else{
967
968 for(i=0,buf=buffer, tmp=begin;
969 tmp<begin+(priv->txringcount)*8;
970 tmp+=8,buf=buf->next,i++)
971
972 DMESG("BUF%d %s %x %s. Next : %x",i,
973 *tmp & (1<<31) ? "filled" : "empty",
974 *(buf->buf),
975 *tmp & (1<<15)? "ok": "err", *(tmp+4));
976 }
977
c8d86be3
GKH		 978 return;
979}
980
981
982
983/* this function is only for debugging purpose */
984void check_rxbuf(struct net_device *dev)
985{
986 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
987 u32* tmp;
988 struct buffer *buf;
989 u8 rx_desc_size;
990
991#ifdef CONFIG_RTL8185B
992 rx_desc_size = 8;
993#else
994 rx_desc_size = 4;
995#endif
996
997 if(!priv->rxbuffer)
998 DMESGE ("NIC RX ack, but RX queue corrupted!");
999
1000 else{
1001
1002 for(buf=priv->rxbuffer, tmp=priv->rxring;
1003 tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
1004 tmp+=rx_desc_size, buf=buf->next)
1005
1006 DMESG("BUF %s %x",
1007 *tmp & (1<<31) ? "empty" : "filled",
1008 *(buf->buf));
1009 }
1010
1011 return;
1012}
1013
1014
1015void dump_eprom(struct net_device *dev)
1016{
1017 int i;
1018 for(i=0; i<63; i++)
1019 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
1020}
1021
1022
1023void rtl8180_dump_reg(struct net_device *dev)
1024{
1025 int i;
1026 int n;
1027 int max=0xff;
1028
1029 DMESG("Dumping NIC register map");
1030
1031 for(n=0;n<=max;)
1032 {
1033 printk( "\nD: %2x> ", n);
1034 for(i=0;i<16 && n<=max;i++,n++)
1035 printk("%2x ",read_nic_byte(dev,n));
1036 }
1037 printk("\n");
1038}
1039
1040
1041void fix_tx_fifo(struct net_device *dev)
1042{
1043 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1044 u32 *tmp;
1045 int i;
1046#ifdef DEBUG_TX_ALLOC
1047 DMESG("FIXING TX FIFOs");
1048#endif
1049 for (tmp=priv->txmapring, i=0;
1050 i < priv->txringcount;
1051 tmp+=8, i++){
1052 *tmp = *tmp &~ (1<<31);
1053 }
1054
1055 for (tmp=priv->txbkpring, i=0;
1056 i < priv->txringcount;
1057 tmp+=8, i++) {
1058 *tmp = *tmp &~ (1<<31);
1059 }
1060
1061 for (tmp=priv->txbepring, i=0;
1062 i < priv->txringcount;
1063 tmp+=8, i++){
1064 *tmp = *tmp &~ (1<<31);
1065 }
1066 for (tmp=priv->txvipring, i=0;
1067 i < priv->txringcount;
1068 tmp+=8, i++) {
1069 *tmp = *tmp &~ (1<<31);
1070 }
1071
1072 for (tmp=priv->txvopring, i=0;
1073 i < priv->txringcount;
1074 tmp+=8, i++){
1075 *tmp = *tmp &~ (1<<31);
1076 }
1077
1078 for (tmp=priv->txhpring, i=0;
1079 i < priv->txringcount;
1080 tmp+=8,i++){
1081 *tmp = *tmp &~ (1<<31);
1082 }
1083
1084 for (tmp=priv->txbeaconring, i=0;
1085 i < priv->txbeaconcount;
1086 tmp+=8, i++){
1087 *tmp = *tmp &~ (1<<31);
1088 }
1089#ifdef DEBUG_TX_ALLOC
1090 DMESG("TX FIFOs FIXED");
1091#endif
1092 priv->txmapringtail = priv->txmapring;
1093 priv->txmapringhead = priv->txmapring;
1094 priv->txmapbufstail = priv->txmapbufs;
1095
1096 priv->txbkpringtail = priv->txbkpring;
1097 priv->txbkpringhead = priv->txbkpring;
1098 priv->txbkpbufstail = priv->txbkpbufs;
1099
1100 priv->txbepringtail = priv->txbepring;
1101 priv->txbepringhead = priv->txbepring;
1102 priv->txbepbufstail = priv->txbepbufs;
1103
1104 priv->txvipringtail = priv->txvipring;
1105 priv->txvipringhead = priv->txvipring;
1106 priv->txvipbufstail = priv->txvipbufs;
1107
1108 priv->txvopringtail = priv->txvopring;
1109 priv->txvopringhead = priv->txvopring;
1110 priv->txvopbufstail = priv->txvopbufs;
1111
1112 priv->txhpringtail = priv->txhpring;
1113 priv->txhpringhead = priv->txhpring;
1114 priv->txhpbufstail = priv->txhpbufs;
1115
1116 priv->txbeaconringtail = priv->txbeaconring;
1117 priv->txbeaconbufstail = priv->txbeaconbufs;
1118 set_nic_txring(dev);
1119
1120 ieee80211_reset_queue(priv->ieee80211);
1121 priv->ack_tx_to_ieee = 0;
1122}
1123
1124
1125void fix_rx_fifo(struct net_device *dev)
1126{
1127 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1128 u32 *tmp;
1129 struct buffer *rxbuf;
1130 u8 rx_desc_size;
1131
1132#ifdef CONFIG_RTL8185B
1133 rx_desc_size = 8; // 4*8 = 32 bytes
1134#else
1135 rx_desc_size = 4;
1136#endif
1137
1138#ifdef DEBUG_RXALLOC
1139 DMESG("FIXING RX FIFO");
1140 check_rxbuf(dev);
1141#endif
1142
1143 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1144 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1145 tmp+=rx_desc_size,rxbuf=rxbuf->next){
1146 *(tmp+2) = rxbuf->dma;
1147 *tmp=*tmp &~ 0xfff;
1148 *tmp=*tmp | priv->rxbuffersize;
1149 *tmp |= (1<<31);
1150 }
1151
1152#ifdef DEBUG_RXALLOC
1153 DMESG("RX FIFO FIXED");
1154 check_rxbuf(dev);
1155#endif
1156
1157 priv->rxringtail=priv->rxring;
1158 priv->rxbuffer=priv->rxbufferhead;
1159 priv->rx_skb_complete=1;
1160 set_nic_rxring(dev);
1161}
1162
1163
1164/****************************************************************************
1165 ------------------------------HW STUFF---------------------------
1166*****************************************************************************/
1167
1168unsigned char QUALITY_MAP[] = {
1169 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1170 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1171 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1172 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1173 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1174 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1175 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1176 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1177 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1178 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1179};
1180
1181unsigned char STRENGTH_MAP[] = {
1182 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1183 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1184 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1185 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1186 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1187 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1188 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1189 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1190 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1191 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1192};
1193
1194void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1195 //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1196 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1197 u32 temp;
1198 u32 temp2;
1199 u32 temp3;
1200 u32 lsb;
1201 u32 q;
1202 u32 orig_qual;
1203 u8 _rssi;
1204
1205 q = *qual;
1206 orig_qual = *qual;
1207 _rssi = 0; // avoid gcc complains..
1208
1209 if (q <= 0x4e) {
1210 temp = QUALITY_MAP[q];
1211 } else {
1212 if( q & 0x80 ) {
1213 temp = 0x32;
1214 } else {
1215 temp = 1;
1216 }
1217 }
1218
1219 *qual = temp;
1220 temp2 = *rssi;
1221
1222 switch(priv->rf_chip){
1223 case RFCHIPID_RFMD:
1224 lsb = temp2 & 1;
1225 temp2 &= 0x7e;
1226 if ( !lsb || !(temp2 <= 0x3c) ) {
1227 temp2 = 0x64;
1228 } else {
1229 temp2 = 100 * temp2 / 0x3c;
1230 }
1231 *rssi = temp2 & 0xff;
1232 _rssi = temp2 & 0xff;
1233 break;
1234 case RFCHIPID_INTERSIL:
1235 lsb = temp2;
1236 temp2 &= 0xfffffffe;
1237 temp2 *= 251;
1238 temp3 = temp2;
1239 temp2 <<= 6;
1240 temp3 += temp2;
1241 temp3 <<= 1;
1242 temp2 = 0x4950df;
1243 temp2 -= temp3;
1244 lsb &= 1;
1245 if ( temp2 <= 0x3e0000 ) {
1246 if ( temp2 < 0xffef0000 )
1247 temp2 = 0xffef0000;
1248 } else {
1249 temp2 = 0x3e0000;
1250 }
1251 if ( !lsb ) {
1252 temp2 -= 0xf0000;
1253 } else {
1254 temp2 += 0xf0000;
1255 }
1256
1257 temp3 = 0x4d0000;
1258 temp3 -= temp2;
1259 temp3 *= 100;
1260 temp3 = temp3 / 0x6d;
1261 temp3 >>= 0x10;
1262 _rssi = temp3 & 0xff;
1263 *rssi = temp3 & 0xff;
1264 break;
1265 case RFCHIPID_GCT:
1266 lsb = temp2 & 1;
1267 temp2 &= 0x7e;
1268 if ( ! lsb || !(temp2 <= 0x3c) ){
1269 temp2 = 0x64;
1270 } else {
1271 temp2 = (100 * temp2) / 0x3c;
1272 }
1273 *rssi = temp2 & 0xff;
1274 _rssi = temp2 & 0xff;
1275 break;
1276 case RFCHIPID_PHILIPS:
1277 if( orig_qual <= 0x4e ){
1278 _rssi = STRENGTH_MAP[orig_qual];
1279 *rssi = _rssi;
1280 } else {
1281 orig_qual -= 0x80;
1282 if ( !orig_qual ){
1283 _rssi = 1;
1284 *rssi = 1;
1285 } else {
1286 _rssi = 0x32;
1287 *rssi = 0x32;
1288 }
1289 }
1290 break;
1291
1292 /* case 4 */
1293 case RFCHIPID_MAXIM:
1294 lsb = temp2 & 1;
1295 temp2 &= 0x7e;
1296 temp2 >>= 1;
1297 temp2 += 0x42;
1298 if( lsb != 0 ){
1299 temp2 += 0xa;
1300 }
1301 *rssi = temp2 & 0xff;
1302 _rssi = temp2 & 0xff;
1303 break;
1304 }
1305
1306 if ( _rssi < 0x64 ){
1307 if ( _rssi == 0 ) {
1308 *rssi = 1;
1309 }
1310 } else {
1311 *rssi = 0x64;
1312 }
1313
1314 return;
1315}
1316
1317
1318void rtl8180_irq_enable(struct net_device *dev)
1319{
1320 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1321 priv->irq_enabled = 1;
1322/*
1323 write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1324 INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1325 INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1326 INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1327*/
1328 write_nic_word(dev,INTA_MASK, priv->irq_mask);
1329}
1330
1331
1332void rtl8180_irq_disable(struct net_device *dev)
1333{
1334 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1335
1336#ifdef CONFIG_RTL8185B
1337 write_nic_dword(dev,IMR,0);
1338#else
1339 write_nic_word(dev,INTA_MASK,0);
1340#endif
1341 force_pci_posting(dev);
1342 priv->irq_enabled = 0;
1343}
1344
1345
1346void rtl8180_set_mode(struct net_device *dev,int mode)
1347{
1348 u8 ecmd;
1349 ecmd=read_nic_byte(dev, EPROM_CMD);
1350 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1351 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1352 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1353 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1354 write_nic_byte(dev, EPROM_CMD, ecmd);
1355}
1356
1357void rtl8180_adapter_start(struct net_device *dev);
1358void rtl8180_beacon_tx_enable(struct net_device *dev);
1359
1360void rtl8180_update_msr(struct net_device *dev)
1361{
1362 struct r8180_priv *priv = ieee80211_priv(dev);
1363 u8 msr;
1364 u32 rxconf;
1365
1366 msr = read_nic_byte(dev, MSR);
1367 msr &= ~ MSR_LINK_MASK;
1368
1369 rxconf=read_nic_dword(dev,RX_CONF);
1370
1371 if(priv->ieee80211->state == IEEE80211_LINKED)
1372 {
1373 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1374 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1375 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1376 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1377 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1378 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1379 else
1380 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1381 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1382
1383 }else {
1384 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1385 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1386 }
1387
1388 write_nic_byte(dev, MSR, msr);
1389 write_nic_dword(dev, RX_CONF, rxconf);
1390
1391}
1392
1393
1394
1395void rtl8180_set_chan(struct net_device *dev,short ch)
1396{
1397 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1398
1399 if((ch > 14) || (ch < 1))
1400 {
d599edca 1401 printk("In %s: Invalid chnanel %d\n", __func__, ch);
c8d86be3
GKH		 1402 return;
1403 }
1404
1405 priv->chan=ch;
d599edca 1406 //printk("in %s:channel is %d\n",__func__,ch);
c8d86be3
GKH		 1407 priv->rf_set_chan(dev,priv->chan);
1408
1409}
1410
1411
1412void rtl8180_rx_enable(struct net_device *dev)
1413{
1414 u8 cmd;
1415 u32 rxconf;
1416 /* for now we accept data, management & ctl frame*/
1417 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1418
1419 rxconf=read_nic_dword(dev,RX_CONF);
1420 rxconf = rxconf &~ MAC_FILTER_MASK;
1421 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1422 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1423 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1424 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1425// rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1426 if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1427
1428 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1429 dev->flags & IFF_PROMISC){
1430 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1431 }else{
1432 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1433 if(priv->card_8185 == 0)
1434 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1435 }
1436
1437 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1438 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1439 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1440 }*/
1441
1442 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1443 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1444 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1445 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1446 }
1447
1448 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1449 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1450
1451 //if(!priv->card_8185){
1452 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1453 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1454 //}
1455
1456 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1457 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1458 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1459
1460 //if(!priv->card_8185)
1461 rxconf = rxconf | RCR_ONLYERLPKT;
1462
1463 rxconf = rxconf &~ RCR_CS_MASK;
1464 if(!priv->card_8185)
1465 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1466// rxconf &=~ 0xfff00000;
1467// rxconf |= 0x90100000;//9014f76f;
1468 write_nic_dword(dev, RX_CONF, rxconf);
1469
1470 fix_rx_fifo(dev);
1471
1472#ifdef DEBUG_RX
1473 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1474#endif
1475 cmd=read_nic_byte(dev,CMD);
1476 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1477
1478 /* In rtl8139 driver seems that DMA threshold has to be written
1479 * after enabling RX, so we rewrite RX_CONFIG register
1480 */
1481 //mdelay(100);
1482// write_nic_dword(dev, RX_CONF, rxconf);
1483
1484}
1485
1486
1487void set_nic_txring(struct net_device *dev)
1488{
1489 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1490// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1491
1492 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1493// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1494 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1495// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1496 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1497// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1498 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1499// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1500 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1501// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1502 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1503// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1504
1505 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1506}
1507
1508
1509void rtl8180_conttx_enable(struct net_device *dev)
1510{
1511 u32 txconf;
1512 txconf = read_nic_dword(dev,TX_CONF);
1513 txconf = txconf &~ TX_LOOPBACK_MASK;
1514 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1515 write_nic_dword(dev,TX_CONF,txconf);
1516}
1517
1518
1519void rtl8180_conttx_disable(struct net_device *dev)
1520{
1521 u32 txconf;
1522 txconf = read_nic_dword(dev,TX_CONF);
1523 txconf = txconf &~ TX_LOOPBACK_MASK;
1524 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1525 write_nic_dword(dev,TX_CONF,txconf);
1526}
1527
1528
1529void rtl8180_tx_enable(struct net_device *dev)
1530{
1531 u8 cmd;
1532 u8 tx_agc_ctl;
1533 u8 byte;
1534 u32 txconf;
1535 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1536 txconf= read_nic_dword(dev,TX_CONF);
1537
1538
1539 if(priv->card_8185){
1540
1541
1542 byte = read_nic_byte(dev,CW_CONF);
1543 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1544 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1545 write_nic_byte(dev, CW_CONF, byte);
1546
1547 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1548 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1549 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1550 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1551 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1552 /*
1553 write_nic_word(dev, 0x5e, 0x01);
1554 force_pci_posting(dev);
1555 mdelay(1);
1556 write_nic_word(dev, 0xfe, 0x10);
1557 force_pci_posting(dev);
1558 mdelay(1);
1559 write_nic_word(dev, 0x5e, 0x00);
1560 force_pci_posting(dev);
1561 mdelay(1);
1562 */
1563 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1564 }
1565
1566 if(priv->card_8185){
1567
1568 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1569
1570 }else{
1571
1572 if(hwseqnum)
1573 txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1574 else
1575 txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1576 }
1577
1578 txconf = txconf &~ TX_LOOPBACK_MASK;
1579 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1580 txconf = txconf &~ TCR_DPRETRY_MASK;
1581 txconf = txconf &~ TCR_RTSRETRY_MASK;
1582 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1583 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1584 txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1585
1586 if(priv->card_8185){
1587 if(priv->hw_plcp_len)
1588 txconf = txconf &~ TCR_PLCP_LEN;
1589 else
1590 txconf = txconf | TCR_PLCP_LEN;
1591 }else{
1592 txconf = txconf &~ TCR_SAT;
1593 }
1594 txconf = txconf &~ TCR_MXDMA_MASK;
1595 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1596 txconf = txconf | TCR_CWMIN;
1597 txconf = txconf | TCR_DISCW;
1598
1599// if(priv->ieee80211->hw_wep)
1600// txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1601// else
1602 txconf=txconf | (1<<TX_NOICV_SHIFT);
1603
1604 write_nic_dword(dev,TX_CONF,txconf);
1605
1606
1607 fix_tx_fifo(dev);
1608
1609#ifdef DEBUG_TX
1610 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1611#endif
1612
1613 cmd=read_nic_byte(dev,CMD);
1614 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1615
1616// mdelay(100);
1617 write_nic_dword(dev,TX_CONF,txconf);
1618// #endif
1619/*
1620 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1621 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1622 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1623 */
1624}
1625
1626
1627void rtl8180_beacon_tx_enable(struct net_device *dev)
1628{
1629 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1630
1631 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1632#ifdef CONFIG_RTL8185B
1633 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1634 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1635#else
1636 priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1637 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1638#endif
1639 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1640}
1641
1642
1643void rtl8180_beacon_tx_disable(struct net_device *dev)
1644{
1645 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1646
1647 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1648#ifdef CONFIG_RTL8185B
1649 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1650 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1651#else
1652 priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1653 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1654#endif
1655 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1656
1657}
1658
1659
1660void rtl8180_rtx_disable(struct net_device *dev)
1661{
1662 u8 cmd;
1663 struct r8180_priv *priv = ieee80211_priv(dev);
1664
1665 cmd=read_nic_byte(dev,CMD);
1666 write_nic_byte(dev, CMD, cmd &~ \
1667 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1668 force_pci_posting(dev);
1669 mdelay(10);
1670 /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1671 udelay(10);
1672 */
1673
1674 if(!priv->rx_skb_complete)
1675 dev_kfree_skb_any(priv->rx_skb);
1676}
1677
1678#if 0
1679int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1680{
1681 int i;
1682 u32 *tmp;
1683 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1684
1685 priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1686 sizeof(u32)*8*count,
1687 &priv->txbeaconringdma);
1688 if (!priv->txbeaconring) return -1;
1689 for (tmp=priv->txbeaconring,i=0;i<count;i++){
1690 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1691 /*
1692 *(tmp+2) = (u32)dma_tmp;
1693 *(tmp+3) = bufsize;
1694 */
1695 if(i+1<count)
1696 *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1697 else
1698 *(tmp+4) = (u32)priv->txbeaconringdma;
1699
1700 tmp=tmp+8;
1701 }
1702 return 0;
1703}
1704#endif
1705
1706short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1707 int addr)
1708{
1709 int i;
1710 u32 *desc;
1711 u32 *tmp;
1712 dma_addr_t dma_desc, dma_tmp;
1713 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1714 struct pci_dev *pdev = priv->pdev;
1715 void *buf;
1716
1717 if((bufsize & 0xfff) != bufsize) {
1718 DMESGE ("TX buffer allocation too large");
1719 return 0;
1720 }
1721 desc = (u32*)pci_alloc_consistent(pdev,
1722 sizeof(u32)*8*count+256, &dma_desc);
1723 if(desc==NULL) return -1;
1724 if(dma_desc & 0xff){
1725
1726 /*
1727 * descriptor's buffer must be 256 byte aligned
1728 * we shouldn't be here, since we set DMA mask !
1729 */
be286fd2 1730 WARN(1, "DMA buffer is not aligned\n");
c8d86be3
GKH		 1731 }
1732 tmp=desc;
1733 for (i=0;i<count;i++)
1734 {
1735 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1736 if (buf == NULL) return -ENOMEM;
1737
1738 switch(addr) {
1739#if 0
1740 case TX_NORMPRIORITY_RING_ADDR:
1741 if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1742 DMESGE("Unable to allocate mem for buffer NP");
1743 return -ENOMEM;
1744 }
1745 break;
1746
1747 case TX_LOWPRIORITY_RING_ADDR:
1748 if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1749 DMESGE("Unable to allocate mem for buffer LP");
1750 return -ENOMEM;
1751 }
1752 break;
1753
1754 case TX_HIGHPRIORITY_RING_ADDR:
1755 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1756 DMESGE("Unable to allocate mem for buffer HP");
1757 return -ENOMEM;
1758 }
1759 break;
1760#else
1761 case TX_MANAGEPRIORITY_RING_ADDR:
1762 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1763 DMESGE("Unable to allocate mem for buffer NP");
1764 return -ENOMEM;
1765 }
1766 break;
1767
1768 case TX_BKPRIORITY_RING_ADDR:
1769 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1770 DMESGE("Unable to allocate mem for buffer LP");
1771 return -ENOMEM;
1772 }
1773 break;
1774 case TX_BEPRIORITY_RING_ADDR:
1775 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1776 DMESGE("Unable to allocate mem for buffer NP");
1777 return -ENOMEM;
1778 }
1779 break;
1780
1781 case TX_VIPRIORITY_RING_ADDR:
1782 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1783 DMESGE("Unable to allocate mem for buffer LP");
1784 return -ENOMEM;
1785 }
1786 break;
1787 case TX_VOPRIORITY_RING_ADDR:
1788 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1789 DMESGE("Unable to allocate mem for buffer NP");
1790 return -ENOMEM;
1791 }
1792 break;
1793#endif
1794 case TX_HIGHPRIORITY_RING_ADDR:
1795 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1796 DMESGE("Unable to allocate mem for buffer HP");
1797 return -ENOMEM;
1798 }
1799 break;
1800 case TX_BEACON_RING_ADDR:
1801 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1802 DMESGE("Unable to allocate mem for buffer BP");
1803 return -ENOMEM;
1804 }
1805 break;
1806 }
1807 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1808 *(tmp+2) = (u32)dma_tmp;
1809 *(tmp+3) = bufsize;
1810
1811 if(i+1<count)
1812 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1813 else
1814 *(tmp+4) = (u32)dma_desc;
1815
1816 tmp=tmp+8;
1817 }
1818
1819 switch(addr) {
1820 case TX_MANAGEPRIORITY_RING_ADDR:
1821 priv->txmapringdma=dma_desc;
1822 priv->txmapring=desc;
1823 break;
1824
1825 case TX_BKPRIORITY_RING_ADDR:
1826 priv->txbkpringdma=dma_desc;
1827 priv->txbkpring=desc;
1828 break;
1829
1830 case TX_BEPRIORITY_RING_ADDR:
1831 priv->txbepringdma=dma_desc;
1832 priv->txbepring=desc;
1833 break;
1834
1835 case TX_VIPRIORITY_RING_ADDR:
1836 priv->txvipringdma=dma_desc;
1837 priv->txvipring=desc;
1838 break;
1839
1840 case TX_VOPRIORITY_RING_ADDR:
1841 priv->txvopringdma=dma_desc;
1842 priv->txvopring=desc;
1843 break;
1844
1845 case TX_HIGHPRIORITY_RING_ADDR:
1846 priv->txhpringdma=dma_desc;
1847 priv->txhpring=desc;
1848 break;
1849
1850 case TX_BEACON_RING_ADDR:
1851 priv->txbeaconringdma=dma_desc;
1852 priv->txbeaconring=desc;
1853 break;
1854
1855 }
1856
1857#ifdef DEBUG_TX
1858 DMESG("Tx dma physical address: %x",dma_desc);
1859#endif
1860
1861 return 0;
1862}
1863
1864
1865void free_tx_desc_rings(struct net_device *dev)
1866{
1867
1868 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1869 struct pci_dev *pdev=priv->pdev;
1870 int count = priv->txringcount;
1871
1872 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1873 priv->txmapring, priv->txmapringdma);
1874 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1875
1876 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1877 priv->txbkpring, priv->txbkpringdma);
1878 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1879
1880 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1881 priv->txbepring, priv->txbepringdma);
1882 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1883
1884 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1885 priv->txvipring, priv->txvipringdma);
1886 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1887
1888 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1889 priv->txvopring, priv->txvopringdma);
1890 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1891
1892 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1893 priv->txhpring, priv->txhpringdma);
1894 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1895
1896 count = priv->txbeaconcount;
1897 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1898 priv->txbeaconring, priv->txbeaconringdma);
1899 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1900}
1901
1902#if 0
1903void free_beacon_desc_ring(struct net_device *dev,int count)
1904{
1905
1906 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1907 struct pci_dev *pdev=priv->pdev;
1908
1909 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1910 priv->txbeaconring, priv->txbeaconringdma);
1911
1912 if (priv->beacon_buf)
1913 pci_free_consistent(priv->pdev,
1914 priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1915
1916}
1917#endif
1918void free_rx_desc_ring(struct net_device *dev)
1919{
1920 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1921 struct pci_dev *pdev = priv->pdev;
1922
1923 int count = priv->rxringcount;
1924
1925#ifdef CONFIG_RTL8185B
1926 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1927 priv->rxring, priv->rxringdma);
1928#else
1929 pci_free_consistent(pdev, sizeof(u32)*4*count+256,
1930 priv->rxring, priv->rxringdma);
1931#endif
1932
1933 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1934}
1935
1936
1937short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1938{
1939 int i;
1940 u32 *desc;
1941 u32 *tmp;
1942 dma_addr_t dma_desc,dma_tmp;
1943 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1944 struct pci_dev *pdev=priv->pdev;
1945 void *buf;
1946 u8 rx_desc_size;
1947
1948#ifdef CONFIG_RTL8185B
1949 rx_desc_size = 8; // 4*8 = 32 bytes
1950#else
1951 rx_desc_size = 4;
1952#endif
1953
1954 if((bufsize & 0xfff) != bufsize){
1955 DMESGE ("RX buffer allocation too large");
1956 return -1;
1957 }
1958
1959 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1960 &dma_desc);
1961
1962 if(dma_desc & 0xff){
1963
1964 /*
1965 * descriptor's buffer must be 256 byte aligned
1966 * should never happen since we specify the DMA mask
1967 */
be286fd2 1968 WARN(1, "DMA buffer is not aligned\n");
c8d86be3
GKH		 1969 }
1970
1971 priv->rxring=desc;
1972 priv->rxringdma=dma_desc;
1973 tmp=desc;
1974
1975 for (i=0;i<count;i++){
1976
1977 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1978 DMESGE("Failed to kmalloc RX buffer");
1979 return -1;
1980 }
1981
1982 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1983 PCI_DMA_FROMDEVICE);
1984
1985#ifdef DEBUG_ZERO_RX
1986 int j;
1987 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
1988#endif
1989
1990 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1991 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1992 &(priv->rxbufferhead))){
1993 DMESGE("Unable to allocate mem RX buf");
1994 return -1;
1995 }
1996 *tmp = 0; //zero pads the header of the descriptor
1997 *tmp = *tmp |( bufsize&0xfff);
1998 *(tmp+2) = (u32)dma_tmp;
1999 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
2000
2001#ifdef DEBUG_RXALLOC
2002 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
2003 (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
2004#endif
2005
2006 tmp=tmp+rx_desc_size;
2007 }
2008
2009 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
2010
2011
2012#ifdef DEBUG_RXALLOC
2013 DMESG("RX DMA physical address: %x",dma_desc);
2014#endif
2015
2016 return 0;
2017}
2018
2019
2020void set_nic_rxring(struct net_device *dev)
2021{
2022 u8 pgreg;
2023 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2024
2025 //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2026
2027 pgreg=read_nic_byte(dev, PGSELECT);
2028 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
2029
2030 //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2031
2032 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
2033}
2034
2035
2036void rtl8180_reset(struct net_device *dev)
2037{
2038 //u32 txconf = 0x80e00707; //FIXME: Make me understandable
2039 u8 cr;
2040
2041 //write_nic_dword(dev,TX_CONF,txconf);
2042
2043 rtl8180_irq_disable(dev);
2044
2045 cr=read_nic_byte(dev,CMD);
2046 cr = cr & 2;
2047 cr = cr | (1<<CMD_RST_SHIFT);
2048 write_nic_byte(dev,CMD,cr);
2049
2050 force_pci_posting(dev);
2051
2052 mdelay(200);
2053
2054 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
2055 DMESGW("Card reset timeout!");
2056 else
2057 DMESG("Card successfully reset");
2058
2059//#ifndef CONFIG_RTL8185B
2060 rtl8180_set_mode(dev,EPROM_CMD_LOAD);
2061 force_pci_posting(dev);
2062 mdelay(200);
2063//#endif
2064}
2065
2066inline u16 ieeerate2rtlrate(int rate)
2067{
2068 switch(rate){
2069 case 10:
2070 return 0;
2071 case 20:
2072 return 1;
2073 case 55:
2074 return 2;
2075 case 110:
2076 return 3;
2077 case 60:
2078 return 4;
2079 case 90:
2080 return 5;
2081 case 120:
2082 return 6;
2083 case 180:
2084 return 7;
2085 case 240:
2086 return 8;
2087 case 360:
2088 return 9;
2089 case 480:
2090 return 10;
2091 case 540:
2092 return 11;
2093 default:
2094 return 3;
2095
2096 }
2097}
2098
2099static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
2100inline u16 rtl8180_rate2rate(short rate)
2101{
2102 if (rate >12) return 10;
2103 return rtl_rate[rate];
2104}
2105inline u8 rtl8180_IsWirelessBMode(u16 rate)
2106{
2107 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2108 return 1;
2109 else return 0;
2110}
2111u16 N_DBPSOfRate(u16 DataRate);
2112u16 ComputeTxTime(
2113 u16 FrameLength,
2114 u16 DataRate,
2115 u8 bManagementFrame,
2116 u8 bShortPreamble
2117)
2118{
2119 u16 FrameTime;
2120 u16 N_DBPS;
2121 u16 Ceiling;
2122
2123 if( rtl8180_IsWirelessBMode(DataRate) )
2124 {
2125 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2126 { // long preamble
2127 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2128 }
2129 else
2130 { // Short preamble
2131 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2132 }
2133 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2134 FrameTime ++;
2135 } else { //802.11g DSSS-OFDM PLCP length field calculation.
2136 N_DBPS = N_DBPSOfRate(DataRate);
2137 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2138 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2139 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2140 }
2141 return FrameTime;
2142}
2143u16 N_DBPSOfRate(u16 DataRate)
2144{
2145 u16 N_DBPS = 24;
2146
2147 switch(DataRate)
2148 {
2149 case 60:
2150 N_DBPS = 24;
2151 break;
2152
2153 case 90:
2154 N_DBPS = 36;
2155 break;
2156
2157 case 120:
2158 N_DBPS = 48;
2159 break;
2160
2161 case 180:
2162 N_DBPS = 72;
2163 break;
2164
2165 case 240:
2166 N_DBPS = 96;
2167 break;
2168
2169 case 360:
2170 N_DBPS = 144;
2171 break;
2172
2173 case 480:
2174 N_DBPS = 192;
2175 break;
2176
2177 case 540:
2178 N_DBPS = 216;
2179 break;
2180
2181 default:
2182 break;
2183 }
2184
2185 return N_DBPS;
2186}
2187
2188//{by amy 080312
2189//
2190// Description:
2191// For Netgear case, they want good-looking singal strength.
2192// 2004.12.05, by rcnjko.
2193//
2194long
2195NetgearSignalStrengthTranslate(
2196 long LastSS,
2197 long CurrSS
2198 )
2199{
2200 long RetSS;
2201
2202 // Step 1. Scale mapping.
2203 if(CurrSS >= 71 && CurrSS <= 100)
2204 {
2205 RetSS = 90 + ((CurrSS - 70) / 3);
2206 }
2207 else if(CurrSS >= 41 && CurrSS <= 70)
2208 {
2209 RetSS = 78 + ((CurrSS - 40) / 3);
2210 }
2211 else if(CurrSS >= 31 && CurrSS <= 40)
2212 {
2213 RetSS = 66 + (CurrSS - 30);
2214 }
2215 else if(CurrSS >= 21 && CurrSS <= 30)
2216 {
2217 RetSS = 54 + (CurrSS - 20);
2218 }
2219 else if(CurrSS >= 5 && CurrSS <= 20)
2220 {
2221 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2222 }
2223 else if(CurrSS == 4)
2224 {
2225 RetSS = 36;
2226 }
2227 else if(CurrSS == 3)
2228 {
2229 RetSS = 27;
2230 }
2231 else if(CurrSS == 2)
2232 {
2233 RetSS = 18;
2234 }
2235 else if(CurrSS == 1)
2236 {
2237 RetSS = 9;
2238 }
2239 else
2240 {
2241 RetSS = CurrSS;
2242 }
2243 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2244
2245 // Step 2. Smoothing.
2246 if(LastSS > 0)
2247 {
2248 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2249 }
2250 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2251
2252 return RetSS;
2253}
2254//
2255// Description:
2256// Translate 0-100 signal strength index into dBm.
2257//
2258long
2259TranslateToDbm8185(
2260 u8 SignalStrengthIndex // 0-100 index.
2261 )
2262{
2263 long SignalPower; // in dBm.
2264
2265 // Translate to dBm (x=0.5y-95).
2266 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2267 SignalPower -= 95;
2268
2269 return SignalPower;
2270}
2271//
2272// Description:
2273// Perform signal smoothing for dynamic mechanism.
2274// This is different with PerformSignalSmoothing8185 in smoothing fomula.
2275// No dramatic adjustion is apply because dynamic mechanism need some degree
2276// of correctness. Ported from 8187B.
2277// 2007-02-26, by Bruce.
2278//
2279void
2280PerformUndecoratedSignalSmoothing8185(
2281 struct r8180_priv *priv,
2282 bool bCckRate
2283 )
2284{
2285
2286
2287 // Determin the current packet is CCK rate.
2288 priv->bCurCCKPkt = bCckRate;
2289
2290 if(priv->UndecoratedSmoothedSS >= 0)
2291 {
2292 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2293 }
2294 else
2295 {
2296 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2297 }
2298
2299 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2300
2301// printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2302// printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2303
2304 //if(priv->CurCCKRSSI >= 0 && bCckRate)
2305 if(bCckRate)
2306 {
2307 priv->CurCCKRSSI = priv->RSSI;
2308 }
2309 else
2310 {
2311 priv->CurCCKRSSI = 0;
2312 }
2313
2314 // Boundary checking.
2315 // TODO: The overflow condition does happen, if we want to fix,
2316 // we shall recalculate thresholds first.
2317 if(priv->UndecoratedSmoothedSS > 100)
2318 {
2319// printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2320 }
2321 if(priv->UndecoratedSmoothedSS < 0)
2322 {
2323// printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2324 }
2325
2326}
2327
2328//by amy 080312}
2329
2330/* This is rough RX isr handling routine*/
2331void rtl8180_rx(struct net_device *dev)
2332{
2333 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2334 struct sk_buff *tmp_skb;
2335
2336 //struct sk_buff *skb;
2337 short first,last;
2338 u32 len;
2339 int lastlen;
2340 unsigned char quality, signal;
2341 u8 rate;
2342 //u32 *prism_hdr;
2343 u32 *tmp,*tmp2;
2344 u8 rx_desc_size;
2345 u8 padding;
2346 //u32 count=0;
2347 char rxpower = 0;
2348 u32 RXAGC = 0;
2349 long RxAGC_dBm = 0;
2350 u8 LNA=0, BB=0;
2351 u8 LNA_gain[4]={02, 17, 29, 39};
2352 u8 Antenna = 0;
2353 struct ieee80211_hdr *hdr;//by amy
2354 u16 fc,type;
2355 u8 bHwError = 0,bCRC = 0,bICV = 0;
2356 //bHwError = 0;
2357 //bCRC = 0;
2358 //bICV = 0;
2359 bool bCckRate = false;
2360 u8 RSSI = 0;
2361 long SignalStrengthIndex = 0;//+by amy 080312
2362// u8 SignalStrength = 0;
2363 struct ieee80211_rx_stats stats = {
2364 .signal = 0,
2365 .noise = -98,
2366 .rate = 0,
2367 // .mac_time = jiffies,
2368 .freq = IEEE80211_24GHZ_BAND,
2369 };
2370
2371#ifdef CONFIG_RTL8185B
2372 stats.nic_type = NIC_8185B;
2373 rx_desc_size = 8;
2374
2375#else
2376 stats.nic_type = NIC_8185;
2377 rx_desc_size = 4;
2378#endif
2379 //printk("receive frame!%d\n",count++);
2380 //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2381 //else {
2382
2383 if ((*(priv->rxringtail)) & (1<<31)) {
2384
2385 /* we have got an RX int, but the descriptor
2386 * we are pointing is empty*/
2387
2388 priv->stats.rxnodata++;
2389 priv->ieee80211->stats.rx_errors++;
2390
2391 /* if (! *(priv->rxring) & (1<<31)) {
2392
2393 priv->stats.rxreset++;
2394 priv->rxringtail=priv->rxring;
2395 priv->rxbuffer=priv->rxbufferhead;
2396
2397 }else{*/
2398
2399 #if 0
2400 /* Maybe it is possible that the NIC has skipped some descriptors or
2401 * it has reset its internal pointer to the beginning of the ring
2402 * we search for the first filled descriptor in the ring, or we break
2403 * putting again the pointer in the old location if we do not found any.
2404 * This is quite dangerous, what does happen if the nic writes
2405 * two descriptor (say A and B) when we have just checked the descriptor
2406 * A and we are going to check the descriptor B..This might happen if the
2407 * interrupt was dummy, there was not really filled descriptors and
2408 * the NIC didn't lose pointer
2409 */
2410
2411 //priv->stats.rxwrkaround++;
2412
2413 tmp = priv->rxringtail;
2414 while (*(priv->rxringtail) & (1<<31)){
2415
2416 priv->rxringtail+=4;
2417
2418 if(priv->rxringtail >=
2419 (priv->rxring)+(priv->rxringcount )*4)
2420 priv->rxringtail=priv->rxring;
2421
2422 priv->rxbuffer=(priv->rxbuffer->next);
2423
2424 if(priv->rxringtail == tmp ){
2425 //DMESG("EE: Could not find RX pointer");
2426 priv->stats.rxnopointer++;
2427 break;
2428 }
2429 }
2430 #else
2431
2432 tmp2 = NULL;
2433 tmp = priv->rxringtail;
2434 do{
2435 if(tmp == priv->rxring)
2436 //tmp = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2437 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2438 else
2439 tmp -= rx_desc_size;
2440
2441 if(! (*tmp & (1<<31)))
2442 tmp2 = tmp;
2443 }while(tmp != priv->rxring);
2444
2445 if(tmp2) priv->rxringtail = tmp2;
2446 #endif
2447 //}
2448 }
2449
2450 /* while there are filled descriptors */
2451 while(!(*(priv->rxringtail) & (1<<31))){
2452 if(*(priv->rxringtail) & (1<<26))
2453 DMESGW("RX buffer overflow");
2454 if(*(priv->rxringtail) & (1<<12))
2455 priv->stats.rxicverr++;
2456
2457 if(*(priv->rxringtail) & (1<<27)){
2458 priv->stats.rxdmafail++;
2459 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2460 goto drop;
2461 }
2462
2463 pci_dma_sync_single_for_cpu(priv->pdev,
2464 priv->rxbuffer->dma,
2465 priv->rxbuffersize * \
2466 sizeof(u8),
2467 PCI_DMA_FROMDEVICE);
2468
2469 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2470 if(first) priv->rx_prevlen=0;
2471
2472 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2473 if(last){
2474 lastlen=((*priv->rxringtail) &0xfff);
2475
2476 /* if the last descriptor (that should
2477 * tell us the total packet len) tell
2478 * us something less than the descriptors
2479 * len we had until now, then there is some
2480 * problem..
2481 * workaround to prevent kernel panic
2482 */
2483 if(lastlen < priv->rx_prevlen)
2484 len=0;
2485 else
2486 len=lastlen-priv->rx_prevlen;
2487
2488 if(*(priv->rxringtail) & (1<<13)) {
2489//lastlen=((*priv->rxringtail) &0xfff);
2490 if ((*(priv->rxringtail) & 0xfff) <500)
2491 priv->stats.rxcrcerrmin++;
2492 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2493 priv->stats.rxcrcerrmax++;
2494 else
2495 priv->stats.rxcrcerrmid++;
2496
2497 }
2498
2499 }else{
2500 len = priv->rxbuffersize;
2501 }
2502
2503#ifdef CONFIG_RTL8185B
2504 if(first && last) {
2505 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2506 }else if(first) {
2507 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2508 if(padding) {
2509 len -= 2;
2510 }
2511 }else {
2512 padding = 0;
2513 }
2514#ifdef CONFIG_RTL818X_S
2515 padding = 0;
2516#endif
2517#endif
2518 priv->rx_prevlen+=len;
2519
2520 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2521 /* HW is probably passing several buggy frames
2522 * without FD or LD flag set.
2523 * Throw this garbage away to prevent skb
2524 * memory exausting
2525 */
2526 if(!priv->rx_skb_complete)
2527 dev_kfree_skb_any(priv->rx_skb);
2528 priv->rx_skb_complete = 1;
2529 }
2530
2531#ifdef DEBUG_RX_FRAG
2532 DMESG("Iteration.. len %x",len);
2533 if(first) DMESG ("First descriptor");
2534 if(last) DMESG("Last descriptor");
2535
2536#endif
2537#ifdef DEBUG_RX_VERBOSE
2538 print_buffer( priv->rxbuffer->buf, len);
2539#endif
2540
2541#ifdef CONFIG_RTL8185B
2542 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2543 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2544
2545 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2546
2547 stats.mac_time[0] = *(priv->rxringtail+1);
2548 stats.mac_time[1] = *(priv->rxringtail+2);
2549 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2550 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2551
2552#else
2553 signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
2554 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2555
2556 quality=((*(priv->rxringtail+1)) & (0xff));
2557
2558 stats.mac_time[0] = *(priv->rxringtail+2);
2559 stats.mac_time[1] = *(priv->rxringtail+3);
2560#endif
2561 rate=((*(priv->rxringtail)) &
2562 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2563
2564 stats.rate = rtl8180_rate2rate(rate);
2565 //DMESG("%d",rate);
2566 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2567// printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2568//by amy for antenna
2569 if(!rtl8180_IsWirelessBMode(stats.rate))
2570 { // OFDM rate.
2571
2572 RxAGC_dBm = rxpower+1; //bias
2573 }
2574 else
2575 { // CCK rate.
2576 RxAGC_dBm = signal;//bit 0 discard
2577
2578 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2579 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0
2580
2581 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2582
2583 RxAGC_dBm +=4; //bias
2584 }
2585
2586 if(RxAGC_dBm & 0x80) //absolute value
2587 RXAGC= ~(RxAGC_dBm)+1;
2588 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2589 // Translate RXAGC into 1-100.
2590 if(!rtl8180_IsWirelessBMode(stats.rate))
2591 { // OFDM rate.
2592 if(RXAGC>90)
2593 RXAGC=90;
2594 else if(RXAGC<25)
2595 RXAGC=25;
2596 RXAGC=(90-RXAGC)*100/65;
2597 }
2598 else
2599 { // CCK rate.
2600 if(RXAGC>95)
2601 RXAGC=95;
2602 else if(RXAGC<30)
2603 RXAGC=30;
2604 RXAGC=(95-RXAGC)*100/65;
2605 }
2606 priv->SignalStrength = (u8)RXAGC;
2607 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin
2608 priv->RxPower = rxpower;
2609 priv->RSSI = RSSI;
2610//{by amy 080312
2611 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2612 if(quality >= 127)
2613 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2614 else if(quality < 27)
2615 quality = 100;
2616 else
2617 quality = 127 - quality;
2618 priv->SignalQuality = quality;
2619 if(!priv->card_8185)
2620 printk("check your card type\n");
2621
2622 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2623 stats.signalstrength = RXAGC;
2624 if(stats.signalstrength > 100)
2625 stats.signalstrength = 100;
2626 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2627 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2628 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2629 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2630//by amy 080312}
2631 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2632 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2633 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2634 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2635 hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2636 fc = le16_to_cpu(hdr->frame_ctl);
2637 type = WLAN_FC_GET_TYPE(fc);
2638
2639 if((IEEE80211_FTYPE_CTL != type) &&
2640 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2641 && (!bHwError) && (!bCRC)&& (!bICV))
2642 {
2643//by amy 080312
2644 // Perform signal smoothing for dynamic mechanism on demand.
2645 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2646 // No dramatic adjustion is apply because dynamic mechanism need some degree
2647 // of correctness. 2007.01.23, by shien chang.
2648 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2649 //
2650 // For good-looking singal strength.
2651 //
2652 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2653 priv->LastSignalStrengthInPercent,
2654 priv->SignalStrength);
2655
2656 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2657 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2658 //
2659 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
2660 // so we record the correct power here.
2661 //
2662 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2663 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2664
2665 // Figure out which antenna that received the lasted packet.
2666 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2667//by amy 080312
2668 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2669 }
2670
2671//by amy for antenna
2672
2673
2674
2675
2676
2677
2678#ifndef DUMMY_RX
2679 if(first){
2680 if(!priv->rx_skb_complete){
2681 /* seems that HW sometimes fails to reiceve and
2682 doesn't provide the last descriptor */
2683#ifdef DEBUG_RX_SKB
2684 DMESG("going to free incomplete skb");
2685#endif
2686 dev_kfree_skb_any(priv->rx_skb);
2687 priv->stats.rxnolast++;
2688#ifdef DEBUG_RX_SKB
2689 DMESG("free incomplete skb OK");
2690#endif
2691 }
2692 /* support for prism header has been originally added by Christian */
2693 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2694
2695#if 0
2696 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2697 if(! priv->rx_skb) goto drop;
2698
2699 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2700 prism_hdr[0]=htonl(0x80211001); //version
2701 prism_hdr[1]=htonl(0x40); //length
2702 prism_hdr[2]=htonl(stats.mac_time[1]); //mactime (HIGH)
2703 prism_hdr[3]=htonl(stats.mac_time[0]); //mactime (LOW)
2704 rdtsc(prism_hdr[5], prism_hdr[4]); //hostime (LOW+HIGH)
2705 prism_hdr[4]=htonl(prism_hdr[4]); //Byte-Order aendern
2706 prism_hdr[5]=htonl(prism_hdr[5]); //Byte-Order aendern
2707 prism_hdr[6]=0x00; //phytype
2708 prism_hdr[7]=htonl(priv->chan); //channel
2709 prism_hdr[8]=htonl(stats.rate); //datarate
2710 prism_hdr[9]=0x00; //antenna
2711 prism_hdr[10]=0x00; //priority
2712 prism_hdr[11]=0x00; //ssi_type
2713 prism_hdr[12]=htonl(stats.signal); //ssi_signal
2714 prism_hdr[13]=htonl(stats.noise); //ssi_noise
2715 prism_hdr[14]=0x00; //preamble
2716 prism_hdr[15]=0x00; //encoding
2717
2718#endif
2719 }else{
2720 priv->rx_skb = dev_alloc_skb(len+2);
2721 if( !priv->rx_skb) goto drop;
2722#ifdef DEBUG_RX_SKB
2723 DMESG("Alloc initial skb %x",len+2);
2724#endif
2725 }
2726
2727 priv->rx_skb_complete=0;
2728 priv->rx_skb->dev=dev;
2729 }else{
2730 /* if we are here we should have already RXed
2731 * the first frame.
2732 * If we get here and the skb is not allocated then
2733 * we have just throw out garbage (skb not allocated)
2734 * and we are still rxing garbage....
2735 */
2736 if(!priv->rx_skb_complete){
2737
2738 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2739
2740 if(!tmp_skb) goto drop;
2741
2742 tmp_skb->dev=dev;
2743#ifdef DEBUG_RX_SKB
2744 DMESG("Realloc skb %x",len+2);
2745#endif
2746
2747#ifdef DEBUG_RX_SKB
2748 DMESG("going copy prev frag %x",priv->rx_skb->len);
2749#endif
2750 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2751 priv->rx_skb->data,
2752 priv->rx_skb->len);
2753#ifdef DEBUG_RX_SKB
2754 DMESG("skb copy prev frag complete");
2755#endif
2756
2757 dev_kfree_skb_any(priv->rx_skb);
2758#ifdef DEBUG_RX_SKB
2759 DMESG("prev skb free ok");
2760#endif
2761
2762 priv->rx_skb=tmp_skb;
2763 }
2764 }
2765#ifdef DEBUG_RX_SKB
2766 DMESG("going to copy current payload %x",len);
2767#endif
2768 if(!priv->rx_skb_complete) {
2769#ifdef CONFIG_RTL8185B
2770 if(padding) {
2771 memcpy(skb_put(priv->rx_skb,len),
2772 (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2773 } else {
2774#endif
2775 memcpy(skb_put(priv->rx_skb,len),
2776 priv->rxbuffer->buf,len);
2777#ifdef CONFIG_RTL8185B
2778 }
2779#endif
2780 }
2781#ifdef DEBUG_RX_SKB
2782 DMESG("current fragment skb copy complete");
2783#endif
2784
2785 if(last && !priv->rx_skb_complete){
2786
2787#ifdef DEBUG_RX_SKB
2788 DMESG("Got last fragment");
2789#endif
2790
2791 if(priv->rx_skb->len > 4)
2792 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2793#ifdef DEBUG_RX_SKB
2794 DMESG("yanked out crc, passing to the upper layer");
2795#endif
2796
2797#ifndef RX_DONT_PASS_UL
2798 if(!ieee80211_rx(priv->ieee80211,
2799 priv->rx_skb, &stats)){
2800#ifdef DEBUG_RX
2801 DMESGW("Packet not consumed");
2802#endif
2803#endif // RX_DONT_PASS_UL
2804
2805 dev_kfree_skb_any(priv->rx_skb);
2806#ifndef RX_DONT_PASS_UL
2807 }
2808#endif
2809#ifdef DEBUG_RX
2810 else{
2811 DMESG("Rcv frag");
2812 }
2813#endif
2814 priv->rx_skb_complete=1;
2815 }
2816
2817#endif //DUMMY_RX
2818
2819 pci_dma_sync_single_for_device(priv->pdev,
2820 priv->rxbuffer->dma,
2821 priv->rxbuffersize * \
2822 sizeof(u8),
2823 PCI_DMA_FROMDEVICE);
2824
2825
2826drop: // this is used when we have not enought mem
2827
2828 /* restore the descriptor */
2829 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2830 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2831 *(priv->rxringtail)=
2832 *(priv->rxringtail) | priv->rxbuffersize;
2833
2834 *(priv->rxringtail)=
2835 *(priv->rxringtail) | (1<<31);
2836 //^empty descriptor
2837
2838 //wmb();
2839
2840#ifdef DEBUG_RX
2841 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2842#endif
2843 //unsigned long flags;
2844 //spin_lock_irqsave(&priv->irq_lock,flags);
2845
2846 priv->rxringtail+=rx_desc_size;
2847 if(priv->rxringtail >=
2848 (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2849 priv->rxringtail=priv->rxring;
2850
2851 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2852
2853
2854 priv->rxbuffer=(priv->rxbuffer->next);
2855
2856 }
2857
2858
2859
2860// if(get_curr_tx_free_desc(dev,priority))
2861// ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2862
2863
2864
2865}
2866
2867
2868void rtl8180_dma_kick(struct net_device *dev, int priority)
2869{
2870 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2871
2872 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2873/*
2874
2875 switch(priority){
2876
2877 case LOW_PRIORITY:
2878
2879 write_nic_byte(dev,TX_DMA_POLLING,
2880 (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2881 priv->dma_poll_mask);
2882 break;
2883
2884 case NORM_PRIORITY:
2885
2886 write_nic_byte(dev,TX_DMA_POLLING,
2887 (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2888 priv->dma_poll_mask);
2889 break;
2890
2891 case HI_PRIORITY:
2892
2893 write_nic_byte(dev,TX_DMA_POLLING,
2894 (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2895 priv->dma_poll_mask);
2896 break;
2897
2898 }
2899*/
2900 write_nic_byte(dev, TX_DMA_POLLING,
2901 (1 << (priority + 1)) | priv->dma_poll_mask);
2902 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2903
2904 force_pci_posting(dev);
2905}
2906
2907#if 0
2908void rtl8180_tx_queues_stop(struct net_device *dev)
2909{
2910 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2911 u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2912 dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2913 dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2914 dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2915
2916 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2917 write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2918 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2919}
2920#endif
2921
2922void rtl8180_data_hard_stop(struct net_device *dev)
2923{
2924 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2925
2926 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2927#ifdef CONFIG_RTL8185B
2928 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2929 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2930#else
2931 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2932 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2933#endif
2934 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2935}
2936
2937
2938void rtl8180_data_hard_resume(struct net_device *dev)
2939{
2940 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2941
2942 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2943#ifdef CONFIG_RTL8185B
2944 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2945 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2946#else
2947 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2948 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2949#endif
2950 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2951}
2952
2953
2954/* this function TX data frames when the ieee80211 stack requires this.
2955 * It checks also if we need to stop the ieee tx queue, eventually do it
2956 */
2957void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2958rate)
2959{
2960 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2961 int mode;
2962 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
2963 short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2964 unsigned long flags;
2965 int priority;
2966 //static int count = 0;
2967
2968 mode = priv->ieee80211->iw_mode;
2969
2970 rate = ieeerate2rtlrate(rate);
2971 /*
2972 * This function doesn't require lock because we make
2973 * sure it's called with the tx_lock already acquired.
2974 * this come from the kernel's hard_xmit callback (trought
2975 * the ieee stack, or from the try_wake_queue (again trought
2976 * the ieee stack.
2977 */
2978#ifdef CONFIG_RTL8185B
2979 priority = AC2Q(skb->priority);
2980#else
2981 priority = LOW_PRIORITY;
2982#endif
2983 spin_lock_irqsave(&priv->tx_lock,flags);
2984
2985 if(priv->ieee80211->bHwRadioOff)
2986 {
2987 spin_unlock_irqrestore(&priv->tx_lock,flags);
2988
2989 return;
2990 }
2991
2992 //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
2993 if (!check_nic_enought_desc(dev, priority)){
2994 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
2995 // get_curr_tx_free_desc(dev, priority));
2996 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
2997 get_curr_tx_free_desc(dev, priority));
2998 //printk(KERN_WARNING "==============================================================> \n");
2999 ieee80211_stop_queue(priv->ieee80211);
3000 }
3001 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
3002 if (!check_nic_enought_desc(dev, priority))
3003 ieee80211_stop_queue(priv->ieee80211);
3004
3005 //dev_kfree_skb_any(skb);
3006 spin_unlock_irqrestore(&priv->tx_lock,flags);
3007
3008}
3009
3010/* This is a rough attempt to TX a frame
3011 * This is called by the ieee 80211 stack to TX management frames.
3012 * If the ring is full packet are dropped (for data frame the queue
3013 * is stopped before this can happen). For this reason it is better
3014 * if the descriptors are larger than the largest management frame
3015 * we intend to TX: i'm unsure what the HW does if it will not found
3016 * the last fragment of a frame because it has been dropped...
3017 * Since queues for Management and Data frames are different we
3018 * might use a different lock than tx_lock (for example mgmt_tx_lock)
3019 */
3020/* these function may loops if invoked with 0 descriptors or 0 len buffer*/
3021int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
3022{
3023 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3024
3025 unsigned long flags;
3026
3027 int priority;
3028
3029#ifdef CONFIG_RTL8185B
3030 priority = MANAGE_PRIORITY;
3031#else
3032 priority = NORM_PRIORITY;
3033#endif
3034
3035 spin_lock_irqsave(&priv->tx_lock,flags);
3036
3037 if(priv->ieee80211->bHwRadioOff)
3038 {
3039 spin_unlock_irqrestore(&priv->tx_lock,flags);
3040
3041 dev_kfree_skb_any(skb);
3042 return 0;
3043 }
3044
3045 rtl8180_tx(dev, skb->data, skb->len, priority,
3046 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3047
3048 priv->ieee80211->stats.tx_bytes+=skb->len;
3049 priv->ieee80211->stats.tx_packets++;
3050 spin_unlock_irqrestore(&priv->tx_lock,flags);
3051
3052 dev_kfree_skb_any(skb);
3053 return 0;
3054}
3055
3056// longpre 144+48 shortpre 72+24
3057u16 rtl8180_len2duration(u32 len, short rate,short* ext)
3058{
3059 u16 duration;
3060 u16 drift;
3061 *ext=0;
3062
3063 switch(rate){
3064 case 0://1mbps
3065 *ext=0;
3066 duration = ((len+4)<<4) /0x2;
3067 drift = ((len+4)<<4) % 0x2;
3068 if(drift ==0 ) break;
3069 duration++;
3070 break;
3071
3072 case 1://2mbps
3073 *ext=0;
3074 duration = ((len+4)<<4) /0x4;
3075 drift = ((len+4)<<4) % 0x4;
3076 if(drift ==0 ) break;
3077 duration++;
3078 break;
3079
3080 case 2: //5.5mbps
3081 *ext=0;
3082 duration = ((len+4)<<4) /0xb;
3083 drift = ((len+4)<<4) % 0xb;
3084 if(drift ==0 )
3085 break;
3086 duration++;
3087 break;
3088
3089 default:
3090 case 3://11mbps
3091 *ext=0;
3092 duration = ((len+4)<<4) /0x16;
3093 drift = ((len+4)<<4) % 0x16;
3094 if(drift ==0 )
3095 break;
3096 duration++;
3097 if(drift > 6)
3098 break;
3099 *ext=1;
3100 break;
3101 }
3102
3103 return duration;
3104}
3105
3106
3107void rtl8180_prepare_beacon(struct net_device *dev)
3108{
3109
3110 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3111
3112 struct sk_buff *skb;
3113
3114 u16 word = read_nic_word(dev, BcnItv);
3115 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
3116 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
3117 write_nic_word(dev, BcnItv, word);
3118
3119
3120 skb = ieee80211_get_beacon(priv->ieee80211);
3121 if(skb){
3122 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
3123 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3124 dev_kfree_skb_any(skb);
3125 }
3126 #if 0
3127 //DMESG("size %x",len);
3128 if(*tail & (1<<31)){
3129
3130 //DMESG("No more beacon TX desc");
3131 return ;
3132
3133 }
9c515551 3134 //while(! (*tail & (1<<31))){
c8d86be3
GKH		 3135 *tail= 0; // zeroes header
3136
3137 *tail = *tail| (1<<29) ; //fist segment of the packet
3138 *tail = (*tail) | (1<<28); // last segment
3139 // *tail = *tail | (1<<18); // this is a beacon frame
3140 *(tail+3)=*(tail+3) &~ 0xfff;
3141 *(tail+3)=*(tail+3) | len; // buffer lenght
3142 *tail = *tail |len;
3143 // zeroes the second 32-bits dword of the descriptor
3144 *(tail+1)= 0;
3145 *tail = *tail | (rate << 24);
3146
3147 duration = rtl8180_len2duration(len,rate,&ext);
3148
3149 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3150
3151 *tail = *tail | (1<<31);
3152 //^ descriptor ready to be txed
3153 if((tail - begin)/8 == priv->txbeaconcount-1)
3154 tail=begin;
3155 else
3156 tail=tail+8;
3157 //}
3158#endif
3159}
3160
3161/* This function do the real dirty work: it enqueues a TX command
3162 * descriptor in the ring buffer, copyes the frame in a TX buffer
3163 * and kicks the NIC to ensure it does the DMA transfer.
3164 */
3165short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
3166 short morefrag, short descfrag, int rate)
3167{
3168 struct r8180_priv *priv = ieee80211_priv(dev);
3169 u32 *tail,*temp_tail;
3170 u32 *begin;
3171 u32 *buf;
3172 int i;
3173 int remain;
3174 int buflen;
3175 int count;
3176 //u16 AckCtsTime;
3177 //u16 FrameTime;
3178 u16 duration;
3179 short ext;
3180 struct buffer* buflist;
3181 //unsigned long flags;
3182#ifdef CONFIG_RTL8185B
3183 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
3184 u8 dest[ETH_ALEN];
3185 u8 bUseShortPreamble = 0;
3186 u8 bCTSEnable = 0;
3187 u8 bRTSEnable = 0;
3188 //u16 RTSRate = 22;
3189 //u8 RetryLimit = 0;
3190 u16 Duration = 0;
3191 u16 RtsDur = 0;
3192 u16 ThisFrameTime = 0;
3193 u16 TxDescDuration = 0;
3194 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3195#endif
3196
3197 switch(priority) {
3198 case MANAGE_PRIORITY:
3199 tail=priv->txmapringtail;
3200 begin=priv->txmapring;
3201 buflist = priv->txmapbufstail;
3202 count = priv->txringcount;
3203 break;
3204
3205 case BK_PRIORITY:
3206 tail=priv->txbkpringtail;
3207 begin=priv->txbkpring;
3208 buflist = priv->txbkpbufstail;
3209 count = priv->txringcount;
3210 break;
3211
3212 case BE_PRIORITY:
3213 tail=priv->txbepringtail;
3214 begin=priv->txbepring;
3215 buflist = priv->txbepbufstail;
3216 count = priv->txringcount;
3217 break;
3218
3219 case VI_PRIORITY:
3220 tail=priv->txvipringtail;
3221 begin=priv->txvipring;
3222 buflist = priv->txvipbufstail;
3223 count = priv->txringcount;
3224 break;
3225
3226 case VO_PRIORITY:
3227 tail=priv->txvopringtail;
3228 begin=priv->txvopring;
3229 buflist = priv->txvopbufstail;
3230 count = priv->txringcount;
3231 break;
3232
3233 case HI_PRIORITY:
3234 tail=priv->txhpringtail;
3235 begin=priv->txhpring;
3236 buflist = priv->txhpbufstail;
3237 count = priv->txringcount;
3238 break;
3239
3240 case BEACON_PRIORITY:
3241 tail=priv->txbeaconringtail;
3242 begin=priv->txbeaconring;
3243 buflist = priv->txbeaconbufstail;
3244 count = priv->txbeaconcount;
3245 break;
3246
3247 default:
3248 return -1;
3249 break;
3250 }
3251
3252 //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3253#if 1
3254 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3255 if (is_multicast_ether_addr(dest) ||
3256 is_broadcast_ether_addr(dest))
3257 {
3258 Duration = 0;
3259 RtsDur = 0;
3260 bRTSEnable = 0;
3261 bCTSEnable = 0;
3262
3263 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3264 TxDescDuration = ThisFrameTime;
3265 } else {// Unicast packet
3266 //u8 AckRate;
3267 u16 AckTime;
3268
3269 //YJ,add,080828,for Keep alive
3270 priv->NumTxUnicast++;
3271
3272 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3273 //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3274 // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3275 //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3276 //For simplicity, just use the 1M basic rate
3277 //AckTime = ComputeTxTime(14, 540,0, 0); // AckCTSLng = 14 use 1M bps send
3278 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3279 //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send
3280
3281 if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3282 { // RTS/CTS.
3283 u16 RtsTime, CtsTime;
3284 //u16 CtsRate;
3285 bRTSEnable = 1;
3286 bCTSEnable = 0;
3287
3288 // Rate and time required for RTS.
3289 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3290 // Rate and time required for CTS.
3291 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3292
3293 // Figure out time required to transmit this frame.
3294 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3295 rtl8180_rate2rate(rate),
3296 0,
3297 bUseShortPreamble);
3298
3299 // RTS-CTS-ThisFrame-ACK.
3300 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3301
3302 TxDescDuration = RtsTime + RtsDur;
3303 }
3304 else {// Normal case.
3305 bCTSEnable = 0;
3306 bRTSEnable = 0;
3307 RtsDur = 0;
3308
3309 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3310 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3311 }
3312
3313 if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3314 // ThisFrame-ACK.
3315 Duration = aSifsTime + AckTime;
3316 } else { // One or more fragments remained.
3317 u16 NextFragTime;
3318 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3319 rtl8180_rate2rate(rate),
3320 0,
3321 bUseShortPreamble );
3322
3323 //ThisFrag-ACk-NextFrag-ACK.
3324 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3325 }
3326
3327 } // End of Unicast packet
3328
3329 frag_hdr->duration_id = Duration;
3330#endif
3331
3332 buflen=priv->txbuffsize;
3333 remain=len;
3334 temp_tail = tail;
3335//printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3336 while(remain!=0){
3337#ifdef DEBUG_TX_FRAG
3338 DMESG("TX iteration");
3339#endif
3340#ifdef DEBUG_TX
3341 DMESG("TX: filling descriptor %x",(u32)tail);
3342#endif
3343 mb();
3344 if(!buflist){
3345 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3346 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3347 return -1;
3348 }
3349 buf=buflist->buf;
3350
3351 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3352
3353 DMESGW("No more TX desc, returning %x of %x",
3354 remain,len);
3355 priv->stats.txrdu++;
3356#ifdef DEBUG_TX_DESC
3357 check_tx_ring(dev,priority);
3358 // netif_stop_queue(dev);
3359 // netif_carrier_off(dev);
3360#endif
3361 // spin_unlock_irqrestore(&priv->tx_lock,flags);
3362
3363 return remain;
3364
3365 }
3366
3367 *tail= 0; // zeroes header
3368 *(tail+1) = 0;
3369 *(tail+3) = 0;
3370 *(tail+5) = 0;
3371 *(tail+6) = 0;
3372 *(tail+7) = 0;
3373
3374 if(priv->card_8185){
3375 //FIXME: this should be triggered by HW encryption parameters.
3376 *tail |= (1<<15); //no encrypt
3377// *tail |= (1<<30); //raise int when completed
3378 }
3379 // *tail = *tail | (1<<16);
3380 if(remain==len && !descfrag) {
3381 ownbit_flag = false; //added by david woo,2007.12.14
3382#ifdef DEBUG_TX_FRAG
3383 DMESG("First descriptor");
3384#endif
3385 *tail = *tail| (1<<29) ; //fist segment of the packet
3386 *tail = *tail |(len);
3387 } else {
3388 ownbit_flag = true;
3389 }
3390
3391 for(i=0;i<buflen&& remain >0;i++,remain--){
3392 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3393 if(remain == 4 && i+4 >= buflen) break;
3394 /* ensure the last desc has at least 4 bytes payload */
3395
3396 }
3397 txbuf = txbuf + i;
3398 *(tail+3)=*(tail+3) &~ 0xfff;
3399 *(tail+3)=*(tail+3) | i; // buffer lenght
3400 // Use short preamble or not
3401 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3402 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long!
3403 // *tail |= (1<<16); // enable short preamble mode.
3404
3405#ifdef CONFIG_RTL8185B
3406 if(bCTSEnable) {
3407 *tail |= (1<<18);
3408 }
3409
3410 if(bRTSEnable) //rts enable
3411 {
3412 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3413 *tail |= (1<<23);//rts enable
3414 *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3415 }
3416 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3417// *(tail+3) |= (0xe6<<16);
3418 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3419#else
3420 //Use RTS or not
3421#ifdef CONFIG_RTL8187B
3422 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
3423#else
3424 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
3425#endif
3426 *tail |= (1<<23); //enalbe RTS function
3427 *tail |= (0<<19); //use 1M bps send RTS packet
3428 AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3429 FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
3430 // RTS/CTS time is calculate as follow
3431 duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime;
3432 *(tail+1) |= duration; //Need to edit here! ----hikaru
3433 }else{
3434 *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
3435 }
3436#endif
3437
3438 *tail = *tail | ((rate&0xf) << 24);
3439 //DMESG("rate %d",rate);
3440
3441 if(priv->card_8185){
3442
3443 #if 0
3444 *(tail+5)&= ~(1<<24); /* tx ant 0 */
3445
3446 *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3447 *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3448
3449 *(tail+5) &=
3450~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3451 *(tail+5) |= (7<<8); // Max retry limit
3452
3453 *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3454 *(tail+5) |= (8<<4); // Max contention window
3455 *(tail+6) |= 4; // Min contention window
3456 #endif
3457 // *(tail+5) = 0;
3458 }
3459
3460 /* hw_plcp_len is not used for rtl8180 chip */
3461 /* FIXME */
3462 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3463
3464 duration = rtl8180_len2duration(len,
3465 rate,&ext);
3466
3467
3468#ifdef DEBUG_TX
3469 DMESG("PLCP duration %d",duration );
3470 //DMESG("drift %d",drift);
3471 DMESG("extension %s", (ext==1) ? "on":"off");
3472#endif
3473 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3474 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3475 }
3476
3477 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3478 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3479
3480#ifdef DEBUG_TX_FRAG
3481 if(!remain)DMESG("Last descriptor");
3482 if(morefrag)DMESG("More frag");
3483#endif
3484 *(tail+5) = *(tail+5)|(2<<27);
3485 *(tail+7) = *(tail+7)|(1<<4);
3486
3487 wmb();
3488 if(ownbit_flag)
3489 {
3490 *tail = *tail | (1<<31); // descriptor ready to be txed
3491 }
3492
3493#ifdef DEBUG_TX_DESC2
3494 printk("tx desc is:\n");
3495 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3496 tail[4], tail[5], tail[6], tail[7]);
3497#endif
3498
3499 if((tail - begin)/8 == count-1)
3500 tail=begin;
3501
3502 else
3503 tail=tail+8;
3504
3505 buflist=buflist->next;
3506
3507 mb();
3508
3509 switch(priority) {
3510 case MANAGE_PRIORITY:
3511 priv->txmapringtail=tail;
3512 priv->txmapbufstail=buflist;
3513 break;
3514
3515 case BK_PRIORITY:
3516 priv->txbkpringtail=tail;
3517 priv->txbkpbufstail=buflist;
3518 break;
3519
3520 case BE_PRIORITY:
3521 priv->txbepringtail=tail;
3522 priv->txbepbufstail=buflist;
3523 break;
3524
3525 case VI_PRIORITY:
3526 priv->txvipringtail=tail;
3527 priv->txvipbufstail=buflist;
3528 break;
3529
3530 case VO_PRIORITY:
3531 priv->txvopringtail=tail;
3532 priv->txvopbufstail=buflist;
3533 break;
3534
3535 case HI_PRIORITY:
3536 priv->txhpringtail=tail;
3537 priv->txhpbufstail = buflist;
3538 break;
3539
3540 case BEACON_PRIORITY:
3541 /* the HW seems to be happy with the 1st
3542 * descriptor filled and the 2nd empty...
3543 * So always update descriptor 1 and never
3544 * touch 2nd
3545 */
3546 // priv->txbeaconringtail=tail;
3547 // priv->txbeaconbufstail=buflist;
3548
3549 break;
3550
3551 }
3552
3553 //rtl8180_dma_kick(dev,priority);
3554 }
3555 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3556 rtl8180_dma_kick(dev,priority);
3557 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3558
3559 return 0;
3560
3561}
3562
3563
3564void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3565
3566
3567void rtl8180_link_change(struct net_device *dev)
3568{
3569 struct r8180_priv *priv = ieee80211_priv(dev);
3570 u16 beacon_interval;
3571
3572 struct ieee80211_network *net = &priv->ieee80211->current_network;
3573// rtl8180_adapter_start(dev);
3574 rtl8180_update_msr(dev);
3575
3576
3577 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3578
3579 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3580 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3581
3582
3583 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL);
3584 beacon_interval &= ~ BEACON_INTERVAL_MASK;
3585 beacon_interval |= net->beacon_interval;
3586 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3587
3588 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3589
3590
3591 /*
3592 u16 atim = read_nic_dword(dev,ATIM);
3593 u16 = u16 &~ ATIM_MASK;
3594 u16 = u16 | beacon->atim;
3595 */
3596#if 0
3597 if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3598 if (priv->hw_wep) {
3599 DMESG("Enabling hardware WEP support");
3600 rtl8180_set_hw_wep(dev);
3601 priv->ieee80211->host_encrypt=0;
3602 priv->ieee80211->host_decrypt=0;
3603 }
3604#ifndef CONFIG_IEEE80211_NOWEP
3605 else {
3606 priv->ieee80211->host_encrypt=1;
3607 priv->ieee80211->host_decrypt=1;
3608 }
3609#endif
3610 }
3611#ifndef CONFIG_IEEE80211_NOWEP
3612 else{
3613 priv->ieee80211->host_encrypt=0;
3614 priv->ieee80211->host_decrypt=0;
3615 }
3616#endif
3617#endif
3618
3619
3620 if(priv->card_8185)
3621 rtl8180_set_chan(dev, priv->chan);
3622
3623
3624}
3625
3626void rtl8180_rq_tx_ack(struct net_device *dev){
3627
3628 struct r8180_priv *priv = ieee80211_priv(dev);
d599edca 3629// printk("====================>%s\n",__func__);
c8d86be3
GKH		 3630 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3631 priv->ack_tx_to_ieee = 1;
3632}
3633
3634short rtl8180_is_tx_queue_empty(struct net_device *dev){
3635
3636 struct r8180_priv *priv = ieee80211_priv(dev);
3637 u32* d;
3638
3639 for (d = priv->txmapring;
3640 d < priv->txmapring + priv->txringcount;d+=8)
3641 if(*d & (1<<31)) return 0;
3642
3643 for (d = priv->txbkpring;
3644 d < priv->txbkpring + priv->txringcount;d+=8)
3645 if(*d & (1<<31)) return 0;
3646
3647 for (d = priv->txbepring;
3648 d < priv->txbepring + priv->txringcount;d+=8)
3649 if(*d & (1<<31)) return 0;
3650
3651 for (d = priv->txvipring;
3652 d < priv->txvipring + priv->txringcount;d+=8)
3653 if(*d & (1<<31)) return 0;
3654
3655 for (d = priv->txvopring;
3656 d < priv->txvopring + priv->txringcount;d+=8)
3657 if(*d & (1<<31)) return 0;
3658
3659 for (d = priv->txhpring;
3660 d < priv->txhpring + priv->txringcount;d+=8)
3661 if(*d & (1<<31)) return 0;
3662 return 1;
3663}
3664/* FIXME FIXME 5msecs is random */
3665#define HW_WAKE_DELAY 5
3666
3667void rtl8180_hw_wakeup(struct net_device *dev)
3668{
3669 unsigned long flags;
3670
3671 struct r8180_priv *priv = ieee80211_priv(dev);
3672
3673 spin_lock_irqsave(&priv->ps_lock,flags);
3674 //DMESG("Waken up!");
3675 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3676
3677 if(priv->rf_wakeup)
3678 priv->rf_wakeup(dev);
3679// mdelay(HW_WAKE_DELAY);
3680 spin_unlock_irqrestore(&priv->ps_lock,flags);
3681}
3682
3683void rtl8180_hw_sleep_down(struct net_device *dev)
3684{
3685 unsigned long flags;
3686
3687 struct r8180_priv *priv = ieee80211_priv(dev);
3688
3689 spin_lock_irqsave(&priv->ps_lock,flags);
3690 //DMESG("Sleep!");
3691
3692 if(priv->rf_sleep)
3693 priv->rf_sleep(dev);
3694 spin_unlock_irqrestore(&priv->ps_lock,flags);
3695}
3696
3697
3698void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3699{
3700
3701 struct r8180_priv *priv = ieee80211_priv(dev);
3702
3703 u32 rb = jiffies;
3704 unsigned long flags;
3705
3706 spin_lock_irqsave(&priv->ps_lock,flags);
3707
3708 /* Writing HW register with 0 equals to disable
3709 * the timer, that is not really what we want
3710 */
3711 tl -= MSECS(4+16+7);
3712
3713 //if(tl == 0) tl = 1;
3714
3715 /* FIXME HACK FIXME HACK */
3716// force_pci_posting(dev);
3717 //mdelay(1);
3718
3719// rb = read_nic_dword(dev, TSFTR);
3720
3721 /* If the interval in witch we are requested to sleep is too
3722 * short then give up and remain awake
3723 */
3724 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3725 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3726 spin_unlock_irqrestore(&priv->ps_lock,flags);
3727 printk("too short to sleep\n");
3728 return;
3729 }
3730
3731// write_nic_dword(dev, TimerInt, tl);
3732// rb = read_nic_dword(dev, TSFTR);
3733 {
3734 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3735 // if (tl<rb)
3736
3737 //lzm,add,080828
3738 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3739
3740 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3741 }
3742 /* if we suspect the TimerInt is gone beyond tl
3743 * while setting it, then give up
3744 */
3745#if 1
3746 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3747 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3748 spin_unlock_irqrestore(&priv->ps_lock,flags);
3749 return;
3750 }
3751#endif
3752// if(priv->rf_sleep)
3753// priv->rf_sleep(dev);
3754
3755 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3756 spin_unlock_irqrestore(&priv->ps_lock,flags);
3757}
3758
3759
3760//void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3761#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
3762void rtl8180_wmm_param_update(struct work_struct * work)
3763{
3764 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3765 //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3766 struct net_device *dev = ieee->dev;
3767#else
3768void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
3769{
3770 struct net_device *dev = ieee->dev;
3771 struct r8180_priv *priv = ieee80211_priv(dev);
3772#endif
3773 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3774 u8 mode = ieee->current_network.mode;
3775 AC_CODING eACI;
3776 AC_PARAM AcParam;
3777 PAC_PARAM pAcParam;
3778 u8 i;
3779
3780#ifndef CONFIG_RTL8185B
3781 //for legacy 8185 keep the PARAM unchange.
3782 return;
3783#else
3784 if(!ieee->current_network.QoS_Enable){
3785 //legacy ac_xx_param update
3786 AcParam.longData = 0;
3787 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3788 AcParam.f.AciAifsn.f.ACM = 0;
3789 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3790 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3791 AcParam.f.TXOPLimit = 0;
3792 for(eACI = 0; eACI < AC_MAX; eACI++){
3793 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3794 {
3795 u8 u1bAIFS;
3796 u32 u4bAcParam;
3797 pAcParam = (PAC_PARAM)(&AcParam);
3798 // Retrive paramters to udpate.
3799 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3800 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3801 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3802 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3803 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3804 switch(eACI){
3805 case AC1_BK:
3806 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3807 break;
3808
3809 case AC0_BE:
3810 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3811 break;
3812
3813 case AC2_VI:
3814 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3815 break;
3816
3817 case AC3_VO:
3818 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3819 break;
3820
3821 default:
3822 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3823 break;
3824 }
3825 }
3826 }
3827 return;
3828 }
3829
3830 for(i = 0; i < AC_MAX; i++){
3831 //AcParam.longData = 0;
3832 pAcParam = (AC_PARAM * )ac_param;
3833 {
3834 AC_CODING eACI;
3835 u8 u1bAIFS;
3836 u32 u4bAcParam;
3837
3838 // Retrive paramters to udpate.
3839 eACI = pAcParam->f.AciAifsn.f.ACI;
3840 //Mode G/A: slotTimeTimer = 9; Mode B: 20
3841 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3842 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
3843 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
3844 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
3845 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3846
3847 switch(eACI){
3848 case AC1_BK:
3849 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3850 break;
3851
3852 case AC0_BE:
3853 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3854 break;
3855
3856 case AC2_VI:
3857 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3858 break;
3859
3860 case AC3_VO:
3861 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3862 break;
3863
3864 default:
3865 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3866 break;
3867 }
3868 }
3869 ac_param += (sizeof(AC_PARAM));
3870 }
3871#endif
3872}
3873
3874#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3875void rtl8180_tx_irq_wq(struct work_struct *work);
3876#else
3877void rtl8180_tx_irq_wq(struct net_device *dev);
3878#endif
3879
3880
3881
3882
3883#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3884void rtl8180_restart_wq(struct work_struct *work);
3885//void rtl8180_rq_tx_ack(struct work_struct *work);
3886#else
3887 void rtl8180_restart_wq(struct net_device *dev);
3888//void rtl8180_rq_tx_ack(struct net_device *dev);
3889#endif
3890#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3891void rtl8180_watch_dog_wq(struct work_struct *work);
3892#else
3893void rtl8180_watch_dog_wq(struct net_device *dev);
3894#endif
3895#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3896void rtl8180_hw_wakeup_wq(struct work_struct *work);
3897#else
3898void rtl8180_hw_wakeup_wq(struct net_device *dev);
3899#endif
3900
3901#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3902void rtl8180_hw_sleep_wq(struct work_struct *work);
3903#else
3904void rtl8180_hw_sleep_wq(struct net_device *dev);
3905#endif
3906
3907
3908
3909#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3910void rtl8180_sw_antenna_wq(struct work_struct *work);
3911#else
3912void rtl8180_sw_antenna_wq(struct net_device *dev);
3913#endif
3914 void rtl8180_watch_dog(struct net_device *dev);
3915void watch_dog_adaptive(unsigned long data)
3916{
3917 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3918// DMESG("---->watch_dog_adaptive()\n");
3919 if(!priv->up)
3920 {
3921 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3922 return;
3923 }
3924
3925 // queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3926//{by amy 080312
3927#if 1
3928 // Tx High Power Mechanism.
3929#ifdef HIGH_POWER
3930 if(CheckHighPower((struct net_device *)data))
3931 {
3932 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3933 }
3934#endif
3935
3936#ifdef CONFIG_RTL818X_S
3937 // Tx Power Tracking on 87SE.
3938#ifdef TX_TRACK
3939 //if( priv->bTxPowerTrack ) //lzm mod 080826
3940 if( CheckTxPwrTracking((struct net_device *)data));
3941 TxPwrTracking87SE((struct net_device *)data);
3942#endif
3943#endif
3944
3945 // Perform DIG immediately.
3946#ifdef SW_DIG
3947 if(CheckDig((struct net_device *)data) == true)
3948 {
3949 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3950 }
3951#endif
3952#endif
3953//by amy 080312}
3954 rtl8180_watch_dog((struct net_device *)data);
3955
3956
3957 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3958
3959 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3960 add_timer(&priv->watch_dog_timer);
3961// DMESG("<----watch_dog_adaptive()\n");
3962}
3963
3964#ifdef ENABLE_DOT11D
3965
3966static CHANNEL_LIST ChannelPlan[] = {
3967 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC
3968 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
3969 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
3970 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI.
3971 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI.
3972 {{14,36,40,44,48,52,56,60,64},9}, //MKK
3973 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
3974 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel.
3975 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC
3976 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
3977 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
3978};
3979
3980static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
3981{
3982 int i;
3983
3984 //lzm add 080826
3985 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
3986 ieee->IbssStartChnl=0;
3987
3988 switch (channel_plan)
3989 {
3990 case COUNTRY_CODE_FCC:
3991 case COUNTRY_CODE_IC:
3992 case COUNTRY_CODE_ETSI:
3993 case COUNTRY_CODE_SPAIN:
3994 case COUNTRY_CODE_FRANCE:
3995 case COUNTRY_CODE_MKK:
3996 case COUNTRY_CODE_MKK1:
3997 case COUNTRY_CODE_ISRAEL:
3998 case COUNTRY_CODE_TELEC:
3999 {
4000 Dot11d_Init(ieee);
4001 ieee->bGlobalDomain = false;
4002 if (ChannelPlan[channel_plan].Len != 0){
4003 // Clear old channel map
4004 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4005 // Set new channel map
4006 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
4007 {
4008 if(ChannelPlan[channel_plan].Channel[i] <= 14)
4009 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
4010 }
4011 }
4012 break;
4013 }
4014 case COUNTRY_CODE_GLOBAL_DOMAIN:
4015 {
4016 GET_DOT11D_INFO(ieee)->bEnabled = 0;
4017 Dot11d_Reset(ieee);
4018 ieee->bGlobalDomain = true;
4019 break;
4020 }
4021 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
4022 {
4023 ieee->MinPassiveChnlNum=12;
4024 ieee->IbssStartChnl= 10;
4025 break;
4026 }
4027 default:
4028 {
4029 Dot11d_Init(ieee);
4030 ieee->bGlobalDomain = false;
4031 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4032 for (i=1;i<=14;i++)
4033 {
4034 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
4035 }
4036 break;
4037 }
4038 }
4039}
4040#endif
4041
4042//Add for RF power on power off by lizhaoming 080512
4043#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4044void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
4045#else
4046void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
4047#endif
4048
4049//YJ,add,080828
4050static void rtl8180_statistics_init(struct Stats *pstats)
4051{
4052 memset(pstats, 0, sizeof(struct Stats));
4053}
4054static void rtl8180_link_detect_init(plink_detect_t plink_detect)
4055{
4056 memset(plink_detect, 0, sizeof(link_detect_t));
4057 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
4058}
4059//YJ,add,080828,end
4060
4061short rtl8180_init(struct net_device *dev)
4062{
4063 struct r8180_priv *priv = ieee80211_priv(dev);
4064 u16 word;
4065 u16 version;
4066 u8 hw_version;
4067 //u8 config3;
4068 u32 usValue;
4069 u16 tmpu16;
4070 int i, j;
4071
4072#ifdef ENABLE_DOT11D
4073#if 0
4074 for(i=0;i<0xFF;i++) {
4075 if(i%16 == 0)
4076 printk("\n[%x]: ", i/16);
4077 printk("\t%4.4x", eprom_read(dev,i));
4078 }
4079#endif
4080 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
4081 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
4082 printk("rtl8180_init:Error channel plan! Set to default.\n");
4083 priv->channel_plan = 0;
4084 }
4085 //priv->channel_plan = 9; //Global Domain
4086
4087 DMESG("Channel plan is %d\n",priv->channel_plan);
4088 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
4089#else
4090 int ch;
4091 //Set Default Channel Plan
4092 if(!channels){
4093 DMESG("No channels, aborting");
4094 return -1;
4095 }
4096 ch=channels;
4097 priv->channel_plan = 0;//hikaru
4098 // set channels 1..14 allowed in given locale
4099 for (i=1; i<=14; i++) {
4100 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
4101 ch >>= 1;
4102 }
4103#endif
4104
4105 //memcpy(priv->stats,0,sizeof(struct Stats));
4106
4107 //FIXME: these constants are placed in a bad pleace.
4108 priv->txbuffsize = 2048;//1024;
4109 priv->txringcount = 32;//32;
4110 priv->rxbuffersize = 2048;//1024;
4111 priv->rxringcount = 64;//32;
4112 priv->txbeaconcount = 2;
4113 priv->rx_skb_complete = 1;
4114 //priv->txnp_pending.ispending=0;
4115 /* ^^ the SKB does not containt a partial RXed
4116 * packet (is empty)
4117 */
4118
4119#ifdef CONFIG_RTL8185B
4120#ifdef CONFIG_RTL818X_S
4121 priv->RegThreeWireMode = HW_THREE_WIRE_SI;
4122#else
4123 priv->RegThreeWireMode = SW_THREE_WIRE;
4124#endif
4125#endif
4126
4127//Add for RF power on power off by lizhaoming 080512
4128 priv->RFChangeInProgress = false;
4129 priv->SetRFPowerStateInProgress = false;
4130 priv->RFProgType = 0;
4131 priv->bInHctTest = false;
4132
4133 priv->irq_enabled=0;
4134
4135//YJ,modified,080828
4136#if 0
4137 priv->stats.rxdmafail=0;
4138 priv->stats.txrdu=0;
4139 priv->stats.rxrdu=0;
4140 priv->stats.rxnolast=0;
4141 priv->stats.rxnodata=0;
4142 //priv->stats.rxreset=0;
4143 //priv->stats.rxwrkaround=0;
4144 priv->stats.rxnopointer=0;
4145 priv->stats.txnperr=0;
4146 priv->stats.txresumed=0;
4147 priv->stats.rxerr=0;
4148 priv->stats.rxoverflow=0;
4149 priv->stats.rxint=0;
4150 priv->stats.txnpokint=0;
4151 priv->stats.txhpokint=0;
4152 priv->stats.txhperr=0;
4153 priv->stats.ints=0;
4154 priv->stats.shints=0;
4155 priv->stats.txoverflow=0;
4156 priv->stats.txbeacon=0;
4157 priv->stats.txbeaconerr=0;
4158 priv->stats.txlperr=0;
4159 priv->stats.txlpokint=0;
4160 priv->stats.txretry=0;//tony 20060601
4161 priv->stats.rxcrcerrmin=0;
4162 priv->stats.rxcrcerrmid=0;
4163 priv->stats.rxcrcerrmax=0;
4164 priv->stats.rxicverr=0;
4165#else
4166 rtl8180_statistics_init(&priv->stats);
4167 rtl8180_link_detect_init(&priv->link_detect);
4168#endif
4169//YJ,modified,080828,end
4170
4171
4172 priv->ack_tx_to_ieee = 0;
4173 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4174 priv->ieee80211->iw_mode = IW_MODE_INFRA;
4175 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
4176 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4177 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
4178 priv->ieee80211->active_scan = 1;
4179 priv->ieee80211->rate = 110; //11 mbps
4180 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
4181 priv->ieee80211->host_encrypt = 1;
4182 priv->ieee80211->host_decrypt = 1;
4183 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
4184 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
4185 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
4186 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
4187
4188 priv->hw_wep = hwwep;
4189 priv->prism_hdr=0;
4190 priv->dev=dev;
4191 priv->retry_rts = DEFAULT_RETRY_RTS;
4192 priv->retry_data = DEFAULT_RETRY_DATA;
4193 priv->RFChangeInProgress = false;
4194 priv->SetRFPowerStateInProgress = false;
4195 priv->RFProgType = 0;
4196 priv->bInHctTest = false;
4197 priv->bInactivePs = true;//false;
4198 priv->ieee80211->bInactivePs = priv->bInactivePs;
4199 priv->bSwRfProcessing = false;
4200 priv->eRFPowerState = eRfOff;
4201 priv->RfOffReason = 0;
4202 priv->LedStrategy = SW_LED_MODE0;
4203 //priv->NumRxOkInPeriod = 0; //YJ,del,080828
4204 //priv->NumTxOkInPeriod = 0; //YJ,del,080828
4205 priv->TxPollingTimes = 0;//lzm add 080826
4206 priv->bLeisurePs = true;
4207 priv->dot11PowerSaveMode = eActive;
4208//by amy for antenna
4209 priv->AdMinCheckPeriod = 5;
4210 priv->AdMaxCheckPeriod = 10;
4211// Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
4212 priv->AdMaxRxSsThreshold = 30;//60->30
4213 priv->AdRxSsThreshold = 20;//50->20
4214 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
4215 priv->AdTickCount = 0;
4216 priv->AdRxSignalStrength = -1;
4217 priv->RegSwAntennaDiversityMechanism = 0;
4218 priv->RegDefaultAntenna = 0;
4219 priv->SignalStrength = 0;
4220 priv->AdRxOkCnt = 0;
4221 priv->CurrAntennaIndex = 0;
4222 priv->AdRxSsBeforeSwitched = 0;
4223 init_timer(&priv->SwAntennaDiversityTimer);
4224 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
4225 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
4226//by amy for antenna
4227//{by amy 080312
4228 priv->bDigMechanism = 1;
4229 priv->InitialGain = 6;
4230 priv->bXtalCalibration = false;
4231 priv->XtalCal_Xin = 0;
4232 priv->XtalCal_Xout = 0;
4233 priv->bTxPowerTrack = false;
4234 priv->ThermalMeter = 0;
4235 priv->FalseAlarmRegValue = 0;
4236 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
4237 priv->DIG_NumberFallbackVote = 0;
4238 priv->DIG_NumberUpgradeVote = 0;
4239 priv->LastSignalStrengthInPercent = 0;
4240 priv->Stats_SignalStrength = 0;
4241 priv->LastRxPktAntenna = 0;
4242 priv->SignalQuality = 0; // in 0-100 index.
4243 priv->Stats_SignalQuality = 0;
4244 priv->RecvSignalPower = 0; // in dBm.
4245 priv->Stats_RecvSignalPower = 0;
4246 priv->AdMainAntennaRxOkCnt = 0;
4247 priv->AdAuxAntennaRxOkCnt = 0;
4248 priv->bHWAdSwitched = false;
4249 priv->bRegHighPowerMechanism = true;
4250 priv->RegHiPwrUpperTh = 77;
4251 priv->RegHiPwrLowerTh = 75;
4252 priv->RegRSSIHiPwrUpperTh = 70;
4253 priv->RegRSSIHiPwrLowerTh = 20;
4254 priv->bCurCCKPkt = false;
4255 priv->UndecoratedSmoothedSS = -1;
4256 priv->bToUpdateTxPwr = false;
4257 priv->CurCCKRSSI = 0;
4258 priv->RxPower = 0;
4259 priv->RSSI = 0;
4260 //YJ,add,080828
4261 priv->NumTxOkTotal = 0;
4262 priv->NumTxUnicast = 0;
4263 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
4264 priv->PowerProfile = POWER_PROFILE_AC;
4265 //YJ,add,080828,end
4266//by amy for rate adaptive
4267 priv->CurrRetryCnt=0;
4268 priv->LastRetryCnt=0;
4269 priv->LastTxokCnt=0;
4270 priv->LastRxokCnt=0;
4271 priv->LastRetryRate=0;
4272 priv->bTryuping=0;
4273 priv->CurrTxRate=0;
4274 priv->CurrRetryRate=0;
4275 priv->TryupingCount=0;
4276 priv->TryupingCountNoData=0;
4277 priv->TryDownCountLowData=0;
4278 priv->LastTxOKBytes=0;
4279 priv->LastFailTxRate=0;
4280 priv->LastFailTxRateSS=0;
4281 priv->FailTxRateCount=0;
4282 priv->LastTxThroughput=0;
4283 priv->NumTxOkBytesTotal=0;
4284 priv->ForcedDataRate = 0;
4285 priv->RegBModeGainStage = 1;
4286
4287//by amy for rate adaptive
4288//by amy 080312}
4289 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4290 spin_lock_init(&priv->irq_lock);
4291 spin_lock_init(&priv->irq_th_lock);
4292 spin_lock_init(&priv->tx_lock);
4293 spin_lock_init(&priv->ps_lock);
4294 spin_lock_init(&priv->rf_ps_lock);
4295 sema_init(&priv->wx_sem,1);
4296 sema_init(&priv->rf_state,1);
4297#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4298 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4299 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4300 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4301 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4302 //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4303 //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4304 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4305 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4306 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4307 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4308
4309 //add for RF power on power off by lizhaoming 080512
4310 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4311#else
4312 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4313 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq,dev);
4314 //INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq,dev);
4315 INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq,dev);
4316 INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq,dev);
4317 //INIT_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq,dev);
4318 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update,priv->ieee80211);
4319 INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);//+by amy 080312
4320 INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);//+by amy 080312
4321 INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);//+by amy 080312
4322
4323 //add for RF power on power off by lizhaoming 080512
4324 INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
4325#endif
4326 //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4327
4328 tasklet_init(&priv->irq_rx_tasklet,
4329 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4330 (unsigned long)priv);
4331//by amy
4332 init_timer(&priv->watch_dog_timer);
4333 priv->watch_dog_timer.data = (unsigned long)dev;
4334 priv->watch_dog_timer.function = watch_dog_adaptive;
4335//by amy
4336
4337//{by amy 080312
4338//by amy for rate adaptive
4339 init_timer(&priv->rateadapter_timer);
4340 priv->rateadapter_timer.data = (unsigned long)dev;
4341 priv->rateadapter_timer.function = timer_rate_adaptive;
4342 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4343 priv->bEnhanceTxPwr=false;
4344//by amy for rate adaptive
4345//by amy 080312}
4346 //priv->ieee80211->func =
4347 // kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4348 //memset(priv->ieee80211->func, 0,
4349 // sizeof(struct ieee80211_helper_functions));
4350
4351 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4352 priv->ieee80211->set_chan = rtl8180_set_chan;
4353 priv->ieee80211->link_change = rtl8180_link_change;
4354 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4355 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4356 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4357
4358 priv->ieee80211->init_wmmparam_flag = 0;
4359
4360 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4361 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4362 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4363
4364#ifdef CONFIG_RTL8185B
4365 priv->MWIEnable = 0;
4366
4367 priv->ShortRetryLimit = 7;
4368 priv->LongRetryLimit = 7;
4369 priv->EarlyRxThreshold = 7;
4370
4371 priv->CSMethod = (0x01 << 29);
4372
4373 priv->TransmitConfig =
4374 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW
4375 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4376 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
4377 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
4378 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4379
4380 priv->ReceiveConfig =
4381#ifdef CONFIG_RTL818X_S
4382#else
4383 priv->CSMethod |
4384#endif
4385// RCR_ENMARP |
4386 RCR_AMF | RCR_ADF | //accept management/data
4387 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4388 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
4389 //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
4390 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4391 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4392 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4393
4394 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4395 IMR_THPDER | IMR_THPDOK |
4396 IMR_TVODER | IMR_TVODOK |
4397 IMR_TVIDER | IMR_TVIDOK |
4398 IMR_TBEDER | IMR_TBEDOK |
4399 IMR_TBKDER | IMR_TBKDOK |
4400 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4401 IMR_RER | IMR_ROK |
4402 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4403
4404 priv->InitialGain = 6;
4405#endif
4406
4407 hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4408
4409 switch (hw_version){
4410#ifdef CONFIG_RTL8185B
4411 case HW_VERID_R8185B_B:
4412#ifdef CONFIG_RTL818X_S
4413 priv->card_8185 = VERSION_8187S_C;
4414 DMESG("MAC controller is a RTL8187SE b/g");
4415 priv->phy_ver = 2;
4416 break;
4417#else
4418 DMESG("MAC controller is a RTL8185B b/g");
4419 priv->card_8185 = 3;
4420 priv->phy_ver = 2;
4421 break;
4422#endif
4423#endif
4424 case HW_VERID_R8185_ABC:
4425 DMESG("MAC controller is a RTL8185 b/g");
4426 priv->card_8185 = 1;
4427 /* you should not find a card with 8225 PHY ver < C*/
4428 priv->phy_ver = 2;
4429 break;
4430
4431 case HW_VERID_R8185_D:
4432 DMESG("MAC controller is a RTL8185 b/g (V. D)");
4433 priv->card_8185 = 2;
4434 /* you should not find a card with 8225 PHY ver < C*/
4435 priv->phy_ver = 2;
4436 break;
4437
4438 case HW_VERID_R8180_ABCD:
4439 DMESG("MAC controller is a RTL8180");
4440 priv->card_8185 = 0;
4441 break;
4442
4443 case HW_VERID_R8180_F:
4444 DMESG("MAC controller is a RTL8180 (v. F)");
4445 priv->card_8185 = 0;
4446 break;
4447
4448 default:
4449 DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4450 priv->card_8185 = 0;
4451 break;
4452 }
4453
4454 if(priv->card_8185){
4455 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4456 priv->ieee80211->short_slot = 1;
4457 }
4458 /* you should not found any 8185 Ver B Card */
4459 priv->card_8185_Bversion = 0;
4460
4461#ifdef CONFIG_RTL8185B
4462#ifdef CONFIG_RTL818X_S
4463 // just for sync 85
4464 priv->card_type = PCI;
4465 DMESG("This is a PCI NIC");
4466#else
4467 config3 = read_nic_byte(dev, CONFIG3);
4468 if(config3 & 0x8){
4469 priv->card_type = CARDBUS;
4470 DMESG("This is a CARDBUS NIC");
4471 }
4472 else if( config3 & 0x4){
4473 priv->card_type = MINIPCI;
4474 DMESG("This is a MINI-PCI NIC");
4475 }else{
4476 priv->card_type = PCI;
4477 DMESG("This is a PCI NIC");
4478 }
4479#endif
4480#endif
4481 priv->enable_gpio0 = 0;
4482
4483//by amy for antenna
4484#ifdef CONFIG_RTL8185B
4485 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4486 DMESG("usValue is 0x%x\n",usValue);
4487#ifdef CONFIG_RTL818X_S
4488 //3Read AntennaDiversity
4489 // SW Antenna Diversity.
4490 if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4491 {
4492 priv->EEPROMSwAntennaDiversity = false;
4493 //printk("EEPROM Disable SW Antenna Diversity\n");
4494 }
4495 else
4496 {
4497 priv->EEPROMSwAntennaDiversity = true;
4498 //printk("EEPROM Enable SW Antenna Diversity\n");
4499 }
4500 // Default Antenna to use.
4501 if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4502 {
4503 priv->EEPROMDefaultAntenna1 = false;
4504 //printk("EEPROM Default Antenna 0\n");
4505 }
4506 else
4507 {
4508 priv->EEPROMDefaultAntenna1 = true;
4509 //printk("EEPROM Default Antenna 1\n");
4510 }
4511
4512 //
4513 // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4514 //
4515 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4516 {// 0: default from EEPROM.
4517 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4518 }
4519 else
4520 {// 1:disable antenna diversity, 2: enable antenna diversity.
4521 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4522 }
4523 //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4524
4525
4526 //
4527 // Default antenna settings. Added by Roger, 2007.11.05.
4528 //
4529 if( priv->RegDefaultAntenna == 0)
4530 {// 0: default from EEPROM.
4531 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4532 }
4533 else
4534 {// 1: main, 2: aux.
4535 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4536 }
4537 //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4538#endif
4539#endif
4540//by amy for antenna
4541 /* rtl8185 can calc plcp len in HW.*/
4542 priv->hw_plcp_len = 1;
4543
4544 priv->plcp_preamble_mode = 2;
4545 /*the eeprom type is stored in RCR register bit #6 */
4546 if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4547 priv->epromtype=EPROM_93c56;
4548 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4549 }else{
4550 priv->epromtype=EPROM_93c46;
4551 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4552 }
4553
4554 dev->get_stats = rtl8180_stats;
4555
4556 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4557 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4558 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4559 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4560 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4561 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4562 //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4563
4564
4565 for(i=1,j=0; i<14; i+=2,j++){
4566
4567 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4568 priv->chtxpwr[i]=word & 0xff;
4569 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4570#ifdef DEBUG_EPROM
4571 DMESG("tx word %x:%x",j,word);
4572 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4573 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4574#endif
4575 }
4576 if(priv->card_8185){
4577 for(i=1,j=0; i<14; i+=2,j++){
4578
4579 word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4580 priv->chtxpwr_ofdm[i]=word & 0xff;
4581 priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4582#ifdef DEBUG_EPROM
4583 DMESG("ofdm tx word %x:%x",j,word);
4584 DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4585 DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4586#endif
4587 }
4588 }
4589//{by amy 080312
4590 //3Read crystal calibtration and thermal meter indication on 87SE.
4591
4592 // By SD3 SY's request. Added by Roger, 2007.12.11.
4593
4594 tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4595
4596 //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4597
4598 // Crystal calibration for Xin and Xout resp.
4599 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4600 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4601 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4602 priv->bXtalCalibration = true;
4603
4604 // Thermal meter reference indication.
4605 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4606 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4607 priv->bTxPowerTrack = true;
4608
4609//by amy 080312}
4610#ifdef CONFIG_RTL8185B
4611 word = eprom_read(dev,EPROM_TXPW_BASE);
4612 priv->cck_txpwr_base = word & 0xf;
4613 priv->ofdm_txpwr_base = (word>>4) & 0xf;
4614#endif
4615
4616 version = eprom_read(dev,EPROM_VERSION);
4617 DMESG("EEPROM version %x",version);
4618 if( (!priv->card_8185) && version < 0x0101){
4619 DMESG ("EEPROM version too old, assuming defaults");
4620 DMESG ("If you see this message *plase* send your \
4621DMESG output to andreamrl@tiscali.it THANKS");
4622 priv->digphy=1;
4623 priv->antb=0;
4624 priv->diversity=1;
4625 priv->cs_treshold=0xc;
4626 priv->rcr_csense=1;
4627 priv->rf_chip=RFCHIPID_PHILIPS;
4628 }else{
4629 if(!priv->card_8185){
4630 u8 rfparam = eprom_read(dev,RF_PARAM);
4631 DMESG("RfParam: %x",rfparam);
4632
4633 priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4634 priv->antb = rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4635
4636 priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4637 RF_PARAM_CARRIERSENSE_SHIFT;
4638
4639 priv->diversity =
4640 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4641 }else{
4642 priv->rcr_csense = 3;
4643 }
4644
4645 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4646
4647 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4648 }
4649
4650#ifdef CONFIG_RTL8185B
4651#ifdef CONFIG_RTL818X_S
4652 priv->rf_chip = RF_ZEBRA4;
4653 priv->rf_sleep = rtl8225z4_rf_sleep;
4654 priv->rf_wakeup = rtl8225z4_rf_wakeup;
4655#else
4656 priv->rf_chip = RF_ZEBRA2;
4657#endif
4658 //DMESG("Card reports RF frontend Realtek 8225z2");
4659 //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4660 //DMESGW("use it with care and at your own risk and");
4661 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4662
4663 priv->rf_close = rtl8225z2_rf_close;
4664 priv->rf_init = rtl8225z2_rf_init;
4665 priv->rf_set_chan = rtl8225z2_rf_set_chan;
4666 priv->rf_set_sens = NULL;
4667 //priv->rf_sleep = rtl8225_rf_sleep;
4668 //priv->rf_wakeup = rtl8225_rf_wakeup;
4669
4670#else
4671 /* check RF frontend chipset */
4672 switch (priv->rf_chip) {
4673
4674 case RFCHIPID_RTL8225:
4675
4676 if(priv->card_8185){
4677 DMESG("Card reports RF frontend Realtek 8225");
4678 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4679 DMESGW("use it with care and at your own risk and");
4680 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4681
4682 priv->rf_close = rtl8225_rf_close;
4683 priv->rf_init = rtl8225_rf_init;
4684 priv->rf_set_chan = rtl8225_rf_set_chan;
4685 priv->rf_set_sens = NULL;
4686 priv->rf_sleep = rtl8225_rf_sleep;
4687 priv->rf_wakeup = rtl8225_rf_wakeup;
4688
4689 }else{
4690 DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
4691 DMESGW("This could not be... something went wrong....");
4692 return -ENODEV;
4693 }
4694 break;
4695
4696 case RFCHIPID_RTL8255:
4697 if(priv->card_8185){
4698 DMESG("Card reports RF frontend Realtek 8255");
4699 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4700 DMESGW("use it with care and at your own risk and");
4701 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4702
4703 priv->rf_close = rtl8255_rf_close;
4704 priv->rf_init = rtl8255_rf_init;
4705 priv->rf_set_chan = rtl8255_rf_set_chan;
4706 priv->rf_set_sens = NULL;
4707 priv->rf_sleep = NULL;
4708 priv->rf_wakeup = NULL;
4709
4710 }else{
4711 DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
4712 DMESGW("This could not be... something went wrong....");
4713 return -ENODEV;
4714 }
4715 break;
4716
4717
4718 case RFCHIPID_INTERSIL:
4719 DMESGW("Card reports RF frontend by Intersil.");
4720 DMESGW("This driver has NO support for this chipset.");
4721 return -ENODEV;
4722 break;
4723
4724 case RFCHIPID_RFMD:
4725 DMESGW("Card reports RF frontend by RFMD.");
4726 DMESGW("This driver has NO support for this chipset.");
4727 return -ENODEV;
4728 break;
4729
4730 case RFCHIPID_GCT:
4731 DMESGW("Card reports RF frontend by GCT.");
4732 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4733 DMESGW("use it with care and at your own risk and");
4734 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4735 priv->rf_close = gct_rf_close;
4736 priv->rf_init = gct_rf_init;
4737 priv->rf_set_chan = gct_rf_set_chan;
4738 priv->rf_set_sens = NULL;
4739 priv->rf_sleep = NULL;
4740 priv->rf_wakeup = NULL;
4741 break;
4742
4743 case RFCHIPID_MAXIM:
4744 DMESGW("Card reports RF frontend by MAXIM.");
4745 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4746 DMESGW("use it with care and at your own risk and");
4747 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4748 priv->rf_close = maxim_rf_close;
4749 priv->rf_init = maxim_rf_init;
4750 priv->rf_set_chan = maxim_rf_set_chan;
4751 priv->rf_set_sens = NULL;
4752 priv->rf_sleep = NULL;
4753 priv->rf_wakeup = NULL;
4754 break;
4755
4756 case RFCHIPID_PHILIPS:
4757 DMESG("Card reports RF frontend by Philips.");
4758 DMESG("OK! Philips SA2400 radio chipset is supported.");
4759 priv->rf_close = sa2400_rf_close;
4760 priv->rf_init = sa2400_rf_init;
4761 priv->rf_set_chan = sa2400_rf_set_chan;
4762 priv->rf_set_sens = sa2400_rf_set_sens;
4763 priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
4764 priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
4765 priv->rf_sleep = NULL;
4766 priv->rf_wakeup = NULL;
4767
4768 if(priv->digphy){
4769 DMESGW("Digital PHY found");
4770 DMESGW("Philips DIGITAL PHY is untested! *Please*\
4771 report success/failure to <andreamrl@tiscali.it>");
4772 }else{
4773 DMESG ("Analog PHY found");
4774 }
4775
4776 break;
4777
4778 default:
4779 DMESGW("Unknown RF module %x",priv->rf_chip);
4780 DMESGW("Exiting...");
4781 return -1;
4782
4783 }
4784#endif
4785
4786
4787 if(!priv->card_8185){
4788 if(priv->antb)
4789 DMESG ("Antenna B is default antenna");
4790 else
4791 DMESG ("Antenna A is default antenna");
4792
4793 if(priv->diversity)
4794 DMESG ("Antenna diversity is enabled");
4795 else
4796 DMESG("Antenna diversity is disabled");
4797
4798 DMESG("Carrier sense %d",priv->rcr_csense);
4799 }
4800
4801 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4802 return -ENOMEM;
4803
4804 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4805 TX_MANAGEPRIORITY_RING_ADDR))
4806 return -ENOMEM;
4807
4808 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4809 TX_BKPRIORITY_RING_ADDR))
4810 return -ENOMEM;
4811
4812 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4813 TX_BEPRIORITY_RING_ADDR))
4814 return -ENOMEM;
4815
4816 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4817 TX_VIPRIORITY_RING_ADDR))
4818 return -ENOMEM;
4819
4820 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4821 TX_VOPRIORITY_RING_ADDR))
4822 return -ENOMEM;
4823
4824 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4825 TX_HIGHPRIORITY_RING_ADDR))
4826 return -ENOMEM;
4827
4828 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4829 TX_BEACON_RING_ADDR))
4830 return -ENOMEM;
4831
4832
4833 //priv->beacon_buf=NULL;
4834
4835 if(!priv->card_8185){
4836
4837 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4838 DMESG ("40-bit WEP is supported in hardware");
4839 else
4840 DMESG ("40-bit WEP is NOT supported in hardware");
4841
4842 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4843 DMESG ("104-bit WEP is supported in hardware");
4844 else
4845 DMESG ("104-bit WEP is NOT supported in hardware");
4846 }
4847#if !defined(SA_SHIRQ)
4848 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4849#else
4850 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4851#endif
4852 DMESGE("Error allocating IRQ %d",dev->irq);
4853 return -1;
4854 }else{
4855 priv->irq=dev->irq;
4856 DMESG("IRQ %d",dev->irq);
4857 }
4858
4859#ifdef DEBUG_EPROM
4860 dump_eprom(dev);
4861#endif
4862
4863 return 0;
4864
4865}
4866
4867
4868void rtl8180_no_hw_wep(struct net_device *dev)
4869{
4870 struct r8180_priv *priv = ieee80211_priv(dev);
4871
4872 if(!priv->card_8185)
4873 {
4874 u8 security;
4875
4876 security = read_nic_byte(dev, SECURITY);
4877 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4878 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4879
4880 write_nic_byte(dev, SECURITY, security);
4881
4882 }else{
4883
4884 //FIXME!!!
4885 }
4886 /*
4887 write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4888 (1<<TX_NOICV_SHIFT) );
4889 */
4890// priv->ieee80211->hw_wep=0;
4891}
4892
4893
4894void rtl8180_set_hw_wep(struct net_device *dev)
4895{
4896 struct r8180_priv *priv = ieee80211_priv(dev);
4897 u8 pgreg;
4898 u8 security;
4899 u32 key0_word4;
4900
4901 pgreg=read_nic_byte(dev, PGSELECT);
4902 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4903
4904 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4905 key0_word4 &= ~ 0xff;
4906 key0_word4 |= priv->key0[3]& 0xff;
4907 write_nic_dword(dev,KEY0,(priv->key0[0]));
4908 write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4909 write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4910 write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4911
4912 /*
4913 TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4914 */
4915
4916 security = read_nic_byte(dev,SECURITY);
4917 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4918 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4919 security &= ~ SECURITY_ENCRYP_MASK;
4920 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4921
4922 write_nic_byte(dev, SECURITY, security);
4923
4924 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4925 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4926 read_nic_dword(dev,KEY0));
4927
4928 //priv->ieee80211->hw_wep=1;
4929}
4930
4931
4932void rtl8185_rf_pins_enable(struct net_device *dev)
4933{
4934// u16 tmp;
4935// tmp = read_nic_word(dev, RFPinsEnable);
4936 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4937// write_nic_word(dev, RFPinsEnable,7 | tmp);
4938}
4939
4940
4941void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4942{
4943 u8 conf3;
4944
4945 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4946
4947 conf3 = read_nic_byte(dev, CONFIG3);
4948 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4949 write_nic_dword(dev, ANAPARAM2, a);
4950
4951 conf3 = read_nic_byte(dev, CONFIG3);
4952 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4953 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4954
4955}
4956
4957
4958void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4959{
4960 u8 conf3;
4961
4962 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4963
4964 conf3 = read_nic_byte(dev, CONFIG3);
4965 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4966 write_nic_dword(dev, ANAPARAM, a);
4967
4968 conf3 = read_nic_byte(dev, CONFIG3);
4969 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4970 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4971}
4972
4973
4974void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
4975{
4976 write_nic_byte(dev, TX_ANTENNA, ant);
4977 force_pci_posting(dev);
4978 mdelay(1);
4979}
4980
4981
4982void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
4983{
4984 //u8 phyr;
4985 u32 phyw;
4986 //int i;
4987
4988 adr |= 0x80;
4989
4990 phyw= ((data<<8) | adr);
4991#if 0
4992
4993 write_nic_dword(dev, PHY_ADR, phyw);
4994
4995 //read_nic_dword(dev, PHY_ADR);
4996 for(i=0;i<10;i++){
4997 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
4998 phyr = read_nic_byte(dev, PHY_READ);
4999 if(phyr == (data&0xff)) break;
5000
5001 }
5002#else
5003 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
5004 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
5005 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
5006 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
5007 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
5008#endif
5009 /* this is ok to fail when we write AGC table. check for AGC table might be
5010 * done by masking with 0x7f instead of 0xff
5011 */
5012 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
5013}
5014
5015
5016inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
5017{
5018 data = data & 0xff;
5019 rtl8185_write_phy(dev, adr, data);
5020}
5021
5022
5023void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
5024{
5025 data = data & 0xff;
5026 rtl8185_write_phy(dev, adr, data | 0x10000);
5027}
5028
5029
5030/* 70*3 = 210 ms
5031 * I hope this is enougth
5032 */
5033#define MAX_PHY 70
5034void write_phy(struct net_device *dev, u8 adr, u8 data)
5035{
5036 u32 phy;
5037 int i;
5038
5039 phy = 0xff0000;
5040 phy |= adr;
5041 phy |= 0x80; /* this should enable writing */
5042 phy |= (data<<8);
5043
5044 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword
5045 write_nic_dword(dev,PHY_ADR, phy);
5046
5047 phy= 0xffff00;
5048 phy |= adr;
5049
5050 write_nic_dword(dev,PHY_ADR, phy);
5051 for(i=0;i<MAX_PHY;i++){
5052 phy=read_nic_dword(dev,PHY_ADR);
5053 phy= phy & 0xff0000;
5054 phy= phy >> 16;
5055 if(phy == data){ //SUCCESS!
5056 force_pci_posting(dev);
5057 mdelay(3); //random value
5058#ifdef DEBUG_BB
5059 DMESG("Phy wr %x,%x",adr,data);
5060#endif
5061 return;
5062 }else{
5063 force_pci_posting(dev);
5064 mdelay(3); //random value
5065 }
5066 }
5067 DMESGW ("Phy writing %x %x failed!", adr,data);
5068}
5069
5070void rtl8185_set_rate(struct net_device *dev)
5071{
5072 int i;
5073 u16 word;
5074 int basic_rate,min_rr_rate,max_rr_rate;
5075
5076// struct r8180_priv *priv = ieee80211_priv(dev);
5077
5078 //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
5079// priv->ieee80211->state == IEEE80211_LINKED){
5080 basic_rate = ieeerate2rtlrate(240);
5081 min_rr_rate = ieeerate2rtlrate(60);
5082 max_rr_rate = ieeerate2rtlrate(240);
5083
5084//
5085// }else{
5086// basic_rate = ieeerate2rtlrate(20);
5087// min_rr_rate = ieeerate2rtlrate(10);
5088// max_rr_rate = ieeerate2rtlrate(110);
5089// }
5090
5091 write_nic_byte(dev, RESP_RATE,
5092 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
5093
5094 word = read_nic_word(dev, BRSR);
5095 word &= ~BRSR_MBR_8185;
5096
5097
5098 for(i=0;i<=basic_rate;i++)
5099 word |= (1<<i);
5100
5101 write_nic_word(dev, BRSR, word);
5102 //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
5103}
5104
5105
5106
5107void rtl8180_adapter_start(struct net_device *dev)
5108{
5109 struct r8180_priv *priv = ieee80211_priv(dev);
5110 u32 anaparam;
5111 u16 word;
5112 u8 config3;
5113// int i;
5114
5115 rtl8180_rtx_disable(dev);
5116 rtl8180_reset(dev);
5117
5118 /* seems that 0xffff or 0xafff will cause
5119 * HW interrupt line crash
5120 */
5121
5122 //priv->irq_mask = 0xafff;
5123// priv->irq_mask = 0x4fcf;
5124
5125 /* enable beacon timeout, beacon TX ok and err
5126 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
5127 * RX ok and ERR, and GP timer */
5128 priv->irq_mask = 0x6fcf;
5129
5130 priv->dma_poll_mask = 0;
5131
5132 rtl8180_beacon_tx_disable(dev);
5133
5134 if(priv->card_type == CARDBUS ){
5135 config3=read_nic_byte(dev, CONFIG3);
5136 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
5137 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
5138 read_nic_word(dev, FEMR));
5139 }
5140 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5141 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
5142 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
5143 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5144
5145 rtl8180_update_msr(dev);
5146
5147 if(!priv->card_8185){
5148 anaparam = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
5149 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
5150
5151 rtl8180_set_anaparam(dev,anaparam);
5152 }
5153 /* These might be unnecessary since we do in rx_enable / tx_enable */
5154 fix_rx_fifo(dev);
5155 fix_tx_fifo(dev);
5156 /*set_nic_rxring(dev);
5157 set_nic_txring(dev);*/
5158
5159 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5160
5161 /*
5162 The following is very strange. seems to be that 1 means test mode,
5163 but we need to acknolwledges the nic when a packet is ready
5164 altought we set it to 0
5165 */
5166
5167 write_nic_byte(dev,
5168 CONFIG2, read_nic_byte(dev,CONFIG2) &~\
5169 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
5170 //^the nic isn't in test mode
5171 if(priv->card_8185)
5172 write_nic_byte(dev,
5173 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
5174
5175 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5176
5177 write_nic_dword(dev,INT_TIMEOUT,0);
5178#ifdef DEBUG_REGISTERS
5179 rtl8180_dump_reg(dev);
5180#endif
5181
5182 if(!priv->card_8185)
5183 {
5184 /*
5185 experimental - this might be needed to calibrate AGC,
5186 anyway it shouldn't hurt
5187 */
5188 write_nic_byte(dev, CONFIG5,
5189 read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
5190 read_nic_byte(dev, CONFIG5);
5191 udelay(15);
5192 write_nic_byte(dev, CONFIG5,
5193 read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
5194 }else{
5195
5196 write_nic_byte(dev, WPA_CONFIG, 0);
5197 //write_nic_byte(dev, TESTR, 0xd);
5198 }
5199
5200 rtl8180_no_hw_wep(dev);
5201
5202 if(priv->card_8185){
5203 rtl8185_set_rate(dev);
5204 write_nic_byte(dev, RATE_FALLBACK, 0x81);
5205 // write_nic_byte(dev, 0xdf, 0x15);
5206 }else{
5207 word = read_nic_word(dev, BRSR);
5208 word &= ~BRSR_MBR;
5209 word &= ~BRSR_BPLCP;
5210 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
5211//by amy
5212 word |= 0x0f;
5213//by amy
5214 write_nic_word(dev, BRSR, word);
5215 }
5216
5217
5218 if(priv->card_8185){
5219 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
5220
5221 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
5222 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5223 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
5224|(1<<CONFIG3_CLKRUN_SHIFT));
5225 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5226
5227 }
5228
5229 priv->rf_init(dev);
5230
5231 if(priv->rf_set_sens != NULL)
5232 priv->rf_set_sens(dev,priv->sens);
5233 rtl8180_irq_enable(dev);
5234
5235 netif_start_queue(dev);
5236 /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
5237
5238 DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
5239
5240 DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
5241 if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
5242 if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
5243 if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
5244}
5245
5246
5247
5248/* this configures registers for beacon tx and enables it via
5249 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
5250 * be used to stop beacon transmission
5251 */
5252void rtl8180_start_tx_beacon(struct net_device *dev)
5253{
5254// struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5255 u16 word;
5256// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5257
5258 DMESG("Enabling beacon TX");
5259 //write_nic_byte(dev, 0x42,0xe6);// TCR
5260// set_nic_txring(dev);
5261// fix_tx_fifo(dev);
5262 rtl8180_prepare_beacon(dev);
5263 rtl8180_irq_disable(dev);
5264 rtl8180_beacon_tx_enable(dev);
5265#if 0
5266 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5267 //write_nic_byte(dev,0x9d,0x20); //DMA Poll
5268 //write_nic_word(dev,0x7a,0);
5269 //write_nic_word(dev,0x7a,0x8000);
5270
5271#if 0
5272 word = read_nic_word(dev, BcnItv);
5273 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
5274 word |= priv->ieee80211->current_network.beacon_interval;//0x64;
5275 write_nic_word(dev, BcnItv, word);
5276#endif
5277#endif
5278 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
5279 write_nic_word(dev, AtimWnd,word);// word |=
5280//priv->ieee80211->current_network.atim_window);
5281
5282 word = read_nic_word(dev, BintrItv);
5283 word &= ~BintrItv_BintrItv;
5284 word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
5285 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
5286 // FIXME: check if correct ^^ worked with 0x3e8;
5287 */
5288 write_nic_word(dev, BintrItv, word);
5289
5290
5291 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5292
5293// rtl8180_beacon_tx_enable(dev);
5294#ifdef CONFIG_RTL8185B
5295 rtl8185b_irq_enable(dev);
5296#else
5297 rtl8180_irq_enable(dev);
5298#endif
5299 /* VV !!!!!!!!!! VV*/
5300 /*
5301 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5302 write_nic_byte(dev,0x9d,0x00);
5303 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5304*/
5305// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5306
5307}
5308
5309
5310
5311/***************************************************************************
5312 -------------------------------NET STUFF---------------------------
5313***************************************************************************/
5314static struct net_device_stats *rtl8180_stats(struct net_device *dev)
5315{
5316 struct r8180_priv *priv = ieee80211_priv(dev);
5317
5318 return &priv->ieee80211->stats;
5319}
5320//
5321// Change current and default preamble mode.
5322// 2005.01.06, by rcnjko.
5323//
5324bool
5325MgntActSet_802_11_PowerSaveMode(
5326 struct r8180_priv *priv,
5327 RT_PS_MODE rtPsMode
5328)
5329{
5330
5331 // Currently, we do not change power save mode on IBSS mode.
5332 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5333 {
5334 return false;
5335 }
5336
5337 //
5338 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
5339 // some AP will not response to our mgnt frames with PwrMgt bit set,
5340 // e.g. cannot associate the AP.
5341 // So I commented out it. 2005.02.16, by rcnjko.
5342 //
5343// // Change device's power save mode.
5344// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
5345
5346 // Update power save mode configured.
5347// priv->dot11PowerSaveMode = rtPsMode;
5348 priv->ieee80211->ps = rtPsMode;
5349 // Determine ListenInterval.
5350#if 0
5351 if(priv->dot11PowerSaveMode == eMaxPs)
5352 {
5353 priv->ieee80211->ListenInterval = 10;
5354 }
5355 else
5356 {
5357 priv->ieee80211->ListenInterval = 2;
5358 }
5359#endif
5360 return true;
5361}
5362
5363//================================================================================
5364// Leisure Power Save in linked state.
5365//================================================================================
5366
5367//
5368// Description:
5369// Enter the leisure power save mode.
5370//
5371void
5372LeisurePSEnter(
5373 struct r8180_priv *priv
5374 )
5375{
5376 if (priv->bLeisurePs)
5377 {
5378 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
5379 {
5380 //printk("----Enter PS\n");
5381 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
5382 }
5383 }
5384}
5385
5386
5387//
5388// Description:
5389// Leave the leisure power save mode.
5390//
5391void
5392LeisurePSLeave(
5393 struct r8180_priv *priv
5394 )
5395{
5396 if (priv->bLeisurePs)
5397 {
5398 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
5399 {
5400 //printk("----Leave PS\n");
5401 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
5402 }
5403 }
5404}
5405#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5406void rtl8180_hw_wakeup_wq (struct work_struct *work)
5407{
5408// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5409// struct ieee80211_device * ieee = (struct ieee80211_device*)
5410// container_of(work, struct ieee80211_device, watch_dog_wq);
bf6aede7 5411 struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 5412 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
5413 struct net_device *dev = ieee->dev;
5414#else
5415void rtl8180_hw_wakeup_wq(struct net_device *dev)
5416{
5417 struct r8180_priv *priv = ieee80211_priv(dev);
5418#endif
5419
5420// printk("dev is %d\n",dev);
d599edca 5421// printk("&*&(^*(&(&=========>%s()\n", __func__);
c8d86be3
GKH		 5422 rtl8180_hw_wakeup(dev);
5423
5424}
5425
5426#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5427void rtl8180_hw_sleep_wq (struct work_struct *work)
5428{
5429// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5430// struct ieee80211_device * ieee = (struct ieee80211_device*)
5431// container_of(work, struct ieee80211_device, watch_dog_wq);
bf6aede7 5432 struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 5433 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
5434 struct net_device *dev = ieee->dev;
5435#else
5436void rtl8180_hw_sleep_wq(struct net_device *dev)
5437{
5438 struct r8180_priv *priv = ieee80211_priv(dev);
5439#endif
5440
5441 rtl8180_hw_sleep_down(dev);
5442}
5443
5444//YJ,add,080828,for KeepAlive
5445static void MgntLinkKeepAlive(struct r8180_priv *priv )
5446{
5447 if (priv->keepAliveLevel == 0)
5448 return;
5449
5450 if(priv->ieee80211->state == IEEE80211_LINKED)
5451 {
5452 //
5453 // Keep-Alive.
5454 //
5455 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
5456
5457 if ( (priv->keepAliveLevel== 2) ||
5458 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
5459 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
5460 )
5461 {
5462 priv->link_detect.IdleCount++;
5463
5464 //
5465 // Send a Keep-Alive packet packet to AP if we had been idle for a while.
5466 //
5467 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
5468 {
5469 priv->link_detect.IdleCount = 0;
5470 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5471 }
5472 }
5473 else
5474 {
5475 priv->link_detect.IdleCount = 0;
5476 }
5477 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5478 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5479 }
5480}
5481//YJ,add,080828,for KeepAlive,end
5482
5483static u8 read_acadapter_file(char *filename);
5484void rtl8180_watch_dog(struct net_device *dev)
5485{
5486 struct r8180_priv *priv = ieee80211_priv(dev);
5487 bool bEnterPS = false;
5488 bool bBusyTraffic = false;
5489 u32 TotalRxNum = 0;
5490 u16 SlotIndex = 0;
5491 u16 i = 0;
5492#ifdef ENABLE_IPS
5493 if(priv->ieee80211->actscanning == false){
5494 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5495 IPSEnter(dev);
5496 }
5497 }
5498#endif
5499 //YJ,add,080828,for link state check
5500 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5501 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5502 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5503 for( i=0; i<priv->link_detect.SlotNum; i++ )
5504 TotalRxNum+= priv->link_detect.RxFrameNum[i];
5505 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5506 if(TotalRxNum == 0){
5507 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5508 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5509 }
5510 }
5511
5512 //YJ,add,080828,for KeepAlive
5513 MgntLinkKeepAlive(priv);
5514
5515 //YJ,add,080828,for LPS
5516#ifdef ENABLE_LPS
5517 if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5518 {
5519 //Turn on LeisurePS on battery power
5520 //printk("!!!!!On battery power\n");
5521 priv->bLeisurePs = true;
5522 }
5523 else if(priv->PowerProfile == POWER_PROFILE_AC )
5524 {
5525 // Turn off LeisurePS on AC power
5526 //printk("----On AC power\n");
5527 LeisurePSLeave(priv);
5528 priv->bLeisurePs= false;
5529 }
5530#endif
5531
5532#if 0
5533#ifndef ENABLE_LPS
5534 if(priv->ieee80211->state == IEEE80211_LINKED){
5535 if( priv->NumRxOkInPeriod> 666 ||
5536 priv->NumTxOkInPeriod > 666 ) {
5537 bBusyTraffic = true;
5538 }
5539 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5540 bEnterPS= true;
5541 }
5542 if(bEnterPS) {
5543 LeisurePSEnter(priv);
5544 }
5545 else {
5546 LeisurePSLeave(priv);
5547 }
5548 }
5549 else {
5550 LeisurePSLeave(priv);
5551 }
5552#endif
5553 priv->NumRxOkInPeriod = 0;
5554 priv->NumTxOkInPeriod = 0;
5555 priv->ieee80211->NumRxData = 0;
5556#else
5557#ifdef ENABLE_LPS
5558 if(priv->ieee80211->state == IEEE80211_LINKED){
5559 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5560 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5561 if( priv->link_detect.NumRxOkInPeriod> 666 ||
5562 priv->link_detect.NumTxOkInPeriod> 666 ) {
5563 bBusyTraffic = true;
5564 }
5565 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5566 || (priv->link_detect.NumRxOkInPeriod > 2)) {
5567 bEnterPS= false;
5568 }
5569 else {
5570 bEnterPS= true;
5571 }
5572
5573 if(bEnterPS) {
5574 LeisurePSEnter(priv);
5575 }
5576 else {
5577 LeisurePSLeave(priv);
5578 }
5579 }
5580 else{
5581 LeisurePSLeave(priv);
5582 }
5583#endif
5584 priv->link_detect.bBusyTraffic = bBusyTraffic;
5585 priv->link_detect.NumRxOkInPeriod = 0;
5586 priv->link_detect.NumTxOkInPeriod = 0;
5587 priv->ieee80211->NumRxDataInPeriod = 0;
5588 priv->ieee80211->NumRxBcnInPeriod = 0;
5589#endif
5590}
5591int _rtl8180_up(struct net_device *dev)
5592{
5593 struct r8180_priv *priv = ieee80211_priv(dev);
5594 //int i;
5595
5596 priv->up=1;
5597
5598 DMESG("Bringing up iface");
5599#ifdef CONFIG_RTL8185B
5600 rtl8185b_adapter_start(dev);
5601 rtl8185b_rx_enable(dev);
5602 rtl8185b_tx_enable(dev);
5603#else
5604 rtl8180_adapter_start(dev);
5605 rtl8180_rx_enable(dev);
5606 rtl8180_tx_enable(dev);
5607#endif
5608#ifdef ENABLE_IPS
5609 if(priv->bInactivePs){
5610 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5611 IPSLeave(dev);
5612 }
5613#endif
5614//by amy 080312
5615#ifdef RATE_ADAPT
5616 timer_rate_adaptive((unsigned long)dev);
5617#endif
5618//by amy 080312
5619 watch_dog_adaptive((unsigned long)dev);
5620#ifdef SW_ANTE
5621 if(priv->bSwAntennaDiverity)
5622 SwAntennaDiversityTimerCallback(dev);
5623#endif
5624// IPSEnter(dev);
5625 ieee80211_softmac_start_protocol(priv->ieee80211);
5626
5627//Add for RF power on power off by lizhaoming 080512
5628// priv->eRFPowerState = eRfOn;
5629// printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5630// queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5631
5632 return 0;
5633}
5634
5635
5636int rtl8180_open(struct net_device *dev)
5637{
5638 struct r8180_priv *priv = ieee80211_priv(dev);
5639 int ret;
5640
5641 down(&priv->wx_sem);
5642 ret = rtl8180_up(dev);
5643 up(&priv->wx_sem);
5644 return ret;
5645
5646}
5647
5648
5649int rtl8180_up(struct net_device *dev)
5650{
5651 struct r8180_priv *priv = ieee80211_priv(dev);
5652
5653 if (priv->up == 1) return -1;
5654
5655 return _rtl8180_up(dev);
5656}
5657
5658
5659int rtl8180_close(struct net_device *dev)
5660{
5661 struct r8180_priv *priv = ieee80211_priv(dev);
5662 int ret;
5663
5664 down(&priv->wx_sem);
5665 ret = rtl8180_down(dev);
5666 up(&priv->wx_sem);
5667
5668 return ret;
5669
5670}
5671
5672int rtl8180_down(struct net_device *dev)
5673{
5674 struct r8180_priv *priv = ieee80211_priv(dev);
5675
5676 if (priv->up == 0) return -1;
5677
5678 priv->up=0;
5679
5680 ieee80211_softmac_stop_protocol(priv->ieee80211);
5681 /* FIXME */
5682 if (!netif_queue_stopped(dev))
5683 netif_stop_queue(dev);
5684 rtl8180_rtx_disable(dev);
5685 rtl8180_irq_disable(dev);
5686 del_timer_sync(&priv->watch_dog_timer);
5687 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5688//{by amy 080312
5689 del_timer_sync(&priv->rateadapter_timer);
5690 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5691//by amy 080312}
5692 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5693 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5694 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5695 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5696 del_timer_sync(&priv->SwAntennaDiversityTimer);
5697 SetZebraRFPowerState8185(dev,eRfOff);
5698 //ieee80211_softmac_stop_protocol(priv->ieee80211);
5699 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5700 priv->ieee80211->state = IEEE80211_NOLINK;
5701 return 0;
5702}
5703
5704#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5705void rtl8180_restart_wq(struct work_struct *work)
5706{
5707 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5708 struct net_device *dev = priv->dev;
5709#else
5710void rtl8180_restart_wq(struct net_device *dev)
5711{
5712 struct r8180_priv *priv = ieee80211_priv(dev);
5713#endif
5714 down(&priv->wx_sem);
5715
5716 rtl8180_commit(dev);
5717
5718 up(&priv->wx_sem);
5719}
5720
5721void rtl8180_restart(struct net_device *dev)
5722{
5723 struct r8180_priv *priv = ieee80211_priv(dev);
5724 //rtl8180_commit(dev);
5725 schedule_work(&priv->reset_wq);
5726 //DMESG("TXTIMEOUT");
5727}
5728
5729
5730void rtl8180_commit(struct net_device *dev)
5731{
5732 struct r8180_priv *priv = ieee80211_priv(dev);
5733
5734 if (priv->up == 0) return ;
5735//+by amy 080312
5736 del_timer_sync(&priv->watch_dog_timer);
5737 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5738//{by amy 080312
5739//by amy for rate adaptive
5740 del_timer_sync(&priv->rateadapter_timer);
5741 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5742//by amy for rate adaptive
5743//by amy 080312}
5744 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5745 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5746 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5747 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5748 del_timer_sync(&priv->SwAntennaDiversityTimer);
5749 ieee80211_softmac_stop_protocol(priv->ieee80211);
5750 rtl8180_irq_disable(dev);
5751 rtl8180_rtx_disable(dev);
5752 _rtl8180_up(dev);
5753}
5754
5755
5756static void r8180_set_multicast(struct net_device *dev)
5757{
5758 struct r8180_priv *priv = ieee80211_priv(dev);
5759 short promisc;
5760
5761 //down(&priv->wx_sem);
5762
5763 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5764
5765 if (promisc != priv->promisc)
5766 rtl8180_restart(dev);
5767
5768 priv->promisc = promisc;
5769
5770 //up(&priv->wx_sem);
5771}
5772
5773#if 0
5774/* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5775int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5776{
5777 struct r8180_priv *priv = ieee80211_priv(dev);
5778 int ret;
5779 unsigned long flags;
5780
5781 spin_lock_irqsave(&priv->tx_lock,flags);
5782 ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5783 spin_unlock_irqrestore(&priv->tx_lock,flags);
5784 return ret;
5785}
5786#endif
5787
5788int r8180_set_mac_adr(struct net_device *dev, void *mac)
5789{
5790 struct r8180_priv *priv = ieee80211_priv(dev);
5791 struct sockaddr *addr = mac;
5792
5793 down(&priv->wx_sem);
5794
5795 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5796
5797 if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5798 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5799
5800 if (priv->up) {
5801 rtl8180_down(dev);
5802 rtl8180_up(dev);
5803 }
5804
5805 up(&priv->wx_sem);
5806
5807 return 0;
5808}
5809
5810/* based on ipw2200 driver */
5811int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5812{
5813 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5814
5815 struct iwreq *wrq = (struct iwreq *) rq;
5816 int ret=-1;
5817 switch (cmd) {
5818 case RTL_IOCTL_WPA_SUPPLICANT:
5819 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5820 return ret;
5821
5822 default:
5823 return -EOPNOTSUPP;
5824 }
5825
5826 return -EOPNOTSUPP;
5827}
5828
5829
5830
5831/****************************************************************************
5832 -----------------------------PCI STUFF---------------------------
5833*****************************************************************************/
5834
5835
5836static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5837 const struct pci_device_id *id)
5838{
5839 unsigned long ioaddr = 0;
5840 struct net_device *dev = NULL;
5841 struct r8180_priv *priv= NULL;
5842 //u8 *ptr;
5843 u8 unit = 0;
5844
5845#ifdef CONFIG_RTL8180_IO_MAP
5846 unsigned long pio_start, pio_len, pio_flags;
5847#else
5848 unsigned long pmem_start, pmem_len, pmem_flags;
5849#endif //end #ifdef RTL_IO_MAP
5850
5851 DMESG("Configuring chip resources");
5852
5853 if( pci_enable_device (pdev) ){
5854 DMESG("Failed to enable PCI device");
5855 return -EIO;
5856 }
5857
5858 pci_set_master(pdev);
5859 //pci_set_wmi(pdev);
5860 pci_set_dma_mask(pdev, 0xffffff00ULL);
5861 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5862 dev = alloc_ieee80211(sizeof(struct r8180_priv));
5863 if (!dev)
5864 return -ENOMEM;
5865 priv = ieee80211_priv(dev);
5866 priv->ieee80211 = netdev_priv(dev);
5867
5868#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
5869 SET_MODULE_OWNER(dev);
5870#endif
5871 pci_set_drvdata(pdev, dev);
5872 SET_NETDEV_DEV(dev, &pdev->dev);
5873
5874 priv = ieee80211_priv(dev);
5875// memset(priv,0,sizeof(struct r8180_priv));
5876 priv->pdev=pdev;
5877
5878
5879#ifdef CONFIG_RTL8180_IO_MAP
5880
5881 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5882 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5883 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5884
5885 if (!(pio_flags & IORESOURCE_IO)) {
5886 DMESG("region #0 not a PIO resource, aborting");
5887 goto fail;
5888 }
5889
5890 //DMESG("IO space @ 0x%08lx", pio_start );
5891 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5892 DMESG("request_region failed!");
5893 goto fail;
5894 }
5895
5896 ioaddr = pio_start;
5897 dev->base_addr = ioaddr; // device I/O address
5898
5899#else
5900
5901 pmem_start = pci_resource_start(pdev, 1);
5902 pmem_len = pci_resource_len(pdev, 1);
5903 pmem_flags = pci_resource_flags (pdev, 1);
5904
5905 if (!(pmem_flags & IORESOURCE_MEM)) {
5906 DMESG("region #1 not a MMIO resource, aborting");
5907 goto fail;
5908 }
5909
5910 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5911 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5912 DMESG("request_mem_region failed!");
5913 goto fail;
5914 }
5915
5916
5917 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5918 if( ioaddr == (unsigned long)NULL ){
5919 DMESG("ioremap failed!");
5920 // release_mem_region( pmem_start, pmem_len );
5921 goto fail1;
5922 }
5923
5924 dev->mem_start = ioaddr; // shared mem start
5925 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5926
5927#endif //end #ifdef RTL_IO_MAP
5928
5929#ifdef CONFIG_RTL8185B
5930 //pci_read_config_byte(pdev, 0x05, ptr);
5931 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5932 pci_read_config_byte(pdev, 0x05, &unit);
5933 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5934#endif
5935
5936 dev->irq = pdev->irq;
5937 priv->irq = 0;
5938
5939 dev->open = rtl8180_open;
5940 dev->stop = rtl8180_close;
5941 //dev->hard_start_xmit = ieee80211_xmit;
5942 dev->tx_timeout = rtl8180_restart;
5943 dev->wireless_handlers = &r8180_wx_handlers_def;
5944 dev->do_ioctl = rtl8180_ioctl;
5945 dev->set_multicast_list = r8180_set_multicast;
5946 dev->set_mac_address = r8180_set_mac_adr;
5947
5948#if WIRELESS_EXT >= 12
5949#if WIRELESS_EXT < 17
5950 dev->get_wireless_stats = r8180_get_wireless_stats;
5951#endif
5952 dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
5953#endif
5954
5955 dev->type=ARPHRD_ETHER;
5956 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5957
5958 if (dev_alloc_name(dev, ifname) < 0){
5959 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5960 ifname = "wlan%d";
5961 // ifname = "ath%d";
5962 dev_alloc_name(dev, ifname);
5963 }
5964
5965
5966 if(rtl8180_init(dev)!=0){
5967 DMESG("Initialization failed");
5968 goto fail1;
5969 }
5970
5971 netif_carrier_off(dev);
5972
5973 register_netdev(dev);
5974
5975 rtl8180_proc_init_one(dev);
5976
5977 DMESG("Driver probe completed\n");
5978 return 0;
5979
5980fail1:
5981
5982#ifdef CONFIG_RTL8180_IO_MAP
5983
5984 if( dev->base_addr != 0 ){
5985
5986 release_region(dev->base_addr,
5987 pci_resource_len(pdev, 0) );
5988 }
5989#else
5990 if( dev->mem_start != (unsigned long)NULL ){
5991 iounmap( (void *)dev->mem_start );
5992 release_mem_region( pci_resource_start(pdev, 1),
5993 pci_resource_len(pdev, 1) );
5994 }
5995#endif //end #ifdef RTL_IO_MAP
5996
5997
5998fail:
5999 if(dev){
6000
6001 if (priv->irq) {
6002 free_irq(dev->irq, dev);
6003 dev->irq=0;
6004 }
6005 free_ieee80211(dev);
6006 }
6007
6008 pci_disable_device(pdev);
6009
6010 DMESG("wlan driver load failed\n");
6011 pci_set_drvdata(pdev, NULL);
6012 return -ENODEV;
6013
6014}
6015
6016
6017static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
6018{
6019 struct r8180_priv *priv;
6020 struct net_device *dev = pci_get_drvdata(pdev);
6021 if(dev){
6022
6023 unregister_netdev(dev);
6024
6025 priv=ieee80211_priv(dev);
6026
6027 rtl8180_proc_remove_one(dev);
6028 rtl8180_down(dev);
6029 priv->rf_close(dev);
6030 rtl8180_reset(dev);
6031 //rtl8180_rtx_disable(dev);
6032 //rtl8180_irq_disable(dev);
6033 mdelay(10);
6034 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
6035 //force_pci_posting(dev);
6036 //mdelay(10);
6037
6038 if(priv->irq){
6039
6040 DMESG("Freeing irq %d",dev->irq);
6041 free_irq(dev->irq, dev);
6042 priv->irq=0;
6043
6044 }
6045
6046 free_rx_desc_ring(dev);
6047 free_tx_desc_rings(dev);
6048 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6049
6050#ifdef CONFIG_RTL8180_IO_MAP
6051
6052 if( dev->base_addr != 0 ){
6053
6054 release_region(dev->base_addr,
6055 pci_resource_len(pdev, 0) );
6056 }
6057#else
6058 if( dev->mem_start != (unsigned long)NULL ){
6059 iounmap( (void *)dev->mem_start );
6060 release_mem_region( pci_resource_start(pdev, 1),
6061 pci_resource_len(pdev, 1) );
6062 }
6063#endif /*end #ifdef RTL_IO_MAP*/
6064
6065 free_ieee80211(dev);
6066 }
6067 pci_disable_device(pdev);
6068
6069 DMESG("wlan driver removed\n");
6070}
6071
6072
6073/* fun with the built-in ieee80211 stack... */
6074extern int ieee80211_crypto_init(void);
6075extern void ieee80211_crypto_deinit(void);
6076extern int ieee80211_crypto_tkip_init(void);
6077extern void ieee80211_crypto_tkip_exit(void);
6078extern int ieee80211_crypto_ccmp_init(void);
6079extern void ieee80211_crypto_ccmp_exit(void);
6080extern int ieee80211_crypto_wep_init(void);
6081extern void ieee80211_crypto_wep_exit(void);
6082
6083static int __init rtl8180_pci_module_init(void)
6084{
6085 int ret;
6086
6087 ret = ieee80211_crypto_init();
6088 if (ret) {
6089 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
6090 return ret;
6091 }
6092 ret = ieee80211_crypto_tkip_init();
6093 if (ret) {
6094 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
6095 return ret;
6096 }
6097 ret = ieee80211_crypto_ccmp_init();
6098 if (ret) {
6099 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
6100 return ret;
6101 }
6102 ret = ieee80211_crypto_wep_init();
6103 if (ret) {
6104 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
6105 return ret;
6106 }
6107
6108 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
6109/ RTL8185 based WLAN cards\n");
6110 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
6111 DMESG("Initializing module");
6112 DMESG("Wireless extensions version %d", WIRELESS_EXT);
6113 rtl8180_proc_module_init();
6114
6115#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
6116 if(0!=pci_module_init(&rtl8180_pci_driver))
6117#else
6118 if(0!=pci_register_driver(&rtl8180_pci_driver))
6119#endif
6120 //if(0!=pci_module_init(&rtl8180_pci_driver))
6121 {
6122 DMESG("No device found");
6123 /*pci_unregister_driver (&rtl8180_pci_driver);*/
6124 return -ENODEV;
6125 }
6126 return 0;
6127}
6128
6129
6130static void __exit rtl8180_pci_module_exit(void)
6131{
6132 pci_unregister_driver (&rtl8180_pci_driver);
6133 rtl8180_proc_module_remove();
c8d86be3
GKH		 6134 ieee80211_crypto_tkip_exit();
6135 ieee80211_crypto_ccmp_exit();
6136 ieee80211_crypto_wep_exit();
096c55d1 6137 ieee80211_crypto_deinit();
c8d86be3
GKH		 6138 DMESG("Exiting");
6139}
6140
6141
6142void rtl8180_try_wake_queue(struct net_device *dev, int pri)
6143{
6144 unsigned long flags;
6145 short enough_desc;
6146 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6147
6148 spin_lock_irqsave(&priv->tx_lock,flags);
6149 enough_desc = check_nic_enought_desc(dev,pri);
6150 spin_unlock_irqrestore(&priv->tx_lock,flags);
6151
6152 if(enough_desc)
6153 ieee80211_wake_queue(priv->ieee80211);
6154}
6155
6156/*****************************************************************************
6157 -----------------------------IRQ STUFF---------------------------
6158******************************************************************************/
6159
6160void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
6161{
6162 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6163
6164 u32 *tail; //tail virtual addr
6165 u32 *head; //head virtual addr
6166 u32 *begin;//start of ring virtual addr
6167 u32 *nicv; //nic pointer virtual addr
6168// u32 *txdv; //packet just TXed
6169 u32 nic; //nic pointer physical addr
6170 u32 nicbegin;// start of ring physical addr
6171// short txed;
6172 unsigned long flag;
6173 /* physical addr are ok on 32 bits since we set DMA mask*/
6174
6175 int offs;
6176 int j,i;
6177 int hd;
6178 if (error) priv->stats.txretry++; //tony 20060601
6179 spin_lock_irqsave(&priv->tx_lock,flag);
6180 switch(pri) {
6181 case MANAGE_PRIORITY:
6182 tail = priv->txmapringtail;
6183 begin = priv->txmapring;
6184 head = priv->txmapringhead;
6185 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
6186 nicbegin = priv->txmapringdma;
6187 break;
6188
6189 case BK_PRIORITY:
6190 tail = priv->txbkpringtail;
6191 begin = priv->txbkpring;
6192 head = priv->txbkpringhead;
6193 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
6194 nicbegin = priv->txbkpringdma;
6195 break;
6196
6197 case BE_PRIORITY:
6198 tail = priv->txbepringtail;
6199 begin = priv->txbepring;
6200 head = priv->txbepringhead;
6201 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
6202 nicbegin = priv->txbepringdma;
6203 break;
6204
6205 case VI_PRIORITY:
6206 tail = priv->txvipringtail;
6207 begin = priv->txvipring;
6208 head = priv->txvipringhead;
6209 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
6210 nicbegin = priv->txvipringdma;
6211 break;
6212
6213 case VO_PRIORITY:
6214 tail = priv->txvopringtail;
6215 begin = priv->txvopring;
6216 head = priv->txvopringhead;
6217 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
6218 nicbegin = priv->txvopringdma;
6219 break;
6220
6221 case HI_PRIORITY:
6222 tail = priv->txhpringtail;
6223 begin = priv->txhpring;
6224 head = priv->txhpringhead;
6225 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
6226 nicbegin = priv->txhpringdma;
6227 break;
6228
6229 default:
6230 spin_unlock_irqrestore(&priv->tx_lock,flag);
6231 return ;
6232 }
6233/* DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
6234 *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
6235 (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
6236priv->txnpring)/8);
6237*/
6238 //nicv = (u32*) ((nic - nicbegin) + (int)begin);
6239 nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
6240 if((head <= tail && (nicv > tail || nicv < head)) ||
6241 (head > tail && (nicv > tail && nicv < head))){
6242
6243 DMESGW("nic has lost pointer");
6244#ifdef DEBUG_TX_DESC
6245 //check_tx_ring(dev,NORM_PRIORITY);
6246 check_tx_ring(dev,pri);
6247#endif
6248 spin_unlock_irqrestore(&priv->tx_lock,flag);
6249 rtl8180_restart(dev);
6250 return;
6251 }
6252
6253 /* we check all the descriptors between the head and the nic,
6254 * but not the currenly pointed by the nic (the next to be txed)
6255 * and the previous of the pointed (might be in process ??)
6256 */
6257 //if (head == nic) return;
6258 //DMESG("%x %x",head,nic);
6259 offs = (nic - nicbegin);
6260 //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
6261
6262 offs = offs / 8 /4;
6263
6264 hd = (head - begin) /8;
6265
6266 if(offs >= hd)
6267 j = offs - hd;
6268 else
6269 j = offs + (priv->txringcount -1 -hd);
6270 // j= priv->txringcount -1- (hd - offs);
6271
6272 j-=2;
6273 if(j<0) j=0;
6274
6275
6276 for(i=0;i<j;i++)
6277 {
6278// printk("+++++++++++++check status desc\n");
6279 if((*head) & (1<<31))
6280 break;
6281 if(((*head)&(0x10000000)) != 0){
6282// printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
6283 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
6284#if 1
6285 if(!error)
6286 {
6287 priv->NumTxOkTotal++;
6288// printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
6289 }
6290#endif
d599edca 6291 // printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
c8d86be3
GKH		 6292 }
6293 if(!error){
6294 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
6295 }
d599edca 6296// printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
c8d86be3
GKH		 6297 *head = *head &~ (1<<31);
6298
6299 if((head - begin)/8 == priv->txringcount-1)
6300 head=begin;
6301
6302 else
6303 head+=8;
6304 }
6305#if 0
6306 if(nicv == begin)
6307 txdv = begin + (priv->txringcount -1)*8;
6308 else
6309 txdv = nicv - 8;
6310
6311 txed = !(txdv[0] &(1<<31));
6312
6313 if(txed){
6314 if(!(txdv[0] & (1<<15))) error = 1;
6315 //if(!(txdv[0] & (1<<30))) error = 1;
6316 if(error)DMESG("%x",txdv[0]);
6317 }
6318#endif
6319 //DMESG("%x",txdv[0]);
6320 /* the head has been moved to the last certainly TXed
6321 * (or at least processed by the nic) packet.
6322 * The driver take forcefully owning of all these packets
6323 * If the packet previous of the nic pointer has been
6324 * processed this doesn't matter: it will be checked
6325 * here at the next round. Anyway if no more packet are
6326 * TXed no memory leak occour at all.
6327 */
6328
6329 switch(pri) {
6330 case MANAGE_PRIORITY:
6331 priv->txmapringhead = head;
6332 //printk("1==========================================> priority check!\n");
6333 if(priv->ack_tx_to_ieee){
6334 // try to implement power-save mode 2008.1.22
6335 // printk("2==========================================> priority check!\n");
6336#if 1
6337 if(rtl8180_is_tx_queue_empty(dev)){
6338 // printk("tx queue empty, after send null sleep packet, try to sleep !\n");
6339 priv->ack_tx_to_ieee = 0;
6340 ieee80211_ps_tx_ack(priv->ieee80211,!error);
6341 }
6342#endif
6343 }
6344 break;
6345
6346 case BK_PRIORITY:
6347 priv->txbkpringhead = head;
6348 break;
6349
6350 case BE_PRIORITY:
6351 priv->txbepringhead = head;
6352 break;
6353
6354 case VI_PRIORITY:
6355 priv->txvipringhead = head;
6356 break;
6357
6358 case VO_PRIORITY:
6359 priv->txvopringhead = head;
6360 break;
6361
6362 case HI_PRIORITY:
6363 priv->txhpringhead = head;
6364 break;
6365 }
6366
6367 /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
6368 (priv->txnpringtail - priv->txnpring) /8,
6369 offs );
6370 */
6371
6372 spin_unlock_irqrestore(&priv->tx_lock,flag);
6373
6374}
6375
6376#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6377void rtl8180_tx_irq_wq(struct work_struct *work)
6378{
6379 //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
bf6aede7 6380 struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 6381 struct ieee80211_device * ieee = (struct ieee80211_device*)
6382 container_of(dwork, struct ieee80211_device, watch_dog_wq);
6383 struct net_device *dev = ieee->dev;
6384#else
6385void rtl8180_tx_irq_wq(struct net_device *dev)
6386{
6387 //struct r8180_priv *priv = ieee80211_priv(dev);
6388#endif
6389 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6390}
6391irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
6392{
6393 struct net_device *dev = (struct net_device *) netdev;
6394 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6395 unsigned long flags;
6396 u32 inta;
6397
6398 /* We should return IRQ_NONE, but for now let me keep this */
6399 if(priv->irq_enabled == 0) return IRQ_HANDLED;
6400
6401 spin_lock_irqsave(&priv->irq_th_lock,flags);
6402
6403#ifdef CONFIG_RTL8185B
6404 //ISR: 4bytes
6405 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6406 write_nic_dword(dev,ISR,inta); // reset int situation
6407#else
6408 inta = read_nic_word(dev,INTA) & priv->irq_mask;
6409 write_nic_word(dev,INTA,inta); // reset int situation
6410#endif
6411
6412 priv->stats.shints++;
6413
6414 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6415
6416 if(!inta){
6417 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6418 return IRQ_HANDLED;
6419 /*
6420 most probably we can safely return IRQ_NONE,
6421 but for now is better to avoid problems
6422 */
6423 }
6424
6425 if(inta == 0xffff){
6426 /* HW disappared */
6427 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6428 return IRQ_HANDLED;
6429 }
6430
6431 priv->stats.ints++;
6432#ifdef DEBUG_IRQ
6433 DMESG("NIC irq %x",inta);
6434#endif
6435 //priv->irqpending = inta;
6436
6437
6438 if(!netif_running(dev)) {
6439 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6440 return IRQ_HANDLED;
6441 }
6442
6443 if(inta & ISR_TimeOut){
6444 write_nic_dword(dev, TimerInt, 0);
6445 //DMESG("=================>waking up");
6446// rtl8180_hw_wakeup(dev);
6447 }
6448
6449 if(inta & ISR_TBDOK){
6450 priv->stats.txbeacon++;
6451 }
6452
6453 if(inta & ISR_TBDER){
6454 priv->stats.txbeaconerr++;
6455 }
6456
6457 if(inta & IMR_TMGDOK ) {
6458// priv->NumTxOkTotal++;
6459 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6460// schedule_work(&priv->tx_irq_wq);
6461
6462 }
6463
6464 if(inta & ISR_THPDER){
6465#ifdef DEBUG_TX
6466 DMESG ("TX high priority ERR");
6467#endif
6468 priv->stats.txhperr++;
6469 rtl8180_tx_isr(dev,HI_PRIORITY,1);
6470 priv->ieee80211->stats.tx_errors++;
6471 }
6472
6473 if(inta & ISR_THPDOK){ //High priority tx ok
6474#ifdef DEBUG_TX
6475 DMESG ("TX high priority OK");
6476#endif
6477// priv->NumTxOkTotal++;
6478 //priv->NumTxOkInPeriod++; //YJ,del,080828
6479 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6480 priv->stats.txhpokint++;
6481 rtl8180_tx_isr(dev,HI_PRIORITY,0);
6482 }
6483
6484 if(inta & ISR_RER) {
6485 priv->stats.rxerr++;
6486#ifdef DEBUG_RX
6487 DMESGW("RX error int");
6488#endif
6489 }
6490#ifdef CONFIG_RTL8185B
6491 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
6492 priv->stats.txbkperr++;
6493 priv->ieee80211->stats.tx_errors++;
6494#ifdef DEBUG_TX
6495 DMESGW("TX bkp error int");
6496#endif
6497 //tasklet_schedule(&priv->irq_tx_tasklet);
6498 rtl8180_tx_isr(dev,BK_PRIORITY,1);
6499 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6500 }
6501
6502 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
6503 priv->stats.txbeperr++;
6504 priv->ieee80211->stats.tx_errors++;
6505#ifdef DEBUG_TX
6506 DMESGW("TX bep error int");
6507#endif
6508 rtl8180_tx_isr(dev,BE_PRIORITY,1);
6509 //tasklet_schedule(&priv->irq_tx_tasklet);
6510 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6511 }
6512#endif
6513 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
6514 priv->stats.txnperr++;
6515 priv->ieee80211->stats.tx_errors++;
6516#ifdef DEBUG_TX
6517 DMESGW("TX np error int");
6518#endif
6519 //tasklet_schedule(&priv->irq_tx_tasklet);
6520 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
6521#ifdef CONFIG_RTL8185B
6522 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
6523#endif
6524 }
6525
6526 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
6527 priv->stats.txlperr++;
6528 priv->ieee80211->stats.tx_errors++;
6529#ifdef DEBUG_TX
6530 DMESGW("TX lp error int");
6531#endif
6532 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
6533 //tasklet_schedule(&priv->irq_tx_tasklet);
6534 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6535 }
6536
6537 if(inta & ISR_ROK){
6538#ifdef DEBUG_RX
6539 DMESG("Frame arrived !");
6540#endif
6541 //priv->NumRxOkInPeriod++; //YJ,del,080828
6542 priv->stats.rxint++;
6543 tasklet_schedule(&priv->irq_rx_tasklet);
6544 }
6545
6546 if(inta & ISR_RQoSOK ){
6547#ifdef DEBUG_RX
6548 DMESG("QoS Frame arrived !");
6549#endif
6550 //priv->NumRxOkInPeriod++; //YJ,del,080828
6551 priv->stats.rxint++;
6552 tasklet_schedule(&priv->irq_rx_tasklet);
6553 }
6554 if(inta & ISR_BcnInt) {
6555 //DMESG("Preparing Beacons");
6556 rtl8180_prepare_beacon(dev);
6557 }
6558
6559 if(inta & ISR_RDU){
6560//#ifdef DEBUG_RX
6561 DMESGW("No RX descriptor available");
6562 priv->stats.rxrdu++;
6563//#endif
6564 tasklet_schedule(&priv->irq_rx_tasklet);
6565 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6566
6567 }
6568 if(inta & ISR_RXFOVW){
6569#ifdef DEBUG_RX
6570 DMESGW("RX fifo overflow");
6571#endif
6572 priv->stats.rxoverflow++;
6573 tasklet_schedule(&priv->irq_rx_tasklet);
6574 //queue_work(priv->workqueue ,&priv->restart_work);
6575 }
6576
6577 if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6578
6579 if(inta & ISR_TNPDOK){ //Normal priority tx ok
6580#ifdef DEBUG_TX
6581 DMESG ("TX normal priority OK");
6582#endif
6583// priv->NumTxOkTotal++;
6584 //priv->NumTxOkInPeriod++; //YJ,del,080828
6585 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6586 // priv->ieee80211->stats.tx_packets++;
6587 priv->stats.txnpokint++;
6588 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6589 }
6590
6591 if(inta & ISR_TLPDOK){ //Low priority tx ok
6592#ifdef DEBUG_TX
6593 DMESG ("TX low priority OK");
6594#endif
6595// priv->NumTxOkTotal++;
6596 //priv->NumTxOkInPeriod++; //YJ,del,080828
6597 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6598 // priv->ieee80211->stats.tx_packets++;
6599 priv->stats.txlpokint++;
6600 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6601 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6602 }
6603
6604#ifdef CONFIG_RTL8185B
6605 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6606 priv->stats.txbkpokint++;
6607#ifdef DEBUG_TX
6608 DMESGW("TX bk priority ok");
6609#endif
6610// priv->NumTxOkTotal++;
6611 //priv->NumTxOkInPeriod++; //YJ,del,080828
6612 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6613 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6614 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6615 }
6616
6617 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6618 priv->stats.txbeperr++;
6619#ifdef DEBUG_TX
6620 DMESGW("TX be priority ok");
6621#endif
6622// priv->NumTxOkTotal++;
6623 //priv->NumTxOkInPeriod++; //YJ,del,080828
6624 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6625 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6626 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6627 }
6628#endif
6629 force_pci_posting(dev);
6630 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6631
6632 return IRQ_HANDLED;
6633}
6634
6635
6636void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6637{
6638// unsigned long flags;
6639
6640/* spin_lock_irqsave(&priv->irq_lock, flags);
6641 priv->irq_mask &=~IMR_ROK;
6642 priv->irq_mask &=~IMR_RDU;
6643
6644 rtl8180_irq_enable(priv->dev);
6645 spin_unlock_irqrestore(&priv->irq_lock, flags);
6646*/
6647 rtl8180_rx(priv->dev);
6648
6649/* spin_lock_irqsave(&priv->irq_lock, flags);
6650 priv->irq_mask |= IMR_ROK;
6651 priv->irq_mask |= IMR_RDU;
6652 rtl8180_irq_enable(priv->dev);
6653 spin_unlock_irqrestore(&priv->irq_lock, flags);
6654*/
6655}
6656
6657/****************************************************************************
6658lizhaoming--------------------------- RF power on/power off -----------------
6659*****************************************************************************/
6660
6661#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6662void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6663{
bf6aede7 6664 //struct delayed_work *dwork = to_delayed_work(work);
c8d86be3
GKH		 6665 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6666 struct net_device *dev = ieee->dev;
6667 struct r8180_priv *priv = ieee80211_priv(dev);
6668#else
6669void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
6670{
6671 struct net_device *dev = ieee->dev;
6672 struct r8180_priv *priv = ieee80211_priv(dev);
6673#endif
6674
6675 //u16 tmp2byte;
6676 u8 btPSR;
6677 u8 btConfig0;
6678 RT_RF_POWER_STATE eRfPowerStateToSet;
6679 bool bActuallySet=false;
6680
6681 char *argv[3];
6682 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6683 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6684 static int readf_count = 0;
6685 //printk("============>%s in \n", __func__);
6686
6687#ifdef ENABLE_LPS
6688 if(readf_count % 10 == 0)
6689 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6690
6691 readf_count = (readf_count+1)%0xffff;
6692#endif
6693#if 0
6694 if(priv->up == 0)//driver stopped
6695 {
6696 printk("\nDo nothing...");
6697 goto out;
6698 }
6699 else
6700#endif
6701 {
6702 // We should turn off LED before polling FF51[4].
6703
6704 //Turn off LED.
6705 btPSR = read_nic_byte(dev, PSR);
6706 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6707
6708 //It need to delay 4us suggested by Jong, 2008-01-16
6709 udelay(4);
6710
6711 //HW radio On/Off according to the value of FF51[4](config0)
6712 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6713
6714 //Turn on LED.
6715 write_nic_byte(dev, PSR, btPSR| BIT3);
6716
6717 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
6718
6719 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6720 {
6721 priv->ieee80211->bHwRadioOff = false;
6722 bActuallySet = true;
6723 }
6724 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6725 {
6726 priv->ieee80211->bHwRadioOff = true;
6727 bActuallySet = true;
6728 }
6729
6730 if(bActuallySet)
6731 {
6732 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6733
6734 /* To update the UI status for Power status changed */
6735 if(priv->ieee80211->bHwRadioOff == true)
6736 argv[1] = "RFOFF";
6737 else{
6738 //if(!priv->RfOffReason)
6739 argv[1] = "RFON";
6740 //else
6741 // argv[1] = "RFOFF";
6742 }
6743 argv[0] = RadioPowerPath;
6744 argv[2] = NULL;
6745
6746 call_usermodehelper(RadioPowerPath,argv,envp,1);
6747 }
6748
6749 }
6750
6751}
6752
6753static u8 read_acadapter_file(char *filename)
6754{
6755//#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
6756#if 0
6757 int fd;
6758 char buf[1];
6759 char ret[50];
6760 int i = 0;
6761 int n = 0;
6762 mm_segment_t old_fs = get_fs();
6763 set_fs(KERNEL_DS);
6764
6765 fd = sys_open(filename, O_RDONLY, 0);
6766 if (fd >= 0) {
6767 while (sys_read(fd, buf, 1) == 1)
6768 {
6769 i++;
6770 if(i>10)
6771 {
6772 if(buf[0]!=' ')
6773 {
6774 ret[n]=buf[0];
6775 n++;
6776 }
6777 }
6778 }
6779 sys_close(fd);
6780 }
6781 ret[n]='\0';
6782// printk("%s \n", ret);
6783 set_fs(old_fs);
6784
6785 if(strncmp(ret, "off-line",8) == 0)
6786 {
6787 return 1;
6788 }
6789#endif
6790 return 0;
6791}
6792
6793/***************************************************************************
6794 ------------------- module init / exit stubs ----------------
6795****************************************************************************/
6796module_init(rtl8180_pci_module_init);
6797module_exit(rtl8180_pci_module_exit);
6798
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