]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/staging/rt3090/chips/rt3390.c
Staging: rt2860: add RT3090 chipset support
[net-next-2.6.git] / drivers / staging / rt3090 / chips / rt3390.c
CommitLineData
36c7928c
BZ
1/*
2 *************************************************************************
3 * Ralink Tech Inc.
4 * 5F., No.36, Taiyuan St., Jhubei City,
5 * Hsinchu County 302,
6 * Taiwan, R.O.C.
7 *
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
14 * *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
19 * *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 * *
25 *************************************************************************
26
27 Module Name:
28 rt3390.c
29
30 Abstract:
31 Specific funcitons and variables for RT30xx.
32
33 Revision History:
34 Who When What
35 -------- ---------- ----------------------------------------------
36*/
37
38#ifdef RT3390
39
40#include "../rt_config.h"
41
42
43#ifndef RTMP_RF_RW_SUPPORT
44#error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip"
45#endif // RTMP_RF_RW_SUPPORT //
46
47
48VOID NICInitRT3390RFRegisters(IN PRTMP_ADAPTER pAd)
49{
50 INT i;
51 // Driver must read EEPROM to get RfIcType before initial RF registers
52 // Initialize RF register to default value
53 if (IS_RT3090(pAd)||IS_RT3390(pAd)||IS_RT3572(pAd))
54 {
55 // Init RF calibration
56 // Driver should toggle RF R30 bit7 before init RF registers
57 UINT32 RfReg = 0, data;
58
59 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
60 RfReg |= 0x80;
61 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
62 RTMPusecDelay(1000);
63 RfReg &= 0x7F;
64 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
65
66 // init R24, R31
67 RT30xxWriteRFRegister(pAd, RF_R24, 0x0F);
68 RT30xxWriteRFRegister(pAd, RF_R31, 0x0F);
69
70 if (IS_RT3390(pAd))
71 {
72 // patch LNA_PE_G1 failed issue
73 RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
74 data &= ~(0x20);
75 RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
76
77 // RF registers initialization
78 for (i = 0; i < NUM_RF_REG_PARMS_OVER_RT3390; i++)
79 {
80 RT30xxWriteRFRegister(pAd, RFRegTableOverRT3390[i].Register, RFRegTableOverRT3390[i].Value);
81 }
82 }
83
84 // patch LNA_PE_G1 failed issue
85 RTMP_IO_READ32(pAd, GPIO_SWITCH, &data);
86 data &= ~(0x20);
87 RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data);
88
89 // Initialize RF register to default value
90 for (i = 0; i < NUM_RF_REG_PARMS_OVER_RT3390; i++)
91 {
92 RT30xxWriteRFRegister(pAd, RFRegTableOverRT3390[i].Register, RFRegTableOverRT3390[i].Value);
93 }
94
95 // Driver should set RF R6 bit6 on before calibration
96 RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
97 RfReg |= 0x40;
98 RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
99
100 //For RF filter Calibration
101 RTMPFilterCalibration(pAd);
102
103 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
104 if ((pAd->MACVersion & 0xffff) < 0x0211)
105 RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
106
107 // set led open drain enable
108 RTMP_IO_READ32(pAd, OPT_14, &data);
109 data |= 0x01;
110 RTMP_IO_WRITE32(pAd, OPT_14, data);
111
112 // set default antenna as main
113 if (pAd->RfIcType == RFIC_3020)
114 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
115
116 // add by johnli, RF power sequence setup, load RF normal operation-mode setup
117 RT33xxLoadRFNormalModeSetup(pAd);
118 }
119
120}
121
122#endif // RT3390 //