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[net-next-2.6.git] / drivers / serial / sunsu.c
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1da177e4
LT		 1/* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18#include <linux/config.h>
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/spinlock.h>
23#include <linux/errno.h>
24#include <linux/tty.h>
25#include <linux/tty_flip.h>
26#include <linux/major.h>
27#include <linux/string.h>
28#include <linux/ptrace.h>
29#include <linux/ioport.h>
30#include <linux/circ_buf.h>
31#include <linux/serial.h>
32#include <linux/sysrq.h>
33#include <linux/console.h>
34#ifdef CONFIG_SERIO
35#include <linux/serio.h>
36#endif
37#include <linux/serial_reg.h>
38#include <linux/init.h>
39#include <linux/delay.h>
40
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/oplib.h>
44#include <asm/ebus.h>
45#ifdef CONFIG_SPARC64
46#include <asm/isa.h>
47#endif
48
49#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50#define SUPPORT_SYSRQ
51#endif
52
53#include <linux/serial_core.h>
54
55#include "suncore.h"
56
57/* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
59 */
60#define SU_BASE_BAUD (1846200 / 16)
61
62enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
64
65/*
66 * Here we define the default xmit fifo size used for each type of UART.
67 */
68static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
69 { "unknown", 1, 0 },
70 { "8250", 1, 0 },
71 { "16450", 1, 0 },
72 { "16550", 1, 0 },
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
74 { "Cirrus", 1, 0 },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
78 { "Startech", 1, 0 },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
83};
84
85struct uart_sunsu_port {
86 struct uart_port port;
87 unsigned char acr;
88 unsigned char ier;
89 unsigned short rev;
90 unsigned char lcr;
91 unsigned int lsr_break_flag;
92 unsigned int cflag;
93
94 /* Probing information. */
95 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */
97 int port_node;
98
99#ifdef CONFIG_SERIO
100 struct serio *serio;
101 int serio_open;
102#endif
103};
104
105#define _INLINE_
106
107static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
108{
109 offset <<= up->port.regshift;
110
111 switch (up->port.iotype) {
112 case SERIAL_IO_HUB6:
113 outb(up->port.hub6 - 1 + offset, up->port.iobase);
114 return inb(up->port.iobase + 1);
115
116 case SERIAL_IO_MEM:
117 return readb(up->port.membase + offset);
118
119 default:
120 return inb(up->port.iobase + offset);
121 }
122}
123
124static _INLINE_ void
125serial_out(struct uart_sunsu_port *up, int offset, int value)
126{
127#ifndef CONFIG_SPARC64
128 /*
129 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
130 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
131 * gate outputs a logical one. Since we use level triggered interrupts
132 * we have lockup and watchdog reset. We cannot mask IRQ because
133 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
134 * This problem is similar to what Alpha people suffer, see serial.c.
135 */
136 if (offset == UART_MCR)
137 value |= UART_MCR_OUT2;
138#endif
139 offset <<= up->port.regshift;
140
141 switch (up->port.iotype) {
142 case SERIAL_IO_HUB6:
143 outb(up->port.hub6 - 1 + offset, up->port.iobase);
144 outb(value, up->port.iobase + 1);
145 break;
146
147 case SERIAL_IO_MEM:
148 writeb(value, up->port.membase + offset);
149 break;
150
151 default:
152 outb(value, up->port.iobase + offset);
153 }
154}
155
156/*
157 * We used to support using pause I/O for certain machines. We
158 * haven't supported this for a while, but just in case it's badly
159 * needed for certain old 386 machines, I've left these #define's
160 * in....
161 */
162#define serial_inp(up, offset) serial_in(up, offset)
163#define serial_outp(up, offset, value) serial_out(up, offset, value)
164
165
166/*
167 * For the 16C950
168 */
169static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
170{
171 serial_out(up, UART_SCR, offset);
172 serial_out(up, UART_ICR, value);
173}
174
175#if 0 /* Unused currently */
176static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
177{
178 unsigned int value;
179
180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
181 serial_out(up, UART_SCR, offset);
182 value = serial_in(up, UART_ICR);
183 serial_icr_write(up, UART_ACR, up->acr);
184
185 return value;
186}
187#endif
188
189#ifdef CONFIG_SERIAL_8250_RSA
190/*
191 * Attempts to turn on the RSA FIFO. Returns zero on failure.
192 * We set the port uart clock rate if we succeed.
193 */
194static int __enable_rsa(struct uart_sunsu_port *up)
195{
196 unsigned char mode;
197 int result;
198
199 mode = serial_inp(up, UART_RSA_MSR);
200 result = mode & UART_RSA_MSR_FIFO;
201
202 if (!result) {
203 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
204 mode = serial_inp(up, UART_RSA_MSR);
205 result = mode & UART_RSA_MSR_FIFO;
206 }
207
208 if (result)
209 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
210
211 return result;
212}
213
214static void enable_rsa(struct uart_sunsu_port *up)
215{
216 if (up->port.type == PORT_RSA) {
217 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
218 spin_lock_irq(&up->port.lock);
219 __enable_rsa(up);
220 spin_unlock_irq(&up->port.lock);
221 }
222 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
223 serial_outp(up, UART_RSA_FRR, 0);
224 }
225}
226
227/*
228 * Attempts to turn off the RSA FIFO. Returns zero on failure.
229 * It is unknown why interrupts were disabled in here. However,
230 * the caller is expected to preserve this behaviour by grabbing
231 * the spinlock before calling this function.
232 */
233static void disable_rsa(struct uart_sunsu_port *up)
234{
235 unsigned char mode;
236 int result;
237
238 if (up->port.type == PORT_RSA &&
239 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
240 spin_lock_irq(&up->port.lock);
241
242 mode = serial_inp(up, UART_RSA_MSR);
243 result = !(mode & UART_RSA_MSR_FIFO);
244
245 if (!result) {
246 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
247 mode = serial_inp(up, UART_RSA_MSR);
248 result = !(mode & UART_RSA_MSR_FIFO);
249 }
250
251 if (result)
252 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
253 spin_unlock_irq(&up->port.lock);
254 }
255}
256#endif /* CONFIG_SERIAL_8250_RSA */
257
258static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop)
259{
260 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
261
262 if (up->ier & UART_IER_THRI) {
263 up->ier &= ~UART_IER_THRI;
264 serial_out(up, UART_IER, up->ier);
265 }
266 if (up->port.type == PORT_16C950 && tty_stop) {
267 up->acr |= UART_ACR_TXDIS;
268 serial_icr_write(up, UART_ACR, up->acr);
269 }
270}
271
272static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
273{
274 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
275
276 if (!(up->ier & UART_IER_THRI)) {
277 up->ier |= UART_IER_THRI;
278 serial_out(up, UART_IER, up->ier);
279 }
280 /*
281 * We only do this from uart_start
282 */
283 if (tty_start && up->port.type == PORT_16C950) {
284 up->acr &= ~UART_ACR_TXDIS;
285 serial_icr_write(up, UART_ACR, up->acr);
286 }
287}
288
289static void sunsu_stop_rx(struct uart_port *port)
290{
291 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
292 unsigned long flags;
293
294 spin_lock_irqsave(&up->port.lock, flags);
295 up->ier &= ~UART_IER_RLSI;
296 up->port.read_status_mask &= ~UART_LSR_DR;
297 serial_out(up, UART_IER, up->ier);
298 spin_unlock_irqrestore(&up->port.lock, flags);
299}
300
301static void sunsu_enable_ms(struct uart_port *port)
302{
303 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
304 unsigned long flags;
305
306 spin_lock_irqsave(&up->port.lock, flags);
307 up->ier |= UART_IER_MSI;
308 serial_out(up, UART_IER, up->ier);
309 spin_unlock_irqrestore(&up->port.lock, flags);
310}
311
312static _INLINE_ struct tty_struct *
313receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
314{
315 struct tty_struct *tty = up->port.info->tty;
316 unsigned char ch;
317 int max_count = 256;
318 int saw_console_brk = 0;
319
320 do {
321 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
322 tty->flip.work.func((void *)tty);
323 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
324 return tty; // if TTY_DONT_FLIP is set
325 }
326 ch = serial_inp(up, UART_RX);
327 *tty->flip.char_buf_ptr = ch;
328 *tty->flip.flag_buf_ptr = TTY_NORMAL;
329 up->port.icount.rx++;
330
331 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
332 UART_LSR_FE | UART_LSR_OE))) {
333 /*
334 * For statistics only
335 */
336 if (*status & UART_LSR_BI) {
337 *status &= ~(UART_LSR_FE | UART_LSR_PE);
338 up->port.icount.brk++;
339 if (up->port.cons != NULL &&
340 up->port.line == up->port.cons->index)
341 saw_console_brk = 1;
342 /*
343 * We do the SysRQ and SAK checking
344 * here because otherwise the break
345 * may get masked by ignore_status_mask
346 * or read_status_mask.
347 */
348 if (uart_handle_break(&up->port))
349 goto ignore_char;
350 } else if (*status & UART_LSR_PE)
351 up->port.icount.parity++;
352 else if (*status & UART_LSR_FE)
353 up->port.icount.frame++;
354 if (*status & UART_LSR_OE)
355 up->port.icount.overrun++;
356
357 /*
358 * Mask off conditions which should be ingored.
359 */
360 *status &= up->port.read_status_mask;
361
362 if (up->port.cons != NULL &&
363 up->port.line == up->port.cons->index) {
364 /* Recover the break flag from console xmit */
365 *status |= up->lsr_break_flag;
366 up->lsr_break_flag = 0;
367 }
368
369 if (*status & UART_LSR_BI) {
370 *tty->flip.flag_buf_ptr = TTY_BREAK;
371 } else if (*status & UART_LSR_PE)
372 *tty->flip.flag_buf_ptr = TTY_PARITY;
373 else if (*status & UART_LSR_FE)
374 *tty->flip.flag_buf_ptr = TTY_FRAME;
375 }
376 if (uart_handle_sysrq_char(&up->port, ch, regs))
377 goto ignore_char;
378 if ((*status & up->port.ignore_status_mask) == 0) {
379 tty->flip.flag_buf_ptr++;
380 tty->flip.char_buf_ptr++;
381 tty->flip.count++;
382 }
383 if ((*status & UART_LSR_OE) &&
384 tty->flip.count < TTY_FLIPBUF_SIZE) {
385 /*
386 * Overrun is special, since it's reported
387 * immediately, and doesn't affect the current
388 * character.
389 */
390 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
391 tty->flip.flag_buf_ptr++;
392 tty->flip.char_buf_ptr++;
393 tty->flip.count++;
394 }
395 ignore_char:
396 *status = serial_inp(up, UART_LSR);
397 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
398
399 if (saw_console_brk)
400 sun_do_break();
401
402 return tty;
403}
404
405static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
406{
407 struct circ_buf *xmit = &up->port.info->xmit;
408 int count;
409
410 if (up->port.x_char) {
411 serial_outp(up, UART_TX, up->port.x_char);
412 up->port.icount.tx++;
413 up->port.x_char = 0;
414 return;
415 }
416 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
417 sunsu_stop_tx(&up->port, 0);
418 return;
419 }
420
421 count = up->port.fifosize;
422 do {
423 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
424 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
425 up->port.icount.tx++;
426 if (uart_circ_empty(xmit))
427 break;
428 } while (--count > 0);
429
430 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
431 uart_write_wakeup(&up->port);
432
433 if (uart_circ_empty(xmit))
434 sunsu_stop_tx(&up->port, 0);
435}
436
437static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
438{
439 int status;
440
441 status = serial_in(up, UART_MSR);
442
443 if ((status & UART_MSR_ANY_DELTA) == 0)
444 return;
445
446 if (status & UART_MSR_TERI)
447 up->port.icount.rng++;
448 if (status & UART_MSR_DDSR)
449 up->port.icount.dsr++;
450 if (status & UART_MSR_DDCD)
451 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
452 if (status & UART_MSR_DCTS)
453 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
454
455 wake_up_interruptible(&up->port.info->delta_msr_wait);
456}
457
458static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
459{
460 struct uart_sunsu_port *up = dev_id;
461 unsigned long flags;
462 unsigned char status;
463
464 spin_lock_irqsave(&up->port.lock, flags);
465
466 do {
467 struct tty_struct *tty;
468
469 status = serial_inp(up, UART_LSR);
470 tty = NULL;
471 if (status & UART_LSR_DR)
472 tty = receive_chars(up, &status, regs);
473 check_modem_status(up);
474 if (status & UART_LSR_THRE)
475 transmit_chars(up);
476
477 spin_unlock_irqrestore(&up->port.lock, flags);
478
479 if (tty)
480 tty_flip_buffer_push(tty);
481
482 spin_lock_irqsave(&up->port.lock, flags);
483
484 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
485
486 spin_unlock_irqrestore(&up->port.lock, flags);
487
488 return IRQ_HANDLED;
489}
490
491/* Separate interrupt handling path for keyboard/mouse ports. */
492
493static void
494sunsu_change_speed(struct uart_port *port, unsigned int cflag,
495 unsigned int iflag, unsigned int quot);
496
497static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
498{
499 unsigned int cur_cflag = up->cflag;
500 int quot, new_baud;
501
502 up->cflag &= ~CBAUD;
503 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
504
505 quot = up->port.uartclk / (16 * new_baud);
506
507 spin_unlock(&up->port.lock);
508
509 sunsu_change_speed(&up->port, up->cflag, 0, quot);
510
511 spin_lock(&up->port.lock);
512}
513
514static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
515{
516 do {
517 unsigned char ch = serial_inp(up, UART_RX);
518
519 /* Stop-A is handled by drivers/char/keyboard.c now. */
520 if (up->su_type == SU_PORT_KBD) {
521#ifdef CONFIG_SERIO
522 serio_interrupt(up->serio, ch, 0, regs);
523#endif
524 } else if (up->su_type == SU_PORT_MS) {
525 int ret = suncore_mouse_baud_detection(ch, is_break);
526
527 switch (ret) {
528 case 2:
529 sunsu_change_mouse_baud(up);
530 /* fallthru */
531 case 1:
532 break;
533
534 case 0:
535#ifdef CONFIG_SERIO
536 serio_interrupt(up->serio, ch, 0, regs);
537#endif
538 break;
539 };
540 }
541 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
542}
543
544static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
545{
546 struct uart_sunsu_port *up = dev_id;
547
548 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
549 unsigned char status = serial_inp(up, UART_LSR);
550
551 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
552 receive_kbd_ms_chars(up, regs,
553 (status & UART_LSR_BI) != 0);
554 }
555
556 return IRQ_HANDLED;
557}
558
559static unsigned int sunsu_tx_empty(struct uart_port *port)
560{
561 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
562 unsigned long flags;
563 unsigned int ret;
564
565 spin_lock_irqsave(&up->port.lock, flags);
566 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
567 spin_unlock_irqrestore(&up->port.lock, flags);
568
569 return ret;
570}
571
572static unsigned int sunsu_get_mctrl(struct uart_port *port)
573{
574 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
1da177e4
LT		 575 unsigned char status;
576 unsigned int ret;
577
1da177e4 578 status = serial_in(up, UART_MSR);
1da177e4
LT		 579
580 ret = 0;
581 if (status & UART_MSR_DCD)
582 ret |= TIOCM_CAR;
583 if (status & UART_MSR_RI)
584 ret |= TIOCM_RNG;
585 if (status & UART_MSR_DSR)
586 ret |= TIOCM_DSR;
587 if (status & UART_MSR_CTS)
588 ret |= TIOCM_CTS;
589 return ret;
590}
591
592static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
593{
594 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
595 unsigned char mcr = 0;
596
597 if (mctrl & TIOCM_RTS)
598 mcr |= UART_MCR_RTS;
599 if (mctrl & TIOCM_DTR)
600 mcr |= UART_MCR_DTR;
601 if (mctrl & TIOCM_OUT1)
602 mcr |= UART_MCR_OUT1;
603 if (mctrl & TIOCM_OUT2)
604 mcr |= UART_MCR_OUT2;
605 if (mctrl & TIOCM_LOOP)
606 mcr |= UART_MCR_LOOP;
607
608 serial_out(up, UART_MCR, mcr);
609}
610
611static void sunsu_break_ctl(struct uart_port *port, int break_state)
612{
613 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
614 unsigned long flags;
615
616 spin_lock_irqsave(&up->port.lock, flags);
617 if (break_state == -1)
618 up->lcr |= UART_LCR_SBC;
619 else
620 up->lcr &= ~UART_LCR_SBC;
621 serial_out(up, UART_LCR, up->lcr);
622 spin_unlock_irqrestore(&up->port.lock, flags);
623}
624
625static int sunsu_startup(struct uart_port *port)
626{
627 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
628 unsigned long flags;
629 int retval;
630
631 if (up->port.type == PORT_16C950) {
632 /* Wake up and initialize UART */
633 up->acr = 0;
634 serial_outp(up, UART_LCR, 0xBF);
635 serial_outp(up, UART_EFR, UART_EFR_ECB);
636 serial_outp(up, UART_IER, 0);
637 serial_outp(up, UART_LCR, 0);
638 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
639 serial_outp(up, UART_LCR, 0xBF);
640 serial_outp(up, UART_EFR, UART_EFR_ECB);
641 serial_outp(up, UART_LCR, 0);
642 }
643
644#ifdef CONFIG_SERIAL_8250_RSA
645 /*
646 * If this is an RSA port, see if we can kick it up to the
647 * higher speed clock.
648 */
649 enable_rsa(up);
650#endif
651
652 /*
653 * Clear the FIFO buffers and disable them.
654 * (they will be reeanbled in set_termios())
655 */
656 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
657 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
658 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
659 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
660 serial_outp(up, UART_FCR, 0);
661 }
662
663 /*
664 * Clear the interrupt registers.
665 */
666 (void) serial_inp(up, UART_LSR);
667 (void) serial_inp(up, UART_RX);
668 (void) serial_inp(up, UART_IIR);
669 (void) serial_inp(up, UART_MSR);
670
671 /*
672 * At this point, there's no way the LSR could still be 0xff;
673 * if it is, then bail out, because there's likely no UART
674 * here.
675 */
676 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
677 (serial_inp(up, UART_LSR) == 0xff)) {
678 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
679 return -ENODEV;
680 }
681
682 if (up->su_type != SU_PORT_PORT) {
683 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
684 SA_SHIRQ, su_typev[up->su_type], up);
685 } else {
686 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
687 SA_SHIRQ, su_typev[up->su_type], up);
688 }
689 if (retval) {
690 printk("su: Cannot register IRQ %d\n", up->port.irq);
691 return retval;
692 }
693
694 /*
695 * Now, initialize the UART
696 */
697 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
698
699 spin_lock_irqsave(&up->port.lock, flags);
700
701 up->port.mctrl |= TIOCM_OUT2;
702
703 sunsu_set_mctrl(&up->port, up->port.mctrl);
704 spin_unlock_irqrestore(&up->port.lock, flags);
705
706 /*
707 * Finally, enable interrupts. Note: Modem status interrupts
708 * are set via set_termios(), which will be occurring imminently
709 * anyway, so we don't enable them here.
710 */
711 up->ier = UART_IER_RLSI | UART_IER_RDI;
712 serial_outp(up, UART_IER, up->ier);
713
714 if (up->port.flags & ASYNC_FOURPORT) {
715 unsigned int icp;
716 /*
717 * Enable interrupts on the AST Fourport board
718 */
719 icp = (up->port.iobase & 0xfe0) | 0x01f;
720 outb_p(0x80, icp);
721 (void) inb_p(icp);
722 }
723
724 /*
725 * And clear the interrupt registers again for luck.
726 */
727 (void) serial_inp(up, UART_LSR);
728 (void) serial_inp(up, UART_RX);
729 (void) serial_inp(up, UART_IIR);
730 (void) serial_inp(up, UART_MSR);
731
732 return 0;
733}
734
735static void sunsu_shutdown(struct uart_port *port)
736{
737 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
738 unsigned long flags;
739
740 /*
741 * Disable interrupts from this port
742 */
743 up->ier = 0;
744 serial_outp(up, UART_IER, 0);
745
746 spin_lock_irqsave(&up->port.lock, flags);
747 if (up->port.flags & ASYNC_FOURPORT) {
748 /* reset interrupts on the AST Fourport board */
749 inb((up->port.iobase & 0xfe0) | 0x1f);
750 up->port.mctrl |= TIOCM_OUT1;
751 } else
752 up->port.mctrl &= ~TIOCM_OUT2;
753
754 sunsu_set_mctrl(&up->port, up->port.mctrl);
755 spin_unlock_irqrestore(&up->port.lock, flags);
756
757 /*
758 * Disable break condition and FIFOs
759 */
760 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
761 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
762 UART_FCR_CLEAR_RCVR |
763 UART_FCR_CLEAR_XMIT);
764 serial_outp(up, UART_FCR, 0);
765
766#ifdef CONFIG_SERIAL_8250_RSA
767 /*
768 * Reset the RSA board back to 115kbps compat mode.
769 */
770 disable_rsa(up);
771#endif
772
773 /*
774 * Read data port to reset things.
775 */
776 (void) serial_in(up, UART_RX);
777
778 free_irq(up->port.irq, up);
779}
780
781static void
782sunsu_change_speed(struct uart_port *port, unsigned int cflag,
783 unsigned int iflag, unsigned int quot)
784{
785 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
786 unsigned char cval, fcr = 0;
787 unsigned long flags;
788
789 switch (cflag & CSIZE) {
790 case CS5:
791 cval = 0x00;
792 break;
793 case CS6:
794 cval = 0x01;
795 break;
796 case CS7:
797 cval = 0x02;
798 break;
799 default:
800 case CS8:
801 cval = 0x03;
802 break;
803 }
804
805 if (cflag & CSTOPB)
806 cval |= 0x04;
807 if (cflag & PARENB)
808 cval |= UART_LCR_PARITY;
809 if (!(cflag & PARODD))
810 cval |= UART_LCR_EPAR;
811#ifdef CMSPAR
812 if (cflag & CMSPAR)
813 cval |= UART_LCR_SPAR;
814#endif
815
816 /*
817 * Work around a bug in the Oxford Semiconductor 952 rev B
818 * chip which causes it to seriously miscalculate baud rates
819 * when DLL is 0.
820 */
821 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
822 up->rev == 0x5201)
823 quot ++;
824
825 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
826 if ((up->port.uartclk / quot) < (2400 * 16))
827 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
828#ifdef CONFIG_SERIAL_8250_RSA
829 else if (up->port.type == PORT_RSA)
830 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
831#endif
832 else
833 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
834 }
835 if (up->port.type == PORT_16750)
836 fcr |= UART_FCR7_64BYTE;
837
838 /*
839 * Ok, we're now changing the port state. Do it with
840 * interrupts disabled.
841 */
842 spin_lock_irqsave(&up->port.lock, flags);
843
844 /*
845 * Update the per-port timeout.
846 */
847 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
848
849 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
850 if (iflag & INPCK)
851 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
852 if (iflag & (BRKINT | PARMRK))
853 up->port.read_status_mask |= UART_LSR_BI;
854
855 /*
856 * Characteres to ignore
857 */
858 up->port.ignore_status_mask = 0;
859 if (iflag & IGNPAR)
860 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
861 if (iflag & IGNBRK) {
862 up->port.ignore_status_mask |= UART_LSR_BI;
863 /*
864 * If we're ignoring parity and break indicators,
865 * ignore overruns too (for real raw support).
866 */
867 if (iflag & IGNPAR)
868 up->port.ignore_status_mask |= UART_LSR_OE;
869 }
870
871 /*
872 * ignore all characters if CREAD is not set
873 */
874 if ((cflag & CREAD) == 0)
875 up->port.ignore_status_mask |= UART_LSR_DR;
876
877 /*
878 * CTS flow control flag and modem status interrupts
879 */
880 up->ier &= ~UART_IER_MSI;
881 if (UART_ENABLE_MS(&up->port, cflag))
882 up->ier |= UART_IER_MSI;
883
884 serial_out(up, UART_IER, up->ier);
885
886 if (uart_config[up->port.type].flags & UART_STARTECH) {
887 serial_outp(up, UART_LCR, 0xBF);
888 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
889 }
890 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
891 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
892 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
893 if (up->port.type == PORT_16750)
894 serial_outp(up, UART_FCR, fcr); /* set fcr */
895 serial_outp(up, UART_LCR, cval); /* reset DLAB */
896 up->lcr = cval; /* Save LCR */
897 if (up->port.type != PORT_16750) {
898 if (fcr & UART_FCR_ENABLE_FIFO) {
899 /* emulated UARTs (Lucent Venus 167x) need two steps */
900 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
901 }
902 serial_outp(up, UART_FCR, fcr); /* set fcr */
903 }
904
905 up->cflag = cflag;
906
907 spin_unlock_irqrestore(&up->port.lock, flags);
908}
909
910static void
911sunsu_set_termios(struct uart_port *port, struct termios *termios,
912 struct termios *old)
913{
914 unsigned int baud, quot;
915
916 /*
917 * Ask the core to calculate the divisor for us.
918 */
919 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
920 quot = uart_get_divisor(port, baud);
921
922 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
923}
924
925static void sunsu_release_port(struct uart_port *port)
926{
927}
928
929static int sunsu_request_port(struct uart_port *port)
930{
931 return 0;
932}
933
934static void sunsu_config_port(struct uart_port *port, int flags)
935{
936 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
937
938 if (flags & UART_CONFIG_TYPE) {
939 /*
940 * We are supposed to call autoconfig here, but this requires
941 * splitting all the OBP probing crap from the UART probing.
942 * We'll do it when we kill sunsu.c altogether.
943 */
944 port->type = up->type_probed; /* XXX */
945 }
946}
947
948static int
949sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
950{
951 return -EINVAL;
952}
953
954static const char *
955sunsu_type(struct uart_port *port)
956{
957 int type = port->type;
958
959 if (type >= ARRAY_SIZE(uart_config))
960 type = 0;
961 return uart_config[type].name;
962}
963
964static struct uart_ops sunsu_pops = {
965 .tx_empty = sunsu_tx_empty,
966 .set_mctrl = sunsu_set_mctrl,
967 .get_mctrl = sunsu_get_mctrl,
968 .stop_tx = sunsu_stop_tx,
969 .start_tx = sunsu_start_tx,
970 .stop_rx = sunsu_stop_rx,
971 .enable_ms = sunsu_enable_ms,
972 .break_ctl = sunsu_break_ctl,
973 .startup = sunsu_startup,
974 .shutdown = sunsu_shutdown,
975 .set_termios = sunsu_set_termios,
976 .type = sunsu_type,
977 .release_port = sunsu_release_port,
978 .request_port = sunsu_request_port,
979 .config_port = sunsu_config_port,
980 .verify_port = sunsu_verify_port,
981};
982
983#define UART_NR 4
984
985static struct uart_sunsu_port sunsu_ports[UART_NR];
986
987#ifdef CONFIG_SERIO
988
989static DEFINE_SPINLOCK(sunsu_serio_lock);
990
991static int sunsu_serio_write(struct serio *serio, unsigned char ch)
992{
993 struct uart_sunsu_port *up = serio->port_data;
994 unsigned long flags;
995 int lsr;
996
997 spin_lock_irqsave(&sunsu_serio_lock, flags);
998
999 do {
1000 lsr = serial_in(up, UART_LSR);
1001 } while (!(lsr & UART_LSR_THRE));
1002
1003 /* Send the character out. */
1004 serial_out(up, UART_TX, ch);
1005
1006 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1007
1008 return 0;
1009}
1010
1011static int sunsu_serio_open(struct serio *serio)
1012{
1013 struct uart_sunsu_port *up = serio->port_data;
1014 unsigned long flags;
1015 int ret;
1016
1017 spin_lock_irqsave(&sunsu_serio_lock, flags);
1018 if (!up->serio_open) {
1019 up->serio_open = 1;
1020 ret = 0;
1021 } else
1022 ret = -EBUSY;
1023 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1024
1025 return ret;
1026}
1027
1028static void sunsu_serio_close(struct serio *serio)
1029{
1030 struct uart_sunsu_port *up = serio->port_data;
1031 unsigned long flags;
1032
1033 spin_lock_irqsave(&sunsu_serio_lock, flags);
1034 up->serio_open = 0;
1035 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1036}
1037
1038#endif /* CONFIG_SERIO */
1039
1040static void sunsu_autoconfig(struct uart_sunsu_port *up)
1041{
1042 unsigned char status1, status2, scratch, scratch2, scratch3;
1043 unsigned char save_lcr, save_mcr;
1044 struct linux_ebus_device *dev = NULL;
1045 struct linux_ebus *ebus;
1046#ifdef CONFIG_SPARC64
1047 struct sparc_isa_bridge *isa_br;
1048 struct sparc_isa_device *isa_dev;
1049#endif
1050#ifndef CONFIG_SPARC64
1051 struct linux_prom_registers reg0;
1052#endif
1053 unsigned long flags;
1054
1055 if (!up->port_node || !up->su_type)
1056 return;
1057
1058 up->type_probed = PORT_UNKNOWN;
1059 up->port.iotype = SERIAL_IO_MEM;
1060
1061 /*
1062 * First we look for Ebus-bases su's
1063 */
1064 for_each_ebus(ebus) {
1065 for_each_ebusdev(dev, ebus) {
1066 if (dev->prom_node == up->port_node) {
1067 /*
1068 * The EBus is broken on sparc; it delivers
1069 * virtual addresses in resources. Oh well...
1070 * This is correct on sparc64, though.
1071 */
1072 up->port.membase = (char *) dev->resource[0].start;
1073 /*
1074 * This is correct on both architectures.
1075 */
1076 up->port.mapbase = dev->resource[0].start;
1077 up->port.irq = dev->irqs[0];
1078 goto ebus_done;
1079 }
1080 }
1081 }
1082
1083#ifdef CONFIG_SPARC64
1084 for_each_isa(isa_br) {
1085 for_each_isadev(isa_dev, isa_br) {
1086 if (isa_dev->prom_node == up->port_node) {
1087 /* Same on sparc64. Cool architecure... */
1088 up->port.membase = (char *) isa_dev->resource.start;
1089 up->port.mapbase = isa_dev->resource.start;
1090 up->port.irq = isa_dev->irq;
1091 goto ebus_done;
1092 }
1093 }
1094 }
1095#endif
1096
1097#ifdef CONFIG_SPARC64
1098 /*
1099 * Not on Ebus, bailing.
1100 */
1101 return;
1102#else
1103 /*
1104 * Not on Ebus, must be OBIO.
1105 */
1106 if (prom_getproperty(up->port_node, "reg",
1107 (char *)&reg0, sizeof(reg0)) == -1) {
1108 prom_printf("sunsu: no \"reg\" property\n");
1109 return;
1110 }
1111 prom_apply_obio_ranges(&reg0, 1);
1112 if (reg0.which_io != 0) { /* Just in case... */
1113 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1114 reg0.which_io, reg0.phys_addr);
1115 return;
1116 }
1117 up->port.mapbase = reg0.phys_addr;
1118 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1119 prom_printf("sunsu: Cannot map registers.\n");
1120 return;
1121 }
1122
1123 /*
1124 * 0x20 is sun4m thing, Dave Redman heritage.
1125 * See arch/sparc/kernel/irq.c.
1126 */
1127#define IRQ_4M(n) ((n)|0x20)
1128
1129 /*
1130 * There is no intr property on MrCoffee, so hardwire it.
1131 */
1132 up->port.irq = IRQ_4M(13);
1133#endif
1134
1135ebus_done:
1136
1137 spin_lock_irqsave(&up->port.lock, flags);
1138
1139 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1140 /*
1141 * Do a simple existence test first; if we fail this, there's
1142 * no point trying anything else.
1143 *
1144 * 0x80 is used as a nonsense port to prevent against false
1145 * positives due to ISA bus float. The assumption is that
1146 * 0x80 is a non-existent port; which should be safe since
1147 * include/asm/io.h also makes this assumption.
1148 */
1149 scratch = serial_inp(up, UART_IER);
1150 serial_outp(up, UART_IER, 0);
1151#ifdef __i386__
1152 outb(0xff, 0x080);
1153#endif
1154 scratch2 = serial_inp(up, UART_IER);
1155 serial_outp(up, UART_IER, 0x0f);
1156#ifdef __i386__
1157 outb(0, 0x080);
1158#endif
1159 scratch3 = serial_inp(up, UART_IER);
1160 serial_outp(up, UART_IER, scratch);
1161 if (scratch2 != 0 || scratch3 != 0x0F)
1162 goto out; /* We failed; there's nothing here */
1163 }
1164
1165 save_mcr = serial_in(up, UART_MCR);
1166 save_lcr = serial_in(up, UART_LCR);
1167
1168 /*
1169 * Check to see if a UART is really there. Certain broken
1170 * internal modems based on the Rockwell chipset fail this
1171 * test, because they apparently don't implement the loopback
1172 * test mode. So this test is skipped on the COM 1 through
1173 * COM 4 ports. This *should* be safe, since no board
1174 * manufacturer would be stupid enough to design a board
1175 * that conflicts with COM 1-4 --- we hope!
1176 */
1177 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1178 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1179 status1 = serial_inp(up, UART_MSR) & 0xF0;
1180 serial_outp(up, UART_MCR, save_mcr);
1181 if (status1 != 0x90)
1182 goto out; /* We failed loopback test */
1183 }
1184 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1185 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1186 serial_outp(up, UART_LCR, 0);
1187 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1188 scratch = serial_in(up, UART_IIR) >> 6;
1189 switch (scratch) {
1190 case 0:
1191 up->port.type = PORT_16450;
1192 break;
1193 case 1:
1194 up->port.type = PORT_UNKNOWN;
1195 break;
1196 case 2:
1197 up->port.type = PORT_16550;
1198 break;
1199 case 3:
1200 up->port.type = PORT_16550A;
1201 break;
1202 }
1203 if (up->port.type == PORT_16550A) {
1204 /* Check for Startech UART's */
1205 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1206 if (serial_in(up, UART_EFR) == 0) {
1207 up->port.type = PORT_16650;
1208 } else {
1209 serial_outp(up, UART_LCR, 0xBF);
1210 if (serial_in(up, UART_EFR) == 0)
1211 up->port.type = PORT_16650V2;
1212 }
1213 }
1214 if (up->port.type == PORT_16550A) {
1215 /* Check for TI 16750 */
1216 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1217 serial_outp(up, UART_FCR,
1218 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1219 scratch = serial_in(up, UART_IIR) >> 5;
1220 if (scratch == 7) {
1221 /*
1222 * If this is a 16750, and not a cheap UART
1223 * clone, then it should only go into 64 byte
1224 * mode if the UART_FCR7_64BYTE bit was set
1225 * while UART_LCR_DLAB was latched.
1226 */
1227 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1228 serial_outp(up, UART_LCR, 0);
1229 serial_outp(up, UART_FCR,
1230 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1231 scratch = serial_in(up, UART_IIR) >> 5;
1232 if (scratch == 6)
1233 up->port.type = PORT_16750;
1234 }
1235 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1236 }
1237 serial_outp(up, UART_LCR, save_lcr);
1238 if (up->port.type == PORT_16450) {
1239 scratch = serial_in(up, UART_SCR);
1240 serial_outp(up, UART_SCR, 0xa5);
1241 status1 = serial_in(up, UART_SCR);
1242 serial_outp(up, UART_SCR, 0x5a);
1243 status2 = serial_in(up, UART_SCR);
1244 serial_outp(up, UART_SCR, scratch);
1245
1246 if ((status1 != 0xa5) || (status2 != 0x5a))
1247 up->port.type = PORT_8250;
1248 }
1249
1250 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1251
1252 if (up->port.type == PORT_UNKNOWN)
1253 goto out;
1254 up->type_probed = up->port.type; /* XXX */
1255
1256 /*
1257 * Reset the UART.
1258 */
1259#ifdef CONFIG_SERIAL_8250_RSA
1260 if (up->port.type == PORT_RSA)
1261 serial_outp(up, UART_RSA_FRR, 0);
1262#endif
1263 serial_outp(up, UART_MCR, save_mcr);
1264 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1265 UART_FCR_CLEAR_RCVR |
1266 UART_FCR_CLEAR_XMIT));
1267 serial_outp(up, UART_FCR, 0);
1268 (void)serial_in(up, UART_RX);
1269 serial_outp(up, UART_IER, 0);
1270
1271out:
1272 spin_unlock_irqrestore(&up->port.lock, flags);
1273}
1274
1275static struct uart_driver sunsu_reg = {
1276 .owner = THIS_MODULE,
1277 .driver_name = "serial",
1278 .devfs_name = "tts/",
1279 .dev_name = "ttyS",
1280 .major = TTY_MAJOR,
1281};
1282
1283static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1284{
623f41eb 1285 int quot, baud;
1da177e4
LT		 1286#ifdef CONFIG_SERIO
1287 struct serio *serio;
1288#endif
1289
1290 up->port.line = channel;
1291 up->port.type = PORT_UNKNOWN;
1292 up->port.uartclk = (SU_BASE_BAUD * 16);
1293
623f41eb 1294 if (up->su_type == SU_PORT_KBD) {
1da177e4 1295 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
623f41eb
DM		 1296 baud = 1200;
1297 } else {
1da177e4 1298 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
623f41eb
DM		 1299 baud = 4800;
1300 }
1301 quot = up->port.uartclk / (16 * baud);
1da177e4
LT		 1302
1303 sunsu_autoconfig(up);
1304 if (up->port.type == PORT_UNKNOWN)
1305 return -1;
1306
1307 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1308 channel,
1309 up->port.membase, __irq_itoa(up->port.irq),
1310 sunsu_type(&up->port));
1311
1312#ifdef CONFIG_SERIO
1313 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1314 if (serio) {
1315 memset(serio, 0, sizeof(*serio));
1316
1317 serio->port_data = up;
1318
1319 serio->id.type = SERIO_RS232;
1320 if (up->su_type == SU_PORT_KBD) {
1321 serio->id.proto = SERIO_SUNKBD;
1322 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1323 } else {
1324 serio->id.proto = SERIO_SUN;
1325 serio->id.extra = 1;
1326 strlcpy(serio->name, "sums", sizeof(serio->name));
1327 }
1328 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1329 sizeof(serio->phys));
1330
1331 serio->write = sunsu_serio_write;
1332 serio->open = sunsu_serio_open;
1333 serio->close = sunsu_serio_close;
1334
1335 serio_register_port(serio);
1336 } else {
1337 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1338 channel);
1339 }
1340#endif
1341
623f41eb
DM		 1342 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1343
1da177e4
LT		 1344 sunsu_startup(&up->port);
1345 return 0;
1346}
1347
1348/*
1349 * ------------------------------------------------------------
1350 * Serial console driver
1351 * ------------------------------------------------------------
1352 */
1353
1354#ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1355
1356#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1357
1358/*
1359 * Wait for transmitter & holding register to empty
1360 */
1361static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1362{
1363 unsigned int status, tmout = 10000;
1364
1365 /* Wait up to 10ms for the character(s) to be sent. */
1366 do {
1367 status = serial_in(up, UART_LSR);
1368
1369 if (status & UART_LSR_BI)
1370 up->lsr_break_flag = UART_LSR_BI;
1371
1372 if (--tmout == 0)
1373 break;
1374 udelay(1);
1375 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1376
1377 /* Wait up to 1s for flow control if necessary */
1378 if (up->port.flags & ASYNC_CONS_FLOW) {
1379 tmout = 1000000;
1380 while (--tmout &&
1381 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1382 udelay(1);
1383 }
1384}
1385
1386/*
1387 * Print a string to the serial port trying not to disturb
1388 * any possible real use of the port...
1389 */
1390static void sunsu_console_write(struct console *co, const char *s,
1391 unsigned int count)
1392{
1393 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1394 unsigned int ier;
1395 int i;
1396
1397 /*
1398 * First save the UER then disable the interrupts
1399 */
1400 ier = serial_in(up, UART_IER);
1401 serial_out(up, UART_IER, 0);
1402
1403 /*
1404 * Now, do each character
1405 */
1406 for (i = 0; i < count; i++, s++) {
1407 wait_for_xmitr(up);
1408
1409 /*
1410 * Send the character out.
1411 * If a LF, also do CR...
1412 */
1413 serial_out(up, UART_TX, *s);
1414 if (*s == 10) {
1415 wait_for_xmitr(up);
1416 serial_out(up, UART_TX, 13);
1417 }
1418 }
1419
1420 /*
1421 * Finally, wait for transmitter to become empty
1422 * and restore the IER
1423 */
1424 wait_for_xmitr(up);
1425 serial_out(up, UART_IER, ier);
1426}
1427
1428/*
1429 * Setup initial baud/bits/parity. We do two things here:
1430 * - construct a cflag setting for the first su_open()
1431 * - initialize the serial port
1432 * Return non-zero if we didn't find a serial port.
1433 */
1434static int __init sunsu_console_setup(struct console *co, char *options)
1435{
1436 struct uart_port *port;
1437 int baud = 9600;
1438 int bits = 8;
1439 int parity = 'n';
1440 int flow = 'n';
1441
1442 printk("Console: ttyS%d (SU)\n",
1443 (sunsu_reg.minor - 64) + co->index);
1444
1445 /*
1446 * Check whether an invalid uart number has been specified, and
1447 * if so, search for the first available port that does have
1448 * console support.
1449 */
1450 if (co->index >= UART_NR)
1451 co->index = 0;
1452 port = &sunsu_ports[co->index].port;
1453
1454 /*
1455 * Temporary fix.
1456 */
1457 spin_lock_init(&port->lock);
1458
1459 if (options)
1460 uart_parse_options(options, &baud, &parity, &bits, &flow);
1461
1462 return uart_set_options(port, co, baud, parity, bits, flow);
1463}
1464
1465static struct console sunsu_cons = {
1466 .name = "ttyS",
1467 .write = sunsu_console_write,
1468 .device = uart_console_device,
1469 .setup = sunsu_console_setup,
1470 .flags = CON_PRINTBUFFER,
1471 .index = -1,
1472 .data = &sunsu_reg,
1473};
1474#define SUNSU_CONSOLE (&sunsu_cons)
1475
1476/*
1477 * Register console.
1478 */
1479
1480static int __init sunsu_serial_console_init(void)
1481{
1482 int i;
1483
1484 if (con_is_present())
1485 return 0;
1486
1487 for (i = 0; i < UART_NR; i++) {
1488 int this_minor = sunsu_reg.minor + i;
1489
1490 if ((this_minor - 64) == (serial_console - 1))
1491 break;
1492 }
1493 if (i == UART_NR)
1494 return 0;
1495 if (sunsu_ports[i].port_node == 0)
1496 return 0;
1497
1498 sunsu_cons.index = i;
1499 register_console(&sunsu_cons);
1500 return 0;
1501}
1502#else
1503#define SUNSU_CONSOLE (NULL)
1504#define sunsu_serial_console_init() do { } while (0)
1505#endif
1506
1507static int __init sunsu_serial_init(void)
1508{
1509 int instance, ret, i;
1510
1511 /* How many instances do we need? */
1512 instance = 0;
1513 for (i = 0; i < UART_NR; i++) {
1514 struct uart_sunsu_port *up = &sunsu_ports[i];
1515
1516 if (up->su_type == SU_PORT_MS ||
1517 up->su_type == SU_PORT_KBD)
1518 continue;
1519
1520 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1521 up->port.type = PORT_UNKNOWN;
1522 up->port.uartclk = (SU_BASE_BAUD * 16);
1523
1524 sunsu_autoconfig(up);
1525 if (up->port.type == PORT_UNKNOWN)
1526 continue;
1527
1528 up->port.line = instance++;
1529 up->port.ops = &sunsu_pops;
1530 }
1531
1532 sunsu_reg.minor = sunserial_current_minor;
1533 sunserial_current_minor += instance;
1534
1535 sunsu_reg.nr = instance;
1536 sunsu_reg.cons = SUNSU_CONSOLE;
1537
1538 ret = uart_register_driver(&sunsu_reg);
1539 if (ret < 0)
1540 return ret;
1541
1542 sunsu_serial_console_init();
1543 for (i = 0; i < UART_NR; i++) {
1544 struct uart_sunsu_port *up = &sunsu_ports[i];
1545
1546 /* Do not register Keyboard/Mouse lines with UART
1547 * layer.
1548 */
1549 if (up->su_type == SU_PORT_MS ||
1550 up->su_type == SU_PORT_KBD)
1551 continue;
1552
1553 if (up->port.type == PORT_UNKNOWN)
1554 continue;
1555
1556 uart_add_one_port(&sunsu_reg, &up->port);
1557 }
1558
1559 return 0;
1560}
1561
1562static int su_node_ok(int node, char *name, int namelen)
1563{
1564 if (strncmp(name, "su", namelen) == 0 ||
1565 strncmp(name, "su_pnp", namelen) == 0)
1566 return 1;
1567
1568 if (strncmp(name, "serial", namelen) == 0) {
1569 char compat[32];
1570 int clen;
1571
1572 /* Is it _really_ a 'su' device? */
1573 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1574 if (clen > 0) {
1575 if (strncmp(compat, "sab82532", 8) == 0) {
1576 /* Nope, Siemens serial, not for us. */
1577 return 0;
1578 }
1579 }
1580 return 1;
1581 }
1582
1583 return 0;
1584}
1585
1586#define SU_PROPSIZE 128
1587
1588/*
1589 * Scan status structure.
1590 * "prop" is a local variable but it eats stack to keep it in each
1591 * stack frame of a recursive procedure.
1592 */
1593struct su_probe_scan {
1594 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1595 int msx, kbx; /* minors for mouse and keyboard */
1596 int devices; /* scan index */
1597 char prop[SU_PROPSIZE];
1598};
1599
1600/*
1601 * We have several platforms which present 'su' in different parts
1602 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1603 * We walk over the tree and find them wherever PROM hides them.
1604 */
1605static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1606{
1607 struct uart_sunsu_port *up;
1608 int len;
1609
1610 if (t->devices >= UART_NR)
1611 return;
1612
1613 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1614 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1615 if (len <= 1)
1616 continue; /* Broken PROM node */
1617
1618 if (su_node_ok(sunode, t->prop, len)) {
1619 up = &sunsu_ports[t->devices];
1620 if (t->kbnode != 0 && sunode == t->kbnode) {
1621 t->kbx = t->devices;
1622 up->su_type = SU_PORT_KBD;
1623 } else if (t->msnode != 0 && sunode == t->msnode) {
1624 t->msx = t->devices;
1625 up->su_type = SU_PORT_MS;
1626 } else {
1627#ifdef CONFIG_SPARC64
1628 /*
1629 * Do not attempt to use the truncated
1630 * keyboard/mouse ports as serial ports
1631 * on Ultras with PC keyboard attached.
1632 */
1633 if (prom_getbool(sunode, "mouse"))
1634 continue;
1635 if (prom_getbool(sunode, "keyboard"))
1636 continue;
1637#endif
1638 up->su_type = SU_PORT_PORT;
1639 }
1640 up->port_node = sunode;
1641 ++t->devices;
1642 } else {
1643 su_probe_any(t, prom_getchild(sunode));
1644 }
1645 }
1646}
1647
1648static int __init sunsu_probe(void)
1649{
1650 int node;
1651 int len;
1652 struct su_probe_scan scan;
1653
1654 /*
1655 * First, we scan the tree.
1656 */
1657 scan.devices = 0;
1658 scan.msx = -1;
1659 scan.kbx = -1;
1660 scan.kbnode = 0;
1661 scan.msnode = 0;
1662
1663 /*
1664 * Get the nodes for keyboard and mouse from 'aliases'...
1665 */
1666 node = prom_getchild(prom_root_node);
1667 node = prom_searchsiblings(node, "aliases");
1668 if (node != 0) {
1669 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1670 if (len > 0) {
1671 scan.prop[len] = 0;
1672 scan.kbnode = prom_finddevice(scan.prop);
1673 }
1674
1675 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1676 if (len > 0) {
1677 scan.prop[len] = 0;
1678 scan.msnode = prom_finddevice(scan.prop);
1679 }
1680 }
1681
1682 su_probe_any(&scan, prom_getchild(prom_root_node));
1683
1684 /*
1685 * Second, we process the special case of keyboard and mouse.
1686 *
1687 * Currently if we got keyboard and mouse hooked to "su" ports
1688 * we do not use any possible remaining "su" as a serial port.
1689 * Thus, we ignore values of .msx and .kbx, then compact ports.
1690 */
1691 if (scan.msx != -1 && scan.kbx != -1) {
1692 sunsu_ports[0].su_type = SU_PORT_MS;
1693 sunsu_ports[0].port_node = scan.msnode;
1694 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1695
1696 sunsu_ports[1].su_type = SU_PORT_KBD;
1697 sunsu_ports[1].port_node = scan.kbnode;
1698 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1699
1700 return 0;
1701 }
1702
1703 if (scan.msx != -1 || scan.kbx != -1) {
1704 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1705 return -ENODEV;
1706 }
1707
1708 if (scan.devices == 0)
1709 return -ENODEV;
1710
1711 /*
1712 * Console must be initiated after the generic initialization.
1713 */
1714 sunsu_serial_init();
1715
1716 return 0;
1717}
1718
1719static void __exit sunsu_exit(void)
1720{
1721 int i, saw_uart;
1722
1723 saw_uart = 0;
1724 for (i = 0; i < UART_NR; i++) {
1725 struct uart_sunsu_port *up = &sunsu_ports[i];
1726
1727 if (up->su_type == SU_PORT_MS ||
1728 up->su_type == SU_PORT_KBD) {
1729#ifdef CONFIG_SERIO
1730 if (up->serio) {
1731 serio_unregister_port(up->serio);
1732 up->serio = NULL;
1733 }
1734#endif
1735 } else if (up->port.type != PORT_UNKNOWN) {
1736 uart_remove_one_port(&sunsu_reg, &up->port);
1737 saw_uart++;
1738 }
1739 }
1740
1741 if (saw_uart)
1742 uart_unregister_driver(&sunsu_reg);
1743}
1744
1745module_init(sunsu_probe);
1746module_exit(sunsu_exit);
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