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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/serial/sh-sci.c | |
3 | * | |
4 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) | |
5 | * | |
e108b2ca | 6 | * Copyright (C) 2002 - 2006 Paul Mundt |
1da177e4 LT |
7 | * |
8 | * based off of the old drivers/char/sh-sci.c by: | |
9 | * | |
10 | * Copyright (C) 1999, 2000 Niibe Yutaka | |
11 | * Copyright (C) 2000 Sugioka Toshinobu | |
12 | * Modified to support multiple serial ports. Stuart Menefy (May 2000). | |
13 | * Modified to support SecureEdge. David McCullough (2002) | |
14 | * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). | |
15 | * | |
16 | * This file is subject to the terms and conditions of the GNU General Public | |
17 | * License. See the file "COPYING" in the main directory of this archive | |
18 | * for more details. | |
19 | */ | |
0b3d4ef6 PM |
20 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
21 | #define SUPPORT_SYSRQ | |
22 | #endif | |
1da177e4 LT |
23 | |
24 | #undef DEBUG | |
25 | ||
1da177e4 LT |
26 | #include <linux/module.h> |
27 | #include <linux/errno.h> | |
1da177e4 LT |
28 | #include <linux/timer.h> |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/tty.h> | |
31 | #include <linux/tty_flip.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/major.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/sysrq.h> | |
1da177e4 LT |
36 | #include <linux/ioport.h> |
37 | #include <linux/mm.h> | |
1da177e4 LT |
38 | #include <linux/init.h> |
39 | #include <linux/delay.h> | |
40 | #include <linux/console.h> | |
e108b2ca | 41 | #include <linux/platform_device.h> |
1da177e4 LT |
42 | |
43 | #ifdef CONFIG_CPU_FREQ | |
44 | #include <linux/notifier.h> | |
45 | #include <linux/cpufreq.h> | |
46 | #endif | |
47 | ||
b7a76e4b | 48 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
fa5da2f7 | 49 | #include <linux/ctype.h> |
b7a76e4b | 50 | #include <asm/clock.h> |
1da177e4 | 51 | #include <asm/sh_bios.h> |
e108b2ca | 52 | #include <asm/kgdb.h> |
1da177e4 LT |
53 | #endif |
54 | ||
e108b2ca | 55 | #include <asm/sci.h> |
1da177e4 LT |
56 | #include "sh-sci.h" |
57 | ||
e108b2ca PM |
58 | struct sci_port { |
59 | struct uart_port port; | |
60 | ||
61 | /* Port type */ | |
62 | unsigned int type; | |
63 | ||
64 | /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ | |
32351a28 | 65 | unsigned int irqs[SCIx_NR_IRQS]; |
e108b2ca PM |
66 | |
67 | /* Port pin configuration */ | |
68 | void (*init_pins)(struct uart_port *port, | |
69 | unsigned int cflag); | |
1da177e4 | 70 | |
e108b2ca PM |
71 | /* Port enable callback */ |
72 | void (*enable)(struct uart_port *port); | |
73 | ||
74 | /* Port disable callback */ | |
75 | void (*disable)(struct uart_port *port); | |
76 | ||
77 | /* Break timer */ | |
78 | struct timer_list break_timer; | |
79 | int break_flag; | |
80 | }; | |
81 | ||
82 | #ifdef CONFIG_SH_KGDB | |
1da177e4 | 83 | static struct sci_port *kgdb_sci_port; |
e108b2ca | 84 | #endif |
1da177e4 LT |
85 | |
86 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | |
e108b2ca PM |
87 | static struct sci_port *serial_console_port; |
88 | #endif | |
1da177e4 LT |
89 | |
90 | /* Function prototypes */ | |
b129a8cc | 91 | static void sci_stop_tx(struct uart_port *port); |
1da177e4 | 92 | |
e108b2ca | 93 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS |
b7a76e4b | 94 | |
e108b2ca PM |
95 | static struct sci_port sci_ports[SCI_NPORTS]; |
96 | static struct uart_driver sci_uart_driver; | |
1da177e4 | 97 | |
e108b2ca PM |
98 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \ |
99 | defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) | |
100 | static inline void handle_error(struct uart_port *port) | |
101 | { | |
102 | /* Clear error flags */ | |
1da177e4 LT |
103 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); |
104 | } | |
105 | ||
106 | static int get_char(struct uart_port *port) | |
107 | { | |
108 | unsigned long flags; | |
109 | unsigned short status; | |
110 | int c; | |
111 | ||
e108b2ca PM |
112 | spin_lock_irqsave(&port->lock, flags); |
113 | do { | |
1da177e4 LT |
114 | status = sci_in(port, SCxSR); |
115 | if (status & SCxSR_ERRORS(port)) { | |
116 | handle_error(port); | |
117 | continue; | |
118 | } | |
119 | } while (!(status & SCxSR_RDxF(port))); | |
120 | c = sci_in(port, SCxRDR); | |
121 | sci_in(port, SCxSR); /* Dummy read */ | |
122 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
e108b2ca | 123 | spin_unlock_irqrestore(&port->lock, flags); |
1da177e4 LT |
124 | |
125 | return c; | |
126 | } | |
1da177e4 LT |
127 | #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ |
128 | ||
e108b2ca | 129 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB) |
1da177e4 LT |
130 | static void put_char(struct uart_port *port, char c) |
131 | { | |
132 | unsigned long flags; | |
133 | unsigned short status; | |
134 | ||
e108b2ca | 135 | spin_lock_irqsave(&port->lock, flags); |
1da177e4 LT |
136 | |
137 | do { | |
138 | status = sci_in(port, SCxSR); | |
139 | } while (!(status & SCxSR_TDxE(port))); | |
140 | ||
141 | sci_out(port, SCxTDR, c); | |
142 | sci_in(port, SCxSR); /* Dummy read */ | |
143 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
144 | ||
e108b2ca | 145 | spin_unlock_irqrestore(&port->lock, flags); |
1da177e4 | 146 | } |
e108b2ca | 147 | #endif |
1da177e4 | 148 | |
e108b2ca | 149 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
1da177e4 LT |
150 | static void put_string(struct sci_port *sci_port, const char *buffer, int count) |
151 | { | |
152 | struct uart_port *port = &sci_port->port; | |
153 | const unsigned char *p = buffer; | |
154 | int i; | |
155 | ||
156 | #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) | |
157 | int checksum; | |
158 | int usegdb=0; | |
159 | ||
160 | #ifdef CONFIG_SH_STANDARD_BIOS | |
b7a76e4b | 161 | /* This call only does a trap the first time it is |
1da177e4 LT |
162 | * called, and so is safe to do here unconditionally |
163 | */ | |
164 | usegdb |= sh_bios_in_gdb_mode(); | |
165 | #endif | |
166 | #ifdef CONFIG_SH_KGDB | |
fa5da2f7 | 167 | usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port)); |
1da177e4 LT |
168 | #endif |
169 | ||
170 | if (usegdb) { | |
171 | /* $<packet info>#<checksum>. */ | |
172 | do { | |
173 | unsigned char c; | |
174 | put_char(port, '$'); | |
175 | put_char(port, 'O'); /* 'O'utput to console */ | |
176 | checksum = 'O'; | |
177 | ||
178 | for (i=0; i<count; i++) { /* Don't use run length encoding */ | |
179 | int h, l; | |
180 | ||
181 | c = *p++; | |
182 | h = highhex(c); | |
183 | l = lowhex(c); | |
184 | put_char(port, h); | |
185 | put_char(port, l); | |
186 | checksum += h + l; | |
187 | } | |
188 | put_char(port, '#'); | |
189 | put_char(port, highhex(checksum)); | |
190 | put_char(port, lowhex(checksum)); | |
191 | } while (get_char(port) != '+'); | |
192 | } else | |
193 | #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */ | |
194 | for (i=0; i<count; i++) { | |
195 | if (*p == 10) | |
196 | put_char(port, '\r'); | |
197 | put_char(port, *p++); | |
198 | } | |
199 | } | |
200 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | |
201 | ||
1da177e4 | 202 | #ifdef CONFIG_SH_KGDB |
1da177e4 LT |
203 | static int kgdb_sci_getchar(void) |
204 | { | |
e108b2ca | 205 | int c; |
1da177e4 LT |
206 | |
207 | /* Keep trying to read a character, this could be neater */ | |
fa5da2f7 | 208 | while ((c = get_char(&kgdb_sci_port->port)) < 0) |
e108b2ca | 209 | cpu_relax(); |
1da177e4 LT |
210 | |
211 | return c; | |
212 | } | |
213 | ||
e108b2ca | 214 | static inline void kgdb_sci_putchar(int c) |
1da177e4 | 215 | { |
fa5da2f7 | 216 | put_char(&kgdb_sci_port->port, c); |
1da177e4 | 217 | } |
1da177e4 LT |
218 | #endif /* CONFIG_SH_KGDB */ |
219 | ||
220 | #if defined(__H8300S__) | |
221 | enum { sci_disable, sci_enable }; | |
222 | ||
e108b2ca | 223 | static void h8300_sci_config(struct uart_port* port, unsigned int ctrl) |
1da177e4 LT |
224 | { |
225 | volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL; | |
226 | int ch = (port->mapbase - SMR0) >> 3; | |
227 | unsigned char mask = 1 << (ch+1); | |
228 | ||
229 | if (ctrl == sci_disable) { | |
230 | *mstpcrl |= mask; | |
231 | } else { | |
232 | *mstpcrl &= ~mask; | |
233 | } | |
234 | } | |
e108b2ca PM |
235 | |
236 | static inline void h8300_sci_enable(struct uart_port *port) | |
237 | { | |
238 | h8300_sci_config(port, sci_enable); | |
239 | } | |
240 | ||
241 | static inline void h8300_sci_disable(struct uart_port *port) | |
242 | { | |
243 | h8300_sci_config(port, sci_disable); | |
244 | } | |
1da177e4 LT |
245 | #endif |
246 | ||
e108b2ca PM |
247 | #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \ |
248 | defined(__H8300H__) || defined(__H8300S__) | |
1da177e4 LT |
249 | static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) |
250 | { | |
251 | int ch = (port->mapbase - SMR0) >> 3; | |
252 | ||
253 | /* set DDR regs */ | |
e108b2ca PM |
254 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, |
255 | h8300_sci_pins[ch].rx, | |
256 | H8300_GPIO_INPUT); | |
257 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, | |
258 | h8300_sci_pins[ch].tx, | |
259 | H8300_GPIO_OUTPUT); | |
260 | ||
1da177e4 LT |
261 | /* tx mark output*/ |
262 | H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; | |
263 | } | |
e108b2ca PM |
264 | #else |
265 | #define sci_init_pins_sci NULL | |
266 | #endif | |
267 | ||
268 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) | |
269 | static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) | |
270 | { | |
271 | unsigned int fcr_val = 0; | |
272 | ||
273 | if (cflag & CRTSCTS) | |
274 | fcr_val |= SCFCR_MCE; | |
275 | ||
276 | sci_out(port, SCFCR, fcr_val); | |
277 | } | |
278 | #else | |
279 | #define sci_init_pins_irda NULL | |
1da177e4 | 280 | #endif |
e108b2ca PM |
281 | |
282 | #ifdef SCI_ONLY | |
283 | #define sci_init_pins_scif NULL | |
1da177e4 LT |
284 | #endif |
285 | ||
286 | #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) | |
e108b2ca | 287 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) |
b7a76e4b PM |
288 | /* SH7300 doesn't use RTS/CTS */ |
289 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |
290 | { | |
291 | sci_out(port, SCFCR, 0); | |
292 | } | |
293 | #elif defined(CONFIG_CPU_SH3) | |
e108b2ca | 294 | /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ |
1da177e4 LT |
295 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) |
296 | { | |
297 | unsigned int fcr_val = 0; | |
b7a76e4b PM |
298 | unsigned short data; |
299 | ||
300 | /* We need to set SCPCR to enable RTS/CTS */ | |
301 | data = ctrl_inw(SCPCR); | |
302 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ | |
303 | ctrl_outw(data & 0x0fcf, SCPCR); | |
1da177e4 | 304 | |
1da177e4 LT |
305 | if (cflag & CRTSCTS) |
306 | fcr_val |= SCFCR_MCE; | |
307 | else { | |
1da177e4 LT |
308 | /* We need to set SCPCR to enable RTS/CTS */ |
309 | data = ctrl_inw(SCPCR); | |
310 | /* Clear out SCP7MD1,0, SCP4MD1,0, | |
311 | Set SCP6MD1,0 = {01} (output) */ | |
b7a76e4b | 312 | ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR); |
1da177e4 LT |
313 | |
314 | data = ctrl_inb(SCPDR); | |
315 | /* Set /RTS2 (bit6) = 0 */ | |
b7a76e4b | 316 | ctrl_outb(data & 0xbf, SCPDR); |
1da177e4 | 317 | } |
b7a76e4b | 318 | |
1da177e4 LT |
319 | sci_out(port, SCFCR, fcr_val); |
320 | } | |
41504c39 PM |
321 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
322 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |
323 | { | |
324 | unsigned int fcr_val = 0; | |
325 | ||
326 | if (cflag & CRTSCTS) { | |
327 | fcr_val |= SCFCR_MCE; | |
328 | ||
329 | ctrl_outw(0x0000, PORT_PSCR); | |
330 | } else { | |
331 | unsigned short data; | |
332 | ||
333 | data = ctrl_inw(PORT_PSCR); | |
334 | data &= 0x033f; | |
335 | data |= 0x0400; | |
336 | ctrl_outw(data, PORT_PSCR); | |
337 | ||
338 | ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); | |
339 | } | |
340 | ||
341 | sci_out(port, SCFCR, fcr_val); | |
342 | } | |
1da177e4 | 343 | #else |
1da177e4 LT |
344 | /* For SH7750 */ |
345 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |
346 | { | |
347 | unsigned int fcr_val = 0; | |
348 | ||
349 | if (cflag & CRTSCTS) { | |
350 | fcr_val |= SCFCR_MCE; | |
351 | } else { | |
e108b2ca PM |
352 | #ifdef CONFIG_CPU_SUBTYPE_SH7343 |
353 | /* Nothing */ | |
32351a28 | 354 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) |
b7a76e4b PM |
355 | ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ |
356 | #else | |
1da177e4 | 357 | ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ |
b7a76e4b | 358 | #endif |
1da177e4 LT |
359 | } |
360 | sci_out(port, SCFCR, fcr_val); | |
361 | } | |
e108b2ca PM |
362 | #endif |
363 | ||
32351a28 PM |
364 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
365 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | |
366 | defined(CONFIG_CPU_SUBTYPE_SH7785) | |
e108b2ca PM |
367 | static inline int scif_txroom(struct uart_port *port) |
368 | { | |
369 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f); | |
370 | } | |
371 | ||
372 | static inline int scif_rxroom(struct uart_port *port) | |
373 | { | |
374 | return sci_in(port, SCRFDR) & 0x7f; | |
375 | } | |
376 | #else | |
377 | static inline int scif_txroom(struct uart_port *port) | |
378 | { | |
379 | return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | |
380 | } | |
1da177e4 | 381 | |
e108b2ca PM |
382 | static inline int scif_rxroom(struct uart_port *port) |
383 | { | |
384 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | |
385 | } | |
1da177e4 LT |
386 | #endif |
387 | #endif /* SCIF_ONLY || SCI_AND_SCIF */ | |
388 | ||
e108b2ca PM |
389 | static inline int sci_txroom(struct uart_port *port) |
390 | { | |
391 | return ((sci_in(port, SCxSR) & SCI_TDRE) != 0); | |
392 | } | |
393 | ||
394 | static inline int sci_rxroom(struct uart_port *port) | |
395 | { | |
396 | return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0); | |
397 | } | |
398 | ||
1da177e4 LT |
399 | /* ********************************************************************** * |
400 | * the interrupt related routines * | |
401 | * ********************************************************************** */ | |
402 | ||
403 | static void sci_transmit_chars(struct uart_port *port) | |
404 | { | |
405 | struct circ_buf *xmit = &port->info->xmit; | |
406 | unsigned int stopped = uart_tx_stopped(port); | |
1da177e4 LT |
407 | unsigned short status; |
408 | unsigned short ctrl; | |
e108b2ca | 409 | int count; |
1da177e4 LT |
410 | |
411 | status = sci_in(port, SCxSR); | |
412 | if (!(status & SCxSR_TDxE(port))) { | |
1da177e4 LT |
413 | ctrl = sci_in(port, SCSCR); |
414 | if (uart_circ_empty(xmit)) { | |
415 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | |
416 | } else { | |
417 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
418 | } | |
419 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
420 | return; |
421 | } | |
422 | ||
e108b2ca PM |
423 | #ifndef SCI_ONLY |
424 | if (port->type == PORT_SCIF) | |
425 | count = scif_txroom(port); | |
426 | else | |
1da177e4 | 427 | #endif |
e108b2ca | 428 | count = sci_txroom(port); |
1da177e4 LT |
429 | |
430 | do { | |
431 | unsigned char c; | |
432 | ||
433 | if (port->x_char) { | |
434 | c = port->x_char; | |
435 | port->x_char = 0; | |
436 | } else if (!uart_circ_empty(xmit) && !stopped) { | |
437 | c = xmit->buf[xmit->tail]; | |
438 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
439 | } else { | |
440 | break; | |
441 | } | |
442 | ||
443 | sci_out(port, SCxTDR, c); | |
444 | ||
445 | port->icount.tx++; | |
446 | } while (--count > 0); | |
447 | ||
448 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
449 | ||
450 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
451 | uart_write_wakeup(port); | |
452 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 453 | sci_stop_tx(port); |
1da177e4 | 454 | } else { |
1da177e4 LT |
455 | ctrl = sci_in(port, SCSCR); |
456 | ||
457 | #if !defined(SCI_ONLY) | |
458 | if (port->type == PORT_SCIF) { | |
459 | sci_in(port, SCxSR); /* Dummy read */ | |
460 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
461 | } | |
462 | #endif | |
463 | ||
464 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
465 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
466 | } |
467 | } | |
468 | ||
469 | /* On SH3, SCIF may read end-of-break as a space->mark char */ | |
470 | #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); }) | |
471 | ||
7d12e780 | 472 | static inline void sci_receive_chars(struct uart_port *port) |
1da177e4 | 473 | { |
e108b2ca | 474 | struct sci_port *sci_port = (struct sci_port *)port; |
1da177e4 LT |
475 | struct tty_struct *tty = port->info->tty; |
476 | int i, count, copied = 0; | |
477 | unsigned short status; | |
33f0f88f | 478 | unsigned char flag; |
1da177e4 LT |
479 | |
480 | status = sci_in(port, SCxSR); | |
481 | if (!(status & SCxSR_RDxF(port))) | |
482 | return; | |
483 | ||
484 | while (1) { | |
485 | #if !defined(SCI_ONLY) | |
e108b2ca PM |
486 | if (port->type == PORT_SCIF) |
487 | count = scif_rxroom(port); | |
488 | else | |
1da177e4 | 489 | #endif |
e108b2ca | 490 | count = sci_rxroom(port); |
1da177e4 LT |
491 | |
492 | /* Don't copy more bytes than there is room for in the buffer */ | |
33f0f88f | 493 | count = tty_buffer_request_room(tty, count); |
1da177e4 LT |
494 | |
495 | /* If for any reason we can't copy more data, we're done! */ | |
496 | if (count == 0) | |
497 | break; | |
498 | ||
499 | if (port->type == PORT_SCI) { | |
500 | char c = sci_in(port, SCxRDR); | |
7d12e780 | 501 | if (uart_handle_sysrq_char(port, c) || sci_port->break_flag) |
1da177e4 | 502 | count = 0; |
e108b2ca PM |
503 | else { |
504 | tty_insert_flip_char(tty, c, TTY_NORMAL); | |
1da177e4 LT |
505 | } |
506 | } else { | |
507 | for (i=0; i<count; i++) { | |
508 | char c = sci_in(port, SCxRDR); | |
509 | status = sci_in(port, SCxSR); | |
510 | #if defined(CONFIG_CPU_SH3) | |
511 | /* Skip "chars" during break */ | |
e108b2ca | 512 | if (sci_port->break_flag) { |
1da177e4 LT |
513 | if ((c == 0) && |
514 | (status & SCxSR_FER(port))) { | |
515 | count--; i--; | |
516 | continue; | |
517 | } | |
e108b2ca | 518 | |
1da177e4 LT |
519 | /* Nonzero => end-of-break */ |
520 | pr_debug("scif: debounce<%02x>\n", c); | |
e108b2ca PM |
521 | sci_port->break_flag = 0; |
522 | ||
1da177e4 LT |
523 | if (STEPFN(c)) { |
524 | count--; i--; | |
525 | continue; | |
526 | } | |
527 | } | |
528 | #endif /* CONFIG_CPU_SH3 */ | |
7d12e780 | 529 | if (uart_handle_sysrq_char(port, c)) { |
1da177e4 LT |
530 | count--; i--; |
531 | continue; | |
532 | } | |
533 | ||
534 | /* Store data and status */ | |
1da177e4 | 535 | if (status&SCxSR_FER(port)) { |
33f0f88f | 536 | flag = TTY_FRAME; |
1da177e4 LT |
537 | pr_debug("sci: frame error\n"); |
538 | } else if (status&SCxSR_PER(port)) { | |
33f0f88f | 539 | flag = TTY_PARITY; |
1da177e4 | 540 | pr_debug("sci: parity error\n"); |
33f0f88f AC |
541 | } else |
542 | flag = TTY_NORMAL; | |
543 | tty_insert_flip_char(tty, c, flag); | |
1da177e4 LT |
544 | } |
545 | } | |
546 | ||
547 | sci_in(port, SCxSR); /* dummy read */ | |
548 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
549 | ||
1da177e4 LT |
550 | copied += count; |
551 | port->icount.rx += count; | |
552 | } | |
553 | ||
554 | if (copied) { | |
555 | /* Tell the rest of the system the news. New characters! */ | |
556 | tty_flip_buffer_push(tty); | |
557 | } else { | |
558 | sci_in(port, SCxSR); /* dummy read */ | |
559 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
560 | } | |
561 | } | |
562 | ||
563 | #define SCI_BREAK_JIFFIES (HZ/20) | |
564 | /* The sci generates interrupts during the break, | |
565 | * 1 per millisecond or so during the break period, for 9600 baud. | |
566 | * So dont bother disabling interrupts. | |
567 | * But dont want more than 1 break event. | |
568 | * Use a kernel timer to periodically poll the rx line until | |
569 | * the break is finished. | |
570 | */ | |
571 | static void sci_schedule_break_timer(struct sci_port *port) | |
572 | { | |
573 | port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES; | |
574 | add_timer(&port->break_timer); | |
575 | } | |
576 | /* Ensure that two consecutive samples find the break over. */ | |
577 | static void sci_break_timer(unsigned long data) | |
578 | { | |
e108b2ca PM |
579 | struct sci_port *port = (struct sci_port *)data; |
580 | ||
581 | if (sci_rxd_in(&port->port) == 0) { | |
1da177e4 | 582 | port->break_flag = 1; |
e108b2ca PM |
583 | sci_schedule_break_timer(port); |
584 | } else if (port->break_flag == 1) { | |
1da177e4 LT |
585 | /* break is over. */ |
586 | port->break_flag = 2; | |
e108b2ca PM |
587 | sci_schedule_break_timer(port); |
588 | } else | |
589 | port->break_flag = 0; | |
1da177e4 LT |
590 | } |
591 | ||
592 | static inline int sci_handle_errors(struct uart_port *port) | |
593 | { | |
594 | int copied = 0; | |
595 | unsigned short status = sci_in(port, SCxSR); | |
596 | struct tty_struct *tty = port->info->tty; | |
597 | ||
e108b2ca | 598 | if (status & SCxSR_ORER(port)) { |
1da177e4 | 599 | /* overrun error */ |
e108b2ca | 600 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) |
33f0f88f | 601 | copied++; |
1da177e4 LT |
602 | pr_debug("sci: overrun error\n"); |
603 | } | |
604 | ||
e108b2ca | 605 | if (status & SCxSR_FER(port)) { |
1da177e4 LT |
606 | if (sci_rxd_in(port) == 0) { |
607 | /* Notify of BREAK */ | |
e108b2ca PM |
608 | struct sci_port *sci_port = (struct sci_port *)port; |
609 | ||
610 | if (!sci_port->break_flag) { | |
611 | sci_port->break_flag = 1; | |
612 | sci_schedule_break_timer(sci_port); | |
613 | ||
1da177e4 | 614 | /* Do sysrq handling. */ |
e108b2ca | 615 | if (uart_handle_break(port)) |
1da177e4 | 616 | return 0; |
1da177e4 | 617 | pr_debug("sci: BREAK detected\n"); |
e108b2ca | 618 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
33f0f88f | 619 | copied++; |
1da177e4 | 620 | } |
e108b2ca | 621 | } else { |
1da177e4 | 622 | /* frame error */ |
e108b2ca | 623 | if (tty_insert_flip_char(tty, 0, TTY_FRAME)) |
33f0f88f | 624 | copied++; |
1da177e4 LT |
625 | pr_debug("sci: frame error\n"); |
626 | } | |
627 | } | |
628 | ||
e108b2ca | 629 | if (status & SCxSR_PER(port)) { |
1da177e4 | 630 | /* parity error */ |
e108b2ca PM |
631 | if (tty_insert_flip_char(tty, 0, TTY_PARITY)) |
632 | copied++; | |
1da177e4 LT |
633 | pr_debug("sci: parity error\n"); |
634 | } | |
635 | ||
33f0f88f | 636 | if (copied) |
1da177e4 | 637 | tty_flip_buffer_push(tty); |
1da177e4 LT |
638 | |
639 | return copied; | |
640 | } | |
641 | ||
642 | static inline int sci_handle_breaks(struct uart_port *port) | |
643 | { | |
644 | int copied = 0; | |
645 | unsigned short status = sci_in(port, SCxSR); | |
646 | struct tty_struct *tty = port->info->tty; | |
647 | struct sci_port *s = &sci_ports[port->line]; | |
648 | ||
0b3d4ef6 PM |
649 | if (uart_handle_break(port)) |
650 | return 0; | |
651 | ||
b7a76e4b | 652 | if (!s->break_flag && status & SCxSR_BRK(port)) { |
1da177e4 LT |
653 | #if defined(CONFIG_CPU_SH3) |
654 | /* Debounce break */ | |
655 | s->break_flag = 1; | |
656 | #endif | |
657 | /* Notify of BREAK */ | |
e108b2ca | 658 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
33f0f88f | 659 | copied++; |
1da177e4 LT |
660 | pr_debug("sci: BREAK detected\n"); |
661 | } | |
662 | ||
663 | #if defined(SCIF_ORER) | |
664 | /* XXX: Handle SCIF overrun error */ | |
665 | if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) { | |
666 | sci_out(port, SCLSR, 0); | |
e108b2ca | 667 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) { |
1da177e4 | 668 | copied++; |
1da177e4 LT |
669 | pr_debug("sci: overrun error\n"); |
670 | } | |
671 | } | |
672 | #endif | |
673 | ||
33f0f88f | 674 | if (copied) |
1da177e4 | 675 | tty_flip_buffer_push(tty); |
e108b2ca | 676 | |
1da177e4 LT |
677 | return copied; |
678 | } | |
679 | ||
7d12e780 | 680 | static irqreturn_t sci_rx_interrupt(int irq, void *port) |
1da177e4 | 681 | { |
1da177e4 LT |
682 | /* I think sci_receive_chars has to be called irrespective |
683 | * of whether the I_IXOFF is set, otherwise, how is the interrupt | |
684 | * to be disabled? | |
685 | */ | |
7d12e780 | 686 | sci_receive_chars(port); |
1da177e4 LT |
687 | |
688 | return IRQ_HANDLED; | |
689 | } | |
690 | ||
7d12e780 | 691 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
1da177e4 LT |
692 | { |
693 | struct uart_port *port = ptr; | |
694 | ||
e108b2ca | 695 | spin_lock_irq(&port->lock); |
1da177e4 | 696 | sci_transmit_chars(port); |
e108b2ca | 697 | spin_unlock_irq(&port->lock); |
1da177e4 LT |
698 | |
699 | return IRQ_HANDLED; | |
700 | } | |
701 | ||
7d12e780 | 702 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) |
1da177e4 LT |
703 | { |
704 | struct uart_port *port = ptr; | |
705 | ||
706 | /* Handle errors */ | |
707 | if (port->type == PORT_SCI) { | |
708 | if (sci_handle_errors(port)) { | |
709 | /* discard character in rx buffer */ | |
710 | sci_in(port, SCxSR); | |
711 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
712 | } | |
713 | } else { | |
714 | #if defined(SCIF_ORER) | |
715 | if((sci_in(port, SCLSR) & SCIF_ORER) != 0) { | |
716 | struct tty_struct *tty = port->info->tty; | |
717 | ||
718 | sci_out(port, SCLSR, 0); | |
33f0f88f AC |
719 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); |
720 | tty_flip_buffer_push(tty); | |
721 | pr_debug("scif: overrun error\n"); | |
1da177e4 LT |
722 | } |
723 | #endif | |
7d12e780 | 724 | sci_rx_interrupt(irq, ptr); |
1da177e4 LT |
725 | } |
726 | ||
727 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | |
728 | ||
729 | /* Kick the transmission */ | |
7d12e780 | 730 | sci_tx_interrupt(irq, ptr); |
1da177e4 LT |
731 | |
732 | return IRQ_HANDLED; | |
733 | } | |
734 | ||
7d12e780 | 735 | static irqreturn_t sci_br_interrupt(int irq, void *ptr) |
1da177e4 LT |
736 | { |
737 | struct uart_port *port = ptr; | |
738 | ||
739 | /* Handle BREAKs */ | |
740 | sci_handle_breaks(port); | |
741 | sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); | |
742 | ||
743 | return IRQ_HANDLED; | |
744 | } | |
745 | ||
7d12e780 | 746 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
1da177e4 LT |
747 | { |
748 | unsigned short ssr_status, scr_status; | |
749 | struct uart_port *port = ptr; | |
750 | ||
751 | ssr_status = sci_in(port,SCxSR); | |
752 | scr_status = sci_in(port,SCSCR); | |
753 | ||
754 | /* Tx Interrupt */ | |
e108b2ca | 755 | if ((ssr_status & 0x0020) && (scr_status & 0x0080)) |
7d12e780 | 756 | sci_tx_interrupt(irq, ptr); |
1da177e4 | 757 | /* Rx Interrupt */ |
e108b2ca | 758 | if ((ssr_status & 0x0002) && (scr_status & 0x0040)) |
7d12e780 | 759 | sci_rx_interrupt(irq, ptr); |
1da177e4 | 760 | /* Error Interrupt */ |
e108b2ca | 761 | if ((ssr_status & 0x0080) && (scr_status & 0x0400)) |
7d12e780 | 762 | sci_er_interrupt(irq, ptr); |
1da177e4 | 763 | /* Break Interrupt */ |
e108b2ca | 764 | if ((ssr_status & 0x0010) && (scr_status & 0x0200)) |
7d12e780 | 765 | sci_br_interrupt(irq, ptr); |
1da177e4 LT |
766 | |
767 | return IRQ_HANDLED; | |
768 | } | |
769 | ||
770 | #ifdef CONFIG_CPU_FREQ | |
771 | /* | |
772 | * Here we define a transistion notifier so that we can update all of our | |
773 | * ports' baud rate when the peripheral clock changes. | |
774 | */ | |
e108b2ca PM |
775 | static int sci_notifier(struct notifier_block *self, |
776 | unsigned long phase, void *p) | |
1da177e4 LT |
777 | { |
778 | struct cpufreq_freqs *freqs = p; | |
779 | int i; | |
780 | ||
781 | if ((phase == CPUFREQ_POSTCHANGE) || | |
782 | (phase == CPUFREQ_RESUMECHANGE)){ | |
783 | for (i = 0; i < SCI_NPORTS; i++) { | |
784 | struct uart_port *port = &sci_ports[i].port; | |
b7a76e4b | 785 | struct clk *clk; |
1da177e4 LT |
786 | |
787 | /* | |
788 | * Update the uartclk per-port if frequency has | |
789 | * changed, since it will no longer necessarily be | |
790 | * consistent with the old frequency. | |
791 | * | |
792 | * Really we want to be able to do something like | |
793 | * uart_change_speed() or something along those lines | |
794 | * here to implicitly reset the per-port baud rate.. | |
795 | * | |
796 | * Clean this up later.. | |
797 | */ | |
1d118562 | 798 | clk = clk_get(NULL, "module_clk"); |
b7a76e4b PM |
799 | port->uartclk = clk_get_rate(clk) * 16; |
800 | clk_put(clk); | |
1da177e4 LT |
801 | } |
802 | ||
e108b2ca PM |
803 | printk(KERN_INFO "%s: got a postchange notification " |
804 | "for cpu %d (old %d, new %d)\n", | |
805 | __FUNCTION__, freqs->cpu, freqs->old, freqs->new); | |
1da177e4 LT |
806 | } |
807 | ||
808 | return NOTIFY_OK; | |
809 | } | |
810 | ||
811 | static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; | |
812 | #endif /* CONFIG_CPU_FREQ */ | |
813 | ||
814 | static int sci_request_irq(struct sci_port *port) | |
815 | { | |
816 | int i; | |
7d12e780 | 817 | irqreturn_t (*handlers[4])(int irq, void *ptr) = { |
1da177e4 LT |
818 | sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt, |
819 | sci_br_interrupt, | |
820 | }; | |
821 | const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full", | |
822 | "SCI Transmit Data Empty", "SCI Break" }; | |
823 | ||
824 | if (port->irqs[0] == port->irqs[1]) { | |
825 | if (!port->irqs[0]) { | |
826 | printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n"); | |
827 | return -ENODEV; | |
828 | } | |
e108b2ca PM |
829 | |
830 | if (request_irq(port->irqs[0], sci_mpxed_interrupt, | |
35f3c518 | 831 | IRQF_DISABLED, "sci", port)) { |
1da177e4 LT |
832 | printk(KERN_ERR "sci: Cannot allocate irq.\n"); |
833 | return -ENODEV; | |
834 | } | |
835 | } else { | |
836 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { | |
837 | if (!port->irqs[i]) | |
838 | continue; | |
e108b2ca | 839 | if (request_irq(port->irqs[i], handlers[i], |
35f3c518 | 840 | IRQF_DISABLED, desc[i], port)) { |
1da177e4 LT |
841 | printk(KERN_ERR "sci: Cannot allocate irq.\n"); |
842 | return -ENODEV; | |
843 | } | |
844 | } | |
845 | } | |
846 | ||
847 | return 0; | |
848 | } | |
849 | ||
850 | static void sci_free_irq(struct sci_port *port) | |
851 | { | |
852 | int i; | |
853 | ||
854 | if (port->irqs[0] == port->irqs[1]) { | |
855 | if (!port->irqs[0]) | |
856 | printk("sci: sci_free_irq error\n"); | |
857 | else | |
858 | free_irq(port->irqs[0], port); | |
859 | } else { | |
860 | for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { | |
861 | if (!port->irqs[i]) | |
862 | continue; | |
863 | ||
864 | free_irq(port->irqs[i], port); | |
865 | } | |
866 | } | |
867 | } | |
868 | ||
869 | static unsigned int sci_tx_empty(struct uart_port *port) | |
870 | { | |
871 | /* Can't detect */ | |
872 | return TIOCSER_TEMT; | |
873 | } | |
874 | ||
875 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
876 | { | |
877 | /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */ | |
878 | /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */ | |
879 | /* If you have signals for DTR and DCD, please implement here. */ | |
880 | } | |
881 | ||
882 | static unsigned int sci_get_mctrl(struct uart_port *port) | |
883 | { | |
884 | /* This routine is used for geting signals of: DTR, DCD, DSR, RI, | |
885 | and CTS/RTS */ | |
886 | ||
887 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; | |
888 | } | |
889 | ||
b129a8cc | 890 | static void sci_start_tx(struct uart_port *port) |
1da177e4 | 891 | { |
e108b2ca | 892 | unsigned short ctrl; |
1da177e4 | 893 | |
e108b2ca PM |
894 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ |
895 | ctrl = sci_in(port, SCSCR); | |
896 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
897 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
898 | } |
899 | ||
b129a8cc | 900 | static void sci_stop_tx(struct uart_port *port) |
1da177e4 | 901 | { |
1da177e4 LT |
902 | unsigned short ctrl; |
903 | ||
904 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
905 | ctrl = sci_in(port, SCSCR); |
906 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | |
907 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
908 | } |
909 | ||
910 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start) | |
911 | { | |
1da177e4 LT |
912 | unsigned short ctrl; |
913 | ||
914 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
915 | ctrl = sci_in(port, SCSCR); |
916 | ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE; | |
917 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
918 | } |
919 | ||
920 | static void sci_stop_rx(struct uart_port *port) | |
921 | { | |
1da177e4 LT |
922 | unsigned short ctrl; |
923 | ||
924 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
925 | ctrl = sci_in(port, SCSCR); |
926 | ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); | |
927 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
928 | } |
929 | ||
930 | static void sci_enable_ms(struct uart_port *port) | |
931 | { | |
932 | /* Nothing here yet .. */ | |
933 | } | |
934 | ||
935 | static void sci_break_ctl(struct uart_port *port, int break_state) | |
936 | { | |
937 | /* Nothing here yet .. */ | |
938 | } | |
939 | ||
940 | static int sci_startup(struct uart_port *port) | |
941 | { | |
942 | struct sci_port *s = &sci_ports[port->line]; | |
943 | ||
e108b2ca PM |
944 | if (s->enable) |
945 | s->enable(port); | |
1da177e4 LT |
946 | |
947 | sci_request_irq(s); | |
d656901b | 948 | sci_start_tx(port); |
1da177e4 LT |
949 | sci_start_rx(port, 1); |
950 | ||
951 | return 0; | |
952 | } | |
953 | ||
954 | static void sci_shutdown(struct uart_port *port) | |
955 | { | |
956 | struct sci_port *s = &sci_ports[port->line]; | |
957 | ||
958 | sci_stop_rx(port); | |
b129a8cc | 959 | sci_stop_tx(port); |
1da177e4 LT |
960 | sci_free_irq(s); |
961 | ||
e108b2ca PM |
962 | if (s->disable) |
963 | s->disable(port); | |
1da177e4 LT |
964 | } |
965 | ||
606d099c AC |
966 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
967 | struct ktermios *old) | |
1da177e4 LT |
968 | { |
969 | struct sci_port *s = &sci_ports[port->line]; | |
970 | unsigned int status, baud, smr_val; | |
1da177e4 LT |
971 | int t; |
972 | ||
973 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
974 | ||
e108b2ca PM |
975 | switch (baud) { |
976 | case 0: | |
977 | t = -1; | |
978 | break; | |
979 | default: | |
980 | { | |
981 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) | |
1d118562 | 982 | struct clk *clk = clk_get(NULL, "module_clk"); |
e108b2ca PM |
983 | t = SCBRR_VALUE(baud, clk_get_rate(clk)); |
984 | clk_put(clk); | |
985 | #else | |
986 | t = SCBRR_VALUE(baud); | |
987 | #endif | |
e108b2ca | 988 | break; |
fa5da2f7 | 989 | } |
e108b2ca PM |
990 | } |
991 | ||
1da177e4 LT |
992 | do { |
993 | status = sci_in(port, SCxSR); | |
994 | } while (!(status & SCxSR_TEND(port))); | |
995 | ||
996 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | |
997 | ||
998 | #if !defined(SCI_ONLY) | |
e108b2ca | 999 | if (port->type == PORT_SCIF) |
1da177e4 | 1000 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); |
1da177e4 LT |
1001 | #endif |
1002 | ||
1003 | smr_val = sci_in(port, SCSMR) & 3; | |
1004 | if ((termios->c_cflag & CSIZE) == CS7) | |
1005 | smr_val |= 0x40; | |
1006 | if (termios->c_cflag & PARENB) | |
1007 | smr_val |= 0x20; | |
1008 | if (termios->c_cflag & PARODD) | |
1009 | smr_val |= 0x30; | |
1010 | if (termios->c_cflag & CSTOPB) | |
1011 | smr_val |= 0x08; | |
1012 | ||
1013 | uart_update_timeout(port, termios->c_cflag, baud); | |
1014 | ||
1015 | sci_out(port, SCSMR, smr_val); | |
1016 | ||
1da177e4 LT |
1017 | if (t > 0) { |
1018 | if(t >= 256) { | |
1019 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); | |
1020 | t >>= 2; | |
1021 | } else { | |
1022 | sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3); | |
1023 | } | |
1024 | sci_out(port, SCBRR, t); | |
1025 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ | |
1026 | } | |
1027 | ||
b7a76e4b PM |
1028 | if (likely(s->init_pins)) |
1029 | s->init_pins(port, termios->c_cflag); | |
1030 | ||
1da177e4 LT |
1031 | sci_out(port, SCSCR, SCSCR_INIT(port)); |
1032 | ||
1033 | if ((termios->c_cflag & CREAD) != 0) | |
1034 | sci_start_rx(port,0); | |
1da177e4 LT |
1035 | } |
1036 | ||
1037 | static const char *sci_type(struct uart_port *port) | |
1038 | { | |
1039 | switch (port->type) { | |
1040 | case PORT_SCI: return "sci"; | |
1041 | case PORT_SCIF: return "scif"; | |
1042 | case PORT_IRDA: return "irda"; | |
1043 | } | |
1044 | ||
1045 | return 0; | |
1046 | } | |
1047 | ||
1048 | static void sci_release_port(struct uart_port *port) | |
1049 | { | |
1050 | /* Nothing here yet .. */ | |
1051 | } | |
1052 | ||
1053 | static int sci_request_port(struct uart_port *port) | |
1054 | { | |
1055 | /* Nothing here yet .. */ | |
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | static void sci_config_port(struct uart_port *port, int flags) | |
1060 | { | |
1061 | struct sci_port *s = &sci_ports[port->line]; | |
1062 | ||
1063 | port->type = s->type; | |
1064 | ||
e108b2ca PM |
1065 | switch (port->type) { |
1066 | case PORT_SCI: | |
1067 | s->init_pins = sci_init_pins_sci; | |
1068 | break; | |
1069 | case PORT_SCIF: | |
1070 | s->init_pins = sci_init_pins_scif; | |
1071 | break; | |
1072 | case PORT_IRDA: | |
1073 | s->init_pins = sci_init_pins_irda; | |
1074 | break; | |
1075 | } | |
1076 | ||
1da177e4 LT |
1077 | #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
1078 | if (port->mapbase == 0) | |
1079 | port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF"); | |
1080 | ||
e108b2ca | 1081 | port->membase = (void __iomem *)port->mapbase; |
1da177e4 LT |
1082 | #endif |
1083 | } | |
1084 | ||
1085 | static int sci_verify_port(struct uart_port *port, struct serial_struct *ser) | |
1086 | { | |
1087 | struct sci_port *s = &sci_ports[port->line]; | |
1088 | ||
1089 | if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS) | |
1090 | return -EINVAL; | |
1091 | if (ser->baud_base < 2400) | |
1092 | /* No paper tape reader for Mitch.. */ | |
1093 | return -EINVAL; | |
1094 | ||
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | static struct uart_ops sci_uart_ops = { | |
1099 | .tx_empty = sci_tx_empty, | |
1100 | .set_mctrl = sci_set_mctrl, | |
1101 | .get_mctrl = sci_get_mctrl, | |
1102 | .start_tx = sci_start_tx, | |
1103 | .stop_tx = sci_stop_tx, | |
1104 | .stop_rx = sci_stop_rx, | |
1105 | .enable_ms = sci_enable_ms, | |
1106 | .break_ctl = sci_break_ctl, | |
1107 | .startup = sci_startup, | |
1108 | .shutdown = sci_shutdown, | |
1109 | .set_termios = sci_set_termios, | |
1110 | .type = sci_type, | |
1111 | .release_port = sci_release_port, | |
1112 | .request_port = sci_request_port, | |
1113 | .config_port = sci_config_port, | |
1114 | .verify_port = sci_verify_port, | |
1115 | }; | |
1116 | ||
e108b2ca PM |
1117 | static void __init sci_init_ports(void) |
1118 | { | |
1119 | static int first = 1; | |
1120 | int i; | |
1121 | ||
1122 | if (!first) | |
1123 | return; | |
1124 | ||
1125 | first = 0; | |
1126 | ||
1127 | for (i = 0; i < SCI_NPORTS; i++) { | |
1128 | sci_ports[i].port.ops = &sci_uart_ops; | |
1129 | sci_ports[i].port.iotype = UPIO_MEM; | |
1130 | sci_ports[i].port.line = i; | |
1131 | sci_ports[i].port.fifosize = 1; | |
1132 | ||
1133 | #if defined(__H8300H__) || defined(__H8300S__) | |
1134 | #ifdef __H8300S__ | |
1135 | sci_ports[i].enable = h8300_sci_enable; | |
1136 | sci_ports[i].disable = h8300_sci_disable; | |
1137 | #endif | |
1138 | sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK; | |
1139 | #elif defined(CONFIG_SUPERH64) | |
1140 | sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16; | |
1da177e4 | 1141 | #else |
e108b2ca PM |
1142 | /* |
1143 | * XXX: We should use a proper SCI/SCIF clock | |
1144 | */ | |
1145 | { | |
1d118562 | 1146 | struct clk *clk = clk_get(NULL, "module_clk"); |
e108b2ca PM |
1147 | sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; |
1148 | clk_put(clk); | |
1149 | } | |
1da177e4 | 1150 | #endif |
e108b2ca PM |
1151 | |
1152 | sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i]; | |
1153 | sci_ports[i].break_timer.function = sci_break_timer; | |
1154 | ||
1155 | init_timer(&sci_ports[i].break_timer); | |
1156 | } | |
1157 | } | |
1158 | ||
1159 | int __init early_sci_setup(struct uart_port *port) | |
1160 | { | |
1161 | if (unlikely(port->line > SCI_NPORTS)) | |
1162 | return -ENODEV; | |
1163 | ||
1164 | sci_init_ports(); | |
1165 | ||
1166 | sci_ports[port->line].port.membase = port->membase; | |
1167 | sci_ports[port->line].port.mapbase = port->mapbase; | |
1168 | sci_ports[port->line].port.type = port->type; | |
1169 | ||
1170 | return 0; | |
1171 | } | |
1da177e4 LT |
1172 | |
1173 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | |
1174 | /* | |
1175 | * Print a string to the serial port trying not to disturb | |
1176 | * any possible real use of the port... | |
1177 | */ | |
1178 | static void serial_console_write(struct console *co, const char *s, | |
1179 | unsigned count) | |
1180 | { | |
1181 | put_string(serial_console_port, s, count); | |
1182 | } | |
1183 | ||
1184 | static int __init serial_console_setup(struct console *co, char *options) | |
1185 | { | |
1186 | struct uart_port *port; | |
1187 | int baud = 115200; | |
1188 | int bits = 8; | |
1189 | int parity = 'n'; | |
1190 | int flow = 'n'; | |
1191 | int ret; | |
1192 | ||
e108b2ca PM |
1193 | /* |
1194 | * Check whether an invalid uart number has been specified, and | |
1195 | * if so, search for the first available port that does have | |
1196 | * console support. | |
1197 | */ | |
1198 | if (co->index >= SCI_NPORTS) | |
1199 | co->index = 0; | |
1200 | ||
1da177e4 LT |
1201 | serial_console_port = &sci_ports[co->index]; |
1202 | port = &serial_console_port->port; | |
1da177e4 LT |
1203 | |
1204 | /* | |
e108b2ca PM |
1205 | * Also need to check port->type, we don't actually have any |
1206 | * UPIO_PORT ports, but uart_report_port() handily misreports | |
1207 | * it anyways if we don't have a port available by the time this is | |
1208 | * called. | |
1da177e4 | 1209 | */ |
e108b2ca PM |
1210 | if (!port->type) |
1211 | return -ENODEV; | |
1212 | if (!port->membase || !port->mapbase) | |
1213 | return -ENODEV; | |
1214 | ||
e108b2ca PM |
1215 | port->type = serial_console_port->type; |
1216 | ||
1217 | if (port->flags & UPF_IOREMAP) | |
1218 | sci_config_port(port, 0); | |
1219 | ||
1220 | if (serial_console_port->enable) | |
1221 | serial_console_port->enable(port); | |
b7a76e4b | 1222 | |
1da177e4 LT |
1223 | if (options) |
1224 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1225 | ||
1226 | ret = uart_set_options(port, co, baud, parity, bits, flow); | |
1227 | #if defined(__H8300H__) || defined(__H8300S__) | |
1228 | /* disable rx interrupt */ | |
1229 | if (ret == 0) | |
1230 | sci_stop_rx(port); | |
1231 | #endif | |
1232 | return ret; | |
1233 | } | |
1234 | ||
1235 | static struct console serial_console = { | |
1236 | .name = "ttySC", | |
1237 | .device = uart_console_device, | |
1238 | .write = serial_console_write, | |
1239 | .setup = serial_console_setup, | |
fa5da2f7 | 1240 | .flags = CON_PRINTBUFFER, |
1da177e4 LT |
1241 | .index = -1, |
1242 | .data = &sci_uart_driver, | |
1243 | }; | |
1244 | ||
1245 | static int __init sci_console_init(void) | |
1246 | { | |
e108b2ca | 1247 | sci_init_ports(); |
1da177e4 LT |
1248 | register_console(&serial_console); |
1249 | return 0; | |
1250 | } | |
1da177e4 LT |
1251 | console_initcall(sci_console_init); |
1252 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | |
1253 | ||
1254 | #ifdef CONFIG_SH_KGDB | |
1255 | /* | |
1256 | * FIXME: Most of this can go away.. at the moment, we rely on | |
1257 | * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though | |
1258 | * most of that can easily be done here instead. | |
1259 | * | |
1260 | * For the time being, just accept the values that were parsed earlier.. | |
1261 | */ | |
1262 | static void __init kgdb_console_get_options(struct uart_port *port, int *baud, | |
1263 | int *parity, int *bits) | |
1264 | { | |
1265 | *baud = kgdb_baud; | |
1266 | *parity = tolower(kgdb_parity); | |
1267 | *bits = kgdb_bits - '0'; | |
1268 | } | |
1269 | ||
1270 | /* | |
1271 | * The naming here is somewhat misleading, since kgdb_console_setup() takes | |
1272 | * care of the early-on initialization for kgdb, regardless of whether we | |
1273 | * actually use kgdb as a console or not. | |
1274 | * | |
1275 | * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense. | |
1276 | */ | |
1277 | int __init kgdb_console_setup(struct console *co, char *options) | |
1278 | { | |
1279 | struct uart_port *port = &sci_ports[kgdb_portnum].port; | |
1280 | int baud = 38400; | |
1281 | int bits = 8; | |
1282 | int parity = 'n'; | |
1283 | int flow = 'n'; | |
1284 | ||
b7a76e4b | 1285 | if (co->index != kgdb_portnum) |
1da177e4 LT |
1286 | co->index = kgdb_portnum; |
1287 | ||
fa5da2f7 PM |
1288 | kgdb_sci_port = &sci_ports[co->index]; |
1289 | port = &kgdb_sci_port->port; | |
1290 | ||
1291 | /* | |
1292 | * Also need to check port->type, we don't actually have any | |
1293 | * UPIO_PORT ports, but uart_report_port() handily misreports | |
1294 | * it anyways if we don't have a port available by the time this is | |
1295 | * called. | |
1296 | */ | |
1297 | if (!port->type) | |
1298 | return -ENODEV; | |
1299 | if (!port->membase || !port->mapbase) | |
1300 | return -ENODEV; | |
1301 | ||
1da177e4 LT |
1302 | if (options) |
1303 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1304 | else | |
1305 | kgdb_console_get_options(port, &baud, &parity, &bits); | |
1306 | ||
1307 | kgdb_getchar = kgdb_sci_getchar; | |
1308 | kgdb_putchar = kgdb_sci_putchar; | |
1309 | ||
1310 | return uart_set_options(port, co, baud, parity, bits, flow); | |
1311 | } | |
1312 | #endif /* CONFIG_SH_KGDB */ | |
1313 | ||
1314 | #ifdef CONFIG_SH_KGDB_CONSOLE | |
1315 | static struct console kgdb_console = { | |
fa5da2f7 PM |
1316 | .name = "ttySC", |
1317 | .device = uart_console_device, | |
1318 | .write = kgdb_console_write, | |
1319 | .setup = kgdb_console_setup, | |
1320 | .flags = CON_PRINTBUFFER, | |
1321 | .index = -1, | |
1da177e4 LT |
1322 | .data = &sci_uart_driver, |
1323 | }; | |
1324 | ||
1325 | /* Register the KGDB console so we get messages (d'oh!) */ | |
1326 | static int __init kgdb_console_init(void) | |
1327 | { | |
e108b2ca | 1328 | sci_init_ports(); |
1da177e4 LT |
1329 | register_console(&kgdb_console); |
1330 | return 0; | |
1331 | } | |
1da177e4 LT |
1332 | console_initcall(kgdb_console_init); |
1333 | #endif /* CONFIG_SH_KGDB_CONSOLE */ | |
1334 | ||
1335 | #if defined(CONFIG_SH_KGDB_CONSOLE) | |
1336 | #define SCI_CONSOLE &kgdb_console | |
1337 | #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE) | |
1338 | #define SCI_CONSOLE &serial_console | |
1339 | #else | |
b7a76e4b | 1340 | #define SCI_CONSOLE 0 |
1da177e4 LT |
1341 | #endif |
1342 | ||
1343 | static char banner[] __initdata = | |
1344 | KERN_INFO "SuperH SCI(F) driver initialized\n"; | |
1345 | ||
1346 | static struct uart_driver sci_uart_driver = { | |
1347 | .owner = THIS_MODULE, | |
1348 | .driver_name = "sci", | |
1da177e4 LT |
1349 | .dev_name = "ttySC", |
1350 | .major = SCI_MAJOR, | |
1351 | .minor = SCI_MINOR_START, | |
e108b2ca | 1352 | .nr = SCI_NPORTS, |
1da177e4 LT |
1353 | .cons = SCI_CONSOLE, |
1354 | }; | |
1355 | ||
e108b2ca PM |
1356 | /* |
1357 | * Register a set of serial devices attached to a platform device. The | |
1358 | * list is terminated with a zero flags entry, which means we expect | |
1359 | * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need | |
1360 | * remapping (such as sh64) should also set UPF_IOREMAP. | |
1361 | */ | |
1362 | static int __devinit sci_probe(struct platform_device *dev) | |
1da177e4 | 1363 | { |
e108b2ca PM |
1364 | struct plat_sci_port *p = dev->dev.platform_data; |
1365 | int i; | |
1da177e4 | 1366 | |
32351a28 | 1367 | for (i = 0; p && p->flags != 0; p++, i++) { |
e108b2ca | 1368 | struct sci_port *sciport = &sci_ports[i]; |
1da177e4 | 1369 | |
32351a28 PM |
1370 | /* Sanity check */ |
1371 | if (unlikely(i == SCI_NPORTS)) { | |
1372 | dev_notice(&dev->dev, "Attempting to register port " | |
1373 | "%d when only %d are available.\n", | |
1374 | i+1, SCI_NPORTS); | |
1375 | dev_notice(&dev->dev, "Consider bumping " | |
1376 | "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); | |
1377 | break; | |
1378 | } | |
1379 | ||
e108b2ca | 1380 | sciport->port.mapbase = p->mapbase; |
b7a76e4b | 1381 | |
e108b2ca PM |
1382 | /* |
1383 | * For the simple (and majority of) cases where we don't need | |
1384 | * to do any remapping, just cast the cookie directly. | |
1385 | */ | |
1386 | if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP)) | |
1387 | p->membase = (void __iomem *)p->mapbase; | |
1da177e4 | 1388 | |
e108b2ca PM |
1389 | sciport->port.membase = p->membase; |
1390 | ||
1391 | sciport->port.irq = p->irqs[SCIx_TXI_IRQ]; | |
1392 | sciport->port.flags = p->flags; | |
1393 | sciport->port.dev = &dev->dev; | |
1394 | ||
1395 | sciport->type = sciport->port.type = p->type; | |
1396 | ||
1397 | memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs)); | |
1398 | ||
1399 | uart_add_one_port(&sci_uart_driver, &sciport->port); | |
1da177e4 LT |
1400 | } |
1401 | ||
fa5da2f7 PM |
1402 | #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE) |
1403 | kgdb_sci_port = &sci_ports[kgdb_portnum]; | |
1404 | kgdb_getchar = kgdb_sci_getchar; | |
1405 | kgdb_putchar = kgdb_sci_putchar; | |
1406 | #endif | |
1407 | ||
1da177e4 LT |
1408 | #ifdef CONFIG_CPU_FREQ |
1409 | cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); | |
e108b2ca | 1410 | dev_info(&dev->dev, "sci: CPU frequency notifier registered\n"); |
1da177e4 LT |
1411 | #endif |
1412 | ||
1413 | #ifdef CONFIG_SH_STANDARD_BIOS | |
1414 | sh_bios_gdb_detach(); | |
1415 | #endif | |
1416 | ||
e108b2ca | 1417 | return 0; |
1da177e4 LT |
1418 | } |
1419 | ||
e108b2ca PM |
1420 | static int __devexit sci_remove(struct platform_device *dev) |
1421 | { | |
1422 | int i; | |
1423 | ||
1424 | for (i = 0; i < SCI_NPORTS; i++) | |
1425 | uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port); | |
1426 | ||
1427 | return 0; | |
1428 | } | |
1429 | ||
1430 | static int sci_suspend(struct platform_device *dev, pm_message_t state) | |
1da177e4 | 1431 | { |
e108b2ca PM |
1432 | int i; |
1433 | ||
1434 | for (i = 0; i < SCI_NPORTS; i++) { | |
1435 | struct sci_port *p = &sci_ports[i]; | |
1436 | ||
1437 | if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev) | |
1438 | uart_suspend_port(&sci_uart_driver, &p->port); | |
1439 | } | |
1da177e4 | 1440 | |
e108b2ca PM |
1441 | return 0; |
1442 | } | |
1da177e4 | 1443 | |
e108b2ca PM |
1444 | static int sci_resume(struct platform_device *dev) |
1445 | { | |
1446 | int i; | |
1447 | ||
1448 | for (i = 0; i < SCI_NPORTS; i++) { | |
1449 | struct sci_port *p = &sci_ports[i]; | |
1450 | ||
1451 | if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev) | |
1452 | uart_resume_port(&sci_uart_driver, &p->port); | |
1453 | } | |
1454 | ||
1455 | return 0; | |
1456 | } | |
1457 | ||
1458 | static struct platform_driver sci_driver = { | |
1459 | .probe = sci_probe, | |
1460 | .remove = __devexit_p(sci_remove), | |
1461 | .suspend = sci_suspend, | |
1462 | .resume = sci_resume, | |
1463 | .driver = { | |
1464 | .name = "sh-sci", | |
1465 | .owner = THIS_MODULE, | |
1466 | }, | |
1467 | }; | |
1468 | ||
1469 | static int __init sci_init(void) | |
1470 | { | |
1471 | int ret; | |
1472 | ||
1473 | printk(banner); | |
1474 | ||
1475 | sci_init_ports(); | |
1476 | ||
1477 | ret = uart_register_driver(&sci_uart_driver); | |
1478 | if (likely(ret == 0)) { | |
1479 | ret = platform_driver_register(&sci_driver); | |
1480 | if (unlikely(ret)) | |
1481 | uart_unregister_driver(&sci_uart_driver); | |
1482 | } | |
1483 | ||
1484 | return ret; | |
1485 | } | |
1486 | ||
1487 | static void __exit sci_exit(void) | |
1488 | { | |
1489 | platform_driver_unregister(&sci_driver); | |
1da177e4 LT |
1490 | uart_unregister_driver(&sci_uart_driver); |
1491 | } | |
1492 | ||
1493 | module_init(sci_init); | |
1494 | module_exit(sci_exit); | |
1495 | ||
e108b2ca | 1496 | MODULE_LICENSE("GPL"); |