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1da177e4 LT |
1 | /* |
2 | * linux/drivers/serial/cpm_uart.c | |
3 | * | |
4 | * Driver for CPM (SCC/SMC) serial ports; CPM1 definitions | |
5 | * | |
4c8d3d99 | 6 | * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) |
1da177e4 | 7 | * Pantelis Antoniou (panto@intracom.gr) (CPM1) |
311c4627 | 8 | * |
1da177e4 LT |
9 | * Copyright (C) 2004 Freescale Semiconductor, Inc. |
10 | * (C) 2004 Intracom, S.A. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | ||
28 | #include <linux/config.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/tty.h> | |
31 | #include <linux/ioport.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/serial.h> | |
34 | #include <linux/console.h> | |
35 | #include <linux/sysrq.h> | |
36 | #include <linux/device.h> | |
37 | #include <linux/bootmem.h> | |
38 | #include <linux/dma-mapping.h> | |
39 | ||
40 | #include <asm/io.h> | |
41 | #include <asm/irq.h> | |
42 | ||
43 | #include <linux/serial_core.h> | |
44 | #include <linux/kernel.h> | |
45 | ||
46 | #include "cpm_uart.h" | |
47 | ||
48 | /**************************************************************/ | |
49 | ||
50 | void cpm_line_cr_cmd(int line, int cmd) | |
51 | { | |
52 | ushort val; | |
53 | volatile cpm8xx_t *cp = cpmp; | |
54 | ||
55 | switch (line) { | |
56 | case UART_SMC1: | |
57 | val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG; | |
58 | break; | |
59 | case UART_SMC2: | |
60 | val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG; | |
61 | break; | |
62 | case UART_SCC1: | |
63 | val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG; | |
64 | break; | |
65 | case UART_SCC2: | |
66 | val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG; | |
67 | break; | |
68 | case UART_SCC3: | |
69 | val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG; | |
70 | break; | |
71 | case UART_SCC4: | |
72 | val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG; | |
73 | break; | |
74 | default: | |
75 | return; | |
76 | ||
77 | } | |
78 | cp->cp_cpcr = val; | |
79 | while (cp->cp_cpcr & CPM_CR_FLG) ; | |
80 | } | |
81 | ||
82 | void smc1_lineif(struct uart_cpm_port *pinfo) | |
83 | { | |
84 | volatile cpm8xx_t *cp = cpmp; | |
311c4627 KG |
85 | |
86 | (void)cp; /* fix warning */ | |
87 | #if defined (CONFIG_MPC885ADS) | |
88 | /* Enable SMC1 transceivers */ | |
89 | { | |
90 | cp->cp_pepar |= 0x000000c0; | |
91 | cp->cp_pedir &= ~0x000000c0; | |
92 | cp->cp_peso &= ~0x00000040; | |
93 | cp->cp_peso |= 0x00000080; | |
94 | } | |
95 | #elif defined (CONFIG_MPC86XADS) | |
1da177e4 LT |
96 | unsigned int iobits = 0x000000c0; |
97 | ||
98 | if (!pinfo->is_portb) { | |
99 | cp->cp_pbpar |= iobits; | |
100 | cp->cp_pbdir &= ~iobits; | |
101 | cp->cp_pbodr &= ~iobits; | |
102 | } else { | |
103 | ((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits; | |
104 | ((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits; | |
105 | ((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits; | |
106 | } | |
e6b6239f | 107 | #endif |
1da177e4 LT |
108 | pinfo->brg = 1; |
109 | } | |
110 | ||
111 | void smc2_lineif(struct uart_cpm_port *pinfo) | |
112 | { | |
e6b6239f | 113 | volatile cpm8xx_t *cp = cpmp; |
e6b6239f | 114 | |
311c4627 KG |
115 | (void)cp; /* fix warning */ |
116 | #if defined (CONFIG_MPC885ADS) | |
e6b6239f AK |
117 | cp->cp_pepar |= 0x00000c00; |
118 | cp->cp_pedir &= ~0x00000c00; | |
119 | cp->cp_peso &= ~0x00000400; | |
120 | cp->cp_peso |= 0x00000800; | |
311c4627 KG |
121 | #elif defined (CONFIG_MPC86XADS) |
122 | unsigned int iobits = 0x00000c00; | |
123 | ||
124 | if (!pinfo->is_portb) { | |
125 | cp->cp_pbpar |= iobits; | |
126 | cp->cp_pbdir &= ~iobits; | |
127 | cp->cp_pbodr &= ~iobits; | |
128 | } else { | |
129 | ((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits; | |
130 | ((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits; | |
131 | ((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits; | |
132 | } | |
e6b6239f | 133 | |
e6b6239f AK |
134 | #endif |
135 | ||
1da177e4 LT |
136 | pinfo->brg = 2; |
137 | } | |
138 | ||
139 | void scc1_lineif(struct uart_cpm_port *pinfo) | |
140 | { | |
141 | /* XXX SCC1: insert port configuration here */ | |
142 | pinfo->brg = 1; | |
143 | } | |
144 | ||
145 | void scc2_lineif(struct uart_cpm_port *pinfo) | |
146 | { | |
147 | /* XXX SCC2: insert port configuration here */ | |
148 | pinfo->brg = 2; | |
149 | } | |
150 | ||
151 | void scc3_lineif(struct uart_cpm_port *pinfo) | |
152 | { | |
153 | /* XXX SCC3: insert port configuration here */ | |
154 | pinfo->brg = 3; | |
155 | } | |
156 | ||
157 | void scc4_lineif(struct uart_cpm_port *pinfo) | |
158 | { | |
159 | /* XXX SCC4: insert port configuration here */ | |
160 | pinfo->brg = 4; | |
161 | } | |
162 | ||
163 | /* | |
311c4627 | 164 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
1da177e4 LT |
165 | * receive buffer descriptors from dual port ram, and a character |
166 | * buffer area from host mem. If we are allocating for the console we need | |
167 | * to do it from bootmem | |
168 | */ | |
169 | int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) | |
170 | { | |
171 | int dpmemsz, memsz; | |
172 | u8 *dp_mem; | |
173 | uint dp_offset; | |
174 | u8 *mem_addr; | |
175 | dma_addr_t dma_addr = 0; | |
176 | ||
177 | pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); | |
178 | ||
179 | dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); | |
180 | dp_offset = cpm_dpalloc(dpmemsz, 8); | |
181 | if (IS_DPERR(dp_offset)) { | |
182 | printk(KERN_ERR | |
183 | "cpm_uart_cpm1.c: could not allocate buffer descriptors\n"); | |
184 | return -ENOMEM; | |
185 | } | |
186 | dp_mem = cpm_dpram_addr(dp_offset); | |
187 | ||
188 | memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + | |
189 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); | |
190 | if (is_con) { | |
311c4627 KG |
191 | /* was hostalloc but changed cause it blows away the */ |
192 | /* large tlb mapping when pinning the kernel area */ | |
4e4b7952 | 193 | mem_addr = (u8 *) cpm_dpram_addr(cpm_dpalloc(memsz, 8)); |
1da177e4 LT |
194 | dma_addr = 0; |
195 | } else | |
196 | mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr, | |
197 | GFP_KERNEL); | |
198 | ||
199 | if (mem_addr == NULL) { | |
200 | cpm_dpfree(dp_offset); | |
201 | printk(KERN_ERR | |
202 | "cpm_uart_cpm1.c: could not allocate coherent memory\n"); | |
203 | return -ENOMEM; | |
204 | } | |
205 | ||
206 | pinfo->dp_addr = dp_offset; | |
207 | pinfo->mem_addr = mem_addr; | |
208 | pinfo->dma_addr = dma_addr; | |
209 | ||
210 | pinfo->rx_buf = mem_addr; | |
211 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos | |
212 | * pinfo->rx_fifosize); | |
213 | ||
214 | pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; | |
215 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
220 | void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |
221 | { | |
222 | dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos * | |
223 | pinfo->rx_fifosize) + | |
224 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * | |
225 | pinfo->tx_fifosize), pinfo->mem_addr, | |
226 | pinfo->dma_addr); | |
227 | ||
228 | cpm_dpfree(pinfo->dp_addr); | |
229 | } | |
230 | ||
231 | /* Setup any dynamic params in the uart desc */ | |
232 | int cpm_uart_init_portdesc(void) | |
233 | { | |
234 | pr_debug("CPM uart[-]:init portdesc\n"); | |
235 | ||
236 | cpm_uart_nr = 0; | |
237 | #ifdef CONFIG_SERIAL_CPM_SMC1 | |
238 | cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0]; | |
239 | /* | |
240 | * Is SMC1 being relocated? | |
241 | */ | |
242 | # ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH | |
243 | cpm_uart_ports[UART_SMC1].smcup = | |
244 | (smc_uart_t *) & cpmp->cp_dparam[0x3C0]; | |
245 | # else | |
246 | cpm_uart_ports[UART_SMC1].smcup = | |
247 | (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1]; | |
248 | # endif | |
249 | cpm_uart_ports[UART_SMC1].port.mapbase = | |
250 | (unsigned long)&cpmp->cp_smc[0]; | |
251 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | |
252 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | |
253 | cpm_uart_ports[UART_SMC1].port.uartclk = (((bd_t *) __res)->bi_intfreq); | |
254 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | |
255 | #endif | |
256 | ||
257 | #ifdef CONFIG_SERIAL_CPM_SMC2 | |
258 | cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1]; | |
259 | cpm_uart_ports[UART_SMC2].smcup = | |
260 | (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2]; | |
261 | cpm_uart_ports[UART_SMC2].port.mapbase = | |
262 | (unsigned long)&cpmp->cp_smc[1]; | |
263 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | |
264 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | |
265 | cpm_uart_ports[UART_SMC2].port.uartclk = (((bd_t *) __res)->bi_intfreq); | |
266 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | |
267 | #endif | |
268 | ||
269 | #ifdef CONFIG_SERIAL_CPM_SCC1 | |
270 | cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0]; | |
271 | cpm_uart_ports[UART_SCC1].sccup = | |
272 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1]; | |
273 | cpm_uart_ports[UART_SCC1].port.mapbase = | |
274 | (unsigned long)&cpmp->cp_scc[0]; | |
275 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= | |
276 | ~(UART_SCCM_TX | UART_SCCM_RX); | |
277 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= | |
278 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
279 | cpm_uart_ports[UART_SCC1].port.uartclk = (((bd_t *) __res)->bi_intfreq); | |
280 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | |
281 | #endif | |
282 | ||
283 | #ifdef CONFIG_SERIAL_CPM_SCC2 | |
284 | cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1]; | |
285 | cpm_uart_ports[UART_SCC2].sccup = | |
286 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2]; | |
287 | cpm_uart_ports[UART_SCC2].port.mapbase = | |
288 | (unsigned long)&cpmp->cp_scc[1]; | |
289 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= | |
290 | ~(UART_SCCM_TX | UART_SCCM_RX); | |
291 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= | |
292 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
293 | cpm_uart_ports[UART_SCC2].port.uartclk = (((bd_t *) __res)->bi_intfreq); | |
294 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | |
295 | #endif | |
296 | ||
297 | #ifdef CONFIG_SERIAL_CPM_SCC3 | |
298 | cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2]; | |
299 | cpm_uart_ports[UART_SCC3].sccup = | |
300 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3]; | |
301 | cpm_uart_ports[UART_SCC3].port.mapbase = | |
302 | (unsigned long)&cpmp->cp_scc[2]; | |
303 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= | |
304 | ~(UART_SCCM_TX | UART_SCCM_RX); | |
305 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= | |
306 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
307 | cpm_uart_ports[UART_SCC3].port.uartclk = (((bd_t *) __res)->bi_intfreq); | |
308 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | |
309 | #endif | |
310 | ||
311 | #ifdef CONFIG_SERIAL_CPM_SCC4 | |
312 | cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3]; | |
313 | cpm_uart_ports[UART_SCC4].sccup = | |
314 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4]; | |
315 | cpm_uart_ports[UART_SCC4].port.mapbase = | |
316 | (unsigned long)&cpmp->cp_scc[3]; | |
317 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= | |
318 | ~(UART_SCCM_TX | UART_SCCM_RX); | |
319 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= | |
320 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
321 | cpm_uart_ports[UART_SCC4].port.uartclk = (((bd_t *) __res)->bi_intfreq); | |
322 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | |
323 | #endif | |
324 | return 0; | |
325 | } |