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Merge branch 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvar...
[net-next-2.6.git] / drivers / scsi / qla4xxx / ql4_dbg.c
CommitLineData
afaf5a2d
DS		 1/*
2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2006 QLogic Corporation
4 *
5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */
7
8#include "ql4_def.h"
01871066
DS		 9#include "ql4_glbl.h"
10#include "ql4_dbg.h"
11#include "ql4_inline.h"
afaf5a2d
DS		 12
13void qla4xxx_dump_buffer(void *b, uint32_t size)
14{
15 uint32_t cnt;
16 uint8_t *c = b;
17
94bced3c 18 printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh "
afaf5a2d
DS		 19 "Fh\n");
20 printk("------------------------------------------------------------"
21 "--\n");
94bced3c
KH		 22 for (cnt = 0; cnt < size; c++) {
23 printk(KERN_INFO "%02x", *c);
24 if (!(++cnt % 16))
25 printk(KERN_INFO "\n");
afaf5a2d
DS		 26
27 else
94bced3c 28 printk(KERN_INFO " ");
afaf5a2d 29 }
94bced3c 30 printk(KERN_INFO "\n");
afaf5a2d 31}
47975477 32
91a772a4
KH		 33void qla4xxx_dump_registers(struct scsi_qla_host *ha)
34{
35 uint8_t i;
36
37 if (is_qla8022(ha)) {
38 for (i = 1; i < MBOX_REG_COUNT; i++)
39 printk(KERN_INFO "mailbox[%d] = 0x%08X\n",
40 i, readl(&ha->qla4_8xxx_reg->mailbox_in[i]));
41 return;
42 }
43
44 for (i = 0; i < MBOX_REG_COUNT; i++) {
45 printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n",
46 (uint8_t) offsetof(struct isp_reg, mailbox[i]), i,
47 readw(&ha->reg->mailbox[i]));
48 }
49
50 printk(KERN_INFO "0x%02X flash_address = 0x%08X\n",
51 (uint8_t) offsetof(struct isp_reg, flash_address),
52 readw(&ha->reg->flash_address));
53 printk(KERN_INFO "0x%02X flash_data = 0x%08X\n",
54 (uint8_t) offsetof(struct isp_reg, flash_data),
55 readw(&ha->reg->flash_data));
56 printk(KERN_INFO "0x%02X ctrl_status = 0x%08X\n",
57 (uint8_t) offsetof(struct isp_reg, ctrl_status),
58 readw(&ha->reg->ctrl_status));
59
60 if (is_qla4010(ha)) {
61 printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
62 (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram),
63 readw(&ha->reg->u1.isp4010.nvram));
64 } else if (is_qla4022(ha) | is_qla4032(ha)) {
65 printk(KERN_INFO "0x%02X intr_mask = 0x%08X\n",
66 (uint8_t) offsetof(struct isp_reg, u1.isp4022.intr_mask),
67 readw(&ha->reg->u1.isp4022.intr_mask));
68 printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
69 (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),
70 readw(&ha->reg->u1.isp4022.nvram));
71 printk(KERN_INFO "0x%02X semaphore = 0x%08X\n",
72 (uint8_t) offsetof(struct isp_reg, u1.isp4022.semaphore),
73 readw(&ha->reg->u1.isp4022.semaphore));
74 }
75 printk(KERN_INFO "0x%02X req_q_in = 0x%08X\n",
76 (uint8_t) offsetof(struct isp_reg, req_q_in),
77 readw(&ha->reg->req_q_in));
78 printk(KERN_INFO "0x%02X rsp_q_out = 0x%08X\n",
79 (uint8_t) offsetof(struct isp_reg, rsp_q_out),
80 readw(&ha->reg->rsp_q_out));
81
82 if (is_qla4010(ha)) {
83 printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
84 (uint8_t) offsetof(struct isp_reg, u2.isp4010.ext_hw_conf),
85 readw(&ha->reg->u2.isp4010.ext_hw_conf));
86 printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
87 (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_ctrl),
88 readw(&ha->reg->u2.isp4010.port_ctrl));
89 printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
90 (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_status),
91 readw(&ha->reg->u2.isp4010.port_status));
92 printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
93 (uint8_t) offsetof(struct isp_reg, u2.isp4010.req_q_out),
94 readw(&ha->reg->u2.isp4010.req_q_out));
95 printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
96 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out),
97 readw(&ha->reg->u2.isp4010.gp_out));
98 printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
99 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in),
100 readw(&ha->reg->u2.isp4010.gp_in));
101 printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n", (uint8_t)
102 offsetof(struct isp_reg, u2.isp4010.port_err_status),
103 readw(&ha->reg->u2.isp4010.port_err_status));
104 } else if (is_qla4022(ha) | is_qla4032(ha)) {
105 printk(KERN_INFO "Page 0 Registers:\n");
106 printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n", (uint8_t)
107 offsetof(struct isp_reg, u2.isp4022.p0.ext_hw_conf),
108 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf));
109 printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n", (uint8_t)
110 offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl),
111 readw(&ha->reg->u2.isp4022.p0.port_ctrl));
112 printk(KERN_INFO "0x%02X port_status = 0x%08X\n", (uint8_t)
113 offsetof(struct isp_reg, u2.isp4022.p0.port_status),
114 readw(&ha->reg->u2.isp4022.p0.port_status));
115 printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
116 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_out),
117 readw(&ha->reg->u2.isp4022.p0.gp_out));
118 printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
119 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),
120 readw(&ha->reg->u2.isp4022.p0.gp_in));
121 printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n", (uint8_t)
122 offsetof(struct isp_reg, u2.isp4022.p0.port_err_status),
123 readw(&ha->reg->u2.isp4022.p0.port_err_status));
124 printk(KERN_INFO "Page 1 Registers:\n");
125 writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
126 &ha->reg->ctrl_status);
127 printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
128 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p1.req_q_out),
129 readw(&ha->reg->u2.isp4022.p1.req_q_out));
130 writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
131 &ha->reg->ctrl_status);
132 }
133}
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