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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
de7c5d05 | 3 | * Copyright (c) 2003-2010 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
32 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
33 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
34 | uint16_t *); | |
1da177e4 LT |
35 | |
36 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 37 | |
e315cd28 | 38 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 39 | |
4d4df193 HK |
40 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
41 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 42 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 43 | |
ac280b67 AV |
44 | /* SRB Extensions ---------------------------------------------------------- */ |
45 | ||
46 | static void | |
47 | qla2x00_ctx_sp_timeout(unsigned long __data) | |
48 | { | |
49 | srb_t *sp = (srb_t *)__data; | |
50 | struct srb_ctx *ctx; | |
4916392b | 51 | struct srb_iocb *iocb; |
ac280b67 AV |
52 | fc_port_t *fcport = sp->fcport; |
53 | struct qla_hw_data *ha = fcport->vha->hw; | |
54 | struct req_que *req; | |
55 | unsigned long flags; | |
56 | ||
57 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
58 | req = ha->req_q_map[0]; | |
59 | req->outstanding_cmds[sp->handle] = NULL; | |
60 | ctx = sp->ctx; | |
4916392b MI |
61 | iocb = ctx->u.iocb_cmd; |
62 | iocb->timeout(sp); | |
4916392b | 63 | iocb->free(sp); |
6ac52608 | 64 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
65 | } |
66 | ||
3dbe756a | 67 | static void |
ac280b67 AV |
68 | qla2x00_ctx_sp_free(srb_t *sp) |
69 | { | |
70 | struct srb_ctx *ctx = sp->ctx; | |
4916392b | 71 | struct srb_iocb *iocb = ctx->u.iocb_cmd; |
feafb7b1 | 72 | struct scsi_qla_host *vha = sp->fcport->vha; |
ac280b67 | 73 | |
4916392b MI |
74 | del_timer_sync(&iocb->timer); |
75 | kfree(iocb); | |
ac280b67 AV |
76 | kfree(ctx); |
77 | mempool_free(sp, sp->fcport->vha->hw->srb_mempool); | |
feafb7b1 AE |
78 | |
79 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
80 | } |
81 | ||
82 | inline srb_t * | |
83 | qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, | |
84 | unsigned long tmo) | |
85 | { | |
feafb7b1 | 86 | srb_t *sp = NULL; |
ac280b67 AV |
87 | struct qla_hw_data *ha = vha->hw; |
88 | struct srb_ctx *ctx; | |
4916392b | 89 | struct srb_iocb *iocb; |
feafb7b1 AE |
90 | uint8_t bail; |
91 | ||
92 | QLA_VHA_MARK_BUSY(vha, bail); | |
93 | if (bail) | |
94 | return NULL; | |
ac280b67 AV |
95 | |
96 | sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); | |
97 | if (!sp) | |
98 | goto done; | |
99 | ctx = kzalloc(size, GFP_KERNEL); | |
100 | if (!ctx) { | |
101 | mempool_free(sp, ha->srb_mempool); | |
4916392b MI |
102 | sp = NULL; |
103 | goto done; | |
104 | } | |
105 | iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL); | |
106 | if (!iocb) { | |
107 | mempool_free(sp, ha->srb_mempool); | |
108 | sp = NULL; | |
109 | kfree(ctx); | |
ac280b67 AV |
110 | goto done; |
111 | } | |
112 | ||
113 | memset(sp, 0, sizeof(*sp)); | |
114 | sp->fcport = fcport; | |
115 | sp->ctx = ctx; | |
4916392b MI |
116 | ctx->u.iocb_cmd = iocb; |
117 | iocb->free = qla2x00_ctx_sp_free; | |
ac280b67 | 118 | |
4916392b | 119 | init_timer(&iocb->timer); |
ac280b67 AV |
120 | if (!tmo) |
121 | goto done; | |
4916392b MI |
122 | iocb->timer.expires = jiffies + tmo * HZ; |
123 | iocb->timer.data = (unsigned long)sp; | |
124 | iocb->timer.function = qla2x00_ctx_sp_timeout; | |
125 | add_timer(&iocb->timer); | |
ac280b67 | 126 | done: |
feafb7b1 AE |
127 | if (!sp) |
128 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
129 | return sp; |
130 | } | |
131 | ||
132 | /* Asynchronous Login/Logout Routines -------------------------------------- */ | |
133 | ||
5b91490e AV |
134 | static inline unsigned long |
135 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) | |
136 | { | |
137 | unsigned long tmo; | |
138 | struct qla_hw_data *ha = vha->hw; | |
139 | ||
140 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
141 | tmo = ha->r_a_tov / 10 * 2; | |
142 | if (!IS_FWI2_CAPABLE(ha)) { | |
143 | /* | |
144 | * Except for earlier ISPs where the timeout is seeded from the | |
145 | * initialization control block. | |
146 | */ | |
147 | tmo = ha->login_timeout; | |
148 | } | |
149 | return tmo; | |
150 | } | |
ac280b67 AV |
151 | |
152 | static void | |
3822263e | 153 | qla2x00_async_iocb_timeout(srb_t *sp) |
ac280b67 AV |
154 | { |
155 | fc_port_t *fcport = sp->fcport; | |
4916392b | 156 | struct srb_ctx *ctx = sp->ctx; |
ac280b67 AV |
157 | |
158 | DEBUG2(printk(KERN_WARNING | |
d3fa9e7d AV |
159 | "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n", |
160 | fcport->vha->host_no, sp->handle, | |
161 | ctx->name, fcport->d_id.b.domain, | |
162 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
ac280b67 | 163 | |
5ff1d584 | 164 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 AV |
165 | if (ctx->type == SRB_LOGIN_CMD) { |
166 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
ac280b67 | 167 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
168 | /* Retry as needed. */ |
169 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
170 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
171 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
172 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
173 | lio->u.logio.data); | |
174 | } | |
ac280b67 AV |
175 | } |
176 | ||
99b0bec7 AV |
177 | static void |
178 | qla2x00_async_login_ctx_done(srb_t *sp) | |
179 | { | |
4916392b MI |
180 | struct srb_ctx *ctx = sp->ctx; |
181 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
182 | |
183 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
184 | lio->u.logio.data); |
185 | lio->free(sp); | |
99b0bec7 AV |
186 | } |
187 | ||
ac280b67 AV |
188 | int |
189 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
190 | uint16_t *data) | |
191 | { | |
ac280b67 | 192 | srb_t *sp; |
4916392b MI |
193 | struct srb_ctx *ctx; |
194 | struct srb_iocb *lio; | |
ac280b67 AV |
195 | int rval; |
196 | ||
197 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 198 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 199 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
200 | if (!sp) |
201 | goto done; | |
202 | ||
4916392b MI |
203 | ctx = sp->ctx; |
204 | ctx->type = SRB_LOGIN_CMD; | |
205 | ctx->name = "login"; | |
206 | lio = ctx->u.iocb_cmd; | |
3822263e | 207 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b MI |
208 | lio->done = qla2x00_async_login_ctx_done; |
209 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; | |
ac280b67 | 210 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 211 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
212 | rval = qla2x00_start_sp(sp); |
213 | if (rval != QLA_SUCCESS) | |
214 | goto done_free_sp; | |
215 | ||
216 | DEBUG2(printk(KERN_DEBUG | |
217 | "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x " | |
218 | "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id, | |
219 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
220 | fcport->login_retry)); | |
221 | return rval; | |
222 | ||
223 | done_free_sp: | |
4916392b | 224 | lio->free(sp); |
ac280b67 AV |
225 | done: |
226 | return rval; | |
227 | } | |
228 | ||
99b0bec7 AV |
229 | static void |
230 | qla2x00_async_logout_ctx_done(srb_t *sp) | |
231 | { | |
4916392b MI |
232 | struct srb_ctx *ctx = sp->ctx; |
233 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
234 | |
235 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
236 | lio->u.logio.data); |
237 | lio->free(sp); | |
99b0bec7 AV |
238 | } |
239 | ||
ac280b67 AV |
240 | int |
241 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
242 | { | |
ac280b67 | 243 | srb_t *sp; |
4916392b MI |
244 | struct srb_ctx *ctx; |
245 | struct srb_iocb *lio; | |
ac280b67 AV |
246 | int rval; |
247 | ||
248 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 249 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 250 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
251 | if (!sp) |
252 | goto done; | |
253 | ||
4916392b MI |
254 | ctx = sp->ctx; |
255 | ctx->type = SRB_LOGOUT_CMD; | |
256 | ctx->name = "logout"; | |
257 | lio = ctx->u.iocb_cmd; | |
3822263e | 258 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 259 | lio->done = qla2x00_async_logout_ctx_done; |
ac280b67 AV |
260 | rval = qla2x00_start_sp(sp); |
261 | if (rval != QLA_SUCCESS) | |
262 | goto done_free_sp; | |
263 | ||
264 | DEBUG2(printk(KERN_DEBUG | |
265 | "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n", | |
266 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
267 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
268 | return rval; | |
269 | ||
270 | done_free_sp: | |
4916392b | 271 | lio->free(sp); |
ac280b67 AV |
272 | done: |
273 | return rval; | |
274 | } | |
275 | ||
5ff1d584 AV |
276 | static void |
277 | qla2x00_async_adisc_ctx_done(srb_t *sp) | |
278 | { | |
4916392b MI |
279 | struct srb_ctx *ctx = sp->ctx; |
280 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
5ff1d584 AV |
281 | |
282 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
283 | lio->u.logio.data); |
284 | lio->free(sp); | |
5ff1d584 AV |
285 | } |
286 | ||
287 | int | |
288 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
289 | uint16_t *data) | |
290 | { | |
5ff1d584 | 291 | srb_t *sp; |
4916392b MI |
292 | struct srb_ctx *ctx; |
293 | struct srb_iocb *lio; | |
5ff1d584 AV |
294 | int rval; |
295 | ||
296 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 297 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 298 | qla2x00_get_async_timeout(vha) + 2); |
5ff1d584 AV |
299 | if (!sp) |
300 | goto done; | |
301 | ||
4916392b MI |
302 | ctx = sp->ctx; |
303 | ctx->type = SRB_ADISC_CMD; | |
304 | ctx->name = "adisc"; | |
305 | lio = ctx->u.iocb_cmd; | |
3822263e | 306 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 307 | lio->done = qla2x00_async_adisc_ctx_done; |
5ff1d584 | 308 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 309 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
310 | rval = qla2x00_start_sp(sp); |
311 | if (rval != QLA_SUCCESS) | |
312 | goto done_free_sp; | |
313 | ||
314 | DEBUG2(printk(KERN_DEBUG | |
315 | "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n", | |
316 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
317 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
318 | ||
319 | return rval; | |
320 | ||
321 | done_free_sp: | |
4916392b | 322 | lio->free(sp); |
5ff1d584 AV |
323 | done: |
324 | return rval; | |
325 | } | |
326 | ||
3822263e MI |
327 | static void |
328 | qla2x00_async_tm_cmd_ctx_done(srb_t *sp) | |
329 | { | |
330 | struct srb_ctx *ctx = sp->ctx; | |
331 | struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd; | |
332 | ||
333 | qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb); | |
334 | iocb->free(sp); | |
335 | } | |
336 | ||
337 | int | |
338 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, | |
339 | uint32_t tag) | |
340 | { | |
341 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e MI |
342 | srb_t *sp; |
343 | struct srb_ctx *ctx; | |
344 | struct srb_iocb *tcf; | |
345 | int rval; | |
346 | ||
347 | rval = QLA_FUNCTION_FAILED; | |
348 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), | |
5b91490e | 349 | qla2x00_get_async_timeout(vha) + 2); |
3822263e MI |
350 | if (!sp) |
351 | goto done; | |
352 | ||
353 | ctx = sp->ctx; | |
354 | ctx->type = SRB_TM_CMD; | |
355 | ctx->name = "tmf"; | |
356 | tcf = ctx->u.iocb_cmd; | |
357 | tcf->u.tmf.flags = flags; | |
358 | tcf->u.tmf.lun = lun; | |
359 | tcf->u.tmf.data = tag; | |
360 | tcf->timeout = qla2x00_async_iocb_timeout; | |
361 | tcf->done = qla2x00_async_tm_cmd_ctx_done; | |
362 | ||
363 | rval = qla2x00_start_sp(sp); | |
364 | if (rval != QLA_SUCCESS) | |
365 | goto done_free_sp; | |
366 | ||
367 | DEBUG2(printk(KERN_DEBUG | |
368 | "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n", | |
369 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
370 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
371 | ||
372 | return rval; | |
373 | ||
374 | done_free_sp: | |
375 | tcf->free(sp); | |
376 | done: | |
377 | return rval; | |
378 | } | |
379 | ||
4916392b | 380 | void |
ac280b67 AV |
381 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
382 | uint16_t *data) | |
383 | { | |
384 | int rval; | |
ac280b67 AV |
385 | |
386 | switch (data[0]) { | |
387 | case MBS_COMMAND_COMPLETE: | |
99b0bec7 | 388 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
389 | fcport->flags |= FCF_ASYNC_SENT; |
390 | qla2x00_post_async_adisc_work(vha, fcport, data); | |
391 | break; | |
99b0bec7 AV |
392 | } |
393 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
394 | break; |
395 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 396 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
397 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
398 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
399 | else | |
6ac52608 | 400 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
ac280b67 AV |
401 | break; |
402 | case MBS_PORT_ID_USED: | |
403 | fcport->loop_id = data[1]; | |
6ac52608 | 404 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
405 | qla2x00_post_async_login_work(vha, fcport, NULL); |
406 | break; | |
407 | case MBS_LOOP_ID_USED: | |
408 | fcport->loop_id++; | |
409 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
410 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 411 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 | 412 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
ac280b67 AV |
413 | break; |
414 | } | |
415 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
416 | break; | |
417 | } | |
4916392b | 418 | return; |
ac280b67 AV |
419 | } |
420 | ||
4916392b | 421 | void |
ac280b67 AV |
422 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
423 | uint16_t *data) | |
424 | { | |
425 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 426 | return; |
ac280b67 AV |
427 | } |
428 | ||
4916392b | 429 | void |
5ff1d584 AV |
430 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
431 | uint16_t *data) | |
432 | { | |
433 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
434 | qla2x00_update_fcport(vha, fcport); | |
435 | ||
4916392b | 436 | return; |
5ff1d584 AV |
437 | } |
438 | ||
439 | /* Retry login. */ | |
440 | fcport->flags &= ~FCF_ASYNC_SENT; | |
441 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
442 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
443 | else | |
6ac52608 | 444 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
5ff1d584 | 445 | |
4916392b | 446 | return; |
5ff1d584 AV |
447 | } |
448 | ||
3822263e MI |
449 | void |
450 | qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
451 | struct srb_iocb *iocb) | |
452 | { | |
453 | int rval; | |
454 | uint32_t flags; | |
455 | uint16_t lun; | |
456 | ||
457 | flags = iocb->u.tmf.flags; | |
458 | lun = (uint16_t)iocb->u.tmf.lun; | |
459 | ||
460 | /* Issue Marker IOCB */ | |
d94d10e7 GM |
461 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], |
462 | vha->hw->rsp_q_map[0], fcport->loop_id, lun, | |
3822263e MI |
463 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); |
464 | ||
465 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
466 | DEBUG2_3_11(printk(KERN_WARNING | |
467 | "%s(%ld): TM IOCB failed (%x).\n", | |
468 | __func__, vha->host_no, rval)); | |
469 | } | |
470 | ||
471 | return; | |
472 | } | |
473 | ||
1da177e4 LT |
474 | /****************************************************************************/ |
475 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
476 | /****************************************************************************/ | |
477 | ||
478 | /* | |
479 | * qla2x00_initialize_adapter | |
480 | * Initialize board. | |
481 | * | |
482 | * Input: | |
483 | * ha = adapter block pointer. | |
484 | * | |
485 | * Returns: | |
486 | * 0 = success | |
487 | */ | |
488 | int | |
e315cd28 | 489 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
490 | { |
491 | int rval; | |
e315cd28 | 492 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 493 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 494 | |
1da177e4 | 495 | /* Clear adapter flags. */ |
e315cd28 | 496 | vha->flags.online = 0; |
2533cf67 | 497 | ha->flags.chip_reset_done = 0; |
e315cd28 | 498 | vha->flags.reset_active = 0; |
85880801 AV |
499 | ha->flags.pci_channel_io_perm_failure = 0; |
500 | ha->flags.eeh_busy = 0; | |
e315cd28 AC |
501 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
502 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
503 | vha->device_flags = DFLG_NO_CABLE; | |
504 | vha->dpc_flags = 0; | |
505 | vha->flags.management_server_logged_in = 0; | |
506 | vha->marker_needed = 0; | |
1da177e4 LT |
507 | ha->isp_abort_cnt = 0; |
508 | ha->beacon_blink_led = 0; | |
509 | ||
73208dfd AC |
510 | set_bit(0, ha->req_qid_map); |
511 | set_bit(0, ha->rsp_qid_map); | |
512 | ||
0107109e | 513 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 514 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 515 | if (rval) { |
7c98a046 | 516 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 517 | vha->host_no)); |
1da177e4 LT |
518 | return (rval); |
519 | } | |
520 | ||
e315cd28 | 521 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 522 | |
e315cd28 | 523 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
524 | if (rval) { |
525 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 526 | vha->host_no)); |
c00d8994 AV |
527 | return (rval); |
528 | } | |
529 | ||
73208dfd | 530 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 531 | |
1da177e4 | 532 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 533 | |
e315cd28 | 534 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 535 | |
d4c760c2 AV |
536 | if (ha->flags.disable_serdes) { |
537 | /* Mask HBA via NVRAM settings? */ | |
538 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
539 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
540 | vha->port_name[0], vha->port_name[1], |
541 | vha->port_name[2], vha->port_name[3], | |
542 | vha->port_name[4], vha->port_name[5], | |
543 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
544 | return QLA_FUNCTION_FAILED; |
545 | } | |
546 | ||
1da177e4 LT |
547 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
548 | ||
e315cd28 AC |
549 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
550 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
551 | if (rval) |
552 | return (rval); | |
e315cd28 | 553 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
554 | if (rval) |
555 | return (rval); | |
1da177e4 | 556 | } |
a9083016 | 557 | |
4d4df193 | 558 | if (IS_QLA84XX(ha)) { |
e315cd28 | 559 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
560 | if (!ha->cs84xx) { |
561 | qla_printk(KERN_ERR, ha, | |
562 | "Unable to configure ISP84XX.\n"); | |
563 | return QLA_FUNCTION_FAILED; | |
564 | } | |
565 | } | |
e315cd28 | 566 | rval = qla2x00_init_rings(vha); |
2533cf67 | 567 | ha->flags.chip_reset_done = 1; |
1da177e4 | 568 | |
9a069e19 | 569 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 570 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
571 | rval = qla84xx_init_chip(vha); |
572 | if (rval != QLA_SUCCESS) { | |
573 | qla_printk(KERN_ERR, ha, | |
574 | "Unable to initialize ISP84XX.\n"); | |
575 | qla84xx_put_chip(vha); | |
576 | } | |
577 | } | |
578 | ||
2f0f3f4f MI |
579 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
580 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 581 | |
1da177e4 LT |
582 | return (rval); |
583 | } | |
584 | ||
585 | /** | |
abbd8870 | 586 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
587 | * @ha: HA context |
588 | * | |
589 | * Returns 0 on success. | |
590 | */ | |
abbd8870 | 591 | int |
e315cd28 | 592 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 593 | { |
a157b101 | 594 | uint16_t w; |
abbd8870 | 595 | unsigned long flags; |
e315cd28 | 596 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 597 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 598 | |
1da177e4 | 599 | pci_set_master(ha->pdev); |
af6177d8 | 600 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 601 | |
1da177e4 | 602 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 603 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
604 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
605 | ||
737faece | 606 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
607 | |
608 | /* Get PCI bus information. */ | |
609 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 610 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
611 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
612 | ||
abbd8870 AV |
613 | return QLA_SUCCESS; |
614 | } | |
1da177e4 | 615 | |
abbd8870 AV |
616 | /** |
617 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
618 | * @ha: HA context | |
619 | * | |
620 | * Returns 0 on success. | |
621 | */ | |
622 | int | |
e315cd28 | 623 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 624 | { |
a157b101 | 625 | uint16_t w; |
abbd8870 AV |
626 | unsigned long flags = 0; |
627 | uint32_t cnt; | |
e315cd28 | 628 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 629 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 630 | |
abbd8870 | 631 | pci_set_master(ha->pdev); |
af6177d8 | 632 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 633 | |
abbd8870 | 634 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 635 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 636 | |
abbd8870 AV |
637 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
638 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 639 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 640 | |
abbd8870 AV |
641 | /* |
642 | * If this is a 2300 card and not 2312, reset the | |
643 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
644 | * the 2310 also reports itself as a 2300 so we need to get the | |
645 | * fb revision level -- a 6 indicates it really is a 2300 and | |
646 | * not a 2310. | |
647 | */ | |
648 | if (IS_QLA2300(ha)) { | |
649 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 650 | |
abbd8870 | 651 | /* Pause RISC. */ |
3d71644c | 652 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 653 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 654 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 655 | break; |
1da177e4 | 656 | |
abbd8870 AV |
657 | udelay(10); |
658 | } | |
1da177e4 | 659 | |
abbd8870 | 660 | /* Select FPM registers. */ |
3d71644c AV |
661 | WRT_REG_WORD(®->ctrl_status, 0x20); |
662 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
663 | |
664 | /* Get the fb rev level */ | |
3d71644c | 665 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
666 | |
667 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 668 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
669 | |
670 | /* Deselect FPM registers. */ | |
3d71644c AV |
671 | WRT_REG_WORD(®->ctrl_status, 0x0); |
672 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
673 | |
674 | /* Release RISC module. */ | |
3d71644c | 675 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 676 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 677 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
678 | break; |
679 | ||
680 | udelay(10); | |
1da177e4 | 681 | } |
1da177e4 | 682 | |
abbd8870 AV |
683 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
684 | } | |
1da177e4 | 685 | |
abbd8870 AV |
686 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
687 | ||
737faece | 688 | pci_disable_rom(ha->pdev); |
1da177e4 | 689 | |
abbd8870 AV |
690 | /* Get PCI bus information. */ |
691 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 692 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
693 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
694 | ||
695 | return QLA_SUCCESS; | |
1da177e4 LT |
696 | } |
697 | ||
0107109e AV |
698 | /** |
699 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
700 | * @ha: HA context | |
701 | * | |
702 | * Returns 0 on success. | |
703 | */ | |
704 | int | |
e315cd28 | 705 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 706 | { |
a157b101 | 707 | uint16_t w; |
0107109e | 708 | unsigned long flags = 0; |
e315cd28 | 709 | struct qla_hw_data *ha = vha->hw; |
0107109e | 710 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
711 | |
712 | pci_set_master(ha->pdev); | |
af6177d8 | 713 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
714 | |
715 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 716 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
717 | w &= ~PCI_COMMAND_INTX_DISABLE; |
718 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
719 | ||
720 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
721 | ||
722 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
723 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
724 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
725 | |
726 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
727 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
728 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 729 | |
737faece | 730 | pci_disable_rom(ha->pdev); |
0107109e | 731 | |
44c10138 | 732 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 733 | |
0107109e AV |
734 | /* Get PCI bus information. */ |
735 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
736 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
737 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
738 | ||
739 | return QLA_SUCCESS; | |
740 | } | |
741 | ||
c3a2f0df AV |
742 | /** |
743 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
744 | * @ha: HA context | |
745 | * | |
746 | * Returns 0 on success. | |
747 | */ | |
748 | int | |
e315cd28 | 749 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
750 | { |
751 | uint16_t w; | |
e315cd28 | 752 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
753 | |
754 | pci_set_master(ha->pdev); | |
755 | pci_try_set_mwi(ha->pdev); | |
756 | ||
757 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
758 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
759 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
760 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
761 | ||
762 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
763 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
764 | pcie_set_readrq(ha->pdev, 2048); | |
765 | ||
737faece | 766 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
767 | |
768 | ha->chip_revision = ha->pdev->revision; | |
769 | ||
770 | return QLA_SUCCESS; | |
771 | } | |
772 | ||
1da177e4 LT |
773 | /** |
774 | * qla2x00_isp_firmware() - Choose firmware image. | |
775 | * @ha: HA context | |
776 | * | |
777 | * Returns 0 on success. | |
778 | */ | |
779 | static int | |
e315cd28 | 780 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
781 | { |
782 | int rval; | |
42e421b1 AV |
783 | uint16_t loop_id, topo, sw_cap; |
784 | uint8_t domain, area, al_pa; | |
e315cd28 | 785 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
786 | |
787 | /* Assume loading risc code */ | |
fa2a1ce5 | 788 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
789 | |
790 | if (ha->flags.disable_risc_code_load) { | |
791 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 792 | vha->host_no)); |
1da177e4 LT |
793 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
794 | ||
795 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 796 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
797 | if (rval == QLA_SUCCESS) { |
798 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 799 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
800 | &area, &domain, &topo, &sw_cap); |
801 | } | |
1da177e4 LT |
802 | } |
803 | ||
804 | if (rval) { | |
805 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 806 | vha->host_no)); |
1da177e4 LT |
807 | } |
808 | ||
809 | return (rval); | |
810 | } | |
811 | ||
812 | /** | |
813 | * qla2x00_reset_chip() - Reset ISP chip. | |
814 | * @ha: HA context | |
815 | * | |
816 | * Returns 0 on success. | |
817 | */ | |
abbd8870 | 818 | void |
e315cd28 | 819 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
820 | { |
821 | unsigned long flags = 0; | |
e315cd28 | 822 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 823 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 824 | uint32_t cnt; |
1da177e4 LT |
825 | uint16_t cmd; |
826 | ||
85880801 AV |
827 | if (unlikely(pci_channel_offline(ha->pdev))) |
828 | return; | |
829 | ||
fd34f556 | 830 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
831 | |
832 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
833 | ||
834 | /* Turn off master enable */ | |
835 | cmd = 0; | |
836 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
837 | cmd &= ~PCI_COMMAND_MASTER; | |
838 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
839 | ||
840 | if (!IS_QLA2100(ha)) { | |
841 | /* Pause RISC. */ | |
842 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
843 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
844 | for (cnt = 0; cnt < 30000; cnt++) { | |
845 | if ((RD_REG_WORD(®->hccr) & | |
846 | HCCR_RISC_PAUSE) != 0) | |
847 | break; | |
848 | udelay(100); | |
849 | } | |
850 | } else { | |
851 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
852 | udelay(10); | |
853 | } | |
854 | ||
855 | /* Select FPM registers. */ | |
856 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
857 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
858 | ||
859 | /* FPM Soft Reset. */ | |
860 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
861 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
862 | ||
863 | /* Toggle Fpm Reset. */ | |
864 | if (!IS_QLA2200(ha)) { | |
865 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
866 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
867 | } | |
868 | ||
869 | /* Select frame buffer registers. */ | |
870 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
871 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
872 | ||
873 | /* Reset frame buffer FIFOs. */ | |
874 | if (IS_QLA2200(ha)) { | |
875 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
876 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
877 | } else { | |
878 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
879 | ||
880 | /* Read back fb_cmd until zero or 3 seconds max */ | |
881 | for (cnt = 0; cnt < 3000; cnt++) { | |
882 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
883 | break; | |
884 | udelay(100); | |
885 | } | |
886 | } | |
887 | ||
888 | /* Select RISC module registers. */ | |
889 | WRT_REG_WORD(®->ctrl_status, 0); | |
890 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
891 | ||
892 | /* Reset RISC processor. */ | |
893 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
894 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
895 | ||
896 | /* Release RISC processor. */ | |
897 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
898 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
899 | } | |
900 | ||
901 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
902 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
903 | ||
904 | /* Reset ISP chip. */ | |
905 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
906 | ||
907 | /* Wait for RISC to recover from reset. */ | |
908 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
909 | /* | |
910 | * It is necessary to for a delay here since the card doesn't | |
911 | * respond to PCI reads during a reset. On some architectures | |
912 | * this will result in an MCA. | |
913 | */ | |
914 | udelay(20); | |
915 | for (cnt = 30000; cnt; cnt--) { | |
916 | if ((RD_REG_WORD(®->ctrl_status) & | |
917 | CSR_ISP_SOFT_RESET) == 0) | |
918 | break; | |
919 | udelay(100); | |
920 | } | |
921 | } else | |
922 | udelay(10); | |
923 | ||
924 | /* Reset RISC processor. */ | |
925 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
926 | ||
927 | WRT_REG_WORD(®->semaphore, 0); | |
928 | ||
929 | /* Release RISC processor. */ | |
930 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
931 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
932 | ||
933 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
934 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 935 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 936 | break; |
1da177e4 LT |
937 | |
938 | udelay(100); | |
939 | } | |
940 | } else | |
941 | udelay(100); | |
942 | ||
943 | /* Turn on master enable */ | |
944 | cmd |= PCI_COMMAND_MASTER; | |
945 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
946 | ||
947 | /* Disable RISC pause on FPM parity error. */ | |
948 | if (!IS_QLA2100(ha)) { | |
949 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
950 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
951 | } | |
952 | ||
953 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
954 | } | |
955 | ||
0107109e | 956 | /** |
88c26663 | 957 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
958 | * @ha: HA context |
959 | * | |
960 | * Returns 0 on success. | |
961 | */ | |
88c26663 | 962 | static inline void |
e315cd28 | 963 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
964 | { |
965 | unsigned long flags = 0; | |
e315cd28 | 966 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
967 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
968 | uint32_t cnt, d2; | |
335a1cc9 | 969 | uint16_t wd; |
0107109e | 970 | |
0107109e AV |
971 | spin_lock_irqsave(&ha->hardware_lock, flags); |
972 | ||
973 | /* Reset RISC. */ | |
974 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
975 | for (cnt = 0; cnt < 30000; cnt++) { | |
976 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
977 | break; | |
978 | ||
979 | udelay(10); | |
980 | } | |
981 | ||
982 | WRT_REG_DWORD(®->ctrl_status, | |
983 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 984 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 985 | |
335a1cc9 | 986 | udelay(100); |
88c26663 | 987 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
988 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
989 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
990 | udelay(5); | |
991 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
992 | barrier(); | |
993 | } | |
994 | ||
335a1cc9 | 995 | /* Wait for soft-reset to complete. */ |
0107109e AV |
996 | d2 = RD_REG_DWORD(®->ctrl_status); |
997 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
998 | udelay(5); | |
999 | d2 = RD_REG_DWORD(®->ctrl_status); | |
1000 | barrier(); | |
1001 | } | |
1002 | ||
1003 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
1004 | RD_REG_DWORD(®->hccr); | |
1005 | ||
1006 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
1007 | RD_REG_DWORD(®->hccr); | |
1008 | ||
1009 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
1010 | RD_REG_DWORD(®->hccr); | |
1011 | ||
1012 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1013 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
1014 | udelay(5); | |
1015 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1016 | barrier(); | |
1017 | } | |
1018 | ||
1019 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
1020 | |
1021 | if (IS_NOPOLLING_TYPE(ha)) | |
1022 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1023 | } |
1024 | ||
88c26663 AV |
1025 | /** |
1026 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1027 | * @ha: HA context | |
1028 | * | |
1029 | * Returns 0 on success. | |
1030 | */ | |
1031 | void | |
e315cd28 | 1032 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1033 | { |
e315cd28 | 1034 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1035 | |
1036 | if (pci_channel_offline(ha->pdev) && | |
1037 | ha->flags.pci_channel_io_perm_failure) { | |
1038 | return; | |
1039 | } | |
1040 | ||
fd34f556 | 1041 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1042 | |
1043 | /* Perform RISC reset. */ | |
e315cd28 | 1044 | qla24xx_reset_risc(vha); |
88c26663 AV |
1045 | } |
1046 | ||
1da177e4 LT |
1047 | /** |
1048 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1049 | * @ha: HA context | |
1050 | * | |
1051 | * Returns 0 on success. | |
1052 | */ | |
abbd8870 | 1053 | int |
e315cd28 | 1054 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1055 | { |
1056 | int rval; | |
e315cd28 | 1057 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1058 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1059 | unsigned long flags = 0; |
1060 | uint16_t data; | |
1061 | uint32_t cnt; | |
1062 | uint16_t mb[5]; | |
73208dfd | 1063 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1064 | |
1065 | /* Assume a failed state */ | |
1066 | rval = QLA_FUNCTION_FAILED; | |
1067 | ||
1068 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 1069 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
1070 | |
1071 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1072 | ||
1073 | /* Reset ISP chip. */ | |
1074 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1075 | ||
1076 | /* | |
1077 | * We need to have a delay here since the card will not respond while | |
1078 | * in reset causing an MCA on some architectures. | |
1079 | */ | |
1080 | udelay(20); | |
1081 | data = qla2x00_debounce_register(®->ctrl_status); | |
1082 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1083 | udelay(5); | |
1084 | data = RD_REG_WORD(®->ctrl_status); | |
1085 | barrier(); | |
1086 | } | |
1087 | ||
1088 | if (!cnt) | |
1089 | goto chip_diag_failed; | |
1090 | ||
1091 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 1092 | vha->host_no)); |
1da177e4 LT |
1093 | |
1094 | /* Reset RISC processor. */ | |
1095 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1096 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1097 | ||
1098 | /* Workaround for QLA2312 PCI parity error */ | |
1099 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1100 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1101 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1102 | udelay(5); | |
1103 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1104 | barrier(); |
1da177e4 LT |
1105 | } |
1106 | } else | |
1107 | udelay(10); | |
1108 | ||
1109 | if (!cnt) | |
1110 | goto chip_diag_failed; | |
1111 | ||
1112 | /* Check product ID of chip */ | |
7640335e | 1113 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
1114 | |
1115 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1116 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1117 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1118 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1119 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1120 | mb[3] != PROD_ID_3) { | |
1121 | qla_printk(KERN_WARNING, ha, | |
1122 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
1123 | ||
1124 | goto chip_diag_failed; | |
1125 | } | |
1126 | ha->product_id[0] = mb[1]; | |
1127 | ha->product_id[1] = mb[2]; | |
1128 | ha->product_id[2] = mb[3]; | |
1129 | ha->product_id[3] = mb[4]; | |
1130 | ||
1131 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1132 | if (req->length > 1024) |
1da177e4 LT |
1133 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1134 | else | |
1135 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1136 | req->length; |
1da177e4 LT |
1137 | |
1138 | if (IS_QLA2200(ha) && | |
1139 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1140 | /* Limit firmware transfer size with a 2200A */ | |
1141 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 1142 | vha->host_no)); |
1da177e4 | 1143 | |
ea5b6382 | 1144 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1145 | ha->fw_transfer_size = 128; |
1146 | } | |
1147 | ||
1148 | /* Wrap Incoming Mailboxes Test. */ | |
1149 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1150 | ||
e315cd28 AC |
1151 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
1152 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
1153 | if (rval) { |
1154 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 1155 | vha->host_no)); |
1da177e4 LT |
1156 | qla_printk(KERN_WARNING, ha, |
1157 | "Failed mailbox send register test\n"); | |
1158 | } | |
1159 | else { | |
1160 | /* Flag a successful rval */ | |
1161 | rval = QLA_SUCCESS; | |
1162 | } | |
1163 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1164 | ||
1165 | chip_diag_failed: | |
1166 | if (rval) | |
1167 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 1168 | "****\n", vha->host_no)); |
1da177e4 LT |
1169 | |
1170 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1171 | ||
1172 | return (rval); | |
1173 | } | |
1174 | ||
0107109e AV |
1175 | /** |
1176 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1177 | * @ha: HA context | |
1178 | * | |
1179 | * Returns 0 on success. | |
1180 | */ | |
1181 | int | |
e315cd28 | 1182 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1183 | { |
1184 | int rval; | |
e315cd28 | 1185 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1186 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1187 | |
a9083016 GM |
1188 | if (IS_QLA82XX(ha)) |
1189 | return QLA_SUCCESS; | |
1190 | ||
73208dfd | 1191 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1192 | |
e315cd28 | 1193 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
1194 | if (rval) { |
1195 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 1196 | vha->host_no)); |
0107109e AV |
1197 | qla_printk(KERN_WARNING, ha, |
1198 | "Failed mailbox send register test\n"); | |
1199 | } else { | |
1200 | /* Flag a successful rval */ | |
1201 | rval = QLA_SUCCESS; | |
1202 | } | |
1203 | ||
1204 | return rval; | |
1205 | } | |
1206 | ||
a7a167bf | 1207 | void |
e315cd28 | 1208 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1209 | { |
a7a167bf AV |
1210 | int rval; |
1211 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1212 | eft_size, fce_size, mq_size; |
df613b96 AV |
1213 | dma_addr_t tc_dma; |
1214 | void *tc; | |
e315cd28 | 1215 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1216 | struct req_que *req = ha->req_q_map[0]; |
1217 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1218 | |
1219 | if (ha->fw_dump) { | |
1220 | qla_printk(KERN_WARNING, ha, | |
1221 | "Firmware dump previously allocated.\n"); | |
1222 | return; | |
1223 | } | |
d4e3e04d | 1224 | |
0107109e | 1225 | ha->fw_dumped = 0; |
73208dfd | 1226 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1227 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1228 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1229 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1230 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1231 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1232 | sizeof(uint16_t); | |
e428924c | 1233 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
1234 | if (IS_QLA81XX(ha)) |
1235 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
1236 | else if (IS_QLA25XX(ha)) | |
1237 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1238 | else | |
1239 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1240 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1241 | sizeof(uint32_t); | |
73208dfd AC |
1242 | if (ha->mqenable) |
1243 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 1244 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 1245 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 1246 | goto try_eft; |
df613b96 AV |
1247 | |
1248 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1249 | GFP_KERNEL); | |
1250 | if (!tc) { | |
1251 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1252 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 1253 | goto try_eft; |
df613b96 AV |
1254 | } |
1255 | ||
1256 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1257 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1258 | ha->fce_mb, &ha->fce_bufs); |
1259 | if (rval) { | |
1260 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1261 | "FCE (%d).\n", rval); | |
1262 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
1263 | tc_dma); | |
1264 | ha->flags.fce_enabled = 0; | |
17d98630 | 1265 | goto try_eft; |
df613b96 AV |
1266 | } |
1267 | ||
1268 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
1269 | FCE_SIZE / 1024); | |
1270 | ||
7d9dade3 | 1271 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1272 | ha->flags.fce_enabled = 1; |
1273 | ha->fce_dma = tc_dma; | |
1274 | ha->fce = tc; | |
436a7b11 AV |
1275 | try_eft: |
1276 | /* Allocate memory for Extended Trace Buffer. */ | |
1277 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1278 | GFP_KERNEL); | |
1279 | if (!tc) { | |
1280 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1281 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
1282 | goto cont_alloc; | |
1283 | } | |
1284 | ||
1285 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1286 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
1287 | if (rval) { |
1288 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1289 | "EFT (%d).\n", rval); | |
1290 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
1291 | tc_dma); | |
1292 | goto cont_alloc; | |
1293 | } | |
1294 | ||
1295 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
1296 | EFT_SIZE / 1024); | |
1297 | ||
1298 | eft_size = EFT_SIZE; | |
1299 | ha->eft_dma = tc_dma; | |
1300 | ha->eft = tc; | |
d4e3e04d | 1301 | } |
a7a167bf | 1302 | cont_alloc: |
73208dfd AC |
1303 | req_q_size = req->length * sizeof(request_t); |
1304 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1305 | |
1306 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1307 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1308 | ha->chain_offset = dump_size; |
1309 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1310 | |
1311 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1312 | if (!ha->fw_dump) { |
0107109e | 1313 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 1314 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
1315 | |
1316 | if (ha->eft) { | |
1317 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1318 | ha->eft_dma); | |
1319 | ha->eft = NULL; | |
1320 | ha->eft_dma = 0; | |
1321 | } | |
1322 | return; | |
1323 | } | |
a7a167bf AV |
1324 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
1325 | dump_size / 1024); | |
1326 | ||
1327 | ha->fw_dump_len = dump_size; | |
1328 | ha->fw_dump->signature[0] = 'Q'; | |
1329 | ha->fw_dump->signature[1] = 'L'; | |
1330 | ha->fw_dump->signature[2] = 'G'; | |
1331 | ha->fw_dump->signature[3] = 'C'; | |
1332 | ha->fw_dump->version = __constant_htonl(1); | |
1333 | ||
1334 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1335 | ha->fw_dump->mem_size = htonl(mem_size); | |
1336 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1337 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1338 | ||
1339 | ha->fw_dump->eft_size = htonl(eft_size); | |
1340 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1341 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1342 | ||
1343 | ha->fw_dump->header_size = | |
1344 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1345 | } |
1346 | ||
18e7555a AV |
1347 | static int |
1348 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1349 | { | |
1350 | #define MPS_MASK 0xe0 | |
1351 | int rval; | |
1352 | uint16_t dc; | |
1353 | uint32_t dw; | |
1354 | struct qla_hw_data *ha = vha->hw; | |
1355 | ||
1356 | if (!IS_QLA81XX(vha->hw)) | |
1357 | return QLA_SUCCESS; | |
1358 | ||
1359 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1360 | if (rval != QLA_SUCCESS) { | |
1361 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1362 | "Sync-MPI: Unable to acquire semaphore.\n")); | |
1363 | goto done; | |
1364 | } | |
1365 | ||
1366 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1367 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1368 | if (rval != QLA_SUCCESS) { | |
1369 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1370 | "Sync-MPI: Unable to read sync.\n")); | |
1371 | goto done_release; | |
1372 | } | |
1373 | ||
1374 | dc &= MPS_MASK; | |
1375 | if (dc == (dw & MPS_MASK)) | |
1376 | goto done_release; | |
1377 | ||
1378 | dw &= ~MPS_MASK; | |
1379 | dw |= dc; | |
1380 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1381 | if (rval != QLA_SUCCESS) { | |
1382 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1383 | "Sync-MPI: Unable to gain sync.\n")); | |
1384 | } | |
1385 | ||
1386 | done_release: | |
1387 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1388 | if (rval != QLA_SUCCESS) { | |
1389 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1390 | "Sync-MPI: Unable to release semaphore.\n")); | |
1391 | } | |
1392 | ||
1393 | done: | |
1394 | return rval; | |
1395 | } | |
1396 | ||
1da177e4 LT |
1397 | /** |
1398 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1399 | * @ha: HA context | |
1400 | * | |
1401 | * Returns 0 on success. | |
1402 | */ | |
1403 | static int | |
e315cd28 | 1404 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1405 | { |
0107109e AV |
1406 | int rval; |
1407 | uint32_t srisc_address = 0; | |
e315cd28 | 1408 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1409 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1410 | unsigned long flags; | |
dda772e8 | 1411 | uint16_t fw_major_version; |
3db0652e | 1412 | |
a9083016 GM |
1413 | if (IS_QLA82XX(ha)) { |
1414 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1415 | if (rval == QLA_SUCCESS) { |
1416 | qla2x00_stop_firmware(vha); | |
a9083016 | 1417 | goto enable_82xx_npiv; |
14e303d9 | 1418 | } else |
b963752f | 1419 | goto failed; |
a9083016 GM |
1420 | } |
1421 | ||
3db0652e AV |
1422 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1423 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1424 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1425 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1426 | RD_REG_WORD(®->hccr); | |
1427 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1428 | } | |
1da177e4 | 1429 | |
18e7555a AV |
1430 | qla81xx_mpi_sync(vha); |
1431 | ||
1da177e4 | 1432 | /* Load firmware sequences */ |
e315cd28 | 1433 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1434 | if (rval == QLA_SUCCESS) { |
1da177e4 | 1435 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 1436 | "code.\n", vha->host_no)); |
1da177e4 | 1437 | |
e315cd28 | 1438 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1439 | if (rval == QLA_SUCCESS) { |
1440 | /* Start firmware execution. */ | |
1441 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 1442 | "firmware.\n", vha->host_no)); |
1da177e4 | 1443 | |
e315cd28 | 1444 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1445 | /* Retrieve firmware information. */ |
dda772e8 | 1446 | if (rval == QLA_SUCCESS) { |
a9083016 | 1447 | enable_82xx_npiv: |
dda772e8 | 1448 | fw_major_version = ha->fw_major_version; |
ca9e9c3e | 1449 | rval = qla2x00_get_fw_version(vha, |
1da177e4 LT |
1450 | &ha->fw_major_version, |
1451 | &ha->fw_minor_version, | |
1452 | &ha->fw_subminor_version, | |
3a03eb79 | 1453 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
1454 | ha->mpi_version, &ha->mpi_capabilities, |
1455 | ha->phy_version); | |
ca9e9c3e AV |
1456 | if (rval != QLA_SUCCESS) |
1457 | goto failed; | |
2c3dfe3f | 1458 | ha->flags.npiv_supported = 0; |
e315cd28 | 1459 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1460 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1461 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1462 | if ((!ha->max_npiv_vports) || |
1463 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1464 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1465 | ha->max_npiv_vports = |
eb66dc60 | 1466 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1467 | } |
24a08138 AV |
1468 | qla2x00_get_resource_cnts(vha, NULL, |
1469 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1470 | &ha->max_npiv_vports, NULL); |
d743de66 | 1471 | |
a9083016 GM |
1472 | if (!fw_major_version && ql2xallocfwdump) { |
1473 | if (!IS_QLA82XX(ha)) | |
1474 | qla2x00_alloc_fw_dump(vha); | |
1475 | } | |
1da177e4 LT |
1476 | } |
1477 | } else { | |
1478 | DEBUG2(printk(KERN_INFO | |
1479 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 1480 | vha->host_no)); |
1da177e4 LT |
1481 | } |
1482 | } | |
1483 | ||
3db0652e AV |
1484 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1485 | /* Enable proper parity. */ | |
1486 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1487 | if (IS_QLA2300(ha)) | |
1488 | /* SRAM parity */ | |
1489 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1490 | else | |
1491 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1492 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1493 | RD_REG_WORD(®->hccr); | |
1494 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1495 | } | |
1496 | ||
1d2874de JC |
1497 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1498 | uint32_t size; | |
1499 | ||
1500 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1501 | if (rval == QLA_SUCCESS) { | |
1502 | ha->flags.fac_supported = 1; | |
1503 | ha->fdt_block_size = size << 2; | |
1504 | } else { | |
1505 | qla_printk(KERN_ERR, ha, | |
1506 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
1507 | ha->fw_major_version, ha->fw_minor_version, | |
1508 | ha->fw_subminor_version); | |
1509 | } | |
1510 | } | |
ca9e9c3e | 1511 | failed: |
1da177e4 LT |
1512 | if (rval) { |
1513 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 1514 | vha->host_no)); |
1da177e4 LT |
1515 | } |
1516 | ||
1517 | return (rval); | |
1518 | } | |
1519 | ||
1520 | /** | |
1521 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1522 | * @ha: HA context | |
1523 | * | |
1524 | * Beginning of request ring has initialization control block already built | |
1525 | * by nvram config routine. | |
1526 | * | |
1527 | * Returns 0 on success. | |
1528 | */ | |
73208dfd AC |
1529 | void |
1530 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1531 | { |
1532 | uint16_t cnt; | |
1533 | response_t *pkt; | |
1534 | ||
2afa19a9 AC |
1535 | rsp->ring_ptr = rsp->ring; |
1536 | rsp->ring_index = 0; | |
1537 | rsp->status_srb = NULL; | |
e315cd28 AC |
1538 | pkt = rsp->ring_ptr; |
1539 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1540 | pkt->signature = RESPONSE_PROCESSED; |
1541 | pkt++; | |
1542 | } | |
1da177e4 LT |
1543 | } |
1544 | ||
1545 | /** | |
1546 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1547 | * @ha: HA context | |
1548 | * | |
1549 | * Returns 0 on success. | |
1550 | */ | |
abbd8870 | 1551 | void |
e315cd28 | 1552 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1553 | { |
1554 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1555 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1556 | |
1557 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1558 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1559 | |
1560 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1561 | return; | |
1562 | ||
1563 | /* Serial Link options. */ | |
1564 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1565 | vha->host_no)); |
1da177e4 LT |
1566 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1567 | sizeof(ha->fw_seriallink_options))); | |
1568 | ||
1569 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1570 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1571 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1572 | ||
1573 | /* 1G settings */ | |
1574 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1575 | emphasis = (ha->fw_seriallink_options[2] & | |
1576 | (BIT_4 | BIT_3)) >> 3; | |
1577 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1578 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1579 | rx_sens = (ha->fw_seriallink_options[0] & |
1580 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1581 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1582 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1583 | if (rx_sens == 0x0) | |
1584 | rx_sens = 0x3; | |
1585 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1586 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1587 | ha->fw_options[10] |= BIT_5 | | |
1588 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1589 | (tx_sens & (BIT_1 | BIT_0)); | |
1590 | ||
1591 | /* 2G settings */ | |
1592 | swing = (ha->fw_seriallink_options[2] & | |
1593 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1594 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1595 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1596 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1597 | rx_sens = (ha->fw_seriallink_options[1] & |
1598 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1599 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1600 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1601 | if (rx_sens == 0x0) | |
1602 | rx_sens = 0x3; | |
1603 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1604 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1605 | ha->fw_options[11] |= BIT_5 | | |
1606 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1607 | (tx_sens & (BIT_1 | BIT_0)); | |
1608 | } | |
1609 | ||
1610 | /* FCP2 options. */ | |
1611 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1612 | ha->fw_options[3] |= BIT_13; | |
1613 | ||
1614 | /* LED scheme. */ | |
1615 | if (ha->flags.enable_led_scheme) | |
1616 | ha->fw_options[2] |= BIT_12; | |
1617 | ||
48c02fde AV |
1618 | /* Detect ISP6312. */ |
1619 | if (IS_QLA6312(ha)) | |
1620 | ha->fw_options[2] |= BIT_13; | |
1621 | ||
1da177e4 | 1622 | /* Update firmware options. */ |
e315cd28 | 1623 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1624 | } |
1625 | ||
0107109e | 1626 | void |
e315cd28 | 1627 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1628 | { |
1629 | int rval; | |
e315cd28 | 1630 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1631 | |
a9083016 GM |
1632 | if (IS_QLA82XX(ha)) |
1633 | return; | |
1634 | ||
0107109e | 1635 | /* Update Serial Link options. */ |
f94097ed | 1636 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1637 | return; |
1638 | ||
e315cd28 | 1639 | rval = qla2x00_set_serdes_params(vha, |
f94097ed AV |
1640 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1641 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1642 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1643 | if (rval != QLA_SUCCESS) { |
1644 | qla_printk(KERN_WARNING, ha, | |
1645 | "Unable to update Serial Link options (%x).\n", rval); | |
1646 | } | |
1647 | } | |
1648 | ||
abbd8870 | 1649 | void |
e315cd28 | 1650 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1651 | { |
e315cd28 | 1652 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1653 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1654 | struct req_que *req = ha->req_q_map[0]; |
1655 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1656 | |
1657 | /* Setup ring parameters in initialization control block. */ | |
1658 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1659 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1660 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1661 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1662 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1663 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1664 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1665 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1666 | |
1667 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1668 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1669 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1670 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1671 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1672 | } | |
1673 | ||
0107109e | 1674 | void |
e315cd28 | 1675 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1676 | { |
e315cd28 | 1677 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1678 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1679 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1680 | struct qla_msix_entry *msix; | |
0107109e | 1681 | struct init_cb_24xx *icb; |
73208dfd AC |
1682 | uint16_t rid = 0; |
1683 | struct req_que *req = ha->req_q_map[0]; | |
1684 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1685 | |
73208dfd | 1686 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1687 | icb = (struct init_cb_24xx *)ha->init_cb; |
1688 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1689 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1690 | icb->request_q_length = cpu_to_le16(req->length); |
1691 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1692 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1693 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1694 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1695 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1696 | |
73208dfd AC |
1697 | if (ha->mqenable) { |
1698 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1699 | icb->rid = __constant_cpu_to_le16(rid); | |
1700 | if (ha->flags.msix_enabled) { | |
1701 | msix = &ha->msix_entries[1]; | |
1702 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1703 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1704 | icb->msix = cpu_to_le16(msix->entry); |
1705 | } | |
1706 | /* Use alternate PCI bus number */ | |
1707 | if (MSB(rid)) | |
1708 | icb->firmware_options_2 |= | |
1709 | __constant_cpu_to_le32(BIT_19); | |
1710 | /* Use alternate PCI devfn */ | |
1711 | if (LSB(rid)) | |
1712 | icb->firmware_options_2 |= | |
1713 | __constant_cpu_to_le32(BIT_18); | |
1714 | ||
3155754a AC |
1715 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1716 | if (IS_MSIX_NACK_CAPABLE(ha)) { | |
1717 | icb->firmware_options_2 &= | |
1718 | __constant_cpu_to_le32(~BIT_22); | |
1719 | ha->flags.disable_msix_handshake = 1; | |
1720 | qla_printk(KERN_INFO, ha, | |
1721 | "MSIX Handshake Disable Mode turned on\n"); | |
1722 | } else { | |
1723 | icb->firmware_options_2 |= | |
1724 | __constant_cpu_to_le32(BIT_22); | |
1725 | } | |
73208dfd | 1726 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1727 | |
1728 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1729 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1730 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1731 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1732 | } else { | |
1733 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1734 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1735 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1736 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1737 | } | |
1738 | /* PCI posting */ | |
1739 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1740 | } |
1741 | ||
1da177e4 LT |
1742 | /** |
1743 | * qla2x00_init_rings() - Initializes firmware. | |
1744 | * @ha: HA context | |
1745 | * | |
1746 | * Beginning of request ring has initialization control block already built | |
1747 | * by nvram config routine. | |
1748 | * | |
1749 | * Returns 0 on success. | |
1750 | */ | |
1751 | static int | |
e315cd28 | 1752 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1753 | { |
1754 | int rval; | |
1755 | unsigned long flags = 0; | |
29bdccbe | 1756 | int cnt, que; |
e315cd28 | 1757 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1758 | struct req_que *req; |
1759 | struct rsp_que *rsp; | |
1760 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1761 | struct mid_init_cb_24xx *mid_init_cb = |
1762 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1763 | |
1764 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1765 | ||
1766 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1767 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1768 | req = ha->req_q_map[que]; |
1769 | if (!req) | |
1770 | continue; | |
2afa19a9 | 1771 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1772 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1773 | |
2afa19a9 | 1774 | req->current_outstanding_cmd = 1; |
1da177e4 | 1775 | |
29bdccbe AC |
1776 | /* Initialize firmware. */ |
1777 | req->ring_ptr = req->ring; | |
1778 | req->ring_index = 0; | |
1779 | req->cnt = req->length; | |
1780 | } | |
1da177e4 | 1781 | |
2afa19a9 | 1782 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1783 | rsp = ha->rsp_q_map[que]; |
1784 | if (!rsp) | |
1785 | continue; | |
29bdccbe AC |
1786 | /* Initialize response queue entries */ |
1787 | qla2x00_init_response_q_entries(rsp); | |
1788 | } | |
1da177e4 | 1789 | |
feafb7b1 | 1790 | spin_lock_irqsave(&ha->vport_slock, flags); |
29bdccbe AC |
1791 | /* Clear RSCN queue. */ |
1792 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1793 | vp->rscn_in_ptr = 0; | |
1794 | vp->rscn_out_ptr = 0; | |
1795 | } | |
feafb7b1 AE |
1796 | |
1797 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
1798 | ||
e315cd28 | 1799 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1800 | |
1801 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1802 | ||
1803 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1804 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1805 | |
e315cd28 | 1806 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1807 | |
605aa2bc LC |
1808 | if (ha->flags.npiv_supported) { |
1809 | if (ha->operating_mode == LOOP) | |
1810 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1811 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1812 | } |
1813 | ||
24a08138 AV |
1814 | if (IS_FWI2_CAPABLE(ha)) { |
1815 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1816 | mid_init_cb->init_cb.execution_throttle = | |
1817 | cpu_to_le16(ha->fw_xcb_count); | |
1818 | } | |
2c3dfe3f | 1819 | |
e315cd28 | 1820 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1821 | if (rval) { |
1822 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1823 | vha->host_no)); |
1da177e4 LT |
1824 | } else { |
1825 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1826 | vha->host_no)); |
1da177e4 LT |
1827 | } |
1828 | ||
1829 | return (rval); | |
1830 | } | |
1831 | ||
1832 | /** | |
1833 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1834 | * @ha: HA context | |
1835 | * | |
1836 | * Returns 0 on success. | |
1837 | */ | |
1838 | static int | |
e315cd28 | 1839 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1840 | { |
1841 | int rval; | |
4d4df193 | 1842 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1843 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1844 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1845 | uint16_t state[5]; |
e315cd28 | 1846 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1847 | |
1848 | rval = QLA_SUCCESS; | |
1849 | ||
1850 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1851 | min_wait = 20; |
1da177e4 LT |
1852 | |
1853 | /* | |
1854 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1855 | * our own processing. | |
1856 | */ | |
1857 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1858 | wait_time = min_wait; | |
1859 | } | |
1860 | ||
1861 | /* Min wait time if loop down */ | |
1862 | mtime = jiffies + (min_wait * HZ); | |
1863 | ||
1864 | /* wait time before firmware ready */ | |
1865 | wtime = jiffies + (wait_time * HZ); | |
1866 | ||
1867 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1868 | if (!vha->flags.init_done) |
1da177e4 LT |
1869 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1870 | ||
1871 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1872 | vha->host_no)); |
1da177e4 LT |
1873 | |
1874 | do { | |
e315cd28 | 1875 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1876 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1877 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1878 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1879 | } |
4d4df193 HK |
1880 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1881 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1882 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1883 | state[2])); |
1884 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1885 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1886 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1887 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1888 | |
1889 | cs84xx_time = jiffies; | |
e315cd28 | 1890 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1891 | if (rval != QLA_SUCCESS) |
1892 | break; | |
1893 | ||
1894 | /* Add time taken to initialize. */ | |
1895 | cs84xx_time = jiffies - cs84xx_time; | |
1896 | wtime += cs84xx_time; | |
1897 | mtime += cs84xx_time; | |
1898 | DEBUG16(printk("scsi(%ld): Increasing " | |
1899 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1900 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1901 | } |
1902 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1903 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1904 | vha->host_no)); |
1da177e4 | 1905 | |
e315cd28 | 1906 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1907 | &ha->login_timeout, &ha->r_a_tov); |
1908 | ||
1909 | rval = QLA_SUCCESS; | |
1910 | break; | |
1911 | } | |
1912 | ||
1913 | rval = QLA_FUNCTION_FAILED; | |
1914 | ||
e315cd28 | 1915 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1916 | state[0] != FSTATE_READY) { |
1da177e4 | 1917 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1918 | * other than Wait for Login. |
1919 | */ | |
1da177e4 LT |
1920 | if (time_after_eq(jiffies, mtime)) { |
1921 | qla_printk(KERN_INFO, ha, | |
1922 | "Cable is unplugged...\n"); | |
1923 | ||
e315cd28 | 1924 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1925 | break; |
1926 | } | |
1927 | } | |
1928 | } else { | |
1929 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f SV |
1930 | if (time_after_eq(jiffies, mtime) || |
1931 | (IS_QLA82XX(ha) && ha->flags.fw_hung)) | |
1da177e4 LT |
1932 | break; |
1933 | } | |
1934 | ||
1935 | if (time_after_eq(jiffies, wtime)) | |
1936 | break; | |
1937 | ||
1938 | /* Delay for a while */ | |
1939 | msleep(500); | |
1940 | ||
1941 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1942 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1943 | } while (1); |
1944 | ||
656e8912 AV |
1945 | DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n", |
1946 | vha->host_no, state[0], state[1], state[2], state[3], state[4], | |
1947 | jiffies)); | |
1da177e4 LT |
1948 | |
1949 | if (rval) { | |
1950 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1951 | vha->host_no)); |
1da177e4 LT |
1952 | } |
1953 | ||
1954 | return (rval); | |
1955 | } | |
1956 | ||
1957 | /* | |
1958 | * qla2x00_configure_hba | |
1959 | * Setup adapter context. | |
1960 | * | |
1961 | * Input: | |
1962 | * ha = adapter state pointer. | |
1963 | * | |
1964 | * Returns: | |
1965 | * 0 = success | |
1966 | * | |
1967 | * Context: | |
1968 | * Kernel context. | |
1969 | */ | |
1970 | static int | |
e315cd28 | 1971 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1972 | { |
1973 | int rval; | |
1974 | uint16_t loop_id; | |
1975 | uint16_t topo; | |
2c3dfe3f | 1976 | uint16_t sw_cap; |
1da177e4 LT |
1977 | uint8_t al_pa; |
1978 | uint8_t area; | |
1979 | uint8_t domain; | |
1980 | char connect_type[22]; | |
e315cd28 | 1981 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1982 | |
1983 | /* Get host addresses. */ | |
e315cd28 | 1984 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1985 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1986 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1987 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1988 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1989 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1990 | __func__, vha->host_no)); |
33135aa2 RA |
1991 | } else { |
1992 | qla_printk(KERN_WARNING, ha, | |
1993 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1994 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1995 | } |
1da177e4 LT |
1996 | return (rval); |
1997 | } | |
1998 | ||
1999 | if (topo == 4) { | |
2000 | qla_printk(KERN_INFO, ha, | |
2001 | "Cannot get topology - retrying.\n"); | |
2002 | return (QLA_FUNCTION_FAILED); | |
2003 | } | |
2004 | ||
e315cd28 | 2005 | vha->loop_id = loop_id; |
1da177e4 LT |
2006 | |
2007 | /* initialize */ | |
2008 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
2009 | ha->operating_mode = LOOP; | |
2c3dfe3f | 2010 | ha->switch_cap = 0; |
1da177e4 LT |
2011 | |
2012 | switch (topo) { | |
2013 | case 0: | |
2014 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 2015 | vha->host_no)); |
1da177e4 LT |
2016 | ha->current_topology = ISP_CFG_NL; |
2017 | strcpy(connect_type, "(Loop)"); | |
2018 | break; | |
2019 | ||
2020 | case 1: | |
2021 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 2022 | vha->host_no)); |
2c3dfe3f | 2023 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2024 | ha->current_topology = ISP_CFG_FL; |
2025 | strcpy(connect_type, "(FL_Port)"); | |
2026 | break; | |
2027 | ||
2028 | case 2: | |
2029 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 2030 | vha->host_no)); |
1da177e4 LT |
2031 | ha->operating_mode = P2P; |
2032 | ha->current_topology = ISP_CFG_N; | |
2033 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2034 | break; | |
2035 | ||
2036 | case 3: | |
2037 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 2038 | vha->host_no)); |
2c3dfe3f | 2039 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2040 | ha->operating_mode = P2P; |
2041 | ha->current_topology = ISP_CFG_F; | |
2042 | strcpy(connect_type, "(F_Port)"); | |
2043 | break; | |
2044 | ||
2045 | default: | |
2046 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
2047 | "Using NL.\n", | |
e315cd28 | 2048 | vha->host_no, topo)); |
1da177e4 LT |
2049 | ha->current_topology = ISP_CFG_NL; |
2050 | strcpy(connect_type, "(Loop)"); | |
2051 | break; | |
2052 | } | |
2053 | ||
2054 | /* Save Host port and loop ID. */ | |
2055 | /* byte order - Big Endian */ | |
e315cd28 AC |
2056 | vha->d_id.b.domain = domain; |
2057 | vha->d_id.b.area = area; | |
2058 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2059 | |
e315cd28 | 2060 | if (!vha->flags.init_done) |
1da177e4 LT |
2061 | qla_printk(KERN_INFO, ha, |
2062 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 2063 | connect_type, vha->loop_id); |
1da177e4 LT |
2064 | |
2065 | if (rval) { | |
e315cd28 | 2066 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 2067 | } else { |
e315cd28 | 2068 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
2069 | } |
2070 | ||
2071 | return(rval); | |
2072 | } | |
2073 | ||
a9083016 | 2074 | inline void |
e315cd28 AC |
2075 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2076 | char *def) | |
9bb9fcf2 AV |
2077 | { |
2078 | char *st, *en; | |
2079 | uint16_t index; | |
e315cd28 | 2080 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2081 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
a9083016 | 2082 | !IS_QLA8XXX_TYPE(ha); |
9bb9fcf2 AV |
2083 | |
2084 | if (memcmp(model, BINZERO, len) != 0) { | |
2085 | strncpy(ha->model_number, model, len); | |
2086 | st = en = ha->model_number; | |
2087 | en += len - 1; | |
2088 | while (en > st) { | |
2089 | if (*en != 0x20 && *en != 0x00) | |
2090 | break; | |
2091 | *en-- = '\0'; | |
2092 | } | |
2093 | ||
2094 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2095 | if (use_tbl && |
2096 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2097 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2098 | strncpy(ha->model_desc, |
2099 | qla2x00_model_name[index * 2 + 1], | |
2100 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2101 | } else { |
2102 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2103 | if (use_tbl && |
2104 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2105 | index < QLA_MODEL_NAMES) { |
2106 | strcpy(ha->model_number, | |
2107 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2108 | strncpy(ha->model_desc, |
2109 | qla2x00_model_name[index * 2 + 1], | |
2110 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2111 | } else { |
2112 | strcpy(ha->model_number, def); | |
2113 | } | |
2114 | } | |
1ee27146 | 2115 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2116 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2117 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2118 | } |
2119 | ||
4e08df3f DM |
2120 | /* On sparc systems, obtain port and node WWN from firmware |
2121 | * properties. | |
2122 | */ | |
e315cd28 | 2123 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2124 | { |
2125 | #ifdef CONFIG_SPARC | |
e315cd28 | 2126 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2127 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2128 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2129 | const u8 *val; | |
4e08df3f DM |
2130 | int len; |
2131 | ||
2132 | val = of_get_property(dp, "port-wwn", &len); | |
2133 | if (val && len >= WWN_SIZE) | |
2134 | memcpy(nv->port_name, val, WWN_SIZE); | |
2135 | ||
2136 | val = of_get_property(dp, "node-wwn", &len); | |
2137 | if (val && len >= WWN_SIZE) | |
2138 | memcpy(nv->node_name, val, WWN_SIZE); | |
2139 | #endif | |
2140 | } | |
2141 | ||
1da177e4 LT |
2142 | /* |
2143 | * NVRAM configuration for ISP 2xxx | |
2144 | * | |
2145 | * Input: | |
2146 | * ha = adapter block pointer. | |
2147 | * | |
2148 | * Output: | |
2149 | * initialization control block in response_ring | |
2150 | * host adapters parameters in host adapter block | |
2151 | * | |
2152 | * Returns: | |
2153 | * 0 = success. | |
2154 | */ | |
abbd8870 | 2155 | int |
e315cd28 | 2156 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2157 | { |
4e08df3f | 2158 | int rval; |
0107109e AV |
2159 | uint8_t chksum = 0; |
2160 | uint16_t cnt; | |
2161 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2162 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2163 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2164 | nvram_t *nv = ha->nvram; |
2165 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2166 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2167 | |
4e08df3f DM |
2168 | rval = QLA_SUCCESS; |
2169 | ||
1da177e4 | 2170 | /* Determine NVRAM starting address. */ |
0107109e | 2171 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2172 | ha->nvram_base = 0; |
2173 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2174 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2175 | ha->nvram_base = 0x80; | |
2176 | ||
2177 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2178 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2179 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2180 | chksum += *ptr++; | |
1da177e4 | 2181 | |
e315cd28 | 2182 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 2183 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
2184 | |
2185 | /* Bad NVRAM data, set defaults parameters. */ | |
2186 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2187 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2188 | /* Reset NVRAM data. */ | |
2189 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
2190 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
2191 | nv->nvram_version); | |
4e08df3f DM |
2192 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
2193 | "invalid -- WWPN) defaults.\n"); | |
2194 | ||
2195 | /* | |
2196 | * Set default initialization control block. | |
2197 | */ | |
2198 | memset(nv, 0, ha->nvram_size); | |
2199 | nv->parameter_block_version = ICB_VERSION; | |
2200 | ||
2201 | if (IS_QLA23XX(ha)) { | |
2202 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2203 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2204 | nv->add_firmware_options[0] = BIT_5; | |
2205 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2206 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2207 | nv->special_options[1] = BIT_7; | |
2208 | } else if (IS_QLA2200(ha)) { | |
2209 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2210 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2211 | nv->add_firmware_options[0] = BIT_5; | |
2212 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2213 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2214 | } else if (IS_QLA2100(ha)) { | |
2215 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2216 | nv->firmware_options[1] = BIT_5; | |
2217 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2218 | } | |
2219 | ||
2220 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2221 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2222 | nv->retry_count = 8; | |
2223 | nv->retry_delay = 1; | |
2224 | ||
2225 | nv->port_name[0] = 33; | |
2226 | nv->port_name[3] = 224; | |
2227 | nv->port_name[4] = 139; | |
2228 | ||
e315cd28 | 2229 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2230 | |
2231 | nv->login_timeout = 4; | |
2232 | ||
2233 | /* | |
2234 | * Set default host adapter parameters | |
2235 | */ | |
2236 | nv->host_p[1] = BIT_2; | |
2237 | nv->reset_delay = 5; | |
2238 | nv->port_down_retry_count = 8; | |
2239 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2240 | nv->link_down_timeout = 60; | |
2241 | ||
2242 | rval = 1; | |
1da177e4 LT |
2243 | } |
2244 | ||
2245 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2246 | /* | |
2247 | * The SN2 does not provide BIOS emulation which means you can't change | |
2248 | * potentially bogus BIOS settings. Force the use of default settings | |
2249 | * for link rate and frame size. Hope that the rest of the settings | |
2250 | * are valid. | |
2251 | */ | |
2252 | if (ia64_platform_is("sn2")) { | |
2253 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2254 | if (IS_QLA23XX(ha)) | |
2255 | nv->special_options[1] = BIT_7; | |
2256 | } | |
2257 | #endif | |
2258 | ||
2259 | /* Reset Initialization control block */ | |
0107109e | 2260 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2261 | |
2262 | /* | |
2263 | * Setup driver NVRAM options. | |
2264 | */ | |
2265 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2266 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2267 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2268 | nv->firmware_options[1] &= ~BIT_4; | |
2269 | ||
2270 | if (IS_QLA23XX(ha)) { | |
2271 | nv->firmware_options[0] |= BIT_2; | |
2272 | nv->firmware_options[0] &= ~BIT_3; | |
5ff1d584 | 2273 | nv->firmware_options[0] &= ~BIT_6; |
0107109e | 2274 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2275 | |
2276 | if (IS_QLA2300(ha)) { | |
2277 | if (ha->fb_rev == FPM_2310) { | |
2278 | strcpy(ha->model_number, "QLA2310"); | |
2279 | } else { | |
2280 | strcpy(ha->model_number, "QLA2300"); | |
2281 | } | |
2282 | } else { | |
e315cd28 | 2283 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2284 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2285 | } |
2286 | } else if (IS_QLA2200(ha)) { | |
2287 | nv->firmware_options[0] |= BIT_2; | |
2288 | /* | |
2289 | * 'Point-to-point preferred, else loop' is not a safe | |
2290 | * connection mode setting. | |
2291 | */ | |
2292 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2293 | (BIT_5 | BIT_4)) { | |
2294 | /* Force 'loop preferred, else point-to-point'. */ | |
2295 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2296 | nv->add_firmware_options[0] |= BIT_5; | |
2297 | } | |
2298 | strcpy(ha->model_number, "QLA22xx"); | |
2299 | } else /*if (IS_QLA2100(ha))*/ { | |
2300 | strcpy(ha->model_number, "QLA2100"); | |
2301 | } | |
2302 | ||
2303 | /* | |
2304 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2305 | */ | |
2306 | dptr1 = (uint8_t *)icb; | |
2307 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2308 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2309 | while (cnt--) | |
2310 | *dptr1++ = *dptr2++; | |
2311 | ||
2312 | /* Copy 2nd half. */ | |
2313 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2314 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2315 | while (cnt--) | |
2316 | *dptr1++ = *dptr2++; | |
2317 | ||
5341e868 AV |
2318 | /* Use alternate WWN? */ |
2319 | if (nv->host_p[1] & BIT_7) { | |
2320 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2321 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2322 | } | |
2323 | ||
1da177e4 LT |
2324 | /* Prepare nodename */ |
2325 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2326 | /* | |
2327 | * Firmware will apply the following mask if the nodename was | |
2328 | * not provided. | |
2329 | */ | |
2330 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2331 | icb->node_name[0] &= 0xF0; | |
2332 | } | |
2333 | ||
2334 | /* | |
2335 | * Set host adapter parameters. | |
2336 | */ | |
0181944f | 2337 | if (nv->host_p[0] & BIT_7) |
11010fec | 2338 | ql2xextended_error_logging = 1; |
1da177e4 LT |
2339 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2340 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2341 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2342 | ha->flags.disable_risc_code_load = 0; | |
2343 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2344 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2345 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2346 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2347 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2348 | |
2349 | ha->operating_mode = | |
2350 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2351 | ||
2352 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2353 | sizeof(ha->fw_seriallink_options)); | |
2354 | ||
2355 | /* save HBA serial number */ | |
2356 | ha->serial0 = icb->port_name[5]; | |
2357 | ha->serial1 = icb->port_name[6]; | |
2358 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2359 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2360 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2361 | |
2362 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2363 | ||
2364 | ha->retry_count = nv->retry_count; | |
2365 | ||
2366 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2367 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2368 | nv->login_timeout = ql2xlogintimeout; |
2369 | if (nv->login_timeout < 4) | |
2370 | nv->login_timeout = 4; | |
2371 | ha->login_timeout = nv->login_timeout; | |
2372 | icb->login_timeout = nv->login_timeout; | |
2373 | ||
00a537b8 AV |
2374 | /* Set minimum RATOV to 100 tenths of a second. */ |
2375 | ha->r_a_tov = 100; | |
1da177e4 | 2376 | |
1da177e4 LT |
2377 | ha->loop_reset_delay = nv->reset_delay; |
2378 | ||
1da177e4 LT |
2379 | /* Link Down Timeout = 0: |
2380 | * | |
2381 | * When Port Down timer expires we will start returning | |
2382 | * I/O's to OS with "DID_NO_CONNECT". | |
2383 | * | |
2384 | * Link Down Timeout != 0: | |
2385 | * | |
2386 | * The driver waits for the link to come up after link down | |
2387 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2388 | */ |
1da177e4 LT |
2389 | if (nv->link_down_timeout == 0) { |
2390 | ha->loop_down_abort_time = | |
354d6b21 | 2391 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2392 | } else { |
2393 | ha->link_down_timeout = nv->link_down_timeout; | |
2394 | ha->loop_down_abort_time = | |
2395 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2396 | } |
1da177e4 | 2397 | |
1da177e4 LT |
2398 | /* |
2399 | * Need enough time to try and get the port back. | |
2400 | */ | |
2401 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2402 | if (qlport_down_retry) | |
2403 | ha->port_down_retry_count = qlport_down_retry; | |
2404 | /* Set login_retry_count */ | |
2405 | ha->login_retry_count = nv->retry_count; | |
2406 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2407 | ha->port_down_retry_count > 3) | |
2408 | ha->login_retry_count = ha->port_down_retry_count; | |
2409 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2410 | ha->login_retry_count = ha->port_down_retry_count; | |
2411 | if (ql2xloginretrycount) | |
2412 | ha->login_retry_count = ql2xloginretrycount; | |
2413 | ||
1da177e4 LT |
2414 | icb->lun_enables = __constant_cpu_to_le16(0); |
2415 | icb->command_resource_count = 0; | |
2416 | icb->immediate_notify_resource_count = 0; | |
2417 | icb->timeout = __constant_cpu_to_le16(0); | |
2418 | ||
2419 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2420 | /* Enable RIO */ | |
2421 | icb->firmware_options[0] &= ~BIT_3; | |
2422 | icb->add_firmware_options[0] &= | |
2423 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2424 | icb->add_firmware_options[0] |= BIT_2; | |
2425 | icb->response_accumulation_timer = 3; | |
2426 | icb->interrupt_delay_timer = 5; | |
2427 | ||
e315cd28 | 2428 | vha->flags.process_response_queue = 1; |
1da177e4 | 2429 | } else { |
4fdfefe5 | 2430 | /* Enable ZIO. */ |
e315cd28 | 2431 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2432 | ha->zio_mode = icb->add_firmware_options[0] & |
2433 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2434 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2435 | icb->interrupt_delay_timer: 2; | |
2436 | } | |
1da177e4 LT |
2437 | icb->add_firmware_options[0] &= |
2438 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2439 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2440 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
2441 | ha->zio_mode = QLA_ZIO_MODE_6; |
2442 | ||
4fdfefe5 | 2443 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 2444 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 2445 | ha->zio_timer * 100)); |
1da177e4 | 2446 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
2447 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2448 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2449 | |
4fdfefe5 AV |
2450 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2451 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2452 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2453 | } |
2454 | } | |
2455 | ||
4e08df3f DM |
2456 | if (rval) { |
2457 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 2458 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
2459 | } |
2460 | return (rval); | |
1da177e4 LT |
2461 | } |
2462 | ||
19a7b4ae JSEC |
2463 | static void |
2464 | qla2x00_rport_del(void *data) | |
2465 | { | |
2466 | fc_port_t *fcport = data; | |
d97994dc | 2467 | struct fc_rport *rport; |
d97994dc | 2468 | |
e315cd28 | 2469 | spin_lock_irq(fcport->vha->host->host_lock); |
ac280b67 | 2470 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2471 | fcport->drport = NULL; |
e315cd28 | 2472 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc AV |
2473 | if (rport) |
2474 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2475 | } |
2476 | ||
1da177e4 LT |
2477 | /** |
2478 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2479 | * @ha: HA context | |
2480 | * @flags: allocation flags | |
2481 | * | |
2482 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2483 | */ | |
9a069e19 | 2484 | fc_port_t * |
e315cd28 | 2485 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2486 | { |
2487 | fc_port_t *fcport; | |
2488 | ||
bbfbbbc1 MK |
2489 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2490 | if (!fcport) | |
2491 | return NULL; | |
1da177e4 LT |
2492 | |
2493 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2494 | fcport->vha = vha; |
2495 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2496 | fcport->port_type = FCT_UNKNOWN; |
2497 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 2498 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 2499 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2500 | |
bbfbbbc1 | 2501 | return fcport; |
1da177e4 LT |
2502 | } |
2503 | ||
2504 | /* | |
2505 | * qla2x00_configure_loop | |
2506 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2507 | * | |
2508 | * Input: | |
2509 | * ha = adapter block pointer. | |
2510 | * | |
2511 | * Returns: | |
2512 | * 0 = success. | |
2513 | * 1 = error. | |
2514 | * 2 = database was full and device was not configured. | |
2515 | */ | |
2516 | static int | |
e315cd28 | 2517 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2518 | { |
2519 | int rval; | |
2520 | unsigned long flags, save_flags; | |
e315cd28 | 2521 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2522 | rval = QLA_SUCCESS; |
2523 | ||
2524 | /* Get Initiator ID */ | |
e315cd28 AC |
2525 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2526 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
2527 | if (rval != QLA_SUCCESS) { |
2528 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 2529 | vha->host_no)); |
1da177e4 LT |
2530 | return (rval); |
2531 | } | |
2532 | } | |
2533 | ||
e315cd28 | 2534 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 2535 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 2536 | vha->host_no, flags)); |
1da177e4 LT |
2537 | |
2538 | /* | |
2539 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2540 | * both at the same time. | |
2541 | */ | |
e315cd28 AC |
2542 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2543 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2544 | |
3064ff39 MH |
2545 | qla2x00_get_data_rate(vha); |
2546 | ||
1da177e4 LT |
2547 | /* Determine what we need to do */ |
2548 | if (ha->current_topology == ISP_CFG_FL && | |
2549 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2550 | ||
e315cd28 | 2551 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2552 | set_bit(RSCN_UPDATE, &flags); |
2553 | ||
2554 | } else if (ha->current_topology == ISP_CFG_F && | |
2555 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2556 | ||
e315cd28 | 2557 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2558 | set_bit(RSCN_UPDATE, &flags); |
2559 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2560 | |
2561 | } else if (ha->current_topology == ISP_CFG_N) { | |
2562 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2563 | |
e315cd28 | 2564 | } else if (!vha->flags.online || |
1da177e4 LT |
2565 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2566 | ||
e315cd28 | 2567 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2568 | set_bit(RSCN_UPDATE, &flags); |
2569 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2570 | } | |
2571 | ||
2572 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2573 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2574 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2575 | else |
2576 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2577 | } |
2578 | ||
2579 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2580 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2581 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2582 | else |
2583 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2584 | } |
2585 | ||
2586 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2587 | if (atomic_read(&vha->loop_down_timer) || |
2588 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2589 | rval = QLA_FUNCTION_FAILED; |
2590 | } else { | |
e315cd28 | 2591 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2592 | |
e315cd28 | 2593 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2594 | } |
2595 | } | |
2596 | ||
2597 | if (rval) { | |
2598 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2599 | __func__, vha->host_no)); |
1da177e4 LT |
2600 | } else { |
2601 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2602 | } | |
2603 | ||
cc3ef7bc | 2604 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2605 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2606 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2607 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2608 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2609 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
3a6478df GM |
2610 | if (!IS_ALOGIO_CAPABLE(ha)) |
2611 | vha->flags.rscn_queue_overflow = 1; | |
f4658b6c | 2612 | } |
1da177e4 LT |
2613 | } |
2614 | ||
2615 | return (rval); | |
2616 | } | |
2617 | ||
2618 | ||
2619 | ||
2620 | /* | |
2621 | * qla2x00_configure_local_loop | |
2622 | * Updates Fibre Channel Device Database with local loop devices. | |
2623 | * | |
2624 | * Input: | |
2625 | * ha = adapter block pointer. | |
2626 | * | |
2627 | * Returns: | |
2628 | * 0 = success. | |
2629 | */ | |
2630 | static int | |
e315cd28 | 2631 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2632 | { |
2633 | int rval, rval2; | |
2634 | int found_devs; | |
2635 | int found; | |
2636 | fc_port_t *fcport, *new_fcport; | |
2637 | ||
2638 | uint16_t index; | |
2639 | uint16_t entries; | |
2640 | char *id_iter; | |
2641 | uint16_t loop_id; | |
2642 | uint8_t domain, area, al_pa; | |
e315cd28 | 2643 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2644 | |
2645 | found_devs = 0; | |
2646 | new_fcport = NULL; | |
2647 | entries = MAX_FIBRE_DEVICES; | |
2648 | ||
e315cd28 AC |
2649 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2650 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2651 | |
2652 | /* Get list of logged in devices. */ | |
2653 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2654 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2655 | &entries); |
2656 | if (rval != QLA_SUCCESS) | |
2657 | goto cleanup_allocation; | |
2658 | ||
2659 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2660 | vha->host_no, entries)); |
1da177e4 LT |
2661 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2662 | entries * sizeof(struct gid_list_info))); | |
2663 | ||
2664 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2665 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2666 | if (new_fcport == NULL) { |
2667 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2668 | goto cleanup_allocation; | |
2669 | } | |
2670 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2671 | ||
2672 | /* | |
2673 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2674 | */ | |
e315cd28 | 2675 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2676 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2677 | fcport->port_type != FCT_BROADCAST && | |
2678 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2679 | ||
2680 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2681 | "loop_id=0x%04x\n", | |
e315cd28 | 2682 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2683 | |
2684 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2685 | } |
2686 | } | |
2687 | ||
2688 | /* Add devices to port list. */ | |
2689 | id_iter = (char *)ha->gid_list; | |
2690 | for (index = 0; index < entries; index++) { | |
2691 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2692 | area = ((struct gid_list_info *)id_iter)->area; | |
2693 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2694 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2695 | loop_id = (uint16_t) |
2696 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2697 | else |
1da177e4 LT |
2698 | loop_id = le16_to_cpu( |
2699 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2700 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2701 | |
2702 | /* Bypass reserved domain fields. */ | |
2703 | if ((domain & 0xf0) == 0xf0) | |
2704 | continue; | |
2705 | ||
2706 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2707 | if (area && domain && |
e315cd28 | 2708 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2709 | continue; |
2710 | ||
2711 | /* Bypass invalid local loop ID. */ | |
2712 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2713 | continue; | |
2714 | ||
2715 | /* Fill in member data. */ | |
2716 | new_fcport->d_id.b.domain = domain; | |
2717 | new_fcport->d_id.b.area = area; | |
2718 | new_fcport->d_id.b.al_pa = al_pa; | |
2719 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2720 | new_fcport->vp_idx = vha->vp_idx; |
2721 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2722 | if (rval2 != QLA_SUCCESS) { |
2723 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2724 | "information -- get_port_database=%x, " | |
2725 | "loop_id=0x%04x\n", | |
e315cd28 | 2726 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2727 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2728 | vha->host_no)); |
2729 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2730 | continue; |
2731 | } | |
2732 | ||
2733 | /* Check for matching device in port list. */ | |
2734 | found = 0; | |
2735 | fcport = NULL; | |
e315cd28 | 2736 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2737 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2738 | WWN_SIZE)) | |
2739 | continue; | |
2740 | ||
ddb9b126 | 2741 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2742 | fcport->loop_id = new_fcport->loop_id; |
2743 | fcport->port_type = new_fcport->port_type; | |
2744 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2745 | memcpy(fcport->node_name, new_fcport->node_name, | |
2746 | WWN_SIZE); | |
2747 | ||
2748 | found++; | |
2749 | break; | |
2750 | } | |
2751 | ||
2752 | if (!found) { | |
2753 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2754 | if (vha->vp_idx) { |
2755 | new_fcport->vha = vha; | |
2756 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2757 | } |
e315cd28 | 2758 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2759 | |
2760 | /* Allocate a new replacement fcport. */ | |
2761 | fcport = new_fcport; | |
e315cd28 | 2762 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2763 | if (new_fcport == NULL) { |
2764 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2765 | goto cleanup_allocation; | |
2766 | } | |
2767 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2768 | } | |
2769 | ||
d8b45213 | 2770 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2771 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2772 | |
e315cd28 | 2773 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2774 | |
2775 | found_devs++; | |
2776 | } | |
2777 | ||
2778 | cleanup_allocation: | |
c9475cb0 | 2779 | kfree(new_fcport); |
1da177e4 LT |
2780 | |
2781 | if (rval != QLA_SUCCESS) { | |
2782 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2783 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2784 | } |
2785 | ||
1da177e4 LT |
2786 | return (rval); |
2787 | } | |
2788 | ||
d8b45213 | 2789 | static void |
e315cd28 | 2790 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2791 | { |
2792 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2793 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2794 | char *link_speed; | |
d8b45213 | 2795 | int rval; |
1bb39548 | 2796 | uint16_t mb[4]; |
e315cd28 | 2797 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2798 | |
c76f2c01 | 2799 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2800 | return; |
2801 | ||
39bd9622 AV |
2802 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2803 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2804 | return; |
2805 | ||
e315cd28 | 2806 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2807 | mb); |
d8b45213 AV |
2808 | if (rval != QLA_SUCCESS) { |
2809 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2810 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2811 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2812 | fcport->port_name[2], fcport->port_name[3], |
2813 | fcport->port_name[4], fcport->port_name[5], | |
2814 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2815 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 | 2816 | } else { |
9f8fddee AV |
2817 | link_speed = link_speeds[LS_UNKNOWN]; |
2818 | if (fcport->fp_speed < 5) | |
2819 | link_speed = link_speeds[fcport->fp_speed]; | |
2820 | else if (fcport->fp_speed == 0x13) | |
2821 | link_speed = link_speeds[5]; | |
d8b45213 AV |
2822 | DEBUG2(qla_printk(KERN_INFO, ha, |
2823 | "iIDMA adjusted to %s GB/s on " | |
2824 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
9f8fddee | 2825 | link_speed, fcport->port_name[0], |
d8b45213 AV |
2826 | fcport->port_name[1], fcport->port_name[2], |
2827 | fcport->port_name[3], fcport->port_name[4], | |
2828 | fcport->port_name[5], fcport->port_name[6], | |
2829 | fcport->port_name[7])); | |
2830 | } | |
2831 | } | |
2832 | ||
23be331d | 2833 | static void |
e315cd28 | 2834 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 AV |
2835 | { |
2836 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2837 | struct fc_rport *rport; |
e315cd28 | 2838 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2839 | |
ac280b67 | 2840 | qla2x00_rport_del(fcport); |
8482e118 | 2841 | |
f8b02a85 AV |
2842 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2843 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 AV |
2844 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2845 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2846 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2847 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2848 | if (!rport) { |
2849 | qla_printk(KERN_WARNING, ha, | |
2850 | "Unable to allocate fc remote port!\n"); | |
2851 | return; | |
2852 | } | |
e315cd28 | 2853 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2854 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2855 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2856 | |
ad3e0eda | 2857 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2858 | |
8482e118 AV |
2859 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2860 | if (fcport->port_type == FCT_INITIATOR) | |
2861 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2862 | if (fcport->port_type == FCT_TARGET) | |
2863 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2864 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2865 | } |
2866 | ||
23be331d AB |
2867 | /* |
2868 | * qla2x00_update_fcport | |
2869 | * Updates device on list. | |
2870 | * | |
2871 | * Input: | |
2872 | * ha = adapter block pointer. | |
2873 | * fcport = port structure pointer. | |
2874 | * | |
2875 | * Return: | |
2876 | * 0 - Success | |
2877 | * BIT_0 - error | |
2878 | * | |
2879 | * Context: | |
2880 | * Kernel context. | |
2881 | */ | |
2882 | void | |
e315cd28 | 2883 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2884 | { |
e315cd28 | 2885 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2886 | |
e315cd28 | 2887 | fcport->vha = vha; |
23be331d | 2888 | fcport->login_retry = 0; |
e315cd28 | 2889 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2890 | PORT_RETRY_TIME; |
e315cd28 | 2891 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d | 2892 | PORT_RETRY_TIME); |
5ff1d584 | 2893 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2894 | |
e315cd28 | 2895 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2896 | |
2897 | atomic_set(&fcport->state, FCS_ONLINE); | |
2898 | ||
e315cd28 | 2899 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2900 | } |
2901 | ||
1da177e4 LT |
2902 | /* |
2903 | * qla2x00_configure_fabric | |
2904 | * Setup SNS devices with loop ID's. | |
2905 | * | |
2906 | * Input: | |
2907 | * ha = adapter block pointer. | |
2908 | * | |
2909 | * Returns: | |
2910 | * 0 = success. | |
2911 | * BIT_0 = error | |
2912 | */ | |
2913 | static int | |
e315cd28 | 2914 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2915 | { |
2916 | int rval, rval2; | |
2917 | fc_port_t *fcport, *fcptemp; | |
2918 | uint16_t next_loopid; | |
2919 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2920 | uint16_t loop_id; |
1da177e4 | 2921 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2922 | struct qla_hw_data *ha = vha->hw; |
2923 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2924 | |
2925 | /* If FL port exists, then SNS is present */ | |
e428924c | 2926 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2927 | loop_id = NPH_F_PORT; |
2928 | else | |
2929 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2930 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2931 | if (rval != QLA_SUCCESS) { |
2932 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2933 | "Port\n", vha->host_no)); |
1da177e4 | 2934 | |
e315cd28 | 2935 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2936 | return (QLA_SUCCESS); |
2937 | } | |
e315cd28 | 2938 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2939 | |
2940 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2941 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2942 | if (rval2 == QLA_RSCNS_HANDLED) { |
2943 | /* No point doing the scan, just continue. */ | |
2944 | return (QLA_SUCCESS); | |
2945 | } | |
2946 | do { | |
cca5335c AV |
2947 | /* FDMI support. */ |
2948 | if (ql2xfdmienable && | |
e315cd28 AC |
2949 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2950 | qla2x00_fdmi_register(vha); | |
cca5335c | 2951 | |
1da177e4 | 2952 | /* Ensure we are logged into the SNS. */ |
e428924c | 2953 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2954 | loop_id = NPH_SNS; |
2955 | else | |
2956 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2957 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2958 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2959 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2960 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2961 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2962 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2963 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2964 | return (QLA_SUCCESS); | |
2965 | } | |
2966 | ||
e315cd28 AC |
2967 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2968 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2969 | /* EMPTY */ |
2970 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2971 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2972 | } |
e315cd28 | 2973 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2974 | /* EMPTY */ |
2975 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2976 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2977 | } |
e315cd28 | 2978 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2979 | /* EMPTY */ |
2980 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2981 | "failed.\n", vha->host_no)); |
2982 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2983 | /* EMPTY */ |
2984 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2985 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2986 | } |
2987 | } | |
2988 | ||
e315cd28 | 2989 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2990 | if (rval != QLA_SUCCESS) |
2991 | break; | |
2992 | ||
2993 | /* | |
2994 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 2995 | * FCP2 devices. |
1da177e4 | 2996 | */ |
e315cd28 AC |
2997 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2998 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2999 | break; |
3000 | ||
3001 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
3002 | continue; | |
3003 | ||
3004 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 3005 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3006 | ql2xplogiabsentdevice, 0); |
1da177e4 | 3007 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 3008 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3009 | fcport->port_type != FCT_INITIATOR && |
3010 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3011 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3012 | fcport->loop_id, |
3013 | fcport->d_id.b.domain, | |
3014 | fcport->d_id.b.area, | |
3015 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3016 | fcport->loop_id = FC_NO_LOOP_ID; |
3017 | } | |
3018 | } | |
3019 | } | |
3020 | ||
3021 | /* Starting free loop ID. */ | |
e315cd28 | 3022 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
3023 | |
3024 | /* | |
3025 | * Scan through our port list and login entries that need to be | |
3026 | * logged in. | |
3027 | */ | |
e315cd28 AC |
3028 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3029 | if (atomic_read(&vha->loop_down_timer) || | |
3030 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3031 | break; |
3032 | ||
3033 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
3034 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
3035 | continue; | |
3036 | ||
3037 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3038 | fcport->loop_id = next_loopid; | |
d4486fd6 | 3039 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 3040 | base_vha, fcport); |
1da177e4 LT |
3041 | if (rval != QLA_SUCCESS) { |
3042 | /* Ran out of IDs to use */ | |
3043 | break; | |
3044 | } | |
3045 | } | |
1da177e4 | 3046 | /* Login and update database */ |
e315cd28 | 3047 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3048 | } |
3049 | ||
3050 | /* Exit if out of loop IDs. */ | |
3051 | if (rval != QLA_SUCCESS) { | |
3052 | break; | |
3053 | } | |
3054 | ||
3055 | /* | |
3056 | * Login and add the new devices to our port list. | |
3057 | */ | |
3058 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
3059 | if (atomic_read(&vha->loop_down_timer) || |
3060 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3061 | break; |
3062 | ||
3063 | /* Find a new loop ID to use. */ | |
3064 | fcport->loop_id = next_loopid; | |
e315cd28 | 3065 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
3066 | if (rval != QLA_SUCCESS) { |
3067 | /* Ran out of IDs to use */ | |
3068 | break; | |
3069 | } | |
3070 | ||
bdf79621 | 3071 | /* Login and update database */ |
e315cd28 AC |
3072 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
3073 | ||
3074 | if (vha->vp_idx) { | |
3075 | fcport->vha = vha; | |
3076 | fcport->vp_idx = vha->vp_idx; | |
3077 | } | |
3078 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
3079 | } |
3080 | } while (0); | |
3081 | ||
3082 | /* Free all new device structures not processed. */ | |
3083 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
3084 | list_del(&fcport->list); | |
3085 | kfree(fcport); | |
3086 | } | |
3087 | ||
3088 | if (rval) { | |
3089 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 3090 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
3091 | } |
3092 | ||
3093 | return (rval); | |
3094 | } | |
3095 | ||
1da177e4 LT |
3096 | /* |
3097 | * qla2x00_find_all_fabric_devs | |
3098 | * | |
3099 | * Input: | |
3100 | * ha = adapter block pointer. | |
3101 | * dev = database device entry pointer. | |
3102 | * | |
3103 | * Returns: | |
3104 | * 0 = success. | |
3105 | * | |
3106 | * Context: | |
3107 | * Kernel context. | |
3108 | */ | |
3109 | static int | |
e315cd28 AC |
3110 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3111 | struct list_head *new_fcports) | |
1da177e4 LT |
3112 | { |
3113 | int rval; | |
3114 | uint16_t loop_id; | |
3115 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3116 | int found; | |
3117 | ||
3118 | sw_info_t *swl; | |
3119 | int swl_idx; | |
3120 | int first_dev, last_dev; | |
1516ef44 | 3121 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3122 | struct qla_hw_data *ha = vha->hw; |
3123 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3124 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3125 | |
3126 | rval = QLA_SUCCESS; | |
3127 | ||
3128 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 3129 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 3130 | if (!swl) { |
1da177e4 LT |
3131 | /*EMPTY*/ |
3132 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 3133 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 3134 | } else { |
e315cd28 | 3135 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3136 | kfree(swl); |
3137 | swl = NULL; | |
e315cd28 | 3138 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3139 | kfree(swl); |
3140 | swl = NULL; | |
e315cd28 | 3141 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3142 | kfree(swl); |
3143 | swl = NULL; | |
e5896bd5 | 3144 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3145 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3146 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3147 | } |
e8c72ba5 CD |
3148 | |
3149 | /* If other queries succeeded probe for FC-4 type */ | |
3150 | if (swl) | |
3151 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3152 | } |
3153 | swl_idx = 0; | |
3154 | ||
3155 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3156 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3157 | if (new_fcport == NULL) { |
c9475cb0 | 3158 | kfree(swl); |
1da177e4 LT |
3159 | return (QLA_MEMORY_ALLOC_FAILED); |
3160 | } | |
3161 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3162 | /* Set start port ID scan at adapter ID. */ |
3163 | first_dev = 1; | |
3164 | last_dev = 0; | |
3165 | ||
3166 | /* Starting free loop ID. */ | |
e315cd28 AC |
3167 | loop_id = ha->min_external_loopid; |
3168 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3169 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3170 | continue; |
3171 | ||
3a6478df GM |
3172 | if (ha->current_topology == ISP_CFG_FL && |
3173 | (atomic_read(&vha->loop_down_timer) || | |
3174 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3175 | atomic_set(&vha->loop_down_timer, 0); |
3176 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3177 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3178 | break; |
bb2d52b2 | 3179 | } |
1da177e4 LT |
3180 | |
3181 | if (swl != NULL) { | |
3182 | if (last_dev) { | |
3183 | wrap.b24 = new_fcport->d_id.b24; | |
3184 | } else { | |
3185 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3186 | memcpy(new_fcport->node_name, | |
3187 | swl[swl_idx].node_name, WWN_SIZE); | |
3188 | memcpy(new_fcport->port_name, | |
3189 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3190 | memcpy(new_fcport->fabric_port_name, |
3191 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3192 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3193 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3194 | |
3195 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3196 | last_dev = 1; | |
3197 | } | |
3198 | swl_idx++; | |
3199 | } | |
3200 | } else { | |
3201 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3202 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
3203 | if (rval != QLA_SUCCESS) { |
3204 | qla_printk(KERN_WARNING, ha, | |
3205 | "SNS scan failed -- assuming zero-entry " | |
3206 | "result...\n"); | |
3207 | list_for_each_entry_safe(fcport, fcptemp, | |
3208 | new_fcports, list) { | |
3209 | list_del(&fcport->list); | |
3210 | kfree(fcport); | |
3211 | } | |
3212 | rval = QLA_SUCCESS; | |
3213 | break; | |
3214 | } | |
3215 | } | |
3216 | ||
3217 | /* If wrap on switch device list, exit. */ | |
3218 | if (first_dev) { | |
3219 | wrap.b24 = new_fcport->d_id.b24; | |
3220 | first_dev = 0; | |
3221 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
3222 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 3223 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
3224 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
3225 | break; | |
3226 | } | |
3227 | ||
2c3dfe3f | 3228 | /* Bypass if same physical adapter. */ |
e315cd28 | 3229 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3230 | continue; |
3231 | ||
2c3dfe3f | 3232 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3233 | found = 0; |
3234 | if (ha->num_vhosts) { | |
feafb7b1 AE |
3235 | unsigned long flags; |
3236 | ||
3237 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3238 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3239 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3240 | found = 1; | |
2c3dfe3f | 3241 | break; |
e315cd28 | 3242 | } |
2c3dfe3f | 3243 | } |
feafb7b1 AE |
3244 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3245 | ||
e315cd28 | 3246 | if (found) |
2c3dfe3f SJ |
3247 | continue; |
3248 | } | |
3249 | ||
f7d289f6 AV |
3250 | /* Bypass if same domain and area of adapter. */ |
3251 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3252 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3253 | ISP_CFG_FL) |
3254 | continue; | |
3255 | ||
1da177e4 LT |
3256 | /* Bypass reserved domain fields. */ |
3257 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3258 | continue; | |
3259 | ||
e8c72ba5 CD |
3260 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
3261 | if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3262 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN) | |
3263 | continue; | |
3264 | ||
1da177e4 LT |
3265 | /* Locate matching device in database. */ |
3266 | found = 0; | |
e315cd28 | 3267 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3268 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3269 | WWN_SIZE)) | |
3270 | continue; | |
3271 | ||
3272 | found++; | |
3273 | ||
d8b45213 AV |
3274 | /* Update port state. */ |
3275 | memcpy(fcport->fabric_port_name, | |
3276 | new_fcport->fabric_port_name, WWN_SIZE); | |
3277 | fcport->fp_speed = new_fcport->fp_speed; | |
3278 | ||
1da177e4 LT |
3279 | /* |
3280 | * If address the same and state FCS_ONLINE, nothing | |
3281 | * changed. | |
3282 | */ | |
3283 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3284 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3285 | break; | |
3286 | } | |
3287 | ||
3288 | /* | |
3289 | * If device was not a fabric device before. | |
3290 | */ | |
3291 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3292 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3293 | fcport->loop_id = FC_NO_LOOP_ID; | |
3294 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3295 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3296 | break; |
3297 | } | |
3298 | ||
3299 | /* | |
3300 | * Port ID changed or device was marked to be updated; | |
3301 | * Log it out if still logged in and mark it for | |
3302 | * relogin later. | |
3303 | */ | |
3304 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3305 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3306 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3307 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3308 | fcport->port_type != FCT_INITIATOR && |
3309 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3310 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3311 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3312 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3313 | fcport->loop_id = FC_NO_LOOP_ID; |
3314 | } | |
3315 | ||
3316 | break; | |
3317 | } | |
3318 | ||
3319 | if (found) | |
3320 | continue; | |
1da177e4 LT |
3321 | /* If device was not in our fcports list, then add it. */ |
3322 | list_add_tail(&new_fcport->list, new_fcports); | |
3323 | ||
3324 | /* Allocate a new replacement fcport. */ | |
3325 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3326 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3327 | if (new_fcport == NULL) { |
c9475cb0 | 3328 | kfree(swl); |
1da177e4 LT |
3329 | return (QLA_MEMORY_ALLOC_FAILED); |
3330 | } | |
3331 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3332 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3333 | } | |
3334 | ||
c9475cb0 JJ |
3335 | kfree(swl); |
3336 | kfree(new_fcport); | |
1da177e4 | 3337 | |
1da177e4 LT |
3338 | return (rval); |
3339 | } | |
3340 | ||
3341 | /* | |
3342 | * qla2x00_find_new_loop_id | |
3343 | * Scan through our port list and find a new usable loop ID. | |
3344 | * | |
3345 | * Input: | |
3346 | * ha: adapter state pointer. | |
3347 | * dev: port structure pointer. | |
3348 | * | |
3349 | * Returns: | |
3350 | * qla2x00 local function return status code. | |
3351 | * | |
3352 | * Context: | |
3353 | * Kernel context. | |
3354 | */ | |
413975a0 | 3355 | static int |
e315cd28 | 3356 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3357 | { |
3358 | int rval; | |
3359 | int found; | |
3360 | fc_port_t *fcport; | |
3361 | uint16_t first_loop_id; | |
e315cd28 AC |
3362 | struct qla_hw_data *ha = vha->hw; |
3363 | struct scsi_qla_host *vp; | |
ee546b6e | 3364 | struct scsi_qla_host *tvp; |
feafb7b1 | 3365 | unsigned long flags = 0; |
1da177e4 LT |
3366 | |
3367 | rval = QLA_SUCCESS; | |
3368 | ||
3369 | /* Save starting loop ID. */ | |
3370 | first_loop_id = dev->loop_id; | |
3371 | ||
3372 | for (;;) { | |
3373 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3374 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3375 | dev->loop_id++; |
1da177e4 LT |
3376 | |
3377 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3378 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3379 | dev->loop_id++; |
1da177e4 LT |
3380 | |
3381 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3382 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3383 | /* first loop ID. */ |
3384 | dev->loop_id = ha->min_external_loopid; | |
3385 | } | |
3386 | ||
3387 | /* Check for loop ID being already in use. */ | |
3388 | found = 0; | |
3389 | fcport = NULL; | |
feafb7b1 AE |
3390 | |
3391 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3392 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3393 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3394 | if (fcport->loop_id == dev->loop_id && | |
3395 | fcport != dev) { | |
3396 | /* ID possibly in use */ | |
3397 | found++; | |
3398 | break; | |
3399 | } | |
1da177e4 | 3400 | } |
e315cd28 AC |
3401 | if (found) |
3402 | break; | |
1da177e4 | 3403 | } |
feafb7b1 | 3404 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 LT |
3405 | |
3406 | /* If not in use then it is free to use. */ | |
3407 | if (!found) { | |
3408 | break; | |
3409 | } | |
3410 | ||
3411 | /* ID in use. Try next value. */ | |
3412 | dev->loop_id++; | |
3413 | ||
3414 | /* If wrap around. No free ID to use. */ | |
3415 | if (dev->loop_id == first_loop_id) { | |
3416 | dev->loop_id = FC_NO_LOOP_ID; | |
3417 | rval = QLA_FUNCTION_FAILED; | |
3418 | break; | |
3419 | } | |
3420 | } | |
3421 | ||
3422 | return (rval); | |
3423 | } | |
3424 | ||
3425 | /* | |
3426 | * qla2x00_device_resync | |
3427 | * Marks devices in the database that needs resynchronization. | |
3428 | * | |
3429 | * Input: | |
3430 | * ha = adapter block pointer. | |
3431 | * | |
3432 | * Context: | |
3433 | * Kernel context. | |
3434 | */ | |
3435 | static int | |
e315cd28 | 3436 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
3437 | { |
3438 | int rval; | |
1da177e4 LT |
3439 | uint32_t mask; |
3440 | fc_port_t *fcport; | |
3441 | uint32_t rscn_entry; | |
3442 | uint8_t rscn_out_iter; | |
3443 | uint8_t format; | |
1516ef44 | 3444 | port_id_t d_id = {}; |
1da177e4 LT |
3445 | |
3446 | rval = QLA_RSCNS_HANDLED; | |
3447 | ||
e315cd28 AC |
3448 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
3449 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 3450 | |
e315cd28 | 3451 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
3452 | format = MSB(MSW(rscn_entry)); |
3453 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
3454 | d_id.b.area = MSB(LSW(rscn_entry)); | |
3455 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
3456 | ||
3457 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
3458 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 3459 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
3460 | d_id.b.area, d_id.b.al_pa)); |
3461 | ||
e315cd28 AC |
3462 | vha->rscn_out_ptr++; |
3463 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
3464 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
3465 | |
3466 | /* Skip duplicate entries. */ | |
e315cd28 AC |
3467 | for (rscn_out_iter = vha->rscn_out_ptr; |
3468 | !vha->flags.rscn_queue_overflow && | |
3469 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
3470 | rscn_out_iter = (rscn_out_iter == |
3471 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
3472 | ||
e315cd28 | 3473 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
3474 | break; |
3475 | ||
3476 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 3477 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
3478 | rscn_out_iter)); |
3479 | ||
e315cd28 | 3480 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
3481 | } |
3482 | ||
3483 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 3484 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 3485 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 3486 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
3487 | |
3488 | format = 3; | |
e315cd28 | 3489 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
3490 | } |
3491 | ||
3492 | switch (format) { | |
3493 | case 0: | |
1da177e4 LT |
3494 | mask = 0xffffff; |
3495 | break; | |
3496 | case 1: | |
3497 | mask = 0xffff00; | |
3498 | break; | |
3499 | case 2: | |
3500 | mask = 0xff0000; | |
3501 | break; | |
3502 | default: | |
3503 | mask = 0x0; | |
3504 | d_id.b24 = 0; | |
e315cd28 | 3505 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
3506 | break; |
3507 | } | |
3508 | ||
3509 | rval = QLA_SUCCESS; | |
3510 | ||
e315cd28 | 3511 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3512 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
3513 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
3514 | fcport->port_type == FCT_BROADCAST) | |
3515 | continue; | |
3516 | ||
3517 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
3518 | if (format != 3 || | |
3519 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 3520 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3521 | 0, 0); |
1da177e4 LT |
3522 | } |
3523 | } | |
1da177e4 LT |
3524 | } |
3525 | } | |
3526 | return (rval); | |
3527 | } | |
3528 | ||
3529 | /* | |
3530 | * qla2x00_fabric_dev_login | |
3531 | * Login fabric target device and update FC port database. | |
3532 | * | |
3533 | * Input: | |
3534 | * ha: adapter state pointer. | |
3535 | * fcport: port structure list pointer. | |
3536 | * next_loopid: contains value of a new loop ID that can be used | |
3537 | * by the next login attempt. | |
3538 | * | |
3539 | * Returns: | |
3540 | * qla2x00 local function return status code. | |
3541 | * | |
3542 | * Context: | |
3543 | * Kernel context. | |
3544 | */ | |
3545 | static int | |
e315cd28 | 3546 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3547 | uint16_t *next_loopid) |
3548 | { | |
3549 | int rval; | |
3550 | int retry; | |
0107109e | 3551 | uint8_t opts; |
e315cd28 | 3552 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3553 | |
3554 | rval = QLA_SUCCESS; | |
3555 | retry = 0; | |
3556 | ||
ac280b67 | 3557 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3558 | if (fcport->flags & FCF_ASYNC_SENT) |
3559 | return rval; | |
3560 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3561 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3562 | if (!rval) | |
3563 | return rval; | |
3564 | } | |
3565 | ||
5ff1d584 | 3566 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3567 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3568 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3569 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3570 | opts = 0; |
f08b7251 | 3571 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3572 | opts |= BIT_1; |
e315cd28 | 3573 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3574 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3575 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3576 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3577 | fcport->d_id.b.al_pa); | |
e315cd28 | 3578 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3579 | } else { |
e315cd28 | 3580 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3581 | } |
3582 | } | |
3583 | ||
3584 | return (rval); | |
3585 | } | |
3586 | ||
3587 | /* | |
3588 | * qla2x00_fabric_login | |
3589 | * Issue fabric login command. | |
3590 | * | |
3591 | * Input: | |
3592 | * ha = adapter block pointer. | |
3593 | * device = pointer to FC device type structure. | |
3594 | * | |
3595 | * Returns: | |
3596 | * 0 - Login successfully | |
3597 | * 1 - Login failed | |
3598 | * 2 - Initiator device | |
3599 | * 3 - Fatal error | |
3600 | */ | |
3601 | int | |
e315cd28 | 3602 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3603 | uint16_t *next_loopid) |
3604 | { | |
3605 | int rval; | |
3606 | int retry; | |
3607 | uint16_t tmp_loopid; | |
3608 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3609 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3610 | |
3611 | retry = 0; | |
3612 | tmp_loopid = 0; | |
3613 | ||
3614 | for (;;) { | |
3615 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3616 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3617 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3618 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3619 | ||
3620 | /* Login fcport on switch. */ | |
e315cd28 | 3621 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3622 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3623 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3624 | if (mb[0] == MBS_PORT_ID_USED) { | |
3625 | /* | |
3626 | * Device has another loop ID. The firmware team | |
0107109e AV |
3627 | * recommends the driver perform an implicit login with |
3628 | * the specified ID again. The ID we just used is save | |
3629 | * here so we return with an ID that can be tried by | |
3630 | * the next login. | |
1da177e4 LT |
3631 | */ |
3632 | retry++; | |
3633 | tmp_loopid = fcport->loop_id; | |
3634 | fcport->loop_id = mb[1]; | |
3635 | ||
3636 | DEBUG(printk("Fabric Login: port in use - next " | |
3637 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3638 | fcport->loop_id, fcport->d_id.b.domain, | |
3639 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3640 | ||
3641 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3642 | /* | |
3643 | * Login succeeded. | |
3644 | */ | |
3645 | if (retry) { | |
3646 | /* A retry occurred before. */ | |
3647 | *next_loopid = tmp_loopid; | |
3648 | } else { | |
3649 | /* | |
3650 | * No retry occurred before. Just increment the | |
3651 | * ID value for next login. | |
3652 | */ | |
3653 | *next_loopid = (fcport->loop_id + 1); | |
3654 | } | |
3655 | ||
3656 | if (mb[1] & BIT_0) { | |
3657 | fcport->port_type = FCT_INITIATOR; | |
3658 | } else { | |
3659 | fcport->port_type = FCT_TARGET; | |
3660 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3661 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3662 | } |
3663 | } | |
3664 | ||
ad3e0eda AV |
3665 | if (mb[10] & BIT_0) |
3666 | fcport->supported_classes |= FC_COS_CLASS2; | |
3667 | if (mb[10] & BIT_1) | |
3668 | fcport->supported_classes |= FC_COS_CLASS3; | |
3669 | ||
1da177e4 LT |
3670 | rval = QLA_SUCCESS; |
3671 | break; | |
3672 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3673 | /* | |
3674 | * Loop ID already used, try next loop ID. | |
3675 | */ | |
3676 | fcport->loop_id++; | |
e315cd28 | 3677 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3678 | if (rval != QLA_SUCCESS) { |
3679 | /* Ran out of loop IDs to use */ | |
3680 | break; | |
3681 | } | |
3682 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3683 | /* | |
3684 | * Firmware possibly timed out during login. If NO | |
3685 | * retries are left to do then the device is declared | |
3686 | * dead. | |
3687 | */ | |
3688 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3689 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3690 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3691 | fcport->d_id.b.al_pa); | |
e315cd28 | 3692 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3693 | |
3694 | rval = 1; | |
3695 | break; | |
3696 | } else { | |
3697 | /* | |
3698 | * unrecoverable / not handled error | |
3699 | */ | |
3700 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3701 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3702 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3703 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3704 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3705 | ||
3706 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3707 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3708 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3709 | fcport->d_id.b.al_pa); | |
1da177e4 | 3710 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3711 | fcport->login_retry = 0; |
1da177e4 LT |
3712 | |
3713 | rval = 3; | |
3714 | break; | |
3715 | } | |
3716 | } | |
3717 | ||
3718 | return (rval); | |
3719 | } | |
3720 | ||
3721 | /* | |
3722 | * qla2x00_local_device_login | |
3723 | * Issue local device login command. | |
3724 | * | |
3725 | * Input: | |
3726 | * ha = adapter block pointer. | |
3727 | * loop_id = loop id of device to login to. | |
3728 | * | |
3729 | * Returns (Where's the #define!!!!): | |
3730 | * 0 - Login successfully | |
3731 | * 1 - Login failed | |
3732 | * 3 - Fatal error | |
3733 | */ | |
3734 | int | |
e315cd28 | 3735 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3736 | { |
3737 | int rval; | |
3738 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3739 | ||
3740 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3741 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3742 | if (rval == QLA_SUCCESS) { |
3743 | /* Interrogate mailbox registers for any errors */ | |
3744 | if (mb[0] == MBS_COMMAND_ERROR) | |
3745 | rval = 1; | |
3746 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3747 | /* device not in PCB table */ | |
3748 | rval = 3; | |
3749 | } | |
3750 | ||
3751 | return (rval); | |
3752 | } | |
3753 | ||
3754 | /* | |
3755 | * qla2x00_loop_resync | |
3756 | * Resync with fibre channel devices. | |
3757 | * | |
3758 | * Input: | |
3759 | * ha = adapter block pointer. | |
3760 | * | |
3761 | * Returns: | |
3762 | * 0 = success | |
3763 | */ | |
3764 | int | |
e315cd28 | 3765 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3766 | { |
73208dfd | 3767 | int rval = QLA_SUCCESS; |
1da177e4 | 3768 | uint32_t wait_time; |
67c2e93a AC |
3769 | struct req_que *req; |
3770 | struct rsp_que *rsp; | |
3771 | ||
7163ea81 | 3772 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3773 | req = vha->hw->req_q_map[0]; |
3774 | else | |
3775 | req = vha->req; | |
3776 | rsp = req->rsp; | |
1da177e4 | 3777 | |
e315cd28 AC |
3778 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3779 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3780 | if (vha->flags.online) { | |
3781 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3782 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3783 | wait_time = 256; | |
3784 | do { | |
e315cd28 | 3785 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3786 | |
0107109e | 3787 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3788 | qla2x00_marker(vha, req, rsp, 0, 0, |
3789 | MK_SYNC_ALL); | |
e315cd28 | 3790 | vha->marker_needed = 0; |
1da177e4 LT |
3791 | |
3792 | /* Remap devices on Loop. */ | |
e315cd28 | 3793 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3794 | |
e315cd28 | 3795 | qla2x00_configure_loop(vha); |
1da177e4 | 3796 | wait_time--; |
e315cd28 AC |
3797 | } while (!atomic_read(&vha->loop_down_timer) && |
3798 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3799 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3800 | &vha->dpc_flags))); | |
1da177e4 | 3801 | } |
1da177e4 LT |
3802 | } |
3803 | ||
e315cd28 | 3804 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3805 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3806 | |
e315cd28 | 3807 | if (rval) |
1da177e4 | 3808 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3809 | |
3810 | return (rval); | |
3811 | } | |
3812 | ||
d97994dc | 3813 | void |
67becc00 | 3814 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc AV |
3815 | { |
3816 | fc_port_t *fcport; | |
feafb7b1 AE |
3817 | struct scsi_qla_host *vha; |
3818 | struct qla_hw_data *ha = base_vha->hw; | |
3819 | unsigned long flags; | |
d97994dc | 3820 | |
feafb7b1 | 3821 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 3822 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
3823 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
3824 | atomic_inc(&vha->vref_count); | |
3825 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
67becc00 | 3826 | if (fcport && fcport->drport && |
feafb7b1 AE |
3827 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
3828 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3829 | ||
67becc00 | 3830 | qla2x00_rport_del(fcport); |
feafb7b1 AE |
3831 | |
3832 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3833 | } | |
3834 | } | |
3835 | atomic_dec(&vha->vref_count); | |
3836 | } | |
3837 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc AV |
3838 | } |
3839 | ||
a9083016 GM |
3840 | void |
3841 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3842 | { | |
3843 | struct qla_hw_data *ha = vha->hw; | |
3844 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
feafb7b1 | 3845 | unsigned long flags; |
a9083016 GM |
3846 | |
3847 | vha->flags.online = 0; | |
3848 | ha->flags.chip_reset_done = 0; | |
3849 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
3850 | ha->qla_stats.total_isp_aborts++; | |
3851 | ||
3852 | qla_printk(KERN_INFO, ha, | |
3853 | "Performing ISP error recovery - ha= %p.\n", ha); | |
3854 | ||
3855 | /* Chip reset does not apply to 82XX */ | |
3856 | if (!IS_QLA82XX(ha)) | |
3857 | ha->isp_ops->reset_chip(vha); | |
3858 | ||
3859 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3860 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3861 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3862 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
3863 | |
3864 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3865 | list_for_each_entry(vp, &base_vha->hw->vp_list, list) { | |
3866 | atomic_inc(&vp->vref_count); | |
3867 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3868 | ||
a9083016 | 3869 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
3870 | |
3871 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3872 | atomic_dec(&vp->vref_count); | |
3873 | } | |
3874 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
3875 | } else { |
3876 | if (!atomic_read(&vha->loop_down_timer)) | |
3877 | atomic_set(&vha->loop_down_timer, | |
3878 | LOOP_DOWN_TIME); | |
3879 | } | |
3880 | ||
3881 | /* Make sure for ISP 82XX IO DMA is complete */ | |
4d78c973 GM |
3882 | if (IS_QLA82XX(ha)) { |
3883 | if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, | |
3884 | WAIT_HOST) == QLA_SUCCESS) { | |
3885 | DEBUG2(qla_printk(KERN_INFO, ha, | |
3886 | "Done wait for pending commands\n")); | |
3887 | } | |
3888 | } | |
a9083016 GM |
3889 | |
3890 | /* Requeue all commands in outstanding command list. */ | |
3891 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
3892 | } | |
3893 | ||
1da177e4 LT |
3894 | /* |
3895 | * qla2x00_abort_isp | |
3896 | * Resets ISP and aborts all outstanding commands. | |
3897 | * | |
3898 | * Input: | |
3899 | * ha = adapter block pointer. | |
3900 | * | |
3901 | * Returns: | |
3902 | * 0 = success | |
3903 | */ | |
3904 | int | |
e315cd28 | 3905 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3906 | { |
476e8978 | 3907 | int rval; |
1da177e4 | 3908 | uint8_t status = 0; |
e315cd28 AC |
3909 | struct qla_hw_data *ha = vha->hw; |
3910 | struct scsi_qla_host *vp; | |
73208dfd | 3911 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 3912 | unsigned long flags; |
1da177e4 | 3913 | |
e315cd28 | 3914 | if (vha->flags.online) { |
a9083016 | 3915 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 3916 | |
85880801 AV |
3917 | if (unlikely(pci_channel_offline(ha->pdev) && |
3918 | ha->flags.pci_channel_io_perm_failure)) { | |
3919 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3920 | status = 0; | |
3921 | return status; | |
3922 | } | |
3923 | ||
73208dfd | 3924 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3925 | |
e315cd28 | 3926 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3927 | |
e315cd28 AC |
3928 | if (!qla2x00_restart_isp(vha)) { |
3929 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3930 | |
e315cd28 | 3931 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3932 | /* |
3933 | * Issue marker command only when we are going | |
3934 | * to start the I/O . | |
3935 | */ | |
e315cd28 | 3936 | vha->marker_needed = 1; |
1da177e4 LT |
3937 | } |
3938 | ||
e315cd28 | 3939 | vha->flags.online = 1; |
1da177e4 | 3940 | |
fd34f556 | 3941 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3942 | |
fa2a1ce5 | 3943 | ha->isp_abort_cnt = 0; |
e315cd28 | 3944 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3945 | |
29c5397f LC |
3946 | if (IS_QLA81XX(ha)) |
3947 | qla2x00_get_fw_version(vha, | |
3948 | &ha->fw_major_version, | |
3949 | &ha->fw_minor_version, | |
3950 | &ha->fw_subminor_version, | |
3951 | &ha->fw_attributes, &ha->fw_memory_size, | |
3952 | ha->mpi_version, &ha->mpi_capabilities, | |
3953 | ha->phy_version); | |
3954 | ||
df613b96 AV |
3955 | if (ha->fce) { |
3956 | ha->flags.fce_enabled = 1; | |
3957 | memset(ha->fce, 0, | |
3958 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3959 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3960 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3961 | &ha->fce_bufs); | |
3962 | if (rval) { | |
3963 | qla_printk(KERN_WARNING, ha, | |
3964 | "Unable to reinitialize FCE " | |
3965 | "(%d).\n", rval); | |
3966 | ha->flags.fce_enabled = 0; | |
3967 | } | |
3968 | } | |
436a7b11 AV |
3969 | |
3970 | if (ha->eft) { | |
3971 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3972 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3973 | ha->eft_dma, EFT_NUM_BUFFERS); |
3974 | if (rval) { | |
3975 | qla_printk(KERN_WARNING, ha, | |
3976 | "Unable to reinitialize EFT " | |
3977 | "(%d).\n", rval); | |
3978 | } | |
3979 | } | |
1da177e4 | 3980 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3981 | vha->flags.online = 1; |
3982 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3983 | if (ha->isp_abort_cnt == 0) { |
3984 | qla_printk(KERN_WARNING, ha, | |
3985 | "ISP error recovery failed - " | |
3986 | "board disabled\n"); | |
fa2a1ce5 | 3987 | /* |
1da177e4 LT |
3988 | * The next call disables the board |
3989 | * completely. | |
3990 | */ | |
e315cd28 AC |
3991 | ha->isp_ops->reset_adapter(vha); |
3992 | vha->flags.online = 0; | |
1da177e4 | 3993 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3994 | &vha->dpc_flags); |
1da177e4 LT |
3995 | status = 0; |
3996 | } else { /* schedule another ISP abort */ | |
3997 | ha->isp_abort_cnt--; | |
3998 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3999 | "retry remaining %d\n", |
e315cd28 | 4000 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
4001 | status = 1; |
4002 | } | |
4003 | } else { | |
4004 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
4005 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
4006 | "- retrying (%d) more times\n", | |
e315cd28 AC |
4007 | vha->host_no, ha->isp_abort_cnt)); |
4008 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
4009 | status = 1; |
4010 | } | |
4011 | } | |
fa2a1ce5 | 4012 | |
1da177e4 LT |
4013 | } |
4014 | ||
e315cd28 AC |
4015 | if (!status) { |
4016 | DEBUG(printk(KERN_INFO | |
4017 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
4018 | vha->host_no)); | |
feafb7b1 AE |
4019 | |
4020 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4021 | list_for_each_entry(vp, &ha->vp_list, list) { | |
4022 | if (vp->vp_idx) { | |
4023 | atomic_inc(&vp->vref_count); | |
4024 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4025 | ||
e315cd28 | 4026 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
4027 | |
4028 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4029 | atomic_dec(&vp->vref_count); | |
4030 | } | |
e315cd28 | 4031 | } |
feafb7b1 AE |
4032 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
4033 | ||
e315cd28 | 4034 | } else { |
1da177e4 LT |
4035 | qla_printk(KERN_INFO, ha, |
4036 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
4037 | } |
4038 | ||
4039 | return(status); | |
4040 | } | |
4041 | ||
4042 | /* | |
4043 | * qla2x00_restart_isp | |
4044 | * restarts the ISP after a reset | |
4045 | * | |
4046 | * Input: | |
4047 | * ha = adapter block pointer. | |
4048 | * | |
4049 | * Returns: | |
4050 | * 0 = success | |
4051 | */ | |
4052 | static int | |
e315cd28 | 4053 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4054 | { |
c6b2fca8 | 4055 | int status = 0; |
1da177e4 | 4056 | uint32_t wait_time; |
e315cd28 | 4057 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4058 | struct req_que *req = ha->req_q_map[0]; |
4059 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
4060 | |
4061 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4062 | if (qla2x00_isp_firmware(vha)) { |
4063 | vha->flags.online = 0; | |
4064 | status = ha->isp_ops->chip_diag(vha); | |
4065 | if (!status) | |
4066 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4067 | } |
4068 | ||
e315cd28 AC |
4069 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4070 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4071 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4072 | /* Initialize the queues in use */ |
4073 | qla25xx_init_queues(ha); | |
4074 | ||
e315cd28 AC |
4075 | status = qla2x00_fw_ready(vha); |
4076 | if (!status) { | |
1da177e4 | 4077 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 4078 | "status = %d\n", __func__, status)); |
0107109e AV |
4079 | |
4080 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4081 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4082 | |
e315cd28 | 4083 | vha->flags.online = 1; |
1da177e4 LT |
4084 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4085 | wait_time = 256; | |
4086 | do { | |
e315cd28 AC |
4087 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4088 | qla2x00_configure_loop(vha); | |
1da177e4 | 4089 | wait_time--; |
e315cd28 AC |
4090 | } while (!atomic_read(&vha->loop_down_timer) && |
4091 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4092 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4093 | &vha->dpc_flags))); | |
1da177e4 LT |
4094 | } |
4095 | ||
4096 | /* if no cable then assume it's good */ | |
e315cd28 | 4097 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4098 | status = 0; |
4099 | ||
4100 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
4101 | __func__, | |
744f11fd | 4102 | status)); |
1da177e4 LT |
4103 | } |
4104 | return (status); | |
4105 | } | |
4106 | ||
73208dfd AC |
4107 | static int |
4108 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4109 | { | |
4110 | struct rsp_que *rsp = NULL; | |
4111 | struct req_que *req = NULL; | |
4112 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4113 | int ret = -1; | |
4114 | int i; | |
4115 | ||
2afa19a9 | 4116 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4117 | rsp = ha->rsp_q_map[i]; |
4118 | if (rsp) { | |
4119 | rsp->options &= ~BIT_0; | |
618a7523 | 4120 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
4121 | if (ret != QLA_SUCCESS) |
4122 | DEBUG2_17(printk(KERN_WARNING | |
4123 | "%s Rsp que:%d init failed\n", __func__, | |
4124 | rsp->id)); | |
4125 | else | |
4126 | DEBUG2_17(printk(KERN_INFO | |
4127 | "%s Rsp que:%d inited\n", __func__, | |
4128 | rsp->id)); | |
4129 | } | |
2afa19a9 AC |
4130 | } |
4131 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4132 | req = ha->req_q_map[i]; |
4133 | if (req) { | |
29bdccbe | 4134 | /* Clear outstanding commands array. */ |
73208dfd | 4135 | req->options &= ~BIT_0; |
618a7523 | 4136 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
4137 | if (ret != QLA_SUCCESS) |
4138 | DEBUG2_17(printk(KERN_WARNING | |
4139 | "%s Req que:%d init failed\n", __func__, | |
4140 | req->id)); | |
4141 | else | |
4142 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 4143 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
4144 | req->id)); |
4145 | } | |
4146 | } | |
4147 | return ret; | |
4148 | } | |
4149 | ||
1da177e4 LT |
4150 | /* |
4151 | * qla2x00_reset_adapter | |
4152 | * Reset adapter. | |
4153 | * | |
4154 | * Input: | |
4155 | * ha = adapter block pointer. | |
4156 | */ | |
abbd8870 | 4157 | void |
e315cd28 | 4158 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4159 | { |
4160 | unsigned long flags = 0; | |
e315cd28 | 4161 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4162 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4163 | |
e315cd28 | 4164 | vha->flags.online = 0; |
fd34f556 | 4165 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4166 | |
1da177e4 LT |
4167 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4168 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4169 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4170 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4171 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4172 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4173 | } | |
0107109e AV |
4174 | |
4175 | void | |
e315cd28 | 4176 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4177 | { |
4178 | unsigned long flags = 0; | |
e315cd28 | 4179 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4180 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4181 | ||
a9083016 GM |
4182 | if (IS_QLA82XX(ha)) |
4183 | return; | |
4184 | ||
e315cd28 | 4185 | vha->flags.online = 0; |
fd34f556 | 4186 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4187 | |
4188 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4189 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4190 | RD_REG_DWORD(®->hccr); | |
4191 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4192 | RD_REG_DWORD(®->hccr); | |
4193 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4194 | |
4195 | if (IS_NOPOLLING_TYPE(ha)) | |
4196 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4197 | } |
4198 | ||
4e08df3f DM |
4199 | /* On sparc systems, obtain port and node WWN from firmware |
4200 | * properties. | |
4201 | */ | |
e315cd28 AC |
4202 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4203 | struct nvram_24xx *nv) | |
4e08df3f DM |
4204 | { |
4205 | #ifdef CONFIG_SPARC | |
e315cd28 | 4206 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4207 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4208 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4209 | const u8 *val; | |
4e08df3f DM |
4210 | int len; |
4211 | ||
4212 | val = of_get_property(dp, "port-wwn", &len); | |
4213 | if (val && len >= WWN_SIZE) | |
4214 | memcpy(nv->port_name, val, WWN_SIZE); | |
4215 | ||
4216 | val = of_get_property(dp, "node-wwn", &len); | |
4217 | if (val && len >= WWN_SIZE) | |
4218 | memcpy(nv->node_name, val, WWN_SIZE); | |
4219 | #endif | |
4220 | } | |
4221 | ||
0107109e | 4222 | int |
e315cd28 | 4223 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4224 | { |
4e08df3f | 4225 | int rval; |
0107109e AV |
4226 | struct init_cb_24xx *icb; |
4227 | struct nvram_24xx *nv; | |
4228 | uint32_t *dptr; | |
4229 | uint8_t *dptr1, *dptr2; | |
4230 | uint32_t chksum; | |
4231 | uint16_t cnt; | |
e315cd28 | 4232 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4233 | |
4e08df3f | 4234 | rval = QLA_SUCCESS; |
0107109e | 4235 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4236 | nv = ha->nvram; |
0107109e AV |
4237 | |
4238 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4239 | if (ha->flags.port0) { |
4240 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4241 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4242 | } else { | |
0107109e | 4243 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 AV |
4244 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4245 | } | |
e5b68a61 AC |
4246 | ha->nvram_size = sizeof(struct nvram_24xx); |
4247 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4248 | if (IS_QLA82XX(ha)) |
4249 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4250 | |
281afe19 SJ |
4251 | /* Get VPD data into cache */ |
4252 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4253 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4254 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4255 | ||
4256 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4257 | dptr = (uint32_t *)nv; |
e315cd28 | 4258 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4259 | ha->nvram_size); |
4260 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4261 | chksum += le32_to_cpu(*dptr++); | |
4262 | ||
7640335e | 4263 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 4264 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
4265 | |
4266 | /* Bad NVRAM data, set defaults parameters. */ | |
4267 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4268 | || nv->id[3] != ' ' || | |
4269 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4270 | /* Reset NVRAM data. */ | |
4271 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4272 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4273 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
4274 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
4275 | "invalid -- WWPN) defaults.\n"); | |
4276 | ||
4277 | /* | |
4278 | * Set default initialization control block. | |
4279 | */ | |
4280 | memset(nv, 0, ha->nvram_size); | |
4281 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4282 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4283 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4284 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4285 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4286 | nv->hard_address = __constant_cpu_to_le16(124); | |
4287 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4288 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4289 | nv->port_name[2] = 0x00; |
4290 | nv->port_name[3] = 0xe0; | |
4291 | nv->port_name[4] = 0x8b; | |
4292 | nv->port_name[5] = 0x1c; | |
4293 | nv->port_name[6] = 0x55; | |
4294 | nv->port_name[7] = 0x86; | |
4295 | nv->node_name[0] = 0x20; | |
4296 | nv->node_name[1] = 0x00; | |
4297 | nv->node_name[2] = 0x00; | |
4298 | nv->node_name[3] = 0xe0; | |
4299 | nv->node_name[4] = 0x8b; | |
4300 | nv->node_name[5] = 0x1c; | |
4301 | nv->node_name[6] = 0x55; | |
4302 | nv->node_name[7] = 0x86; | |
e315cd28 | 4303 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4304 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4305 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4306 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4307 | nv->firmware_options_1 = | |
4308 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4309 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4310 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4311 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4312 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4313 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4314 | nv->reset_delay = 5; | |
4315 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4316 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4317 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4318 | ||
4319 | rval = 1; | |
0107109e AV |
4320 | } |
4321 | ||
4322 | /* Reset Initialization control block */ | |
e315cd28 | 4323 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4324 | |
4325 | /* Copy 1st segment. */ | |
4326 | dptr1 = (uint8_t *)icb; | |
4327 | dptr2 = (uint8_t *)&nv->version; | |
4328 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4329 | while (cnt--) | |
4330 | *dptr1++ = *dptr2++; | |
4331 | ||
4332 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4333 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4334 | |
4335 | /* Copy 2nd segment. */ | |
4336 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4337 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4338 | cnt = (uint8_t *)&icb->reserved_3 - | |
4339 | (uint8_t *)&icb->interrupt_delay_timer; | |
4340 | while (cnt--) | |
4341 | *dptr1++ = *dptr2++; | |
4342 | ||
4343 | /* | |
4344 | * Setup driver NVRAM options. | |
4345 | */ | |
e315cd28 | 4346 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4347 | "QLA2462"); |
0107109e | 4348 | |
5341e868 AV |
4349 | /* Use alternate WWN? */ |
4350 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4351 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4352 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4353 | } | |
4354 | ||
0107109e | 4355 | /* Prepare nodename */ |
fd0e7e4d | 4356 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4357 | /* |
4358 | * Firmware will apply the following mask if the nodename was | |
4359 | * not provided. | |
4360 | */ | |
4361 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4362 | icb->node_name[0] &= 0xF0; | |
4363 | } | |
4364 | ||
4365 | /* Set host adapter parameters. */ | |
4366 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4367 | ha->flags.enable_lip_reset = 0; |
4368 | ha->flags.enable_lip_full_login = | |
4369 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4370 | ha->flags.enable_target_reset = | |
4371 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4372 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4373 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4374 | |
fd0e7e4d AV |
4375 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4376 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4377 | |
4378 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4379 | sizeof(ha->fw_seriallink_options24)); | |
4380 | ||
4381 | /* save HBA serial number */ | |
4382 | ha->serial0 = icb->port_name[5]; | |
4383 | ha->serial1 = icb->port_name[6]; | |
4384 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4385 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4386 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4387 | |
bc8fb3cb AV |
4388 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4389 | ||
0107109e AV |
4390 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4391 | ||
4392 | /* Set minimum login_timeout to 4 seconds. */ | |
4393 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4394 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4395 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4396 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4397 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4398 | icb->login_timeout = nv->login_timeout; |
0107109e | 4399 | |
00a537b8 AV |
4400 | /* Set minimum RATOV to 100 tenths of a second. */ |
4401 | ha->r_a_tov = 100; | |
0107109e AV |
4402 | |
4403 | ha->loop_reset_delay = nv->reset_delay; | |
4404 | ||
4405 | /* Link Down Timeout = 0: | |
4406 | * | |
4407 | * When Port Down timer expires we will start returning | |
4408 | * I/O's to OS with "DID_NO_CONNECT". | |
4409 | * | |
4410 | * Link Down Timeout != 0: | |
4411 | * | |
4412 | * The driver waits for the link to come up after link down | |
4413 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4414 | */ | |
4415 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4416 | ha->loop_down_abort_time = | |
4417 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4418 | } else { | |
4419 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4420 | ha->loop_down_abort_time = | |
4421 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4422 | } | |
4423 | ||
4424 | /* Need enough time to try and get the port back. */ | |
4425 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4426 | if (qlport_down_retry) | |
4427 | ha->port_down_retry_count = qlport_down_retry; | |
4428 | ||
4429 | /* Set login_retry_count */ | |
4430 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4431 | if (ha->port_down_retry_count == | |
4432 | le16_to_cpu(nv->port_down_retry_count) && | |
4433 | ha->port_down_retry_count > 3) | |
4434 | ha->login_retry_count = ha->port_down_retry_count; | |
4435 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4436 | ha->login_retry_count = ha->port_down_retry_count; | |
4437 | if (ql2xloginretrycount) | |
4438 | ha->login_retry_count = ql2xloginretrycount; | |
4439 | ||
4fdfefe5 | 4440 | /* Enable ZIO. */ |
e315cd28 | 4441 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4442 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4443 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4444 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4445 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4446 | } | |
4447 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4448 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4449 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4450 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
4451 | ha->zio_mode = QLA_ZIO_MODE_6; |
4452 | ||
4fdfefe5 | 4453 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 4454 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
4455 | ha->zio_timer * 100)); |
4456 | qla_printk(KERN_INFO, ha, | |
4457 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4458 | ha->zio_mode, ha->zio_timer * 100); | |
4459 | ||
4460 | icb->firmware_options_2 |= cpu_to_le32( | |
4461 | (uint32_t)ha->zio_mode); | |
4462 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4463 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4464 | } |
4465 | ||
4e08df3f DM |
4466 | if (rval) { |
4467 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 4468 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
4469 | } |
4470 | return (rval); | |
0107109e AV |
4471 | } |
4472 | ||
413975a0 | 4473 | static int |
cbc8eb67 AV |
4474 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4475 | uint32_t faddr) | |
d1c61909 | 4476 | { |
73208dfd | 4477 | int rval = QLA_SUCCESS; |
d1c61909 | 4478 | int segments, fragment; |
d1c61909 AV |
4479 | uint32_t *dcode, dlen; |
4480 | uint32_t risc_addr; | |
4481 | uint32_t risc_size; | |
4482 | uint32_t i; | |
e315cd28 | 4483 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4484 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
4485 | |
4486 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 4487 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 4488 | |
d1c61909 AV |
4489 | rval = QLA_SUCCESS; |
4490 | ||
4491 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4492 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4493 | *srisc_addr = 0; |
4494 | ||
4495 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4496 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4497 | for (i = 0; i < 4; i++) |
4498 | dcode[i] = be32_to_cpu(dcode[i]); | |
4499 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4500 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4501 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4502 | dcode[3] == 0)) { | |
4503 | qla_printk(KERN_WARNING, ha, | |
4504 | "Unable to verify integrity of flash firmware image!\n"); | |
4505 | qla_printk(KERN_WARNING, ha, | |
4506 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4507 | dcode[1], dcode[2], dcode[3]); | |
4508 | ||
4509 | return QLA_FUNCTION_FAILED; | |
4510 | } | |
4511 | ||
4512 | while (segments && rval == QLA_SUCCESS) { | |
4513 | /* Read segment's load information. */ | |
e315cd28 | 4514 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4515 | |
4516 | risc_addr = be32_to_cpu(dcode[2]); | |
4517 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4518 | risc_size = be32_to_cpu(dcode[3]); | |
4519 | ||
4520 | fragment = 0; | |
4521 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4522 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4523 | if (dlen > risc_size) | |
4524 | dlen = risc_size; | |
4525 | ||
4526 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
4527 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 4528 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 4529 | |
e315cd28 | 4530 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4531 | for (i = 0; i < dlen; i++) |
4532 | dcode[i] = swab32(dcode[i]); | |
4533 | ||
73208dfd | 4534 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4535 | dlen); |
4536 | if (rval) { | |
4537 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4538 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
4539 | fragment)); |
4540 | qla_printk(KERN_WARNING, ha, | |
4541 | "[ERROR] Failed to load segment %d of " | |
4542 | "firmware\n", fragment); | |
4543 | break; | |
4544 | } | |
4545 | ||
4546 | faddr += dlen; | |
4547 | risc_addr += dlen; | |
4548 | risc_size -= dlen; | |
4549 | fragment++; | |
4550 | } | |
4551 | ||
4552 | /* Next segment. */ | |
4553 | segments--; | |
4554 | } | |
4555 | ||
4556 | return rval; | |
4557 | } | |
4558 | ||
d1c61909 AV |
4559 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4560 | ||
0107109e | 4561 | int |
e315cd28 | 4562 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4563 | { |
4564 | int rval; | |
4565 | int i, fragment; | |
4566 | uint16_t *wcode, *fwcode; | |
4567 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4568 | struct fw_blob *blob; | |
e315cd28 | 4569 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4570 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4571 | |
4572 | /* Load firmware blob. */ | |
e315cd28 | 4573 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4574 | if (!blob) { |
4575 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4576 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4577 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
4578 | return QLA_FUNCTION_FAILED; |
4579 | } | |
4580 | ||
4581 | rval = QLA_SUCCESS; | |
4582 | ||
73208dfd | 4583 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4584 | *srisc_addr = 0; |
4585 | fwcode = (uint16_t *)blob->fw->data; | |
4586 | fwclen = 0; | |
4587 | ||
4588 | /* Validate firmware image by checking version. */ | |
4589 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
4590 | qla_printk(KERN_WARNING, ha, | |
4591 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
4592 | blob->fw->size); | |
4593 | goto fail_fw_integrity; | |
4594 | } | |
4595 | for (i = 0; i < 4; i++) | |
4596 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4597 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4598 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4599 | wcode[2] == 0 && wcode[3] == 0)) { | |
4600 | qla_printk(KERN_WARNING, ha, | |
4601 | "Unable to verify integrity of firmware image!\n"); | |
4602 | qla_printk(KERN_WARNING, ha, | |
4603 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
4604 | wcode[1], wcode[2], wcode[3]); | |
4605 | goto fail_fw_integrity; | |
4606 | } | |
4607 | ||
4608 | seg = blob->segs; | |
4609 | while (*seg && rval == QLA_SUCCESS) { | |
4610 | risc_addr = *seg; | |
4611 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4612 | risc_size = be16_to_cpu(fwcode[3]); | |
4613 | ||
4614 | /* Validate firmware image size. */ | |
4615 | fwclen += risc_size * sizeof(uint16_t); | |
4616 | if (blob->fw->size < fwclen) { | |
4617 | qla_printk(KERN_WARNING, ha, | |
4618 | "Unable to verify integrity of firmware image " | |
4619 | "(%Zd)!\n", blob->fw->size); | |
4620 | goto fail_fw_integrity; | |
4621 | } | |
4622 | ||
4623 | fragment = 0; | |
4624 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4625 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4626 | if (wlen > risc_size) | |
4627 | wlen = risc_size; | |
4628 | ||
4629 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4630 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
4631 | risc_addr, wlen)); |
4632 | ||
4633 | for (i = 0; i < wlen; i++) | |
4634 | wcode[i] = swab16(fwcode[i]); | |
4635 | ||
73208dfd | 4636 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4637 | wlen); |
4638 | if (rval) { | |
4639 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4640 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
4641 | fragment)); |
4642 | qla_printk(KERN_WARNING, ha, | |
4643 | "[ERROR] Failed to load segment %d of " | |
4644 | "firmware\n", fragment); | |
4645 | break; | |
4646 | } | |
4647 | ||
4648 | fwcode += wlen; | |
4649 | risc_addr += wlen; | |
4650 | risc_size -= wlen; | |
4651 | fragment++; | |
4652 | } | |
4653 | ||
4654 | /* Next segment. */ | |
4655 | seg++; | |
4656 | } | |
4657 | return rval; | |
4658 | ||
4659 | fail_fw_integrity: | |
4660 | return QLA_FUNCTION_FAILED; | |
4661 | } | |
4662 | ||
eaac30be AV |
4663 | static int |
4664 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4665 | { |
4666 | int rval; | |
4667 | int segments, fragment; | |
4668 | uint32_t *dcode, dlen; | |
4669 | uint32_t risc_addr; | |
4670 | uint32_t risc_size; | |
4671 | uint32_t i; | |
5433383e | 4672 | struct fw_blob *blob; |
0107109e | 4673 | uint32_t *fwcode, fwclen; |
e315cd28 | 4674 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4675 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4676 | |
5433383e | 4677 | /* Load firmware blob. */ |
e315cd28 | 4678 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4679 | if (!blob) { |
4680 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4681 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4682 | "from: " QLA_FW_URL ".\n"); | |
4683 | ||
eaac30be | 4684 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4685 | } |
4686 | ||
eaac30be AV |
4687 | qla_printk(KERN_INFO, ha, |
4688 | "FW: Loading via request-firmware...\n"); | |
4689 | ||
0107109e AV |
4690 | rval = QLA_SUCCESS; |
4691 | ||
4692 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4693 | dcode = (uint32_t *)req->ring; |
0107109e | 4694 | *srisc_addr = 0; |
5433383e | 4695 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4696 | fwclen = 0; |
4697 | ||
4698 | /* Validate firmware image by checking version. */ | |
5433383e | 4699 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4700 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4701 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4702 | blob->fw->size); | |
0107109e AV |
4703 | goto fail_fw_integrity; |
4704 | } | |
4705 | for (i = 0; i < 4; i++) | |
4706 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4707 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4708 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4709 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4710 | dcode[3] == 0)) { | |
4711 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4712 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4713 | qla_printk(KERN_WARNING, ha, |
4714 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4715 | dcode[1], dcode[2], dcode[3]); | |
4716 | goto fail_fw_integrity; | |
4717 | } | |
4718 | ||
4719 | while (segments && rval == QLA_SUCCESS) { | |
4720 | risc_addr = be32_to_cpu(fwcode[2]); | |
4721 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4722 | risc_size = be32_to_cpu(fwcode[3]); | |
4723 | ||
4724 | /* Validate firmware image size. */ | |
4725 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4726 | if (blob->fw->size < fwclen) { |
0107109e | 4727 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4728 | "Unable to verify integrity of firmware image " |
4729 | "(%Zd)!\n", blob->fw->size); | |
4730 | ||
0107109e AV |
4731 | goto fail_fw_integrity; |
4732 | } | |
4733 | ||
4734 | fragment = 0; | |
4735 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4736 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4737 | if (dlen > risc_size) | |
4738 | dlen = risc_size; | |
4739 | ||
4740 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4741 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4742 | risc_addr, dlen)); |
4743 | ||
4744 | for (i = 0; i < dlen; i++) | |
4745 | dcode[i] = swab32(fwcode[i]); | |
4746 | ||
73208dfd | 4747 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4748 | dlen); |
0107109e AV |
4749 | if (rval) { |
4750 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4751 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4752 | fragment)); |
4753 | qla_printk(KERN_WARNING, ha, | |
4754 | "[ERROR] Failed to load segment %d of " | |
4755 | "firmware\n", fragment); | |
4756 | break; | |
4757 | } | |
4758 | ||
4759 | fwcode += dlen; | |
4760 | risc_addr += dlen; | |
4761 | risc_size -= dlen; | |
4762 | fragment++; | |
4763 | } | |
4764 | ||
4765 | /* Next segment. */ | |
4766 | segments--; | |
4767 | } | |
0107109e AV |
4768 | return rval; |
4769 | ||
4770 | fail_fw_integrity: | |
0107109e | 4771 | return QLA_FUNCTION_FAILED; |
0107109e | 4772 | } |
18c6c127 | 4773 | |
eaac30be AV |
4774 | int |
4775 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4776 | { | |
4777 | int rval; | |
4778 | ||
e337d907 AV |
4779 | if (ql2xfwloadbin == 1) |
4780 | return qla81xx_load_risc(vha, srisc_addr); | |
4781 | ||
eaac30be AV |
4782 | /* |
4783 | * FW Load priority: | |
4784 | * 1) Firmware via request-firmware interface (.bin file). | |
4785 | * 2) Firmware residing in flash. | |
4786 | */ | |
4787 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4788 | if (rval == QLA_SUCCESS) | |
4789 | return rval; | |
4790 | ||
cbc8eb67 AV |
4791 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4792 | vha->hw->flt_region_fw); | |
eaac30be AV |
4793 | } |
4794 | ||
4795 | int | |
4796 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4797 | { | |
4798 | int rval; | |
cbc8eb67 | 4799 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4800 | |
e337d907 | 4801 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4802 | goto try_blob_fw; |
e337d907 | 4803 | |
eaac30be AV |
4804 | /* |
4805 | * FW Load priority: | |
4806 | * 1) Firmware residing in flash. | |
4807 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4808 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4809 | */ |
cbc8eb67 | 4810 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4811 | if (rval == QLA_SUCCESS) |
4812 | return rval; | |
4813 | ||
cbc8eb67 AV |
4814 | try_blob_fw: |
4815 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4816 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4817 | return rval; | |
4818 | ||
4819 | qla_printk(KERN_ERR, ha, | |
4820 | "FW: Attempting to fallback to golden firmware...\n"); | |
4821 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4822 | if (rval != QLA_SUCCESS) | |
4823 | return rval; | |
4824 | ||
4825 | qla_printk(KERN_ERR, ha, | |
4826 | "FW: Please update operational firmware...\n"); | |
4827 | ha->flags.running_gold_fw = 1; | |
4828 | ||
4829 | return rval; | |
eaac30be AV |
4830 | } |
4831 | ||
18c6c127 | 4832 | void |
e315cd28 | 4833 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4834 | { |
4835 | int ret, retries; | |
e315cd28 | 4836 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4837 | |
85880801 AV |
4838 | if (ha->flags.pci_channel_io_perm_failure) |
4839 | return; | |
e428924c | 4840 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4841 | return; |
75edf81d AV |
4842 | if (!ha->fw_major_version) |
4843 | return; | |
18c6c127 | 4844 | |
e315cd28 | 4845 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4846 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4847 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4848 | ha->isp_ops->reset_chip(vha); |
4849 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4850 | continue; |
e315cd28 | 4851 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4852 | continue; |
4853 | qla_printk(KERN_INFO, ha, | |
4854 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4855 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4856 | } |
4857 | } | |
2c3dfe3f SJ |
4858 | |
4859 | int | |
e315cd28 | 4860 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4861 | { |
4862 | int rval = QLA_SUCCESS; | |
4863 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4864 | struct qla_hw_data *ha = vha->hw; |
4865 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4866 | struct req_que *req; |
4867 | struct rsp_que *rsp; | |
2c3dfe3f | 4868 | |
e315cd28 | 4869 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4870 | return -EINVAL; |
4871 | ||
e315cd28 | 4872 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4873 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4874 | req = ha->req_q_map[0]; |
4875 | else | |
4876 | req = vha->req; | |
4877 | rsp = req->rsp; | |
4878 | ||
2c3dfe3f | 4879 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4880 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4881 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4882 | } |
4883 | ||
e315cd28 | 4884 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4885 | |
4886 | /* Login to SNS first */ | |
e315cd28 | 4887 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4888 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4889 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4890 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4891 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4892 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4893 | return (QLA_FUNCTION_FAILED); | |
4894 | } | |
4895 | ||
e315cd28 AC |
4896 | atomic_set(&vha->loop_down_timer, 0); |
4897 | atomic_set(&vha->loop_state, LOOP_UP); | |
4898 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4899 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4900 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4901 | |
4902 | return rval; | |
4903 | } | |
4d4df193 HK |
4904 | |
4905 | /* 84XX Support **************************************************************/ | |
4906 | ||
4907 | static LIST_HEAD(qla_cs84xx_list); | |
4908 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4909 | ||
4910 | static struct qla_chip_state_84xx * | |
e315cd28 | 4911 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4912 | { |
4913 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4914 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4915 | |
4916 | mutex_lock(&qla_cs84xx_mutex); | |
4917 | ||
4918 | /* Find any shared 84xx chip. */ | |
4919 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4920 | if (cs84xx->bus == ha->pdev->bus) { | |
4921 | kref_get(&cs84xx->kref); | |
4922 | goto done; | |
4923 | } | |
4924 | } | |
4925 | ||
4926 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4927 | if (!cs84xx) | |
4928 | goto done; | |
4929 | ||
4930 | kref_init(&cs84xx->kref); | |
4931 | spin_lock_init(&cs84xx->access_lock); | |
4932 | mutex_init(&cs84xx->fw_update_mutex); | |
4933 | cs84xx->bus = ha->pdev->bus; | |
4934 | ||
4935 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4936 | done: | |
4937 | mutex_unlock(&qla_cs84xx_mutex); | |
4938 | return cs84xx; | |
4939 | } | |
4940 | ||
4941 | static void | |
4942 | __qla84xx_chip_release(struct kref *kref) | |
4943 | { | |
4944 | struct qla_chip_state_84xx *cs84xx = | |
4945 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4946 | ||
4947 | mutex_lock(&qla_cs84xx_mutex); | |
4948 | list_del(&cs84xx->list); | |
4949 | mutex_unlock(&qla_cs84xx_mutex); | |
4950 | kfree(cs84xx); | |
4951 | } | |
4952 | ||
4953 | void | |
e315cd28 | 4954 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4955 | { |
e315cd28 | 4956 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4957 | if (ha->cs84xx) |
4958 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4959 | } | |
4960 | ||
4961 | static int | |
e315cd28 | 4962 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4963 | { |
4964 | int rval; | |
4965 | uint16_t status[2]; | |
e315cd28 | 4966 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4967 | |
4968 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4969 | ||
e315cd28 | 4970 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4971 | |
4972 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4973 | ||
4974 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4975 | QLA_SUCCESS; | |
4976 | } | |
3a03eb79 AV |
4977 | |
4978 | /* 81XX Support **************************************************************/ | |
4979 | ||
4980 | int | |
4981 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4982 | { | |
4983 | int rval; | |
4984 | struct init_cb_81xx *icb; | |
4985 | struct nvram_81xx *nv; | |
4986 | uint32_t *dptr; | |
4987 | uint8_t *dptr1, *dptr2; | |
4988 | uint32_t chksum; | |
4989 | uint16_t cnt; | |
4990 | struct qla_hw_data *ha = vha->hw; | |
4991 | ||
4992 | rval = QLA_SUCCESS; | |
4993 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4994 | nv = ha->nvram; | |
4995 | ||
4996 | /* Determine NVRAM starting address. */ | |
4997 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4998 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4999 | |
5000 | /* Get VPD data into cache */ | |
5001 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
5002 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
5003 | ha->vpd_size); | |
3a03eb79 AV |
5004 | |
5005 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 5006 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 5007 | ha->nvram_size); |
3d79038f | 5008 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
5009 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
5010 | chksum += le32_to_cpu(*dptr++); | |
5011 | ||
7640335e | 5012 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
5013 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
5014 | ||
5015 | /* Bad NVRAM data, set defaults parameters. */ | |
5016 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
5017 | || nv->id[3] != ' ' || | |
5018 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
5019 | /* Reset NVRAM data. */ | |
5020 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
5021 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
5022 | le16_to_cpu(nv->nvram_version)); | |
5023 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
5024 | "invalid -- WWPN) defaults.\n"); | |
5025 | ||
5026 | /* | |
5027 | * Set default initialization control block. | |
5028 | */ | |
5029 | memset(nv, 0, ha->nvram_size); | |
5030 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
5031 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
5032 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
5033 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5034 | nv->exchange_count = __constant_cpu_to_le16(0); | |
5035 | nv->port_name[0] = 0x21; | |
e5b68a61 | 5036 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
5037 | nv->port_name[2] = 0x00; |
5038 | nv->port_name[3] = 0xe0; | |
5039 | nv->port_name[4] = 0x8b; | |
5040 | nv->port_name[5] = 0x1c; | |
5041 | nv->port_name[6] = 0x55; | |
5042 | nv->port_name[7] = 0x86; | |
5043 | nv->node_name[0] = 0x20; | |
5044 | nv->node_name[1] = 0x00; | |
5045 | nv->node_name[2] = 0x00; | |
5046 | nv->node_name[3] = 0xe0; | |
5047 | nv->node_name[4] = 0x8b; | |
5048 | nv->node_name[5] = 0x1c; | |
5049 | nv->node_name[6] = 0x55; | |
5050 | nv->node_name[7] = 0x86; | |
5051 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5052 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5053 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5054 | nv->firmware_options_1 = | |
5055 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5056 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5057 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5058 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5059 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5060 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5061 | nv->reset_delay = 5; | |
5062 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5063 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
5064 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 5065 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
5066 | nv->enode_mac[1] = 0x02; |
5067 | nv->enode_mac[2] = 0x03; | |
5068 | nv->enode_mac[3] = 0x04; | |
5069 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5070 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5071 | |
5072 | rval = 1; | |
5073 | } | |
5074 | ||
5075 | /* Reset Initialization control block */ | |
5076 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
5077 | ||
5078 | /* Copy 1st segment. */ | |
5079 | dptr1 = (uint8_t *)icb; | |
5080 | dptr2 = (uint8_t *)&nv->version; | |
5081 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5082 | while (cnt--) | |
5083 | *dptr1++ = *dptr2++; | |
5084 | ||
5085 | icb->login_retry_count = nv->login_retry_count; | |
5086 | ||
5087 | /* Copy 2nd segment. */ | |
5088 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5089 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5090 | cnt = (uint8_t *)&icb->reserved_5 - | |
5091 | (uint8_t *)&icb->interrupt_delay_timer; | |
5092 | while (cnt--) | |
5093 | *dptr1++ = *dptr2++; | |
5094 | ||
5095 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5096 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5097 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
5098 | icb->enode_mac[0] = 0x01; | |
5099 | icb->enode_mac[1] = 0x02; | |
5100 | icb->enode_mac[2] = 0x03; | |
5101 | icb->enode_mac[3] = 0x04; | |
5102 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5103 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5104 | } |
5105 | ||
b64b0e8f AV |
5106 | /* Use extended-initialization control block. */ |
5107 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5108 | ||
3a03eb79 AV |
5109 | /* |
5110 | * Setup driver NVRAM options. | |
5111 | */ | |
5112 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5113 | "QLE8XXX"); |
3a03eb79 AV |
5114 | |
5115 | /* Use alternate WWN? */ | |
5116 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5117 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5118 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5119 | } | |
5120 | ||
5121 | /* Prepare nodename */ | |
5122 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5123 | /* | |
5124 | * Firmware will apply the following mask if the nodename was | |
5125 | * not provided. | |
5126 | */ | |
5127 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5128 | icb->node_name[0] &= 0xF0; | |
5129 | } | |
5130 | ||
5131 | /* Set host adapter parameters. */ | |
5132 | ha->flags.disable_risc_code_load = 0; | |
5133 | ha->flags.enable_lip_reset = 0; | |
5134 | ha->flags.enable_lip_full_login = | |
5135 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5136 | ha->flags.enable_target_reset = | |
5137 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5138 | ha->flags.enable_led_scheme = 0; | |
5139 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5140 | ||
5141 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5142 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5143 | ||
5144 | /* save HBA serial number */ | |
5145 | ha->serial0 = icb->port_name[5]; | |
5146 | ha->serial1 = icb->port_name[6]; | |
5147 | ha->serial2 = icb->port_name[7]; | |
5148 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5149 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5150 | ||
5151 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5152 | ||
5153 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5154 | ||
5155 | /* Set minimum login_timeout to 4 seconds. */ | |
5156 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5157 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5158 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5159 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5160 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5161 | icb->login_timeout = nv->login_timeout; | |
5162 | ||
5163 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5164 | ha->r_a_tov = 100; | |
5165 | ||
5166 | ha->loop_reset_delay = nv->reset_delay; | |
5167 | ||
5168 | /* Link Down Timeout = 0: | |
5169 | * | |
5170 | * When Port Down timer expires we will start returning | |
5171 | * I/O's to OS with "DID_NO_CONNECT". | |
5172 | * | |
5173 | * Link Down Timeout != 0: | |
5174 | * | |
5175 | * The driver waits for the link to come up after link down | |
5176 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5177 | */ | |
5178 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5179 | ha->loop_down_abort_time = | |
5180 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5181 | } else { | |
5182 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5183 | ha->loop_down_abort_time = | |
5184 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5185 | } | |
5186 | ||
5187 | /* Need enough time to try and get the port back. */ | |
5188 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5189 | if (qlport_down_retry) | |
5190 | ha->port_down_retry_count = qlport_down_retry; | |
5191 | ||
5192 | /* Set login_retry_count */ | |
5193 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5194 | if (ha->port_down_retry_count == | |
5195 | le16_to_cpu(nv->port_down_retry_count) && | |
5196 | ha->port_down_retry_count > 3) | |
5197 | ha->login_retry_count = ha->port_down_retry_count; | |
5198 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5199 | ha->login_retry_count = ha->port_down_retry_count; | |
5200 | if (ql2xloginretrycount) | |
5201 | ha->login_retry_count = ql2xloginretrycount; | |
5202 | ||
5203 | /* Enable ZIO. */ | |
5204 | if (!vha->flags.init_done) { | |
5205 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5206 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5207 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5208 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5209 | } | |
5210 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5211 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5212 | vha->flags.process_response_queue = 0; | |
5213 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5214 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5215 | ||
5216 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
5217 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
5218 | ha->zio_timer * 100)); | |
5219 | qla_printk(KERN_INFO, ha, | |
5220 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
5221 | ha->zio_mode, ha->zio_timer * 100); | |
5222 | ||
5223 | icb->firmware_options_2 |= cpu_to_le32( | |
5224 | (uint32_t)ha->zio_mode); | |
5225 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5226 | vha->flags.process_response_queue = 1; | |
5227 | } | |
5228 | ||
5229 | if (rval) { | |
5230 | DEBUG2_3(printk(KERN_WARNING | |
5231 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
5232 | } | |
5233 | return (rval); | |
5234 | } | |
5235 | ||
a9083016 GM |
5236 | int |
5237 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5238 | { | |
5239 | int status, rval; | |
5240 | uint32_t wait_time; | |
5241 | struct qla_hw_data *ha = vha->hw; | |
5242 | struct req_que *req = ha->req_q_map[0]; | |
5243 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5244 | struct scsi_qla_host *vp; | |
feafb7b1 | 5245 | unsigned long flags; |
a9083016 GM |
5246 | |
5247 | status = qla2x00_init_rings(vha); | |
5248 | if (!status) { | |
5249 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5250 | ha->flags.chip_reset_done = 1; | |
5251 | ||
5252 | status = qla2x00_fw_ready(vha); | |
5253 | if (!status) { | |
5254 | qla_printk(KERN_INFO, ha, | |
5255 | "%s(): Start configure loop, " | |
5256 | "status = %d\n", __func__, status); | |
5257 | ||
5258 | /* Issue a marker after FW becomes ready. */ | |
5259 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5260 | ||
5261 | vha->flags.online = 1; | |
5262 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5263 | wait_time = 256; | |
5264 | do { | |
5265 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5266 | qla2x00_configure_loop(vha); | |
5267 | wait_time--; | |
5268 | } while (!atomic_read(&vha->loop_down_timer) && | |
5269 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5270 | wait_time && | |
5271 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5272 | } | |
5273 | ||
5274 | /* if no cable then assume it's good */ | |
5275 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5276 | status = 0; | |
5277 | ||
5278 | qla_printk(KERN_INFO, ha, | |
5279 | "%s(): Configure loop done, status = 0x%x\n", | |
5280 | __func__, status); | |
5281 | } | |
5282 | ||
5283 | if (!status) { | |
5284 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5285 | ||
5286 | if (!atomic_read(&vha->loop_down_timer)) { | |
5287 | /* | |
5288 | * Issue marker command only when we are going | |
5289 | * to start the I/O . | |
5290 | */ | |
5291 | vha->marker_needed = 1; | |
5292 | } | |
5293 | ||
5294 | vha->flags.online = 1; | |
5295 | ||
5296 | ha->isp_ops->enable_intrs(ha); | |
5297 | ||
5298 | ha->isp_abort_cnt = 0; | |
5299 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5300 | ||
5301 | if (ha->fce) { | |
5302 | ha->flags.fce_enabled = 1; | |
5303 | memset(ha->fce, 0, | |
5304 | fce_calc_size(ha->fce_bufs)); | |
5305 | rval = qla2x00_enable_fce_trace(vha, | |
5306 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5307 | &ha->fce_bufs); | |
5308 | if (rval) { | |
5309 | qla_printk(KERN_WARNING, ha, | |
5310 | "Unable to reinitialize FCE " | |
5311 | "(%d).\n", rval); | |
5312 | ha->flags.fce_enabled = 0; | |
5313 | } | |
5314 | } | |
5315 | ||
5316 | if (ha->eft) { | |
5317 | memset(ha->eft, 0, EFT_SIZE); | |
5318 | rval = qla2x00_enable_eft_trace(vha, | |
5319 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5320 | if (rval) { | |
5321 | qla_printk(KERN_WARNING, ha, | |
5322 | "Unable to reinitialize EFT " | |
5323 | "(%d).\n", rval); | |
5324 | } | |
5325 | } | |
a9083016 GM |
5326 | } |
5327 | ||
5328 | if (!status) { | |
5329 | DEBUG(printk(KERN_INFO | |
5330 | "qla82xx_restart_isp(%ld): succeeded.\n", | |
5331 | vha->host_no)); | |
feafb7b1 AE |
5332 | |
5333 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5334 | list_for_each_entry(vp, &ha->vp_list, list) { | |
5335 | if (vp->vp_idx) { | |
5336 | atomic_inc(&vp->vref_count); | |
5337 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5338 | ||
a9083016 | 5339 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
5340 | |
5341 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5342 | atomic_dec(&vp->vref_count); | |
5343 | } | |
a9083016 | 5344 | } |
feafb7b1 AE |
5345 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
5346 | ||
a9083016 GM |
5347 | } else { |
5348 | qla_printk(KERN_INFO, ha, | |
5349 | "qla82xx_restart_isp: **** FAILED ****\n"); | |
5350 | } | |
5351 | ||
5352 | return status; | |
5353 | } | |
5354 | ||
3a03eb79 | 5355 | void |
ae97c91e | 5356 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5357 | { |
ae97c91e AV |
5358 | struct qla_hw_data *ha = vha->hw; |
5359 | ||
5360 | if (!ql2xetsenable) | |
5361 | return; | |
5362 | ||
5363 | /* Enable ETS Burst. */ | |
5364 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5365 | ha->fw_options[2] |= BIT_9; | |
5366 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5367 | } |
09ff701a SR |
5368 | |
5369 | /* | |
5370 | * qla24xx_get_fcp_prio | |
5371 | * Gets the fcp cmd priority value for the logged in port. | |
5372 | * Looks for a match of the port descriptors within | |
5373 | * each of the fcp prio config entries. If a match is found, | |
5374 | * the tag (priority) value is returned. | |
5375 | * | |
5376 | * Input: | |
5377 | * ha = adapter block po | |
5378 | * fcport = port structure pointer. | |
5379 | * | |
5380 | * Return: | |
6c452a45 | 5381 | * non-zero (if found) |
09ff701a SR |
5382 | * 0 (if not found) |
5383 | * | |
5384 | * Context: | |
5385 | * Kernel context | |
5386 | */ | |
5387 | uint8_t | |
5388 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) | |
5389 | { | |
5390 | int i, entries; | |
5391 | uint8_t pid_match, wwn_match; | |
5392 | uint8_t priority; | |
5393 | uint32_t pid1, pid2; | |
5394 | uint64_t wwn1, wwn2; | |
5395 | struct qla_fcp_prio_entry *pri_entry; | |
5396 | struct qla_hw_data *ha = vha->hw; | |
5397 | ||
5398 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
5399 | return 0; | |
5400 | ||
5401 | priority = 0; | |
5402 | entries = ha->fcp_prio_cfg->num_entries; | |
5403 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5404 | ||
5405 | for (i = 0; i < entries; i++) { | |
5406 | pid_match = wwn_match = 0; | |
5407 | ||
5408 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5409 | pri_entry++; | |
5410 | continue; | |
5411 | } | |
5412 | ||
5413 | /* check source pid for a match */ | |
5414 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5415 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5416 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5417 | if (pid1 == INVALID_PORT_ID) | |
5418 | pid_match++; | |
5419 | else if (pid1 == pid2) | |
5420 | pid_match++; | |
5421 | } | |
5422 | ||
5423 | /* check destination pid for a match */ | |
5424 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5425 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5426 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5427 | if (pid1 == INVALID_PORT_ID) | |
5428 | pid_match++; | |
5429 | else if (pid1 == pid2) | |
5430 | pid_match++; | |
5431 | } | |
5432 | ||
5433 | /* check source WWN for a match */ | |
5434 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5435 | wwn1 = wwn_to_u64(vha->port_name); | |
5436 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5437 | if (wwn2 == (uint64_t)-1) | |
5438 | wwn_match++; | |
5439 | else if (wwn1 == wwn2) | |
5440 | wwn_match++; | |
5441 | } | |
5442 | ||
5443 | /* check destination WWN for a match */ | |
5444 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5445 | wwn1 = wwn_to_u64(fcport->port_name); | |
5446 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5447 | if (wwn2 == (uint64_t)-1) | |
5448 | wwn_match++; | |
5449 | else if (wwn1 == wwn2) | |
5450 | wwn_match++; | |
5451 | } | |
5452 | ||
5453 | if (pid_match == 2 || wwn_match == 2) { | |
5454 | /* Found a matching entry */ | |
5455 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5456 | priority = pri_entry->tag; | |
5457 | break; | |
5458 | } | |
5459 | ||
5460 | pri_entry++; | |
5461 | } | |
5462 | ||
5463 | return priority; | |
5464 | } | |
5465 | ||
5466 | /* | |
5467 | * qla24xx_update_fcport_fcp_prio | |
5468 | * Activates fcp priority for the logged in fc port | |
5469 | * | |
5470 | * Input: | |
5471 | * ha = adapter block pointer. | |
5472 | * fcp = port structure pointer. | |
5473 | * | |
5474 | * Return: | |
5475 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5476 | * | |
5477 | * Context: | |
5478 | * Kernel context. | |
5479 | */ | |
5480 | int | |
5481 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport) | |
5482 | { | |
5483 | int ret; | |
5484 | uint8_t priority; | |
5485 | uint16_t mb[5]; | |
5486 | ||
5487 | if (atomic_read(&fcport->state) == FCS_UNCONFIGURED || | |
5488 | fcport->port_type != FCT_TARGET || | |
5489 | fcport->loop_id == FC_NO_LOOP_ID) | |
5490 | return QLA_FUNCTION_FAILED; | |
5491 | ||
5492 | priority = qla24xx_get_fcp_prio(ha, fcport); | |
5493 | ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb); | |
5494 | if (ret == QLA_SUCCESS) | |
5495 | fcport->fcp_prio = priority; | |
5496 | else | |
5497 | DEBUG2(printk(KERN_WARNING | |
5498 | "scsi(%ld): Unable to activate fcp priority, " | |
5499 | " ret=0x%x\n", ha->host_no, ret)); | |
5500 | ||
5501 | return ret; | |
5502 | } | |
5503 | ||
5504 | /* | |
5505 | * qla24xx_update_all_fcp_prio | |
5506 | * Activates fcp priority for all the logged in ports | |
5507 | * | |
5508 | * Input: | |
5509 | * ha = adapter block pointer. | |
5510 | * | |
5511 | * Return: | |
5512 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5513 | * | |
5514 | * Context: | |
5515 | * Kernel context. | |
5516 | */ | |
5517 | int | |
5518 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5519 | { | |
5520 | int ret; | |
5521 | fc_port_t *fcport; | |
5522 | ||
5523 | ret = QLA_FUNCTION_FAILED; | |
5524 | /* We need to set priority for all logged in ports */ | |
5525 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5526 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5527 | ||
5528 | return ret; | |
5529 | } |