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[PATCH] libata: clear only affected flags during ata_dev_configure()
[net-next-2.6.git] / drivers / scsi / libata-core.c
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
cf176e1a
TH		 68static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
69 int force_pio0);
1c3fae4d 70static int ata_down_sata_spd_limit(struct ata_port *ap);
e82cbdb9 71static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
83206a29
TH		 72static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
73 struct ata_device *dev);
acf356b1 74static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 75
76static unsigned int ata_unique_id = 1;
77static struct workqueue_struct *ata_wq;
78
418dc1f5 79int atapi_enabled = 1;
1623c81e
JG		 80module_param(atapi_enabled, int, 0444);
81MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
0b8efb0a
TH		 415static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
77853bf2 958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 959 complete(waiting);
a2a7a662
TH		 960}
961
962/**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
967 * @dma_dir: Data tranfer direction of the command
968 * @buf: Data buffer of the command
969 * @buflen: Length of data buffer
970 *
971 * Executes libata internal command with timeout. @tf contains
972 * command on entry and result on return. Timeout and error
973 * conditions are reported via return value. No recovery action
974 * is taken after a command times out. It's caller's duty to
975 * clean up after timeout.
976 *
977 * LOCKING:
978 * None. Should be called with kernel context, might sleep.
979 */
980
981static unsigned
982ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf,
984 int dma_dir, void *buf, unsigned int buflen)
985{
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
77853bf2 990 unsigned int err_mask;
a2a7a662
TH		 991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
998 qc->dma_dir = dma_dir;
999 if (dma_dir != DMA_NONE) {
1000 ata_sg_init_one(qc, buf, buflen);
1001 qc->nsect = buflen / ATA_SECT_SIZE;
1002 }
1003
77853bf2 1004 qc->private_data = &wait;
a2a7a662
TH		 1005 qc->complete_fn = ata_qc_complete_internal;
1006
8e0e694a 1007 ata_qc_issue(qc);
a2a7a662
TH		 1008
1009 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1010
1011 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1012 ata_port_flush_task(ap);
1013
a2a7a662
TH		 1014 spin_lock_irqsave(&ap->host_set->lock, flags);
1015
1016 /* We're racing with irq here. If we lose, the
1017 * following test prevents us from completing the qc
1018 * again. If completion irq occurs after here but
1019 * before the caller cleans up, it will result in a
1020 * spurious interrupt. We can live with that.
1021 */
77853bf2 1022 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1023 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1024 ata_qc_complete(qc);
1025 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1026 ap->id, command);
1027 }
1028
1029 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1030 }
1031
77853bf2
TH		 1032 *tf = qc->tf;
1033 err_mask = qc->err_mask;
1034
1035 ata_qc_free(qc);
1036
1f7dd3e9
TH		 1037 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1038 * Until those drivers are fixed, we detect the condition
1039 * here, fail the command with AC_ERR_SYSTEM and reenable the
1040 * port.
1041 *
1042 * Note that this doesn't change any behavior as internal
1043 * command failure results in disabling the device in the
1044 * higher layer for LLDDs without new reset/EH callbacks.
1045 *
1046 * Kill the following code as soon as those drivers are fixed.
1047 */
198e0fed 1048 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1049 err_mask |= AC_ERR_SYSTEM;
1050 ata_port_probe(ap);
1051 }
1052
77853bf2 1053 return err_mask;
a2a7a662
TH		 1054}
1055
1bc4ccff
AC		 1056/**
1057 * ata_pio_need_iordy - check if iordy needed
1058 * @adev: ATA device
1059 *
1060 * Check if the current speed of the device requires IORDY. Used
1061 * by various controllers for chip configuration.
1062 */
1063
1064unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1065{
1066 int pio;
1067 int speed = adev->pio_mode - XFER_PIO_0;
1068
1069 if (speed < 2)
1070 return 0;
1071 if (speed > 2)
1072 return 1;
2e9edbf8 1073
1bc4ccff
AC		 1074 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1075
1076 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1077 pio = adev->id[ATA_ID_EIDE_PIO];
1078 /* Is the speed faster than the drive allows non IORDY ? */
1079 if (pio) {
1080 /* This is cycle times not frequency - watch the logic! */
1081 if (pio > 240) /* PIO2 is 240nS per cycle */
1082 return 1;
1083 return 0;
1084 }
1085 }
1086 return 0;
1087}
1088
1da177e4 1089/**
49016aca
TH		 1090 * ata_dev_read_id - Read ID data from the specified device
1091 * @ap: port on which target device resides
1092 * @dev: target device
1093 * @p_class: pointer to class of the target device (may be changed)
1094 * @post_reset: is this read ID post-reset?
d9572b1d 1095 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1096 *
49016aca
TH		 1097 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1098 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1099 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1100 * for pre-ATA4 drives.
1da177e4
LT		 1101 *
1102 * LOCKING:
49016aca
TH		 1103 * Kernel thread context (may sleep)
1104 *
1105 * RETURNS:
1106 * 0 on success, -errno otherwise.
1da177e4 1107 */
49016aca 1108static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1109 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1110{
49016aca 1111 unsigned int class = *p_class;
a0123703 1112 struct ata_taskfile tf;
49016aca 1113 unsigned int err_mask = 0;
d9572b1d 1114 u16 *id;
49016aca
TH		 1115 const char *reason;
1116 int rc;
1da177e4 1117
49016aca 1118 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1119
49016aca 1120 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1121
d9572b1d
TH		 1122 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1123 if (id == NULL) {
1124 rc = -ENOMEM;
1125 reason = "out of memory";
1126 goto err_out;
1127 }
1128
49016aca
TH		 1129 retry:
1130 ata_tf_init(ap, &tf, dev->devno);
a0123703 1131
49016aca
TH		 1132 switch (class) {
1133 case ATA_DEV_ATA:
a0123703 1134 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1135 break;
1136 case ATA_DEV_ATAPI:
a0123703 1137 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1138 break;
1139 default:
1140 rc = -ENODEV;
1141 reason = "unsupported class";
1142 goto err_out;
1da177e4
LT		 1143 }
1144
a0123703 1145 tf.protocol = ATA_PROT_PIO;
1da177e4 1146
a0123703 1147 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1148 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1149 if (err_mask) {
49016aca
TH		 1150 rc = -EIO;
1151 reason = "I/O error";
1da177e4
LT		 1152 goto err_out;
1153 }
1154
49016aca 1155 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1156
49016aca 1157 /* sanity check */
692785e7 1158 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1159 rc = -EINVAL;
1160 reason = "device reports illegal type";
1161 goto err_out;
1162 }
1163
1164 if (post_reset && class == ATA_DEV_ATA) {
1165 /*
1166 * The exact sequence expected by certain pre-ATA4 drives is:
1167 * SRST RESET
1168 * IDENTIFY
1169 * INITIALIZE DEVICE PARAMETERS
1170 * anything else..
1171 * Some drives were very specific about that exact sequence.
1172 */
1173 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1174 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1175 if (err_mask) {
1176 rc = -EIO;
1177 reason = "INIT_DEV_PARAMS failed";
1178 goto err_out;
1179 }
1180
1181 /* current CHS translation info (id[53-58]) might be
1182 * changed. reread the identify device info.
1183 */
1184 post_reset = 0;
1185 goto retry;
1186 }
1187 }
1188
1189 *p_class = class;
d9572b1d 1190 *p_id = id;
49016aca
TH		 1191 return 0;
1192
1193 err_out:
1194 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1195 ap->id, dev->devno, reason);
d9572b1d 1196 kfree(id);
49016aca
TH		 1197 return rc;
1198}
1199
4b2f3ede
TH		 1200static inline u8 ata_dev_knobble(const struct ata_port *ap,
1201 struct ata_device *dev)
1202{
1203 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1204}
1205
49016aca 1206/**
ffeae418
TH		 1207 * ata_dev_configure - Configure the specified ATA/ATAPI device
1208 * @ap: Port on which target device resides
1209 * @dev: Target device to configure
4c2d721a 1210 * @print_info: Enable device info printout
ffeae418
TH		 1211 *
1212 * Configure @dev according to @dev->id. Generic and low-level
1213 * driver specific fixups are also applied.
49016aca
TH		 1214 *
1215 * LOCKING:
ffeae418
TH		 1216 * Kernel thread context (may sleep)
1217 *
1218 * RETURNS:
1219 * 0 on success, -errno otherwise
49016aca 1220 */
4c2d721a
TH		 1221static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1222 int print_info)
49016aca 1223{
1148c3a7 1224 const u16 *id = dev->id;
ff8854b2 1225 unsigned int xfer_mask;
49016aca
TH		 1226 int i, rc;
1227
e1211e3f 1228 if (!ata_dev_enabled(dev)) {
49016aca 1229 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1230 ap->id, dev->devno);
1231 return 0;
49016aca
TH		 1232 }
1233
ffeae418 1234 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1235
c39f5ebe
TH		 1236 /* print device capabilities */
1237 if (print_info)
1238 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1239 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1240 ap->id, dev->devno, id[49], id[82], id[83],
1241 id[84], id[85], id[86], id[87], id[88]);
1242
208a9933 1243 /* initialize to-be-configured parameters */
ea1dd4e1 1244 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1245 dev->max_sectors = 0;
1246 dev->cdb_len = 0;
1247 dev->n_sectors = 0;
1248 dev->cylinders = 0;
1249 dev->heads = 0;
1250 dev->sectors = 0;
1251
1da177e4
LT		 1252 /*
1253 * common ATA, ATAPI feature tests
1254 */
1255
ff8854b2 1256 /* find max transfer mode; for printk only */
1148c3a7 1257 xfer_mask = ata_id_xfermask(id);
1da177e4 1258
1148c3a7 1259 ata_dump_id(id);
1da177e4
LT		 1260
1261 /* ATA-specific feature tests */
1262 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1263 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1264
1148c3a7 1265 if (ata_id_has_lba(id)) {
4c2d721a 1266 const char *lba_desc;
8bf62ece 1267
4c2d721a
TH		 1268 lba_desc = "LBA";
1269 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1270 if (ata_id_has_lba48(id)) {
8bf62ece 1271 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1272 lba_desc = "LBA48";
1273 }
8bf62ece
AL		 1274
1275 /* print device info to dmesg */
4c2d721a
TH		 1276 if (print_info)
1277 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1278 "max %s, %Lu sectors: %s\n",
1279 ap->id, dev->devno,
1148c3a7 1280 ata_id_major_version(id),
ff8854b2 1281 ata_mode_string(xfer_mask),
4c2d721a
TH		 1282 (unsigned long long)dev->n_sectors,
1283 lba_desc);
ffeae418 1284 } else {
8bf62ece
AL		 1285 /* CHS */
1286
1287 /* Default translation */
1148c3a7
TH		 1288 dev->cylinders = id[1];
1289 dev->heads = id[3];
1290 dev->sectors = id[6];
8bf62ece 1291
1148c3a7 1292 if (ata_id_current_chs_valid(id)) {
8bf62ece 1293 /* Current CHS translation is valid. */
1148c3a7
TH		 1294 dev->cylinders = id[54];
1295 dev->heads = id[55];
1296 dev->sectors = id[56];
8bf62ece
AL		 1297 }
1298
1299 /* print device info to dmesg */
4c2d721a
TH		 1300 if (print_info)
1301 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1302 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1303 ap->id, dev->devno,
1148c3a7 1304 ata_id_major_version(id),
ff8854b2 1305 ata_mode_string(xfer_mask),
4c2d721a
TH		 1306 (unsigned long long)dev->n_sectors,
1307 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1308 }
1309
6e7846e9 1310 dev->cdb_len = 16;
1da177e4
LT		 1311 }
1312
1313 /* ATAPI-specific feature tests */
2c13b7ce 1314 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1315 rc = atapi_cdb_len(id);
1da177e4
LT		 1316 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1317 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1318 rc = -EINVAL;
1da177e4
LT		 1319 goto err_out_nosup;
1320 }
6e7846e9 1321 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1322
1323 /* print device info to dmesg */
4c2d721a
TH		 1324 if (print_info)
1325 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1326 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1327 }
1328
6e7846e9
TH		 1329 ap->host->max_cmd_len = 0;
1330 for (i = 0; i < ATA_MAX_DEVICES; i++)
1331 ap->host->max_cmd_len = max_t(unsigned int,
1332 ap->host->max_cmd_len,
1333 ap->device[i].cdb_len);
1334
4b2f3ede
TH		 1335 /* limit bridge transfers to udma5, 200 sectors */
1336 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1337 if (print_info)
1338 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1339 ap->id, dev->devno);
5a529139 1340 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1341 dev->max_sectors = ATA_MAX_SECTORS;
1342 }
1343
1344 if (ap->ops->dev_config)
1345 ap->ops->dev_config(ap, dev);
1346
1da177e4 1347 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1348 return 0;
1da177e4
LT		 1349
1350err_out_nosup:
1da177e4 1351 DPRINTK("EXIT, err\n");
ffeae418 1352 return rc;
1da177e4
LT		 1353}
1354
1355/**
1356 * ata_bus_probe - Reset and probe ATA bus
1357 * @ap: Bus to probe
1358 *
0cba632b
JG		 1359 * Master ATA bus probing function. Initiates a hardware-dependent
1360 * bus reset, then attempts to identify any devices found on
1361 * the bus.
1362 *
1da177e4 1363 * LOCKING:
0cba632b 1364 * PCI/etc. bus probe sem.
1da177e4
LT		 1365 *
1366 * RETURNS:
96072e69 1367 * Zero on success, negative errno otherwise.
1da177e4
LT		 1368 */
1369
1370static int ata_bus_probe(struct ata_port *ap)
1371{
28ca5c57 1372 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1373 int tries[ATA_MAX_DEVICES];
1374 int i, rc, down_xfermask;
e82cbdb9 1375 struct ata_device *dev;
1da177e4 1376
28ca5c57 1377 ata_port_probe(ap);
c19ba8af 1378
14d2bac1
TH		 1379 for (i = 0; i < ATA_MAX_DEVICES; i++)
1380 tries[i] = ATA_PROBE_MAX_TRIES;
1381
1382 retry:
1383 down_xfermask = 0;
1384
2044470c
TH		 1385 /* reset and determine device classes */
1386 for (i = 0; i < ATA_MAX_DEVICES; i++)
1387 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1388
2044470c 1389 if (ap->ops->probe_reset) {
c19ba8af 1390 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1391 if (rc) {
1392 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1393 return rc;
c19ba8af 1394 }
28ca5c57 1395 } else {
c19ba8af
TH		 1396 ap->ops->phy_reset(ap);
1397
198e0fed 1398 if (!(ap->flags & ATA_FLAG_DISABLED))
2044470c 1399 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1400 classes[i] = ap->device[i].class;
2044470c 1401
28ca5c57
TH		 1402 ata_port_probe(ap);
1403 }
1da177e4 1404
2044470c
TH		 1405 for (i = 0; i < ATA_MAX_DEVICES; i++)
1406 if (classes[i] == ATA_DEV_UNKNOWN)
1407 classes[i] = ATA_DEV_NONE;
1408
28ca5c57 1409 /* read IDENTIFY page and configure devices */
1da177e4 1410 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1411 dev = &ap->device[i];
28ca5c57
TH		 1412 dev->class = classes[i];
1413
14d2bac1
TH		 1414 if (!tries[i]) {
1415 ata_down_xfermask_limit(ap, dev, 1);
1416 ata_dev_disable(ap, dev);
ffeae418
TH		 1417 }
1418
14d2bac1 1419 if (!ata_dev_enabled(dev))
ffeae418 1420 continue;
ffeae418 1421
14d2bac1
TH		 1422 kfree(dev->id);
1423 dev->id = NULL;
1424 rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
1425 if (rc)
1426 goto fail;
1427
1428 rc = ata_dev_configure(ap, dev, 1);
1429 if (rc)
1430 goto fail;
1da177e4
LT		 1431 }
1432
e82cbdb9
TH		 1433 /* configure transfer mode */
1434 if (ap->ops->set_mode) {
1435 /* FIXME: make ->set_mode handle no device case and
1436 * return error code and failing device on failure as
1437 * ata_set_mode() does.
1438 */
14d2bac1
TH		 1439 for (i = 0; i < ATA_MAX_DEVICES; i++)
1440 if (ata_dev_enabled(&ap->device[i])) {
1441 ap->ops->set_mode(ap);
1442 break;
1443 }
e82cbdb9
TH		 1444 rc = 0;
1445 } else {
14d2bac1
TH		 1446 rc = ata_set_mode(ap, &dev);
1447 if (rc) {
1448 down_xfermask = 1;
1449 goto fail;
1450 }
e82cbdb9 1451 }
1da177e4 1452
e82cbdb9
TH		 1453 for (i = 0; i < ATA_MAX_DEVICES; i++)
1454 if (ata_dev_enabled(&ap->device[i]))
1455 return 0;
1da177e4 1456
e82cbdb9
TH		 1457 /* no device present, disable port */
1458 ata_port_disable(ap);
1da177e4 1459 ap->ops->port_disable(ap);
96072e69 1460 return -ENODEV;
14d2bac1
TH		 1461
1462 fail:
1463 switch (rc) {
1464 case -EINVAL:
1465 case -ENODEV:
1466 tries[dev->devno] = 0;
1467 break;
1468 case -EIO:
1469 ata_down_sata_spd_limit(ap);
1470 /* fall through */
1471 default:
1472 tries[dev->devno]--;
1473 if (down_xfermask &&
1474 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1475 tries[dev->devno] = 0;
1476 }
1477
1478 goto retry;
1da177e4
LT		 1479}
1480
1481/**
0cba632b
JG		 1482 * ata_port_probe - Mark port as enabled
1483 * @ap: Port for which we indicate enablement
1da177e4 1484 *
0cba632b
JG		 1485 * Modify @ap data structure such that the system
1486 * thinks that the entire port is enabled.
1487 *
1488 * LOCKING: host_set lock, or some other form of
1489 * serialization.
1da177e4
LT		 1490 */
1491
1492void ata_port_probe(struct ata_port *ap)
1493{
198e0fed 1494 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1495}
1496
3be680b7
TH		 1497/**
1498 * sata_print_link_status - Print SATA link status
1499 * @ap: SATA port to printk link status about
1500 *
1501 * This function prints link speed and status of a SATA link.
1502 *
1503 * LOCKING:
1504 * None.
1505 */
1506static void sata_print_link_status(struct ata_port *ap)
1507{
1508 u32 sstatus, tmp;
3be680b7
TH		 1509
1510 if (!ap->ops->scr_read)
1511 return;
1512
1513 sstatus = scr_read(ap, SCR_STATUS);
1514
1515 if (sata_dev_present(ap)) {
1516 tmp = (sstatus >> 4) & 0xf;
4c360c81
TH		 1517 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1518 ap->id, sata_spd_string(tmp), sstatus);
3be680b7
TH		 1519 } else {
1520 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1521 ap->id, sstatus);
1522 }
1523}
1524
1da177e4 1525/**
780a87f7
JG		 1526 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1527 * @ap: SATA port associated with target SATA PHY.
1da177e4 1528 *
780a87f7
JG		 1529 * This function issues commands to standard SATA Sxxx
1530 * PHY registers, to wake up the phy (and device), and
1531 * clear any reset condition.
1da177e4
LT		 1532 *
1533 * LOCKING:
0cba632b 1534 * PCI/etc. bus probe sem.
1da177e4
LT		 1535 *
1536 */
1537void __sata_phy_reset(struct ata_port *ap)
1538{
1539 u32 sstatus;
1540 unsigned long timeout = jiffies + (HZ * 5);
1541
1542 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1543 /* issue phy wake/reset */
1544 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1545 /* Couldn't find anything in SATA I/II specs, but
1546 * AHCI-1.1 10.4.2 says at least 1 ms. */
1547 mdelay(1);
1da177e4 1548 }
cdcca89e 1549 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1550
1551 /* wait for phy to become ready, if necessary */
1552 do {
1553 msleep(200);
1554 sstatus = scr_read(ap, SCR_STATUS);
1555 if ((sstatus & 0xf) != 1)
1556 break;
1557 } while (time_before(jiffies, timeout));
1558
3be680b7
TH		 1559 /* print link status */
1560 sata_print_link_status(ap);
656563e3 1561
3be680b7
TH		 1562 /* TODO: phy layer with polling, timeouts, etc. */
1563 if (sata_dev_present(ap))
1da177e4 1564 ata_port_probe(ap);
3be680b7 1565 else
1da177e4 1566 ata_port_disable(ap);
1da177e4 1567
198e0fed 1568 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1569 return;
1570
1571 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1572 ata_port_disable(ap);
1573 return;
1574 }
1575
1576 ap->cbl = ATA_CBL_SATA;
1577}
1578
1579/**
780a87f7
JG		 1580 * sata_phy_reset - Reset SATA bus.
1581 * @ap: SATA port associated with target SATA PHY.
1da177e4 1582 *
780a87f7
JG		 1583 * This function resets the SATA bus, and then probes
1584 * the bus for devices.
1da177e4
LT		 1585 *
1586 * LOCKING:
0cba632b 1587 * PCI/etc. bus probe sem.
1da177e4
LT		 1588 *
1589 */
1590void sata_phy_reset(struct ata_port *ap)
1591{
1592 __sata_phy_reset(ap);
198e0fed 1593 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1594 return;
1595 ata_bus_reset(ap);
1596}
1597
ebdfca6e
AC		 1598/**
1599 * ata_dev_pair - return other device on cable
1600 * @ap: port
1601 * @adev: device
1602 *
1603 * Obtain the other device on the same cable, or if none is
1604 * present NULL is returned
1605 */
2e9edbf8 1606
ebdfca6e
AC		 1607struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1608{
1609 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1610 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1611 return NULL;
1612 return pair;
1613}
1614
1da177e4 1615/**
780a87f7
JG		 1616 * ata_port_disable - Disable port.
1617 * @ap: Port to be disabled.
1da177e4 1618 *
780a87f7
JG		 1619 * Modify @ap data structure such that the system
1620 * thinks that the entire port is disabled, and should
1621 * never attempt to probe or communicate with devices
1622 * on this port.
1623 *
1624 * LOCKING: host_set lock, or some other form of
1625 * serialization.
1da177e4
LT		 1626 */
1627
1628void ata_port_disable(struct ata_port *ap)
1629{
1630 ap->device[0].class = ATA_DEV_NONE;
1631 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1632 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1633}
1634
1c3fae4d
TH		 1635/**
1636 * ata_down_sata_spd_limit - adjust SATA spd limit downward
1637 * @ap: Port to adjust SATA spd limit for
1638 *
1639 * Adjust SATA spd limit of @ap downward. Note that this
1640 * function only adjusts the limit. The change must be applied
1641 * using ata_set_sata_spd().
1642 *
1643 * LOCKING:
1644 * Inherited from caller.
1645 *
1646 * RETURNS:
1647 * 0 on success, negative errno on failure
1648 */
1649static int ata_down_sata_spd_limit(struct ata_port *ap)
1650{
1651 u32 spd, mask;
1652 int highbit;
1653
1654 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1655 return -EOPNOTSUPP;
1656
1657 mask = ap->sata_spd_limit;
1658 if (mask <= 1)
1659 return -EINVAL;
1660 highbit = fls(mask) - 1;
1661 mask &= ~(1 << highbit);
1662
1663 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1664 if (spd <= 1)
1665 return -EINVAL;
1666 spd--;
1667 mask &= (1 << spd) - 1;
1668 if (!mask)
1669 return -EINVAL;
1670
1671 ap->sata_spd_limit = mask;
1672
1673 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1674 ap->id, sata_spd_string(fls(mask)));
1675
1676 return 0;
1677}
1678
1679static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
1680{
1681 u32 spd, limit;
1682
1683 if (ap->sata_spd_limit == UINT_MAX)
1684 limit = 0;
1685 else
1686 limit = fls(ap->sata_spd_limit);
1687
1688 spd = (*scontrol >> 4) & 0xf;
1689 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1690
1691 return spd != limit;
1692}
1693
1694/**
1695 * ata_set_sata_spd_needed - is SATA spd configuration needed
1696 * @ap: Port in question
1697 *
1698 * Test whether the spd limit in SControl matches
1699 * @ap->sata_spd_limit. This function is used to determine
1700 * whether hardreset is necessary to apply SATA spd
1701 * configuration.
1702 *
1703 * LOCKING:
1704 * Inherited from caller.
1705 *
1706 * RETURNS:
1707 * 1 if SATA spd configuration is needed, 0 otherwise.
1708 */
1709static int ata_set_sata_spd_needed(struct ata_port *ap)
1710{
1711 u32 scontrol;
1712
1713 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1714 return 0;
1715
1716 scontrol = scr_read(ap, SCR_CONTROL);
1717
1718 return __ata_set_sata_spd_needed(ap, &scontrol);
1719}
1720
1721/**
1722 * ata_set_sata_spd - set SATA spd according to spd limit
1723 * @ap: Port to set SATA spd for
1724 *
1725 * Set SATA spd of @ap according to sata_spd_limit.
1726 *
1727 * LOCKING:
1728 * Inherited from caller.
1729 *
1730 * RETURNS:
1731 * 0 if spd doesn't need to be changed, 1 if spd has been
1732 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1733 */
1734static int ata_set_sata_spd(struct ata_port *ap)
1735{
1736 u32 scontrol;
1737
1738 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1739 return -EOPNOTSUPP;
1740
1741 scontrol = scr_read(ap, SCR_CONTROL);
1742 if (!__ata_set_sata_spd_needed(ap, &scontrol))
1743 return 0;
1744
1745 scr_write(ap, SCR_CONTROL, scontrol);
1746 return 1;
1747}
1748
452503f9
AC		 1749/*
1750 * This mode timing computation functionality is ported over from
1751 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1752 */
1753/*
1754 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1755 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1756 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1757 * is currently supported only by Maxtor drives.
452503f9
AC		 1758 */
1759
1760static const struct ata_timing ata_timing[] = {
1761
1762 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1763 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1764 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1765 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1766
1767 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1768 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1769 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1770
1771/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1772
452503f9
AC		 1773 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1774 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1775 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1776
452503f9
AC		 1777 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1778 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1779 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1780
1781/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1782 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1783 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1784
1785 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1786 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1787 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1788
1789/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1790
1791 { 0xFF }
1792};
1793
1794#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1795#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1796
1797static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1798{
1799 q->setup = EZ(t->setup * 1000, T);
1800 q->act8b = EZ(t->act8b * 1000, T);
1801 q->rec8b = EZ(t->rec8b * 1000, T);
1802 q->cyc8b = EZ(t->cyc8b * 1000, T);
1803 q->active = EZ(t->active * 1000, T);
1804 q->recover = EZ(t->recover * 1000, T);
1805 q->cycle = EZ(t->cycle * 1000, T);
1806 q->udma = EZ(t->udma * 1000, UT);
1807}
1808
1809void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1810 struct ata_timing *m, unsigned int what)
1811{
1812 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1813 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1814 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1815 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1816 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1817 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1818 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1819 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1820}
1821
1822static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1823{
1824 const struct ata_timing *t;
1825
1826 for (t = ata_timing; t->mode != speed; t++)
91190758 1827 if (t->mode == 0xFF)
452503f9 1828 return NULL;
2e9edbf8 1829 return t;
452503f9
AC		 1830}
1831
1832int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1833 struct ata_timing *t, int T, int UT)
1834{
1835 const struct ata_timing *s;
1836 struct ata_timing p;
1837
1838 /*
2e9edbf8 1839 * Find the mode.
75b1f2f8 1840 */
452503f9
AC		 1841
1842 if (!(s = ata_timing_find_mode(speed)))
1843 return -EINVAL;
1844
75b1f2f8
AL		 1845 memcpy(t, s, sizeof(*s));
1846
452503f9
AC		 1847 /*
1848 * If the drive is an EIDE drive, it can tell us it needs extended
1849 * PIO/MW_DMA cycle timing.
1850 */
1851
1852 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1853 memset(&p, 0, sizeof(p));
1854 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1855 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1856 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1857 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1858 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1859 }
1860 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1861 }
1862
1863 /*
1864 * Convert the timing to bus clock counts.
1865 */
1866
75b1f2f8 1867 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1868
1869 /*
c893a3ae
RD		 1870 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1871 * S.M.A.R.T * and some other commands. We have to ensure that the
1872 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1873 */
1874
1875 if (speed > XFER_PIO_4) {
1876 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1877 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1878 }
1879
1880 /*
c893a3ae 1881 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1882 */
1883
1884 if (t->act8b + t->rec8b < t->cyc8b) {
1885 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1886 t->rec8b = t->cyc8b - t->act8b;
1887 }
1888
1889 if (t->active + t->recover < t->cycle) {
1890 t->active += (t->cycle - (t->active + t->recover)) / 2;
1891 t->recover = t->cycle - t->active;
1892 }
1893
1894 return 0;
1895}
1896
cf176e1a
TH		 1897/**
1898 * ata_down_xfermask_limit - adjust dev xfer masks downward
1899 * @ap: Port associated with device @dev
1900 * @dev: Device to adjust xfer masks
1901 * @force_pio0: Force PIO0
1902 *
1903 * Adjust xfer masks of @dev downward. Note that this function
1904 * does not apply the change. Invoking ata_set_mode() afterwards
1905 * will apply the limit.
1906 *
1907 * LOCKING:
1908 * Inherited from caller.
1909 *
1910 * RETURNS:
1911 * 0 on success, negative errno on failure
1912 */
1913static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1914 int force_pio0)
1915{
1916 unsigned long xfer_mask;
1917 int highbit;
1918
1919 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1920 dev->udma_mask);
1921
1922 if (!xfer_mask)
1923 goto fail;
1924 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1925 if (xfer_mask & ATA_MASK_UDMA)
1926 xfer_mask &= ~ATA_MASK_MWDMA;
1927
1928 highbit = fls(xfer_mask) - 1;
1929 xfer_mask &= ~(1 << highbit);
1930 if (force_pio0)
1931 xfer_mask &= 1 << ATA_SHIFT_PIO;
1932 if (!xfer_mask)
1933 goto fail;
1934
1935 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1936 &dev->udma_mask);
1937
1938 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1939 ap->id, dev->devno, ata_mode_string(xfer_mask));
1940
1941 return 0;
1942
1943 fail:
1944 return -EINVAL;
1945}
1946
83206a29 1947static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1948{
83206a29
TH		 1949 unsigned int err_mask;
1950 int rc;
1da177e4
LT		 1951
1952 if (dev->xfer_shift == ATA_SHIFT_PIO)
1953 dev->flags |= ATA_DFLAG_PIO;
1954
83206a29
TH		 1955 err_mask = ata_dev_set_xfermode(ap, dev);
1956 if (err_mask) {
1957 printk(KERN_ERR
1958 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1959 ap->id, err_mask);
1960 return -EIO;
1961 }
1da177e4 1962
83206a29 1963 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1964 if (rc)
83206a29 1965 return rc;
48a8a14f 1966
23e71c3d
TH		 1967 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1968 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1969
1970 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1971 ap->id, dev->devno,
1972 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1973 return 0;
1da177e4
LT		 1974}
1975
1da177e4
LT		 1976/**
1977 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1978 * @ap: port on which timings will be programmed
e82cbdb9 1979 * @r_failed_dev: out paramter for failed device
1da177e4 1980 *
e82cbdb9
TH		 1981 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1982 * ata_set_mode() fails, pointer to the failing device is
1983 * returned in @r_failed_dev.
780a87f7 1984 *
1da177e4 1985 * LOCKING:
0cba632b 1986 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1987 *
1988 * RETURNS:
1989 * 0 on success, negative errno otherwise
1da177e4 1990 */
e82cbdb9 1991static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1992{
e8e0619f 1993 struct ata_device *dev;
e82cbdb9 1994 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1995
a6d5a51c
TH		 1996 /* step 1: calculate xfer_mask */
1997 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 1998 unsigned int pio_mask, dma_mask;
a6d5a51c 1999
e8e0619f
TH		 2000 dev = &ap->device[i];
2001
e1211e3f 2002 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2003 continue;
2004
acf356b1 2005 ata_dev_xfermask(ap, dev);
1da177e4 2006
acf356b1
TH		 2007 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2008 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2009 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2010 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2011
4f65977d 2012 found = 1;
5444a6f4
AC		 2013 if (dev->dma_mode)
2014 used_dma = 1;
a6d5a51c 2015 }
4f65977d 2016 if (!found)
e82cbdb9 2017 goto out;
a6d5a51c
TH		 2018
2019 /* step 2: always set host PIO timings */
e8e0619f
TH		 2020 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2021 dev = &ap->device[i];
2022 if (!ata_dev_enabled(dev))
2023 continue;
2024
2025 if (!dev->pio_mode) {
2026 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2027 ap->id, dev->devno);
2028 rc = -EINVAL;
e82cbdb9 2029 goto out;
e8e0619f
TH		 2030 }
2031
2032 dev->xfer_mode = dev->pio_mode;
2033 dev->xfer_shift = ATA_SHIFT_PIO;
2034 if (ap->ops->set_piomode)
2035 ap->ops->set_piomode(ap, dev);
2036 }
1da177e4 2037
a6d5a51c 2038 /* step 3: set host DMA timings */
e8e0619f
TH		 2039 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2040 dev = &ap->device[i];
2041
2042 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2043 continue;
2044
2045 dev->xfer_mode = dev->dma_mode;
2046 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2047 if (ap->ops->set_dmamode)
2048 ap->ops->set_dmamode(ap, dev);
2049 }
1da177e4
LT		 2050
2051 /* step 4: update devices' xfer mode */
83206a29 2052 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2053 dev = &ap->device[i];
1da177e4 2054
e1211e3f 2055 if (!ata_dev_enabled(dev))
83206a29
TH		 2056 continue;
2057
5bbc53f4
TH		 2058 rc = ata_dev_set_mode(ap, dev);
2059 if (rc)
e82cbdb9 2060 goto out;
83206a29 2061 }
1da177e4 2062
e8e0619f
TH		 2063 /* Record simplex status. If we selected DMA then the other
2064 * host channels are not permitted to do so.
5444a6f4 2065 */
5444a6f4
AC		 2066 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2067 ap->host_set->simplex_claimed = 1;
2068
e8e0619f 2069 /* step5: chip specific finalisation */
1da177e4
LT		 2070 if (ap->ops->post_set_mode)
2071 ap->ops->post_set_mode(ap);
2072
e82cbdb9
TH		 2073 out:
2074 if (rc)
2075 *r_failed_dev = dev;
2076 return rc;
1da177e4
LT		 2077}
2078
1fdffbce
JG		 2079/**
2080 * ata_tf_to_host - issue ATA taskfile to host controller
2081 * @ap: port to which command is being issued
2082 * @tf: ATA taskfile register set
2083 *
2084 * Issues ATA taskfile register set to ATA host controller,
2085 * with proper synchronization with interrupt handler and
2086 * other threads.
2087 *
2088 * LOCKING:
2089 * spin_lock_irqsave(host_set lock)
2090 */
2091
2092static inline void ata_tf_to_host(struct ata_port *ap,
2093 const struct ata_taskfile *tf)
2094{
2095 ap->ops->tf_load(ap, tf);
2096 ap->ops->exec_command(ap, tf);
2097}
2098
1da177e4
LT		 2099/**
2100 * ata_busy_sleep - sleep until BSY clears, or timeout
2101 * @ap: port containing status register to be polled
2102 * @tmout_pat: impatience timeout
2103 * @tmout: overall timeout
2104 *
780a87f7
JG		 2105 * Sleep until ATA Status register bit BSY clears,
2106 * or a timeout occurs.
2107 *
2108 * LOCKING: None.
1da177e4
LT		 2109 */
2110
6f8b9958
TH		 2111unsigned int ata_busy_sleep (struct ata_port *ap,
2112 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2113{
2114 unsigned long timer_start, timeout;
2115 u8 status;
2116
2117 status = ata_busy_wait(ap, ATA_BUSY, 300);
2118 timer_start = jiffies;
2119 timeout = timer_start + tmout_pat;
2120 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2121 msleep(50);
2122 status = ata_busy_wait(ap, ATA_BUSY, 3);
2123 }
2124
2125 if (status & ATA_BUSY)
2126 printk(KERN_WARNING "ata%u is slow to respond, "
2127 "please be patient\n", ap->id);
2128
2129 timeout = timer_start + tmout;
2130 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2131 msleep(50);
2132 status = ata_chk_status(ap);
2133 }
2134
2135 if (status & ATA_BUSY) {
2136 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2137 ap->id, tmout / HZ);
2138 return 1;
2139 }
2140
2141 return 0;
2142}
2143
2144static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2145{
2146 struct ata_ioports *ioaddr = &ap->ioaddr;
2147 unsigned int dev0 = devmask & (1 << 0);
2148 unsigned int dev1 = devmask & (1 << 1);
2149 unsigned long timeout;
2150
2151 /* if device 0 was found in ata_devchk, wait for its
2152 * BSY bit to clear
2153 */
2154 if (dev0)
2155 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2156
2157 /* if device 1 was found in ata_devchk, wait for
2158 * register access, then wait for BSY to clear
2159 */
2160 timeout = jiffies + ATA_TMOUT_BOOT;
2161 while (dev1) {
2162 u8 nsect, lbal;
2163
2164 ap->ops->dev_select(ap, 1);
2165 if (ap->flags & ATA_FLAG_MMIO) {
2166 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2167 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2168 } else {
2169 nsect = inb(ioaddr->nsect_addr);
2170 lbal = inb(ioaddr->lbal_addr);
2171 }
2172 if ((nsect == 1) && (lbal == 1))
2173 break;
2174 if (time_after(jiffies, timeout)) {
2175 dev1 = 0;
2176 break;
2177 }
2178 msleep(50); /* give drive a breather */
2179 }
2180 if (dev1)
2181 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2182
2183 /* is all this really necessary? */
2184 ap->ops->dev_select(ap, 0);
2185 if (dev1)
2186 ap->ops->dev_select(ap, 1);
2187 if (dev0)
2188 ap->ops->dev_select(ap, 0);
2189}
2190
1da177e4
LT		 2191static unsigned int ata_bus_softreset(struct ata_port *ap,
2192 unsigned int devmask)
2193{
2194 struct ata_ioports *ioaddr = &ap->ioaddr;
2195
2196 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2197
2198 /* software reset. causes dev0 to be selected */
2199 if (ap->flags & ATA_FLAG_MMIO) {
2200 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2201 udelay(20); /* FIXME: flush */
2202 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2203 udelay(20); /* FIXME: flush */
2204 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2205 } else {
2206 outb(ap->ctl, ioaddr->ctl_addr);
2207 udelay(10);
2208 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2209 udelay(10);
2210 outb(ap->ctl, ioaddr->ctl_addr);
2211 }
2212
2213 /* spec mandates ">= 2ms" before checking status.
2214 * We wait 150ms, because that was the magic delay used for
2215 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2216 * between when the ATA command register is written, and then
2217 * status is checked. Because waiting for "a while" before
2218 * checking status is fine, post SRST, we perform this magic
2219 * delay here as well.
09c7ad79
AC		 2220 *
2221 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2222 */
2223 msleep(150);
2224
2e9edbf8 2225 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2226 * the bus shows 0xFF because the odd clown forgets the D7
2227 * pulldown resistor.
2228 */
09c7ad79 2229 if (ata_check_status(ap) == 0xFF)
298a41ca 2230 return AC_ERR_OTHER;
09c7ad79 2231
1da177e4
LT		 2232 ata_bus_post_reset(ap, devmask);
2233
2234 return 0;
2235}
2236
2237/**
2238 * ata_bus_reset - reset host port and associated ATA channel
2239 * @ap: port to reset
2240 *
2241 * This is typically the first time we actually start issuing
2242 * commands to the ATA channel. We wait for BSY to clear, then
2243 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2244 * result. Determine what devices, if any, are on the channel
2245 * by looking at the device 0/1 error register. Look at the signature
2246 * stored in each device's taskfile registers, to determine if
2247 * the device is ATA or ATAPI.
2248 *
2249 * LOCKING:
0cba632b
JG		 2250 * PCI/etc. bus probe sem.
2251 * Obtains host_set lock.
1da177e4
LT		 2252 *
2253 * SIDE EFFECTS:
198e0fed 2254 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2255 */
2256
2257void ata_bus_reset(struct ata_port *ap)
2258{
2259 struct ata_ioports *ioaddr = &ap->ioaddr;
2260 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2261 u8 err;
aec5c3c1 2262 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2263
2264 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2265
2266 /* determine if device 0/1 are present */
2267 if (ap->flags & ATA_FLAG_SATA_RESET)
2268 dev0 = 1;
2269 else {
2270 dev0 = ata_devchk(ap, 0);
2271 if (slave_possible)
2272 dev1 = ata_devchk(ap, 1);
2273 }
2274
2275 if (dev0)
2276 devmask |= (1 << 0);
2277 if (dev1)
2278 devmask |= (1 << 1);
2279
2280 /* select device 0 again */
2281 ap->ops->dev_select(ap, 0);
2282
2283 /* issue bus reset */
2284 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2285 if (ata_bus_softreset(ap, devmask))
2286 goto err_out;
1da177e4
LT		 2287
2288 /*
2289 * determine by signature whether we have ATA or ATAPI devices
2290 */
b4dc7623 2291 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2292 if ((slave_possible) && (err != 0x81))
b4dc7623 2293 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2294
2295 /* re-enable interrupts */
2296 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2297 ata_irq_on(ap);
2298
2299 /* is double-select really necessary? */
2300 if (ap->device[1].class != ATA_DEV_NONE)
2301 ap->ops->dev_select(ap, 1);
2302 if (ap->device[0].class != ATA_DEV_NONE)
2303 ap->ops->dev_select(ap, 0);
2304
2305 /* if no devices were detected, disable this port */
2306 if ((ap->device[0].class == ATA_DEV_NONE) &&
2307 (ap->device[1].class == ATA_DEV_NONE))
2308 goto err_out;
2309
2310 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2311 /* set up device control for ATA_FLAG_SATA_RESET */
2312 if (ap->flags & ATA_FLAG_MMIO)
2313 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2314 else
2315 outb(ap->ctl, ioaddr->ctl_addr);
2316 }
2317
2318 DPRINTK("EXIT\n");
2319 return;
2320
2321err_out:
2322 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2323 ap->ops->port_disable(ap);
2324
2325 DPRINTK("EXIT\n");
2326}
2327
7a7921e8
TH		 2328static int sata_phy_resume(struct ata_port *ap)
2329{
2330 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2331 u32 scontrol, sstatus;
7a7921e8 2332
852ee16a
TH		 2333 scontrol = scr_read(ap, SCR_CONTROL);
2334 scontrol = (scontrol & 0x0f0) | 0x300;
2335 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2336
2337 /* Wait for phy to become ready, if necessary. */
2338 do {
2339 msleep(200);
2340 sstatus = scr_read(ap, SCR_STATUS);
2341 if ((sstatus & 0xf) != 1)
2342 return 0;
2343 } while (time_before(jiffies, timeout));
2344
2345 return -1;
2346}
2347
8a19ac89
TH		 2348/**
2349 * ata_std_probeinit - initialize probing
2350 * @ap: port to be probed
2351 *
2352 * @ap is about to be probed. Initialize it. This function is
2353 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2354 *
2355 * NOTE!!! Do not use this function as probeinit if a low level
2356 * driver implements only hardreset. Just pass NULL as probeinit
2357 * in that case. Using this function is probably okay but doing
2358 * so makes reset sequence different from the original
2359 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2360 */
17efc5f7 2361void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2362{
17efc5f7 2363 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2364 u32 spd;
2365
8a19ac89 2366 sata_phy_resume(ap);
1c3fae4d
TH		 2367
2368 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2369 if (spd)
2370 ap->sata_spd_limit &= (1 << spd) - 1;
2371
3a39746a
TH		 2372 if (sata_dev_present(ap))
2373 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2374 }
8a19ac89
TH		 2375}
2376
c2bd5804
TH		 2377/**
2378 * ata_std_softreset - reset host port via ATA SRST
2379 * @ap: port to reset
2380 * @verbose: fail verbosely
2381 * @classes: resulting classes of attached devices
2382 *
2383 * Reset host port using ATA SRST. This function is to be used
2384 * as standard callback for ata_drive_*_reset() functions.
2385 *
2386 * LOCKING:
2387 * Kernel thread context (may sleep)
2388 *
2389 * RETURNS:
2390 * 0 on success, -errno otherwise.
2391 */
2392int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2393{
2394 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2395 unsigned int devmask = 0, err_mask;
2396 u8 err;
2397
2398 DPRINTK("ENTER\n");
2399
3a39746a
TH		 2400 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2401 classes[0] = ATA_DEV_NONE;
2402 goto out;
2403 }
2404
c2bd5804
TH		 2405 /* determine if device 0/1 are present */
2406 if (ata_devchk(ap, 0))
2407 devmask |= (1 << 0);
2408 if (slave_possible && ata_devchk(ap, 1))
2409 devmask |= (1 << 1);
2410
c2bd5804
TH		 2411 /* select device 0 again */
2412 ap->ops->dev_select(ap, 0);
2413
2414 /* issue bus reset */
2415 DPRINTK("about to softreset, devmask=%x\n", devmask);
2416 err_mask = ata_bus_softreset(ap, devmask);
2417 if (err_mask) {
2418 if (verbose)
2419 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2420 ap->id, err_mask);
2421 else
2422 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2423 err_mask);
2424 return -EIO;
2425 }
2426
2427 /* determine by signature whether we have ATA or ATAPI devices */
2428 classes[0] = ata_dev_try_classify(ap, 0, &err);
2429 if (slave_possible && err != 0x81)
2430 classes[1] = ata_dev_try_classify(ap, 1, &err);
2431
3a39746a 2432 out:
c2bd5804
TH		 2433 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2434 return 0;
2435}
2436
2437/**
2438 * sata_std_hardreset - reset host port via SATA phy reset
2439 * @ap: port to reset
2440 * @verbose: fail verbosely
2441 * @class: resulting class of attached device
2442 *
2443 * SATA phy-reset host port using DET bits of SControl register.
2444 * This function is to be used as standard callback for
2445 * ata_drive_*_reset().
2446 *
2447 * LOCKING:
2448 * Kernel thread context (may sleep)
2449 *
2450 * RETURNS:
2451 * 0 on success, -errno otherwise.
2452 */
2453int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2454{
852ee16a
TH		 2455 u32 scontrol;
2456
c2bd5804
TH		 2457 DPRINTK("ENTER\n");
2458
1c3fae4d
TH		 2459 if (ata_set_sata_spd_needed(ap)) {
2460 /* SATA spec says nothing about how to reconfigure
2461 * spd. To be on the safe side, turn off phy during
2462 * reconfiguration. This works for at least ICH7 AHCI
2463 * and Sil3124.
2464 */
2465 scontrol = scr_read(ap, SCR_CONTROL);
2466 scontrol = (scontrol & 0x0f0) | 0x302;
2467 scr_write_flush(ap, SCR_CONTROL, scontrol);
2468
2469 ata_set_sata_spd(ap);
2470 }
2471
2472 /* issue phy wake/reset */
852ee16a
TH		 2473 scontrol = scr_read(ap, SCR_CONTROL);
2474 scontrol = (scontrol & 0x0f0) | 0x301;
2475 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2476
1c3fae4d 2477 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2478 * 10.4.2 says at least 1 ms.
2479 */
2480 msleep(1);
2481
1c3fae4d 2482 /* bring phy back */
7a7921e8 2483 sata_phy_resume(ap);
c2bd5804 2484
c2bd5804
TH		 2485 /* TODO: phy layer with polling, timeouts, etc. */
2486 if (!sata_dev_present(ap)) {
2487 *class = ATA_DEV_NONE;
2488 DPRINTK("EXIT, link offline\n");
2489 return 0;
2490 }
2491
2492 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2493 if (verbose)
2494 printk(KERN_ERR "ata%u: COMRESET failed "
2495 "(device not ready)\n", ap->id);
2496 else
2497 DPRINTK("EXIT, device not ready\n");
2498 return -EIO;
2499 }
2500
3a39746a
TH		 2501 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2502
c2bd5804
TH		 2503 *class = ata_dev_try_classify(ap, 0, NULL);
2504
2505 DPRINTK("EXIT, class=%u\n", *class);
2506 return 0;
2507}
2508
2509/**
2510 * ata_std_postreset - standard postreset callback
2511 * @ap: the target ata_port
2512 * @classes: classes of attached devices
2513 *
2514 * This function is invoked after a successful reset. Note that
2515 * the device might have been reset more than once using
2516 * different reset methods before postreset is invoked.
c2bd5804
TH		 2517 *
2518 * This function is to be used as standard callback for
2519 * ata_drive_*_reset().
2520 *
2521 * LOCKING:
2522 * Kernel thread context (may sleep)
2523 */
2524void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2525{
2526 DPRINTK("ENTER\n");
2527
56497bd5 2528 /* set cable type if it isn't already set */
c2bd5804
TH		 2529 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2530 ap->cbl = ATA_CBL_SATA;
2531
2532 /* print link status */
2533 if (ap->cbl == ATA_CBL_SATA)
2534 sata_print_link_status(ap);
2535
3a39746a
TH		 2536 /* re-enable interrupts */
2537 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2538 ata_irq_on(ap);
c2bd5804
TH		 2539
2540 /* is double-select really necessary? */
2541 if (classes[0] != ATA_DEV_NONE)
2542 ap->ops->dev_select(ap, 1);
2543 if (classes[1] != ATA_DEV_NONE)
2544 ap->ops->dev_select(ap, 0);
2545
3a39746a
TH		 2546 /* bail out if no device is present */
2547 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2548 DPRINTK("EXIT, no device\n");
2549 return;
2550 }
2551
2552 /* set up device control */
2553 if (ap->ioaddr.ctl_addr) {
2554 if (ap->flags & ATA_FLAG_MMIO)
2555 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2556 else
2557 outb(ap->ctl, ap->ioaddr.ctl_addr);
2558 }
c2bd5804
TH		 2559
2560 DPRINTK("EXIT\n");
2561}
2562
2563/**
2564 * ata_std_probe_reset - standard probe reset method
2565 * @ap: prot to perform probe-reset
2566 * @classes: resulting classes of attached devices
2567 *
2568 * The stock off-the-shelf ->probe_reset method.
2569 *
2570 * LOCKING:
2571 * Kernel thread context (may sleep)
2572 *
2573 * RETURNS:
2574 * 0 on success, -errno otherwise.
2575 */
2576int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2577{
2578 ata_reset_fn_t hardreset;
2579
2580 hardreset = NULL;
b911fc3a 2581 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2582 hardreset = sata_std_hardreset;
2583
8a19ac89 2584 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2585 ata_std_softreset, hardreset,
c2bd5804
TH		 2586 ata_std_postreset, classes);
2587}
2588
9974e7cc
TH		 2589static int ata_do_reset(struct ata_port *ap,
2590 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2591 int verbose, unsigned int *classes)
a62c0fc5
TH		 2592{
2593 int i, rc;
2594
2595 for (i = 0; i < ATA_MAX_DEVICES; i++)
2596 classes[i] = ATA_DEV_UNKNOWN;
2597
9974e7cc 2598 rc = reset(ap, verbose, classes);
a62c0fc5
TH		 2599 if (rc)
2600 return rc;
2601
2602 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2603 * is complete and convert all ATA_DEV_UNKNOWN to
2604 * ATA_DEV_NONE.
2605 */
2606 for (i = 0; i < ATA_MAX_DEVICES; i++)
2607 if (classes[i] != ATA_DEV_UNKNOWN)
2608 break;
2609
2610 if (i < ATA_MAX_DEVICES)
2611 for (i = 0; i < ATA_MAX_DEVICES; i++)
2612 if (classes[i] == ATA_DEV_UNKNOWN)
2613 classes[i] = ATA_DEV_NONE;
2614
2615 if (postreset)
2616 postreset(ap, classes);
2617
9974e7cc 2618 return 0;
a62c0fc5
TH		 2619}
2620
2621/**
2622 * ata_drive_probe_reset - Perform probe reset with given methods
2623 * @ap: port to reset
7944ea95 2624 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2625 * @softreset: softreset method (can be NULL)
2626 * @hardreset: hardreset method (can be NULL)
2627 * @postreset: postreset method (can be NULL)
2628 * @classes: resulting classes of attached devices
2629 *
2630 * Reset the specified port and classify attached devices using
2631 * given methods. This function prefers softreset but tries all
2632 * possible reset sequences to reset and classify devices. This
2633 * function is intended to be used for constructing ->probe_reset
2634 * callback by low level drivers.
2635 *
2636 * Reset methods should follow the following rules.
2637 *
2638 * - Return 0 on sucess, -errno on failure.
2639 * - If classification is supported, fill classes[] with
2640 * recognized class codes.
2641 * - If classification is not supported, leave classes[] alone.
2642 * - If verbose is non-zero, print error message on failure;
2643 * otherwise, shut up.
2644 *
2645 * LOCKING:
2646 * Kernel thread context (may sleep)
2647 *
2648 * RETURNS:
2649 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2650 * if classification fails, and any error code from reset
2651 * methods.
2652 */
7944ea95 2653int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2654 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2655 ata_postreset_fn_t postreset, unsigned int *classes)
2656{
2657 int rc = -EINVAL;
2658
7944ea95
TH		 2659 if (probeinit)
2660 probeinit(ap);
2661
90dac02c 2662 if (softreset && !ata_set_sata_spd_needed(ap)) {
9974e7cc
TH		 2663 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2664 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2665 goto done;
edbabd86
TH		 2666 printk(KERN_INFO "ata%u: softreset failed, will try "
2667 "hardreset in 5 secs\n", ap->id);
2668 ssleep(5);
a62c0fc5
TH		 2669 }
2670
2671 if (!hardreset)
9974e7cc 2672 goto done;
a62c0fc5 2673
90dac02c
TH		 2674 while (1) {
2675 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2676 if (rc == 0) {
2677 if (classes[0] != ATA_DEV_UNKNOWN)
2678 goto done;
2679 break;
2680 }
2681
2682 if (ata_down_sata_spd_limit(ap))
2683 goto done;
edbabd86
TH		 2684
2685 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2686 "in 5 secs\n", ap->id);
2687 ssleep(5);
90dac02c 2688 }
a62c0fc5 2689
edbabd86
TH		 2690 if (softreset) {
2691 printk(KERN_INFO "ata%u: hardreset succeeded without "
2692 "classification, will retry softreset in 5 secs\n",
2693 ap->id);
2694 ssleep(5);
2695
9974e7cc 2696 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
edbabd86 2697 }
a62c0fc5 2698
9974e7cc
TH		 2699 done:
2700 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2701 rc = -ENODEV;
a62c0fc5
TH		 2702 return rc;
2703}
2704
623a3128
TH		 2705/**
2706 * ata_dev_same_device - Determine whether new ID matches configured device
2707 * @ap: port on which the device to compare against resides
2708 * @dev: device to compare against
2709 * @new_class: class of the new device
2710 * @new_id: IDENTIFY page of the new device
2711 *
2712 * Compare @new_class and @new_id against @dev and determine
2713 * whether @dev is the device indicated by @new_class and
2714 * @new_id.
2715 *
2716 * LOCKING:
2717 * None.
2718 *
2719 * RETURNS:
2720 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2721 */
2722static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2723 unsigned int new_class, const u16 *new_id)
2724{
2725 const u16 *old_id = dev->id;
2726 unsigned char model[2][41], serial[2][21];
2727 u64 new_n_sectors;
2728
2729 if (dev->class != new_class) {
2730 printk(KERN_INFO
2731 "ata%u: dev %u class mismatch %d != %d\n",
2732 ap->id, dev->devno, dev->class, new_class);
2733 return 0;
2734 }
2735
2736 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2737 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2738 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2739 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2740 new_n_sectors = ata_id_n_sectors(new_id);
2741
2742 if (strcmp(model[0], model[1])) {
2743 printk(KERN_INFO
2744 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2745 ap->id, dev->devno, model[0], model[1]);
2746 return 0;
2747 }
2748
2749 if (strcmp(serial[0], serial[1])) {
2750 printk(KERN_INFO
2751 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2752 ap->id, dev->devno, serial[0], serial[1]);
2753 return 0;
2754 }
2755
2756 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2757 printk(KERN_INFO
2758 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2759 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2760 (unsigned long long)new_n_sectors);
2761 return 0;
2762 }
2763
2764 return 1;
2765}
2766
2767/**
2768 * ata_dev_revalidate - Revalidate ATA device
2769 * @ap: port on which the device to revalidate resides
2770 * @dev: device to revalidate
2771 * @post_reset: is this revalidation after reset?
2772 *
2773 * Re-read IDENTIFY page and make sure @dev is still attached to
2774 * the port.
2775 *
2776 * LOCKING:
2777 * Kernel thread context (may sleep)
2778 *
2779 * RETURNS:
2780 * 0 on success, negative errno otherwise
2781 */
2782int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2783 int post_reset)
2784{
5eb45c02
TH		 2785 unsigned int class = dev->class;
2786 u16 *id = NULL;
623a3128
TH		 2787 int rc;
2788
5eb45c02
TH		 2789 if (!ata_dev_enabled(dev)) {
2790 rc = -ENODEV;
2791 goto fail;
2792 }
623a3128
TH		 2793
2794 /* allocate & read ID data */
2795 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2796 if (rc)
2797 goto fail;
2798
2799 /* is the device still there? */
2800 if (!ata_dev_same_device(ap, dev, class, id)) {
2801 rc = -ENODEV;
2802 goto fail;
2803 }
2804
2805 kfree(dev->id);
2806 dev->id = id;
2807
2808 /* configure device according to the new ID */
5eb45c02
TH		 2809 rc = ata_dev_configure(ap, dev, 0);
2810 if (rc == 0)
2811 return 0;
623a3128
TH		 2812
2813 fail:
2814 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2815 ap->id, dev->devno, rc);
2816 kfree(id);
2817 return rc;
2818}
2819
98ac62de 2820static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2821 "WDC AC11000H", NULL,
2822 "WDC AC22100H", NULL,
2823 "WDC AC32500H", NULL,
2824 "WDC AC33100H", NULL,
2825 "WDC AC31600H", NULL,
2826 "WDC AC32100H", "24.09P07",
2827 "WDC AC23200L", "21.10N21",
2828 "Compaq CRD-8241B", NULL,
2829 "CRD-8400B", NULL,
2830 "CRD-8480B", NULL,
2831 "CRD-8482B", NULL,
2832 "CRD-84", NULL,
2833 "SanDisk SDP3B", NULL,
2834 "SanDisk SDP3B-64", NULL,
2835 "SANYO CD-ROM CRD", NULL,
2836 "HITACHI CDR-8", NULL,
2e9edbf8 2837 "HITACHI CDR-8335", NULL,
f4b15fef 2838 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2839 "Toshiba CD-ROM XM-6202B", NULL,
2840 "TOSHIBA CD-ROM XM-1702BC", NULL,
2841 "CD-532E-A", NULL,
2842 "E-IDE CD-ROM CR-840", NULL,
2843 "CD-ROM Drive/F5A", NULL,
2844 "WPI CDD-820", NULL,
f4b15fef 2845 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2846 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2847 "SanDisk SDP3B-64", NULL,
2848 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2849 "_NEC DV5800A", NULL,
2850 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2851};
2e9edbf8 2852
f4b15fef
AC		 2853static int ata_strim(char *s, size_t len)
2854{
2855 len = strnlen(s, len);
2856
2857 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2858 while ((len > 0) && (s[len - 1] == ' ')) {
2859 len--;
2860 s[len] = 0;
2861 }
2862 return len;
2863}
1da177e4 2864
057ace5e 2865static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2866{
f4b15fef
AC		 2867 unsigned char model_num[40];
2868 unsigned char model_rev[16];
2869 unsigned int nlen, rlen;
1da177e4
LT		 2870 int i;
2871
f4b15fef
AC		 2872 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2873 sizeof(model_num));
2874 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2875 sizeof(model_rev));
2876 nlen = ata_strim(model_num, sizeof(model_num));
2877 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2878
f4b15fef
AC		 2879 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2880 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2881 if (ata_dma_blacklist[i+1] == NULL)
2882 return 1;
2883 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2884 return 1;
2885 }
2886 }
1da177e4
LT		 2887 return 0;
2888}
2889
a6d5a51c
TH		 2890/**
2891 * ata_dev_xfermask - Compute supported xfermask of the given device
2892 * @ap: Port on which the device to compute xfermask for resides
2893 * @dev: Device to compute xfermask for
2894 *
acf356b1
TH		 2895 * Compute supported xfermask of @dev and store it in
2896 * dev->*_mask. This function is responsible for applying all
2897 * known limits including host controller limits, device
2898 * blacklist, etc...
a6d5a51c 2899 *
600511e8
TH		 2900 * FIXME: The current implementation limits all transfer modes to
2901 * the fastest of the lowested device on the port. This is not
05c8e0ac 2902 * required on most controllers.
600511e8 2903 *
a6d5a51c
TH		 2904 * LOCKING:
2905 * None.
a6d5a51c 2906 */
acf356b1 2907static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2908{
5444a6f4 2909 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2910 unsigned long xfer_mask;
2911 int i;
1da177e4 2912
565083e1
TH		 2913 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2914 ap->mwdma_mask, ap->udma_mask);
2915
2916 /* Apply cable rule here. Don't apply it early because when
2917 * we handle hot plug the cable type can itself change.
2918 */
2919 if (ap->cbl == ATA_CBL_PATA40)
2920 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2921
5444a6f4 2922 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2923 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2924 struct ata_device *d = &ap->device[i];
565083e1
TH		 2925
2926 if (ata_dev_absent(d))
2927 continue;
2928
2929 if (ata_dev_disabled(d)) {
2930 /* to avoid violating device selection timing */
2931 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2932 UINT_MAX, UINT_MAX);
a6d5a51c 2933 continue;
565083e1
TH		 2934 }
2935
2936 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2937 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2938 xfer_mask &= ata_id_xfermask(d->id);
2939 if (ata_dma_blacklisted(d))
2940 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2941 }
2942
a6d5a51c
TH		 2943 if (ata_dma_blacklisted(dev))
2944 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2945 "disabling DMA\n", ap->id, dev->devno);
2946
5444a6f4
AC		 2947 if (hs->flags & ATA_HOST_SIMPLEX) {
2948 if (hs->simplex_claimed)
2949 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2950 }
565083e1 2951
5444a6f4
AC		 2952 if (ap->ops->mode_filter)
2953 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2954
565083e1
TH		 2955 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2956 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2957}
2958
1da177e4
LT		 2959/**
2960 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2961 * @ap: Port associated with device @dev
2962 * @dev: Device to which command will be sent
2963 *
780a87f7
JG		 2964 * Issue SET FEATURES - XFER MODE command to device @dev
2965 * on port @ap.
2966 *
1da177e4 2967 * LOCKING:
0cba632b 2968 * PCI/etc. bus probe sem.
83206a29
TH		 2969 *
2970 * RETURNS:
2971 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2972 */
2973
83206a29
TH		 2974static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2975 struct ata_device *dev)
1da177e4 2976{
a0123703 2977 struct ata_taskfile tf;
83206a29 2978 unsigned int err_mask;
1da177e4
LT		 2979
2980 /* set up set-features taskfile */
2981 DPRINTK("set features - xfer mode\n");
2982
a0123703
TH		 2983 ata_tf_init(ap, &tf, dev->devno);
2984 tf.command = ATA_CMD_SET_FEATURES;
2985 tf.feature = SETFEATURES_XFER;
2986 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2987 tf.protocol = ATA_PROT_NODATA;
2988 tf.nsect = dev->xfer_mode;
1da177e4 2989
83206a29 2990 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2991
83206a29
TH		 2992 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2993 return err_mask;
1da177e4
LT		 2994}
2995
8bf62ece
AL		 2996/**
2997 * ata_dev_init_params - Issue INIT DEV PARAMS command
2998 * @ap: Port associated with device @dev
2999 * @dev: Device to which command will be sent
3000 *
3001 * LOCKING:
6aff8f1f
TH		 3002 * Kernel thread context (may sleep)
3003 *
3004 * RETURNS:
3005 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 3006 */
3007
6aff8f1f 3008static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3009 struct ata_device *dev,
3010 u16 heads,
3011 u16 sectors)
8bf62ece 3012{
a0123703 3013 struct ata_taskfile tf;
6aff8f1f 3014 unsigned int err_mask;
8bf62ece
AL		 3015
3016 /* Number of sectors per track 1-255. Number of heads 1-16 */
3017 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3018 return AC_ERR_INVALID;
8bf62ece
AL		 3019
3020 /* set up init dev params taskfile */
3021 DPRINTK("init dev params \n");
3022
a0123703
TH		 3023 ata_tf_init(ap, &tf, dev->devno);
3024 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3025 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3026 tf.protocol = ATA_PROT_NODATA;
3027 tf.nsect = sectors;
3028 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3029
6aff8f1f 3030 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 3031
6aff8f1f
TH		 3032 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3033 return err_mask;
8bf62ece
AL		 3034}
3035
1da177e4 3036/**
0cba632b
JG		 3037 * ata_sg_clean - Unmap DMA memory associated with command
3038 * @qc: Command containing DMA memory to be released
3039 *
3040 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3041 *
3042 * LOCKING:
0cba632b 3043 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3044 */
3045
3046static void ata_sg_clean(struct ata_queued_cmd *qc)
3047{
3048 struct ata_port *ap = qc->ap;
cedc9a47 3049 struct scatterlist *sg = qc->__sg;
1da177e4 3050 int dir = qc->dma_dir;
cedc9a47 3051 void *pad_buf = NULL;
1da177e4 3052
a4631474
TH		 3053 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3054 WARN_ON(sg == NULL);
1da177e4
LT		 3055
3056 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3057 WARN_ON(qc->n_elem > 1);
1da177e4 3058
2c13b7ce 3059 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3060
cedc9a47
JG		 3061 /* if we padded the buffer out to 32-bit bound, and data
3062 * xfer direction is from-device, we must copy from the
3063 * pad buffer back into the supplied buffer
3064 */
3065 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3066 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3067
3068 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3069 if (qc->n_elem)
2f1f610b 3070 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3071 /* restore last sg */
3072 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3073 if (pad_buf) {
3074 struct scatterlist *psg = &qc->pad_sgent;
3075 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3076 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3077 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3078 }
3079 } else {
2e242fa9 3080 if (qc->n_elem)
2f1f610b 3081 dma_unmap_single(ap->dev,
e1410f2d
JG		 3082 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3083 dir);
cedc9a47
JG		 3084 /* restore sg */
3085 sg->length += qc->pad_len;
3086 if (pad_buf)
3087 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3088 pad_buf, qc->pad_len);
3089 }
1da177e4
LT		 3090
3091 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3092 qc->__sg = NULL;
1da177e4
LT		 3093}
3094
3095/**
3096 * ata_fill_sg - Fill PCI IDE PRD table
3097 * @qc: Metadata associated with taskfile to be transferred
3098 *
780a87f7
JG		 3099 * Fill PCI IDE PRD (scatter-gather) table with segments
3100 * associated with the current disk command.
3101 *
1da177e4 3102 * LOCKING:
780a87f7 3103 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3104 *
3105 */
3106static void ata_fill_sg(struct ata_queued_cmd *qc)
3107{
1da177e4 3108 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3109 struct scatterlist *sg;
3110 unsigned int idx;
1da177e4 3111
a4631474 3112 WARN_ON(qc->__sg == NULL);
f131883e 3113 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3114
3115 idx = 0;
cedc9a47 3116 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3117 u32 addr, offset;
3118 u32 sg_len, len;
3119
3120 /* determine if physical DMA addr spans 64K boundary.
3121 * Note h/w doesn't support 64-bit, so we unconditionally
3122 * truncate dma_addr_t to u32.
3123 */
3124 addr = (u32) sg_dma_address(sg);
3125 sg_len = sg_dma_len(sg);
3126
3127 while (sg_len) {
3128 offset = addr & 0xffff;
3129 len = sg_len;
3130 if ((offset + sg_len) > 0x10000)
3131 len = 0x10000 - offset;
3132
3133 ap->prd[idx].addr = cpu_to_le32(addr);
3134 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3135 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3136
3137 idx++;
3138 sg_len -= len;
3139 addr += len;
3140 }
3141 }
3142
3143 if (idx)
3144 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3145}
3146/**
3147 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3148 * @qc: Metadata associated with taskfile to check
3149 *
780a87f7
JG		 3150 * Allow low-level driver to filter ATA PACKET commands, returning
3151 * a status indicating whether or not it is OK to use DMA for the
3152 * supplied PACKET command.
3153 *
1da177e4 3154 * LOCKING:
0cba632b
JG		 3155 * spin_lock_irqsave(host_set lock)
3156 *
1da177e4
LT		 3157 * RETURNS: 0 when ATAPI DMA can be used
3158 * nonzero otherwise
3159 */
3160int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3161{
3162 struct ata_port *ap = qc->ap;
3163 int rc = 0; /* Assume ATAPI DMA is OK by default */
3164
3165 if (ap->ops->check_atapi_dma)
3166 rc = ap->ops->check_atapi_dma(qc);
3167
3168 return rc;
3169}
3170/**
3171 * ata_qc_prep - Prepare taskfile for submission
3172 * @qc: Metadata associated with taskfile to be prepared
3173 *
780a87f7
JG		 3174 * Prepare ATA taskfile for submission.
3175 *
1da177e4
LT		 3176 * LOCKING:
3177 * spin_lock_irqsave(host_set lock)
3178 */
3179void ata_qc_prep(struct ata_queued_cmd *qc)
3180{
3181 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3182 return;
3183
3184 ata_fill_sg(qc);
3185}
3186
e46834cd
BK		 3187void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3188
0cba632b
JG		 3189/**
3190 * ata_sg_init_one - Associate command with memory buffer
3191 * @qc: Command to be associated
3192 * @buf: Memory buffer
3193 * @buflen: Length of memory buffer, in bytes.
3194 *
3195 * Initialize the data-related elements of queued_cmd @qc
3196 * to point to a single memory buffer, @buf of byte length @buflen.
3197 *
3198 * LOCKING:
3199 * spin_lock_irqsave(host_set lock)
3200 */
3201
1da177e4
LT		 3202void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3203{
3204 struct scatterlist *sg;
3205
3206 qc->flags |= ATA_QCFLAG_SINGLE;
3207
3208 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3209 qc->__sg = &qc->sgent;
1da177e4 3210 qc->n_elem = 1;
cedc9a47 3211 qc->orig_n_elem = 1;
1da177e4
LT		 3212 qc->buf_virt = buf;
3213
cedc9a47 3214 sg = qc->__sg;
f0612bbc 3215 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3216}
3217
0cba632b
JG		 3218/**
3219 * ata_sg_init - Associate command with scatter-gather table.
3220 * @qc: Command to be associated
3221 * @sg: Scatter-gather table.
3222 * @n_elem: Number of elements in s/g table.
3223 *
3224 * Initialize the data-related elements of queued_cmd @qc
3225 * to point to a scatter-gather table @sg, containing @n_elem
3226 * elements.
3227 *
3228 * LOCKING:
3229 * spin_lock_irqsave(host_set lock)
3230 */
3231
1da177e4
LT		 3232void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3233 unsigned int n_elem)
3234{
3235 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3236 qc->__sg = sg;
1da177e4 3237 qc->n_elem = n_elem;
cedc9a47 3238 qc->orig_n_elem = n_elem;
1da177e4
LT		 3239}
3240
3241/**
0cba632b
JG		 3242 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3243 * @qc: Command with memory buffer to be mapped.
3244 *
3245 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3246 *
3247 * LOCKING:
3248 * spin_lock_irqsave(host_set lock)
3249 *
3250 * RETURNS:
0cba632b 3251 * Zero on success, negative on error.
1da177e4
LT		 3252 */
3253
3254static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3255{
3256 struct ata_port *ap = qc->ap;
3257 int dir = qc->dma_dir;
cedc9a47 3258 struct scatterlist *sg = qc->__sg;
1da177e4 3259 dma_addr_t dma_address;
2e242fa9 3260 int trim_sg = 0;
1da177e4 3261
cedc9a47
JG		 3262 /* we must lengthen transfers to end on a 32-bit boundary */
3263 qc->pad_len = sg->length & 3;
3264 if (qc->pad_len) {
3265 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3266 struct scatterlist *psg = &qc->pad_sgent;
3267
a4631474 3268 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3269
3270 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3271
3272 if (qc->tf.flags & ATA_TFLAG_WRITE)
3273 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3274 qc->pad_len);
3275
3276 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3277 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3278 /* trim sg */
3279 sg->length -= qc->pad_len;
2e242fa9
TH		 3280 if (sg->length == 0)
3281 trim_sg = 1;
cedc9a47
JG		 3282
3283 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3284 sg->length, qc->pad_len);
3285 }
3286
2e242fa9
TH		 3287 if (trim_sg) {
3288 qc->n_elem--;
e1410f2d
JG		 3289 goto skip_map;
3290 }
3291
2f1f610b 3292 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3293 sg->length, dir);
537a95d9
TH		 3294 if (dma_mapping_error(dma_address)) {
3295 /* restore sg */
3296 sg->length += qc->pad_len;
1da177e4 3297 return -1;
537a95d9 3298 }
1da177e4
LT		 3299
3300 sg_dma_address(sg) = dma_address;
32529e01 3301 sg_dma_len(sg) = sg->length;
1da177e4 3302
2e242fa9 3303skip_map:
1da177e4
LT		 3304 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3305 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3306
3307 return 0;
3308}
3309
3310/**
0cba632b
JG		 3311 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3312 * @qc: Command with scatter-gather table to be mapped.
3313 *
3314 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3315 *
3316 * LOCKING:
3317 * spin_lock_irqsave(host_set lock)
3318 *
3319 * RETURNS:
0cba632b 3320 * Zero on success, negative on error.
1da177e4
LT		 3321 *
3322 */
3323
3324static int ata_sg_setup(struct ata_queued_cmd *qc)
3325{
3326 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3327 struct scatterlist *sg = qc->__sg;
3328 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3329 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3330
3331 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3332 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3333
cedc9a47
JG		 3334 /* we must lengthen transfers to end on a 32-bit boundary */
3335 qc->pad_len = lsg->length & 3;
3336 if (qc->pad_len) {
3337 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3338 struct scatterlist *psg = &qc->pad_sgent;
3339 unsigned int offset;
3340
a4631474 3341 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3342
3343 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3344
3345 /*
3346 * psg->page/offset are used to copy to-be-written
3347 * data in this function or read data in ata_sg_clean.
3348 */
3349 offset = lsg->offset + lsg->length - qc->pad_len;
3350 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3351 psg->offset = offset_in_page(offset);
3352
3353 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3354 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3355 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3356 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3357 }
3358
3359 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3360 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3361 /* trim last sg */
3362 lsg->length -= qc->pad_len;
e1410f2d
JG		 3363 if (lsg->length == 0)
3364 trim_sg = 1;
cedc9a47
JG		 3365
3366 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3367 qc->n_elem - 1, lsg->length, qc->pad_len);
3368 }
3369
e1410f2d
JG		 3370 pre_n_elem = qc->n_elem;
3371 if (trim_sg && pre_n_elem)
3372 pre_n_elem--;
3373
3374 if (!pre_n_elem) {
3375 n_elem = 0;
3376 goto skip_map;
3377 }
3378
1da177e4 3379 dir = qc->dma_dir;
2f1f610b 3380 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3381 if (n_elem < 1) {
3382 /* restore last sg */
3383 lsg->length += qc->pad_len;
1da177e4 3384 return -1;
537a95d9 3385 }
1da177e4
LT		 3386
3387 DPRINTK("%d sg elements mapped\n", n_elem);
3388
e1410f2d 3389skip_map:
1da177e4
LT		 3390 qc->n_elem = n_elem;
3391
3392 return 0;
3393}
3394
40e8c82c
TH		 3395/**
3396 * ata_poll_qc_complete - turn irq back on and finish qc
3397 * @qc: Command to complete
8e8b77dd 3398 * @err_mask: ATA status register content
40e8c82c
TH		 3399 *
3400 * LOCKING:
3401 * None. (grabs host lock)
3402 */
3403
a22e2eb0 3404void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3405{
3406 struct ata_port *ap = qc->ap;
b8f6153e 3407 unsigned long flags;
40e8c82c 3408
b8f6153e 3409 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3410 ap->flags &= ~ATA_FLAG_NOINTR;
3411 ata_irq_on(ap);
a22e2eb0 3412 ata_qc_complete(qc);
b8f6153e 3413 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3414}
3415
1da177e4 3416/**
c893a3ae 3417 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3418 * @ap: the target ata_port
1da177e4
LT		 3419 *
3420 * LOCKING:
0cba632b 3421 * None. (executing in kernel thread context)
1da177e4
LT		 3422 *
3423 * RETURNS:
6f0ef4fa 3424 * timeout value to use
1da177e4
LT		 3425 */
3426
3427static unsigned long ata_pio_poll(struct ata_port *ap)
3428{
c14b8331 3429 struct ata_queued_cmd *qc;
1da177e4 3430 u8 status;
14be71f4
AL		 3431 unsigned int poll_state = HSM_ST_UNKNOWN;
3432 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3433
c14b8331 3434 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3435 WARN_ON(qc == NULL);
c14b8331 3436
14be71f4
AL		 3437 switch (ap->hsm_task_state) {
3438 case HSM_ST:
3439 case HSM_ST_POLL:
3440 poll_state = HSM_ST_POLL;
3441 reg_state = HSM_ST;
1da177e4 3442 break;
14be71f4
AL		 3443 case HSM_ST_LAST:
3444 case HSM_ST_LAST_POLL:
3445 poll_state = HSM_ST_LAST_POLL;
3446 reg_state = HSM_ST_LAST;
1da177e4
LT		 3447 break;
3448 default:
3449 BUG();
3450 break;
3451 }
3452
3453 status = ata_chk_status(ap);
3454 if (status & ATA_BUSY) {
3455 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3456 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3457 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3458 return 0;
3459 }
14be71f4 3460 ap->hsm_task_state = poll_state;
1da177e4
LT		 3461 return ATA_SHORT_PAUSE;
3462 }
3463
14be71f4 3464 ap->hsm_task_state = reg_state;
1da177e4
LT		 3465 return 0;
3466}
3467
3468/**
6f0ef4fa
RD		 3469 * ata_pio_complete - check if drive is busy or idle
3470 * @ap: the target ata_port
1da177e4
LT		 3471 *
3472 * LOCKING:
0cba632b 3473 * None. (executing in kernel thread context)
7fb6ec28
JG		 3474 *
3475 * RETURNS:
3476 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3477 */
3478
7fb6ec28 3479static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3480{
3481 struct ata_queued_cmd *qc;
3482 u8 drv_stat;
3483
3484 /*
31433ea3
AC		 3485 * This is purely heuristic. This is a fast path. Sometimes when
3486 * we enter, BSY will be cleared in a chk-status or two. If not,
3487 * the drive is probably seeking or something. Snooze for a couple
3488 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3489 * HSM_ST_POLL state.
1da177e4 3490 */
fe79e683
AL		 3491 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3492 if (drv_stat & ATA_BUSY) {
1da177e4 3493 msleep(2);
fe79e683
AL		 3494 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3495 if (drv_stat & ATA_BUSY) {
14be71f4 3496 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3497 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3498 return 0;
1da177e4
LT		 3499 }
3500 }
3501
c14b8331 3502 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3503 WARN_ON(qc == NULL);
c14b8331 3504
1da177e4
LT		 3505 drv_stat = ata_wait_idle(ap);
3506 if (!ata_ok(drv_stat)) {
1c848984 3507 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3508 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3509 return 0;
1da177e4
LT		 3510 }
3511
14be71f4 3512 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3513
a4631474 3514 WARN_ON(qc->err_mask);
a22e2eb0 3515 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3516
3517 /* another command may start at this point */
3518
3519 return 1;
1da177e4
LT		 3520}
3521
0baab86b
EF		 3522
3523/**
c893a3ae 3524 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3525 * @buf: Buffer to swap
3526 * @buf_words: Number of 16-bit words in buffer.
3527 *
3528 * Swap halves of 16-bit words if needed to convert from
3529 * little-endian byte order to native cpu byte order, or
3530 * vice-versa.
3531 *
3532 * LOCKING:
6f0ef4fa 3533 * Inherited from caller.
0baab86b 3534 */
1da177e4
LT		 3535void swap_buf_le16(u16 *buf, unsigned int buf_words)
3536{
3537#ifdef __BIG_ENDIAN
3538 unsigned int i;
3539
3540 for (i = 0; i < buf_words; i++)
3541 buf[i] = le16_to_cpu(buf[i]);
3542#endif /* __BIG_ENDIAN */
3543}
3544
6ae4cfb5
AL		 3545/**
3546 * ata_mmio_data_xfer - Transfer data by MMIO
3547 * @ap: port to read/write
3548 * @buf: data buffer
3549 * @buflen: buffer length
344babaa 3550 * @write_data: read/write
6ae4cfb5
AL		 3551 *
3552 * Transfer data from/to the device data register by MMIO.
3553 *
3554 * LOCKING:
3555 * Inherited from caller.
6ae4cfb5
AL		 3556 */
3557
1da177e4
LT		 3558static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3559 unsigned int buflen, int write_data)
3560{
3561 unsigned int i;
3562 unsigned int words = buflen >> 1;
3563 u16 *buf16 = (u16 *) buf;
3564 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3565
6ae4cfb5 3566 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3567 if (write_data) {
3568 for (i = 0; i < words; i++)
3569 writew(le16_to_cpu(buf16[i]), mmio);
3570 } else {
3571 for (i = 0; i < words; i++)
3572 buf16[i] = cpu_to_le16(readw(mmio));
3573 }
6ae4cfb5
AL		 3574
3575 /* Transfer trailing 1 byte, if any. */
3576 if (unlikely(buflen & 0x01)) {
3577 u16 align_buf[1] = { 0 };
3578 unsigned char *trailing_buf = buf + buflen - 1;
3579
3580 if (write_data) {
3581 memcpy(align_buf, trailing_buf, 1);
3582 writew(le16_to_cpu(align_buf[0]), mmio);
3583 } else {
3584 align_buf[0] = cpu_to_le16(readw(mmio));
3585 memcpy(trailing_buf, align_buf, 1);
3586 }
3587 }
1da177e4
LT		 3588}
3589
6ae4cfb5
AL		 3590/**
3591 * ata_pio_data_xfer - Transfer data by PIO
3592 * @ap: port to read/write
3593 * @buf: data buffer
3594 * @buflen: buffer length
344babaa 3595 * @write_data: read/write
6ae4cfb5
AL		 3596 *
3597 * Transfer data from/to the device data register by PIO.
3598 *
3599 * LOCKING:
3600 * Inherited from caller.
6ae4cfb5
AL		 3601 */
3602
1da177e4
LT		 3603static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3604 unsigned int buflen, int write_data)
3605{
6ae4cfb5 3606 unsigned int words = buflen >> 1;
1da177e4 3607
6ae4cfb5 3608 /* Transfer multiple of 2 bytes */
1da177e4 3609 if (write_data)
6ae4cfb5 3610 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3611 else
6ae4cfb5
AL		 3612 insw(ap->ioaddr.data_addr, buf, words);
3613
3614 /* Transfer trailing 1 byte, if any. */
3615 if (unlikely(buflen & 0x01)) {
3616 u16 align_buf[1] = { 0 };
3617 unsigned char *trailing_buf = buf + buflen - 1;
3618
3619 if (write_data) {
3620 memcpy(align_buf, trailing_buf, 1);
3621 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3622 } else {
3623 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3624 memcpy(trailing_buf, align_buf, 1);
3625 }
3626 }
1da177e4
LT		 3627}
3628
6ae4cfb5
AL		 3629/**
3630 * ata_data_xfer - Transfer data from/to the data register.
3631 * @ap: port to read/write
3632 * @buf: data buffer
3633 * @buflen: buffer length
3634 * @do_write: read/write
3635 *
3636 * Transfer data from/to the device data register.
3637 *
3638 * LOCKING:
3639 * Inherited from caller.
6ae4cfb5
AL		 3640 */
3641
1da177e4
LT		 3642static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3643 unsigned int buflen, int do_write)
3644{
a1bd9e68
AC		 3645 /* Make the crap hardware pay the costs not the good stuff */
3646 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3647 unsigned long flags;
3648 local_irq_save(flags);
3649 if (ap->flags & ATA_FLAG_MMIO)
3650 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3651 else
3652 ata_pio_data_xfer(ap, buf, buflen, do_write);
3653 local_irq_restore(flags);
3654 } else {
3655 if (ap->flags & ATA_FLAG_MMIO)
3656 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3657 else
3658 ata_pio_data_xfer(ap, buf, buflen, do_write);
3659 }
1da177e4
LT		 3660}
3661
6ae4cfb5
AL		 3662/**
3663 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3664 * @qc: Command on going
3665 *
3666 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3667 *
3668 * LOCKING:
3669 * Inherited from caller.
3670 */
3671
1da177e4
LT		 3672static void ata_pio_sector(struct ata_queued_cmd *qc)
3673{
3674 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3675 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3676 struct ata_port *ap = qc->ap;
3677 struct page *page;
3678 unsigned int offset;
3679 unsigned char *buf;
3680
3681 if (qc->cursect == (qc->nsect - 1))
14be71f4 3682 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3683
3684 page = sg[qc->cursg].page;
3685 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3686
3687 /* get the current page and offset */
3688 page = nth_page(page, (offset >> PAGE_SHIFT));
3689 offset %= PAGE_SIZE;
3690
3691 buf = kmap(page) + offset;
3692
3693 qc->cursect++;
3694 qc->cursg_ofs++;
3695
32529e01 3696 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3697 qc->cursg++;
3698 qc->cursg_ofs = 0;
3699 }
3700
3701 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3702
3703 /* do the actual data transfer */
3704 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3705 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3706
3707 kunmap(page);
3708}
3709
6ae4cfb5
AL		 3710/**
3711 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3712 * @qc: Command on going
3713 * @bytes: number of bytes
3714 *
3715 * Transfer Transfer data from/to the ATAPI device.
3716 *
3717 * LOCKING:
3718 * Inherited from caller.
3719 *
3720 */
3721
1da177e4
LT		 3722static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3723{
3724 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3725 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3726 struct ata_port *ap = qc->ap;
3727 struct page *page;
3728 unsigned char *buf;
3729 unsigned int offset, count;
3730
563a6e1f 3731 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3732 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3733
3734next_sg:
563a6e1f 3735 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3736 /*
563a6e1f
AL		 3737 * The end of qc->sg is reached and the device expects
3738 * more data to transfer. In order not to overrun qc->sg
3739 * and fulfill length specified in the byte count register,
3740 * - for read case, discard trailing data from the device
3741 * - for write case, padding zero data to the device
3742 */
3743 u16 pad_buf[1] = { 0 };
3744 unsigned int words = bytes >> 1;
3745 unsigned int i;
3746
3747 if (words) /* warning if bytes > 1 */
7fb6ec28 3748 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3749 ap->id, bytes);
3750
3751 for (i = 0; i < words; i++)
3752 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3753
14be71f4 3754 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3755 return;
3756 }
3757
cedc9a47 3758 sg = &qc->__sg[qc->cursg];
1da177e4 3759
1da177e4
LT		 3760 page = sg->page;
3761 offset = sg->offset + qc->cursg_ofs;
3762
3763 /* get the current page and offset */
3764 page = nth_page(page, (offset >> PAGE_SHIFT));
3765 offset %= PAGE_SIZE;
3766
6952df03 3767 /* don't overrun current sg */
32529e01 3768 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3769
3770 /* don't cross page boundaries */
3771 count = min(count, (unsigned int)PAGE_SIZE - offset);
3772
3773 buf = kmap(page) + offset;
3774
3775 bytes -= count;
3776 qc->curbytes += count;
3777 qc->cursg_ofs += count;
3778
32529e01 3779 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3780 qc->cursg++;
3781 qc->cursg_ofs = 0;
3782 }
3783
3784 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3785
3786 /* do the actual data transfer */
3787 ata_data_xfer(ap, buf, count, do_write);
3788
3789 kunmap(page);
3790
563a6e1f 3791 if (bytes)
1da177e4 3792 goto next_sg;
1da177e4
LT		 3793}
3794
6ae4cfb5
AL		 3795/**
3796 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3797 * @qc: Command on going
3798 *
3799 * Transfer Transfer data from/to the ATAPI device.
3800 *
3801 * LOCKING:
3802 * Inherited from caller.
6ae4cfb5
AL		 3803 */
3804
1da177e4
LT		 3805static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3806{
3807 struct ata_port *ap = qc->ap;
3808 struct ata_device *dev = qc->dev;
3809 unsigned int ireason, bc_lo, bc_hi, bytes;
3810 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3811
3812 ap->ops->tf_read(ap, &qc->tf);
3813 ireason = qc->tf.nsect;
3814 bc_lo = qc->tf.lbam;
3815 bc_hi = qc->tf.lbah;
3816 bytes = (bc_hi << 8) | bc_lo;
3817
3818 /* shall be cleared to zero, indicating xfer of data */
3819 if (ireason & (1 << 0))
3820 goto err_out;
3821
3822 /* make sure transfer direction matches expected */
3823 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3824 if (do_write != i_write)
3825 goto err_out;
3826
3827 __atapi_pio_bytes(qc, bytes);
3828
3829 return;
3830
3831err_out:
3832 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3833 ap->id, dev->devno);
11a56d24 3834 qc->err_mask |= AC_ERR_HSM;
14be71f4 3835 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3836}
3837
3838/**
6f0ef4fa
RD		 3839 * ata_pio_block - start PIO on a block
3840 * @ap: the target ata_port
1da177e4
LT		 3841 *
3842 * LOCKING:
0cba632b 3843 * None. (executing in kernel thread context)
1da177e4
LT		 3844 */
3845
3846static void ata_pio_block(struct ata_port *ap)
3847{
3848 struct ata_queued_cmd *qc;
3849 u8 status;
3850
3851 /*
6f0ef4fa 3852 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3853 * Sometimes when we enter, BSY will be cleared in
3854 * a chk-status or two. If not, the drive is probably seeking
3855 * or something. Snooze for a couple msecs, then
3856 * chk-status again. If still busy, fall back to
14be71f4 3857 * HSM_ST_POLL state.
1da177e4
LT		 3858 */
3859 status = ata_busy_wait(ap, ATA_BUSY, 5);
3860 if (status & ATA_BUSY) {
3861 msleep(2);
3862 status = ata_busy_wait(ap, ATA_BUSY, 10);
3863 if (status & ATA_BUSY) {
14be71f4 3864 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3865 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3866 return;
3867 }
3868 }
3869
3870 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3871 WARN_ON(qc == NULL);
1da177e4 3872
fe79e683
AL		 3873 /* check error */
3874 if (status & (ATA_ERR | ATA_DF)) {
3875 qc->err_mask |= AC_ERR_DEV;
3876 ap->hsm_task_state = HSM_ST_ERR;
3877 return;
3878 }
3879
3880 /* transfer data if any */
1da177e4 3881 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3882 /* DRQ=0 means no more data to transfer */
1da177e4 3883 if ((status & ATA_DRQ) == 0) {
14be71f4 3884 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3885 return;
3886 }
3887
3888 atapi_pio_bytes(qc);
3889 } else {
3890 /* handle BSY=0, DRQ=0 as error */
3891 if ((status & ATA_DRQ) == 0) {
11a56d24 3892 qc->err_mask |= AC_ERR_HSM;
14be71f4 3893 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3894 return;
3895 }
3896
3897 ata_pio_sector(qc);
3898 }
3899}
3900
3901static void ata_pio_error(struct ata_port *ap)
3902{
3903 struct ata_queued_cmd *qc;
a7dac447 3904
1da177e4 3905 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3906 WARN_ON(qc == NULL);
1da177e4 3907
0565c26d 3908 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3909 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3910 ap->id, qc->dev->devno);
0565c26d 3911
2e9edbf8 3912 /* make sure qc->err_mask is available to
1c848984
AL		 3913 * know what's wrong and recover
3914 */
a4631474 3915 WARN_ON(qc->err_mask == 0);
1c848984 3916
14be71f4 3917 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3918
a22e2eb0 3919 ata_poll_qc_complete(qc);
1da177e4
LT		 3920}
3921
3922static void ata_pio_task(void *_data)
3923{
3924 struct ata_port *ap = _data;
7fb6ec28
JG		 3925 unsigned long timeout;
3926 int qc_completed;
3927
3928fsm_start:
3929 timeout = 0;
3930 qc_completed = 0;
1da177e4 3931
14be71f4
AL		 3932 switch (ap->hsm_task_state) {
3933 case HSM_ST_IDLE:
1da177e4
LT		 3934 return;
3935
14be71f4 3936 case HSM_ST:
1da177e4
LT		 3937 ata_pio_block(ap);
3938 break;
3939
14be71f4 3940 case HSM_ST_LAST:
7fb6ec28 3941 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3942 break;
3943
14be71f4
AL		 3944 case HSM_ST_POLL:
3945 case HSM_ST_LAST_POLL:
1da177e4
LT		 3946 timeout = ata_pio_poll(ap);
3947 break;
3948
14be71f4
AL		 3949 case HSM_ST_TMOUT:
3950 case HSM_ST_ERR:
1da177e4
LT		 3951 ata_pio_error(ap);
3952 return;
3953 }
3954
3955 if (timeout)
8061f5f0 3956 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3957 else if (!qc_completed)
3958 goto fsm_start;
1da177e4
LT		 3959}
3960
8061f5f0
TH		 3961/**
3962 * atapi_packet_task - Write CDB bytes to hardware
3963 * @_data: Port to which ATAPI device is attached.
3964 *
3965 * When device has indicated its readiness to accept
3966 * a CDB, this function is called. Send the CDB.
3967 * If DMA is to be performed, exit immediately.
3968 * Otherwise, we are in polling mode, so poll
3969 * status under operation succeeds or fails.
3970 *
3971 * LOCKING:
3972 * Kernel thread context (may sleep)
3973 */
3974
3975static void atapi_packet_task(void *_data)
3976{
3977 struct ata_port *ap = _data;
3978 struct ata_queued_cmd *qc;
3979 u8 status;
3980
3981 qc = ata_qc_from_tag(ap, ap->active_tag);
3982 WARN_ON(qc == NULL);
3983 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3984
3985 /* sleep-wait for BSY to clear */
3986 DPRINTK("busy wait\n");
3987 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3988 qc->err_mask |= AC_ERR_TIMEOUT;
3989 goto err_out;
3990 }
3991
3992 /* make sure DRQ is set */
3993 status = ata_chk_status(ap);
3994 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3995 qc->err_mask |= AC_ERR_HSM;
3996 goto err_out;
3997 }
3998
3999 /* send SCSI cdb */
4000 DPRINTK("send cdb\n");
4001 WARN_ON(qc->dev->cdb_len < 12);
4002
4003 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4004 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4005 unsigned long flags;
4006
4007 /* Once we're done issuing command and kicking bmdma,
4008 * irq handler takes over. To not lose irq, we need
4009 * to clear NOINTR flag before sending cdb, but
4010 * interrupt handler shouldn't be invoked before we're
4011 * finished. Hence, the following locking.
4012 */
4013 spin_lock_irqsave(&ap->host_set->lock, flags);
4014 ap->flags &= ~ATA_FLAG_NOINTR;
4015 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4016 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4017 ap->ops->bmdma_start(qc); /* initiate bmdma */
4018 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4019 } else {
4020 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4021
4022 /* PIO commands are handled by polling */
4023 ap->hsm_task_state = HSM_ST;
4024 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4025 }
4026
4027 return;
4028
4029err_out:
4030 ata_poll_qc_complete(qc);
4031}
4032
1da177e4
LT		 4033/**
4034 * ata_qc_timeout - Handle timeout of queued command
4035 * @qc: Command that timed out
4036 *
4037 * Some part of the kernel (currently, only the SCSI layer)
4038 * has noticed that the active command on port @ap has not
4039 * completed after a specified length of time. Handle this
4040 * condition by disabling DMA (if necessary) and completing
4041 * transactions, with error if necessary.
4042 *
4043 * This also handles the case of the "lost interrupt", where
4044 * for some reason (possibly hardware bug, possibly driver bug)
4045 * an interrupt was not delivered to the driver, even though the
4046 * transaction completed successfully.
4047 *
4048 * LOCKING:
0cba632b 4049 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 4050 */
4051
4052static void ata_qc_timeout(struct ata_queued_cmd *qc)
4053{
4054 struct ata_port *ap = qc->ap;
b8f6153e 4055 struct ata_host_set *host_set = ap->host_set;
1da177e4 4056 u8 host_stat = 0, drv_stat;
b8f6153e 4057 unsigned long flags;
1da177e4
LT		 4058
4059 DPRINTK("ENTER\n");
4060
c18d06f8
TH		 4061 ap->hsm_task_state = HSM_ST_IDLE;
4062
b8f6153e
JG		 4063 spin_lock_irqsave(&host_set->lock, flags);
4064
1da177e4
LT		 4065 switch (qc->tf.protocol) {
4066
4067 case ATA_PROT_DMA:
4068 case ATA_PROT_ATAPI_DMA:
4069 host_stat = ap->ops->bmdma_status(ap);
4070
4071 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4072 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4073
4074 /* fall through */
4075
4076 default:
4077 ata_altstatus(ap);
4078 drv_stat = ata_chk_status(ap);
4079
4080 /* ack bmdma irq events */
4081 ap->ops->irq_clear(ap);
4082
4083 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
4084 ap->id, qc->tf.command, drv_stat, host_stat);
4085
4086 /* complete taskfile transaction */
a22e2eb0 4087 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 4088 break;
4089 }
b8f6153e
JG		 4090
4091 spin_unlock_irqrestore(&host_set->lock, flags);
4092
a72ec4ce
TH		 4093 ata_eh_qc_complete(qc);
4094
1da177e4
LT		 4095 DPRINTK("EXIT\n");
4096}
4097
4098/**
4099 * ata_eng_timeout - Handle timeout of queued command
4100 * @ap: Port on which timed-out command is active
4101 *
4102 * Some part of the kernel (currently, only the SCSI layer)
4103 * has noticed that the active command on port @ap has not
4104 * completed after a specified length of time. Handle this
4105 * condition by disabling DMA (if necessary) and completing
4106 * transactions, with error if necessary.
4107 *
4108 * This also handles the case of the "lost interrupt", where
4109 * for some reason (possibly hardware bug, possibly driver bug)
4110 * an interrupt was not delivered to the driver, even though the
4111 * transaction completed successfully.
4112 *
4113 * LOCKING:
4114 * Inherited from SCSI layer (none, can sleep)
4115 */
4116
4117void ata_eng_timeout(struct ata_port *ap)
4118{
1da177e4
LT		 4119 DPRINTK("ENTER\n");
4120
f6379020 4121 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 4122
1da177e4
LT		 4123 DPRINTK("EXIT\n");
4124}
4125
4126/**
4127 * ata_qc_new - Request an available ATA command, for queueing
4128 * @ap: Port associated with device @dev
4129 * @dev: Device from whom we request an available command structure
4130 *
4131 * LOCKING:
0cba632b 4132 * None.
1da177e4
LT		 4133 */
4134
4135static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4136{
4137 struct ata_queued_cmd *qc = NULL;
4138 unsigned int i;
4139
4140 for (i = 0; i < ATA_MAX_QUEUE; i++)
4141 if (!test_and_set_bit(i, &ap->qactive)) {
4142 qc = ata_qc_from_tag(ap, i);
4143 break;
4144 }
4145
4146 if (qc)
4147 qc->tag = i;
4148
4149 return qc;
4150}
4151
4152/**
4153 * ata_qc_new_init - Request an available ATA command, and initialize it
4154 * @ap: Port associated with device @dev
4155 * @dev: Device from whom we request an available command structure
4156 *
4157 * LOCKING:
0cba632b 4158 * None.
1da177e4
LT		 4159 */
4160
4161struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4162 struct ata_device *dev)
4163{
4164 struct ata_queued_cmd *qc;
4165
4166 qc = ata_qc_new(ap);
4167 if (qc) {
1da177e4
LT		 4168 qc->scsicmd = NULL;
4169 qc->ap = ap;
4170 qc->dev = dev;
1da177e4 4171
2c13b7ce 4172 ata_qc_reinit(qc);
1da177e4
LT		 4173 }
4174
4175 return qc;
4176}
4177
1da177e4
LT		 4178/**
4179 * ata_qc_free - free unused ata_queued_cmd
4180 * @qc: Command to complete
4181 *
4182 * Designed to free unused ata_queued_cmd object
4183 * in case something prevents using it.
4184 *
4185 * LOCKING:
0cba632b 4186 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4187 */
4188void ata_qc_free(struct ata_queued_cmd *qc)
4189{
4ba946e9
TH		 4190 struct ata_port *ap = qc->ap;
4191 unsigned int tag;
4192
a4631474 4193 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4194
4ba946e9
TH		 4195 qc->flags = 0;
4196 tag = qc->tag;
4197 if (likely(ata_tag_valid(tag))) {
4198 if (tag == ap->active_tag)
4199 ap->active_tag = ATA_TAG_POISON;
4200 qc->tag = ATA_TAG_POISON;
4201 clear_bit(tag, &ap->qactive);
4202 }
1da177e4
LT		 4203}
4204
76014427 4205void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4206{
a4631474
TH		 4207 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4208 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4209
4210 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4211 ata_sg_clean(qc);
4212
3f3791d3
AL		 4213 /* atapi: mark qc as inactive to prevent the interrupt handler
4214 * from completing the command twice later, before the error handler
4215 * is called. (when rc != 0 and atapi request sense is needed)
4216 */
4217 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4218
1da177e4 4219 /* call completion callback */
77853bf2 4220 qc->complete_fn(qc);
1da177e4
LT		 4221}
4222
4223static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4224{
4225 struct ata_port *ap = qc->ap;
4226
4227 switch (qc->tf.protocol) {
4228 case ATA_PROT_DMA:
4229 case ATA_PROT_ATAPI_DMA:
4230 return 1;
4231
4232 case ATA_PROT_ATAPI:
4233 case ATA_PROT_PIO:
1da177e4
LT		 4234 if (ap->flags & ATA_FLAG_PIO_DMA)
4235 return 1;
4236
4237 /* fall through */
4238
4239 default:
4240 return 0;
4241 }
4242
4243 /* never reached */
4244}
4245
4246/**
4247 * ata_qc_issue - issue taskfile to device
4248 * @qc: command to issue to device
4249 *
4250 * Prepare an ATA command to submission to device.
4251 * This includes mapping the data into a DMA-able
4252 * area, filling in the S/G table, and finally
4253 * writing the taskfile to hardware, starting the command.
4254 *
4255 * LOCKING:
4256 * spin_lock_irqsave(host_set lock)
1da177e4 4257 */
8e0e694a 4258void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4259{
4260 struct ata_port *ap = qc->ap;
4261
e4a70e76
TH		 4262 qc->ap->active_tag = qc->tag;
4263 qc->flags |= ATA_QCFLAG_ACTIVE;
4264
1da177e4
LT		 4265 if (ata_should_dma_map(qc)) {
4266 if (qc->flags & ATA_QCFLAG_SG) {
4267 if (ata_sg_setup(qc))
8e436af9 4268 goto sg_err;
1da177e4
LT		 4269 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4270 if (ata_sg_setup_one(qc))
8e436af9 4271 goto sg_err;
1da177e4
LT		 4272 }
4273 } else {
4274 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4275 }
4276
4277 ap->ops->qc_prep(qc);
4278
8e0e694a
TH		 4279 qc->err_mask |= ap->ops->qc_issue(qc);
4280 if (unlikely(qc->err_mask))
4281 goto err;
4282 return;
1da177e4 4283
8e436af9
TH		 4284sg_err:
4285 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4286 qc->err_mask |= AC_ERR_SYSTEM;
4287err:
4288 ata_qc_complete(qc);
1da177e4
LT		 4289}
4290
4291/**
4292 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4293 * @qc: command to issue to device
4294 *
4295 * Using various libata functions and hooks, this function
4296 * starts an ATA command. ATA commands are grouped into
4297 * classes called "protocols", and issuing each type of protocol
4298 * is slightly different.
4299 *
0baab86b
EF		 4300 * May be used as the qc_issue() entry in ata_port_operations.
4301 *
1da177e4
LT		 4302 * LOCKING:
4303 * spin_lock_irqsave(host_set lock)
4304 *
4305 * RETURNS:
9a3d9eb0 4306 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4307 */
4308
9a3d9eb0 4309unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4310{
4311 struct ata_port *ap = qc->ap;
4312
4313 ata_dev_select(ap, qc->dev->devno, 1, 0);
4314
4315 switch (qc->tf.protocol) {
4316 case ATA_PROT_NODATA:
e5338254 4317 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4318 break;
4319
4320 case ATA_PROT_DMA:
4321 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4322 ap->ops->bmdma_setup(qc); /* set up bmdma */
4323 ap->ops->bmdma_start(qc); /* initiate bmdma */
4324 break;
4325
4326 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4327 ata_qc_set_polling(qc);
e5338254 4328 ata_tf_to_host(ap, &qc->tf);
14be71f4 4329 ap->hsm_task_state = HSM_ST;
8061f5f0 4330 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4331 break;
4332
4333 case ATA_PROT_ATAPI:
4334 ata_qc_set_polling(qc);
e5338254 4335 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4336 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4337 break;
4338
4339 case ATA_PROT_ATAPI_NODATA:
c1389503 4340 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4341 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4342 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4343 break;
4344
4345 case ATA_PROT_ATAPI_DMA:
c1389503 4346 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4347 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4348 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4349 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4350 break;
4351
4352 default:
4353 WARN_ON(1);
9a3d9eb0 4354 return AC_ERR_SYSTEM;
1da177e4
LT		 4355 }
4356
4357 return 0;
4358}
4359
1da177e4
LT		 4360/**
4361 * ata_host_intr - Handle host interrupt for given (port, task)
4362 * @ap: Port on which interrupt arrived (possibly...)
4363 * @qc: Taskfile currently active in engine
4364 *
4365 * Handle host interrupt for given queued command. Currently,
4366 * only DMA interrupts are handled. All other commands are
4367 * handled via polling with interrupts disabled (nIEN bit).
4368 *
4369 * LOCKING:
4370 * spin_lock_irqsave(host_set lock)
4371 *
4372 * RETURNS:
4373 * One if interrupt was handled, zero if not (shared irq).
4374 */
4375
4376inline unsigned int ata_host_intr (struct ata_port *ap,
4377 struct ata_queued_cmd *qc)
4378{
4379 u8 status, host_stat;
4380
4381 switch (qc->tf.protocol) {
4382
4383 case ATA_PROT_DMA:
4384 case ATA_PROT_ATAPI_DMA:
4385 case ATA_PROT_ATAPI:
4386 /* check status of DMA engine */
4387 host_stat = ap->ops->bmdma_status(ap);
4388 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4389
4390 /* if it's not our irq... */
4391 if (!(host_stat & ATA_DMA_INTR))
4392 goto idle_irq;
4393
4394 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4395 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4396
4397 /* fall through */
4398
4399 case ATA_PROT_ATAPI_NODATA:
4400 case ATA_PROT_NODATA:
4401 /* check altstatus */
4402 status = ata_altstatus(ap);
4403 if (status & ATA_BUSY)
4404 goto idle_irq;
4405
4406 /* check main status, clearing INTRQ */
4407 status = ata_chk_status(ap);
4408 if (unlikely(status & ATA_BUSY))
4409 goto idle_irq;
4410 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4411 ap->id, qc->tf.protocol, status);
4412
4413 /* ack bmdma irq events */
4414 ap->ops->irq_clear(ap);
4415
4416 /* complete taskfile transaction */
a22e2eb0
AL		 4417 qc->err_mask |= ac_err_mask(status);
4418 ata_qc_complete(qc);
1da177e4
LT		 4419 break;
4420
4421 default:
4422 goto idle_irq;
4423 }
4424
4425 return 1; /* irq handled */
4426
4427idle_irq:
4428 ap->stats.idle_irq++;
4429
4430#ifdef ATA_IRQ_TRAP
4431 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4432 ata_irq_ack(ap, 0); /* debug trap */
4433 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4434 return 1;
1da177e4
LT		 4435 }
4436#endif
4437 return 0; /* irq not handled */
4438}
4439
4440/**
4441 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4442 * @irq: irq line (unused)
4443 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4444 * @regs: unused
4445 *
0cba632b
JG		 4446 * Default interrupt handler for PCI IDE devices. Calls
4447 * ata_host_intr() for each port that is not disabled.
4448 *
1da177e4 4449 * LOCKING:
0cba632b 4450 * Obtains host_set lock during operation.
1da177e4
LT		 4451 *
4452 * RETURNS:
0cba632b 4453 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4454 */
4455
4456irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4457{
4458 struct ata_host_set *host_set = dev_instance;
4459 unsigned int i;
4460 unsigned int handled = 0;
4461 unsigned long flags;
4462
4463 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4464 spin_lock_irqsave(&host_set->lock, flags);
4465
4466 for (i = 0; i < host_set->n_ports; i++) {
4467 struct ata_port *ap;
4468
4469 ap = host_set->ports[i];
c1389503 4470 if (ap &&
198e0fed 4471 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4472 struct ata_queued_cmd *qc;
4473
4474 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4475 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4476 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4477 handled |= ata_host_intr(ap, qc);
4478 }
4479 }
4480
4481 spin_unlock_irqrestore(&host_set->lock, flags);
4482
4483 return IRQ_RETVAL(handled);
4484}
4485
0baab86b 4486
9b847548
JA		 4487/*
4488 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4489 * without filling any other registers
4490 */
4491static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4492 u8 cmd)
4493{
4494 struct ata_taskfile tf;
4495 int err;
4496
4497 ata_tf_init(ap, &tf, dev->devno);
4498
4499 tf.command = cmd;
4500 tf.flags |= ATA_TFLAG_DEVICE;
4501 tf.protocol = ATA_PROT_NODATA;
4502
4503 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4504 if (err)
4505 printk(KERN_ERR "%s: ata command failed: %d\n",
4506 __FUNCTION__, err);
4507
4508 return err;
4509}
4510
4511static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4512{
4513 u8 cmd;
4514
4515 if (!ata_try_flush_cache(dev))
4516 return 0;
4517
4518 if (ata_id_has_flush_ext(dev->id))
4519 cmd = ATA_CMD_FLUSH_EXT;
4520 else
4521 cmd = ATA_CMD_FLUSH;
4522
4523 return ata_do_simple_cmd(ap, dev, cmd);
4524}
4525
4526static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4527{
4528 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4529}
4530
4531static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4532{
4533 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4534}
4535
4536/**
4537 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4538 * @ap: port the device is connected to
4539 * @dev: the device to resume
9b847548
JA		 4540 *
4541 * Kick the drive back into action, by sending it an idle immediate
4542 * command and making sure its transfer mode matches between drive
4543 * and host.
4544 *
4545 */
4546int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4547{
4548 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4549 struct ata_device *failed_dev;
9b847548 4550 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4551 while (ata_set_mode(ap, &failed_dev))
4552 ata_dev_disable(ap, failed_dev);
9b847548 4553 }
e1211e3f 4554 if (!ata_dev_enabled(dev))
9b847548
JA		 4555 return 0;
4556 if (dev->class == ATA_DEV_ATA)
4557 ata_start_drive(ap, dev);
4558
4559 return 0;
4560}
4561
4562/**
4563 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4564 * @ap: port the device is connected to
4565 * @dev: the device to suspend
9b847548
JA		 4566 *
4567 * Flush the cache on the drive, if appropriate, then issue a
4568 * standbynow command.
9b847548 4569 */
082776e4 4570int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4571{
e1211e3f 4572 if (!ata_dev_enabled(dev))
9b847548
JA		 4573 return 0;
4574 if (dev->class == ATA_DEV_ATA)
4575 ata_flush_cache(ap, dev);
4576
082776e4
NC		 4577 if (state.event != PM_EVENT_FREEZE)
4578 ata_standby_drive(ap, dev);
9b847548
JA		 4579 ap->flags |= ATA_FLAG_SUSPENDED;
4580 return 0;
4581}
4582
c893a3ae
RD		 4583/**
4584 * ata_port_start - Set port up for dma.
4585 * @ap: Port to initialize
4586 *
4587 * Called just after data structures for each port are
4588 * initialized. Allocates space for PRD table.
4589 *
4590 * May be used as the port_start() entry in ata_port_operations.
4591 *
4592 * LOCKING:
4593 * Inherited from caller.
4594 */
4595
1da177e4
LT		 4596int ata_port_start (struct ata_port *ap)
4597{
2f1f610b 4598 struct device *dev = ap->dev;
6037d6bb 4599 int rc;
1da177e4
LT		 4600
4601 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4602 if (!ap->prd)
4603 return -ENOMEM;
4604
6037d6bb
JG		 4605 rc = ata_pad_alloc(ap, dev);
4606 if (rc) {
cedc9a47 4607 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4608 return rc;
cedc9a47
JG		 4609 }
4610
1da177e4
LT		 4611 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4612
4613 return 0;
4614}
4615
0baab86b
EF		 4616
4617/**
4618 * ata_port_stop - Undo ata_port_start()
4619 * @ap: Port to shut down
4620 *
4621 * Frees the PRD table.
4622 *
4623 * May be used as the port_stop() entry in ata_port_operations.
4624 *
4625 * LOCKING:
6f0ef4fa 4626 * Inherited from caller.
0baab86b
EF		 4627 */
4628
1da177e4
LT		 4629void ata_port_stop (struct ata_port *ap)
4630{
2f1f610b 4631 struct device *dev = ap->dev;
1da177e4
LT		 4632
4633 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4634 ata_pad_free(ap, dev);
1da177e4
LT		 4635}
4636
aa8f0dc6
JG		 4637void ata_host_stop (struct ata_host_set *host_set)
4638{
4639 if (host_set->mmio_base)
4640 iounmap(host_set->mmio_base);
4641}
4642
4643
1da177e4
LT		 4644/**
4645 * ata_host_remove - Unregister SCSI host structure with upper layers
4646 * @ap: Port to unregister
4647 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4648 *
4649 * LOCKING:
6f0ef4fa 4650 * Inherited from caller.
1da177e4
LT		 4651 */
4652
4653static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4654{
4655 struct Scsi_Host *sh = ap->host;
4656
4657 DPRINTK("ENTER\n");
4658
4659 if (do_unregister)
4660 scsi_remove_host(sh);
4661
4662 ap->ops->port_stop(ap);
4663}
4664
4665/**
4666 * ata_host_init - Initialize an ata_port structure
4667 * @ap: Structure to initialize
4668 * @host: associated SCSI mid-layer structure
4669 * @host_set: Collection of hosts to which @ap belongs
4670 * @ent: Probe information provided by low-level driver
4671 * @port_no: Port number associated with this ata_port
4672 *
0cba632b
JG		 4673 * Initialize a new ata_port structure, and its associated
4674 * scsi_host.
4675 *
1da177e4 4676 * LOCKING:
0cba632b 4677 * Inherited from caller.
1da177e4
LT		 4678 */
4679
4680static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4681 struct ata_host_set *host_set,
057ace5e 4682 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4683{
4684 unsigned int i;
4685
4686 host->max_id = 16;
4687 host->max_lun = 1;
4688 host->max_channel = 1;
4689 host->unique_id = ata_unique_id++;
4690 host->max_cmd_len = 12;
12413197 4691
198e0fed 4692 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4693 ap->id = host->unique_id;
4694 ap->host = host;
4695 ap->ctl = ATA_DEVCTL_OBS;
4696 ap->host_set = host_set;
2f1f610b 4697 ap->dev = ent->dev;
1da177e4
LT		 4698 ap->port_no = port_no;
4699 ap->hard_port_no =
4700 ent->legacy_mode ? ent->hard_port_no : port_no;
4701 ap->pio_mask = ent->pio_mask;
4702 ap->mwdma_mask = ent->mwdma_mask;
4703 ap->udma_mask = ent->udma_mask;
4704 ap->flags |= ent->host_flags;
4705 ap->ops = ent->port_ops;
4706 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4707 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4708 ap->active_tag = ATA_TAG_POISON;
4709 ap->last_ctl = 0xFF;
4710
86e45b6b 4711 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4712 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4713
acf356b1
TH		 4714 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4715 struct ata_device *dev = &ap->device[i];
4716 dev->devno = i;
4717 dev->pio_mask = UINT_MAX;
4718 dev->mwdma_mask = UINT_MAX;
4719 dev->udma_mask = UINT_MAX;
4720 }
1da177e4
LT		 4721
4722#ifdef ATA_IRQ_TRAP
4723 ap->stats.unhandled_irq = 1;
4724 ap->stats.idle_irq = 1;
4725#endif
4726
4727 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4728}
4729
4730/**
4731 * ata_host_add - Attach low-level ATA driver to system
4732 * @ent: Information provided by low-level driver
4733 * @host_set: Collections of ports to which we add
4734 * @port_no: Port number associated with this host
4735 *
0cba632b
JG		 4736 * Attach low-level ATA driver to system.
4737 *
1da177e4 4738 * LOCKING:
0cba632b 4739 * PCI/etc. bus probe sem.
1da177e4
LT		 4740 *
4741 * RETURNS:
0cba632b 4742 * New ata_port on success, for NULL on error.
1da177e4
LT		 4743 */
4744
057ace5e 4745static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4746 struct ata_host_set *host_set,
4747 unsigned int port_no)
4748{
4749 struct Scsi_Host *host;
4750 struct ata_port *ap;
4751 int rc;
4752
4753 DPRINTK("ENTER\n");
aec5c3c1
TH		 4754
4755 if (!ent->port_ops->probe_reset &&
4756 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4757 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4758 port_no);
4759 return NULL;
4760 }
4761
1da177e4
LT		 4762 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4763 if (!host)
4764 return NULL;
4765
30afc84c
TH		 4766 host->transportt = &ata_scsi_transport_template;
4767
1da177e4
LT		 4768 ap = (struct ata_port *) &host->hostdata[0];
4769
4770 ata_host_init(ap, host, host_set, ent, port_no);
4771
4772 rc = ap->ops->port_start(ap);
4773 if (rc)
4774 goto err_out;
4775
4776 return ap;
4777
4778err_out:
4779 scsi_host_put(host);
4780 return NULL;
4781}
4782
4783/**
0cba632b
JG		 4784 * ata_device_add - Register hardware device with ATA and SCSI layers
4785 * @ent: Probe information describing hardware device to be registered
4786 *
4787 * This function processes the information provided in the probe
4788 * information struct @ent, allocates the necessary ATA and SCSI
4789 * host information structures, initializes them, and registers
4790 * everything with requisite kernel subsystems.
4791 *
4792 * This function requests irqs, probes the ATA bus, and probes
4793 * the SCSI bus.
1da177e4
LT		 4794 *
4795 * LOCKING:
0cba632b 4796 * PCI/etc. bus probe sem.
1da177e4
LT		 4797 *
4798 * RETURNS:
0cba632b 4799 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4800 */
4801
057ace5e 4802int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4803{
4804 unsigned int count = 0, i;
4805 struct device *dev = ent->dev;
4806 struct ata_host_set *host_set;
4807
4808 DPRINTK("ENTER\n");
4809 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4810 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4811 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4812 if (!host_set)
4813 return 0;
1da177e4
LT		 4814 spin_lock_init(&host_set->lock);
4815
4816 host_set->dev = dev;
4817 host_set->n_ports = ent->n_ports;
4818 host_set->irq = ent->irq;
4819 host_set->mmio_base = ent->mmio_base;
4820 host_set->private_data = ent->private_data;
4821 host_set->ops = ent->port_ops;
5444a6f4 4822 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4823
4824 /* register each port bound to this device */
4825 for (i = 0; i < ent->n_ports; i++) {
4826 struct ata_port *ap;
4827 unsigned long xfer_mode_mask;
4828
4829 ap = ata_host_add(ent, host_set, i);
4830 if (!ap)
4831 goto err_out;
4832
4833 host_set->ports[i] = ap;
4834 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4835 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4836 (ap->pio_mask << ATA_SHIFT_PIO);
4837
4838 /* print per-port info to dmesg */
4839 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4840 "bmdma 0x%lX irq %lu\n",
4841 ap->id,
4842 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4843 ata_mode_string(xfer_mode_mask),
4844 ap->ioaddr.cmd_addr,
4845 ap->ioaddr.ctl_addr,
4846 ap->ioaddr.bmdma_addr,
4847 ent->irq);
4848
4849 ata_chk_status(ap);
4850 host_set->ops->irq_clear(ap);
4851 count++;
4852 }
4853
57f3bda8
RD		 4854 if (!count)
4855 goto err_free_ret;
1da177e4
LT		 4856
4857 /* obtain irq, that is shared between channels */
4858 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4859 DRV_NAME, host_set))
4860 goto err_out;
4861
4862 /* perform each probe synchronously */
4863 DPRINTK("probe begin\n");
4864 for (i = 0; i < count; i++) {
4865 struct ata_port *ap;
4866 int rc;
4867
4868 ap = host_set->ports[i];
4869
c893a3ae 4870 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4871 rc = ata_bus_probe(ap);
c893a3ae 4872 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4873
4874 if (rc) {
4875 /* FIXME: do something useful here?
4876 * Current libata behavior will
4877 * tear down everything when
4878 * the module is removed
4879 * or the h/w is unplugged.
4880 */
4881 }
4882
4883 rc = scsi_add_host(ap->host, dev);
4884 if (rc) {
4885 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4886 ap->id);
4887 /* FIXME: do something useful here */
4888 /* FIXME: handle unconditional calls to
4889 * scsi_scan_host and ata_host_remove, below,
4890 * at the very least
4891 */
4892 }
4893 }
4894
4895 /* probes are done, now scan each port's disk(s) */
c893a3ae 4896 DPRINTK("host probe begin\n");
1da177e4
LT		 4897 for (i = 0; i < count; i++) {
4898 struct ata_port *ap = host_set->ports[i];
4899
644dd0cc 4900 ata_scsi_scan_host(ap);
1da177e4
LT		 4901 }
4902
4903 dev_set_drvdata(dev, host_set);
4904
4905 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4906 return ent->n_ports; /* success */
4907
4908err_out:
4909 for (i = 0; i < count; i++) {
4910 ata_host_remove(host_set->ports[i], 1);
4911 scsi_host_put(host_set->ports[i]->host);
4912 }
57f3bda8 4913err_free_ret:
1da177e4
LT		 4914 kfree(host_set);
4915 VPRINTK("EXIT, returning 0\n");
4916 return 0;
4917}
4918
17b14451
AC		 4919/**
4920 * ata_host_set_remove - PCI layer callback for device removal
4921 * @host_set: ATA host set that was removed
4922 *
2e9edbf8 4923 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4924 * objects.
4925 *
4926 * LOCKING:
4927 * Inherited from calling layer (may sleep).
4928 */
4929
17b14451
AC		 4930void ata_host_set_remove(struct ata_host_set *host_set)
4931{
4932 struct ata_port *ap;
4933 unsigned int i;
4934
4935 for (i = 0; i < host_set->n_ports; i++) {
4936 ap = host_set->ports[i];
4937 scsi_remove_host(ap->host);
4938 }
4939
4940 free_irq(host_set->irq, host_set);
4941
4942 for (i = 0; i < host_set->n_ports; i++) {
4943 ap = host_set->ports[i];
4944
4945 ata_scsi_release(ap->host);
4946
4947 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4948 struct ata_ioports *ioaddr = &ap->ioaddr;
4949
4950 if (ioaddr->cmd_addr == 0x1f0)
4951 release_region(0x1f0, 8);
4952 else if (ioaddr->cmd_addr == 0x170)
4953 release_region(0x170, 8);
4954 }
4955
4956 scsi_host_put(ap->host);
4957 }
4958
4959 if (host_set->ops->host_stop)
4960 host_set->ops->host_stop(host_set);
4961
4962 kfree(host_set);
4963}
4964
1da177e4
LT		 4965/**
4966 * ata_scsi_release - SCSI layer callback hook for host unload
4967 * @host: libata host to be unloaded
4968 *
4969 * Performs all duties necessary to shut down a libata port...
4970 * Kill port kthread, disable port, and release resources.
4971 *
4972 * LOCKING:
4973 * Inherited from SCSI layer.
4974 *
4975 * RETURNS:
4976 * One.
4977 */
4978
4979int ata_scsi_release(struct Scsi_Host *host)
4980{
4981 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4982 int i;
1da177e4
LT		 4983
4984 DPRINTK("ENTER\n");
4985
4986 ap->ops->port_disable(ap);
4987 ata_host_remove(ap, 0);
d9572b1d
TH		 4988 for (i = 0; i < ATA_MAX_DEVICES; i++)
4989 kfree(ap->device[i].id);
1da177e4
LT		 4990
4991 DPRINTK("EXIT\n");
4992 return 1;
4993}
4994
4995/**
4996 * ata_std_ports - initialize ioaddr with standard port offsets.
4997 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4998 *
4999 * Utility function which initializes data_addr, error_addr,
5000 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5001 * device_addr, status_addr, and command_addr to standard offsets
5002 * relative to cmd_addr.
5003 *
5004 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5005 */
0baab86b 5006
1da177e4
LT		 5007void ata_std_ports(struct ata_ioports *ioaddr)
5008{
5009 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5010 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5011 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5012 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5013 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5014 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5015 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5016 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5017 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5018 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5019}
5020
0baab86b 5021
374b1873
JG		 5022#ifdef CONFIG_PCI
5023
5024void ata_pci_host_stop (struct ata_host_set *host_set)
5025{
5026 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5027
5028 pci_iounmap(pdev, host_set->mmio_base);
5029}
5030
1da177e4
LT		 5031/**
5032 * ata_pci_remove_one - PCI layer callback for device removal
5033 * @pdev: PCI device that was removed
5034 *
5035 * PCI layer indicates to libata via this hook that
6f0ef4fa 5036 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5037 * Handle this by unregistering all objects associated
5038 * with this PCI device. Free those objects. Then finally
5039 * release PCI resources and disable device.
5040 *
5041 * LOCKING:
5042 * Inherited from PCI layer (may sleep).
5043 */
5044
5045void ata_pci_remove_one (struct pci_dev *pdev)
5046{
5047 struct device *dev = pci_dev_to_dev(pdev);
5048 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5049
17b14451 5050 ata_host_set_remove(host_set);
1da177e4
LT		 5051 pci_release_regions(pdev);
5052 pci_disable_device(pdev);
5053 dev_set_drvdata(dev, NULL);
5054}
5055
5056/* move to PCI subsystem */
057ace5e 5057int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5058{
5059 unsigned long tmp = 0;
5060
5061 switch (bits->width) {
5062 case 1: {
5063 u8 tmp8 = 0;
5064 pci_read_config_byte(pdev, bits->reg, &tmp8);
5065 tmp = tmp8;
5066 break;
5067 }
5068 case 2: {
5069 u16 tmp16 = 0;
5070 pci_read_config_word(pdev, bits->reg, &tmp16);
5071 tmp = tmp16;
5072 break;
5073 }
5074 case 4: {
5075 u32 tmp32 = 0;
5076 pci_read_config_dword(pdev, bits->reg, &tmp32);
5077 tmp = tmp32;
5078 break;
5079 }
5080
5081 default:
5082 return -EINVAL;
5083 }
5084
5085 tmp &= bits->mask;
5086
5087 return (tmp == bits->val) ? 1 : 0;
5088}
9b847548
JA		 5089
5090int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5091{
5092 pci_save_state(pdev);
5093 pci_disable_device(pdev);
5094 pci_set_power_state(pdev, PCI_D3hot);
5095 return 0;
5096}
5097
5098int ata_pci_device_resume(struct pci_dev *pdev)
5099{
5100 pci_set_power_state(pdev, PCI_D0);
5101 pci_restore_state(pdev);
5102 pci_enable_device(pdev);
5103 pci_set_master(pdev);
5104 return 0;
5105}
1da177e4
LT		 5106#endif /* CONFIG_PCI */
5107
5108
1da177e4
LT		 5109static int __init ata_init(void)
5110{
5111 ata_wq = create_workqueue("ata");
5112 if (!ata_wq)
5113 return -ENOMEM;
5114
5115 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5116 return 0;
5117}
5118
5119static void __exit ata_exit(void)
5120{
5121 destroy_workqueue(ata_wq);
5122}
5123
5124module_init(ata_init);
5125module_exit(ata_exit);
5126
67846b30
JG		 5127static unsigned long ratelimit_time;
5128static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5129
5130int ata_ratelimit(void)
5131{
5132 int rc;
5133 unsigned long flags;
5134
5135 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5136
5137 if (time_after(jiffies, ratelimit_time)) {
5138 rc = 1;
5139 ratelimit_time = jiffies + (HZ/5);
5140 } else
5141 rc = 0;
5142
5143 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5144
5145 return rc;
5146}
5147
1da177e4
LT		 5148/*
5149 * libata is essentially a library of internal helper functions for
5150 * low-level ATA host controller drivers. As such, the API/ABI is
5151 * likely to change as new drivers are added and updated.
5152 * Do not depend on ABI/API stability.
5153 */
5154
5155EXPORT_SYMBOL_GPL(ata_std_bios_param);
5156EXPORT_SYMBOL_GPL(ata_std_ports);
5157EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5158EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5159EXPORT_SYMBOL_GPL(ata_sg_init);
5160EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5161EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5162EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5163EXPORT_SYMBOL_GPL(ata_eng_timeout);
5164EXPORT_SYMBOL_GPL(ata_tf_load);
5165EXPORT_SYMBOL_GPL(ata_tf_read);
5166EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5167EXPORT_SYMBOL_GPL(ata_std_dev_select);
5168EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5169EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5170EXPORT_SYMBOL_GPL(ata_check_status);
5171EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5172EXPORT_SYMBOL_GPL(ata_exec_command);
5173EXPORT_SYMBOL_GPL(ata_port_start);
5174EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5175EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5176EXPORT_SYMBOL_GPL(ata_interrupt);
5177EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5178EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5179EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5180EXPORT_SYMBOL_GPL(ata_bmdma_start);
5181EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5182EXPORT_SYMBOL_GPL(ata_bmdma_status);
5183EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5184EXPORT_SYMBOL_GPL(ata_port_probe);
5185EXPORT_SYMBOL_GPL(sata_phy_reset);
5186EXPORT_SYMBOL_GPL(__sata_phy_reset);
5187EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5188EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5189EXPORT_SYMBOL_GPL(ata_std_softreset);
5190EXPORT_SYMBOL_GPL(sata_std_hardreset);
5191EXPORT_SYMBOL_GPL(ata_std_postreset);
5192EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5193EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5194EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5195EXPORT_SYMBOL_GPL(ata_dev_classify);
5196EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5197EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5198EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5199EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5200EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5201EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5202EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5203EXPORT_SYMBOL_GPL(ata_scsi_error);
5204EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5205EXPORT_SYMBOL_GPL(ata_scsi_release);
5206EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5207EXPORT_SYMBOL_GPL(ata_id_string);
5208EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5209EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5210EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5211EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5212
1bc4ccff 5213EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5214EXPORT_SYMBOL_GPL(ata_timing_compute);
5215EXPORT_SYMBOL_GPL(ata_timing_merge);
5216
1da177e4
LT		 5217#ifdef CONFIG_PCI
5218EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5219EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5220EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5221EXPORT_SYMBOL_GPL(ata_pci_init_one);
5222EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5223EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5224EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5225EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5226EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5227#endif /* CONFIG_PCI */
9b847548
JA		 5228
5229EXPORT_SYMBOL_GPL(ata_device_suspend);
5230EXPORT_SYMBOL_GPL(ata_device_resume);
5231EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5232EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Clone of davem's net-next-2.6 tree