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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
378f058c | 52 | #include <linux/scatterlist.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
1da177e4 | 54 | #include "scsi_priv.h" |
193515d5 | 55 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
56 | #include <scsi/scsi_host.h> |
57 | #include <linux/libata.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/semaphore.h> | |
60 | #include <asm/byteorder.h> | |
61 | ||
62 | #include "libata.h" | |
63 | ||
d7bb4cc7 TH |
64 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
65 | const unsigned long sata_deb_timing_boot[] = { 5, 100, 2000 }; | |
66 | const unsigned long sata_deb_timing_eh[] = { 25, 500, 2000 }; | |
67 | const unsigned long sata_deb_timing_before_fsrst[] = { 100, 2000, 5000 }; | |
68 | ||
3373efd8 TH |
69 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
70 | u16 heads, u16 sectors); | |
71 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
72 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 LT |
73 | |
74 | static unsigned int ata_unique_id = 1; | |
75 | static struct workqueue_struct *ata_wq; | |
76 | ||
453b07ac TH |
77 | struct workqueue_struct *ata_aux_wq; |
78 | ||
418dc1f5 | 79 | int atapi_enabled = 1; |
1623c81e JG |
80 | module_param(atapi_enabled, int, 0444); |
81 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
82 | ||
95de719a AL |
83 | int atapi_dmadir = 0; |
84 | module_param(atapi_dmadir, int, 0444); | |
85 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
86 | ||
c3c013a2 JG |
87 | int libata_fua = 0; |
88 | module_param_named(fua, libata_fua, int, 0444); | |
89 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
90 | ||
1da177e4 LT |
91 | MODULE_AUTHOR("Jeff Garzik"); |
92 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
93 | MODULE_LICENSE("GPL"); | |
94 | MODULE_VERSION(DRV_VERSION); | |
95 | ||
0baab86b | 96 | |
1da177e4 LT |
97 | /** |
98 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
99 | * @tf: Taskfile to convert | |
100 | * @fis: Buffer into which data will output | |
101 | * @pmp: Port multiplier port | |
102 | * | |
103 | * Converts a standard ATA taskfile to a Serial ATA | |
104 | * FIS structure (Register - Host to Device). | |
105 | * | |
106 | * LOCKING: | |
107 | * Inherited from caller. | |
108 | */ | |
109 | ||
057ace5e | 110 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
111 | { |
112 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
113 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
114 | bit 7 indicates Command FIS */ | |
115 | fis[2] = tf->command; | |
116 | fis[3] = tf->feature; | |
117 | ||
118 | fis[4] = tf->lbal; | |
119 | fis[5] = tf->lbam; | |
120 | fis[6] = tf->lbah; | |
121 | fis[7] = tf->device; | |
122 | ||
123 | fis[8] = tf->hob_lbal; | |
124 | fis[9] = tf->hob_lbam; | |
125 | fis[10] = tf->hob_lbah; | |
126 | fis[11] = tf->hob_feature; | |
127 | ||
128 | fis[12] = tf->nsect; | |
129 | fis[13] = tf->hob_nsect; | |
130 | fis[14] = 0; | |
131 | fis[15] = tf->ctl; | |
132 | ||
133 | fis[16] = 0; | |
134 | fis[17] = 0; | |
135 | fis[18] = 0; | |
136 | fis[19] = 0; | |
137 | } | |
138 | ||
139 | /** | |
140 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
141 | * @fis: Buffer from which data will be input | |
142 | * @tf: Taskfile to output | |
143 | * | |
e12a1be6 | 144 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
145 | * |
146 | * LOCKING: | |
147 | * Inherited from caller. | |
148 | */ | |
149 | ||
057ace5e | 150 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
151 | { |
152 | tf->command = fis[2]; /* status */ | |
153 | tf->feature = fis[3]; /* error */ | |
154 | ||
155 | tf->lbal = fis[4]; | |
156 | tf->lbam = fis[5]; | |
157 | tf->lbah = fis[6]; | |
158 | tf->device = fis[7]; | |
159 | ||
160 | tf->hob_lbal = fis[8]; | |
161 | tf->hob_lbam = fis[9]; | |
162 | tf->hob_lbah = fis[10]; | |
163 | ||
164 | tf->nsect = fis[12]; | |
165 | tf->hob_nsect = fis[13]; | |
166 | } | |
167 | ||
8cbd6df1 AL |
168 | static const u8 ata_rw_cmds[] = { |
169 | /* pio multi */ | |
170 | ATA_CMD_READ_MULTI, | |
171 | ATA_CMD_WRITE_MULTI, | |
172 | ATA_CMD_READ_MULTI_EXT, | |
173 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
174 | 0, |
175 | 0, | |
176 | 0, | |
177 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
178 | /* pio */ |
179 | ATA_CMD_PIO_READ, | |
180 | ATA_CMD_PIO_WRITE, | |
181 | ATA_CMD_PIO_READ_EXT, | |
182 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
183 | 0, |
184 | 0, | |
185 | 0, | |
186 | 0, | |
8cbd6df1 AL |
187 | /* dma */ |
188 | ATA_CMD_READ, | |
189 | ATA_CMD_WRITE, | |
190 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
191 | ATA_CMD_WRITE_EXT, |
192 | 0, | |
193 | 0, | |
194 | 0, | |
195 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 196 | }; |
1da177e4 LT |
197 | |
198 | /** | |
8cbd6df1 AL |
199 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
200 | * @qc: command to examine and configure | |
1da177e4 | 201 | * |
2e9edbf8 | 202 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 203 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
204 | * |
205 | * LOCKING: | |
206 | * caller. | |
207 | */ | |
9a3dccc4 | 208 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 209 | { |
8cbd6df1 AL |
210 | struct ata_taskfile *tf = &qc->tf; |
211 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 212 | u8 cmd; |
1da177e4 | 213 | |
9a3dccc4 | 214 | int index, fua, lba48, write; |
2e9edbf8 | 215 | |
9a3dccc4 | 216 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
217 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
218 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 219 | |
8cbd6df1 AL |
220 | if (dev->flags & ATA_DFLAG_PIO) { |
221 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 222 | index = dev->multi_count ? 0 : 8; |
8d238e01 AC |
223 | } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) { |
224 | /* Unable to use DMA due to host limitation */ | |
225 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 226 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
227 | } else { |
228 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 229 | index = 16; |
8cbd6df1 | 230 | } |
1da177e4 | 231 | |
9a3dccc4 TH |
232 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
233 | if (cmd) { | |
234 | tf->command = cmd; | |
235 | return 0; | |
236 | } | |
237 | return -1; | |
1da177e4 LT |
238 | } |
239 | ||
cb95d562 TH |
240 | /** |
241 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
242 | * @pio_mask: pio_mask | |
243 | * @mwdma_mask: mwdma_mask | |
244 | * @udma_mask: udma_mask | |
245 | * | |
246 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
247 | * unsigned int xfer_mask. | |
248 | * | |
249 | * LOCKING: | |
250 | * None. | |
251 | * | |
252 | * RETURNS: | |
253 | * Packed xfer_mask. | |
254 | */ | |
255 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
256 | unsigned int mwdma_mask, | |
257 | unsigned int udma_mask) | |
258 | { | |
259 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
260 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
261 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
262 | } | |
263 | ||
c0489e4e TH |
264 | /** |
265 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
266 | * @xfer_mask: xfer_mask to unpack | |
267 | * @pio_mask: resulting pio_mask | |
268 | * @mwdma_mask: resulting mwdma_mask | |
269 | * @udma_mask: resulting udma_mask | |
270 | * | |
271 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
272 | * Any NULL distination masks will be ignored. | |
273 | */ | |
274 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
275 | unsigned int *pio_mask, | |
276 | unsigned int *mwdma_mask, | |
277 | unsigned int *udma_mask) | |
278 | { | |
279 | if (pio_mask) | |
280 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
281 | if (mwdma_mask) | |
282 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
283 | if (udma_mask) | |
284 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
285 | } | |
286 | ||
cb95d562 | 287 | static const struct ata_xfer_ent { |
be9a50c8 | 288 | int shift, bits; |
cb95d562 TH |
289 | u8 base; |
290 | } ata_xfer_tbl[] = { | |
291 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
292 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
293 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
294 | { -1, }, | |
295 | }; | |
296 | ||
297 | /** | |
298 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
299 | * @xfer_mask: xfer_mask of interest | |
300 | * | |
301 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
302 | * bit of @xfer_mask is considered. | |
303 | * | |
304 | * LOCKING: | |
305 | * None. | |
306 | * | |
307 | * RETURNS: | |
308 | * Matching XFER_* value, 0 if no match found. | |
309 | */ | |
310 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
311 | { | |
312 | int highbit = fls(xfer_mask) - 1; | |
313 | const struct ata_xfer_ent *ent; | |
314 | ||
315 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
316 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
317 | return ent->base + highbit - ent->shift; | |
318 | return 0; | |
319 | } | |
320 | ||
321 | /** | |
322 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
323 | * @xfer_mode: XFER_* of interest | |
324 | * | |
325 | * Return matching xfer_mask for @xfer_mode. | |
326 | * | |
327 | * LOCKING: | |
328 | * None. | |
329 | * | |
330 | * RETURNS: | |
331 | * Matching xfer_mask, 0 if no match found. | |
332 | */ | |
333 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
334 | { | |
335 | const struct ata_xfer_ent *ent; | |
336 | ||
337 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
338 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
339 | return 1 << (ent->shift + xfer_mode - ent->base); | |
340 | return 0; | |
341 | } | |
342 | ||
343 | /** | |
344 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
345 | * @xfer_mode: XFER_* of interest | |
346 | * | |
347 | * Return matching xfer_shift for @xfer_mode. | |
348 | * | |
349 | * LOCKING: | |
350 | * None. | |
351 | * | |
352 | * RETURNS: | |
353 | * Matching xfer_shift, -1 if no match found. | |
354 | */ | |
355 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
356 | { | |
357 | const struct ata_xfer_ent *ent; | |
358 | ||
359 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
360 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
361 | return ent->shift; | |
362 | return -1; | |
363 | } | |
364 | ||
1da177e4 | 365 | /** |
1da7b0d0 TH |
366 | * ata_mode_string - convert xfer_mask to string |
367 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
368 | * |
369 | * Determine string which represents the highest speed | |
1da7b0d0 | 370 | * (highest bit in @modemask). |
1da177e4 LT |
371 | * |
372 | * LOCKING: | |
373 | * None. | |
374 | * | |
375 | * RETURNS: | |
376 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 377 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 378 | */ |
1da7b0d0 | 379 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 380 | { |
75f554bc TH |
381 | static const char * const xfer_mode_str[] = { |
382 | "PIO0", | |
383 | "PIO1", | |
384 | "PIO2", | |
385 | "PIO3", | |
386 | "PIO4", | |
387 | "MWDMA0", | |
388 | "MWDMA1", | |
389 | "MWDMA2", | |
390 | "UDMA/16", | |
391 | "UDMA/25", | |
392 | "UDMA/33", | |
393 | "UDMA/44", | |
394 | "UDMA/66", | |
395 | "UDMA/100", | |
396 | "UDMA/133", | |
397 | "UDMA7", | |
398 | }; | |
1da7b0d0 | 399 | int highbit; |
1da177e4 | 400 | |
1da7b0d0 TH |
401 | highbit = fls(xfer_mask) - 1; |
402 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
403 | return xfer_mode_str[highbit]; | |
1da177e4 | 404 | return "<n/a>"; |
1da177e4 LT |
405 | } |
406 | ||
4c360c81 TH |
407 | static const char *sata_spd_string(unsigned int spd) |
408 | { | |
409 | static const char * const spd_str[] = { | |
410 | "1.5 Gbps", | |
411 | "3.0 Gbps", | |
412 | }; | |
413 | ||
414 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
415 | return "<unknown>"; | |
416 | return spd_str[spd - 1]; | |
417 | } | |
418 | ||
3373efd8 | 419 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 420 | { |
e1211e3f | 421 | if (ata_dev_enabled(dev)) { |
f15a1daf | 422 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
0b8efb0a TH |
423 | dev->class++; |
424 | } | |
425 | } | |
426 | ||
1da177e4 LT |
427 | /** |
428 | * ata_pio_devchk - PATA device presence detection | |
429 | * @ap: ATA channel to examine | |
430 | * @device: Device to examine (starting at zero) | |
431 | * | |
432 | * This technique was originally described in | |
433 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
434 | * later found its way into the ATA/ATAPI spec. | |
435 | * | |
436 | * Write a pattern to the ATA shadow registers, | |
437 | * and if a device is present, it will respond by | |
438 | * correctly storing and echoing back the | |
439 | * ATA shadow register contents. | |
440 | * | |
441 | * LOCKING: | |
442 | * caller. | |
443 | */ | |
444 | ||
445 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
446 | unsigned int device) | |
447 | { | |
448 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
449 | u8 nsect, lbal; | |
450 | ||
451 | ap->ops->dev_select(ap, device); | |
452 | ||
453 | outb(0x55, ioaddr->nsect_addr); | |
454 | outb(0xaa, ioaddr->lbal_addr); | |
455 | ||
456 | outb(0xaa, ioaddr->nsect_addr); | |
457 | outb(0x55, ioaddr->lbal_addr); | |
458 | ||
459 | outb(0x55, ioaddr->nsect_addr); | |
460 | outb(0xaa, ioaddr->lbal_addr); | |
461 | ||
462 | nsect = inb(ioaddr->nsect_addr); | |
463 | lbal = inb(ioaddr->lbal_addr); | |
464 | ||
465 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
466 | return 1; /* we found a device */ | |
467 | ||
468 | return 0; /* nothing found */ | |
469 | } | |
470 | ||
471 | /** | |
472 | * ata_mmio_devchk - PATA device presence detection | |
473 | * @ap: ATA channel to examine | |
474 | * @device: Device to examine (starting at zero) | |
475 | * | |
476 | * This technique was originally described in | |
477 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
478 | * later found its way into the ATA/ATAPI spec. | |
479 | * | |
480 | * Write a pattern to the ATA shadow registers, | |
481 | * and if a device is present, it will respond by | |
482 | * correctly storing and echoing back the | |
483 | * ATA shadow register contents. | |
484 | * | |
485 | * LOCKING: | |
486 | * caller. | |
487 | */ | |
488 | ||
489 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
490 | unsigned int device) | |
491 | { | |
492 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
493 | u8 nsect, lbal; | |
494 | ||
495 | ap->ops->dev_select(ap, device); | |
496 | ||
497 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
498 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
499 | ||
500 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
501 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
502 | ||
503 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
504 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
505 | ||
506 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
507 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
508 | ||
509 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
510 | return 1; /* we found a device */ | |
511 | ||
512 | return 0; /* nothing found */ | |
513 | } | |
514 | ||
515 | /** | |
516 | * ata_devchk - PATA device presence detection | |
517 | * @ap: ATA channel to examine | |
518 | * @device: Device to examine (starting at zero) | |
519 | * | |
520 | * Dispatch ATA device presence detection, depending | |
521 | * on whether we are using PIO or MMIO to talk to the | |
522 | * ATA shadow registers. | |
523 | * | |
524 | * LOCKING: | |
525 | * caller. | |
526 | */ | |
527 | ||
528 | static unsigned int ata_devchk(struct ata_port *ap, | |
529 | unsigned int device) | |
530 | { | |
531 | if (ap->flags & ATA_FLAG_MMIO) | |
532 | return ata_mmio_devchk(ap, device); | |
533 | return ata_pio_devchk(ap, device); | |
534 | } | |
535 | ||
536 | /** | |
537 | * ata_dev_classify - determine device type based on ATA-spec signature | |
538 | * @tf: ATA taskfile register set for device to be identified | |
539 | * | |
540 | * Determine from taskfile register contents whether a device is | |
541 | * ATA or ATAPI, as per "Signature and persistence" section | |
542 | * of ATA/PI spec (volume 1, sect 5.14). | |
543 | * | |
544 | * LOCKING: | |
545 | * None. | |
546 | * | |
547 | * RETURNS: | |
548 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
549 | * the event of failure. | |
550 | */ | |
551 | ||
057ace5e | 552 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
553 | { |
554 | /* Apple's open source Darwin code hints that some devices only | |
555 | * put a proper signature into the LBA mid/high registers, | |
556 | * So, we only check those. It's sufficient for uniqueness. | |
557 | */ | |
558 | ||
559 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
560 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
561 | DPRINTK("found ATA device by sig\n"); | |
562 | return ATA_DEV_ATA; | |
563 | } | |
564 | ||
565 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
566 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
567 | DPRINTK("found ATAPI device by sig\n"); | |
568 | return ATA_DEV_ATAPI; | |
569 | } | |
570 | ||
571 | DPRINTK("unknown device\n"); | |
572 | return ATA_DEV_UNKNOWN; | |
573 | } | |
574 | ||
575 | /** | |
576 | * ata_dev_try_classify - Parse returned ATA device signature | |
577 | * @ap: ATA channel to examine | |
578 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 579 | * @r_err: Value of error register on completion |
1da177e4 LT |
580 | * |
581 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
582 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
583 | * shadow registers, indicating the results of device detection | |
584 | * and diagnostics. | |
585 | * | |
586 | * Select the ATA device, and read the values from the ATA shadow | |
587 | * registers. Then parse according to the Error register value, | |
588 | * and the spec-defined values examined by ata_dev_classify(). | |
589 | * | |
590 | * LOCKING: | |
591 | * caller. | |
b4dc7623 TH |
592 | * |
593 | * RETURNS: | |
594 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
595 | */ |
596 | ||
b4dc7623 TH |
597 | static unsigned int |
598 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 599 | { |
1da177e4 LT |
600 | struct ata_taskfile tf; |
601 | unsigned int class; | |
602 | u8 err; | |
603 | ||
604 | ap->ops->dev_select(ap, device); | |
605 | ||
606 | memset(&tf, 0, sizeof(tf)); | |
607 | ||
1da177e4 | 608 | ap->ops->tf_read(ap, &tf); |
0169e284 | 609 | err = tf.feature; |
b4dc7623 TH |
610 | if (r_err) |
611 | *r_err = err; | |
1da177e4 LT |
612 | |
613 | /* see if device passed diags */ | |
614 | if (err == 1) | |
615 | /* do nothing */ ; | |
616 | else if ((device == 0) && (err == 0x81)) | |
617 | /* do nothing */ ; | |
618 | else | |
b4dc7623 | 619 | return ATA_DEV_NONE; |
1da177e4 | 620 | |
b4dc7623 | 621 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 622 | class = ata_dev_classify(&tf); |
b4dc7623 | 623 | |
1da177e4 | 624 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 625 | return ATA_DEV_NONE; |
1da177e4 | 626 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
627 | return ATA_DEV_NONE; |
628 | return class; | |
1da177e4 LT |
629 | } |
630 | ||
631 | /** | |
6a62a04d | 632 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
633 | * @id: IDENTIFY DEVICE results we will examine |
634 | * @s: string into which data is output | |
635 | * @ofs: offset into identify device page | |
636 | * @len: length of string to return. must be an even number. | |
637 | * | |
638 | * The strings in the IDENTIFY DEVICE page are broken up into | |
639 | * 16-bit chunks. Run through the string, and output each | |
640 | * 8-bit chunk linearly, regardless of platform. | |
641 | * | |
642 | * LOCKING: | |
643 | * caller. | |
644 | */ | |
645 | ||
6a62a04d TH |
646 | void ata_id_string(const u16 *id, unsigned char *s, |
647 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
648 | { |
649 | unsigned int c; | |
650 | ||
651 | while (len > 0) { | |
652 | c = id[ofs] >> 8; | |
653 | *s = c; | |
654 | s++; | |
655 | ||
656 | c = id[ofs] & 0xff; | |
657 | *s = c; | |
658 | s++; | |
659 | ||
660 | ofs++; | |
661 | len -= 2; | |
662 | } | |
663 | } | |
664 | ||
0e949ff3 | 665 | /** |
6a62a04d | 666 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
667 | * @id: IDENTIFY DEVICE results we will examine |
668 | * @s: string into which data is output | |
669 | * @ofs: offset into identify device page | |
670 | * @len: length of string to return. must be an odd number. | |
671 | * | |
6a62a04d | 672 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
673 | * trims trailing spaces and terminates the resulting string with |
674 | * null. @len must be actual maximum length (even number) + 1. | |
675 | * | |
676 | * LOCKING: | |
677 | * caller. | |
678 | */ | |
6a62a04d TH |
679 | void ata_id_c_string(const u16 *id, unsigned char *s, |
680 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
681 | { |
682 | unsigned char *p; | |
683 | ||
684 | WARN_ON(!(len & 1)); | |
685 | ||
6a62a04d | 686 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
687 | |
688 | p = s + strnlen(s, len - 1); | |
689 | while (p > s && p[-1] == ' ') | |
690 | p--; | |
691 | *p = '\0'; | |
692 | } | |
0baab86b | 693 | |
2940740b TH |
694 | static u64 ata_id_n_sectors(const u16 *id) |
695 | { | |
696 | if (ata_id_has_lba(id)) { | |
697 | if (ata_id_has_lba48(id)) | |
698 | return ata_id_u64(id, 100); | |
699 | else | |
700 | return ata_id_u32(id, 60); | |
701 | } else { | |
702 | if (ata_id_current_chs_valid(id)) | |
703 | return ata_id_u32(id, 57); | |
704 | else | |
705 | return id[1] * id[3] * id[6]; | |
706 | } | |
707 | } | |
708 | ||
0baab86b EF |
709 | /** |
710 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
711 | * @ap: ATA channel to manipulate | |
712 | * @device: ATA device (numbered from zero) to select | |
713 | * | |
714 | * This function performs no actual function. | |
715 | * | |
716 | * May be used as the dev_select() entry in ata_port_operations. | |
717 | * | |
718 | * LOCKING: | |
719 | * caller. | |
720 | */ | |
1da177e4 LT |
721 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
722 | { | |
723 | } | |
724 | ||
0baab86b | 725 | |
1da177e4 LT |
726 | /** |
727 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
728 | * @ap: ATA channel to manipulate | |
729 | * @device: ATA device (numbered from zero) to select | |
730 | * | |
731 | * Use the method defined in the ATA specification to | |
732 | * make either device 0, or device 1, active on the | |
0baab86b EF |
733 | * ATA channel. Works with both PIO and MMIO. |
734 | * | |
735 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
736 | * |
737 | * LOCKING: | |
738 | * caller. | |
739 | */ | |
740 | ||
741 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
742 | { | |
743 | u8 tmp; | |
744 | ||
745 | if (device == 0) | |
746 | tmp = ATA_DEVICE_OBS; | |
747 | else | |
748 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
749 | ||
750 | if (ap->flags & ATA_FLAG_MMIO) { | |
751 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
752 | } else { | |
753 | outb(tmp, ap->ioaddr.device_addr); | |
754 | } | |
755 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
756 | } | |
757 | ||
758 | /** | |
759 | * ata_dev_select - Select device 0/1 on ATA bus | |
760 | * @ap: ATA channel to manipulate | |
761 | * @device: ATA device (numbered from zero) to select | |
762 | * @wait: non-zero to wait for Status register BSY bit to clear | |
763 | * @can_sleep: non-zero if context allows sleeping | |
764 | * | |
765 | * Use the method defined in the ATA specification to | |
766 | * make either device 0, or device 1, active on the | |
767 | * ATA channel. | |
768 | * | |
769 | * This is a high-level version of ata_std_dev_select(), | |
770 | * which additionally provides the services of inserting | |
771 | * the proper pauses and status polling, where needed. | |
772 | * | |
773 | * LOCKING: | |
774 | * caller. | |
775 | */ | |
776 | ||
777 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
778 | unsigned int wait, unsigned int can_sleep) | |
779 | { | |
780 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
781 | ap->id, device, wait); | |
782 | ||
783 | if (wait) | |
784 | ata_wait_idle(ap); | |
785 | ||
786 | ap->ops->dev_select(ap, device); | |
787 | ||
788 | if (wait) { | |
789 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
790 | msleep(150); | |
791 | ata_wait_idle(ap); | |
792 | } | |
793 | } | |
794 | ||
795 | /** | |
796 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 797 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 798 | * |
0bd3300a TH |
799 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
800 | * page. | |
1da177e4 LT |
801 | * |
802 | * LOCKING: | |
803 | * caller. | |
804 | */ | |
805 | ||
0bd3300a | 806 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
807 | { |
808 | DPRINTK("49==0x%04x " | |
809 | "53==0x%04x " | |
810 | "63==0x%04x " | |
811 | "64==0x%04x " | |
812 | "75==0x%04x \n", | |
0bd3300a TH |
813 | id[49], |
814 | id[53], | |
815 | id[63], | |
816 | id[64], | |
817 | id[75]); | |
1da177e4 LT |
818 | DPRINTK("80==0x%04x " |
819 | "81==0x%04x " | |
820 | "82==0x%04x " | |
821 | "83==0x%04x " | |
822 | "84==0x%04x \n", | |
0bd3300a TH |
823 | id[80], |
824 | id[81], | |
825 | id[82], | |
826 | id[83], | |
827 | id[84]); | |
1da177e4 LT |
828 | DPRINTK("88==0x%04x " |
829 | "93==0x%04x\n", | |
0bd3300a TH |
830 | id[88], |
831 | id[93]); | |
1da177e4 LT |
832 | } |
833 | ||
cb95d562 TH |
834 | /** |
835 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
836 | * @id: IDENTIFY data to compute xfer mask from | |
837 | * | |
838 | * Compute the xfermask for this device. This is not as trivial | |
839 | * as it seems if we must consider early devices correctly. | |
840 | * | |
841 | * FIXME: pre IDE drive timing (do we care ?). | |
842 | * | |
843 | * LOCKING: | |
844 | * None. | |
845 | * | |
846 | * RETURNS: | |
847 | * Computed xfermask | |
848 | */ | |
849 | static unsigned int ata_id_xfermask(const u16 *id) | |
850 | { | |
851 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
852 | ||
853 | /* Usual case. Word 53 indicates word 64 is valid */ | |
854 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
855 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
856 | pio_mask <<= 3; | |
857 | pio_mask |= 0x7; | |
858 | } else { | |
859 | /* If word 64 isn't valid then Word 51 high byte holds | |
860 | * the PIO timing number for the maximum. Turn it into | |
861 | * a mask. | |
862 | */ | |
863 | pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
864 | ||
865 | /* But wait.. there's more. Design your standards by | |
866 | * committee and you too can get a free iordy field to | |
867 | * process. However its the speeds not the modes that | |
868 | * are supported... Note drivers using the timing API | |
869 | * will get this right anyway | |
870 | */ | |
871 | } | |
872 | ||
873 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 TH |
874 | |
875 | udma_mask = 0; | |
876 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
877 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
878 | |
879 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
880 | } | |
881 | ||
86e45b6b TH |
882 | /** |
883 | * ata_port_queue_task - Queue port_task | |
884 | * @ap: The ata_port to queue port_task for | |
e2a7f77a RD |
885 | * @fn: workqueue function to be scheduled |
886 | * @data: data value to pass to workqueue function | |
887 | * @delay: delay time for workqueue function | |
86e45b6b TH |
888 | * |
889 | * Schedule @fn(@data) for execution after @delay jiffies using | |
890 | * port_task. There is one port_task per port and it's the | |
891 | * user(low level driver)'s responsibility to make sure that only | |
892 | * one task is active at any given time. | |
893 | * | |
894 | * libata core layer takes care of synchronization between | |
895 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
896 | * synchronization. | |
897 | * | |
898 | * LOCKING: | |
899 | * Inherited from caller. | |
900 | */ | |
901 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | |
902 | unsigned long delay) | |
903 | { | |
904 | int rc; | |
905 | ||
2e755f68 | 906 | if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
907 | return; |
908 | ||
909 | PREPARE_WORK(&ap->port_task, fn, data); | |
910 | ||
911 | if (!delay) | |
912 | rc = queue_work(ata_wq, &ap->port_task); | |
913 | else | |
914 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
915 | ||
916 | /* rc == 0 means that another user is using port task */ | |
917 | WARN_ON(rc == 0); | |
918 | } | |
919 | ||
920 | /** | |
921 | * ata_port_flush_task - Flush port_task | |
922 | * @ap: The ata_port to flush port_task for | |
923 | * | |
924 | * After this function completes, port_task is guranteed not to | |
925 | * be running or scheduled. | |
926 | * | |
927 | * LOCKING: | |
928 | * Kernel thread context (may sleep) | |
929 | */ | |
930 | void ata_port_flush_task(struct ata_port *ap) | |
931 | { | |
932 | unsigned long flags; | |
933 | ||
934 | DPRINTK("ENTER\n"); | |
935 | ||
936 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2e755f68 | 937 | ap->flags |= ATA_FLAG_FLUSH_PORT_TASK; |
86e45b6b TH |
938 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
939 | ||
940 | DPRINTK("flush #1\n"); | |
941 | flush_workqueue(ata_wq); | |
942 | ||
943 | /* | |
944 | * At this point, if a task is running, it's guaranteed to see | |
945 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
946 | * Cancel and flush. | |
947 | */ | |
948 | if (!cancel_delayed_work(&ap->port_task)) { | |
949 | DPRINTK("flush #2\n"); | |
950 | flush_workqueue(ata_wq); | |
951 | } | |
952 | ||
953 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2e755f68 | 954 | ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK; |
86e45b6b TH |
955 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
956 | ||
957 | DPRINTK("EXIT\n"); | |
958 | } | |
959 | ||
77853bf2 | 960 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 961 | { |
77853bf2 | 962 | struct completion *waiting = qc->private_data; |
a2a7a662 | 963 | |
a2a7a662 | 964 | complete(waiting); |
a2a7a662 TH |
965 | } |
966 | ||
967 | /** | |
968 | * ata_exec_internal - execute libata internal command | |
a2a7a662 TH |
969 | * @dev: Device to which the command is sent |
970 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 971 | * @cdb: CDB for packet command |
a2a7a662 TH |
972 | * @dma_dir: Data tranfer direction of the command |
973 | * @buf: Data buffer of the command | |
974 | * @buflen: Length of data buffer | |
975 | * | |
976 | * Executes libata internal command with timeout. @tf contains | |
977 | * command on entry and result on return. Timeout and error | |
978 | * conditions are reported via return value. No recovery action | |
979 | * is taken after a command times out. It's caller's duty to | |
980 | * clean up after timeout. | |
981 | * | |
982 | * LOCKING: | |
983 | * None. Should be called with kernel context, might sleep. | |
984 | */ | |
985 | ||
3373efd8 | 986 | unsigned ata_exec_internal(struct ata_device *dev, |
1ad8e7f9 TH |
987 | struct ata_taskfile *tf, const u8 *cdb, |
988 | int dma_dir, void *buf, unsigned int buflen) | |
a2a7a662 | 989 | { |
3373efd8 | 990 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
991 | u8 command = tf->command; |
992 | struct ata_queued_cmd *qc; | |
2ab7db1f | 993 | unsigned int tag, preempted_tag; |
dedaf2b0 | 994 | u32 preempted_sactive, preempted_qc_active; |
a2a7a662 TH |
995 | DECLARE_COMPLETION(wait); |
996 | unsigned long flags; | |
77853bf2 | 997 | unsigned int err_mask; |
d95a717f | 998 | int rc; |
a2a7a662 TH |
999 | |
1000 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1001 | ||
e3180499 TH |
1002 | /* no internal command while frozen */ |
1003 | if (ap->flags & ATA_FLAG_FROZEN) { | |
1004 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1005 | return AC_ERR_SYSTEM; | |
1006 | } | |
1007 | ||
2ab7db1f | 1008 | /* initialize internal qc */ |
a2a7a662 | 1009 | |
2ab7db1f TH |
1010 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1011 | * drivers choke if any other tag is given. This breaks | |
1012 | * ata_tag_internal() test for those drivers. Don't use new | |
1013 | * EH stuff without converting to it. | |
1014 | */ | |
1015 | if (ap->ops->error_handler) | |
1016 | tag = ATA_TAG_INTERNAL; | |
1017 | else | |
1018 | tag = 0; | |
1019 | ||
6cec4a39 | 1020 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1021 | BUG(); |
f69499f4 | 1022 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1023 | |
1024 | qc->tag = tag; | |
1025 | qc->scsicmd = NULL; | |
1026 | qc->ap = ap; | |
1027 | qc->dev = dev; | |
1028 | ata_qc_reinit(qc); | |
1029 | ||
1030 | preempted_tag = ap->active_tag; | |
dedaf2b0 TH |
1031 | preempted_sactive = ap->sactive; |
1032 | preempted_qc_active = ap->qc_active; | |
2ab7db1f | 1033 | ap->active_tag = ATA_TAG_POISON; |
dedaf2b0 TH |
1034 | ap->sactive = 0; |
1035 | ap->qc_active = 0; | |
2ab7db1f TH |
1036 | |
1037 | /* prepare & issue qc */ | |
a2a7a662 | 1038 | qc->tf = *tf; |
d69cf37d TH |
1039 | if (cdb) |
1040 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1041 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1042 | qc->dma_dir = dma_dir; |
1043 | if (dma_dir != DMA_NONE) { | |
1044 | ata_sg_init_one(qc, buf, buflen); | |
1045 | qc->nsect = buflen / ATA_SECT_SIZE; | |
1046 | } | |
1047 | ||
77853bf2 | 1048 | qc->private_data = &wait; |
a2a7a662 TH |
1049 | qc->complete_fn = ata_qc_complete_internal; |
1050 | ||
8e0e694a | 1051 | ata_qc_issue(qc); |
a2a7a662 TH |
1052 | |
1053 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1054 | ||
d95a717f TH |
1055 | rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL); |
1056 | ||
1057 | ata_port_flush_task(ap); | |
41ade50c | 1058 | |
d95a717f | 1059 | if (!rc) { |
a2a7a662 TH |
1060 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1061 | ||
1062 | /* We're racing with irq here. If we lose, the | |
1063 | * following test prevents us from completing the qc | |
d95a717f TH |
1064 | * twice. If we win, the port is frozen and will be |
1065 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1066 | */ |
77853bf2 | 1067 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1068 | qc->err_mask |= AC_ERR_TIMEOUT; |
1069 | ||
1070 | if (ap->ops->error_handler) | |
1071 | ata_port_freeze(ap); | |
1072 | else | |
1073 | ata_qc_complete(qc); | |
f15a1daf TH |
1074 | |
1075 | ata_dev_printk(dev, KERN_WARNING, | |
1076 | "qc timeout (cmd 0x%x)\n", command); | |
a2a7a662 TH |
1077 | } |
1078 | ||
1079 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1080 | } | |
1081 | ||
d95a717f TH |
1082 | /* do post_internal_cmd */ |
1083 | if (ap->ops->post_internal_cmd) | |
1084 | ap->ops->post_internal_cmd(qc); | |
1085 | ||
1086 | if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) { | |
1087 | ata_dev_printk(dev, KERN_WARNING, "zero err_mask for failed " | |
1088 | "internal command, assuming AC_ERR_OTHER\n"); | |
1089 | qc->err_mask |= AC_ERR_OTHER; | |
1090 | } | |
1091 | ||
15869303 TH |
1092 | /* finish up */ |
1093 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1094 | ||
e61e0672 | 1095 | *tf = qc->result_tf; |
77853bf2 TH |
1096 | err_mask = qc->err_mask; |
1097 | ||
1098 | ata_qc_free(qc); | |
2ab7db1f | 1099 | ap->active_tag = preempted_tag; |
dedaf2b0 TH |
1100 | ap->sactive = preempted_sactive; |
1101 | ap->qc_active = preempted_qc_active; | |
77853bf2 | 1102 | |
1f7dd3e9 TH |
1103 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1104 | * Until those drivers are fixed, we detect the condition | |
1105 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1106 | * port. | |
1107 | * | |
1108 | * Note that this doesn't change any behavior as internal | |
1109 | * command failure results in disabling the device in the | |
1110 | * higher layer for LLDDs without new reset/EH callbacks. | |
1111 | * | |
1112 | * Kill the following code as soon as those drivers are fixed. | |
1113 | */ | |
198e0fed | 1114 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1115 | err_mask |= AC_ERR_SYSTEM; |
1116 | ata_port_probe(ap); | |
1117 | } | |
1118 | ||
15869303 TH |
1119 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
1120 | ||
77853bf2 | 1121 | return err_mask; |
a2a7a662 TH |
1122 | } |
1123 | ||
1bc4ccff AC |
1124 | /** |
1125 | * ata_pio_need_iordy - check if iordy needed | |
1126 | * @adev: ATA device | |
1127 | * | |
1128 | * Check if the current speed of the device requires IORDY. Used | |
1129 | * by various controllers for chip configuration. | |
1130 | */ | |
1131 | ||
1132 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1133 | { | |
1134 | int pio; | |
1135 | int speed = adev->pio_mode - XFER_PIO_0; | |
1136 | ||
1137 | if (speed < 2) | |
1138 | return 0; | |
1139 | if (speed > 2) | |
1140 | return 1; | |
2e9edbf8 | 1141 | |
1bc4ccff AC |
1142 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1143 | ||
1144 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1145 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1146 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1147 | if (pio) { | |
1148 | /* This is cycle times not frequency - watch the logic! */ | |
1149 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1150 | return 1; | |
1151 | return 0; | |
1152 | } | |
1153 | } | |
1154 | return 0; | |
1155 | } | |
1156 | ||
1da177e4 | 1157 | /** |
49016aca | 1158 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1159 | * @dev: target device |
1160 | * @p_class: pointer to class of the target device (may be changed) | |
1161 | * @post_reset: is this read ID post-reset? | |
fe635c7e | 1162 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1163 | * |
49016aca TH |
1164 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1165 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1166 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1167 | * for pre-ATA4 drives. | |
1da177e4 LT |
1168 | * |
1169 | * LOCKING: | |
49016aca TH |
1170 | * Kernel thread context (may sleep) |
1171 | * | |
1172 | * RETURNS: | |
1173 | * 0 on success, -errno otherwise. | |
1da177e4 | 1174 | */ |
a9beec95 TH |
1175 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
1176 | int post_reset, u16 *id) | |
1da177e4 | 1177 | { |
3373efd8 | 1178 | struct ata_port *ap = dev->ap; |
49016aca | 1179 | unsigned int class = *p_class; |
a0123703 | 1180 | struct ata_taskfile tf; |
49016aca TH |
1181 | unsigned int err_mask = 0; |
1182 | const char *reason; | |
1183 | int rc; | |
1da177e4 | 1184 | |
49016aca | 1185 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1da177e4 | 1186 | |
49016aca | 1187 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1188 | |
49016aca | 1189 | retry: |
3373efd8 | 1190 | ata_tf_init(dev, &tf); |
a0123703 | 1191 | |
49016aca TH |
1192 | switch (class) { |
1193 | case ATA_DEV_ATA: | |
a0123703 | 1194 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1195 | break; |
1196 | case ATA_DEV_ATAPI: | |
a0123703 | 1197 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1198 | break; |
1199 | default: | |
1200 | rc = -ENODEV; | |
1201 | reason = "unsupported class"; | |
1202 | goto err_out; | |
1da177e4 LT |
1203 | } |
1204 | ||
a0123703 | 1205 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1206 | |
3373efd8 | 1207 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1208 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1209 | if (err_mask) { |
49016aca TH |
1210 | rc = -EIO; |
1211 | reason = "I/O error"; | |
1da177e4 LT |
1212 | goto err_out; |
1213 | } | |
1214 | ||
49016aca | 1215 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1216 | |
49016aca | 1217 | /* sanity check */ |
692785e7 | 1218 | if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) { |
49016aca TH |
1219 | rc = -EINVAL; |
1220 | reason = "device reports illegal type"; | |
1221 | goto err_out; | |
1222 | } | |
1223 | ||
1224 | if (post_reset && class == ATA_DEV_ATA) { | |
1225 | /* | |
1226 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1227 | * SRST RESET | |
1228 | * IDENTIFY | |
1229 | * INITIALIZE DEVICE PARAMETERS | |
1230 | * anything else.. | |
1231 | * Some drives were very specific about that exact sequence. | |
1232 | */ | |
1233 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1234 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1235 | if (err_mask) { |
1236 | rc = -EIO; | |
1237 | reason = "INIT_DEV_PARAMS failed"; | |
1238 | goto err_out; | |
1239 | } | |
1240 | ||
1241 | /* current CHS translation info (id[53-58]) might be | |
1242 | * changed. reread the identify device info. | |
1243 | */ | |
1244 | post_reset = 0; | |
1245 | goto retry; | |
1246 | } | |
1247 | } | |
1248 | ||
1249 | *p_class = class; | |
fe635c7e | 1250 | |
49016aca TH |
1251 | return 0; |
1252 | ||
1253 | err_out: | |
f15a1daf TH |
1254 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
1255 | "(%s, err_mask=0x%x)\n", reason, err_mask); | |
49016aca TH |
1256 | return rc; |
1257 | } | |
1258 | ||
3373efd8 | 1259 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1260 | { |
3373efd8 | 1261 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1262 | } |
1263 | ||
a6e6ce8e TH |
1264 | static void ata_dev_config_ncq(struct ata_device *dev, |
1265 | char *desc, size_t desc_sz) | |
1266 | { | |
1267 | struct ata_port *ap = dev->ap; | |
1268 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1269 | ||
1270 | if (!ata_id_has_ncq(dev->id)) { | |
1271 | desc[0] = '\0'; | |
1272 | return; | |
1273 | } | |
1274 | ||
1275 | if (ap->flags & ATA_FLAG_NCQ) { | |
1276 | hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1); | |
1277 | dev->flags |= ATA_DFLAG_NCQ; | |
1278 | } | |
1279 | ||
1280 | if (hdepth >= ddepth) | |
1281 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1282 | else | |
1283 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1284 | } | |
1285 | ||
49016aca | 1286 | /** |
ffeae418 | 1287 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 | 1288 | * @dev: Target device to configure |
4c2d721a | 1289 | * @print_info: Enable device info printout |
ffeae418 TH |
1290 | * |
1291 | * Configure @dev according to @dev->id. Generic and low-level | |
1292 | * driver specific fixups are also applied. | |
49016aca TH |
1293 | * |
1294 | * LOCKING: | |
ffeae418 TH |
1295 | * Kernel thread context (may sleep) |
1296 | * | |
1297 | * RETURNS: | |
1298 | * 0 on success, -errno otherwise | |
49016aca | 1299 | */ |
a9beec95 | 1300 | int ata_dev_configure(struct ata_device *dev, int print_info) |
49016aca | 1301 | { |
3373efd8 | 1302 | struct ata_port *ap = dev->ap; |
1148c3a7 | 1303 | const u16 *id = dev->id; |
ff8854b2 | 1304 | unsigned int xfer_mask; |
49016aca TH |
1305 | int i, rc; |
1306 | ||
e1211e3f | 1307 | if (!ata_dev_enabled(dev)) { |
49016aca | 1308 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", |
ffeae418 TH |
1309 | ap->id, dev->devno); |
1310 | return 0; | |
49016aca TH |
1311 | } |
1312 | ||
ffeae418 | 1313 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1da177e4 | 1314 | |
c39f5ebe TH |
1315 | /* print device capabilities */ |
1316 | if (print_info) | |
f15a1daf TH |
1317 | ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x " |
1318 | "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1319 | id[49], id[82], id[83], id[84], | |
1320 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1321 | |
208a9933 | 1322 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1323 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1324 | dev->max_sectors = 0; |
1325 | dev->cdb_len = 0; | |
1326 | dev->n_sectors = 0; | |
1327 | dev->cylinders = 0; | |
1328 | dev->heads = 0; | |
1329 | dev->sectors = 0; | |
1330 | ||
1da177e4 LT |
1331 | /* |
1332 | * common ATA, ATAPI feature tests | |
1333 | */ | |
1334 | ||
ff8854b2 | 1335 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1336 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1337 | |
1148c3a7 | 1338 | ata_dump_id(id); |
1da177e4 LT |
1339 | |
1340 | /* ATA-specific feature tests */ | |
1341 | if (dev->class == ATA_DEV_ATA) { | |
1148c3a7 | 1342 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1343 | |
1148c3a7 | 1344 | if (ata_id_has_lba(id)) { |
4c2d721a | 1345 | const char *lba_desc; |
a6e6ce8e | 1346 | char ncq_desc[20]; |
8bf62ece | 1347 | |
4c2d721a TH |
1348 | lba_desc = "LBA"; |
1349 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1350 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1351 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a TH |
1352 | lba_desc = "LBA48"; |
1353 | } | |
8bf62ece | 1354 | |
a6e6ce8e TH |
1355 | /* config NCQ */ |
1356 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1357 | ||
8bf62ece | 1358 | /* print device info to dmesg */ |
4c2d721a | 1359 | if (print_info) |
f15a1daf | 1360 | ata_dev_printk(dev, KERN_INFO, "ATA-%d, " |
a6e6ce8e | 1361 | "max %s, %Lu sectors: %s %s\n", |
f15a1daf TH |
1362 | ata_id_major_version(id), |
1363 | ata_mode_string(xfer_mask), | |
1364 | (unsigned long long)dev->n_sectors, | |
a6e6ce8e | 1365 | lba_desc, ncq_desc); |
ffeae418 | 1366 | } else { |
8bf62ece AL |
1367 | /* CHS */ |
1368 | ||
1369 | /* Default translation */ | |
1148c3a7 TH |
1370 | dev->cylinders = id[1]; |
1371 | dev->heads = id[3]; | |
1372 | dev->sectors = id[6]; | |
8bf62ece | 1373 | |
1148c3a7 | 1374 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1375 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1376 | dev->cylinders = id[54]; |
1377 | dev->heads = id[55]; | |
1378 | dev->sectors = id[56]; | |
8bf62ece AL |
1379 | } |
1380 | ||
1381 | /* print device info to dmesg */ | |
4c2d721a | 1382 | if (print_info) |
f15a1daf TH |
1383 | ata_dev_printk(dev, KERN_INFO, "ATA-%d, " |
1384 | "max %s, %Lu sectors: CHS %u/%u/%u\n", | |
1385 | ata_id_major_version(id), | |
1386 | ata_mode_string(xfer_mask), | |
1387 | (unsigned long long)dev->n_sectors, | |
1388 | dev->cylinders, dev->heads, dev->sectors); | |
1da177e4 LT |
1389 | } |
1390 | ||
07f6f7d0 AL |
1391 | if (dev->id[59] & 0x100) { |
1392 | dev->multi_count = dev->id[59] & 0xff; | |
1393 | DPRINTK("ata%u: dev %u multi count %u\n", | |
999bb6f4 | 1394 | ap->id, dev->devno, dev->multi_count); |
07f6f7d0 AL |
1395 | } |
1396 | ||
6e7846e9 | 1397 | dev->cdb_len = 16; |
1da177e4 LT |
1398 | } |
1399 | ||
1400 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1401 | else if (dev->class == ATA_DEV_ATAPI) { |
08a556db AL |
1402 | char *cdb_intr_string = ""; |
1403 | ||
1148c3a7 | 1404 | rc = atapi_cdb_len(id); |
1da177e4 | 1405 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
f15a1daf TH |
1406 | ata_dev_printk(dev, KERN_WARNING, |
1407 | "unsupported CDB len\n"); | |
ffeae418 | 1408 | rc = -EINVAL; |
1da177e4 LT |
1409 | goto err_out_nosup; |
1410 | } | |
6e7846e9 | 1411 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 1412 | |
08a556db | 1413 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 1414 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
1415 | cdb_intr_string = ", CDB intr"; |
1416 | } | |
312f7da2 | 1417 | |
1da177e4 | 1418 | /* print device info to dmesg */ |
4c2d721a | 1419 | if (print_info) |
12436c30 TH |
1420 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", |
1421 | ata_mode_string(xfer_mask), | |
1422 | cdb_intr_string); | |
1da177e4 LT |
1423 | } |
1424 | ||
6e7846e9 TH |
1425 | ap->host->max_cmd_len = 0; |
1426 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1427 | ap->host->max_cmd_len = max_t(unsigned int, | |
1428 | ap->host->max_cmd_len, | |
1429 | ap->device[i].cdb_len); | |
1430 | ||
4b2f3ede | 1431 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 1432 | if (ata_dev_knobble(dev)) { |
4c2d721a | 1433 | if (print_info) |
f15a1daf TH |
1434 | ata_dev_printk(dev, KERN_INFO, |
1435 | "applying bridge limits\n"); | |
5a529139 | 1436 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
1437 | dev->max_sectors = ATA_MAX_SECTORS; |
1438 | } | |
1439 | ||
1440 | if (ap->ops->dev_config) | |
1441 | ap->ops->dev_config(ap, dev); | |
1442 | ||
1da177e4 | 1443 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); |
ffeae418 | 1444 | return 0; |
1da177e4 LT |
1445 | |
1446 | err_out_nosup: | |
1da177e4 | 1447 | DPRINTK("EXIT, err\n"); |
ffeae418 | 1448 | return rc; |
1da177e4 LT |
1449 | } |
1450 | ||
1451 | /** | |
1452 | * ata_bus_probe - Reset and probe ATA bus | |
1453 | * @ap: Bus to probe | |
1454 | * | |
0cba632b JG |
1455 | * Master ATA bus probing function. Initiates a hardware-dependent |
1456 | * bus reset, then attempts to identify any devices found on | |
1457 | * the bus. | |
1458 | * | |
1da177e4 | 1459 | * LOCKING: |
0cba632b | 1460 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1461 | * |
1462 | * RETURNS: | |
96072e69 | 1463 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
1464 | */ |
1465 | ||
1466 | static int ata_bus_probe(struct ata_port *ap) | |
1467 | { | |
28ca5c57 | 1468 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 TH |
1469 | int tries[ATA_MAX_DEVICES]; |
1470 | int i, rc, down_xfermask; | |
e82cbdb9 | 1471 | struct ata_device *dev; |
1da177e4 | 1472 | |
28ca5c57 | 1473 | ata_port_probe(ap); |
c19ba8af | 1474 | |
14d2bac1 TH |
1475 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1476 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1477 | ||
1478 | retry: | |
1479 | down_xfermask = 0; | |
1480 | ||
2044470c TH |
1481 | /* reset and determine device classes */ |
1482 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1483 | classes[i] = ATA_DEV_UNKNOWN; | |
2061a47a | 1484 | |
2044470c | 1485 | if (ap->ops->probe_reset) { |
c19ba8af | 1486 | rc = ap->ops->probe_reset(ap, classes); |
28ca5c57 | 1487 | if (rc) { |
f15a1daf TH |
1488 | ata_port_printk(ap, KERN_ERR, |
1489 | "reset failed (errno=%d)\n", rc); | |
28ca5c57 | 1490 | return rc; |
c19ba8af | 1491 | } |
28ca5c57 | 1492 | } else { |
c19ba8af TH |
1493 | ap->ops->phy_reset(ap); |
1494 | ||
f8c2c420 TH |
1495 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1496 | if (!(ap->flags & ATA_FLAG_DISABLED)) | |
28ca5c57 | 1497 | classes[i] = ap->device[i].class; |
f8c2c420 TH |
1498 | ap->device[i].class = ATA_DEV_UNKNOWN; |
1499 | } | |
2044470c | 1500 | |
28ca5c57 TH |
1501 | ata_port_probe(ap); |
1502 | } | |
1da177e4 | 1503 | |
2044470c TH |
1504 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1505 | if (classes[i] == ATA_DEV_UNKNOWN) | |
1506 | classes[i] = ATA_DEV_NONE; | |
1507 | ||
b6079ca4 AC |
1508 | /* after the reset the device state is PIO 0 and the controller |
1509 | state is undefined. Record the mode */ | |
1510 | ||
1511 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1512 | ap->device[i].pio_mode = XFER_PIO_0; | |
1513 | ||
28ca5c57 | 1514 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1515 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e82cbdb9 | 1516 | dev = &ap->device[i]; |
28ca5c57 | 1517 | |
ec573755 TH |
1518 | if (tries[i]) |
1519 | dev->class = classes[i]; | |
ffeae418 | 1520 | |
14d2bac1 | 1521 | if (!ata_dev_enabled(dev)) |
ffeae418 | 1522 | continue; |
ffeae418 | 1523 | |
3373efd8 | 1524 | rc = ata_dev_read_id(dev, &dev->class, 1, dev->id); |
14d2bac1 TH |
1525 | if (rc) |
1526 | goto fail; | |
1527 | ||
3373efd8 | 1528 | rc = ata_dev_configure(dev, 1); |
14d2bac1 TH |
1529 | if (rc) |
1530 | goto fail; | |
1da177e4 LT |
1531 | } |
1532 | ||
e82cbdb9 | 1533 | /* configure transfer mode */ |
3adcebb2 | 1534 | rc = ata_set_mode(ap, &dev); |
51713d35 TH |
1535 | if (rc) { |
1536 | down_xfermask = 1; | |
1537 | goto fail; | |
e82cbdb9 | 1538 | } |
1da177e4 | 1539 | |
e82cbdb9 TH |
1540 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1541 | if (ata_dev_enabled(&ap->device[i])) | |
1542 | return 0; | |
1da177e4 | 1543 | |
e82cbdb9 TH |
1544 | /* no device present, disable port */ |
1545 | ata_port_disable(ap); | |
1da177e4 | 1546 | ap->ops->port_disable(ap); |
96072e69 | 1547 | return -ENODEV; |
14d2bac1 TH |
1548 | |
1549 | fail: | |
1550 | switch (rc) { | |
1551 | case -EINVAL: | |
1552 | case -ENODEV: | |
1553 | tries[dev->devno] = 0; | |
1554 | break; | |
1555 | case -EIO: | |
3c567b7d | 1556 | sata_down_spd_limit(ap); |
14d2bac1 TH |
1557 | /* fall through */ |
1558 | default: | |
1559 | tries[dev->devno]--; | |
1560 | if (down_xfermask && | |
3373efd8 | 1561 | ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) |
14d2bac1 TH |
1562 | tries[dev->devno] = 0; |
1563 | } | |
1564 | ||
ec573755 | 1565 | if (!tries[dev->devno]) { |
3373efd8 TH |
1566 | ata_down_xfermask_limit(dev, 1); |
1567 | ata_dev_disable(dev); | |
ec573755 TH |
1568 | } |
1569 | ||
14d2bac1 | 1570 | goto retry; |
1da177e4 LT |
1571 | } |
1572 | ||
1573 | /** | |
0cba632b JG |
1574 | * ata_port_probe - Mark port as enabled |
1575 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1576 | * |
0cba632b JG |
1577 | * Modify @ap data structure such that the system |
1578 | * thinks that the entire port is enabled. | |
1579 | * | |
1580 | * LOCKING: host_set lock, or some other form of | |
1581 | * serialization. | |
1da177e4 LT |
1582 | */ |
1583 | ||
1584 | void ata_port_probe(struct ata_port *ap) | |
1585 | { | |
198e0fed | 1586 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
1587 | } |
1588 | ||
3be680b7 TH |
1589 | /** |
1590 | * sata_print_link_status - Print SATA link status | |
1591 | * @ap: SATA port to printk link status about | |
1592 | * | |
1593 | * This function prints link speed and status of a SATA link. | |
1594 | * | |
1595 | * LOCKING: | |
1596 | * None. | |
1597 | */ | |
1598 | static void sata_print_link_status(struct ata_port *ap) | |
1599 | { | |
6d5f9732 | 1600 | u32 sstatus, scontrol, tmp; |
3be680b7 | 1601 | |
81952c54 | 1602 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 1603 | return; |
81952c54 | 1604 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 1605 | |
81952c54 | 1606 | if (ata_port_online(ap)) { |
3be680b7 | 1607 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
1608 | ata_port_printk(ap, KERN_INFO, |
1609 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1610 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 1611 | } else { |
f15a1daf TH |
1612 | ata_port_printk(ap, KERN_INFO, |
1613 | "SATA link down (SStatus %X SControl %X)\n", | |
1614 | sstatus, scontrol); | |
3be680b7 TH |
1615 | } |
1616 | } | |
1617 | ||
1da177e4 | 1618 | /** |
780a87f7 JG |
1619 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1620 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1621 | * |
780a87f7 JG |
1622 | * This function issues commands to standard SATA Sxxx |
1623 | * PHY registers, to wake up the phy (and device), and | |
1624 | * clear any reset condition. | |
1da177e4 LT |
1625 | * |
1626 | * LOCKING: | |
0cba632b | 1627 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1628 | * |
1629 | */ | |
1630 | void __sata_phy_reset(struct ata_port *ap) | |
1631 | { | |
1632 | u32 sstatus; | |
1633 | unsigned long timeout = jiffies + (HZ * 5); | |
1634 | ||
1635 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 1636 | /* issue phy wake/reset */ |
81952c54 | 1637 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
1638 | /* Couldn't find anything in SATA I/II specs, but |
1639 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1640 | mdelay(1); | |
1da177e4 | 1641 | } |
81952c54 TH |
1642 | /* phy wake/clear reset */ |
1643 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
1644 | |
1645 | /* wait for phy to become ready, if necessary */ | |
1646 | do { | |
1647 | msleep(200); | |
81952c54 | 1648 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
1649 | if ((sstatus & 0xf) != 1) |
1650 | break; | |
1651 | } while (time_before(jiffies, timeout)); | |
1652 | ||
3be680b7 TH |
1653 | /* print link status */ |
1654 | sata_print_link_status(ap); | |
656563e3 | 1655 | |
3be680b7 | 1656 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 1657 | if (!ata_port_offline(ap)) |
1da177e4 | 1658 | ata_port_probe(ap); |
3be680b7 | 1659 | else |
1da177e4 | 1660 | ata_port_disable(ap); |
1da177e4 | 1661 | |
198e0fed | 1662 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1663 | return; |
1664 | ||
1665 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1666 | ata_port_disable(ap); | |
1667 | return; | |
1668 | } | |
1669 | ||
1670 | ap->cbl = ATA_CBL_SATA; | |
1671 | } | |
1672 | ||
1673 | /** | |
780a87f7 JG |
1674 | * sata_phy_reset - Reset SATA bus. |
1675 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1676 | * |
780a87f7 JG |
1677 | * This function resets the SATA bus, and then probes |
1678 | * the bus for devices. | |
1da177e4 LT |
1679 | * |
1680 | * LOCKING: | |
0cba632b | 1681 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1682 | * |
1683 | */ | |
1684 | void sata_phy_reset(struct ata_port *ap) | |
1685 | { | |
1686 | __sata_phy_reset(ap); | |
198e0fed | 1687 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1688 | return; |
1689 | ata_bus_reset(ap); | |
1690 | } | |
1691 | ||
ebdfca6e AC |
1692 | /** |
1693 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
1694 | * @adev: device |
1695 | * | |
1696 | * Obtain the other device on the same cable, or if none is | |
1697 | * present NULL is returned | |
1698 | */ | |
2e9edbf8 | 1699 | |
3373efd8 | 1700 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 1701 | { |
3373efd8 | 1702 | struct ata_port *ap = adev->ap; |
ebdfca6e | 1703 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 1704 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
1705 | return NULL; |
1706 | return pair; | |
1707 | } | |
1708 | ||
1da177e4 | 1709 | /** |
780a87f7 JG |
1710 | * ata_port_disable - Disable port. |
1711 | * @ap: Port to be disabled. | |
1da177e4 | 1712 | * |
780a87f7 JG |
1713 | * Modify @ap data structure such that the system |
1714 | * thinks that the entire port is disabled, and should | |
1715 | * never attempt to probe or communicate with devices | |
1716 | * on this port. | |
1717 | * | |
1718 | * LOCKING: host_set lock, or some other form of | |
1719 | * serialization. | |
1da177e4 LT |
1720 | */ |
1721 | ||
1722 | void ata_port_disable(struct ata_port *ap) | |
1723 | { | |
1724 | ap->device[0].class = ATA_DEV_NONE; | |
1725 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 1726 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
1727 | } |
1728 | ||
1c3fae4d | 1729 | /** |
3c567b7d | 1730 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
1731 | * @ap: Port to adjust SATA spd limit for |
1732 | * | |
1733 | * Adjust SATA spd limit of @ap downward. Note that this | |
1734 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 1735 | * using sata_set_spd(). |
1c3fae4d TH |
1736 | * |
1737 | * LOCKING: | |
1738 | * Inherited from caller. | |
1739 | * | |
1740 | * RETURNS: | |
1741 | * 0 on success, negative errno on failure | |
1742 | */ | |
3c567b7d | 1743 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 1744 | { |
81952c54 TH |
1745 | u32 sstatus, spd, mask; |
1746 | int rc, highbit; | |
1c3fae4d | 1747 | |
81952c54 TH |
1748 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
1749 | if (rc) | |
1750 | return rc; | |
1c3fae4d TH |
1751 | |
1752 | mask = ap->sata_spd_limit; | |
1753 | if (mask <= 1) | |
1754 | return -EINVAL; | |
1755 | highbit = fls(mask) - 1; | |
1756 | mask &= ~(1 << highbit); | |
1757 | ||
81952c54 | 1758 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
1759 | if (spd <= 1) |
1760 | return -EINVAL; | |
1761 | spd--; | |
1762 | mask &= (1 << spd) - 1; | |
1763 | if (!mask) | |
1764 | return -EINVAL; | |
1765 | ||
1766 | ap->sata_spd_limit = mask; | |
1767 | ||
f15a1daf TH |
1768 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
1769 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
1770 | |
1771 | return 0; | |
1772 | } | |
1773 | ||
3c567b7d | 1774 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
1775 | { |
1776 | u32 spd, limit; | |
1777 | ||
1778 | if (ap->sata_spd_limit == UINT_MAX) | |
1779 | limit = 0; | |
1780 | else | |
1781 | limit = fls(ap->sata_spd_limit); | |
1782 | ||
1783 | spd = (*scontrol >> 4) & 0xf; | |
1784 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
1785 | ||
1786 | return spd != limit; | |
1787 | } | |
1788 | ||
1789 | /** | |
3c567b7d | 1790 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
1791 | * @ap: Port in question |
1792 | * | |
1793 | * Test whether the spd limit in SControl matches | |
1794 | * @ap->sata_spd_limit. This function is used to determine | |
1795 | * whether hardreset is necessary to apply SATA spd | |
1796 | * configuration. | |
1797 | * | |
1798 | * LOCKING: | |
1799 | * Inherited from caller. | |
1800 | * | |
1801 | * RETURNS: | |
1802 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
1803 | */ | |
3c567b7d | 1804 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
1805 | { |
1806 | u32 scontrol; | |
1807 | ||
81952c54 | 1808 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
1809 | return 0; |
1810 | ||
3c567b7d | 1811 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
1812 | } |
1813 | ||
1814 | /** | |
3c567b7d | 1815 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
1816 | * @ap: Port to set SATA spd for |
1817 | * | |
1818 | * Set SATA spd of @ap according to sata_spd_limit. | |
1819 | * | |
1820 | * LOCKING: | |
1821 | * Inherited from caller. | |
1822 | * | |
1823 | * RETURNS: | |
1824 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 1825 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 1826 | */ |
3c567b7d | 1827 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
1828 | { |
1829 | u32 scontrol; | |
81952c54 | 1830 | int rc; |
1c3fae4d | 1831 | |
81952c54 TH |
1832 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
1833 | return rc; | |
1c3fae4d | 1834 | |
3c567b7d | 1835 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
1836 | return 0; |
1837 | ||
81952c54 TH |
1838 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
1839 | return rc; | |
1840 | ||
1c3fae4d TH |
1841 | return 1; |
1842 | } | |
1843 | ||
452503f9 AC |
1844 | /* |
1845 | * This mode timing computation functionality is ported over from | |
1846 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1847 | */ | |
1848 | /* | |
1849 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1850 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1851 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
2e9edbf8 | 1852 | * is currently supported only by Maxtor drives. |
452503f9 AC |
1853 | */ |
1854 | ||
1855 | static const struct ata_timing ata_timing[] = { | |
1856 | ||
1857 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1858 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1859 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1860 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1861 | ||
1862 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1863 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1864 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1865 | ||
1866 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 1867 | |
452503f9 AC |
1868 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
1869 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1870 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 1871 | |
452503f9 AC |
1872 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
1873 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1874 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1875 | ||
1876 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1877 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1878 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1879 | ||
1880 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1881 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1882 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1883 | ||
1884 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1885 | ||
1886 | { 0xFF } | |
1887 | }; | |
1888 | ||
1889 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1890 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1891 | ||
1892 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1893 | { | |
1894 | q->setup = EZ(t->setup * 1000, T); | |
1895 | q->act8b = EZ(t->act8b * 1000, T); | |
1896 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1897 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1898 | q->active = EZ(t->active * 1000, T); | |
1899 | q->recover = EZ(t->recover * 1000, T); | |
1900 | q->cycle = EZ(t->cycle * 1000, T); | |
1901 | q->udma = EZ(t->udma * 1000, UT); | |
1902 | } | |
1903 | ||
1904 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1905 | struct ata_timing *m, unsigned int what) | |
1906 | { | |
1907 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1908 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1909 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1910 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1911 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1912 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1913 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1914 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1915 | } | |
1916 | ||
1917 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1918 | { | |
1919 | const struct ata_timing *t; | |
1920 | ||
1921 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1922 | if (t->mode == 0xFF) |
452503f9 | 1923 | return NULL; |
2e9edbf8 | 1924 | return t; |
452503f9 AC |
1925 | } |
1926 | ||
1927 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1928 | struct ata_timing *t, int T, int UT) | |
1929 | { | |
1930 | const struct ata_timing *s; | |
1931 | struct ata_timing p; | |
1932 | ||
1933 | /* | |
2e9edbf8 | 1934 | * Find the mode. |
75b1f2f8 | 1935 | */ |
452503f9 AC |
1936 | |
1937 | if (!(s = ata_timing_find_mode(speed))) | |
1938 | return -EINVAL; | |
1939 | ||
75b1f2f8 AL |
1940 | memcpy(t, s, sizeof(*s)); |
1941 | ||
452503f9 AC |
1942 | /* |
1943 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1944 | * PIO/MW_DMA cycle timing. | |
1945 | */ | |
1946 | ||
1947 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1948 | memset(&p, 0, sizeof(p)); | |
1949 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1950 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1951 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1952 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1953 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1954 | } | |
1955 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1956 | } | |
1957 | ||
1958 | /* | |
1959 | * Convert the timing to bus clock counts. | |
1960 | */ | |
1961 | ||
75b1f2f8 | 1962 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
1963 | |
1964 | /* | |
c893a3ae RD |
1965 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
1966 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
1967 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
1968 | */ |
1969 | ||
1970 | if (speed > XFER_PIO_4) { | |
1971 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1972 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1973 | } | |
1974 | ||
1975 | /* | |
c893a3ae | 1976 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
1977 | */ |
1978 | ||
1979 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1980 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1981 | t->rec8b = t->cyc8b - t->act8b; | |
1982 | } | |
1983 | ||
1984 | if (t->active + t->recover < t->cycle) { | |
1985 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1986 | t->recover = t->cycle - t->active; | |
1987 | } | |
1988 | ||
1989 | return 0; | |
1990 | } | |
1991 | ||
cf176e1a TH |
1992 | /** |
1993 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a TH |
1994 | * @dev: Device to adjust xfer masks |
1995 | * @force_pio0: Force PIO0 | |
1996 | * | |
1997 | * Adjust xfer masks of @dev downward. Note that this function | |
1998 | * does not apply the change. Invoking ata_set_mode() afterwards | |
1999 | * will apply the limit. | |
2000 | * | |
2001 | * LOCKING: | |
2002 | * Inherited from caller. | |
2003 | * | |
2004 | * RETURNS: | |
2005 | * 0 on success, negative errno on failure | |
2006 | */ | |
3373efd8 | 2007 | int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) |
cf176e1a TH |
2008 | { |
2009 | unsigned long xfer_mask; | |
2010 | int highbit; | |
2011 | ||
2012 | xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, | |
2013 | dev->udma_mask); | |
2014 | ||
2015 | if (!xfer_mask) | |
2016 | goto fail; | |
2017 | /* don't gear down to MWDMA from UDMA, go directly to PIO */ | |
2018 | if (xfer_mask & ATA_MASK_UDMA) | |
2019 | xfer_mask &= ~ATA_MASK_MWDMA; | |
2020 | ||
2021 | highbit = fls(xfer_mask) - 1; | |
2022 | xfer_mask &= ~(1 << highbit); | |
2023 | if (force_pio0) | |
2024 | xfer_mask &= 1 << ATA_SHIFT_PIO; | |
2025 | if (!xfer_mask) | |
2026 | goto fail; | |
2027 | ||
2028 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2029 | &dev->udma_mask); | |
2030 | ||
f15a1daf TH |
2031 | ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", |
2032 | ata_mode_string(xfer_mask)); | |
cf176e1a TH |
2033 | |
2034 | return 0; | |
2035 | ||
2036 | fail: | |
2037 | return -EINVAL; | |
2038 | } | |
2039 | ||
3373efd8 | 2040 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2041 | { |
83206a29 TH |
2042 | unsigned int err_mask; |
2043 | int rc; | |
1da177e4 | 2044 | |
e8384607 | 2045 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2046 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2047 | dev->flags |= ATA_DFLAG_PIO; | |
2048 | ||
3373efd8 | 2049 | err_mask = ata_dev_set_xfermode(dev); |
83206a29 | 2050 | if (err_mask) { |
f15a1daf TH |
2051 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2052 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2053 | return -EIO; |
2054 | } | |
1da177e4 | 2055 | |
3373efd8 | 2056 | rc = ata_dev_revalidate(dev, 0); |
5eb45c02 | 2057 | if (rc) |
83206a29 | 2058 | return rc; |
48a8a14f | 2059 | |
23e71c3d TH |
2060 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2061 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2062 | |
f15a1daf TH |
2063 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2064 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2065 | return 0; |
1da177e4 LT |
2066 | } |
2067 | ||
1da177e4 LT |
2068 | /** |
2069 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2070 | * @ap: port on which timings will be programmed | |
e82cbdb9 | 2071 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2072 | * |
e82cbdb9 TH |
2073 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If |
2074 | * ata_set_mode() fails, pointer to the failing device is | |
2075 | * returned in @r_failed_dev. | |
780a87f7 | 2076 | * |
1da177e4 | 2077 | * LOCKING: |
0cba632b | 2078 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2079 | * |
2080 | * RETURNS: | |
2081 | * 0 on success, negative errno otherwise | |
1da177e4 | 2082 | */ |
1ad8e7f9 | 2083 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) |
1da177e4 | 2084 | { |
e8e0619f | 2085 | struct ata_device *dev; |
e82cbdb9 | 2086 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 2087 | |
3adcebb2 TH |
2088 | /* has private set_mode? */ |
2089 | if (ap->ops->set_mode) { | |
2090 | /* FIXME: make ->set_mode handle no device case and | |
2091 | * return error code and failing device on failure. | |
2092 | */ | |
2093 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
2094 | if (ata_dev_enabled(&ap->device[i])) { | |
2095 | ap->ops->set_mode(ap); | |
2096 | break; | |
2097 | } | |
2098 | } | |
2099 | return 0; | |
2100 | } | |
2101 | ||
a6d5a51c TH |
2102 | /* step 1: calculate xfer_mask */ |
2103 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 2104 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 2105 | |
e8e0619f TH |
2106 | dev = &ap->device[i]; |
2107 | ||
e1211e3f | 2108 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2109 | continue; |
2110 | ||
3373efd8 | 2111 | ata_dev_xfermask(dev); |
1da177e4 | 2112 | |
acf356b1 TH |
2113 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2114 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2115 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2116 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2117 | |
4f65977d | 2118 | found = 1; |
5444a6f4 AC |
2119 | if (dev->dma_mode) |
2120 | used_dma = 1; | |
a6d5a51c | 2121 | } |
4f65977d | 2122 | if (!found) |
e82cbdb9 | 2123 | goto out; |
a6d5a51c TH |
2124 | |
2125 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2126 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2127 | dev = &ap->device[i]; | |
2128 | if (!ata_dev_enabled(dev)) | |
2129 | continue; | |
2130 | ||
2131 | if (!dev->pio_mode) { | |
f15a1daf | 2132 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2133 | rc = -EINVAL; |
e82cbdb9 | 2134 | goto out; |
e8e0619f TH |
2135 | } |
2136 | ||
2137 | dev->xfer_mode = dev->pio_mode; | |
2138 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2139 | if (ap->ops->set_piomode) | |
2140 | ap->ops->set_piomode(ap, dev); | |
2141 | } | |
1da177e4 | 2142 | |
a6d5a51c | 2143 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2144 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2145 | dev = &ap->device[i]; | |
2146 | ||
2147 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2148 | continue; | |
2149 | ||
2150 | dev->xfer_mode = dev->dma_mode; | |
2151 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2152 | if (ap->ops->set_dmamode) | |
2153 | ap->ops->set_dmamode(ap, dev); | |
2154 | } | |
1da177e4 LT |
2155 | |
2156 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2157 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2158 | dev = &ap->device[i]; |
1da177e4 | 2159 | |
e1211e3f | 2160 | if (!ata_dev_enabled(dev)) |
83206a29 TH |
2161 | continue; |
2162 | ||
3373efd8 | 2163 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2164 | if (rc) |
e82cbdb9 | 2165 | goto out; |
83206a29 | 2166 | } |
1da177e4 | 2167 | |
e8e0619f TH |
2168 | /* Record simplex status. If we selected DMA then the other |
2169 | * host channels are not permitted to do so. | |
5444a6f4 | 2170 | */ |
5444a6f4 AC |
2171 | if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX)) |
2172 | ap->host_set->simplex_claimed = 1; | |
2173 | ||
e8e0619f | 2174 | /* step5: chip specific finalisation */ |
1da177e4 LT |
2175 | if (ap->ops->post_set_mode) |
2176 | ap->ops->post_set_mode(ap); | |
2177 | ||
e82cbdb9 TH |
2178 | out: |
2179 | if (rc) | |
2180 | *r_failed_dev = dev; | |
2181 | return rc; | |
1da177e4 LT |
2182 | } |
2183 | ||
1fdffbce JG |
2184 | /** |
2185 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2186 | * @ap: port to which command is being issued | |
2187 | * @tf: ATA taskfile register set | |
2188 | * | |
2189 | * Issues ATA taskfile register set to ATA host controller, | |
2190 | * with proper synchronization with interrupt handler and | |
2191 | * other threads. | |
2192 | * | |
2193 | * LOCKING: | |
2194 | * spin_lock_irqsave(host_set lock) | |
2195 | */ | |
2196 | ||
2197 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2198 | const struct ata_taskfile *tf) | |
2199 | { | |
2200 | ap->ops->tf_load(ap, tf); | |
2201 | ap->ops->exec_command(ap, tf); | |
2202 | } | |
2203 | ||
1da177e4 LT |
2204 | /** |
2205 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2206 | * @ap: port containing status register to be polled | |
2207 | * @tmout_pat: impatience timeout | |
2208 | * @tmout: overall timeout | |
2209 | * | |
780a87f7 JG |
2210 | * Sleep until ATA Status register bit BSY clears, |
2211 | * or a timeout occurs. | |
2212 | * | |
2213 | * LOCKING: None. | |
1da177e4 LT |
2214 | */ |
2215 | ||
6f8b9958 TH |
2216 | unsigned int ata_busy_sleep (struct ata_port *ap, |
2217 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2218 | { |
2219 | unsigned long timer_start, timeout; | |
2220 | u8 status; | |
2221 | ||
2222 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2223 | timer_start = jiffies; | |
2224 | timeout = timer_start + tmout_pat; | |
2225 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2226 | msleep(50); | |
2227 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2228 | } | |
2229 | ||
2230 | if (status & ATA_BUSY) | |
f15a1daf TH |
2231 | ata_port_printk(ap, KERN_WARNING, |
2232 | "port is slow to respond, please be patient\n"); | |
1da177e4 LT |
2233 | |
2234 | timeout = timer_start + tmout; | |
2235 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2236 | msleep(50); | |
2237 | status = ata_chk_status(ap); | |
2238 | } | |
2239 | ||
2240 | if (status & ATA_BUSY) { | |
f15a1daf TH |
2241 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
2242 | "(%lu secs)\n", tmout / HZ); | |
1da177e4 LT |
2243 | return 1; |
2244 | } | |
2245 | ||
2246 | return 0; | |
2247 | } | |
2248 | ||
2249 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2250 | { | |
2251 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2252 | unsigned int dev0 = devmask & (1 << 0); | |
2253 | unsigned int dev1 = devmask & (1 << 1); | |
2254 | unsigned long timeout; | |
2255 | ||
2256 | /* if device 0 was found in ata_devchk, wait for its | |
2257 | * BSY bit to clear | |
2258 | */ | |
2259 | if (dev0) | |
2260 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2261 | ||
2262 | /* if device 1 was found in ata_devchk, wait for | |
2263 | * register access, then wait for BSY to clear | |
2264 | */ | |
2265 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2266 | while (dev1) { | |
2267 | u8 nsect, lbal; | |
2268 | ||
2269 | ap->ops->dev_select(ap, 1); | |
2270 | if (ap->flags & ATA_FLAG_MMIO) { | |
2271 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
2272 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
2273 | } else { | |
2274 | nsect = inb(ioaddr->nsect_addr); | |
2275 | lbal = inb(ioaddr->lbal_addr); | |
2276 | } | |
2277 | if ((nsect == 1) && (lbal == 1)) | |
2278 | break; | |
2279 | if (time_after(jiffies, timeout)) { | |
2280 | dev1 = 0; | |
2281 | break; | |
2282 | } | |
2283 | msleep(50); /* give drive a breather */ | |
2284 | } | |
2285 | if (dev1) | |
2286 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2287 | ||
2288 | /* is all this really necessary? */ | |
2289 | ap->ops->dev_select(ap, 0); | |
2290 | if (dev1) | |
2291 | ap->ops->dev_select(ap, 1); | |
2292 | if (dev0) | |
2293 | ap->ops->dev_select(ap, 0); | |
2294 | } | |
2295 | ||
1da177e4 LT |
2296 | static unsigned int ata_bus_softreset(struct ata_port *ap, |
2297 | unsigned int devmask) | |
2298 | { | |
2299 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2300 | ||
2301 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2302 | ||
2303 | /* software reset. causes dev0 to be selected */ | |
2304 | if (ap->flags & ATA_FLAG_MMIO) { | |
2305 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2306 | udelay(20); /* FIXME: flush */ | |
2307 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2308 | udelay(20); /* FIXME: flush */ | |
2309 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2310 | } else { | |
2311 | outb(ap->ctl, ioaddr->ctl_addr); | |
2312 | udelay(10); | |
2313 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2314 | udelay(10); | |
2315 | outb(ap->ctl, ioaddr->ctl_addr); | |
2316 | } | |
2317 | ||
2318 | /* spec mandates ">= 2ms" before checking status. | |
2319 | * We wait 150ms, because that was the magic delay used for | |
2320 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2321 | * between when the ATA command register is written, and then | |
2322 | * status is checked. Because waiting for "a while" before | |
2323 | * checking status is fine, post SRST, we perform this magic | |
2324 | * delay here as well. | |
09c7ad79 AC |
2325 | * |
2326 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
2327 | */ |
2328 | msleep(150); | |
2329 | ||
2e9edbf8 | 2330 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
2331 | * the bus shows 0xFF because the odd clown forgets the D7 |
2332 | * pulldown resistor. | |
2333 | */ | |
987d2f05 | 2334 | if (ata_check_status(ap) == 0xFF) { |
f15a1daf | 2335 | ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n"); |
298a41ca | 2336 | return AC_ERR_OTHER; |
987d2f05 | 2337 | } |
09c7ad79 | 2338 | |
1da177e4 LT |
2339 | ata_bus_post_reset(ap, devmask); |
2340 | ||
2341 | return 0; | |
2342 | } | |
2343 | ||
2344 | /** | |
2345 | * ata_bus_reset - reset host port and associated ATA channel | |
2346 | * @ap: port to reset | |
2347 | * | |
2348 | * This is typically the first time we actually start issuing | |
2349 | * commands to the ATA channel. We wait for BSY to clear, then | |
2350 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2351 | * result. Determine what devices, if any, are on the channel | |
2352 | * by looking at the device 0/1 error register. Look at the signature | |
2353 | * stored in each device's taskfile registers, to determine if | |
2354 | * the device is ATA or ATAPI. | |
2355 | * | |
2356 | * LOCKING: | |
0cba632b JG |
2357 | * PCI/etc. bus probe sem. |
2358 | * Obtains host_set lock. | |
1da177e4 LT |
2359 | * |
2360 | * SIDE EFFECTS: | |
198e0fed | 2361 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
2362 | */ |
2363 | ||
2364 | void ata_bus_reset(struct ata_port *ap) | |
2365 | { | |
2366 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2367 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2368 | u8 err; | |
aec5c3c1 | 2369 | unsigned int dev0, dev1 = 0, devmask = 0; |
1da177e4 LT |
2370 | |
2371 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2372 | ||
2373 | /* determine if device 0/1 are present */ | |
2374 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2375 | dev0 = 1; | |
2376 | else { | |
2377 | dev0 = ata_devchk(ap, 0); | |
2378 | if (slave_possible) | |
2379 | dev1 = ata_devchk(ap, 1); | |
2380 | } | |
2381 | ||
2382 | if (dev0) | |
2383 | devmask |= (1 << 0); | |
2384 | if (dev1) | |
2385 | devmask |= (1 << 1); | |
2386 | ||
2387 | /* select device 0 again */ | |
2388 | ap->ops->dev_select(ap, 0); | |
2389 | ||
2390 | /* issue bus reset */ | |
2391 | if (ap->flags & ATA_FLAG_SRST) | |
aec5c3c1 TH |
2392 | if (ata_bus_softreset(ap, devmask)) |
2393 | goto err_out; | |
1da177e4 LT |
2394 | |
2395 | /* | |
2396 | * determine by signature whether we have ATA or ATAPI devices | |
2397 | */ | |
b4dc7623 | 2398 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2399 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2400 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2401 | |
2402 | /* re-enable interrupts */ | |
2403 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2404 | ata_irq_on(ap); | |
2405 | ||
2406 | /* is double-select really necessary? */ | |
2407 | if (ap->device[1].class != ATA_DEV_NONE) | |
2408 | ap->ops->dev_select(ap, 1); | |
2409 | if (ap->device[0].class != ATA_DEV_NONE) | |
2410 | ap->ops->dev_select(ap, 0); | |
2411 | ||
2412 | /* if no devices were detected, disable this port */ | |
2413 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2414 | (ap->device[1].class == ATA_DEV_NONE)) | |
2415 | goto err_out; | |
2416 | ||
2417 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2418 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2419 | if (ap->flags & ATA_FLAG_MMIO) | |
2420 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2421 | else | |
2422 | outb(ap->ctl, ioaddr->ctl_addr); | |
2423 | } | |
2424 | ||
2425 | DPRINTK("EXIT\n"); | |
2426 | return; | |
2427 | ||
2428 | err_out: | |
f15a1daf | 2429 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
2430 | ap->ops->port_disable(ap); |
2431 | ||
2432 | DPRINTK("EXIT\n"); | |
2433 | } | |
2434 | ||
d7bb4cc7 TH |
2435 | /** |
2436 | * sata_phy_debounce - debounce SATA phy status | |
2437 | * @ap: ATA port to debounce SATA phy status for | |
2438 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2439 | * | |
2440 | * Make sure SStatus of @ap reaches stable state, determined by | |
2441 | * holding the same value where DET is not 1 for @duration polled | |
2442 | * every @interval, before @timeout. Timeout constraints the | |
2443 | * beginning of the stable state. Because, after hot unplugging, | |
2444 | * DET gets stuck at 1 on some controllers, this functions waits | |
2445 | * until timeout then returns 0 if DET is stable at 1. | |
2446 | * | |
2447 | * LOCKING: | |
2448 | * Kernel thread context (may sleep) | |
2449 | * | |
2450 | * RETURNS: | |
2451 | * 0 on success, -errno on failure. | |
2452 | */ | |
2453 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) | |
7a7921e8 | 2454 | { |
d7bb4cc7 TH |
2455 | unsigned long interval_msec = params[0]; |
2456 | unsigned long duration = params[1] * HZ / 1000; | |
2457 | unsigned long timeout = jiffies + params[2] * HZ / 1000; | |
2458 | unsigned long last_jiffies; | |
2459 | u32 last, cur; | |
2460 | int rc; | |
2461 | ||
2462 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2463 | return rc; | |
2464 | cur &= 0xf; | |
2465 | ||
2466 | last = cur; | |
2467 | last_jiffies = jiffies; | |
2468 | ||
2469 | while (1) { | |
2470 | msleep(interval_msec); | |
2471 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2472 | return rc; | |
2473 | cur &= 0xf; | |
2474 | ||
2475 | /* DET stable? */ | |
2476 | if (cur == last) { | |
2477 | if (cur == 1 && time_before(jiffies, timeout)) | |
2478 | continue; | |
2479 | if (time_after(jiffies, last_jiffies + duration)) | |
2480 | return 0; | |
2481 | continue; | |
2482 | } | |
2483 | ||
2484 | /* unstable, start over */ | |
2485 | last = cur; | |
2486 | last_jiffies = jiffies; | |
2487 | ||
2488 | /* check timeout */ | |
2489 | if (time_after(jiffies, timeout)) | |
2490 | return -EBUSY; | |
2491 | } | |
2492 | } | |
2493 | ||
2494 | /** | |
2495 | * sata_phy_resume - resume SATA phy | |
2496 | * @ap: ATA port to resume SATA phy for | |
2497 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2498 | * | |
2499 | * Resume SATA phy of @ap and debounce it. | |
2500 | * | |
2501 | * LOCKING: | |
2502 | * Kernel thread context (may sleep) | |
2503 | * | |
2504 | * RETURNS: | |
2505 | * 0 on success, -errno on failure. | |
2506 | */ | |
2507 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params) | |
2508 | { | |
2509 | u32 scontrol; | |
81952c54 TH |
2510 | int rc; |
2511 | ||
2512 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2513 | return rc; | |
7a7921e8 | 2514 | |
852ee16a | 2515 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
2516 | |
2517 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2518 | return rc; | |
7a7921e8 | 2519 | |
d7bb4cc7 TH |
2520 | /* Some PHYs react badly if SStatus is pounded immediately |
2521 | * after resuming. Delay 200ms before debouncing. | |
2522 | */ | |
2523 | msleep(200); | |
7a7921e8 | 2524 | |
d7bb4cc7 | 2525 | return sata_phy_debounce(ap, params); |
7a7921e8 TH |
2526 | } |
2527 | ||
f5914a46 TH |
2528 | static void ata_wait_spinup(struct ata_port *ap) |
2529 | { | |
2530 | struct ata_eh_context *ehc = &ap->eh_context; | |
2531 | unsigned long end, secs; | |
2532 | int rc; | |
2533 | ||
2534 | /* first, debounce phy if SATA */ | |
2535 | if (ap->cbl == ATA_CBL_SATA) { | |
2536 | rc = sata_phy_debounce(ap, sata_deb_timing_eh); | |
2537 | ||
2538 | /* if debounced successfully and offline, no need to wait */ | |
2539 | if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) | |
2540 | return; | |
2541 | } | |
2542 | ||
2543 | /* okay, let's give the drive time to spin up */ | |
2544 | end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; | |
2545 | secs = ((end - jiffies) + HZ - 1) / HZ; | |
2546 | ||
2547 | if (time_after(jiffies, end)) | |
2548 | return; | |
2549 | ||
2550 | if (secs > 5) | |
2551 | ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " | |
2552 | "(%lu secs)\n", secs); | |
2553 | ||
2554 | schedule_timeout_uninterruptible(end - jiffies); | |
2555 | } | |
2556 | ||
2557 | /** | |
2558 | * ata_std_prereset - prepare for reset | |
2559 | * @ap: ATA port to be reset | |
2560 | * | |
2561 | * @ap is about to be reset. Initialize it. | |
2562 | * | |
2563 | * LOCKING: | |
2564 | * Kernel thread context (may sleep) | |
2565 | * | |
2566 | * RETURNS: | |
2567 | * 0 on success, -errno otherwise. | |
2568 | */ | |
2569 | int ata_std_prereset(struct ata_port *ap) | |
2570 | { | |
2571 | struct ata_eh_context *ehc = &ap->eh_context; | |
2572 | const unsigned long *timing; | |
2573 | int rc; | |
2574 | ||
2575 | /* hotplug? */ | |
2576 | if (ehc->i.flags & ATA_EHI_HOTPLUGGED) { | |
2577 | if (ap->flags & ATA_FLAG_HRST_TO_RESUME) | |
2578 | ehc->i.action |= ATA_EH_HARDRESET; | |
2579 | if (ap->flags & ATA_FLAG_SKIP_D2H_BSY) | |
2580 | ata_wait_spinup(ap); | |
2581 | } | |
2582 | ||
2583 | /* if we're about to do hardreset, nothing more to do */ | |
2584 | if (ehc->i.action & ATA_EH_HARDRESET) | |
2585 | return 0; | |
2586 | ||
2587 | /* if SATA, resume phy */ | |
2588 | if (ap->cbl == ATA_CBL_SATA) { | |
2589 | if (ap->flags & ATA_FLAG_LOADING) | |
2590 | timing = sata_deb_timing_boot; | |
2591 | else | |
2592 | timing = sata_deb_timing_eh; | |
2593 | ||
2594 | rc = sata_phy_resume(ap, timing); | |
2595 | if (rc && rc != -EOPNOTSUPP) { | |
2596 | /* phy resume failed */ | |
2597 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | |
2598 | "link for reset (errno=%d)\n", rc); | |
2599 | return rc; | |
2600 | } | |
2601 | } | |
2602 | ||
2603 | /* Wait for !BSY if the controller can wait for the first D2H | |
2604 | * Reg FIS and we don't know that no device is attached. | |
2605 | */ | |
2606 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) | |
2607 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2608 | ||
2609 | return 0; | |
2610 | } | |
2611 | ||
8a19ac89 TH |
2612 | /** |
2613 | * ata_std_probeinit - initialize probing | |
2614 | * @ap: port to be probed | |
2615 | * | |
2616 | * @ap is about to be probed. Initialize it. This function is | |
2617 | * to be used as standard callback for ata_drive_probe_reset(). | |
3a39746a TH |
2618 | * |
2619 | * NOTE!!! Do not use this function as probeinit if a low level | |
2620 | * driver implements only hardreset. Just pass NULL as probeinit | |
2621 | * in that case. Using this function is probably okay but doing | |
2622 | * so makes reset sequence different from the original | |
2623 | * ->phy_reset implementation and Jeff nervous. :-P | |
8a19ac89 | 2624 | */ |
17efc5f7 | 2625 | void ata_std_probeinit(struct ata_port *ap) |
8a19ac89 | 2626 | { |
d7bb4cc7 TH |
2627 | static const unsigned long deb_timing[] = { 5, 100, 5000 }; |
2628 | ||
81952c54 | 2629 | /* resume link */ |
d7bb4cc7 | 2630 | sata_phy_resume(ap, deb_timing); |
1c3fae4d | 2631 | |
81952c54 TH |
2632 | /* wait for device */ |
2633 | if (ata_port_online(ap)) | |
2634 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
8a19ac89 TH |
2635 | } |
2636 | ||
c2bd5804 TH |
2637 | /** |
2638 | * ata_std_softreset - reset host port via ATA SRST | |
2639 | * @ap: port to reset | |
c2bd5804 TH |
2640 | * @classes: resulting classes of attached devices |
2641 | * | |
2642 | * Reset host port using ATA SRST. This function is to be used | |
2643 | * as standard callback for ata_drive_*_reset() functions. | |
2644 | * | |
2645 | * LOCKING: | |
2646 | * Kernel thread context (may sleep) | |
2647 | * | |
2648 | * RETURNS: | |
2649 | * 0 on success, -errno otherwise. | |
2650 | */ | |
2bf2cb26 | 2651 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) |
c2bd5804 TH |
2652 | { |
2653 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2654 | unsigned int devmask = 0, err_mask; | |
2655 | u8 err; | |
2656 | ||
2657 | DPRINTK("ENTER\n"); | |
2658 | ||
81952c54 | 2659 | if (ata_port_offline(ap)) { |
3a39746a TH |
2660 | classes[0] = ATA_DEV_NONE; |
2661 | goto out; | |
2662 | } | |
2663 | ||
c2bd5804 TH |
2664 | /* determine if device 0/1 are present */ |
2665 | if (ata_devchk(ap, 0)) | |
2666 | devmask |= (1 << 0); | |
2667 | if (slave_possible && ata_devchk(ap, 1)) | |
2668 | devmask |= (1 << 1); | |
2669 | ||
c2bd5804 TH |
2670 | /* select device 0 again */ |
2671 | ap->ops->dev_select(ap, 0); | |
2672 | ||
2673 | /* issue bus reset */ | |
2674 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2675 | err_mask = ata_bus_softreset(ap, devmask); | |
2676 | if (err_mask) { | |
f15a1daf TH |
2677 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", |
2678 | err_mask); | |
c2bd5804 TH |
2679 | return -EIO; |
2680 | } | |
2681 | ||
2682 | /* determine by signature whether we have ATA or ATAPI devices */ | |
2683 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
2684 | if (slave_possible && err != 0x81) | |
2685 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
2686 | ||
3a39746a | 2687 | out: |
c2bd5804 TH |
2688 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
2689 | return 0; | |
2690 | } | |
2691 | ||
2692 | /** | |
2693 | * sata_std_hardreset - reset host port via SATA phy reset | |
2694 | * @ap: port to reset | |
c2bd5804 TH |
2695 | * @class: resulting class of attached device |
2696 | * | |
2697 | * SATA phy-reset host port using DET bits of SControl register. | |
2698 | * This function is to be used as standard callback for | |
2699 | * ata_drive_*_reset(). | |
2700 | * | |
2701 | * LOCKING: | |
2702 | * Kernel thread context (may sleep) | |
2703 | * | |
2704 | * RETURNS: | |
2705 | * 0 on success, -errno otherwise. | |
2706 | */ | |
2bf2cb26 | 2707 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) |
c2bd5804 | 2708 | { |
852ee16a | 2709 | u32 scontrol; |
81952c54 | 2710 | int rc; |
852ee16a | 2711 | |
c2bd5804 TH |
2712 | DPRINTK("ENTER\n"); |
2713 | ||
3c567b7d | 2714 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
2715 | /* SATA spec says nothing about how to reconfigure |
2716 | * spd. To be on the safe side, turn off phy during | |
2717 | * reconfiguration. This works for at least ICH7 AHCI | |
2718 | * and Sil3124. | |
2719 | */ | |
81952c54 TH |
2720 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2721 | return rc; | |
2722 | ||
1c3fae4d | 2723 | scontrol = (scontrol & 0x0f0) | 0x302; |
81952c54 TH |
2724 | |
2725 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2726 | return rc; | |
1c3fae4d | 2727 | |
3c567b7d | 2728 | sata_set_spd(ap); |
1c3fae4d TH |
2729 | } |
2730 | ||
2731 | /* issue phy wake/reset */ | |
81952c54 TH |
2732 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2733 | return rc; | |
2734 | ||
852ee16a | 2735 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
2736 | |
2737 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
2738 | return rc; | |
c2bd5804 | 2739 | |
1c3fae4d | 2740 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
2741 | * 10.4.2 says at least 1 ms. |
2742 | */ | |
2743 | msleep(1); | |
2744 | ||
1c3fae4d | 2745 | /* bring phy back */ |
d7bb4cc7 | 2746 | sata_phy_resume(ap, sata_deb_timing_eh); |
c2bd5804 | 2747 | |
c2bd5804 | 2748 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 2749 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
2750 | *class = ATA_DEV_NONE; |
2751 | DPRINTK("EXIT, link offline\n"); | |
2752 | return 0; | |
2753 | } | |
2754 | ||
2755 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
f15a1daf TH |
2756 | ata_port_printk(ap, KERN_ERR, |
2757 | "COMRESET failed (device not ready)\n"); | |
c2bd5804 TH |
2758 | return -EIO; |
2759 | } | |
2760 | ||
3a39746a TH |
2761 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
2762 | ||
c2bd5804 TH |
2763 | *class = ata_dev_try_classify(ap, 0, NULL); |
2764 | ||
2765 | DPRINTK("EXIT, class=%u\n", *class); | |
2766 | return 0; | |
2767 | } | |
2768 | ||
2769 | /** | |
2770 | * ata_std_postreset - standard postreset callback | |
2771 | * @ap: the target ata_port | |
2772 | * @classes: classes of attached devices | |
2773 | * | |
2774 | * This function is invoked after a successful reset. Note that | |
2775 | * the device might have been reset more than once using | |
2776 | * different reset methods before postreset is invoked. | |
c2bd5804 TH |
2777 | * |
2778 | * This function is to be used as standard callback for | |
2779 | * ata_drive_*_reset(). | |
2780 | * | |
2781 | * LOCKING: | |
2782 | * Kernel thread context (may sleep) | |
2783 | */ | |
2784 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
2785 | { | |
dc2b3515 TH |
2786 | u32 serror; |
2787 | ||
c2bd5804 TH |
2788 | DPRINTK("ENTER\n"); |
2789 | ||
c2bd5804 | 2790 | /* print link status */ |
81952c54 | 2791 | sata_print_link_status(ap); |
c2bd5804 | 2792 | |
dc2b3515 TH |
2793 | /* clear SError */ |
2794 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
2795 | sata_scr_write(ap, SCR_ERROR, serror); | |
2796 | ||
3a39746a | 2797 | /* re-enable interrupts */ |
e3180499 TH |
2798 | if (!ap->ops->error_handler) { |
2799 | /* FIXME: hack. create a hook instead */ | |
2800 | if (ap->ioaddr.ctl_addr) | |
2801 | ata_irq_on(ap); | |
2802 | } | |
c2bd5804 TH |
2803 | |
2804 | /* is double-select really necessary? */ | |
2805 | if (classes[0] != ATA_DEV_NONE) | |
2806 | ap->ops->dev_select(ap, 1); | |
2807 | if (classes[1] != ATA_DEV_NONE) | |
2808 | ap->ops->dev_select(ap, 0); | |
2809 | ||
3a39746a TH |
2810 | /* bail out if no device is present */ |
2811 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
2812 | DPRINTK("EXIT, no device\n"); | |
2813 | return; | |
2814 | } | |
2815 | ||
2816 | /* set up device control */ | |
2817 | if (ap->ioaddr.ctl_addr) { | |
2818 | if (ap->flags & ATA_FLAG_MMIO) | |
2819 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
2820 | else | |
2821 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
2822 | } | |
c2bd5804 TH |
2823 | |
2824 | DPRINTK("EXIT\n"); | |
2825 | } | |
2826 | ||
2827 | /** | |
2828 | * ata_std_probe_reset - standard probe reset method | |
2829 | * @ap: prot to perform probe-reset | |
2830 | * @classes: resulting classes of attached devices | |
2831 | * | |
2832 | * The stock off-the-shelf ->probe_reset method. | |
2833 | * | |
2834 | * LOCKING: | |
2835 | * Kernel thread context (may sleep) | |
2836 | * | |
2837 | * RETURNS: | |
2838 | * 0 on success, -errno otherwise. | |
2839 | */ | |
2840 | int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes) | |
2841 | { | |
2842 | ata_reset_fn_t hardreset; | |
2843 | ||
2844 | hardreset = NULL; | |
81952c54 | 2845 | if (sata_scr_valid(ap)) |
c2bd5804 TH |
2846 | hardreset = sata_std_hardreset; |
2847 | ||
8a19ac89 | 2848 | return ata_drive_probe_reset(ap, ata_std_probeinit, |
7944ea95 | 2849 | ata_std_softreset, hardreset, |
c2bd5804 TH |
2850 | ata_std_postreset, classes); |
2851 | } | |
2852 | ||
2bf2cb26 | 2853 | int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset, |
96bd39ec | 2854 | unsigned int *classes) |
a62c0fc5 TH |
2855 | { |
2856 | int i, rc; | |
2857 | ||
2858 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2859 | classes[i] = ATA_DEV_UNKNOWN; | |
2860 | ||
2bf2cb26 | 2861 | rc = reset(ap, classes); |
a62c0fc5 TH |
2862 | if (rc) |
2863 | return rc; | |
2864 | ||
2865 | /* If any class isn't ATA_DEV_UNKNOWN, consider classification | |
2866 | * is complete and convert all ATA_DEV_UNKNOWN to | |
2867 | * ATA_DEV_NONE. | |
2868 | */ | |
2869 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2870 | if (classes[i] != ATA_DEV_UNKNOWN) | |
2871 | break; | |
2872 | ||
2873 | if (i < ATA_MAX_DEVICES) | |
2874 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2875 | if (classes[i] == ATA_DEV_UNKNOWN) | |
2876 | classes[i] = ATA_DEV_NONE; | |
2877 | ||
9974e7cc | 2878 | return 0; |
a62c0fc5 TH |
2879 | } |
2880 | ||
2881 | /** | |
2882 | * ata_drive_probe_reset - Perform probe reset with given methods | |
2883 | * @ap: port to reset | |
7944ea95 | 2884 | * @probeinit: probeinit method (can be NULL) |
a62c0fc5 TH |
2885 | * @softreset: softreset method (can be NULL) |
2886 | * @hardreset: hardreset method (can be NULL) | |
2887 | * @postreset: postreset method (can be NULL) | |
2888 | * @classes: resulting classes of attached devices | |
2889 | * | |
2890 | * Reset the specified port and classify attached devices using | |
2891 | * given methods. This function prefers softreset but tries all | |
2892 | * possible reset sequences to reset and classify devices. This | |
2893 | * function is intended to be used for constructing ->probe_reset | |
2894 | * callback by low level drivers. | |
2895 | * | |
2896 | * Reset methods should follow the following rules. | |
2897 | * | |
2898 | * - Return 0 on sucess, -errno on failure. | |
2899 | * - If classification is supported, fill classes[] with | |
2900 | * recognized class codes. | |
2901 | * - If classification is not supported, leave classes[] alone. | |
a62c0fc5 TH |
2902 | * |
2903 | * LOCKING: | |
2904 | * Kernel thread context (may sleep) | |
2905 | * | |
2906 | * RETURNS: | |
2907 | * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV | |
2908 | * if classification fails, and any error code from reset | |
2909 | * methods. | |
2910 | */ | |
7944ea95 | 2911 | int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit, |
a62c0fc5 TH |
2912 | ata_reset_fn_t softreset, ata_reset_fn_t hardreset, |
2913 | ata_postreset_fn_t postreset, unsigned int *classes) | |
2914 | { | |
2915 | int rc = -EINVAL; | |
2916 | ||
e3180499 TH |
2917 | ata_eh_freeze_port(ap); |
2918 | ||
7944ea95 TH |
2919 | if (probeinit) |
2920 | probeinit(ap); | |
2921 | ||
3c567b7d | 2922 | if (softreset && !sata_set_spd_needed(ap)) { |
96bd39ec | 2923 | rc = ata_do_reset(ap, softreset, classes); |
9974e7cc TH |
2924 | if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN) |
2925 | goto done; | |
f15a1daf TH |
2926 | ata_port_printk(ap, KERN_INFO, "softreset failed, " |
2927 | "will try hardreset in 5 secs\n"); | |
edbabd86 | 2928 | ssleep(5); |
a62c0fc5 TH |
2929 | } |
2930 | ||
2931 | if (!hardreset) | |
9974e7cc | 2932 | goto done; |
a62c0fc5 | 2933 | |
90dac02c | 2934 | while (1) { |
96bd39ec | 2935 | rc = ata_do_reset(ap, hardreset, classes); |
90dac02c TH |
2936 | if (rc == 0) { |
2937 | if (classes[0] != ATA_DEV_UNKNOWN) | |
2938 | goto done; | |
2939 | break; | |
2940 | } | |
2941 | ||
3c567b7d | 2942 | if (sata_down_spd_limit(ap)) |
90dac02c | 2943 | goto done; |
edbabd86 | 2944 | |
f15a1daf TH |
2945 | ata_port_printk(ap, KERN_INFO, "hardreset failed, " |
2946 | "will retry in 5 secs\n"); | |
edbabd86 | 2947 | ssleep(5); |
90dac02c | 2948 | } |
a62c0fc5 | 2949 | |
edbabd86 | 2950 | if (softreset) { |
f15a1daf TH |
2951 | ata_port_printk(ap, KERN_INFO, |
2952 | "hardreset succeeded without classification, " | |
2953 | "will retry softreset in 5 secs\n"); | |
edbabd86 TH |
2954 | ssleep(5); |
2955 | ||
96bd39ec | 2956 | rc = ata_do_reset(ap, softreset, classes); |
edbabd86 | 2957 | } |
a62c0fc5 | 2958 | |
9974e7cc | 2959 | done: |
96bd39ec TH |
2960 | if (rc == 0) { |
2961 | if (postreset) | |
2962 | postreset(ap, classes); | |
e3180499 TH |
2963 | |
2964 | ata_eh_thaw_port(ap); | |
2965 | ||
96bd39ec TH |
2966 | if (classes[0] == ATA_DEV_UNKNOWN) |
2967 | rc = -ENODEV; | |
2968 | } | |
a62c0fc5 TH |
2969 | return rc; |
2970 | } | |
2971 | ||
623a3128 TH |
2972 | /** |
2973 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
2974 | * @dev: device to compare against |
2975 | * @new_class: class of the new device | |
2976 | * @new_id: IDENTIFY page of the new device | |
2977 | * | |
2978 | * Compare @new_class and @new_id against @dev and determine | |
2979 | * whether @dev is the device indicated by @new_class and | |
2980 | * @new_id. | |
2981 | * | |
2982 | * LOCKING: | |
2983 | * None. | |
2984 | * | |
2985 | * RETURNS: | |
2986 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
2987 | */ | |
3373efd8 TH |
2988 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
2989 | const u16 *new_id) | |
623a3128 TH |
2990 | { |
2991 | const u16 *old_id = dev->id; | |
2992 | unsigned char model[2][41], serial[2][21]; | |
2993 | u64 new_n_sectors; | |
2994 | ||
2995 | if (dev->class != new_class) { | |
f15a1daf TH |
2996 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
2997 | dev->class, new_class); | |
623a3128 TH |
2998 | return 0; |
2999 | } | |
3000 | ||
3001 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
3002 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
3003 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
3004 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
3005 | new_n_sectors = ata_id_n_sectors(new_id); | |
3006 | ||
3007 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
3008 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
3009 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
3010 | return 0; |
3011 | } | |
3012 | ||
3013 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
3014 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
3015 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
3016 | return 0; |
3017 | } | |
3018 | ||
3019 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
f15a1daf TH |
3020 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
3021 | "%llu != %llu\n", | |
3022 | (unsigned long long)dev->n_sectors, | |
3023 | (unsigned long long)new_n_sectors); | |
623a3128 TH |
3024 | return 0; |
3025 | } | |
3026 | ||
3027 | return 1; | |
3028 | } | |
3029 | ||
3030 | /** | |
3031 | * ata_dev_revalidate - Revalidate ATA device | |
623a3128 TH |
3032 | * @dev: device to revalidate |
3033 | * @post_reset: is this revalidation after reset? | |
3034 | * | |
3035 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
3036 | * the port. | |
3037 | * | |
3038 | * LOCKING: | |
3039 | * Kernel thread context (may sleep) | |
3040 | * | |
3041 | * RETURNS: | |
3042 | * 0 on success, negative errno otherwise | |
3043 | */ | |
3373efd8 | 3044 | int ata_dev_revalidate(struct ata_device *dev, int post_reset) |
623a3128 | 3045 | { |
5eb45c02 | 3046 | unsigned int class = dev->class; |
f15a1daf | 3047 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
3048 | int rc; |
3049 | ||
5eb45c02 TH |
3050 | if (!ata_dev_enabled(dev)) { |
3051 | rc = -ENODEV; | |
3052 | goto fail; | |
3053 | } | |
623a3128 | 3054 | |
fe635c7e | 3055 | /* read ID data */ |
3373efd8 | 3056 | rc = ata_dev_read_id(dev, &class, post_reset, id); |
623a3128 TH |
3057 | if (rc) |
3058 | goto fail; | |
3059 | ||
3060 | /* is the device still there? */ | |
3373efd8 | 3061 | if (!ata_dev_same_device(dev, class, id)) { |
623a3128 TH |
3062 | rc = -ENODEV; |
3063 | goto fail; | |
3064 | } | |
3065 | ||
fe635c7e | 3066 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
623a3128 TH |
3067 | |
3068 | /* configure device according to the new ID */ | |
3373efd8 | 3069 | rc = ata_dev_configure(dev, 0); |
5eb45c02 TH |
3070 | if (rc == 0) |
3071 | return 0; | |
623a3128 TH |
3072 | |
3073 | fail: | |
f15a1daf | 3074 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
3075 | return rc; |
3076 | } | |
3077 | ||
98ac62de | 3078 | static const char * const ata_dma_blacklist [] = { |
f4b15fef AC |
3079 | "WDC AC11000H", NULL, |
3080 | "WDC AC22100H", NULL, | |
3081 | "WDC AC32500H", NULL, | |
3082 | "WDC AC33100H", NULL, | |
3083 | "WDC AC31600H", NULL, | |
3084 | "WDC AC32100H", "24.09P07", | |
3085 | "WDC AC23200L", "21.10N21", | |
3086 | "Compaq CRD-8241B", NULL, | |
3087 | "CRD-8400B", NULL, | |
3088 | "CRD-8480B", NULL, | |
3089 | "CRD-8482B", NULL, | |
3090 | "CRD-84", NULL, | |
3091 | "SanDisk SDP3B", NULL, | |
3092 | "SanDisk SDP3B-64", NULL, | |
3093 | "SANYO CD-ROM CRD", NULL, | |
3094 | "HITACHI CDR-8", NULL, | |
2e9edbf8 | 3095 | "HITACHI CDR-8335", NULL, |
f4b15fef | 3096 | "HITACHI CDR-8435", NULL, |
2e9edbf8 JG |
3097 | "Toshiba CD-ROM XM-6202B", NULL, |
3098 | "TOSHIBA CD-ROM XM-1702BC", NULL, | |
3099 | "CD-532E-A", NULL, | |
3100 | "E-IDE CD-ROM CR-840", NULL, | |
3101 | "CD-ROM Drive/F5A", NULL, | |
3102 | "WPI CDD-820", NULL, | |
f4b15fef | 3103 | "SAMSUNG CD-ROM SC-148C", NULL, |
2e9edbf8 | 3104 | "SAMSUNG CD-ROM SC", NULL, |
f4b15fef AC |
3105 | "SanDisk SDP3B-64", NULL, |
3106 | "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL, | |
3107 | "_NEC DV5800A", NULL, | |
3108 | "SAMSUNG CD-ROM SN-124", "N001" | |
1da177e4 | 3109 | }; |
2e9edbf8 | 3110 | |
f4b15fef AC |
3111 | static int ata_strim(char *s, size_t len) |
3112 | { | |
3113 | len = strnlen(s, len); | |
3114 | ||
3115 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
3116 | while ((len > 0) && (s[len - 1] == ' ')) { | |
3117 | len--; | |
3118 | s[len] = 0; | |
3119 | } | |
3120 | return len; | |
3121 | } | |
1da177e4 | 3122 | |
057ace5e | 3123 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 | 3124 | { |
f4b15fef AC |
3125 | unsigned char model_num[40]; |
3126 | unsigned char model_rev[16]; | |
3127 | unsigned int nlen, rlen; | |
1da177e4 LT |
3128 | int i; |
3129 | ||
f4b15fef AC |
3130 | ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, |
3131 | sizeof(model_num)); | |
3132 | ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, | |
3133 | sizeof(model_rev)); | |
3134 | nlen = ata_strim(model_num, sizeof(model_num)); | |
3135 | rlen = ata_strim(model_rev, sizeof(model_rev)); | |
1da177e4 | 3136 | |
f4b15fef AC |
3137 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) { |
3138 | if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) { | |
3139 | if (ata_dma_blacklist[i+1] == NULL) | |
3140 | return 1; | |
3141 | if (!strncmp(ata_dma_blacklist[i], model_rev, rlen)) | |
3142 | return 1; | |
3143 | } | |
3144 | } | |
1da177e4 LT |
3145 | return 0; |
3146 | } | |
3147 | ||
a6d5a51c TH |
3148 | /** |
3149 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
3150 | * @dev: Device to compute xfermask for |
3151 | * | |
acf356b1 TH |
3152 | * Compute supported xfermask of @dev and store it in |
3153 | * dev->*_mask. This function is responsible for applying all | |
3154 | * known limits including host controller limits, device | |
3155 | * blacklist, etc... | |
a6d5a51c | 3156 | * |
600511e8 TH |
3157 | * FIXME: The current implementation limits all transfer modes to |
3158 | * the fastest of the lowested device on the port. This is not | |
05c8e0ac | 3159 | * required on most controllers. |
600511e8 | 3160 | * |
a6d5a51c TH |
3161 | * LOCKING: |
3162 | * None. | |
a6d5a51c | 3163 | */ |
3373efd8 | 3164 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 3165 | { |
3373efd8 | 3166 | struct ata_port *ap = dev->ap; |
5444a6f4 | 3167 | struct ata_host_set *hs = ap->host_set; |
a6d5a51c TH |
3168 | unsigned long xfer_mask; |
3169 | int i; | |
1da177e4 | 3170 | |
565083e1 TH |
3171 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
3172 | ap->mwdma_mask, ap->udma_mask); | |
3173 | ||
3174 | /* Apply cable rule here. Don't apply it early because when | |
3175 | * we handle hot plug the cable type can itself change. | |
3176 | */ | |
3177 | if (ap->cbl == ATA_CBL_PATA40) | |
3178 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
1da177e4 | 3179 | |
5444a6f4 | 3180 | /* FIXME: Use port-wide xfermask for now */ |
a6d5a51c TH |
3181 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
3182 | struct ata_device *d = &ap->device[i]; | |
565083e1 TH |
3183 | |
3184 | if (ata_dev_absent(d)) | |
3185 | continue; | |
3186 | ||
3187 | if (ata_dev_disabled(d)) { | |
3188 | /* to avoid violating device selection timing */ | |
3189 | xfer_mask &= ata_pack_xfermask(d->pio_mask, | |
3190 | UINT_MAX, UINT_MAX); | |
a6d5a51c | 3191 | continue; |
565083e1 TH |
3192 | } |
3193 | ||
3194 | xfer_mask &= ata_pack_xfermask(d->pio_mask, | |
3195 | d->mwdma_mask, d->udma_mask); | |
a6d5a51c TH |
3196 | xfer_mask &= ata_id_xfermask(d->id); |
3197 | if (ata_dma_blacklisted(d)) | |
3198 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
1da177e4 LT |
3199 | } |
3200 | ||
a6d5a51c | 3201 | if (ata_dma_blacklisted(dev)) |
f15a1daf TH |
3202 | ata_dev_printk(dev, KERN_WARNING, |
3203 | "device is on DMA blacklist, disabling DMA\n"); | |
a6d5a51c | 3204 | |
5444a6f4 AC |
3205 | if (hs->flags & ATA_HOST_SIMPLEX) { |
3206 | if (hs->simplex_claimed) | |
3207 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
3208 | } | |
565083e1 | 3209 | |
5444a6f4 AC |
3210 | if (ap->ops->mode_filter) |
3211 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
3212 | ||
565083e1 TH |
3213 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
3214 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
3215 | } |
3216 | ||
1da177e4 LT |
3217 | /** |
3218 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
3219 | * @dev: Device to which command will be sent |
3220 | * | |
780a87f7 JG |
3221 | * Issue SET FEATURES - XFER MODE command to device @dev |
3222 | * on port @ap. | |
3223 | * | |
1da177e4 | 3224 | * LOCKING: |
0cba632b | 3225 | * PCI/etc. bus probe sem. |
83206a29 TH |
3226 | * |
3227 | * RETURNS: | |
3228 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
3229 | */ |
3230 | ||
3373efd8 | 3231 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 3232 | { |
a0123703 | 3233 | struct ata_taskfile tf; |
83206a29 | 3234 | unsigned int err_mask; |
1da177e4 LT |
3235 | |
3236 | /* set up set-features taskfile */ | |
3237 | DPRINTK("set features - xfer mode\n"); | |
3238 | ||
3373efd8 | 3239 | ata_tf_init(dev, &tf); |
a0123703 TH |
3240 | tf.command = ATA_CMD_SET_FEATURES; |
3241 | tf.feature = SETFEATURES_XFER; | |
3242 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3243 | tf.protocol = ATA_PROT_NODATA; | |
3244 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 3245 | |
3373efd8 | 3246 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 3247 | |
83206a29 TH |
3248 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3249 | return err_mask; | |
1da177e4 LT |
3250 | } |
3251 | ||
8bf62ece AL |
3252 | /** |
3253 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 3254 | * @dev: Device to which command will be sent |
e2a7f77a RD |
3255 | * @heads: Number of heads (taskfile parameter) |
3256 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
3257 | * |
3258 | * LOCKING: | |
6aff8f1f TH |
3259 | * Kernel thread context (may sleep) |
3260 | * | |
3261 | * RETURNS: | |
3262 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3263 | */ |
3373efd8 TH |
3264 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3265 | u16 heads, u16 sectors) | |
8bf62ece | 3266 | { |
a0123703 | 3267 | struct ata_taskfile tf; |
6aff8f1f | 3268 | unsigned int err_mask; |
8bf62ece AL |
3269 | |
3270 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3271 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3272 | return AC_ERR_INVALID; |
8bf62ece AL |
3273 | |
3274 | /* set up init dev params taskfile */ | |
3275 | DPRINTK("init dev params \n"); | |
3276 | ||
3373efd8 | 3277 | ata_tf_init(dev, &tf); |
a0123703 TH |
3278 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3279 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3280 | tf.protocol = ATA_PROT_NODATA; | |
3281 | tf.nsect = sectors; | |
3282 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3283 | |
3373efd8 | 3284 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3285 | |
6aff8f1f TH |
3286 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3287 | return err_mask; | |
8bf62ece AL |
3288 | } |
3289 | ||
1da177e4 | 3290 | /** |
0cba632b JG |
3291 | * ata_sg_clean - Unmap DMA memory associated with command |
3292 | * @qc: Command containing DMA memory to be released | |
3293 | * | |
3294 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3295 | * |
3296 | * LOCKING: | |
0cba632b | 3297 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3298 | */ |
3299 | ||
3300 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
3301 | { | |
3302 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3303 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3304 | int dir = qc->dma_dir; |
cedc9a47 | 3305 | void *pad_buf = NULL; |
1da177e4 | 3306 | |
a4631474 TH |
3307 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3308 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3309 | |
3310 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3311 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3312 | |
2c13b7ce | 3313 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3314 | |
cedc9a47 JG |
3315 | /* if we padded the buffer out to 32-bit bound, and data |
3316 | * xfer direction is from-device, we must copy from the | |
3317 | * pad buffer back into the supplied buffer | |
3318 | */ | |
3319 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3320 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3321 | ||
3322 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3323 | if (qc->n_elem) |
2f1f610b | 3324 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
3325 | /* restore last sg */ |
3326 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3327 | if (pad_buf) { | |
3328 | struct scatterlist *psg = &qc->pad_sgent; | |
3329 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3330 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 3331 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3332 | } |
3333 | } else { | |
2e242fa9 | 3334 | if (qc->n_elem) |
2f1f610b | 3335 | dma_unmap_single(ap->dev, |
e1410f2d JG |
3336 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
3337 | dir); | |
cedc9a47 JG |
3338 | /* restore sg */ |
3339 | sg->length += qc->pad_len; | |
3340 | if (pad_buf) | |
3341 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3342 | pad_buf, qc->pad_len); | |
3343 | } | |
1da177e4 LT |
3344 | |
3345 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 3346 | qc->__sg = NULL; |
1da177e4 LT |
3347 | } |
3348 | ||
3349 | /** | |
3350 | * ata_fill_sg - Fill PCI IDE PRD table | |
3351 | * @qc: Metadata associated with taskfile to be transferred | |
3352 | * | |
780a87f7 JG |
3353 | * Fill PCI IDE PRD (scatter-gather) table with segments |
3354 | * associated with the current disk command. | |
3355 | * | |
1da177e4 | 3356 | * LOCKING: |
780a87f7 | 3357 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3358 | * |
3359 | */ | |
3360 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3361 | { | |
1da177e4 | 3362 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
3363 | struct scatterlist *sg; |
3364 | unsigned int idx; | |
1da177e4 | 3365 | |
a4631474 | 3366 | WARN_ON(qc->__sg == NULL); |
f131883e | 3367 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
3368 | |
3369 | idx = 0; | |
cedc9a47 | 3370 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
3371 | u32 addr, offset; |
3372 | u32 sg_len, len; | |
3373 | ||
3374 | /* determine if physical DMA addr spans 64K boundary. | |
3375 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3376 | * truncate dma_addr_t to u32. | |
3377 | */ | |
3378 | addr = (u32) sg_dma_address(sg); | |
3379 | sg_len = sg_dma_len(sg); | |
3380 | ||
3381 | while (sg_len) { | |
3382 | offset = addr & 0xffff; | |
3383 | len = sg_len; | |
3384 | if ((offset + sg_len) > 0x10000) | |
3385 | len = 0x10000 - offset; | |
3386 | ||
3387 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3388 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3389 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3390 | ||
3391 | idx++; | |
3392 | sg_len -= len; | |
3393 | addr += len; | |
3394 | } | |
3395 | } | |
3396 | ||
3397 | if (idx) | |
3398 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3399 | } | |
3400 | /** | |
3401 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3402 | * @qc: Metadata associated with taskfile to check | |
3403 | * | |
780a87f7 JG |
3404 | * Allow low-level driver to filter ATA PACKET commands, returning |
3405 | * a status indicating whether or not it is OK to use DMA for the | |
3406 | * supplied PACKET command. | |
3407 | * | |
1da177e4 | 3408 | * LOCKING: |
0cba632b JG |
3409 | * spin_lock_irqsave(host_set lock) |
3410 | * | |
1da177e4 LT |
3411 | * RETURNS: 0 when ATAPI DMA can be used |
3412 | * nonzero otherwise | |
3413 | */ | |
3414 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3415 | { | |
3416 | struct ata_port *ap = qc->ap; | |
3417 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3418 | ||
3419 | if (ap->ops->check_atapi_dma) | |
3420 | rc = ap->ops->check_atapi_dma(qc); | |
3421 | ||
c2bbc551 AL |
3422 | /* We don't support polling DMA. |
3423 | * Use PIO if the LLDD handles only interrupts in | |
3424 | * the HSM_ST_LAST state and the ATAPI device | |
3425 | * generates CDB interrupts. | |
3426 | */ | |
3427 | if ((ap->flags & ATA_FLAG_PIO_POLLING) && | |
3428 | (qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
3429 | rc = 1; | |
3430 | ||
1da177e4 LT |
3431 | return rc; |
3432 | } | |
3433 | /** | |
3434 | * ata_qc_prep - Prepare taskfile for submission | |
3435 | * @qc: Metadata associated with taskfile to be prepared | |
3436 | * | |
780a87f7 JG |
3437 | * Prepare ATA taskfile for submission. |
3438 | * | |
1da177e4 LT |
3439 | * LOCKING: |
3440 | * spin_lock_irqsave(host_set lock) | |
3441 | */ | |
3442 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3443 | { | |
3444 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3445 | return; | |
3446 | ||
3447 | ata_fill_sg(qc); | |
3448 | } | |
3449 | ||
e46834cd BK |
3450 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
3451 | ||
0cba632b JG |
3452 | /** |
3453 | * ata_sg_init_one - Associate command with memory buffer | |
3454 | * @qc: Command to be associated | |
3455 | * @buf: Memory buffer | |
3456 | * @buflen: Length of memory buffer, in bytes. | |
3457 | * | |
3458 | * Initialize the data-related elements of queued_cmd @qc | |
3459 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3460 | * | |
3461 | * LOCKING: | |
3462 | * spin_lock_irqsave(host_set lock) | |
3463 | */ | |
3464 | ||
1da177e4 LT |
3465 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3466 | { | |
3467 | struct scatterlist *sg; | |
3468 | ||
3469 | qc->flags |= ATA_QCFLAG_SINGLE; | |
3470 | ||
3471 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 3472 | qc->__sg = &qc->sgent; |
1da177e4 | 3473 | qc->n_elem = 1; |
cedc9a47 | 3474 | qc->orig_n_elem = 1; |
1da177e4 LT |
3475 | qc->buf_virt = buf; |
3476 | ||
cedc9a47 | 3477 | sg = qc->__sg; |
f0612bbc | 3478 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
3479 | } |
3480 | ||
0cba632b JG |
3481 | /** |
3482 | * ata_sg_init - Associate command with scatter-gather table. | |
3483 | * @qc: Command to be associated | |
3484 | * @sg: Scatter-gather table. | |
3485 | * @n_elem: Number of elements in s/g table. | |
3486 | * | |
3487 | * Initialize the data-related elements of queued_cmd @qc | |
3488 | * to point to a scatter-gather table @sg, containing @n_elem | |
3489 | * elements. | |
3490 | * | |
3491 | * LOCKING: | |
3492 | * spin_lock_irqsave(host_set lock) | |
3493 | */ | |
3494 | ||
1da177e4 LT |
3495 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3496 | unsigned int n_elem) | |
3497 | { | |
3498 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3499 | qc->__sg = sg; |
1da177e4 | 3500 | qc->n_elem = n_elem; |
cedc9a47 | 3501 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3502 | } |
3503 | ||
3504 | /** | |
0cba632b JG |
3505 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3506 | * @qc: Command with memory buffer to be mapped. | |
3507 | * | |
3508 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3509 | * |
3510 | * LOCKING: | |
3511 | * spin_lock_irqsave(host_set lock) | |
3512 | * | |
3513 | * RETURNS: | |
0cba632b | 3514 | * Zero on success, negative on error. |
1da177e4 LT |
3515 | */ |
3516 | ||
3517 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3518 | { | |
3519 | struct ata_port *ap = qc->ap; | |
3520 | int dir = qc->dma_dir; | |
cedc9a47 | 3521 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3522 | dma_addr_t dma_address; |
2e242fa9 | 3523 | int trim_sg = 0; |
1da177e4 | 3524 | |
cedc9a47 JG |
3525 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3526 | qc->pad_len = sg->length & 3; | |
3527 | if (qc->pad_len) { | |
3528 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3529 | struct scatterlist *psg = &qc->pad_sgent; | |
3530 | ||
a4631474 | 3531 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3532 | |
3533 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3534 | ||
3535 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3536 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3537 | qc->pad_len); | |
3538 | ||
3539 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3540 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3541 | /* trim sg */ | |
3542 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3543 | if (sg->length == 0) |
3544 | trim_sg = 1; | |
cedc9a47 JG |
3545 | |
3546 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3547 | sg->length, qc->pad_len); | |
3548 | } | |
3549 | ||
2e242fa9 TH |
3550 | if (trim_sg) { |
3551 | qc->n_elem--; | |
e1410f2d JG |
3552 | goto skip_map; |
3553 | } | |
3554 | ||
2f1f610b | 3555 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 3556 | sg->length, dir); |
537a95d9 TH |
3557 | if (dma_mapping_error(dma_address)) { |
3558 | /* restore sg */ | |
3559 | sg->length += qc->pad_len; | |
1da177e4 | 3560 | return -1; |
537a95d9 | 3561 | } |
1da177e4 LT |
3562 | |
3563 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3564 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3565 | |
2e242fa9 | 3566 | skip_map: |
1da177e4 LT |
3567 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3568 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3569 | ||
3570 | return 0; | |
3571 | } | |
3572 | ||
3573 | /** | |
0cba632b JG |
3574 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3575 | * @qc: Command with scatter-gather table to be mapped. | |
3576 | * | |
3577 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3578 | * |
3579 | * LOCKING: | |
3580 | * spin_lock_irqsave(host_set lock) | |
3581 | * | |
3582 | * RETURNS: | |
0cba632b | 3583 | * Zero on success, negative on error. |
1da177e4 LT |
3584 | * |
3585 | */ | |
3586 | ||
3587 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3588 | { | |
3589 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3590 | struct scatterlist *sg = qc->__sg; |
3591 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3592 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3593 | |
3594 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3595 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3596 | |
cedc9a47 JG |
3597 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3598 | qc->pad_len = lsg->length & 3; | |
3599 | if (qc->pad_len) { | |
3600 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3601 | struct scatterlist *psg = &qc->pad_sgent; | |
3602 | unsigned int offset; | |
3603 | ||
a4631474 | 3604 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3605 | |
3606 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3607 | ||
3608 | /* | |
3609 | * psg->page/offset are used to copy to-be-written | |
3610 | * data in this function or read data in ata_sg_clean. | |
3611 | */ | |
3612 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3613 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3614 | psg->offset = offset_in_page(offset); | |
3615 | ||
3616 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3617 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3618 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3619 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3620 | } |
3621 | ||
3622 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3623 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3624 | /* trim last sg */ | |
3625 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3626 | if (lsg->length == 0) |
3627 | trim_sg = 1; | |
cedc9a47 JG |
3628 | |
3629 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3630 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3631 | } | |
3632 | ||
e1410f2d JG |
3633 | pre_n_elem = qc->n_elem; |
3634 | if (trim_sg && pre_n_elem) | |
3635 | pre_n_elem--; | |
3636 | ||
3637 | if (!pre_n_elem) { | |
3638 | n_elem = 0; | |
3639 | goto skip_map; | |
3640 | } | |
3641 | ||
1da177e4 | 3642 | dir = qc->dma_dir; |
2f1f610b | 3643 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3644 | if (n_elem < 1) { |
3645 | /* restore last sg */ | |
3646 | lsg->length += qc->pad_len; | |
1da177e4 | 3647 | return -1; |
537a95d9 | 3648 | } |
1da177e4 LT |
3649 | |
3650 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3651 | ||
e1410f2d | 3652 | skip_map: |
1da177e4 LT |
3653 | qc->n_elem = n_elem; |
3654 | ||
3655 | return 0; | |
3656 | } | |
3657 | ||
0baab86b | 3658 | /** |
c893a3ae | 3659 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3660 | * @buf: Buffer to swap |
3661 | * @buf_words: Number of 16-bit words in buffer. | |
3662 | * | |
3663 | * Swap halves of 16-bit words if needed to convert from | |
3664 | * little-endian byte order to native cpu byte order, or | |
3665 | * vice-versa. | |
3666 | * | |
3667 | * LOCKING: | |
6f0ef4fa | 3668 | * Inherited from caller. |
0baab86b | 3669 | */ |
1da177e4 LT |
3670 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3671 | { | |
3672 | #ifdef __BIG_ENDIAN | |
3673 | unsigned int i; | |
3674 | ||
3675 | for (i = 0; i < buf_words; i++) | |
3676 | buf[i] = le16_to_cpu(buf[i]); | |
3677 | #endif /* __BIG_ENDIAN */ | |
3678 | } | |
3679 | ||
6ae4cfb5 AL |
3680 | /** |
3681 | * ata_mmio_data_xfer - Transfer data by MMIO | |
a6b2c5d4 | 3682 | * @dev: device for this I/O |
6ae4cfb5 AL |
3683 | * @buf: data buffer |
3684 | * @buflen: buffer length | |
344babaa | 3685 | * @write_data: read/write |
6ae4cfb5 AL |
3686 | * |
3687 | * Transfer data from/to the device data register by MMIO. | |
3688 | * | |
3689 | * LOCKING: | |
3690 | * Inherited from caller. | |
6ae4cfb5 AL |
3691 | */ |
3692 | ||
a6b2c5d4 AC |
3693 | void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, |
3694 | unsigned int buflen, int write_data) | |
1da177e4 | 3695 | { |
a6b2c5d4 | 3696 | struct ata_port *ap = adev->ap; |
1da177e4 LT |
3697 | unsigned int i; |
3698 | unsigned int words = buflen >> 1; | |
3699 | u16 *buf16 = (u16 *) buf; | |
3700 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3701 | ||
6ae4cfb5 | 3702 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3703 | if (write_data) { |
3704 | for (i = 0; i < words; i++) | |
3705 | writew(le16_to_cpu(buf16[i]), mmio); | |
3706 | } else { | |
3707 | for (i = 0; i < words; i++) | |
3708 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3709 | } | |
6ae4cfb5 AL |
3710 | |
3711 | /* Transfer trailing 1 byte, if any. */ | |
3712 | if (unlikely(buflen & 0x01)) { | |
3713 | u16 align_buf[1] = { 0 }; | |
3714 | unsigned char *trailing_buf = buf + buflen - 1; | |
3715 | ||
3716 | if (write_data) { | |
3717 | memcpy(align_buf, trailing_buf, 1); | |
3718 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3719 | } else { | |
3720 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3721 | memcpy(trailing_buf, align_buf, 1); | |
3722 | } | |
3723 | } | |
1da177e4 LT |
3724 | } |
3725 | ||
6ae4cfb5 AL |
3726 | /** |
3727 | * ata_pio_data_xfer - Transfer data by PIO | |
a6b2c5d4 | 3728 | * @adev: device to target |
6ae4cfb5 AL |
3729 | * @buf: data buffer |
3730 | * @buflen: buffer length | |
344babaa | 3731 | * @write_data: read/write |
6ae4cfb5 AL |
3732 | * |
3733 | * Transfer data from/to the device data register by PIO. | |
3734 | * | |
3735 | * LOCKING: | |
3736 | * Inherited from caller. | |
6ae4cfb5 AL |
3737 | */ |
3738 | ||
a6b2c5d4 AC |
3739 | void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf, |
3740 | unsigned int buflen, int write_data) | |
1da177e4 | 3741 | { |
a6b2c5d4 | 3742 | struct ata_port *ap = adev->ap; |
6ae4cfb5 | 3743 | unsigned int words = buflen >> 1; |
1da177e4 | 3744 | |
6ae4cfb5 | 3745 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3746 | if (write_data) |
6ae4cfb5 | 3747 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3748 | else |
6ae4cfb5 AL |
3749 | insw(ap->ioaddr.data_addr, buf, words); |
3750 | ||
3751 | /* Transfer trailing 1 byte, if any. */ | |
3752 | if (unlikely(buflen & 0x01)) { | |
3753 | u16 align_buf[1] = { 0 }; | |
3754 | unsigned char *trailing_buf = buf + buflen - 1; | |
3755 | ||
3756 | if (write_data) { | |
3757 | memcpy(align_buf, trailing_buf, 1); | |
3758 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3759 | } else { | |
3760 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3761 | memcpy(trailing_buf, align_buf, 1); | |
3762 | } | |
3763 | } | |
1da177e4 LT |
3764 | } |
3765 | ||
75e99585 AC |
3766 | /** |
3767 | * ata_pio_data_xfer_noirq - Transfer data by PIO | |
3768 | * @adev: device to target | |
3769 | * @buf: data buffer | |
3770 | * @buflen: buffer length | |
3771 | * @write_data: read/write | |
3772 | * | |
3773 | * Transfer data from/to the device data register by PIO. Do the | |
3774 | * transfer with interrupts disabled. | |
3775 | * | |
3776 | * LOCKING: | |
3777 | * Inherited from caller. | |
3778 | */ | |
3779 | ||
3780 | void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, | |
3781 | unsigned int buflen, int write_data) | |
3782 | { | |
3783 | unsigned long flags; | |
3784 | local_irq_save(flags); | |
3785 | ata_pio_data_xfer(adev, buf, buflen, write_data); | |
3786 | local_irq_restore(flags); | |
3787 | } | |
3788 | ||
3789 | ||
6ae4cfb5 AL |
3790 | /** |
3791 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3792 | * @qc: Command on going | |
3793 | * | |
3794 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3795 | * | |
3796 | * LOCKING: | |
3797 | * Inherited from caller. | |
3798 | */ | |
3799 | ||
1da177e4 LT |
3800 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3801 | { | |
3802 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3803 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3804 | struct ata_port *ap = qc->ap; |
3805 | struct page *page; | |
3806 | unsigned int offset; | |
3807 | unsigned char *buf; | |
3808 | ||
3809 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3810 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3811 | |
3812 | page = sg[qc->cursg].page; | |
3813 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3814 | ||
3815 | /* get the current page and offset */ | |
3816 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3817 | offset %= PAGE_SIZE; | |
3818 | ||
1da177e4 LT |
3819 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3820 | ||
91b8b313 AL |
3821 | if (PageHighMem(page)) { |
3822 | unsigned long flags; | |
3823 | ||
a6b2c5d4 | 3824 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
3825 | local_irq_save(flags); |
3826 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3827 | |
91b8b313 | 3828 | /* do the actual data transfer */ |
a6b2c5d4 | 3829 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
1da177e4 | 3830 | |
91b8b313 AL |
3831 | kunmap_atomic(buf, KM_IRQ0); |
3832 | local_irq_restore(flags); | |
3833 | } else { | |
3834 | buf = page_address(page); | |
a6b2c5d4 | 3835 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
91b8b313 | 3836 | } |
1da177e4 LT |
3837 | |
3838 | qc->cursect++; | |
3839 | qc->cursg_ofs++; | |
3840 | ||
32529e01 | 3841 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3842 | qc->cursg++; |
3843 | qc->cursg_ofs = 0; | |
3844 | } | |
1da177e4 | 3845 | } |
1da177e4 | 3846 | |
07f6f7d0 AL |
3847 | /** |
3848 | * ata_pio_sectors - Transfer one or many 512-byte sectors. | |
3849 | * @qc: Command on going | |
3850 | * | |
c81e29b4 | 3851 | * Transfer one or many ATA_SECT_SIZE of data from/to the |
07f6f7d0 AL |
3852 | * ATA device for the DRQ request. |
3853 | * | |
3854 | * LOCKING: | |
3855 | * Inherited from caller. | |
3856 | */ | |
1da177e4 | 3857 | |
07f6f7d0 AL |
3858 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
3859 | { | |
3860 | if (is_multi_taskfile(&qc->tf)) { | |
3861 | /* READ/WRITE MULTIPLE */ | |
3862 | unsigned int nsect; | |
3863 | ||
587005de | 3864 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 3865 | |
07f6f7d0 AL |
3866 | nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count); |
3867 | while (nsect--) | |
3868 | ata_pio_sector(qc); | |
3869 | } else | |
3870 | ata_pio_sector(qc); | |
3871 | } | |
3872 | ||
c71c1857 AL |
3873 | /** |
3874 | * atapi_send_cdb - Write CDB bytes to hardware | |
3875 | * @ap: Port to which ATAPI device is attached. | |
3876 | * @qc: Taskfile currently active | |
3877 | * | |
3878 | * When device has indicated its readiness to accept | |
3879 | * a CDB, this function is called. Send the CDB. | |
3880 | * | |
3881 | * LOCKING: | |
3882 | * caller. | |
3883 | */ | |
3884 | ||
3885 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
3886 | { | |
3887 | /* send SCSI cdb */ | |
3888 | DPRINTK("send cdb\n"); | |
db024d53 | 3889 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 3890 | |
a6b2c5d4 | 3891 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
3892 | ata_altstatus(ap); /* flush */ |
3893 | ||
3894 | switch (qc->tf.protocol) { | |
3895 | case ATA_PROT_ATAPI: | |
3896 | ap->hsm_task_state = HSM_ST; | |
3897 | break; | |
3898 | case ATA_PROT_ATAPI_NODATA: | |
3899 | ap->hsm_task_state = HSM_ST_LAST; | |
3900 | break; | |
3901 | case ATA_PROT_ATAPI_DMA: | |
3902 | ap->hsm_task_state = HSM_ST_LAST; | |
3903 | /* initiate bmdma */ | |
3904 | ap->ops->bmdma_start(qc); | |
3905 | break; | |
3906 | } | |
1da177e4 LT |
3907 | } |
3908 | ||
6ae4cfb5 AL |
3909 | /** |
3910 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3911 | * @qc: Command on going | |
3912 | * @bytes: number of bytes | |
3913 | * | |
3914 | * Transfer Transfer data from/to the ATAPI device. | |
3915 | * | |
3916 | * LOCKING: | |
3917 | * Inherited from caller. | |
3918 | * | |
3919 | */ | |
3920 | ||
1da177e4 LT |
3921 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3922 | { | |
3923 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3924 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3925 | struct ata_port *ap = qc->ap; |
3926 | struct page *page; | |
3927 | unsigned char *buf; | |
3928 | unsigned int offset, count; | |
3929 | ||
563a6e1f | 3930 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3931 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3932 | |
3933 | next_sg: | |
563a6e1f | 3934 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3935 | /* |
563a6e1f AL |
3936 | * The end of qc->sg is reached and the device expects |
3937 | * more data to transfer. In order not to overrun qc->sg | |
3938 | * and fulfill length specified in the byte count register, | |
3939 | * - for read case, discard trailing data from the device | |
3940 | * - for write case, padding zero data to the device | |
3941 | */ | |
3942 | u16 pad_buf[1] = { 0 }; | |
3943 | unsigned int words = bytes >> 1; | |
3944 | unsigned int i; | |
3945 | ||
3946 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
3947 | ata_dev_printk(qc->dev, KERN_WARNING, |
3948 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
3949 | |
3950 | for (i = 0; i < words; i++) | |
a6b2c5d4 | 3951 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); |
563a6e1f | 3952 | |
14be71f4 | 3953 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3954 | return; |
3955 | } | |
3956 | ||
cedc9a47 | 3957 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3958 | |
1da177e4 LT |
3959 | page = sg->page; |
3960 | offset = sg->offset + qc->cursg_ofs; | |
3961 | ||
3962 | /* get the current page and offset */ | |
3963 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3964 | offset %= PAGE_SIZE; | |
3965 | ||
6952df03 | 3966 | /* don't overrun current sg */ |
32529e01 | 3967 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3968 | |
3969 | /* don't cross page boundaries */ | |
3970 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3971 | ||
7282aa4b AL |
3972 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3973 | ||
91b8b313 AL |
3974 | if (PageHighMem(page)) { |
3975 | unsigned long flags; | |
3976 | ||
a6b2c5d4 | 3977 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
3978 | local_irq_save(flags); |
3979 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3980 | |
91b8b313 | 3981 | /* do the actual data transfer */ |
a6b2c5d4 | 3982 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 3983 | |
91b8b313 AL |
3984 | kunmap_atomic(buf, KM_IRQ0); |
3985 | local_irq_restore(flags); | |
3986 | } else { | |
3987 | buf = page_address(page); | |
a6b2c5d4 | 3988 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 3989 | } |
1da177e4 LT |
3990 | |
3991 | bytes -= count; | |
3992 | qc->curbytes += count; | |
3993 | qc->cursg_ofs += count; | |
3994 | ||
32529e01 | 3995 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3996 | qc->cursg++; |
3997 | qc->cursg_ofs = 0; | |
3998 | } | |
3999 | ||
563a6e1f | 4000 | if (bytes) |
1da177e4 | 4001 | goto next_sg; |
1da177e4 LT |
4002 | } |
4003 | ||
6ae4cfb5 AL |
4004 | /** |
4005 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4006 | * @qc: Command on going | |
4007 | * | |
4008 | * Transfer Transfer data from/to the ATAPI device. | |
4009 | * | |
4010 | * LOCKING: | |
4011 | * Inherited from caller. | |
6ae4cfb5 AL |
4012 | */ |
4013 | ||
1da177e4 LT |
4014 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
4015 | { | |
4016 | struct ata_port *ap = qc->ap; | |
4017 | struct ata_device *dev = qc->dev; | |
4018 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
4019 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
4020 | ||
eec4c3f3 AL |
4021 | /* Abuse qc->result_tf for temp storage of intermediate TF |
4022 | * here to save some kernel stack usage. | |
4023 | * For normal completion, qc->result_tf is not relevant. For | |
4024 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
4025 | * So, the correctness of qc->result_tf is not affected. | |
4026 | */ | |
4027 | ap->ops->tf_read(ap, &qc->result_tf); | |
4028 | ireason = qc->result_tf.nsect; | |
4029 | bc_lo = qc->result_tf.lbam; | |
4030 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
4031 | bytes = (bc_hi << 8) | bc_lo; |
4032 | ||
4033 | /* shall be cleared to zero, indicating xfer of data */ | |
4034 | if (ireason & (1 << 0)) | |
4035 | goto err_out; | |
4036 | ||
4037 | /* make sure transfer direction matches expected */ | |
4038 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
4039 | if (do_write != i_write) | |
4040 | goto err_out; | |
4041 | ||
312f7da2 AL |
4042 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
4043 | ||
1da177e4 LT |
4044 | __atapi_pio_bytes(qc, bytes); |
4045 | ||
4046 | return; | |
4047 | ||
4048 | err_out: | |
f15a1daf | 4049 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 4050 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 4051 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
4052 | } |
4053 | ||
4054 | /** | |
c234fb00 AL |
4055 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
4056 | * @ap: the target ata_port | |
4057 | * @qc: qc on going | |
1da177e4 | 4058 | * |
c234fb00 AL |
4059 | * RETURNS: |
4060 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 4061 | */ |
c234fb00 AL |
4062 | |
4063 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 4064 | { |
c234fb00 AL |
4065 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4066 | return 1; | |
1da177e4 | 4067 | |
c234fb00 AL |
4068 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
4069 | if (qc->tf.protocol == ATA_PROT_PIO && | |
4070 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
4071 | return 1; | |
1da177e4 | 4072 | |
c234fb00 AL |
4073 | if (is_atapi_taskfile(&qc->tf) && |
4074 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
4075 | return 1; | |
fe79e683 AL |
4076 | } |
4077 | ||
c234fb00 AL |
4078 | return 0; |
4079 | } | |
1da177e4 | 4080 | |
c17ea20d TH |
4081 | /** |
4082 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
4083 | * @qc: Command to complete | |
4084 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4085 | * | |
4086 | * Finish @qc which is running on standard HSM. | |
4087 | * | |
4088 | * LOCKING: | |
4089 | * If @in_wq is zero, spin_lock_irqsave(host_set lock). | |
4090 | * Otherwise, none on entry and grabs host lock. | |
4091 | */ | |
4092 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
4093 | { | |
4094 | struct ata_port *ap = qc->ap; | |
4095 | unsigned long flags; | |
4096 | ||
4097 | if (ap->ops->error_handler) { | |
4098 | if (in_wq) { | |
4099 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
4100 | ||
4101 | /* EH might have kicked in while host_set lock | |
4102 | * is released. | |
4103 | */ | |
4104 | qc = ata_qc_from_tag(ap, qc->tag); | |
4105 | if (qc) { | |
4106 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
4107 | ata_irq_on(ap); | |
4108 | ata_qc_complete(qc); | |
4109 | } else | |
4110 | ata_port_freeze(ap); | |
4111 | } | |
4112 | ||
4113 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
4114 | } else { | |
4115 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
4116 | ata_qc_complete(qc); | |
4117 | else | |
4118 | ata_port_freeze(ap); | |
4119 | } | |
4120 | } else { | |
4121 | if (in_wq) { | |
4122 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
4123 | ata_irq_on(ap); | |
4124 | ata_qc_complete(qc); | |
4125 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
4126 | } else | |
4127 | ata_qc_complete(qc); | |
4128 | } | |
1da177e4 | 4129 | |
c81e29b4 | 4130 | ata_altstatus(ap); /* flush */ |
c17ea20d TH |
4131 | } |
4132 | ||
bb5cb290 AL |
4133 | /** |
4134 | * ata_hsm_move - move the HSM to the next state. | |
4135 | * @ap: the target ata_port | |
4136 | * @qc: qc on going | |
4137 | * @status: current device status | |
4138 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4139 | * | |
4140 | * RETURNS: | |
4141 | * 1 when poll next status needed, 0 otherwise. | |
4142 | */ | |
9a1004d0 TH |
4143 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
4144 | u8 status, int in_wq) | |
e2cec771 | 4145 | { |
bb5cb290 AL |
4146 | unsigned long flags = 0; |
4147 | int poll_next; | |
4148 | ||
6912ccd5 AL |
4149 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
4150 | ||
bb5cb290 AL |
4151 | /* Make sure ata_qc_issue_prot() does not throw things |
4152 | * like DMA polling into the workqueue. Notice that | |
4153 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4154 | */ | |
c234fb00 | 4155 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 4156 | |
e2cec771 | 4157 | fsm_start: |
999bb6f4 AL |
4158 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
4159 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
4160 | ||
e2cec771 AL |
4161 | switch (ap->hsm_task_state) { |
4162 | case HSM_ST_FIRST: | |
bb5cb290 AL |
4163 | /* Send first data block or PACKET CDB */ |
4164 | ||
4165 | /* If polling, we will stay in the work queue after | |
4166 | * sending the data. Otherwise, interrupt handler | |
4167 | * takes over after sending the data. | |
4168 | */ | |
4169 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4170 | ||
e2cec771 | 4171 | /* check device status */ |
3655d1d3 AL |
4172 | if (unlikely((status & ATA_DRQ) == 0)) { |
4173 | /* handle BSY=0, DRQ=0 as error */ | |
4174 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4175 | /* device stops HSM for abort/error */ | |
4176 | qc->err_mask |= AC_ERR_DEV; | |
4177 | else | |
4178 | /* HSM violation. Let EH handle this */ | |
4179 | qc->err_mask |= AC_ERR_HSM; | |
4180 | ||
14be71f4 | 4181 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 4182 | goto fsm_start; |
1da177e4 LT |
4183 | } |
4184 | ||
71601958 AL |
4185 | /* Device should not ask for data transfer (DRQ=1) |
4186 | * when it finds something wrong. | |
eee6c32f AL |
4187 | * We ignore DRQ here and stop the HSM by |
4188 | * changing hsm_task_state to HSM_ST_ERR and | |
4189 | * let the EH abort the command or reset the device. | |
71601958 AL |
4190 | */ |
4191 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4192 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4193 | ap->id, status); | |
3655d1d3 | 4194 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4195 | ap->hsm_task_state = HSM_ST_ERR; |
4196 | goto fsm_start; | |
71601958 | 4197 | } |
1da177e4 | 4198 | |
bb5cb290 AL |
4199 | /* Send the CDB (atapi) or the first data block (ata pio out). |
4200 | * During the state transition, interrupt handler shouldn't | |
4201 | * be invoked before the data transfer is complete and | |
4202 | * hsm_task_state is changed. Hence, the following locking. | |
4203 | */ | |
4204 | if (in_wq) | |
4205 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1da177e4 | 4206 | |
bb5cb290 AL |
4207 | if (qc->tf.protocol == ATA_PROT_PIO) { |
4208 | /* PIO data out protocol. | |
4209 | * send first data block. | |
4210 | */ | |
0565c26d | 4211 | |
bb5cb290 AL |
4212 | /* ata_pio_sectors() might change the state |
4213 | * to HSM_ST_LAST. so, the state is changed here | |
4214 | * before ata_pio_sectors(). | |
4215 | */ | |
4216 | ap->hsm_task_state = HSM_ST; | |
4217 | ata_pio_sectors(qc); | |
4218 | ata_altstatus(ap); /* flush */ | |
4219 | } else | |
4220 | /* send CDB */ | |
4221 | atapi_send_cdb(ap, qc); | |
4222 | ||
4223 | if (in_wq) | |
4224 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
4225 | ||
4226 | /* if polling, ata_pio_task() handles the rest. | |
4227 | * otherwise, interrupt handler takes over from here. | |
4228 | */ | |
e2cec771 | 4229 | break; |
1c848984 | 4230 | |
e2cec771 AL |
4231 | case HSM_ST: |
4232 | /* complete command or read/write the data register */ | |
4233 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4234 | /* ATAPI PIO protocol */ | |
4235 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
4236 | /* No more data to transfer or device error. |
4237 | * Device error will be tagged in HSM_ST_LAST. | |
4238 | */ | |
e2cec771 AL |
4239 | ap->hsm_task_state = HSM_ST_LAST; |
4240 | goto fsm_start; | |
4241 | } | |
1da177e4 | 4242 | |
71601958 AL |
4243 | /* Device should not ask for data transfer (DRQ=1) |
4244 | * when it finds something wrong. | |
eee6c32f AL |
4245 | * We ignore DRQ here and stop the HSM by |
4246 | * changing hsm_task_state to HSM_ST_ERR and | |
4247 | * let the EH abort the command or reset the device. | |
71601958 AL |
4248 | */ |
4249 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4250 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4251 | ap->id, status); | |
3655d1d3 | 4252 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4253 | ap->hsm_task_state = HSM_ST_ERR; |
4254 | goto fsm_start; | |
71601958 | 4255 | } |
1da177e4 | 4256 | |
e2cec771 | 4257 | atapi_pio_bytes(qc); |
7fb6ec28 | 4258 | |
e2cec771 AL |
4259 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
4260 | /* bad ireason reported by device */ | |
4261 | goto fsm_start; | |
1da177e4 | 4262 | |
e2cec771 AL |
4263 | } else { |
4264 | /* ATA PIO protocol */ | |
4265 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4266 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
4267 | if (likely(status & (ATA_ERR | ATA_DF))) |
4268 | /* device stops HSM for abort/error */ | |
4269 | qc->err_mask |= AC_ERR_DEV; | |
4270 | else | |
4271 | /* HSM violation. Let EH handle this */ | |
4272 | qc->err_mask |= AC_ERR_HSM; | |
4273 | ||
e2cec771 AL |
4274 | ap->hsm_task_state = HSM_ST_ERR; |
4275 | goto fsm_start; | |
4276 | } | |
1da177e4 | 4277 | |
eee6c32f AL |
4278 | /* For PIO reads, some devices may ask for |
4279 | * data transfer (DRQ=1) alone with ERR=1. | |
4280 | * We respect DRQ here and transfer one | |
4281 | * block of junk data before changing the | |
4282 | * hsm_task_state to HSM_ST_ERR. | |
4283 | * | |
4284 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4285 | * sense since the data block has been | |
4286 | * transferred to the device. | |
71601958 AL |
4287 | */ |
4288 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
4289 | /* data might be corrputed */ |
4290 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
4291 | |
4292 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4293 | ata_pio_sectors(qc); | |
4294 | ata_altstatus(ap); | |
4295 | status = ata_wait_idle(ap); | |
4296 | } | |
4297 | ||
3655d1d3 AL |
4298 | if (status & (ATA_BUSY | ATA_DRQ)) |
4299 | qc->err_mask |= AC_ERR_HSM; | |
4300 | ||
eee6c32f AL |
4301 | /* ata_pio_sectors() might change the |
4302 | * state to HSM_ST_LAST. so, the state | |
4303 | * is changed after ata_pio_sectors(). | |
4304 | */ | |
4305 | ap->hsm_task_state = HSM_ST_ERR; | |
4306 | goto fsm_start; | |
71601958 AL |
4307 | } |
4308 | ||
e2cec771 AL |
4309 | ata_pio_sectors(qc); |
4310 | ||
4311 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4312 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4313 | /* all data read */ | |
4314 | ata_altstatus(ap); | |
52a32205 | 4315 | status = ata_wait_idle(ap); |
e2cec771 AL |
4316 | goto fsm_start; |
4317 | } | |
4318 | } | |
4319 | ||
4320 | ata_altstatus(ap); /* flush */ | |
bb5cb290 | 4321 | poll_next = 1; |
1da177e4 LT |
4322 | break; |
4323 | ||
14be71f4 | 4324 | case HSM_ST_LAST: |
6912ccd5 AL |
4325 | if (unlikely(!ata_ok(status))) { |
4326 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
4327 | ap->hsm_task_state = HSM_ST_ERR; |
4328 | goto fsm_start; | |
4329 | } | |
4330 | ||
4331 | /* no more data to transfer */ | |
4332a771 AL |
4332 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
4333 | ap->id, qc->dev->devno, status); | |
e2cec771 | 4334 | |
6912ccd5 AL |
4335 | WARN_ON(qc->err_mask); |
4336 | ||
e2cec771 | 4337 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 4338 | |
e2cec771 | 4339 | /* complete taskfile transaction */ |
c17ea20d | 4340 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4341 | |
4342 | poll_next = 0; | |
1da177e4 LT |
4343 | break; |
4344 | ||
14be71f4 | 4345 | case HSM_ST_ERR: |
e2cec771 AL |
4346 | /* make sure qc->err_mask is available to |
4347 | * know what's wrong and recover | |
4348 | */ | |
4349 | WARN_ON(qc->err_mask == 0); | |
4350 | ||
4351 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 4352 | |
999bb6f4 | 4353 | /* complete taskfile transaction */ |
c17ea20d | 4354 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4355 | |
4356 | poll_next = 0; | |
e2cec771 AL |
4357 | break; |
4358 | default: | |
bb5cb290 | 4359 | poll_next = 0; |
6912ccd5 | 4360 | BUG(); |
1da177e4 LT |
4361 | } |
4362 | ||
bb5cb290 | 4363 | return poll_next; |
1da177e4 LT |
4364 | } |
4365 | ||
1da177e4 | 4366 | static void ata_pio_task(void *_data) |
8061f5f0 | 4367 | { |
c91af2c8 TH |
4368 | struct ata_queued_cmd *qc = _data; |
4369 | struct ata_port *ap = qc->ap; | |
8061f5f0 | 4370 | u8 status; |
a1af3734 | 4371 | int poll_next; |
8061f5f0 | 4372 | |
7fb6ec28 | 4373 | fsm_start: |
a1af3734 | 4374 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 4375 | |
a1af3734 AL |
4376 | /* |
4377 | * This is purely heuristic. This is a fast path. | |
4378 | * Sometimes when we enter, BSY will be cleared in | |
4379 | * a chk-status or two. If not, the drive is probably seeking | |
4380 | * or something. Snooze for a couple msecs, then | |
4381 | * chk-status again. If still busy, queue delayed work. | |
4382 | */ | |
4383 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
4384 | if (status & ATA_BUSY) { | |
4385 | msleep(2); | |
4386 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
4387 | if (status & ATA_BUSY) { | |
31ce6dae | 4388 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
4389 | return; |
4390 | } | |
8061f5f0 TH |
4391 | } |
4392 | ||
a1af3734 AL |
4393 | /* move the HSM */ |
4394 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 4395 | |
a1af3734 AL |
4396 | /* another command or interrupt handler |
4397 | * may be running at this point. | |
4398 | */ | |
4399 | if (poll_next) | |
7fb6ec28 | 4400 | goto fsm_start; |
8061f5f0 TH |
4401 | } |
4402 | ||
1da177e4 LT |
4403 | /** |
4404 | * ata_qc_new - Request an available ATA command, for queueing | |
4405 | * @ap: Port associated with device @dev | |
4406 | * @dev: Device from whom we request an available command structure | |
4407 | * | |
4408 | * LOCKING: | |
0cba632b | 4409 | * None. |
1da177e4 LT |
4410 | */ |
4411 | ||
4412 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4413 | { | |
4414 | struct ata_queued_cmd *qc = NULL; | |
4415 | unsigned int i; | |
4416 | ||
e3180499 TH |
4417 | /* no command while frozen */ |
4418 | if (unlikely(ap->flags & ATA_FLAG_FROZEN)) | |
4419 | return NULL; | |
4420 | ||
2ab7db1f TH |
4421 | /* the last tag is reserved for internal command. */ |
4422 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 4423 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 4424 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
4425 | break; |
4426 | } | |
4427 | ||
4428 | if (qc) | |
4429 | qc->tag = i; | |
4430 | ||
4431 | return qc; | |
4432 | } | |
4433 | ||
4434 | /** | |
4435 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
4436 | * @dev: Device from whom we request an available command structure |
4437 | * | |
4438 | * LOCKING: | |
0cba632b | 4439 | * None. |
1da177e4 LT |
4440 | */ |
4441 | ||
3373efd8 | 4442 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 4443 | { |
3373efd8 | 4444 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
4445 | struct ata_queued_cmd *qc; |
4446 | ||
4447 | qc = ata_qc_new(ap); | |
4448 | if (qc) { | |
1da177e4 LT |
4449 | qc->scsicmd = NULL; |
4450 | qc->ap = ap; | |
4451 | qc->dev = dev; | |
1da177e4 | 4452 | |
2c13b7ce | 4453 | ata_qc_reinit(qc); |
1da177e4 LT |
4454 | } |
4455 | ||
4456 | return qc; | |
4457 | } | |
4458 | ||
1da177e4 LT |
4459 | /** |
4460 | * ata_qc_free - free unused ata_queued_cmd | |
4461 | * @qc: Command to complete | |
4462 | * | |
4463 | * Designed to free unused ata_queued_cmd object | |
4464 | * in case something prevents using it. | |
4465 | * | |
4466 | * LOCKING: | |
0cba632b | 4467 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
4468 | */ |
4469 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4470 | { | |
4ba946e9 TH |
4471 | struct ata_port *ap = qc->ap; |
4472 | unsigned int tag; | |
4473 | ||
a4631474 | 4474 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4475 | |
4ba946e9 TH |
4476 | qc->flags = 0; |
4477 | tag = qc->tag; | |
4478 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 4479 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 4480 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 4481 | } |
1da177e4 LT |
4482 | } |
4483 | ||
76014427 | 4484 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4485 | { |
dedaf2b0 TH |
4486 | struct ata_port *ap = qc->ap; |
4487 | ||
a4631474 TH |
4488 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4489 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4490 | |
4491 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4492 | ata_sg_clean(qc); | |
4493 | ||
7401abf2 | 4494 | /* command should be marked inactive atomically with qc completion */ |
dedaf2b0 TH |
4495 | if (qc->tf.protocol == ATA_PROT_NCQ) |
4496 | ap->sactive &= ~(1 << qc->tag); | |
4497 | else | |
4498 | ap->active_tag = ATA_TAG_POISON; | |
7401abf2 | 4499 | |
3f3791d3 AL |
4500 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4501 | * from completing the command twice later, before the error handler | |
4502 | * is called. (when rc != 0 and atapi request sense is needed) | |
4503 | */ | |
4504 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 4505 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 4506 | |
1da177e4 | 4507 | /* call completion callback */ |
77853bf2 | 4508 | qc->complete_fn(qc); |
1da177e4 LT |
4509 | } |
4510 | ||
f686bcb8 TH |
4511 | /** |
4512 | * ata_qc_complete - Complete an active ATA command | |
4513 | * @qc: Command to complete | |
4514 | * @err_mask: ATA Status register contents | |
4515 | * | |
4516 | * Indicate to the mid and upper layers that an ATA | |
4517 | * command has completed, with either an ok or not-ok status. | |
4518 | * | |
4519 | * LOCKING: | |
4520 | * spin_lock_irqsave(host_set lock) | |
4521 | */ | |
4522 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
4523 | { | |
4524 | struct ata_port *ap = qc->ap; | |
4525 | ||
4526 | /* XXX: New EH and old EH use different mechanisms to | |
4527 | * synchronize EH with regular execution path. | |
4528 | * | |
4529 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
4530 | * Normal execution path is responsible for not accessing a | |
4531 | * failed qc. libata core enforces the rule by returning NULL | |
4532 | * from ata_qc_from_tag() for failed qcs. | |
4533 | * | |
4534 | * Old EH depends on ata_qc_complete() nullifying completion | |
4535 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
4536 | * not synchronize with interrupt handler. Only PIO task is | |
4537 | * taken care of. | |
4538 | */ | |
4539 | if (ap->ops->error_handler) { | |
4540 | WARN_ON(ap->flags & ATA_FLAG_FROZEN); | |
4541 | ||
4542 | if (unlikely(qc->err_mask)) | |
4543 | qc->flags |= ATA_QCFLAG_FAILED; | |
4544 | ||
4545 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
4546 | if (!ata_tag_internal(qc->tag)) { | |
4547 | /* always fill result TF for failed qc */ | |
4548 | ap->ops->tf_read(ap, &qc->result_tf); | |
4549 | ata_qc_schedule_eh(qc); | |
4550 | return; | |
4551 | } | |
4552 | } | |
4553 | ||
4554 | /* read result TF if requested */ | |
4555 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
4556 | ap->ops->tf_read(ap, &qc->result_tf); | |
4557 | ||
4558 | __ata_qc_complete(qc); | |
4559 | } else { | |
4560 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
4561 | return; | |
4562 | ||
4563 | /* read result TF if failed or requested */ | |
4564 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
4565 | ap->ops->tf_read(ap, &qc->result_tf); | |
4566 | ||
4567 | __ata_qc_complete(qc); | |
4568 | } | |
4569 | } | |
4570 | ||
dedaf2b0 TH |
4571 | /** |
4572 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
4573 | * @ap: port in question | |
4574 | * @qc_active: new qc_active mask | |
4575 | * @finish_qc: LLDD callback invoked before completing a qc | |
4576 | * | |
4577 | * Complete in-flight commands. This functions is meant to be | |
4578 | * called from low-level driver's interrupt routine to complete | |
4579 | * requests normally. ap->qc_active and @qc_active is compared | |
4580 | * and commands are completed accordingly. | |
4581 | * | |
4582 | * LOCKING: | |
4583 | * spin_lock_irqsave(host_set lock) | |
4584 | * | |
4585 | * RETURNS: | |
4586 | * Number of completed commands on success, -errno otherwise. | |
4587 | */ | |
4588 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
4589 | void (*finish_qc)(struct ata_queued_cmd *)) | |
4590 | { | |
4591 | int nr_done = 0; | |
4592 | u32 done_mask; | |
4593 | int i; | |
4594 | ||
4595 | done_mask = ap->qc_active ^ qc_active; | |
4596 | ||
4597 | if (unlikely(done_mask & qc_active)) { | |
4598 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
4599 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
4600 | return -EINVAL; | |
4601 | } | |
4602 | ||
4603 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
4604 | struct ata_queued_cmd *qc; | |
4605 | ||
4606 | if (!(done_mask & (1 << i))) | |
4607 | continue; | |
4608 | ||
4609 | if ((qc = ata_qc_from_tag(ap, i))) { | |
4610 | if (finish_qc) | |
4611 | finish_qc(qc); | |
4612 | ata_qc_complete(qc); | |
4613 | nr_done++; | |
4614 | } | |
4615 | } | |
4616 | ||
4617 | return nr_done; | |
4618 | } | |
4619 | ||
1da177e4 LT |
4620 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
4621 | { | |
4622 | struct ata_port *ap = qc->ap; | |
4623 | ||
4624 | switch (qc->tf.protocol) { | |
3dc1d881 | 4625 | case ATA_PROT_NCQ: |
1da177e4 LT |
4626 | case ATA_PROT_DMA: |
4627 | case ATA_PROT_ATAPI_DMA: | |
4628 | return 1; | |
4629 | ||
4630 | case ATA_PROT_ATAPI: | |
4631 | case ATA_PROT_PIO: | |
1da177e4 LT |
4632 | if (ap->flags & ATA_FLAG_PIO_DMA) |
4633 | return 1; | |
4634 | ||
4635 | /* fall through */ | |
4636 | ||
4637 | default: | |
4638 | return 0; | |
4639 | } | |
4640 | ||
4641 | /* never reached */ | |
4642 | } | |
4643 | ||
4644 | /** | |
4645 | * ata_qc_issue - issue taskfile to device | |
4646 | * @qc: command to issue to device | |
4647 | * | |
4648 | * Prepare an ATA command to submission to device. | |
4649 | * This includes mapping the data into a DMA-able | |
4650 | * area, filling in the S/G table, and finally | |
4651 | * writing the taskfile to hardware, starting the command. | |
4652 | * | |
4653 | * LOCKING: | |
4654 | * spin_lock_irqsave(host_set lock) | |
1da177e4 | 4655 | */ |
8e0e694a | 4656 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4657 | { |
4658 | struct ata_port *ap = qc->ap; | |
4659 | ||
dedaf2b0 TH |
4660 | /* Make sure only one non-NCQ command is outstanding. The |
4661 | * check is skipped for old EH because it reuses active qc to | |
4662 | * request ATAPI sense. | |
4663 | */ | |
4664 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
4665 | ||
4666 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4667 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
4668 | ap->sactive |= 1 << qc->tag; | |
4669 | } else { | |
4670 | WARN_ON(ap->sactive); | |
4671 | ap->active_tag = qc->tag; | |
4672 | } | |
4673 | ||
e4a70e76 | 4674 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 4675 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 4676 | |
1da177e4 LT |
4677 | if (ata_should_dma_map(qc)) { |
4678 | if (qc->flags & ATA_QCFLAG_SG) { | |
4679 | if (ata_sg_setup(qc)) | |
8e436af9 | 4680 | goto sg_err; |
1da177e4 LT |
4681 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4682 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4683 | goto sg_err; |
1da177e4 LT |
4684 | } |
4685 | } else { | |
4686 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4687 | } | |
4688 | ||
4689 | ap->ops->qc_prep(qc); | |
4690 | ||
8e0e694a TH |
4691 | qc->err_mask |= ap->ops->qc_issue(qc); |
4692 | if (unlikely(qc->err_mask)) | |
4693 | goto err; | |
4694 | return; | |
1da177e4 | 4695 | |
8e436af9 TH |
4696 | sg_err: |
4697 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
4698 | qc->err_mask |= AC_ERR_SYSTEM; |
4699 | err: | |
4700 | ata_qc_complete(qc); | |
1da177e4 LT |
4701 | } |
4702 | ||
4703 | /** | |
4704 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4705 | * @qc: command to issue to device | |
4706 | * | |
4707 | * Using various libata functions and hooks, this function | |
4708 | * starts an ATA command. ATA commands are grouped into | |
4709 | * classes called "protocols", and issuing each type of protocol | |
4710 | * is slightly different. | |
4711 | * | |
0baab86b EF |
4712 | * May be used as the qc_issue() entry in ata_port_operations. |
4713 | * | |
1da177e4 LT |
4714 | * LOCKING: |
4715 | * spin_lock_irqsave(host_set lock) | |
4716 | * | |
4717 | * RETURNS: | |
9a3d9eb0 | 4718 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4719 | */ |
4720 | ||
9a3d9eb0 | 4721 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4722 | { |
4723 | struct ata_port *ap = qc->ap; | |
4724 | ||
e50362ec AL |
4725 | /* Use polling pio if the LLD doesn't handle |
4726 | * interrupt driven pio and atapi CDB interrupt. | |
4727 | */ | |
4728 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
4729 | switch (qc->tf.protocol) { | |
4730 | case ATA_PROT_PIO: | |
4731 | case ATA_PROT_ATAPI: | |
4732 | case ATA_PROT_ATAPI_NODATA: | |
4733 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4734 | break; | |
4735 | case ATA_PROT_ATAPI_DMA: | |
4736 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
c2bbc551 | 4737 | /* see ata_check_atapi_dma() */ |
e50362ec AL |
4738 | BUG(); |
4739 | break; | |
4740 | default: | |
4741 | break; | |
4742 | } | |
4743 | } | |
4744 | ||
312f7da2 | 4745 | /* select the device */ |
1da177e4 LT |
4746 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
4747 | ||
312f7da2 | 4748 | /* start the command */ |
1da177e4 LT |
4749 | switch (qc->tf.protocol) { |
4750 | case ATA_PROT_NODATA: | |
312f7da2 AL |
4751 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4752 | ata_qc_set_polling(qc); | |
4753 | ||
e5338254 | 4754 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
4755 | ap->hsm_task_state = HSM_ST_LAST; |
4756 | ||
4757 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4758 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 4759 | |
1da177e4 LT |
4760 | break; |
4761 | ||
4762 | case ATA_PROT_DMA: | |
587005de | 4763 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 4764 | |
1da177e4 LT |
4765 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4766 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
4767 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 4768 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4769 | break; |
4770 | ||
312f7da2 AL |
4771 | case ATA_PROT_PIO: |
4772 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
4773 | ata_qc_set_polling(qc); | |
1da177e4 | 4774 | |
e5338254 | 4775 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 4776 | |
54f00389 AL |
4777 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
4778 | /* PIO data out protocol */ | |
4779 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 4780 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
4781 | |
4782 | /* always send first data block using | |
e27486db | 4783 | * the ata_pio_task() codepath. |
54f00389 | 4784 | */ |
312f7da2 | 4785 | } else { |
54f00389 AL |
4786 | /* PIO data in protocol */ |
4787 | ap->hsm_task_state = HSM_ST; | |
4788 | ||
4789 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4790 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
4791 | |
4792 | /* if polling, ata_pio_task() handles the rest. | |
4793 | * otherwise, interrupt handler takes over from here. | |
4794 | */ | |
312f7da2 AL |
4795 | } |
4796 | ||
1da177e4 LT |
4797 | break; |
4798 | ||
1da177e4 | 4799 | case ATA_PROT_ATAPI: |
1da177e4 | 4800 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
4801 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4802 | ata_qc_set_polling(qc); | |
4803 | ||
e5338254 | 4804 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 4805 | |
312f7da2 AL |
4806 | ap->hsm_task_state = HSM_ST_FIRST; |
4807 | ||
4808 | /* send cdb by polling if no cdb interrupt */ | |
4809 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
4810 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 4811 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4812 | break; |
4813 | ||
4814 | case ATA_PROT_ATAPI_DMA: | |
587005de | 4815 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 4816 | |
1da177e4 LT |
4817 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4818 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
4819 | ap->hsm_task_state = HSM_ST_FIRST; |
4820 | ||
4821 | /* send cdb by polling if no cdb interrupt */ | |
4822 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 4823 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4824 | break; |
4825 | ||
4826 | default: | |
4827 | WARN_ON(1); | |
9a3d9eb0 | 4828 | return AC_ERR_SYSTEM; |
1da177e4 LT |
4829 | } |
4830 | ||
4831 | return 0; | |
4832 | } | |
4833 | ||
1da177e4 LT |
4834 | /** |
4835 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4836 | * @ap: Port on which interrupt arrived (possibly...) | |
4837 | * @qc: Taskfile currently active in engine | |
4838 | * | |
4839 | * Handle host interrupt for given queued command. Currently, | |
4840 | * only DMA interrupts are handled. All other commands are | |
4841 | * handled via polling with interrupts disabled (nIEN bit). | |
4842 | * | |
4843 | * LOCKING: | |
4844 | * spin_lock_irqsave(host_set lock) | |
4845 | * | |
4846 | * RETURNS: | |
4847 | * One if interrupt was handled, zero if not (shared irq). | |
4848 | */ | |
4849 | ||
4850 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4851 | struct ata_queued_cmd *qc) | |
4852 | { | |
312f7da2 | 4853 | u8 status, host_stat = 0; |
1da177e4 | 4854 | |
312f7da2 AL |
4855 | VPRINTK("ata%u: protocol %d task_state %d\n", |
4856 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 4857 | |
312f7da2 AL |
4858 | /* Check whether we are expecting interrupt in this state */ |
4859 | switch (ap->hsm_task_state) { | |
4860 | case HSM_ST_FIRST: | |
6912ccd5 AL |
4861 | /* Some pre-ATAPI-4 devices assert INTRQ |
4862 | * at this state when ready to receive CDB. | |
4863 | */ | |
1da177e4 | 4864 | |
312f7da2 AL |
4865 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
4866 | * The flag was turned on only for atapi devices. | |
4867 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
4868 | */ | |
4869 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 4870 | goto idle_irq; |
1da177e4 | 4871 | break; |
312f7da2 AL |
4872 | case HSM_ST_LAST: |
4873 | if (qc->tf.protocol == ATA_PROT_DMA || | |
4874 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
4875 | /* check status of DMA engine */ | |
4876 | host_stat = ap->ops->bmdma_status(ap); | |
4877 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4878 | ||
4879 | /* if it's not our irq... */ | |
4880 | if (!(host_stat & ATA_DMA_INTR)) | |
4881 | goto idle_irq; | |
4882 | ||
4883 | /* before we do anything else, clear DMA-Start bit */ | |
4884 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
4885 | |
4886 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
4887 | /* error when transfering data to/from memory */ | |
4888 | qc->err_mask |= AC_ERR_HOST_BUS; | |
4889 | ap->hsm_task_state = HSM_ST_ERR; | |
4890 | } | |
312f7da2 AL |
4891 | } |
4892 | break; | |
4893 | case HSM_ST: | |
4894 | break; | |
1da177e4 LT |
4895 | default: |
4896 | goto idle_irq; | |
4897 | } | |
4898 | ||
312f7da2 AL |
4899 | /* check altstatus */ |
4900 | status = ata_altstatus(ap); | |
4901 | if (status & ATA_BUSY) | |
4902 | goto idle_irq; | |
1da177e4 | 4903 | |
312f7da2 AL |
4904 | /* check main status, clearing INTRQ */ |
4905 | status = ata_chk_status(ap); | |
4906 | if (unlikely(status & ATA_BUSY)) | |
4907 | goto idle_irq; | |
1da177e4 | 4908 | |
312f7da2 AL |
4909 | /* ack bmdma irq events */ |
4910 | ap->ops->irq_clear(ap); | |
1da177e4 | 4911 | |
bb5cb290 | 4912 | ata_hsm_move(ap, qc, status, 0); |
1da177e4 LT |
4913 | return 1; /* irq handled */ |
4914 | ||
4915 | idle_irq: | |
4916 | ap->stats.idle_irq++; | |
4917 | ||
4918 | #ifdef ATA_IRQ_TRAP | |
4919 | if ((ap->stats.idle_irq % 1000) == 0) { | |
1da177e4 | 4920 | ata_irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 4921 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 4922 | return 1; |
1da177e4 LT |
4923 | } |
4924 | #endif | |
4925 | return 0; /* irq not handled */ | |
4926 | } | |
4927 | ||
4928 | /** | |
4929 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4930 | * @irq: irq line (unused) |
4931 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4932 | * @regs: unused |
4933 | * | |
0cba632b JG |
4934 | * Default interrupt handler for PCI IDE devices. Calls |
4935 | * ata_host_intr() for each port that is not disabled. | |
4936 | * | |
1da177e4 | 4937 | * LOCKING: |
0cba632b | 4938 | * Obtains host_set lock during operation. |
1da177e4 LT |
4939 | * |
4940 | * RETURNS: | |
0cba632b | 4941 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4942 | */ |
4943 | ||
4944 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4945 | { | |
4946 | struct ata_host_set *host_set = dev_instance; | |
4947 | unsigned int i; | |
4948 | unsigned int handled = 0; | |
4949 | unsigned long flags; | |
4950 | ||
4951 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4952 | spin_lock_irqsave(&host_set->lock, flags); | |
4953 | ||
4954 | for (i = 0; i < host_set->n_ports; i++) { | |
4955 | struct ata_port *ap; | |
4956 | ||
4957 | ap = host_set->ports[i]; | |
c1389503 | 4958 | if (ap && |
029f5468 | 4959 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
4960 | struct ata_queued_cmd *qc; |
4961 | ||
4962 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 4963 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 4964 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
4965 | handled |= ata_host_intr(ap, qc); |
4966 | } | |
4967 | } | |
4968 | ||
4969 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4970 | ||
4971 | return IRQ_RETVAL(handled); | |
4972 | } | |
4973 | ||
34bf2170 TH |
4974 | /** |
4975 | * sata_scr_valid - test whether SCRs are accessible | |
4976 | * @ap: ATA port to test SCR accessibility for | |
4977 | * | |
4978 | * Test whether SCRs are accessible for @ap. | |
4979 | * | |
4980 | * LOCKING: | |
4981 | * None. | |
4982 | * | |
4983 | * RETURNS: | |
4984 | * 1 if SCRs are accessible, 0 otherwise. | |
4985 | */ | |
4986 | int sata_scr_valid(struct ata_port *ap) | |
4987 | { | |
4988 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
4989 | } | |
4990 | ||
4991 | /** | |
4992 | * sata_scr_read - read SCR register of the specified port | |
4993 | * @ap: ATA port to read SCR for | |
4994 | * @reg: SCR to read | |
4995 | * @val: Place to store read value | |
4996 | * | |
4997 | * Read SCR register @reg of @ap into *@val. This function is | |
4998 | * guaranteed to succeed if the cable type of the port is SATA | |
4999 | * and the port implements ->scr_read. | |
5000 | * | |
5001 | * LOCKING: | |
5002 | * None. | |
5003 | * | |
5004 | * RETURNS: | |
5005 | * 0 on success, negative errno on failure. | |
5006 | */ | |
5007 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
5008 | { | |
5009 | if (sata_scr_valid(ap)) { | |
5010 | *val = ap->ops->scr_read(ap, reg); | |
5011 | return 0; | |
5012 | } | |
5013 | return -EOPNOTSUPP; | |
5014 | } | |
5015 | ||
5016 | /** | |
5017 | * sata_scr_write - write SCR register of the specified port | |
5018 | * @ap: ATA port to write SCR for | |
5019 | * @reg: SCR to write | |
5020 | * @val: value to write | |
5021 | * | |
5022 | * Write @val to SCR register @reg of @ap. This function is | |
5023 | * guaranteed to succeed if the cable type of the port is SATA | |
5024 | * and the port implements ->scr_read. | |
5025 | * | |
5026 | * LOCKING: | |
5027 | * None. | |
5028 | * | |
5029 | * RETURNS: | |
5030 | * 0 on success, negative errno on failure. | |
5031 | */ | |
5032 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
5033 | { | |
5034 | if (sata_scr_valid(ap)) { | |
5035 | ap->ops->scr_write(ap, reg, val); | |
5036 | return 0; | |
5037 | } | |
5038 | return -EOPNOTSUPP; | |
5039 | } | |
5040 | ||
5041 | /** | |
5042 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
5043 | * @ap: ATA port to write SCR for | |
5044 | * @reg: SCR to write | |
5045 | * @val: value to write | |
5046 | * | |
5047 | * This function is identical to sata_scr_write() except that this | |
5048 | * function performs flush after writing to the register. | |
5049 | * | |
5050 | * LOCKING: | |
5051 | * None. | |
5052 | * | |
5053 | * RETURNS: | |
5054 | * 0 on success, negative errno on failure. | |
5055 | */ | |
5056 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
5057 | { | |
5058 | if (sata_scr_valid(ap)) { | |
5059 | ap->ops->scr_write(ap, reg, val); | |
5060 | ap->ops->scr_read(ap, reg); | |
5061 | return 0; | |
5062 | } | |
5063 | return -EOPNOTSUPP; | |
5064 | } | |
5065 | ||
5066 | /** | |
5067 | * ata_port_online - test whether the given port is online | |
5068 | * @ap: ATA port to test | |
5069 | * | |
5070 | * Test whether @ap is online. Note that this function returns 0 | |
5071 | * if online status of @ap cannot be obtained, so | |
5072 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5073 | * | |
5074 | * LOCKING: | |
5075 | * None. | |
5076 | * | |
5077 | * RETURNS: | |
5078 | * 1 if the port online status is available and online. | |
5079 | */ | |
5080 | int ata_port_online(struct ata_port *ap) | |
5081 | { | |
5082 | u32 sstatus; | |
5083 | ||
5084 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
5085 | return 1; | |
5086 | return 0; | |
5087 | } | |
5088 | ||
5089 | /** | |
5090 | * ata_port_offline - test whether the given port is offline | |
5091 | * @ap: ATA port to test | |
5092 | * | |
5093 | * Test whether @ap is offline. Note that this function returns | |
5094 | * 0 if offline status of @ap cannot be obtained, so | |
5095 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5096 | * | |
5097 | * LOCKING: | |
5098 | * None. | |
5099 | * | |
5100 | * RETURNS: | |
5101 | * 1 if the port offline status is available and offline. | |
5102 | */ | |
5103 | int ata_port_offline(struct ata_port *ap) | |
5104 | { | |
5105 | u32 sstatus; | |
5106 | ||
5107 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
5108 | return 1; | |
5109 | return 0; | |
5110 | } | |
0baab86b | 5111 | |
9b847548 JA |
5112 | /* |
5113 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, | |
5114 | * without filling any other registers | |
5115 | */ | |
3373efd8 | 5116 | static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
9b847548 JA |
5117 | { |
5118 | struct ata_taskfile tf; | |
5119 | int err; | |
5120 | ||
3373efd8 | 5121 | ata_tf_init(dev, &tf); |
9b847548 JA |
5122 | |
5123 | tf.command = cmd; | |
5124 | tf.flags |= ATA_TFLAG_DEVICE; | |
5125 | tf.protocol = ATA_PROT_NODATA; | |
5126 | ||
3373efd8 | 5127 | err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
9b847548 | 5128 | if (err) |
f15a1daf TH |
5129 | ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n", |
5130 | __FUNCTION__, err); | |
9b847548 JA |
5131 | |
5132 | return err; | |
5133 | } | |
5134 | ||
3373efd8 | 5135 | static int ata_flush_cache(struct ata_device *dev) |
9b847548 JA |
5136 | { |
5137 | u8 cmd; | |
5138 | ||
5139 | if (!ata_try_flush_cache(dev)) | |
5140 | return 0; | |
5141 | ||
5142 | if (ata_id_has_flush_ext(dev->id)) | |
5143 | cmd = ATA_CMD_FLUSH_EXT; | |
5144 | else | |
5145 | cmd = ATA_CMD_FLUSH; | |
5146 | ||
3373efd8 | 5147 | return ata_do_simple_cmd(dev, cmd); |
9b847548 JA |
5148 | } |
5149 | ||
3373efd8 | 5150 | static int ata_standby_drive(struct ata_device *dev) |
9b847548 | 5151 | { |
3373efd8 | 5152 | return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1); |
9b847548 JA |
5153 | } |
5154 | ||
3373efd8 | 5155 | static int ata_start_drive(struct ata_device *dev) |
9b847548 | 5156 | { |
3373efd8 | 5157 | return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE); |
9b847548 JA |
5158 | } |
5159 | ||
5160 | /** | |
5161 | * ata_device_resume - wakeup a previously suspended devices | |
c893a3ae | 5162 | * @dev: the device to resume |
9b847548 JA |
5163 | * |
5164 | * Kick the drive back into action, by sending it an idle immediate | |
5165 | * command and making sure its transfer mode matches between drive | |
5166 | * and host. | |
5167 | * | |
5168 | */ | |
3373efd8 | 5169 | int ata_device_resume(struct ata_device *dev) |
9b847548 | 5170 | { |
3373efd8 TH |
5171 | struct ata_port *ap = dev->ap; |
5172 | ||
9b847548 | 5173 | if (ap->flags & ATA_FLAG_SUSPENDED) { |
e82cbdb9 | 5174 | struct ata_device *failed_dev; |
e42d7be2 | 5175 | |
0737ac89 | 5176 | ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 200000); |
e42d7be2 | 5177 | |
9b847548 | 5178 | ap->flags &= ~ATA_FLAG_SUSPENDED; |
e82cbdb9 | 5179 | while (ata_set_mode(ap, &failed_dev)) |
3373efd8 | 5180 | ata_dev_disable(failed_dev); |
9b847548 | 5181 | } |
e1211e3f | 5182 | if (!ata_dev_enabled(dev)) |
9b847548 JA |
5183 | return 0; |
5184 | if (dev->class == ATA_DEV_ATA) | |
3373efd8 | 5185 | ata_start_drive(dev); |
9b847548 JA |
5186 | |
5187 | return 0; | |
5188 | } | |
5189 | ||
5190 | /** | |
5191 | * ata_device_suspend - prepare a device for suspend | |
c893a3ae | 5192 | * @dev: the device to suspend |
e2a7f77a | 5193 | * @state: target power management state |
9b847548 JA |
5194 | * |
5195 | * Flush the cache on the drive, if appropriate, then issue a | |
5196 | * standbynow command. | |
9b847548 | 5197 | */ |
3373efd8 | 5198 | int ata_device_suspend(struct ata_device *dev, pm_message_t state) |
9b847548 | 5199 | { |
3373efd8 TH |
5200 | struct ata_port *ap = dev->ap; |
5201 | ||
e1211e3f | 5202 | if (!ata_dev_enabled(dev)) |
9b847548 JA |
5203 | return 0; |
5204 | if (dev->class == ATA_DEV_ATA) | |
3373efd8 | 5205 | ata_flush_cache(dev); |
9b847548 | 5206 | |
082776e4 | 5207 | if (state.event != PM_EVENT_FREEZE) |
3373efd8 | 5208 | ata_standby_drive(dev); |
9b847548 JA |
5209 | ap->flags |= ATA_FLAG_SUSPENDED; |
5210 | return 0; | |
5211 | } | |
5212 | ||
c893a3ae RD |
5213 | /** |
5214 | * ata_port_start - Set port up for dma. | |
5215 | * @ap: Port to initialize | |
5216 | * | |
5217 | * Called just after data structures for each port are | |
5218 | * initialized. Allocates space for PRD table. | |
5219 | * | |
5220 | * May be used as the port_start() entry in ata_port_operations. | |
5221 | * | |
5222 | * LOCKING: | |
5223 | * Inherited from caller. | |
5224 | */ | |
5225 | ||
1da177e4 LT |
5226 | int ata_port_start (struct ata_port *ap) |
5227 | { | |
2f1f610b | 5228 | struct device *dev = ap->dev; |
6037d6bb | 5229 | int rc; |
1da177e4 LT |
5230 | |
5231 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
5232 | if (!ap->prd) | |
5233 | return -ENOMEM; | |
5234 | ||
6037d6bb JG |
5235 | rc = ata_pad_alloc(ap, dev); |
5236 | if (rc) { | |
cedc9a47 | 5237 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 5238 | return rc; |
cedc9a47 JG |
5239 | } |
5240 | ||
1da177e4 LT |
5241 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
5242 | ||
5243 | return 0; | |
5244 | } | |
5245 | ||
0baab86b EF |
5246 | |
5247 | /** | |
5248 | * ata_port_stop - Undo ata_port_start() | |
5249 | * @ap: Port to shut down | |
5250 | * | |
5251 | * Frees the PRD table. | |
5252 | * | |
5253 | * May be used as the port_stop() entry in ata_port_operations. | |
5254 | * | |
5255 | * LOCKING: | |
6f0ef4fa | 5256 | * Inherited from caller. |
0baab86b EF |
5257 | */ |
5258 | ||
1da177e4 LT |
5259 | void ata_port_stop (struct ata_port *ap) |
5260 | { | |
2f1f610b | 5261 | struct device *dev = ap->dev; |
1da177e4 LT |
5262 | |
5263 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 5264 | ata_pad_free(ap, dev); |
1da177e4 LT |
5265 | } |
5266 | ||
aa8f0dc6 JG |
5267 | void ata_host_stop (struct ata_host_set *host_set) |
5268 | { | |
5269 | if (host_set->mmio_base) | |
5270 | iounmap(host_set->mmio_base); | |
5271 | } | |
5272 | ||
5273 | ||
1da177e4 LT |
5274 | /** |
5275 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
5276 | * @ap: Port to unregister | |
5277 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
5278 | * | |
5279 | * LOCKING: | |
6f0ef4fa | 5280 | * Inherited from caller. |
1da177e4 LT |
5281 | */ |
5282 | ||
5283 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
5284 | { | |
5285 | struct Scsi_Host *sh = ap->host; | |
5286 | ||
5287 | DPRINTK("ENTER\n"); | |
5288 | ||
5289 | if (do_unregister) | |
5290 | scsi_remove_host(sh); | |
5291 | ||
5292 | ap->ops->port_stop(ap); | |
5293 | } | |
5294 | ||
3ef3b43d TH |
5295 | /** |
5296 | * ata_dev_init - Initialize an ata_device structure | |
5297 | * @dev: Device structure to initialize | |
5298 | * | |
5299 | * Initialize @dev in preparation for probing. | |
5300 | * | |
5301 | * LOCKING: | |
5302 | * Inherited from caller. | |
5303 | */ | |
5304 | void ata_dev_init(struct ata_device *dev) | |
5305 | { | |
5306 | struct ata_port *ap = dev->ap; | |
72fa4b74 TH |
5307 | unsigned long flags; |
5308 | ||
5a04bf4b TH |
5309 | /* SATA spd limit is bound to the first device */ |
5310 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5311 | ||
72fa4b74 TH |
5312 | /* High bits of dev->flags are used to record warm plug |
5313 | * requests which occur asynchronously. Synchronize using | |
5314 | * host_set lock. | |
5315 | */ | |
5316 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
5317 | dev->flags &= ~ATA_DFLAG_INIT_MASK; | |
5318 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
3ef3b43d | 5319 | |
72fa4b74 TH |
5320 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
5321 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
5322 | dev->pio_mask = UINT_MAX; |
5323 | dev->mwdma_mask = UINT_MAX; | |
5324 | dev->udma_mask = UINT_MAX; | |
5325 | } | |
5326 | ||
1da177e4 LT |
5327 | /** |
5328 | * ata_host_init - Initialize an ata_port structure | |
5329 | * @ap: Structure to initialize | |
5330 | * @host: associated SCSI mid-layer structure | |
5331 | * @host_set: Collection of hosts to which @ap belongs | |
5332 | * @ent: Probe information provided by low-level driver | |
5333 | * @port_no: Port number associated with this ata_port | |
5334 | * | |
0cba632b JG |
5335 | * Initialize a new ata_port structure, and its associated |
5336 | * scsi_host. | |
5337 | * | |
1da177e4 | 5338 | * LOCKING: |
0cba632b | 5339 | * Inherited from caller. |
1da177e4 | 5340 | */ |
1da177e4 LT |
5341 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, |
5342 | struct ata_host_set *host_set, | |
057ace5e | 5343 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
5344 | { |
5345 | unsigned int i; | |
5346 | ||
5347 | host->max_id = 16; | |
5348 | host->max_lun = 1; | |
5349 | host->max_channel = 1; | |
5350 | host->unique_id = ata_unique_id++; | |
5351 | host->max_cmd_len = 12; | |
12413197 | 5352 | |
198e0fed | 5353 | ap->flags = ATA_FLAG_DISABLED; |
1da177e4 LT |
5354 | ap->id = host->unique_id; |
5355 | ap->host = host; | |
5356 | ap->ctl = ATA_DEVCTL_OBS; | |
5357 | ap->host_set = host_set; | |
2f1f610b | 5358 | ap->dev = ent->dev; |
1da177e4 LT |
5359 | ap->port_no = port_no; |
5360 | ap->hard_port_no = | |
5361 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
5362 | ap->pio_mask = ent->pio_mask; | |
5363 | ap->mwdma_mask = ent->mwdma_mask; | |
5364 | ap->udma_mask = ent->udma_mask; | |
5365 | ap->flags |= ent->host_flags; | |
5366 | ap->ops = ent->port_ops; | |
5a04bf4b | 5367 | ap->hw_sata_spd_limit = UINT_MAX; |
1da177e4 LT |
5368 | ap->active_tag = ATA_TAG_POISON; |
5369 | ap->last_ctl = 0xFF; | |
ef282407 | 5370 | ap->msg_enable = ATA_MSG_DRV; |
1da177e4 | 5371 | |
86e45b6b | 5372 | INIT_WORK(&ap->port_task, NULL, NULL); |
580b2102 | 5373 | INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap); |
a72ec4ce | 5374 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 5375 | init_waitqueue_head(&ap->eh_wait_q); |
1da177e4 | 5376 | |
838df628 TH |
5377 | /* set cable type */ |
5378 | ap->cbl = ATA_CBL_NONE; | |
5379 | if (ap->flags & ATA_FLAG_SATA) | |
5380 | ap->cbl = ATA_CBL_SATA; | |
5381 | ||
acf356b1 TH |
5382 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
5383 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 5384 | dev->ap = ap; |
72fa4b74 | 5385 | dev->devno = i; |
3ef3b43d | 5386 | ata_dev_init(dev); |
acf356b1 | 5387 | } |
1da177e4 LT |
5388 | |
5389 | #ifdef ATA_IRQ_TRAP | |
5390 | ap->stats.unhandled_irq = 1; | |
5391 | ap->stats.idle_irq = 1; | |
5392 | #endif | |
5393 | ||
5394 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
5395 | } | |
5396 | ||
5397 | /** | |
5398 | * ata_host_add - Attach low-level ATA driver to system | |
5399 | * @ent: Information provided by low-level driver | |
5400 | * @host_set: Collections of ports to which we add | |
5401 | * @port_no: Port number associated with this host | |
5402 | * | |
0cba632b JG |
5403 | * Attach low-level ATA driver to system. |
5404 | * | |
1da177e4 | 5405 | * LOCKING: |
0cba632b | 5406 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5407 | * |
5408 | * RETURNS: | |
0cba632b | 5409 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
5410 | */ |
5411 | ||
057ace5e | 5412 | static struct ata_port * ata_host_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
5413 | struct ata_host_set *host_set, |
5414 | unsigned int port_no) | |
5415 | { | |
5416 | struct Scsi_Host *host; | |
5417 | struct ata_port *ap; | |
5418 | int rc; | |
5419 | ||
5420 | DPRINTK("ENTER\n"); | |
aec5c3c1 | 5421 | |
3e706399 | 5422 | if (!ent->port_ops->probe_reset && !ent->port_ops->error_handler && |
aec5c3c1 TH |
5423 | !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { |
5424 | printk(KERN_ERR "ata%u: no reset mechanism available\n", | |
5425 | port_no); | |
5426 | return NULL; | |
5427 | } | |
5428 | ||
1da177e4 LT |
5429 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); |
5430 | if (!host) | |
5431 | return NULL; | |
5432 | ||
30afc84c TH |
5433 | host->transportt = &ata_scsi_transport_template; |
5434 | ||
35bb94b1 | 5435 | ap = ata_shost_to_port(host); |
1da177e4 LT |
5436 | |
5437 | ata_host_init(ap, host, host_set, ent, port_no); | |
5438 | ||
5439 | rc = ap->ops->port_start(ap); | |
5440 | if (rc) | |
5441 | goto err_out; | |
5442 | ||
5443 | return ap; | |
5444 | ||
5445 | err_out: | |
5446 | scsi_host_put(host); | |
5447 | return NULL; | |
5448 | } | |
5449 | ||
5450 | /** | |
0cba632b JG |
5451 | * ata_device_add - Register hardware device with ATA and SCSI layers |
5452 | * @ent: Probe information describing hardware device to be registered | |
5453 | * | |
5454 | * This function processes the information provided in the probe | |
5455 | * information struct @ent, allocates the necessary ATA and SCSI | |
5456 | * host information structures, initializes them, and registers | |
5457 | * everything with requisite kernel subsystems. | |
5458 | * | |
5459 | * This function requests irqs, probes the ATA bus, and probes | |
5460 | * the SCSI bus. | |
1da177e4 LT |
5461 | * |
5462 | * LOCKING: | |
0cba632b | 5463 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5464 | * |
5465 | * RETURNS: | |
0cba632b | 5466 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 | 5467 | */ |
057ace5e | 5468 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
5469 | { |
5470 | unsigned int count = 0, i; | |
5471 | struct device *dev = ent->dev; | |
5472 | struct ata_host_set *host_set; | |
5473 | ||
5474 | DPRINTK("ENTER\n"); | |
5475 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 5476 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
5477 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
5478 | if (!host_set) | |
5479 | return 0; | |
1da177e4 LT |
5480 | spin_lock_init(&host_set->lock); |
5481 | ||
5482 | host_set->dev = dev; | |
5483 | host_set->n_ports = ent->n_ports; | |
5484 | host_set->irq = ent->irq; | |
5485 | host_set->mmio_base = ent->mmio_base; | |
5486 | host_set->private_data = ent->private_data; | |
5487 | host_set->ops = ent->port_ops; | |
5444a6f4 | 5488 | host_set->flags = ent->host_set_flags; |
1da177e4 LT |
5489 | |
5490 | /* register each port bound to this device */ | |
5491 | for (i = 0; i < ent->n_ports; i++) { | |
5492 | struct ata_port *ap; | |
5493 | unsigned long xfer_mode_mask; | |
5494 | ||
5495 | ap = ata_host_add(ent, host_set, i); | |
5496 | if (!ap) | |
5497 | goto err_out; | |
5498 | ||
5499 | host_set->ports[i] = ap; | |
5500 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
5501 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
5502 | (ap->pio_mask << ATA_SHIFT_PIO); | |
5503 | ||
5504 | /* print per-port info to dmesg */ | |
f15a1daf TH |
5505 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " |
5506 | "ctl 0x%lX bmdma 0x%lX irq %lu\n", | |
5507 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
5508 | ata_mode_string(xfer_mode_mask), | |
5509 | ap->ioaddr.cmd_addr, | |
5510 | ap->ioaddr.ctl_addr, | |
5511 | ap->ioaddr.bmdma_addr, | |
5512 | ent->irq); | |
1da177e4 LT |
5513 | |
5514 | ata_chk_status(ap); | |
5515 | host_set->ops->irq_clear(ap); | |
e3180499 | 5516 | ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */ |
1da177e4 LT |
5517 | count++; |
5518 | } | |
5519 | ||
57f3bda8 RD |
5520 | if (!count) |
5521 | goto err_free_ret; | |
1da177e4 LT |
5522 | |
5523 | /* obtain irq, that is shared between channels */ | |
5524 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
5525 | DRV_NAME, host_set)) | |
5526 | goto err_out; | |
5527 | ||
5528 | /* perform each probe synchronously */ | |
5529 | DPRINTK("probe begin\n"); | |
5530 | for (i = 0; i < count; i++) { | |
5531 | struct ata_port *ap; | |
5a04bf4b | 5532 | u32 scontrol; |
1da177e4 LT |
5533 | int rc; |
5534 | ||
5535 | ap = host_set->ports[i]; | |
5536 | ||
5a04bf4b TH |
5537 | /* init sata_spd_limit to the current value */ |
5538 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
5539 | int spd = (scontrol >> 4) & 0xf; | |
5540 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
5541 | } | |
5542 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5543 | ||
1da177e4 LT |
5544 | rc = scsi_add_host(ap->host, dev); |
5545 | if (rc) { | |
f15a1daf | 5546 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); |
1da177e4 LT |
5547 | /* FIXME: do something useful here */ |
5548 | /* FIXME: handle unconditional calls to | |
5549 | * scsi_scan_host and ata_host_remove, below, | |
5550 | * at the very least | |
5551 | */ | |
5552 | } | |
3e706399 TH |
5553 | |
5554 | if (!ap->ops->probe_reset) { | |
5555 | unsigned long flags; | |
5556 | ||
5557 | ata_port_probe(ap); | |
5558 | ||
5559 | /* kick EH for boot probing */ | |
5560 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
5561 | ||
5562 | ap->eh_info.probe_mask = (1 << ATA_MAX_DEVICES) - 1; | |
5563 | ap->eh_info.action |= ATA_EH_SOFTRESET; | |
5564 | ||
5565 | ap->flags |= ATA_FLAG_LOADING; | |
5566 | ata_port_schedule_eh(ap); | |
5567 | ||
5568 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
5569 | ||
5570 | /* wait for EH to finish */ | |
5571 | ata_port_wait_eh(ap); | |
5572 | } else { | |
5573 | DPRINTK("ata%u: bus probe begin\n", ap->id); | |
5574 | rc = ata_bus_probe(ap); | |
5575 | DPRINTK("ata%u: bus probe end\n", ap->id); | |
5576 | ||
5577 | if (rc) { | |
5578 | /* FIXME: do something useful here? | |
5579 | * Current libata behavior will | |
5580 | * tear down everything when | |
5581 | * the module is removed | |
5582 | * or the h/w is unplugged. | |
5583 | */ | |
5584 | } | |
5585 | } | |
1da177e4 LT |
5586 | } |
5587 | ||
5588 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 5589 | DPRINTK("host probe begin\n"); |
1da177e4 LT |
5590 | for (i = 0; i < count; i++) { |
5591 | struct ata_port *ap = host_set->ports[i]; | |
5592 | ||
644dd0cc | 5593 | ata_scsi_scan_host(ap); |
1da177e4 LT |
5594 | } |
5595 | ||
5596 | dev_set_drvdata(dev, host_set); | |
5597 | ||
5598 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
5599 | return ent->n_ports; /* success */ | |
5600 | ||
5601 | err_out: | |
5602 | for (i = 0; i < count; i++) { | |
5603 | ata_host_remove(host_set->ports[i], 1); | |
5604 | scsi_host_put(host_set->ports[i]->host); | |
5605 | } | |
57f3bda8 | 5606 | err_free_ret: |
1da177e4 LT |
5607 | kfree(host_set); |
5608 | VPRINTK("EXIT, returning 0\n"); | |
5609 | return 0; | |
5610 | } | |
5611 | ||
17b14451 AC |
5612 | /** |
5613 | * ata_host_set_remove - PCI layer callback for device removal | |
5614 | * @host_set: ATA host set that was removed | |
5615 | * | |
2e9edbf8 | 5616 | * Unregister all objects associated with this host set. Free those |
17b14451 AC |
5617 | * objects. |
5618 | * | |
5619 | * LOCKING: | |
5620 | * Inherited from calling layer (may sleep). | |
5621 | */ | |
5622 | ||
17b14451 AC |
5623 | void ata_host_set_remove(struct ata_host_set *host_set) |
5624 | { | |
5625 | struct ata_port *ap; | |
5626 | unsigned int i; | |
5627 | ||
5628 | for (i = 0; i < host_set->n_ports; i++) { | |
5629 | ap = host_set->ports[i]; | |
5630 | scsi_remove_host(ap->host); | |
5631 | } | |
5632 | ||
5633 | free_irq(host_set->irq, host_set); | |
5634 | ||
5635 | for (i = 0; i < host_set->n_ports; i++) { | |
5636 | ap = host_set->ports[i]; | |
5637 | ||
5638 | ata_scsi_release(ap->host); | |
5639 | ||
5640 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
5641 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
5642 | ||
5643 | if (ioaddr->cmd_addr == 0x1f0) | |
5644 | release_region(0x1f0, 8); | |
5645 | else if (ioaddr->cmd_addr == 0x170) | |
5646 | release_region(0x170, 8); | |
5647 | } | |
5648 | ||
5649 | scsi_host_put(ap->host); | |
5650 | } | |
5651 | ||
5652 | if (host_set->ops->host_stop) | |
5653 | host_set->ops->host_stop(host_set); | |
5654 | ||
5655 | kfree(host_set); | |
5656 | } | |
5657 | ||
1da177e4 LT |
5658 | /** |
5659 | * ata_scsi_release - SCSI layer callback hook for host unload | |
5660 | * @host: libata host to be unloaded | |
5661 | * | |
5662 | * Performs all duties necessary to shut down a libata port... | |
5663 | * Kill port kthread, disable port, and release resources. | |
5664 | * | |
5665 | * LOCKING: | |
5666 | * Inherited from SCSI layer. | |
5667 | * | |
5668 | * RETURNS: | |
5669 | * One. | |
5670 | */ | |
5671 | ||
5672 | int ata_scsi_release(struct Scsi_Host *host) | |
5673 | { | |
35bb94b1 | 5674 | struct ata_port *ap = ata_shost_to_port(host); |
1da177e4 LT |
5675 | |
5676 | DPRINTK("ENTER\n"); | |
5677 | ||
5678 | ap->ops->port_disable(ap); | |
5679 | ata_host_remove(ap, 0); | |
5680 | ||
5681 | DPRINTK("EXIT\n"); | |
5682 | return 1; | |
5683 | } | |
5684 | ||
5685 | /** | |
5686 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
5687 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
5688 | * |
5689 | * Utility function which initializes data_addr, error_addr, | |
5690 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
5691 | * device_addr, status_addr, and command_addr to standard offsets | |
5692 | * relative to cmd_addr. | |
5693 | * | |
5694 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 5695 | */ |
0baab86b | 5696 | |
1da177e4 LT |
5697 | void ata_std_ports(struct ata_ioports *ioaddr) |
5698 | { | |
5699 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
5700 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
5701 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
5702 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
5703 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
5704 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
5705 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
5706 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
5707 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
5708 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
5709 | } | |
5710 | ||
0baab86b | 5711 | |
374b1873 JG |
5712 | #ifdef CONFIG_PCI |
5713 | ||
5714 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
5715 | { | |
5716 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
5717 | ||
5718 | pci_iounmap(pdev, host_set->mmio_base); | |
5719 | } | |
5720 | ||
1da177e4 LT |
5721 | /** |
5722 | * ata_pci_remove_one - PCI layer callback for device removal | |
5723 | * @pdev: PCI device that was removed | |
5724 | * | |
5725 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5726 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5727 | * Handle this by unregistering all objects associated |
5728 | * with this PCI device. Free those objects. Then finally | |
5729 | * release PCI resources and disable device. | |
5730 | * | |
5731 | * LOCKING: | |
5732 | * Inherited from PCI layer (may sleep). | |
5733 | */ | |
5734 | ||
5735 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5736 | { | |
5737 | struct device *dev = pci_dev_to_dev(pdev); | |
5738 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 5739 | |
17b14451 | 5740 | ata_host_set_remove(host_set); |
1da177e4 LT |
5741 | pci_release_regions(pdev); |
5742 | pci_disable_device(pdev); | |
5743 | dev_set_drvdata(dev, NULL); | |
5744 | } | |
5745 | ||
5746 | /* move to PCI subsystem */ | |
057ace5e | 5747 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5748 | { |
5749 | unsigned long tmp = 0; | |
5750 | ||
5751 | switch (bits->width) { | |
5752 | case 1: { | |
5753 | u8 tmp8 = 0; | |
5754 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5755 | tmp = tmp8; | |
5756 | break; | |
5757 | } | |
5758 | case 2: { | |
5759 | u16 tmp16 = 0; | |
5760 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5761 | tmp = tmp16; | |
5762 | break; | |
5763 | } | |
5764 | case 4: { | |
5765 | u32 tmp32 = 0; | |
5766 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5767 | tmp = tmp32; | |
5768 | break; | |
5769 | } | |
5770 | ||
5771 | default: | |
5772 | return -EINVAL; | |
5773 | } | |
5774 | ||
5775 | tmp &= bits->mask; | |
5776 | ||
5777 | return (tmp == bits->val) ? 1 : 0; | |
5778 | } | |
9b847548 JA |
5779 | |
5780 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state) | |
5781 | { | |
5782 | pci_save_state(pdev); | |
5783 | pci_disable_device(pdev); | |
5784 | pci_set_power_state(pdev, PCI_D3hot); | |
5785 | return 0; | |
5786 | } | |
5787 | ||
5788 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5789 | { | |
5790 | pci_set_power_state(pdev, PCI_D0); | |
5791 | pci_restore_state(pdev); | |
5792 | pci_enable_device(pdev); | |
5793 | pci_set_master(pdev); | |
5794 | return 0; | |
5795 | } | |
1da177e4 LT |
5796 | #endif /* CONFIG_PCI */ |
5797 | ||
5798 | ||
1da177e4 LT |
5799 | static int __init ata_init(void) |
5800 | { | |
5801 | ata_wq = create_workqueue("ata"); | |
5802 | if (!ata_wq) | |
5803 | return -ENOMEM; | |
5804 | ||
453b07ac TH |
5805 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
5806 | if (!ata_aux_wq) { | |
5807 | destroy_workqueue(ata_wq); | |
5808 | return -ENOMEM; | |
5809 | } | |
5810 | ||
1da177e4 LT |
5811 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
5812 | return 0; | |
5813 | } | |
5814 | ||
5815 | static void __exit ata_exit(void) | |
5816 | { | |
5817 | destroy_workqueue(ata_wq); | |
453b07ac | 5818 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
5819 | } |
5820 | ||
5821 | module_init(ata_init); | |
5822 | module_exit(ata_exit); | |
5823 | ||
67846b30 JG |
5824 | static unsigned long ratelimit_time; |
5825 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
5826 | ||
5827 | int ata_ratelimit(void) | |
5828 | { | |
5829 | int rc; | |
5830 | unsigned long flags; | |
5831 | ||
5832 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5833 | ||
5834 | if (time_after(jiffies, ratelimit_time)) { | |
5835 | rc = 1; | |
5836 | ratelimit_time = jiffies + (HZ/5); | |
5837 | } else | |
5838 | rc = 0; | |
5839 | ||
5840 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5841 | ||
5842 | return rc; | |
5843 | } | |
5844 | ||
c22daff4 TH |
5845 | /** |
5846 | * ata_wait_register - wait until register value changes | |
5847 | * @reg: IO-mapped register | |
5848 | * @mask: Mask to apply to read register value | |
5849 | * @val: Wait condition | |
5850 | * @interval_msec: polling interval in milliseconds | |
5851 | * @timeout_msec: timeout in milliseconds | |
5852 | * | |
5853 | * Waiting for some bits of register to change is a common | |
5854 | * operation for ATA controllers. This function reads 32bit LE | |
5855 | * IO-mapped register @reg and tests for the following condition. | |
5856 | * | |
5857 | * (*@reg & mask) != val | |
5858 | * | |
5859 | * If the condition is met, it returns; otherwise, the process is | |
5860 | * repeated after @interval_msec until timeout. | |
5861 | * | |
5862 | * LOCKING: | |
5863 | * Kernel thread context (may sleep) | |
5864 | * | |
5865 | * RETURNS: | |
5866 | * The final register value. | |
5867 | */ | |
5868 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
5869 | unsigned long interval_msec, | |
5870 | unsigned long timeout_msec) | |
5871 | { | |
5872 | unsigned long timeout; | |
5873 | u32 tmp; | |
5874 | ||
5875 | tmp = ioread32(reg); | |
5876 | ||
5877 | /* Calculate timeout _after_ the first read to make sure | |
5878 | * preceding writes reach the controller before starting to | |
5879 | * eat away the timeout. | |
5880 | */ | |
5881 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
5882 | ||
5883 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
5884 | msleep(interval_msec); | |
5885 | tmp = ioread32(reg); | |
5886 | } | |
5887 | ||
5888 | return tmp; | |
5889 | } | |
5890 | ||
1da177e4 LT |
5891 | /* |
5892 | * libata is essentially a library of internal helper functions for | |
5893 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5894 | * likely to change as new drivers are added and updated. | |
5895 | * Do not depend on ABI/API stability. | |
5896 | */ | |
5897 | ||
d7bb4cc7 TH |
5898 | EXPORT_SYMBOL_GPL(sata_deb_timing_boot); |
5899 | EXPORT_SYMBOL_GPL(sata_deb_timing_eh); | |
5900 | EXPORT_SYMBOL_GPL(sata_deb_timing_before_fsrst); | |
1da177e4 LT |
5901 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
5902 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
5903 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 5904 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5905 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5906 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 5907 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 5908 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 5909 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 5910 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
5911 | EXPORT_SYMBOL_GPL(ata_tf_load); |
5912 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5913 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5914 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5915 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5916 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5917 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5918 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5919 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5920 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5921 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5922 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 | 5923 | EXPORT_SYMBOL_GPL(ata_interrupt); |
a6b2c5d4 AC |
5924 | EXPORT_SYMBOL_GPL(ata_mmio_data_xfer); |
5925 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer); | |
75e99585 | 5926 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq); |
1da177e4 | 5927 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
e46834cd | 5928 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
5929 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
5930 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5931 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5932 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5933 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
5934 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
5935 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
5936 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
5937 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
5938 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 5939 | EXPORT_SYMBOL_GPL(ata_port_probe); |
3c567b7d | 5940 | EXPORT_SYMBOL_GPL(sata_set_spd); |
d7bb4cc7 TH |
5941 | EXPORT_SYMBOL_GPL(sata_phy_debounce); |
5942 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
1da177e4 LT |
5943 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
5944 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
5945 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
8a19ac89 | 5946 | EXPORT_SYMBOL_GPL(ata_std_probeinit); |
f5914a46 | 5947 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 TH |
5948 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
5949 | EXPORT_SYMBOL_GPL(sata_std_hardreset); | |
5950 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
5951 | EXPORT_SYMBOL_GPL(ata_std_probe_reset); | |
a62c0fc5 | 5952 | EXPORT_SYMBOL_GPL(ata_drive_probe_reset); |
623a3128 | 5953 | EXPORT_SYMBOL_GPL(ata_dev_revalidate); |
2e9edbf8 JG |
5954 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
5955 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 5956 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 5957 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 5958 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 5959 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 5960 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
5961 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5962 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 5963 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 5964 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 5965 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 LT |
5966 | EXPORT_SYMBOL_GPL(ata_scsi_release); |
5967 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
34bf2170 TH |
5968 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
5969 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
5970 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
5971 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
5972 | EXPORT_SYMBOL_GPL(ata_port_online); | |
5973 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
6a62a04d TH |
5974 | EXPORT_SYMBOL_GPL(ata_id_string); |
5975 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
1da177e4 LT |
5976 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
5977 | ||
1bc4ccff | 5978 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
5979 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
5980 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
5981 | ||
1da177e4 LT |
5982 | #ifdef CONFIG_PCI |
5983 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 5984 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
5985 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
5986 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
5987 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
9b847548 JA |
5988 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
5989 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
67951ade AC |
5990 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
5991 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 5992 | #endif /* CONFIG_PCI */ |
9b847548 JA |
5993 | |
5994 | EXPORT_SYMBOL_GPL(ata_device_suspend); | |
5995 | EXPORT_SYMBOL_GPL(ata_device_resume); | |
5996 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); | |
5997 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
ece1d636 | 5998 | |
ece1d636 | 5999 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 TH |
6000 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
6001 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
e3180499 TH |
6002 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
6003 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6004 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
6005 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
6006 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 6007 | EXPORT_SYMBOL_GPL(ata_do_eh); |