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[PATCH] libata: add ATA_QCFLAG_IO
[net-next-2.6.git] / drivers / scsi / libata-core.c
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1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
cf176e1a
TH		 68static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
69 int force_pio0);
1c3fae4d 70static int ata_down_sata_spd_limit(struct ata_port *ap);
e82cbdb9 71static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
83206a29
TH		 72static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
73 struct ata_device *dev);
acf356b1 74static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 75
76static unsigned int ata_unique_id = 1;
77static struct workqueue_struct *ata_wq;
78
418dc1f5 79int atapi_enabled = 1;
1623c81e
JG		 80module_param(atapi_enabled, int, 0444);
81MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
0b8efb0a
TH		 415static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
77853bf2 958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 959 complete(waiting);
a2a7a662
TH		 960}
961
962/**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
967 * @dma_dir: Data tranfer direction of the command
968 * @buf: Data buffer of the command
969 * @buflen: Length of data buffer
970 *
971 * Executes libata internal command with timeout. @tf contains
972 * command on entry and result on return. Timeout and error
973 * conditions are reported via return value. No recovery action
974 * is taken after a command times out. It's caller's duty to
975 * clean up after timeout.
976 *
977 * LOCKING:
978 * None. Should be called with kernel context, might sleep.
979 */
980
981static unsigned
982ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf,
984 int dma_dir, void *buf, unsigned int buflen)
985{
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
77853bf2 990 unsigned int err_mask;
a2a7a662
TH		 991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
998 qc->dma_dir = dma_dir;
999 if (dma_dir != DMA_NONE) {
1000 ata_sg_init_one(qc, buf, buflen);
1001 qc->nsect = buflen / ATA_SECT_SIZE;
1002 }
1003
77853bf2 1004 qc->private_data = &wait;
a2a7a662
TH		 1005 qc->complete_fn = ata_qc_complete_internal;
1006
8e0e694a 1007 ata_qc_issue(qc);
a2a7a662
TH		 1008
1009 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1010
1011 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1012 ata_port_flush_task(ap);
1013
a2a7a662
TH		 1014 spin_lock_irqsave(&ap->host_set->lock, flags);
1015
1016 /* We're racing with irq here. If we lose, the
1017 * following test prevents us from completing the qc
1018 * again. If completion irq occurs after here but
1019 * before the caller cleans up, it will result in a
1020 * spurious interrupt. We can live with that.
1021 */
77853bf2 1022 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1023 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1024 ata_qc_complete(qc);
1025 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1026 ap->id, command);
1027 }
1028
1029 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1030 }
1031
77853bf2
TH		 1032 *tf = qc->tf;
1033 err_mask = qc->err_mask;
1034
1035 ata_qc_free(qc);
1036
1f7dd3e9
TH		 1037 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1038 * Until those drivers are fixed, we detect the condition
1039 * here, fail the command with AC_ERR_SYSTEM and reenable the
1040 * port.
1041 *
1042 * Note that this doesn't change any behavior as internal
1043 * command failure results in disabling the device in the
1044 * higher layer for LLDDs without new reset/EH callbacks.
1045 *
1046 * Kill the following code as soon as those drivers are fixed.
1047 */
198e0fed 1048 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1049 err_mask |= AC_ERR_SYSTEM;
1050 ata_port_probe(ap);
1051 }
1052
77853bf2 1053 return err_mask;
a2a7a662
TH		 1054}
1055
1bc4ccff
AC		 1056/**
1057 * ata_pio_need_iordy - check if iordy needed
1058 * @adev: ATA device
1059 *
1060 * Check if the current speed of the device requires IORDY. Used
1061 * by various controllers for chip configuration.
1062 */
1063
1064unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1065{
1066 int pio;
1067 int speed = adev->pio_mode - XFER_PIO_0;
1068
1069 if (speed < 2)
1070 return 0;
1071 if (speed > 2)
1072 return 1;
2e9edbf8 1073
1bc4ccff
AC		 1074 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1075
1076 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1077 pio = adev->id[ATA_ID_EIDE_PIO];
1078 /* Is the speed faster than the drive allows non IORDY ? */
1079 if (pio) {
1080 /* This is cycle times not frequency - watch the logic! */
1081 if (pio > 240) /* PIO2 is 240nS per cycle */
1082 return 1;
1083 return 0;
1084 }
1085 }
1086 return 0;
1087}
1088
1da177e4 1089/**
49016aca
TH		 1090 * ata_dev_read_id - Read ID data from the specified device
1091 * @ap: port on which target device resides
1092 * @dev: target device
1093 * @p_class: pointer to class of the target device (may be changed)
1094 * @post_reset: is this read ID post-reset?
d9572b1d 1095 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1096 *
49016aca
TH		 1097 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1098 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1099 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1100 * for pre-ATA4 drives.
1da177e4
LT		 1101 *
1102 * LOCKING:
49016aca
TH		 1103 * Kernel thread context (may sleep)
1104 *
1105 * RETURNS:
1106 * 0 on success, -errno otherwise.
1da177e4 1107 */
49016aca 1108static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1109 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1110{
49016aca 1111 unsigned int class = *p_class;
a0123703 1112 struct ata_taskfile tf;
49016aca 1113 unsigned int err_mask = 0;
d9572b1d 1114 u16 *id;
49016aca
TH		 1115 const char *reason;
1116 int rc;
1da177e4 1117
49016aca 1118 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1119
49016aca 1120 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1121
d9572b1d
TH		 1122 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1123 if (id == NULL) {
1124 rc = -ENOMEM;
1125 reason = "out of memory";
1126 goto err_out;
1127 }
1128
49016aca
TH		 1129 retry:
1130 ata_tf_init(ap, &tf, dev->devno);
a0123703 1131
49016aca
TH		 1132 switch (class) {
1133 case ATA_DEV_ATA:
a0123703 1134 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1135 break;
1136 case ATA_DEV_ATAPI:
a0123703 1137 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1138 break;
1139 default:
1140 rc = -ENODEV;
1141 reason = "unsupported class";
1142 goto err_out;
1da177e4
LT		 1143 }
1144
a0123703 1145 tf.protocol = ATA_PROT_PIO;
1da177e4 1146
a0123703 1147 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1148 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1149 if (err_mask) {
49016aca
TH		 1150 rc = -EIO;
1151 reason = "I/O error";
1da177e4
LT		 1152 goto err_out;
1153 }
1154
49016aca 1155 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1156
49016aca 1157 /* sanity check */
692785e7 1158 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1159 rc = -EINVAL;
1160 reason = "device reports illegal type";
1161 goto err_out;
1162 }
1163
1164 if (post_reset && class == ATA_DEV_ATA) {
1165 /*
1166 * The exact sequence expected by certain pre-ATA4 drives is:
1167 * SRST RESET
1168 * IDENTIFY
1169 * INITIALIZE DEVICE PARAMETERS
1170 * anything else..
1171 * Some drives were very specific about that exact sequence.
1172 */
1173 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1174 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1175 if (err_mask) {
1176 rc = -EIO;
1177 reason = "INIT_DEV_PARAMS failed";
1178 goto err_out;
1179 }
1180
1181 /* current CHS translation info (id[53-58]) might be
1182 * changed. reread the identify device info.
1183 */
1184 post_reset = 0;
1185 goto retry;
1186 }
1187 }
1188
1189 *p_class = class;
d9572b1d 1190 *p_id = id;
49016aca
TH		 1191 return 0;
1192
1193 err_out:
1194 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1195 ap->id, dev->devno, reason);
d9572b1d 1196 kfree(id);
49016aca
TH		 1197 return rc;
1198}
1199
4b2f3ede
TH		 1200static inline u8 ata_dev_knobble(const struct ata_port *ap,
1201 struct ata_device *dev)
1202{
1203 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1204}
1205
49016aca 1206/**
ffeae418
TH		 1207 * ata_dev_configure - Configure the specified ATA/ATAPI device
1208 * @ap: Port on which target device resides
1209 * @dev: Target device to configure
4c2d721a 1210 * @print_info: Enable device info printout
ffeae418
TH		 1211 *
1212 * Configure @dev according to @dev->id. Generic and low-level
1213 * driver specific fixups are also applied.
49016aca
TH		 1214 *
1215 * LOCKING:
ffeae418
TH		 1216 * Kernel thread context (may sleep)
1217 *
1218 * RETURNS:
1219 * 0 on success, -errno otherwise
49016aca 1220 */
4c2d721a
TH		 1221static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1222 int print_info)
49016aca 1223{
1148c3a7 1224 const u16 *id = dev->id;
ff8854b2 1225 unsigned int xfer_mask;
49016aca
TH		 1226 int i, rc;
1227
e1211e3f 1228 if (!ata_dev_enabled(dev)) {
49016aca 1229 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1230 ap->id, dev->devno);
1231 return 0;
49016aca
TH		 1232 }
1233
ffeae418 1234 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1235
c39f5ebe
TH		 1236 /* print device capabilities */
1237 if (print_info)
1238 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1239 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1240 ap->id, dev->devno, id[49], id[82], id[83],
1241 id[84], id[85], id[86], id[87], id[88]);
1242
208a9933 1243 /* initialize to-be-configured parameters */
ea1dd4e1 1244 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1245 dev->max_sectors = 0;
1246 dev->cdb_len = 0;
1247 dev->n_sectors = 0;
1248 dev->cylinders = 0;
1249 dev->heads = 0;
1250 dev->sectors = 0;
1251
1da177e4
LT		 1252 /*
1253 * common ATA, ATAPI feature tests
1254 */
1255
ff8854b2 1256 /* find max transfer mode; for printk only */
1148c3a7 1257 xfer_mask = ata_id_xfermask(id);
1da177e4 1258
1148c3a7 1259 ata_dump_id(id);
1da177e4
LT		 1260
1261 /* ATA-specific feature tests */
1262 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1263 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1264
1148c3a7 1265 if (ata_id_has_lba(id)) {
4c2d721a 1266 const char *lba_desc;
8bf62ece 1267
4c2d721a
TH		 1268 lba_desc = "LBA";
1269 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1270 if (ata_id_has_lba48(id)) {
8bf62ece 1271 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1272 lba_desc = "LBA48";
1273 }
8bf62ece
AL		 1274
1275 /* print device info to dmesg */
4c2d721a
TH		 1276 if (print_info)
1277 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1278 "max %s, %Lu sectors: %s\n",
1279 ap->id, dev->devno,
1148c3a7 1280 ata_id_major_version(id),
ff8854b2 1281 ata_mode_string(xfer_mask),
4c2d721a
TH		 1282 (unsigned long long)dev->n_sectors,
1283 lba_desc);
ffeae418 1284 } else {
8bf62ece
AL		 1285 /* CHS */
1286
1287 /* Default translation */
1148c3a7
TH		 1288 dev->cylinders = id[1];
1289 dev->heads = id[3];
1290 dev->sectors = id[6];
8bf62ece 1291
1148c3a7 1292 if (ata_id_current_chs_valid(id)) {
8bf62ece 1293 /* Current CHS translation is valid. */
1148c3a7
TH		 1294 dev->cylinders = id[54];
1295 dev->heads = id[55];
1296 dev->sectors = id[56];
8bf62ece
AL		 1297 }
1298
1299 /* print device info to dmesg */
4c2d721a
TH		 1300 if (print_info)
1301 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1302 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1303 ap->id, dev->devno,
1148c3a7 1304 ata_id_major_version(id),
ff8854b2 1305 ata_mode_string(xfer_mask),
4c2d721a
TH		 1306 (unsigned long long)dev->n_sectors,
1307 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1308 }
1309
6e7846e9 1310 dev->cdb_len = 16;
1da177e4
LT		 1311 }
1312
1313 /* ATAPI-specific feature tests */
2c13b7ce 1314 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1315 rc = atapi_cdb_len(id);
1da177e4
LT		 1316 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1317 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1318 rc = -EINVAL;
1da177e4
LT		 1319 goto err_out_nosup;
1320 }
6e7846e9 1321 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1322
1323 /* print device info to dmesg */
4c2d721a
TH		 1324 if (print_info)
1325 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1326 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1327 }
1328
6e7846e9
TH		 1329 ap->host->max_cmd_len = 0;
1330 for (i = 0; i < ATA_MAX_DEVICES; i++)
1331 ap->host->max_cmd_len = max_t(unsigned int,
1332 ap->host->max_cmd_len,
1333 ap->device[i].cdb_len);
1334
4b2f3ede
TH		 1335 /* limit bridge transfers to udma5, 200 sectors */
1336 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1337 if (print_info)
1338 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1339 ap->id, dev->devno);
5a529139 1340 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1341 dev->max_sectors = ATA_MAX_SECTORS;
1342 }
1343
1344 if (ap->ops->dev_config)
1345 ap->ops->dev_config(ap, dev);
1346
1da177e4 1347 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1348 return 0;
1da177e4
LT		 1349
1350err_out_nosup:
1da177e4 1351 DPRINTK("EXIT, err\n");
ffeae418 1352 return rc;
1da177e4
LT		 1353}
1354
1355/**
1356 * ata_bus_probe - Reset and probe ATA bus
1357 * @ap: Bus to probe
1358 *
0cba632b
JG		 1359 * Master ATA bus probing function. Initiates a hardware-dependent
1360 * bus reset, then attempts to identify any devices found on
1361 * the bus.
1362 *
1da177e4 1363 * LOCKING:
0cba632b 1364 * PCI/etc. bus probe sem.
1da177e4
LT		 1365 *
1366 * RETURNS:
96072e69 1367 * Zero on success, negative errno otherwise.
1da177e4
LT		 1368 */
1369
1370static int ata_bus_probe(struct ata_port *ap)
1371{
28ca5c57 1372 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1373 int tries[ATA_MAX_DEVICES];
1374 int i, rc, down_xfermask;
e82cbdb9 1375 struct ata_device *dev;
1da177e4 1376
28ca5c57 1377 ata_port_probe(ap);
c19ba8af 1378
14d2bac1
TH		 1379 for (i = 0; i < ATA_MAX_DEVICES; i++)
1380 tries[i] = ATA_PROBE_MAX_TRIES;
1381
1382 retry:
1383 down_xfermask = 0;
1384
2044470c
TH		 1385 /* reset and determine device classes */
1386 for (i = 0; i < ATA_MAX_DEVICES; i++)
1387 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1388
2044470c 1389 if (ap->ops->probe_reset) {
c19ba8af 1390 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1391 if (rc) {
1392 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1393 return rc;
c19ba8af 1394 }
28ca5c57 1395 } else {
c19ba8af
TH		 1396 ap->ops->phy_reset(ap);
1397
198e0fed 1398 if (!(ap->flags & ATA_FLAG_DISABLED))
2044470c 1399 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1400 classes[i] = ap->device[i].class;
2044470c 1401
28ca5c57
TH		 1402 ata_port_probe(ap);
1403 }
1da177e4 1404
2044470c
TH		 1405 for (i = 0; i < ATA_MAX_DEVICES; i++)
1406 if (classes[i] == ATA_DEV_UNKNOWN)
1407 classes[i] = ATA_DEV_NONE;
1408
28ca5c57 1409 /* read IDENTIFY page and configure devices */
1da177e4 1410 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1411 dev = &ap->device[i];
28ca5c57
TH		 1412 dev->class = classes[i];
1413
14d2bac1
TH		 1414 if (!tries[i]) {
1415 ata_down_xfermask_limit(ap, dev, 1);
1416 ata_dev_disable(ap, dev);
ffeae418
TH		 1417 }
1418
14d2bac1 1419 if (!ata_dev_enabled(dev))
ffeae418 1420 continue;
ffeae418 1421
14d2bac1
TH		 1422 kfree(dev->id);
1423 dev->id = NULL;
1424 rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
1425 if (rc)
1426 goto fail;
1427
1428 rc = ata_dev_configure(ap, dev, 1);
1429 if (rc)
1430 goto fail;
1da177e4
LT		 1431 }
1432
e82cbdb9
TH		 1433 /* configure transfer mode */
1434 if (ap->ops->set_mode) {
1435 /* FIXME: make ->set_mode handle no device case and
1436 * return error code and failing device on failure as
1437 * ata_set_mode() does.
1438 */
14d2bac1
TH		 1439 for (i = 0; i < ATA_MAX_DEVICES; i++)
1440 if (ata_dev_enabled(&ap->device[i])) {
1441 ap->ops->set_mode(ap);
1442 break;
1443 }
e82cbdb9
TH		 1444 rc = 0;
1445 } else {
14d2bac1
TH		 1446 rc = ata_set_mode(ap, &dev);
1447 if (rc) {
1448 down_xfermask = 1;
1449 goto fail;
1450 }
e82cbdb9 1451 }
1da177e4 1452
e82cbdb9
TH		 1453 for (i = 0; i < ATA_MAX_DEVICES; i++)
1454 if (ata_dev_enabled(&ap->device[i]))
1455 return 0;
1da177e4 1456
e82cbdb9
TH		 1457 /* no device present, disable port */
1458 ata_port_disable(ap);
1da177e4 1459 ap->ops->port_disable(ap);
96072e69 1460 return -ENODEV;
14d2bac1
TH		 1461
1462 fail:
1463 switch (rc) {
1464 case -EINVAL:
1465 case -ENODEV:
1466 tries[dev->devno] = 0;
1467 break;
1468 case -EIO:
1469 ata_down_sata_spd_limit(ap);
1470 /* fall through */
1471 default:
1472 tries[dev->devno]--;
1473 if (down_xfermask &&
1474 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1475 tries[dev->devno] = 0;
1476 }
1477
1478 goto retry;
1da177e4
LT		 1479}
1480
1481/**
0cba632b
JG		 1482 * ata_port_probe - Mark port as enabled
1483 * @ap: Port for which we indicate enablement
1da177e4 1484 *
0cba632b
JG		 1485 * Modify @ap data structure such that the system
1486 * thinks that the entire port is enabled.
1487 *
1488 * LOCKING: host_set lock, or some other form of
1489 * serialization.
1da177e4
LT		 1490 */
1491
1492void ata_port_probe(struct ata_port *ap)
1493{
198e0fed 1494 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1495}
1496
3be680b7
TH		 1497/**
1498 * sata_print_link_status - Print SATA link status
1499 * @ap: SATA port to printk link status about
1500 *
1501 * This function prints link speed and status of a SATA link.
1502 *
1503 * LOCKING:
1504 * None.
1505 */
1506static void sata_print_link_status(struct ata_port *ap)
1507{
1508 u32 sstatus, tmp;
3be680b7
TH		 1509
1510 if (!ap->ops->scr_read)
1511 return;
1512
1513 sstatus = scr_read(ap, SCR_STATUS);
1514
1515 if (sata_dev_present(ap)) {
1516 tmp = (sstatus >> 4) & 0xf;
4c360c81
TH		 1517 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1518 ap->id, sata_spd_string(tmp), sstatus);
3be680b7
TH		 1519 } else {
1520 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1521 ap->id, sstatus);
1522 }
1523}
1524
1da177e4 1525/**
780a87f7
JG		 1526 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1527 * @ap: SATA port associated with target SATA PHY.
1da177e4 1528 *
780a87f7
JG		 1529 * This function issues commands to standard SATA Sxxx
1530 * PHY registers, to wake up the phy (and device), and
1531 * clear any reset condition.
1da177e4
LT		 1532 *
1533 * LOCKING:
0cba632b 1534 * PCI/etc. bus probe sem.
1da177e4
LT		 1535 *
1536 */
1537void __sata_phy_reset(struct ata_port *ap)
1538{
1539 u32 sstatus;
1540 unsigned long timeout = jiffies + (HZ * 5);
1541
1542 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1543 /* issue phy wake/reset */
1544 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1545 /* Couldn't find anything in SATA I/II specs, but
1546 * AHCI-1.1 10.4.2 says at least 1 ms. */
1547 mdelay(1);
1da177e4 1548 }
cdcca89e 1549 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1550
1551 /* wait for phy to become ready, if necessary */
1552 do {
1553 msleep(200);
1554 sstatus = scr_read(ap, SCR_STATUS);
1555 if ((sstatus & 0xf) != 1)
1556 break;
1557 } while (time_before(jiffies, timeout));
1558
3be680b7
TH		 1559 /* print link status */
1560 sata_print_link_status(ap);
656563e3 1561
3be680b7
TH		 1562 /* TODO: phy layer with polling, timeouts, etc. */
1563 if (sata_dev_present(ap))
1da177e4 1564 ata_port_probe(ap);
3be680b7 1565 else
1da177e4 1566 ata_port_disable(ap);
1da177e4 1567
198e0fed 1568 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1569 return;
1570
1571 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1572 ata_port_disable(ap);
1573 return;
1574 }
1575
1576 ap->cbl = ATA_CBL_SATA;
1577}
1578
1579/**
780a87f7
JG		 1580 * sata_phy_reset - Reset SATA bus.
1581 * @ap: SATA port associated with target SATA PHY.
1da177e4 1582 *
780a87f7
JG		 1583 * This function resets the SATA bus, and then probes
1584 * the bus for devices.
1da177e4
LT		 1585 *
1586 * LOCKING:
0cba632b 1587 * PCI/etc. bus probe sem.
1da177e4
LT		 1588 *
1589 */
1590void sata_phy_reset(struct ata_port *ap)
1591{
1592 __sata_phy_reset(ap);
198e0fed 1593 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1594 return;
1595 ata_bus_reset(ap);
1596}
1597
ebdfca6e
AC		 1598/**
1599 * ata_dev_pair - return other device on cable
1600 * @ap: port
1601 * @adev: device
1602 *
1603 * Obtain the other device on the same cable, or if none is
1604 * present NULL is returned
1605 */
2e9edbf8 1606
ebdfca6e
AC		 1607struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1608{
1609 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1610 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1611 return NULL;
1612 return pair;
1613}
1614
1da177e4 1615/**
780a87f7
JG		 1616 * ata_port_disable - Disable port.
1617 * @ap: Port to be disabled.
1da177e4 1618 *
780a87f7
JG		 1619 * Modify @ap data structure such that the system
1620 * thinks that the entire port is disabled, and should
1621 * never attempt to probe or communicate with devices
1622 * on this port.
1623 *
1624 * LOCKING: host_set lock, or some other form of
1625 * serialization.
1da177e4
LT		 1626 */
1627
1628void ata_port_disable(struct ata_port *ap)
1629{
1630 ap->device[0].class = ATA_DEV_NONE;
1631 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1632 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1633}
1634
1c3fae4d
TH		 1635/**
1636 * ata_down_sata_spd_limit - adjust SATA spd limit downward
1637 * @ap: Port to adjust SATA spd limit for
1638 *
1639 * Adjust SATA spd limit of @ap downward. Note that this
1640 * function only adjusts the limit. The change must be applied
1641 * using ata_set_sata_spd().
1642 *
1643 * LOCKING:
1644 * Inherited from caller.
1645 *
1646 * RETURNS:
1647 * 0 on success, negative errno on failure
1648 */
1649static int ata_down_sata_spd_limit(struct ata_port *ap)
1650{
1651 u32 spd, mask;
1652 int highbit;
1653
1654 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1655 return -EOPNOTSUPP;
1656
1657 mask = ap->sata_spd_limit;
1658 if (mask <= 1)
1659 return -EINVAL;
1660 highbit = fls(mask) - 1;
1661 mask &= ~(1 << highbit);
1662
1663 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1664 if (spd <= 1)
1665 return -EINVAL;
1666 spd--;
1667 mask &= (1 << spd) - 1;
1668 if (!mask)
1669 return -EINVAL;
1670
1671 ap->sata_spd_limit = mask;
1672
1673 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1674 ap->id, sata_spd_string(fls(mask)));
1675
1676 return 0;
1677}
1678
1679static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
1680{
1681 u32 spd, limit;
1682
1683 if (ap->sata_spd_limit == UINT_MAX)
1684 limit = 0;
1685 else
1686 limit = fls(ap->sata_spd_limit);
1687
1688 spd = (*scontrol >> 4) & 0xf;
1689 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1690
1691 return spd != limit;
1692}
1693
1694/**
1695 * ata_set_sata_spd_needed - is SATA spd configuration needed
1696 * @ap: Port in question
1697 *
1698 * Test whether the spd limit in SControl matches
1699 * @ap->sata_spd_limit. This function is used to determine
1700 * whether hardreset is necessary to apply SATA spd
1701 * configuration.
1702 *
1703 * LOCKING:
1704 * Inherited from caller.
1705 *
1706 * RETURNS:
1707 * 1 if SATA spd configuration is needed, 0 otherwise.
1708 */
1709static int ata_set_sata_spd_needed(struct ata_port *ap)
1710{
1711 u32 scontrol;
1712
1713 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1714 return 0;
1715
1716 scontrol = scr_read(ap, SCR_CONTROL);
1717
1718 return __ata_set_sata_spd_needed(ap, &scontrol);
1719}
1720
1721/**
1722 * ata_set_sata_spd - set SATA spd according to spd limit
1723 * @ap: Port to set SATA spd for
1724 *
1725 * Set SATA spd of @ap according to sata_spd_limit.
1726 *
1727 * LOCKING:
1728 * Inherited from caller.
1729 *
1730 * RETURNS:
1731 * 0 if spd doesn't need to be changed, 1 if spd has been
1732 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1733 */
1734static int ata_set_sata_spd(struct ata_port *ap)
1735{
1736 u32 scontrol;
1737
1738 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1739 return -EOPNOTSUPP;
1740
1741 scontrol = scr_read(ap, SCR_CONTROL);
1742 if (!__ata_set_sata_spd_needed(ap, &scontrol))
1743 return 0;
1744
1745 scr_write(ap, SCR_CONTROL, scontrol);
1746 return 1;
1747}
1748
452503f9
AC		 1749/*
1750 * This mode timing computation functionality is ported over from
1751 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1752 */
1753/*
1754 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1755 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1756 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1757 * is currently supported only by Maxtor drives.
452503f9
AC		 1758 */
1759
1760static const struct ata_timing ata_timing[] = {
1761
1762 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1763 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1764 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1765 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1766
1767 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1768 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1769 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1770
1771/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1772
452503f9
AC		 1773 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1774 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1775 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1776
452503f9
AC		 1777 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1778 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1779 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1780
1781/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1782 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1783 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1784
1785 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1786 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1787 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1788
1789/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1790
1791 { 0xFF }
1792};
1793
1794#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1795#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1796
1797static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1798{
1799 q->setup = EZ(t->setup * 1000, T);
1800 q->act8b = EZ(t->act8b * 1000, T);
1801 q->rec8b = EZ(t->rec8b * 1000, T);
1802 q->cyc8b = EZ(t->cyc8b * 1000, T);
1803 q->active = EZ(t->active * 1000, T);
1804 q->recover = EZ(t->recover * 1000, T);
1805 q->cycle = EZ(t->cycle * 1000, T);
1806 q->udma = EZ(t->udma * 1000, UT);
1807}
1808
1809void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1810 struct ata_timing *m, unsigned int what)
1811{
1812 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1813 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1814 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1815 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1816 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1817 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1818 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1819 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1820}
1821
1822static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1823{
1824 const struct ata_timing *t;
1825
1826 for (t = ata_timing; t->mode != speed; t++)
91190758 1827 if (t->mode == 0xFF)
452503f9 1828 return NULL;
2e9edbf8 1829 return t;
452503f9
AC		 1830}
1831
1832int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1833 struct ata_timing *t, int T, int UT)
1834{
1835 const struct ata_timing *s;
1836 struct ata_timing p;
1837
1838 /*
2e9edbf8 1839 * Find the mode.
75b1f2f8 1840 */
452503f9
AC		 1841
1842 if (!(s = ata_timing_find_mode(speed)))
1843 return -EINVAL;
1844
75b1f2f8
AL		 1845 memcpy(t, s, sizeof(*s));
1846
452503f9
AC		 1847 /*
1848 * If the drive is an EIDE drive, it can tell us it needs extended
1849 * PIO/MW_DMA cycle timing.
1850 */
1851
1852 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1853 memset(&p, 0, sizeof(p));
1854 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1855 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1856 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1857 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1858 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1859 }
1860 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1861 }
1862
1863 /*
1864 * Convert the timing to bus clock counts.
1865 */
1866
75b1f2f8 1867 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1868
1869 /*
c893a3ae
RD		 1870 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1871 * S.M.A.R.T * and some other commands. We have to ensure that the
1872 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1873 */
1874
1875 if (speed > XFER_PIO_4) {
1876 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1877 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1878 }
1879
1880 /*
c893a3ae 1881 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1882 */
1883
1884 if (t->act8b + t->rec8b < t->cyc8b) {
1885 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1886 t->rec8b = t->cyc8b - t->act8b;
1887 }
1888
1889 if (t->active + t->recover < t->cycle) {
1890 t->active += (t->cycle - (t->active + t->recover)) / 2;
1891 t->recover = t->cycle - t->active;
1892 }
1893
1894 return 0;
1895}
1896
cf176e1a
TH		 1897/**
1898 * ata_down_xfermask_limit - adjust dev xfer masks downward
1899 * @ap: Port associated with device @dev
1900 * @dev: Device to adjust xfer masks
1901 * @force_pio0: Force PIO0
1902 *
1903 * Adjust xfer masks of @dev downward. Note that this function
1904 * does not apply the change. Invoking ata_set_mode() afterwards
1905 * will apply the limit.
1906 *
1907 * LOCKING:
1908 * Inherited from caller.
1909 *
1910 * RETURNS:
1911 * 0 on success, negative errno on failure
1912 */
1913static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1914 int force_pio0)
1915{
1916 unsigned long xfer_mask;
1917 int highbit;
1918
1919 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1920 dev->udma_mask);
1921
1922 if (!xfer_mask)
1923 goto fail;
1924 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1925 if (xfer_mask & ATA_MASK_UDMA)
1926 xfer_mask &= ~ATA_MASK_MWDMA;
1927
1928 highbit = fls(xfer_mask) - 1;
1929 xfer_mask &= ~(1 << highbit);
1930 if (force_pio0)
1931 xfer_mask &= 1 << ATA_SHIFT_PIO;
1932 if (!xfer_mask)
1933 goto fail;
1934
1935 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1936 &dev->udma_mask);
1937
1938 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1939 ap->id, dev->devno, ata_mode_string(xfer_mask));
1940
1941 return 0;
1942
1943 fail:
1944 return -EINVAL;
1945}
1946
83206a29 1947static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1948{
83206a29
TH		 1949 unsigned int err_mask;
1950 int rc;
1da177e4 1951
e8384607 1952 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 1953 if (dev->xfer_shift == ATA_SHIFT_PIO)
1954 dev->flags |= ATA_DFLAG_PIO;
1955
83206a29
TH		 1956 err_mask = ata_dev_set_xfermode(ap, dev);
1957 if (err_mask) {
1958 printk(KERN_ERR
1959 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1960 ap->id, err_mask);
1961 return -EIO;
1962 }
1da177e4 1963
83206a29 1964 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1965 if (rc)
83206a29 1966 return rc;
48a8a14f 1967
23e71c3d
TH		 1968 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1969 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1970
1971 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1972 ap->id, dev->devno,
1973 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1974 return 0;
1da177e4
LT		 1975}
1976
1da177e4
LT		 1977/**
1978 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1979 * @ap: port on which timings will be programmed
e82cbdb9 1980 * @r_failed_dev: out paramter for failed device
1da177e4 1981 *
e82cbdb9
TH		 1982 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1983 * ata_set_mode() fails, pointer to the failing device is
1984 * returned in @r_failed_dev.
780a87f7 1985 *
1da177e4 1986 * LOCKING:
0cba632b 1987 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1988 *
1989 * RETURNS:
1990 * 0 on success, negative errno otherwise
1da177e4 1991 */
e82cbdb9 1992static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1993{
e8e0619f 1994 struct ata_device *dev;
e82cbdb9 1995 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1996
a6d5a51c
TH		 1997 /* step 1: calculate xfer_mask */
1998 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 1999 unsigned int pio_mask, dma_mask;
a6d5a51c 2000
e8e0619f
TH		 2001 dev = &ap->device[i];
2002
e1211e3f 2003 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2004 continue;
2005
acf356b1 2006 ata_dev_xfermask(ap, dev);
1da177e4 2007
acf356b1
TH		 2008 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2009 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2010 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2011 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2012
4f65977d 2013 found = 1;
5444a6f4
AC		 2014 if (dev->dma_mode)
2015 used_dma = 1;
a6d5a51c 2016 }
4f65977d 2017 if (!found)
e82cbdb9 2018 goto out;
a6d5a51c
TH		 2019
2020 /* step 2: always set host PIO timings */
e8e0619f
TH		 2021 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2022 dev = &ap->device[i];
2023 if (!ata_dev_enabled(dev))
2024 continue;
2025
2026 if (!dev->pio_mode) {
2027 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2028 ap->id, dev->devno);
2029 rc = -EINVAL;
e82cbdb9 2030 goto out;
e8e0619f
TH		 2031 }
2032
2033 dev->xfer_mode = dev->pio_mode;
2034 dev->xfer_shift = ATA_SHIFT_PIO;
2035 if (ap->ops->set_piomode)
2036 ap->ops->set_piomode(ap, dev);
2037 }
1da177e4 2038
a6d5a51c 2039 /* step 3: set host DMA timings */
e8e0619f
TH		 2040 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2041 dev = &ap->device[i];
2042
2043 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2044 continue;
2045
2046 dev->xfer_mode = dev->dma_mode;
2047 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2048 if (ap->ops->set_dmamode)
2049 ap->ops->set_dmamode(ap, dev);
2050 }
1da177e4
LT		 2051
2052 /* step 4: update devices' xfer mode */
83206a29 2053 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2054 dev = &ap->device[i];
1da177e4 2055
e1211e3f 2056 if (!ata_dev_enabled(dev))
83206a29
TH		 2057 continue;
2058
5bbc53f4
TH		 2059 rc = ata_dev_set_mode(ap, dev);
2060 if (rc)
e82cbdb9 2061 goto out;
83206a29 2062 }
1da177e4 2063
e8e0619f
TH		 2064 /* Record simplex status. If we selected DMA then the other
2065 * host channels are not permitted to do so.
5444a6f4 2066 */
5444a6f4
AC		 2067 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2068 ap->host_set->simplex_claimed = 1;
2069
e8e0619f 2070 /* step5: chip specific finalisation */
1da177e4
LT		 2071 if (ap->ops->post_set_mode)
2072 ap->ops->post_set_mode(ap);
2073
e82cbdb9
TH		 2074 out:
2075 if (rc)
2076 *r_failed_dev = dev;
2077 return rc;
1da177e4
LT		 2078}
2079
1fdffbce
JG		 2080/**
2081 * ata_tf_to_host - issue ATA taskfile to host controller
2082 * @ap: port to which command is being issued
2083 * @tf: ATA taskfile register set
2084 *
2085 * Issues ATA taskfile register set to ATA host controller,
2086 * with proper synchronization with interrupt handler and
2087 * other threads.
2088 *
2089 * LOCKING:
2090 * spin_lock_irqsave(host_set lock)
2091 */
2092
2093static inline void ata_tf_to_host(struct ata_port *ap,
2094 const struct ata_taskfile *tf)
2095{
2096 ap->ops->tf_load(ap, tf);
2097 ap->ops->exec_command(ap, tf);
2098}
2099
1da177e4
LT		 2100/**
2101 * ata_busy_sleep - sleep until BSY clears, or timeout
2102 * @ap: port containing status register to be polled
2103 * @tmout_pat: impatience timeout
2104 * @tmout: overall timeout
2105 *
780a87f7
JG		 2106 * Sleep until ATA Status register bit BSY clears,
2107 * or a timeout occurs.
2108 *
2109 * LOCKING: None.
1da177e4
LT		 2110 */
2111
6f8b9958
TH		 2112unsigned int ata_busy_sleep (struct ata_port *ap,
2113 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2114{
2115 unsigned long timer_start, timeout;
2116 u8 status;
2117
2118 status = ata_busy_wait(ap, ATA_BUSY, 300);
2119 timer_start = jiffies;
2120 timeout = timer_start + tmout_pat;
2121 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2122 msleep(50);
2123 status = ata_busy_wait(ap, ATA_BUSY, 3);
2124 }
2125
2126 if (status & ATA_BUSY)
2127 printk(KERN_WARNING "ata%u is slow to respond, "
2128 "please be patient\n", ap->id);
2129
2130 timeout = timer_start + tmout;
2131 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2132 msleep(50);
2133 status = ata_chk_status(ap);
2134 }
2135
2136 if (status & ATA_BUSY) {
2137 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2138 ap->id, tmout / HZ);
2139 return 1;
2140 }
2141
2142 return 0;
2143}
2144
2145static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2146{
2147 struct ata_ioports *ioaddr = &ap->ioaddr;
2148 unsigned int dev0 = devmask & (1 << 0);
2149 unsigned int dev1 = devmask & (1 << 1);
2150 unsigned long timeout;
2151
2152 /* if device 0 was found in ata_devchk, wait for its
2153 * BSY bit to clear
2154 */
2155 if (dev0)
2156 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2157
2158 /* if device 1 was found in ata_devchk, wait for
2159 * register access, then wait for BSY to clear
2160 */
2161 timeout = jiffies + ATA_TMOUT_BOOT;
2162 while (dev1) {
2163 u8 nsect, lbal;
2164
2165 ap->ops->dev_select(ap, 1);
2166 if (ap->flags & ATA_FLAG_MMIO) {
2167 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2168 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2169 } else {
2170 nsect = inb(ioaddr->nsect_addr);
2171 lbal = inb(ioaddr->lbal_addr);
2172 }
2173 if ((nsect == 1) && (lbal == 1))
2174 break;
2175 if (time_after(jiffies, timeout)) {
2176 dev1 = 0;
2177 break;
2178 }
2179 msleep(50); /* give drive a breather */
2180 }
2181 if (dev1)
2182 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2183
2184 /* is all this really necessary? */
2185 ap->ops->dev_select(ap, 0);
2186 if (dev1)
2187 ap->ops->dev_select(ap, 1);
2188 if (dev0)
2189 ap->ops->dev_select(ap, 0);
2190}
2191
1da177e4
LT		 2192static unsigned int ata_bus_softreset(struct ata_port *ap,
2193 unsigned int devmask)
2194{
2195 struct ata_ioports *ioaddr = &ap->ioaddr;
2196
2197 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2198
2199 /* software reset. causes dev0 to be selected */
2200 if (ap->flags & ATA_FLAG_MMIO) {
2201 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2202 udelay(20); /* FIXME: flush */
2203 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2204 udelay(20); /* FIXME: flush */
2205 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2206 } else {
2207 outb(ap->ctl, ioaddr->ctl_addr);
2208 udelay(10);
2209 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2210 udelay(10);
2211 outb(ap->ctl, ioaddr->ctl_addr);
2212 }
2213
2214 /* spec mandates ">= 2ms" before checking status.
2215 * We wait 150ms, because that was the magic delay used for
2216 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2217 * between when the ATA command register is written, and then
2218 * status is checked. Because waiting for "a while" before
2219 * checking status is fine, post SRST, we perform this magic
2220 * delay here as well.
09c7ad79
AC		 2221 *
2222 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2223 */
2224 msleep(150);
2225
2e9edbf8 2226 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2227 * the bus shows 0xFF because the odd clown forgets the D7
2228 * pulldown resistor.
2229 */
09c7ad79 2230 if (ata_check_status(ap) == 0xFF)
298a41ca 2231 return AC_ERR_OTHER;
09c7ad79 2232
1da177e4
LT		 2233 ata_bus_post_reset(ap, devmask);
2234
2235 return 0;
2236}
2237
2238/**
2239 * ata_bus_reset - reset host port and associated ATA channel
2240 * @ap: port to reset
2241 *
2242 * This is typically the first time we actually start issuing
2243 * commands to the ATA channel. We wait for BSY to clear, then
2244 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2245 * result. Determine what devices, if any, are on the channel
2246 * by looking at the device 0/1 error register. Look at the signature
2247 * stored in each device's taskfile registers, to determine if
2248 * the device is ATA or ATAPI.
2249 *
2250 * LOCKING:
0cba632b
JG		 2251 * PCI/etc. bus probe sem.
2252 * Obtains host_set lock.
1da177e4
LT		 2253 *
2254 * SIDE EFFECTS:
198e0fed 2255 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2256 */
2257
2258void ata_bus_reset(struct ata_port *ap)
2259{
2260 struct ata_ioports *ioaddr = &ap->ioaddr;
2261 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2262 u8 err;
aec5c3c1 2263 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2264
2265 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2266
2267 /* determine if device 0/1 are present */
2268 if (ap->flags & ATA_FLAG_SATA_RESET)
2269 dev0 = 1;
2270 else {
2271 dev0 = ata_devchk(ap, 0);
2272 if (slave_possible)
2273 dev1 = ata_devchk(ap, 1);
2274 }
2275
2276 if (dev0)
2277 devmask |= (1 << 0);
2278 if (dev1)
2279 devmask |= (1 << 1);
2280
2281 /* select device 0 again */
2282 ap->ops->dev_select(ap, 0);
2283
2284 /* issue bus reset */
2285 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2286 if (ata_bus_softreset(ap, devmask))
2287 goto err_out;
1da177e4
LT		 2288
2289 /*
2290 * determine by signature whether we have ATA or ATAPI devices
2291 */
b4dc7623 2292 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2293 if ((slave_possible) && (err != 0x81))
b4dc7623 2294 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2295
2296 /* re-enable interrupts */
2297 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2298 ata_irq_on(ap);
2299
2300 /* is double-select really necessary? */
2301 if (ap->device[1].class != ATA_DEV_NONE)
2302 ap->ops->dev_select(ap, 1);
2303 if (ap->device[0].class != ATA_DEV_NONE)
2304 ap->ops->dev_select(ap, 0);
2305
2306 /* if no devices were detected, disable this port */
2307 if ((ap->device[0].class == ATA_DEV_NONE) &&
2308 (ap->device[1].class == ATA_DEV_NONE))
2309 goto err_out;
2310
2311 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2312 /* set up device control for ATA_FLAG_SATA_RESET */
2313 if (ap->flags & ATA_FLAG_MMIO)
2314 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2315 else
2316 outb(ap->ctl, ioaddr->ctl_addr);
2317 }
2318
2319 DPRINTK("EXIT\n");
2320 return;
2321
2322err_out:
2323 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2324 ap->ops->port_disable(ap);
2325
2326 DPRINTK("EXIT\n");
2327}
2328
7a7921e8
TH		 2329static int sata_phy_resume(struct ata_port *ap)
2330{
2331 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2332 u32 scontrol, sstatus;
7a7921e8 2333
852ee16a
TH		 2334 scontrol = scr_read(ap, SCR_CONTROL);
2335 scontrol = (scontrol & 0x0f0) | 0x300;
2336 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2337
2338 /* Wait for phy to become ready, if necessary. */
2339 do {
2340 msleep(200);
2341 sstatus = scr_read(ap, SCR_STATUS);
2342 if ((sstatus & 0xf) != 1)
2343 return 0;
2344 } while (time_before(jiffies, timeout));
2345
2346 return -1;
2347}
2348
8a19ac89
TH		 2349/**
2350 * ata_std_probeinit - initialize probing
2351 * @ap: port to be probed
2352 *
2353 * @ap is about to be probed. Initialize it. This function is
2354 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2355 *
2356 * NOTE!!! Do not use this function as probeinit if a low level
2357 * driver implements only hardreset. Just pass NULL as probeinit
2358 * in that case. Using this function is probably okay but doing
2359 * so makes reset sequence different from the original
2360 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2361 */
17efc5f7 2362void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2363{
17efc5f7 2364 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2365 u32 spd;
2366
8a19ac89 2367 sata_phy_resume(ap);
1c3fae4d
TH		 2368
2369 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2370 if (spd)
2371 ap->sata_spd_limit &= (1 << spd) - 1;
2372
3a39746a
TH		 2373 if (sata_dev_present(ap))
2374 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2375 }
8a19ac89
TH		 2376}
2377
c2bd5804
TH		 2378/**
2379 * ata_std_softreset - reset host port via ATA SRST
2380 * @ap: port to reset
2381 * @verbose: fail verbosely
2382 * @classes: resulting classes of attached devices
2383 *
2384 * Reset host port using ATA SRST. This function is to be used
2385 * as standard callback for ata_drive_*_reset() functions.
2386 *
2387 * LOCKING:
2388 * Kernel thread context (may sleep)
2389 *
2390 * RETURNS:
2391 * 0 on success, -errno otherwise.
2392 */
2393int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2394{
2395 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2396 unsigned int devmask = 0, err_mask;
2397 u8 err;
2398
2399 DPRINTK("ENTER\n");
2400
3a39746a
TH		 2401 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2402 classes[0] = ATA_DEV_NONE;
2403 goto out;
2404 }
2405
c2bd5804
TH		 2406 /* determine if device 0/1 are present */
2407 if (ata_devchk(ap, 0))
2408 devmask |= (1 << 0);
2409 if (slave_possible && ata_devchk(ap, 1))
2410 devmask |= (1 << 1);
2411
c2bd5804
TH		 2412 /* select device 0 again */
2413 ap->ops->dev_select(ap, 0);
2414
2415 /* issue bus reset */
2416 DPRINTK("about to softreset, devmask=%x\n", devmask);
2417 err_mask = ata_bus_softreset(ap, devmask);
2418 if (err_mask) {
2419 if (verbose)
2420 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2421 ap->id, err_mask);
2422 else
2423 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2424 err_mask);
2425 return -EIO;
2426 }
2427
2428 /* determine by signature whether we have ATA or ATAPI devices */
2429 classes[0] = ata_dev_try_classify(ap, 0, &err);
2430 if (slave_possible && err != 0x81)
2431 classes[1] = ata_dev_try_classify(ap, 1, &err);
2432
3a39746a 2433 out:
c2bd5804
TH		 2434 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2435 return 0;
2436}
2437
2438/**
2439 * sata_std_hardreset - reset host port via SATA phy reset
2440 * @ap: port to reset
2441 * @verbose: fail verbosely
2442 * @class: resulting class of attached device
2443 *
2444 * SATA phy-reset host port using DET bits of SControl register.
2445 * This function is to be used as standard callback for
2446 * ata_drive_*_reset().
2447 *
2448 * LOCKING:
2449 * Kernel thread context (may sleep)
2450 *
2451 * RETURNS:
2452 * 0 on success, -errno otherwise.
2453 */
2454int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2455{
852ee16a
TH		 2456 u32 scontrol;
2457
c2bd5804
TH		 2458 DPRINTK("ENTER\n");
2459
1c3fae4d
TH		 2460 if (ata_set_sata_spd_needed(ap)) {
2461 /* SATA spec says nothing about how to reconfigure
2462 * spd. To be on the safe side, turn off phy during
2463 * reconfiguration. This works for at least ICH7 AHCI
2464 * and Sil3124.
2465 */
2466 scontrol = scr_read(ap, SCR_CONTROL);
2467 scontrol = (scontrol & 0x0f0) | 0x302;
2468 scr_write_flush(ap, SCR_CONTROL, scontrol);
2469
2470 ata_set_sata_spd(ap);
2471 }
2472
2473 /* issue phy wake/reset */
852ee16a
TH		 2474 scontrol = scr_read(ap, SCR_CONTROL);
2475 scontrol = (scontrol & 0x0f0) | 0x301;
2476 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2477
1c3fae4d 2478 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2479 * 10.4.2 says at least 1 ms.
2480 */
2481 msleep(1);
2482
1c3fae4d 2483 /* bring phy back */
7a7921e8 2484 sata_phy_resume(ap);
c2bd5804 2485
c2bd5804
TH		 2486 /* TODO: phy layer with polling, timeouts, etc. */
2487 if (!sata_dev_present(ap)) {
2488 *class = ATA_DEV_NONE;
2489 DPRINTK("EXIT, link offline\n");
2490 return 0;
2491 }
2492
2493 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2494 if (verbose)
2495 printk(KERN_ERR "ata%u: COMRESET failed "
2496 "(device not ready)\n", ap->id);
2497 else
2498 DPRINTK("EXIT, device not ready\n");
2499 return -EIO;
2500 }
2501
3a39746a
TH		 2502 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2503
c2bd5804
TH		 2504 *class = ata_dev_try_classify(ap, 0, NULL);
2505
2506 DPRINTK("EXIT, class=%u\n", *class);
2507 return 0;
2508}
2509
2510/**
2511 * ata_std_postreset - standard postreset callback
2512 * @ap: the target ata_port
2513 * @classes: classes of attached devices
2514 *
2515 * This function is invoked after a successful reset. Note that
2516 * the device might have been reset more than once using
2517 * different reset methods before postreset is invoked.
c2bd5804
TH		 2518 *
2519 * This function is to be used as standard callback for
2520 * ata_drive_*_reset().
2521 *
2522 * LOCKING:
2523 * Kernel thread context (may sleep)
2524 */
2525void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2526{
2527 DPRINTK("ENTER\n");
2528
56497bd5 2529 /* set cable type if it isn't already set */
c2bd5804
TH		 2530 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2531 ap->cbl = ATA_CBL_SATA;
2532
2533 /* print link status */
2534 if (ap->cbl == ATA_CBL_SATA)
2535 sata_print_link_status(ap);
2536
3a39746a
TH		 2537 /* re-enable interrupts */
2538 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2539 ata_irq_on(ap);
c2bd5804
TH		 2540
2541 /* is double-select really necessary? */
2542 if (classes[0] != ATA_DEV_NONE)
2543 ap->ops->dev_select(ap, 1);
2544 if (classes[1] != ATA_DEV_NONE)
2545 ap->ops->dev_select(ap, 0);
2546
3a39746a
TH		 2547 /* bail out if no device is present */
2548 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2549 DPRINTK("EXIT, no device\n");
2550 return;
2551 }
2552
2553 /* set up device control */
2554 if (ap->ioaddr.ctl_addr) {
2555 if (ap->flags & ATA_FLAG_MMIO)
2556 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2557 else
2558 outb(ap->ctl, ap->ioaddr.ctl_addr);
2559 }
c2bd5804
TH		 2560
2561 DPRINTK("EXIT\n");
2562}
2563
2564/**
2565 * ata_std_probe_reset - standard probe reset method
2566 * @ap: prot to perform probe-reset
2567 * @classes: resulting classes of attached devices
2568 *
2569 * The stock off-the-shelf ->probe_reset method.
2570 *
2571 * LOCKING:
2572 * Kernel thread context (may sleep)
2573 *
2574 * RETURNS:
2575 * 0 on success, -errno otherwise.
2576 */
2577int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2578{
2579 ata_reset_fn_t hardreset;
2580
2581 hardreset = NULL;
b911fc3a 2582 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2583 hardreset = sata_std_hardreset;
2584
8a19ac89 2585 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2586 ata_std_softreset, hardreset,
c2bd5804
TH		 2587 ata_std_postreset, classes);
2588}
2589
9974e7cc
TH		 2590static int ata_do_reset(struct ata_port *ap,
2591 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2592 int verbose, unsigned int *classes)
a62c0fc5
TH		 2593{
2594 int i, rc;
2595
2596 for (i = 0; i < ATA_MAX_DEVICES; i++)
2597 classes[i] = ATA_DEV_UNKNOWN;
2598
9974e7cc 2599 rc = reset(ap, verbose, classes);
a62c0fc5
TH		 2600 if (rc)
2601 return rc;
2602
2603 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2604 * is complete and convert all ATA_DEV_UNKNOWN to
2605 * ATA_DEV_NONE.
2606 */
2607 for (i = 0; i < ATA_MAX_DEVICES; i++)
2608 if (classes[i] != ATA_DEV_UNKNOWN)
2609 break;
2610
2611 if (i < ATA_MAX_DEVICES)
2612 for (i = 0; i < ATA_MAX_DEVICES; i++)
2613 if (classes[i] == ATA_DEV_UNKNOWN)
2614 classes[i] = ATA_DEV_NONE;
2615
2616 if (postreset)
2617 postreset(ap, classes);
2618
9974e7cc 2619 return 0;
a62c0fc5
TH		 2620}
2621
2622/**
2623 * ata_drive_probe_reset - Perform probe reset with given methods
2624 * @ap: port to reset
7944ea95 2625 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2626 * @softreset: softreset method (can be NULL)
2627 * @hardreset: hardreset method (can be NULL)
2628 * @postreset: postreset method (can be NULL)
2629 * @classes: resulting classes of attached devices
2630 *
2631 * Reset the specified port and classify attached devices using
2632 * given methods. This function prefers softreset but tries all
2633 * possible reset sequences to reset and classify devices. This
2634 * function is intended to be used for constructing ->probe_reset
2635 * callback by low level drivers.
2636 *
2637 * Reset methods should follow the following rules.
2638 *
2639 * - Return 0 on sucess, -errno on failure.
2640 * - If classification is supported, fill classes[] with
2641 * recognized class codes.
2642 * - If classification is not supported, leave classes[] alone.
2643 * - If verbose is non-zero, print error message on failure;
2644 * otherwise, shut up.
2645 *
2646 * LOCKING:
2647 * Kernel thread context (may sleep)
2648 *
2649 * RETURNS:
2650 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2651 * if classification fails, and any error code from reset
2652 * methods.
2653 */
7944ea95 2654int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2655 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2656 ata_postreset_fn_t postreset, unsigned int *classes)
2657{
2658 int rc = -EINVAL;
2659
7944ea95
TH		 2660 if (probeinit)
2661 probeinit(ap);
2662
90dac02c 2663 if (softreset && !ata_set_sata_spd_needed(ap)) {
9974e7cc
TH		 2664 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2665 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2666 goto done;
edbabd86
TH		 2667 printk(KERN_INFO "ata%u: softreset failed, will try "
2668 "hardreset in 5 secs\n", ap->id);
2669 ssleep(5);
a62c0fc5
TH		 2670 }
2671
2672 if (!hardreset)
9974e7cc 2673 goto done;
a62c0fc5 2674
90dac02c
TH		 2675 while (1) {
2676 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2677 if (rc == 0) {
2678 if (classes[0] != ATA_DEV_UNKNOWN)
2679 goto done;
2680 break;
2681 }
2682
2683 if (ata_down_sata_spd_limit(ap))
2684 goto done;
edbabd86
TH		 2685
2686 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2687 "in 5 secs\n", ap->id);
2688 ssleep(5);
90dac02c 2689 }
a62c0fc5 2690
edbabd86
TH		 2691 if (softreset) {
2692 printk(KERN_INFO "ata%u: hardreset succeeded without "
2693 "classification, will retry softreset in 5 secs\n",
2694 ap->id);
2695 ssleep(5);
2696
9974e7cc 2697 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
edbabd86 2698 }
a62c0fc5 2699
9974e7cc
TH		 2700 done:
2701 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2702 rc = -ENODEV;
a62c0fc5
TH		 2703 return rc;
2704}
2705
623a3128
TH		 2706/**
2707 * ata_dev_same_device - Determine whether new ID matches configured device
2708 * @ap: port on which the device to compare against resides
2709 * @dev: device to compare against
2710 * @new_class: class of the new device
2711 * @new_id: IDENTIFY page of the new device
2712 *
2713 * Compare @new_class and @new_id against @dev and determine
2714 * whether @dev is the device indicated by @new_class and
2715 * @new_id.
2716 *
2717 * LOCKING:
2718 * None.
2719 *
2720 * RETURNS:
2721 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2722 */
2723static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2724 unsigned int new_class, const u16 *new_id)
2725{
2726 const u16 *old_id = dev->id;
2727 unsigned char model[2][41], serial[2][21];
2728 u64 new_n_sectors;
2729
2730 if (dev->class != new_class) {
2731 printk(KERN_INFO
2732 "ata%u: dev %u class mismatch %d != %d\n",
2733 ap->id, dev->devno, dev->class, new_class);
2734 return 0;
2735 }
2736
2737 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2738 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2739 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2740 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2741 new_n_sectors = ata_id_n_sectors(new_id);
2742
2743 if (strcmp(model[0], model[1])) {
2744 printk(KERN_INFO
2745 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2746 ap->id, dev->devno, model[0], model[1]);
2747 return 0;
2748 }
2749
2750 if (strcmp(serial[0], serial[1])) {
2751 printk(KERN_INFO
2752 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2753 ap->id, dev->devno, serial[0], serial[1]);
2754 return 0;
2755 }
2756
2757 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2758 printk(KERN_INFO
2759 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2760 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2761 (unsigned long long)new_n_sectors);
2762 return 0;
2763 }
2764
2765 return 1;
2766}
2767
2768/**
2769 * ata_dev_revalidate - Revalidate ATA device
2770 * @ap: port on which the device to revalidate resides
2771 * @dev: device to revalidate
2772 * @post_reset: is this revalidation after reset?
2773 *
2774 * Re-read IDENTIFY page and make sure @dev is still attached to
2775 * the port.
2776 *
2777 * LOCKING:
2778 * Kernel thread context (may sleep)
2779 *
2780 * RETURNS:
2781 * 0 on success, negative errno otherwise
2782 */
2783int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2784 int post_reset)
2785{
5eb45c02
TH		 2786 unsigned int class = dev->class;
2787 u16 *id = NULL;
623a3128
TH		 2788 int rc;
2789
5eb45c02
TH		 2790 if (!ata_dev_enabled(dev)) {
2791 rc = -ENODEV;
2792 goto fail;
2793 }
623a3128
TH		 2794
2795 /* allocate & read ID data */
2796 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2797 if (rc)
2798 goto fail;
2799
2800 /* is the device still there? */
2801 if (!ata_dev_same_device(ap, dev, class, id)) {
2802 rc = -ENODEV;
2803 goto fail;
2804 }
2805
2806 kfree(dev->id);
2807 dev->id = id;
2808
2809 /* configure device according to the new ID */
5eb45c02
TH		 2810 rc = ata_dev_configure(ap, dev, 0);
2811 if (rc == 0)
2812 return 0;
623a3128
TH		 2813
2814 fail:
2815 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2816 ap->id, dev->devno, rc);
2817 kfree(id);
2818 return rc;
2819}
2820
98ac62de 2821static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2822 "WDC AC11000H", NULL,
2823 "WDC AC22100H", NULL,
2824 "WDC AC32500H", NULL,
2825 "WDC AC33100H", NULL,
2826 "WDC AC31600H", NULL,
2827 "WDC AC32100H", "24.09P07",
2828 "WDC AC23200L", "21.10N21",
2829 "Compaq CRD-8241B", NULL,
2830 "CRD-8400B", NULL,
2831 "CRD-8480B", NULL,
2832 "CRD-8482B", NULL,
2833 "CRD-84", NULL,
2834 "SanDisk SDP3B", NULL,
2835 "SanDisk SDP3B-64", NULL,
2836 "SANYO CD-ROM CRD", NULL,
2837 "HITACHI CDR-8", NULL,
2e9edbf8 2838 "HITACHI CDR-8335", NULL,
f4b15fef 2839 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2840 "Toshiba CD-ROM XM-6202B", NULL,
2841 "TOSHIBA CD-ROM XM-1702BC", NULL,
2842 "CD-532E-A", NULL,
2843 "E-IDE CD-ROM CR-840", NULL,
2844 "CD-ROM Drive/F5A", NULL,
2845 "WPI CDD-820", NULL,
f4b15fef 2846 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2847 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2848 "SanDisk SDP3B-64", NULL,
2849 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2850 "_NEC DV5800A", NULL,
2851 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2852};
2e9edbf8 2853
f4b15fef
AC		 2854static int ata_strim(char *s, size_t len)
2855{
2856 len = strnlen(s, len);
2857
2858 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2859 while ((len > 0) && (s[len - 1] == ' ')) {
2860 len--;
2861 s[len] = 0;
2862 }
2863 return len;
2864}
1da177e4 2865
057ace5e 2866static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2867{
f4b15fef
AC		 2868 unsigned char model_num[40];
2869 unsigned char model_rev[16];
2870 unsigned int nlen, rlen;
1da177e4
LT		 2871 int i;
2872
f4b15fef
AC		 2873 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2874 sizeof(model_num));
2875 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2876 sizeof(model_rev));
2877 nlen = ata_strim(model_num, sizeof(model_num));
2878 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2879
f4b15fef
AC		 2880 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2881 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2882 if (ata_dma_blacklist[i+1] == NULL)
2883 return 1;
2884 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2885 return 1;
2886 }
2887 }
1da177e4
LT		 2888 return 0;
2889}
2890
a6d5a51c
TH		 2891/**
2892 * ata_dev_xfermask - Compute supported xfermask of the given device
2893 * @ap: Port on which the device to compute xfermask for resides
2894 * @dev: Device to compute xfermask for
2895 *
acf356b1
TH		 2896 * Compute supported xfermask of @dev and store it in
2897 * dev->*_mask. This function is responsible for applying all
2898 * known limits including host controller limits, device
2899 * blacklist, etc...
a6d5a51c 2900 *
600511e8
TH		 2901 * FIXME: The current implementation limits all transfer modes to
2902 * the fastest of the lowested device on the port. This is not
05c8e0ac 2903 * required on most controllers.
600511e8 2904 *
a6d5a51c
TH		 2905 * LOCKING:
2906 * None.
a6d5a51c 2907 */
acf356b1 2908static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2909{
5444a6f4 2910 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2911 unsigned long xfer_mask;
2912 int i;
1da177e4 2913
565083e1
TH		 2914 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2915 ap->mwdma_mask, ap->udma_mask);
2916
2917 /* Apply cable rule here. Don't apply it early because when
2918 * we handle hot plug the cable type can itself change.
2919 */
2920 if (ap->cbl == ATA_CBL_PATA40)
2921 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2922
5444a6f4 2923 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2924 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2925 struct ata_device *d = &ap->device[i];
565083e1
TH		 2926
2927 if (ata_dev_absent(d))
2928 continue;
2929
2930 if (ata_dev_disabled(d)) {
2931 /* to avoid violating device selection timing */
2932 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2933 UINT_MAX, UINT_MAX);
a6d5a51c 2934 continue;
565083e1
TH		 2935 }
2936
2937 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2938 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2939 xfer_mask &= ata_id_xfermask(d->id);
2940 if (ata_dma_blacklisted(d))
2941 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2942 }
2943
a6d5a51c
TH		 2944 if (ata_dma_blacklisted(dev))
2945 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2946 "disabling DMA\n", ap->id, dev->devno);
2947
5444a6f4
AC		 2948 if (hs->flags & ATA_HOST_SIMPLEX) {
2949 if (hs->simplex_claimed)
2950 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2951 }
565083e1 2952
5444a6f4
AC		 2953 if (ap->ops->mode_filter)
2954 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2955
565083e1
TH		 2956 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2957 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2958}
2959
1da177e4
LT		 2960/**
2961 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2962 * @ap: Port associated with device @dev
2963 * @dev: Device to which command will be sent
2964 *
780a87f7
JG		 2965 * Issue SET FEATURES - XFER MODE command to device @dev
2966 * on port @ap.
2967 *
1da177e4 2968 * LOCKING:
0cba632b 2969 * PCI/etc. bus probe sem.
83206a29
TH		 2970 *
2971 * RETURNS:
2972 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2973 */
2974
83206a29
TH		 2975static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2976 struct ata_device *dev)
1da177e4 2977{
a0123703 2978 struct ata_taskfile tf;
83206a29 2979 unsigned int err_mask;
1da177e4
LT		 2980
2981 /* set up set-features taskfile */
2982 DPRINTK("set features - xfer mode\n");
2983
a0123703
TH		 2984 ata_tf_init(ap, &tf, dev->devno);
2985 tf.command = ATA_CMD_SET_FEATURES;
2986 tf.feature = SETFEATURES_XFER;
2987 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2988 tf.protocol = ATA_PROT_NODATA;
2989 tf.nsect = dev->xfer_mode;
1da177e4 2990
83206a29 2991 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2992
83206a29
TH		 2993 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2994 return err_mask;
1da177e4
LT		 2995}
2996
8bf62ece
AL		 2997/**
2998 * ata_dev_init_params - Issue INIT DEV PARAMS command
2999 * @ap: Port associated with device @dev
3000 * @dev: Device to which command will be sent
3001 *
3002 * LOCKING:
6aff8f1f
TH		 3003 * Kernel thread context (may sleep)
3004 *
3005 * RETURNS:
3006 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 3007 */
3008
6aff8f1f 3009static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3010 struct ata_device *dev,
3011 u16 heads,
3012 u16 sectors)
8bf62ece 3013{
a0123703 3014 struct ata_taskfile tf;
6aff8f1f 3015 unsigned int err_mask;
8bf62ece
AL		 3016
3017 /* Number of sectors per track 1-255. Number of heads 1-16 */
3018 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3019 return AC_ERR_INVALID;
8bf62ece
AL		 3020
3021 /* set up init dev params taskfile */
3022 DPRINTK("init dev params \n");
3023
a0123703
TH		 3024 ata_tf_init(ap, &tf, dev->devno);
3025 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3026 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3027 tf.protocol = ATA_PROT_NODATA;
3028 tf.nsect = sectors;
3029 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3030
6aff8f1f 3031 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 3032
6aff8f1f
TH		 3033 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3034 return err_mask;
8bf62ece
AL		 3035}
3036
1da177e4 3037/**
0cba632b
JG		 3038 * ata_sg_clean - Unmap DMA memory associated with command
3039 * @qc: Command containing DMA memory to be released
3040 *
3041 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3042 *
3043 * LOCKING:
0cba632b 3044 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3045 */
3046
3047static void ata_sg_clean(struct ata_queued_cmd *qc)
3048{
3049 struct ata_port *ap = qc->ap;
cedc9a47 3050 struct scatterlist *sg = qc->__sg;
1da177e4 3051 int dir = qc->dma_dir;
cedc9a47 3052 void *pad_buf = NULL;
1da177e4 3053
a4631474
TH		 3054 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3055 WARN_ON(sg == NULL);
1da177e4
LT		 3056
3057 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3058 WARN_ON(qc->n_elem > 1);
1da177e4 3059
2c13b7ce 3060 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3061
cedc9a47
JG		 3062 /* if we padded the buffer out to 32-bit bound, and data
3063 * xfer direction is from-device, we must copy from the
3064 * pad buffer back into the supplied buffer
3065 */
3066 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3067 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3068
3069 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3070 if (qc->n_elem)
2f1f610b 3071 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3072 /* restore last sg */
3073 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3074 if (pad_buf) {
3075 struct scatterlist *psg = &qc->pad_sgent;
3076 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3077 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3078 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3079 }
3080 } else {
2e242fa9 3081 if (qc->n_elem)
2f1f610b 3082 dma_unmap_single(ap->dev,
e1410f2d
JG		 3083 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3084 dir);
cedc9a47
JG		 3085 /* restore sg */
3086 sg->length += qc->pad_len;
3087 if (pad_buf)
3088 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3089 pad_buf, qc->pad_len);
3090 }
1da177e4
LT		 3091
3092 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3093 qc->__sg = NULL;
1da177e4
LT		 3094}
3095
3096/**
3097 * ata_fill_sg - Fill PCI IDE PRD table
3098 * @qc: Metadata associated with taskfile to be transferred
3099 *
780a87f7
JG		 3100 * Fill PCI IDE PRD (scatter-gather) table with segments
3101 * associated with the current disk command.
3102 *
1da177e4 3103 * LOCKING:
780a87f7 3104 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3105 *
3106 */
3107static void ata_fill_sg(struct ata_queued_cmd *qc)
3108{
1da177e4 3109 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3110 struct scatterlist *sg;
3111 unsigned int idx;
1da177e4 3112
a4631474 3113 WARN_ON(qc->__sg == NULL);
f131883e 3114 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3115
3116 idx = 0;
cedc9a47 3117 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3118 u32 addr, offset;
3119 u32 sg_len, len;
3120
3121 /* determine if physical DMA addr spans 64K boundary.
3122 * Note h/w doesn't support 64-bit, so we unconditionally
3123 * truncate dma_addr_t to u32.
3124 */
3125 addr = (u32) sg_dma_address(sg);
3126 sg_len = sg_dma_len(sg);
3127
3128 while (sg_len) {
3129 offset = addr & 0xffff;
3130 len = sg_len;
3131 if ((offset + sg_len) > 0x10000)
3132 len = 0x10000 - offset;
3133
3134 ap->prd[idx].addr = cpu_to_le32(addr);
3135 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3136 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3137
3138 idx++;
3139 sg_len -= len;
3140 addr += len;
3141 }
3142 }
3143
3144 if (idx)
3145 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3146}
3147/**
3148 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3149 * @qc: Metadata associated with taskfile to check
3150 *
780a87f7
JG		 3151 * Allow low-level driver to filter ATA PACKET commands, returning
3152 * a status indicating whether or not it is OK to use DMA for the
3153 * supplied PACKET command.
3154 *
1da177e4 3155 * LOCKING:
0cba632b
JG		 3156 * spin_lock_irqsave(host_set lock)
3157 *
1da177e4
LT		 3158 * RETURNS: 0 when ATAPI DMA can be used
3159 * nonzero otherwise
3160 */
3161int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3162{
3163 struct ata_port *ap = qc->ap;
3164 int rc = 0; /* Assume ATAPI DMA is OK by default */
3165
3166 if (ap->ops->check_atapi_dma)
3167 rc = ap->ops->check_atapi_dma(qc);
3168
3169 return rc;
3170}
3171/**
3172 * ata_qc_prep - Prepare taskfile for submission
3173 * @qc: Metadata associated with taskfile to be prepared
3174 *
780a87f7
JG		 3175 * Prepare ATA taskfile for submission.
3176 *
1da177e4
LT		 3177 * LOCKING:
3178 * spin_lock_irqsave(host_set lock)
3179 */
3180void ata_qc_prep(struct ata_queued_cmd *qc)
3181{
3182 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3183 return;
3184
3185 ata_fill_sg(qc);
3186}
3187
e46834cd
BK		 3188void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3189
0cba632b
JG		 3190/**
3191 * ata_sg_init_one - Associate command with memory buffer
3192 * @qc: Command to be associated
3193 * @buf: Memory buffer
3194 * @buflen: Length of memory buffer, in bytes.
3195 *
3196 * Initialize the data-related elements of queued_cmd @qc
3197 * to point to a single memory buffer, @buf of byte length @buflen.
3198 *
3199 * LOCKING:
3200 * spin_lock_irqsave(host_set lock)
3201 */
3202
1da177e4
LT		 3203void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3204{
3205 struct scatterlist *sg;
3206
3207 qc->flags |= ATA_QCFLAG_SINGLE;
3208
3209 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3210 qc->__sg = &qc->sgent;
1da177e4 3211 qc->n_elem = 1;
cedc9a47 3212 qc->orig_n_elem = 1;
1da177e4
LT		 3213 qc->buf_virt = buf;
3214
cedc9a47 3215 sg = qc->__sg;
f0612bbc 3216 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3217}
3218
0cba632b
JG		 3219/**
3220 * ata_sg_init - Associate command with scatter-gather table.
3221 * @qc: Command to be associated
3222 * @sg: Scatter-gather table.
3223 * @n_elem: Number of elements in s/g table.
3224 *
3225 * Initialize the data-related elements of queued_cmd @qc
3226 * to point to a scatter-gather table @sg, containing @n_elem
3227 * elements.
3228 *
3229 * LOCKING:
3230 * spin_lock_irqsave(host_set lock)
3231 */
3232
1da177e4
LT		 3233void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3234 unsigned int n_elem)
3235{
3236 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3237 qc->__sg = sg;
1da177e4 3238 qc->n_elem = n_elem;
cedc9a47 3239 qc->orig_n_elem = n_elem;
1da177e4
LT		 3240}
3241
3242/**
0cba632b
JG		 3243 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3244 * @qc: Command with memory buffer to be mapped.
3245 *
3246 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3247 *
3248 * LOCKING:
3249 * spin_lock_irqsave(host_set lock)
3250 *
3251 * RETURNS:
0cba632b 3252 * Zero on success, negative on error.
1da177e4
LT		 3253 */
3254
3255static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3256{
3257 struct ata_port *ap = qc->ap;
3258 int dir = qc->dma_dir;
cedc9a47 3259 struct scatterlist *sg = qc->__sg;
1da177e4 3260 dma_addr_t dma_address;
2e242fa9 3261 int trim_sg = 0;
1da177e4 3262
cedc9a47
JG		 3263 /* we must lengthen transfers to end on a 32-bit boundary */
3264 qc->pad_len = sg->length & 3;
3265 if (qc->pad_len) {
3266 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3267 struct scatterlist *psg = &qc->pad_sgent;
3268
a4631474 3269 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3270
3271 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3272
3273 if (qc->tf.flags & ATA_TFLAG_WRITE)
3274 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3275 qc->pad_len);
3276
3277 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3278 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3279 /* trim sg */
3280 sg->length -= qc->pad_len;
2e242fa9
TH		 3281 if (sg->length == 0)
3282 trim_sg = 1;
cedc9a47
JG		 3283
3284 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3285 sg->length, qc->pad_len);
3286 }
3287
2e242fa9
TH		 3288 if (trim_sg) {
3289 qc->n_elem--;
e1410f2d
JG		 3290 goto skip_map;
3291 }
3292
2f1f610b 3293 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3294 sg->length, dir);
537a95d9
TH		 3295 if (dma_mapping_error(dma_address)) {
3296 /* restore sg */
3297 sg->length += qc->pad_len;
1da177e4 3298 return -1;
537a95d9 3299 }
1da177e4
LT		 3300
3301 sg_dma_address(sg) = dma_address;
32529e01 3302 sg_dma_len(sg) = sg->length;
1da177e4 3303
2e242fa9 3304skip_map:
1da177e4
LT		 3305 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3306 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3307
3308 return 0;
3309}
3310
3311/**
0cba632b
JG		 3312 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3313 * @qc: Command with scatter-gather table to be mapped.
3314 *
3315 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3316 *
3317 * LOCKING:
3318 * spin_lock_irqsave(host_set lock)
3319 *
3320 * RETURNS:
0cba632b 3321 * Zero on success, negative on error.
1da177e4
LT		 3322 *
3323 */
3324
3325static int ata_sg_setup(struct ata_queued_cmd *qc)
3326{
3327 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3328 struct scatterlist *sg = qc->__sg;
3329 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3330 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3331
3332 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3333 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3334
cedc9a47
JG		 3335 /* we must lengthen transfers to end on a 32-bit boundary */
3336 qc->pad_len = lsg->length & 3;
3337 if (qc->pad_len) {
3338 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3339 struct scatterlist *psg = &qc->pad_sgent;
3340 unsigned int offset;
3341
a4631474 3342 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3343
3344 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3345
3346 /*
3347 * psg->page/offset are used to copy to-be-written
3348 * data in this function or read data in ata_sg_clean.
3349 */
3350 offset = lsg->offset + lsg->length - qc->pad_len;
3351 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3352 psg->offset = offset_in_page(offset);
3353
3354 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3355 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3356 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3357 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3358 }
3359
3360 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3361 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3362 /* trim last sg */
3363 lsg->length -= qc->pad_len;
e1410f2d
JG		 3364 if (lsg->length == 0)
3365 trim_sg = 1;
cedc9a47
JG		 3366
3367 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3368 qc->n_elem - 1, lsg->length, qc->pad_len);
3369 }
3370
e1410f2d
JG		 3371 pre_n_elem = qc->n_elem;
3372 if (trim_sg && pre_n_elem)
3373 pre_n_elem--;
3374
3375 if (!pre_n_elem) {
3376 n_elem = 0;
3377 goto skip_map;
3378 }
3379
1da177e4 3380 dir = qc->dma_dir;
2f1f610b 3381 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3382 if (n_elem < 1) {
3383 /* restore last sg */
3384 lsg->length += qc->pad_len;
1da177e4 3385 return -1;
537a95d9 3386 }
1da177e4
LT		 3387
3388 DPRINTK("%d sg elements mapped\n", n_elem);
3389
e1410f2d 3390skip_map:
1da177e4
LT		 3391 qc->n_elem = n_elem;
3392
3393 return 0;
3394}
3395
40e8c82c
TH		 3396/**
3397 * ata_poll_qc_complete - turn irq back on and finish qc
3398 * @qc: Command to complete
8e8b77dd 3399 * @err_mask: ATA status register content
40e8c82c
TH		 3400 *
3401 * LOCKING:
3402 * None. (grabs host lock)
3403 */
3404
a22e2eb0 3405void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3406{
3407 struct ata_port *ap = qc->ap;
b8f6153e 3408 unsigned long flags;
40e8c82c 3409
b8f6153e 3410 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3411 ap->flags &= ~ATA_FLAG_NOINTR;
3412 ata_irq_on(ap);
a22e2eb0 3413 ata_qc_complete(qc);
b8f6153e 3414 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3415}
3416
1da177e4 3417/**
c893a3ae 3418 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3419 * @ap: the target ata_port
1da177e4
LT		 3420 *
3421 * LOCKING:
0cba632b 3422 * None. (executing in kernel thread context)
1da177e4
LT		 3423 *
3424 * RETURNS:
6f0ef4fa 3425 * timeout value to use
1da177e4
LT		 3426 */
3427
3428static unsigned long ata_pio_poll(struct ata_port *ap)
3429{
c14b8331 3430 struct ata_queued_cmd *qc;
1da177e4 3431 u8 status;
14be71f4
AL		 3432 unsigned int poll_state = HSM_ST_UNKNOWN;
3433 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3434
c14b8331 3435 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3436 WARN_ON(qc == NULL);
c14b8331 3437
14be71f4
AL		 3438 switch (ap->hsm_task_state) {
3439 case HSM_ST:
3440 case HSM_ST_POLL:
3441 poll_state = HSM_ST_POLL;
3442 reg_state = HSM_ST;
1da177e4 3443 break;
14be71f4
AL		 3444 case HSM_ST_LAST:
3445 case HSM_ST_LAST_POLL:
3446 poll_state = HSM_ST_LAST_POLL;
3447 reg_state = HSM_ST_LAST;
1da177e4
LT		 3448 break;
3449 default:
3450 BUG();
3451 break;
3452 }
3453
3454 status = ata_chk_status(ap);
3455 if (status & ATA_BUSY) {
3456 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3457 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3458 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3459 return 0;
3460 }
14be71f4 3461 ap->hsm_task_state = poll_state;
1da177e4
LT		 3462 return ATA_SHORT_PAUSE;
3463 }
3464
14be71f4 3465 ap->hsm_task_state = reg_state;
1da177e4
LT		 3466 return 0;
3467}
3468
3469/**
6f0ef4fa
RD		 3470 * ata_pio_complete - check if drive is busy or idle
3471 * @ap: the target ata_port
1da177e4
LT		 3472 *
3473 * LOCKING:
0cba632b 3474 * None. (executing in kernel thread context)
7fb6ec28
JG		 3475 *
3476 * RETURNS:
3477 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3478 */
3479
7fb6ec28 3480static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3481{
3482 struct ata_queued_cmd *qc;
3483 u8 drv_stat;
3484
3485 /*
31433ea3
AC		 3486 * This is purely heuristic. This is a fast path. Sometimes when
3487 * we enter, BSY will be cleared in a chk-status or two. If not,
3488 * the drive is probably seeking or something. Snooze for a couple
3489 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3490 * HSM_ST_POLL state.
1da177e4 3491 */
fe79e683
AL		 3492 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3493 if (drv_stat & ATA_BUSY) {
1da177e4 3494 msleep(2);
fe79e683
AL		 3495 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3496 if (drv_stat & ATA_BUSY) {
14be71f4 3497 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3498 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3499 return 0;
1da177e4
LT		 3500 }
3501 }
3502
c14b8331 3503 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3504 WARN_ON(qc == NULL);
c14b8331 3505
1da177e4
LT		 3506 drv_stat = ata_wait_idle(ap);
3507 if (!ata_ok(drv_stat)) {
1c848984 3508 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3509 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3510 return 0;
1da177e4
LT		 3511 }
3512
14be71f4 3513 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3514
a4631474 3515 WARN_ON(qc->err_mask);
a22e2eb0 3516 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3517
3518 /* another command may start at this point */
3519
3520 return 1;
1da177e4
LT		 3521}
3522
0baab86b
EF		 3523
3524/**
c893a3ae 3525 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3526 * @buf: Buffer to swap
3527 * @buf_words: Number of 16-bit words in buffer.
3528 *
3529 * Swap halves of 16-bit words if needed to convert from
3530 * little-endian byte order to native cpu byte order, or
3531 * vice-versa.
3532 *
3533 * LOCKING:
6f0ef4fa 3534 * Inherited from caller.
0baab86b 3535 */
1da177e4
LT		 3536void swap_buf_le16(u16 *buf, unsigned int buf_words)
3537{
3538#ifdef __BIG_ENDIAN
3539 unsigned int i;
3540
3541 for (i = 0; i < buf_words; i++)
3542 buf[i] = le16_to_cpu(buf[i]);
3543#endif /* __BIG_ENDIAN */
3544}
3545
6ae4cfb5
AL		 3546/**
3547 * ata_mmio_data_xfer - Transfer data by MMIO
3548 * @ap: port to read/write
3549 * @buf: data buffer
3550 * @buflen: buffer length
344babaa 3551 * @write_data: read/write
6ae4cfb5
AL		 3552 *
3553 * Transfer data from/to the device data register by MMIO.
3554 *
3555 * LOCKING:
3556 * Inherited from caller.
6ae4cfb5
AL		 3557 */
3558
1da177e4
LT		 3559static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3560 unsigned int buflen, int write_data)
3561{
3562 unsigned int i;
3563 unsigned int words = buflen >> 1;
3564 u16 *buf16 = (u16 *) buf;
3565 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3566
6ae4cfb5 3567 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3568 if (write_data) {
3569 for (i = 0; i < words; i++)
3570 writew(le16_to_cpu(buf16[i]), mmio);
3571 } else {
3572 for (i = 0; i < words; i++)
3573 buf16[i] = cpu_to_le16(readw(mmio));
3574 }
6ae4cfb5
AL		 3575
3576 /* Transfer trailing 1 byte, if any. */
3577 if (unlikely(buflen & 0x01)) {
3578 u16 align_buf[1] = { 0 };
3579 unsigned char *trailing_buf = buf + buflen - 1;
3580
3581 if (write_data) {
3582 memcpy(align_buf, trailing_buf, 1);
3583 writew(le16_to_cpu(align_buf[0]), mmio);
3584 } else {
3585 align_buf[0] = cpu_to_le16(readw(mmio));
3586 memcpy(trailing_buf, align_buf, 1);
3587 }
3588 }
1da177e4
LT		 3589}
3590
6ae4cfb5
AL		 3591/**
3592 * ata_pio_data_xfer - Transfer data by PIO
3593 * @ap: port to read/write
3594 * @buf: data buffer
3595 * @buflen: buffer length
344babaa 3596 * @write_data: read/write
6ae4cfb5
AL		 3597 *
3598 * Transfer data from/to the device data register by PIO.
3599 *
3600 * LOCKING:
3601 * Inherited from caller.
6ae4cfb5
AL		 3602 */
3603
1da177e4
LT		 3604static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3605 unsigned int buflen, int write_data)
3606{
6ae4cfb5 3607 unsigned int words = buflen >> 1;
1da177e4 3608
6ae4cfb5 3609 /* Transfer multiple of 2 bytes */
1da177e4 3610 if (write_data)
6ae4cfb5 3611 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3612 else
6ae4cfb5
AL		 3613 insw(ap->ioaddr.data_addr, buf, words);
3614
3615 /* Transfer trailing 1 byte, if any. */
3616 if (unlikely(buflen & 0x01)) {
3617 u16 align_buf[1] = { 0 };
3618 unsigned char *trailing_buf = buf + buflen - 1;
3619
3620 if (write_data) {
3621 memcpy(align_buf, trailing_buf, 1);
3622 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3623 } else {
3624 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3625 memcpy(trailing_buf, align_buf, 1);
3626 }
3627 }
1da177e4
LT		 3628}
3629
6ae4cfb5
AL		 3630/**
3631 * ata_data_xfer - Transfer data from/to the data register.
3632 * @ap: port to read/write
3633 * @buf: data buffer
3634 * @buflen: buffer length
3635 * @do_write: read/write
3636 *
3637 * Transfer data from/to the device data register.
3638 *
3639 * LOCKING:
3640 * Inherited from caller.
6ae4cfb5
AL		 3641 */
3642
1da177e4
LT		 3643static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3644 unsigned int buflen, int do_write)
3645{
a1bd9e68
AC		 3646 /* Make the crap hardware pay the costs not the good stuff */
3647 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3648 unsigned long flags;
3649 local_irq_save(flags);
3650 if (ap->flags & ATA_FLAG_MMIO)
3651 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3652 else
3653 ata_pio_data_xfer(ap, buf, buflen, do_write);
3654 local_irq_restore(flags);
3655 } else {
3656 if (ap->flags & ATA_FLAG_MMIO)
3657 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3658 else
3659 ata_pio_data_xfer(ap, buf, buflen, do_write);
3660 }
1da177e4
LT		 3661}
3662
6ae4cfb5
AL		 3663/**
3664 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3665 * @qc: Command on going
3666 *
3667 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3668 *
3669 * LOCKING:
3670 * Inherited from caller.
3671 */
3672
1da177e4
LT		 3673static void ata_pio_sector(struct ata_queued_cmd *qc)
3674{
3675 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3676 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3677 struct ata_port *ap = qc->ap;
3678 struct page *page;
3679 unsigned int offset;
3680 unsigned char *buf;
3681
3682 if (qc->cursect == (qc->nsect - 1))
14be71f4 3683 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3684
3685 page = sg[qc->cursg].page;
3686 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3687
3688 /* get the current page and offset */
3689 page = nth_page(page, (offset >> PAGE_SHIFT));
3690 offset %= PAGE_SIZE;
3691
3692 buf = kmap(page) + offset;
3693
3694 qc->cursect++;
3695 qc->cursg_ofs++;
3696
32529e01 3697 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3698 qc->cursg++;
3699 qc->cursg_ofs = 0;
3700 }
3701
3702 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3703
3704 /* do the actual data transfer */
3705 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3706 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3707
3708 kunmap(page);
3709}
3710
6ae4cfb5
AL		 3711/**
3712 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3713 * @qc: Command on going
3714 * @bytes: number of bytes
3715 *
3716 * Transfer Transfer data from/to the ATAPI device.
3717 *
3718 * LOCKING:
3719 * Inherited from caller.
3720 *
3721 */
3722
1da177e4
LT		 3723static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3724{
3725 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3726 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3727 struct ata_port *ap = qc->ap;
3728 struct page *page;
3729 unsigned char *buf;
3730 unsigned int offset, count;
3731
563a6e1f 3732 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3733 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3734
3735next_sg:
563a6e1f 3736 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3737 /*
563a6e1f
AL		 3738 * The end of qc->sg is reached and the device expects
3739 * more data to transfer. In order not to overrun qc->sg
3740 * and fulfill length specified in the byte count register,
3741 * - for read case, discard trailing data from the device
3742 * - for write case, padding zero data to the device
3743 */
3744 u16 pad_buf[1] = { 0 };
3745 unsigned int words = bytes >> 1;
3746 unsigned int i;
3747
3748 if (words) /* warning if bytes > 1 */
7fb6ec28 3749 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3750 ap->id, bytes);
3751
3752 for (i = 0; i < words; i++)
3753 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3754
14be71f4 3755 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3756 return;
3757 }
3758
cedc9a47 3759 sg = &qc->__sg[qc->cursg];
1da177e4 3760
1da177e4
LT		 3761 page = sg->page;
3762 offset = sg->offset + qc->cursg_ofs;
3763
3764 /* get the current page and offset */
3765 page = nth_page(page, (offset >> PAGE_SHIFT));
3766 offset %= PAGE_SIZE;
3767
6952df03 3768 /* don't overrun current sg */
32529e01 3769 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3770
3771 /* don't cross page boundaries */
3772 count = min(count, (unsigned int)PAGE_SIZE - offset);
3773
3774 buf = kmap(page) + offset;
3775
3776 bytes -= count;
3777 qc->curbytes += count;
3778 qc->cursg_ofs += count;
3779
32529e01 3780 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3781 qc->cursg++;
3782 qc->cursg_ofs = 0;
3783 }
3784
3785 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3786
3787 /* do the actual data transfer */
3788 ata_data_xfer(ap, buf, count, do_write);
3789
3790 kunmap(page);
3791
563a6e1f 3792 if (bytes)
1da177e4 3793 goto next_sg;
1da177e4
LT		 3794}
3795
6ae4cfb5
AL		 3796/**
3797 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3798 * @qc: Command on going
3799 *
3800 * Transfer Transfer data from/to the ATAPI device.
3801 *
3802 * LOCKING:
3803 * Inherited from caller.
6ae4cfb5
AL		 3804 */
3805
1da177e4
LT		 3806static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3807{
3808 struct ata_port *ap = qc->ap;
3809 struct ata_device *dev = qc->dev;
3810 unsigned int ireason, bc_lo, bc_hi, bytes;
3811 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3812
3813 ap->ops->tf_read(ap, &qc->tf);
3814 ireason = qc->tf.nsect;
3815 bc_lo = qc->tf.lbam;
3816 bc_hi = qc->tf.lbah;
3817 bytes = (bc_hi << 8) | bc_lo;
3818
3819 /* shall be cleared to zero, indicating xfer of data */
3820 if (ireason & (1 << 0))
3821 goto err_out;
3822
3823 /* make sure transfer direction matches expected */
3824 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3825 if (do_write != i_write)
3826 goto err_out;
3827
3828 __atapi_pio_bytes(qc, bytes);
3829
3830 return;
3831
3832err_out:
3833 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3834 ap->id, dev->devno);
11a56d24 3835 qc->err_mask |= AC_ERR_HSM;
14be71f4 3836 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3837}
3838
3839/**
6f0ef4fa
RD		 3840 * ata_pio_block - start PIO on a block
3841 * @ap: the target ata_port
1da177e4
LT		 3842 *
3843 * LOCKING:
0cba632b 3844 * None. (executing in kernel thread context)
1da177e4
LT		 3845 */
3846
3847static void ata_pio_block(struct ata_port *ap)
3848{
3849 struct ata_queued_cmd *qc;
3850 u8 status;
3851
3852 /*
6f0ef4fa 3853 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3854 * Sometimes when we enter, BSY will be cleared in
3855 * a chk-status or two. If not, the drive is probably seeking
3856 * or something. Snooze for a couple msecs, then
3857 * chk-status again. If still busy, fall back to
14be71f4 3858 * HSM_ST_POLL state.
1da177e4
LT		 3859 */
3860 status = ata_busy_wait(ap, ATA_BUSY, 5);
3861 if (status & ATA_BUSY) {
3862 msleep(2);
3863 status = ata_busy_wait(ap, ATA_BUSY, 10);
3864 if (status & ATA_BUSY) {
14be71f4 3865 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3866 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3867 return;
3868 }
3869 }
3870
3871 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3872 WARN_ON(qc == NULL);
1da177e4 3873
fe79e683
AL		 3874 /* check error */
3875 if (status & (ATA_ERR | ATA_DF)) {
3876 qc->err_mask |= AC_ERR_DEV;
3877 ap->hsm_task_state = HSM_ST_ERR;
3878 return;
3879 }
3880
3881 /* transfer data if any */
1da177e4 3882 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3883 /* DRQ=0 means no more data to transfer */
1da177e4 3884 if ((status & ATA_DRQ) == 0) {
14be71f4 3885 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3886 return;
3887 }
3888
3889 atapi_pio_bytes(qc);
3890 } else {
3891 /* handle BSY=0, DRQ=0 as error */
3892 if ((status & ATA_DRQ) == 0) {
11a56d24 3893 qc->err_mask |= AC_ERR_HSM;
14be71f4 3894 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3895 return;
3896 }
3897
3898 ata_pio_sector(qc);
3899 }
3900}
3901
3902static void ata_pio_error(struct ata_port *ap)
3903{
3904 struct ata_queued_cmd *qc;
a7dac447 3905
1da177e4 3906 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3907 WARN_ON(qc == NULL);
1da177e4 3908
0565c26d 3909 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3910 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3911 ap->id, qc->dev->devno);
0565c26d 3912
2e9edbf8 3913 /* make sure qc->err_mask is available to
1c848984
AL		 3914 * know what's wrong and recover
3915 */
a4631474 3916 WARN_ON(qc->err_mask == 0);
1c848984 3917
14be71f4 3918 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3919
a22e2eb0 3920 ata_poll_qc_complete(qc);
1da177e4
LT		 3921}
3922
3923static void ata_pio_task(void *_data)
3924{
3925 struct ata_port *ap = _data;
7fb6ec28
JG		 3926 unsigned long timeout;
3927 int qc_completed;
3928
3929fsm_start:
3930 timeout = 0;
3931 qc_completed = 0;
1da177e4 3932
14be71f4
AL		 3933 switch (ap->hsm_task_state) {
3934 case HSM_ST_IDLE:
1da177e4
LT		 3935 return;
3936
14be71f4 3937 case HSM_ST:
1da177e4
LT		 3938 ata_pio_block(ap);
3939 break;
3940
14be71f4 3941 case HSM_ST_LAST:
7fb6ec28 3942 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3943 break;
3944
14be71f4
AL		 3945 case HSM_ST_POLL:
3946 case HSM_ST_LAST_POLL:
1da177e4
LT		 3947 timeout = ata_pio_poll(ap);
3948 break;
3949
14be71f4
AL		 3950 case HSM_ST_TMOUT:
3951 case HSM_ST_ERR:
1da177e4
LT		 3952 ata_pio_error(ap);
3953 return;
3954 }
3955
3956 if (timeout)
8061f5f0 3957 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3958 else if (!qc_completed)
3959 goto fsm_start;
1da177e4
LT		 3960}
3961
8061f5f0
TH		 3962/**
3963 * atapi_packet_task - Write CDB bytes to hardware
3964 * @_data: Port to which ATAPI device is attached.
3965 *
3966 * When device has indicated its readiness to accept
3967 * a CDB, this function is called. Send the CDB.
3968 * If DMA is to be performed, exit immediately.
3969 * Otherwise, we are in polling mode, so poll
3970 * status under operation succeeds or fails.
3971 *
3972 * LOCKING:
3973 * Kernel thread context (may sleep)
3974 */
3975
3976static void atapi_packet_task(void *_data)
3977{
3978 struct ata_port *ap = _data;
3979 struct ata_queued_cmd *qc;
3980 u8 status;
3981
3982 qc = ata_qc_from_tag(ap, ap->active_tag);
3983 WARN_ON(qc == NULL);
3984 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3985
3986 /* sleep-wait for BSY to clear */
3987 DPRINTK("busy wait\n");
3988 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3989 qc->err_mask |= AC_ERR_TIMEOUT;
3990 goto err_out;
3991 }
3992
3993 /* make sure DRQ is set */
3994 status = ata_chk_status(ap);
3995 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3996 qc->err_mask |= AC_ERR_HSM;
3997 goto err_out;
3998 }
3999
4000 /* send SCSI cdb */
4001 DPRINTK("send cdb\n");
4002 WARN_ON(qc->dev->cdb_len < 12);
4003
4004 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4005 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4006 unsigned long flags;
4007
4008 /* Once we're done issuing command and kicking bmdma,
4009 * irq handler takes over. To not lose irq, we need
4010 * to clear NOINTR flag before sending cdb, but
4011 * interrupt handler shouldn't be invoked before we're
4012 * finished. Hence, the following locking.
4013 */
4014 spin_lock_irqsave(&ap->host_set->lock, flags);
4015 ap->flags &= ~ATA_FLAG_NOINTR;
4016 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4017 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4018 ap->ops->bmdma_start(qc); /* initiate bmdma */
4019 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4020 } else {
4021 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4022
4023 /* PIO commands are handled by polling */
4024 ap->hsm_task_state = HSM_ST;
4025 ata_port_queue_task(ap, ata_pio_task, ap, 0);
4026 }
4027
4028 return;
4029
4030err_out:
4031 ata_poll_qc_complete(qc);
4032}
4033
1da177e4
LT		 4034/**
4035 * ata_qc_timeout - Handle timeout of queued command
4036 * @qc: Command that timed out
4037 *
4038 * Some part of the kernel (currently, only the SCSI layer)
4039 * has noticed that the active command on port @ap has not
4040 * completed after a specified length of time. Handle this
4041 * condition by disabling DMA (if necessary) and completing
4042 * transactions, with error if necessary.
4043 *
4044 * This also handles the case of the "lost interrupt", where
4045 * for some reason (possibly hardware bug, possibly driver bug)
4046 * an interrupt was not delivered to the driver, even though the
4047 * transaction completed successfully.
4048 *
4049 * LOCKING:
0cba632b 4050 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 4051 */
4052
4053static void ata_qc_timeout(struct ata_queued_cmd *qc)
4054{
4055 struct ata_port *ap = qc->ap;
b8f6153e 4056 struct ata_host_set *host_set = ap->host_set;
1da177e4 4057 u8 host_stat = 0, drv_stat;
b8f6153e 4058 unsigned long flags;
1da177e4
LT		 4059
4060 DPRINTK("ENTER\n");
4061
c18d06f8
TH		 4062 ap->hsm_task_state = HSM_ST_IDLE;
4063
b8f6153e
JG		 4064 spin_lock_irqsave(&host_set->lock, flags);
4065
1da177e4
LT		 4066 switch (qc->tf.protocol) {
4067
4068 case ATA_PROT_DMA:
4069 case ATA_PROT_ATAPI_DMA:
4070 host_stat = ap->ops->bmdma_status(ap);
4071
4072 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4073 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4074
4075 /* fall through */
4076
4077 default:
4078 ata_altstatus(ap);
4079 drv_stat = ata_chk_status(ap);
4080
4081 /* ack bmdma irq events */
4082 ap->ops->irq_clear(ap);
4083
4084 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
4085 ap->id, qc->tf.command, drv_stat, host_stat);
4086
4087 /* complete taskfile transaction */
a22e2eb0 4088 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 4089 break;
4090 }
b8f6153e
JG		 4091
4092 spin_unlock_irqrestore(&host_set->lock, flags);
4093
a72ec4ce
TH		 4094 ata_eh_qc_complete(qc);
4095
1da177e4
LT		 4096 DPRINTK("EXIT\n");
4097}
4098
4099/**
4100 * ata_eng_timeout - Handle timeout of queued command
4101 * @ap: Port on which timed-out command is active
4102 *
4103 * Some part of the kernel (currently, only the SCSI layer)
4104 * has noticed that the active command on port @ap has not
4105 * completed after a specified length of time. Handle this
4106 * condition by disabling DMA (if necessary) and completing
4107 * transactions, with error if necessary.
4108 *
4109 * This also handles the case of the "lost interrupt", where
4110 * for some reason (possibly hardware bug, possibly driver bug)
4111 * an interrupt was not delivered to the driver, even though the
4112 * transaction completed successfully.
4113 *
4114 * LOCKING:
4115 * Inherited from SCSI layer (none, can sleep)
4116 */
4117
4118void ata_eng_timeout(struct ata_port *ap)
4119{
1da177e4
LT		 4120 DPRINTK("ENTER\n");
4121
f6379020 4122 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 4123
1da177e4
LT		 4124 DPRINTK("EXIT\n");
4125}
4126
4127/**
4128 * ata_qc_new - Request an available ATA command, for queueing
4129 * @ap: Port associated with device @dev
4130 * @dev: Device from whom we request an available command structure
4131 *
4132 * LOCKING:
0cba632b 4133 * None.
1da177e4
LT		 4134 */
4135
4136static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4137{
4138 struct ata_queued_cmd *qc = NULL;
4139 unsigned int i;
4140
4141 for (i = 0; i < ATA_MAX_QUEUE; i++)
4142 if (!test_and_set_bit(i, &ap->qactive)) {
4143 qc = ata_qc_from_tag(ap, i);
4144 break;
4145 }
4146
4147 if (qc)
4148 qc->tag = i;
4149
4150 return qc;
4151}
4152
4153/**
4154 * ata_qc_new_init - Request an available ATA command, and initialize it
4155 * @ap: Port associated with device @dev
4156 * @dev: Device from whom we request an available command structure
4157 *
4158 * LOCKING:
0cba632b 4159 * None.
1da177e4
LT		 4160 */
4161
4162struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4163 struct ata_device *dev)
4164{
4165 struct ata_queued_cmd *qc;
4166
4167 qc = ata_qc_new(ap);
4168 if (qc) {
1da177e4
LT		 4169 qc->scsicmd = NULL;
4170 qc->ap = ap;
4171 qc->dev = dev;
1da177e4 4172
2c13b7ce 4173 ata_qc_reinit(qc);
1da177e4
LT		 4174 }
4175
4176 return qc;
4177}
4178
1da177e4
LT		 4179/**
4180 * ata_qc_free - free unused ata_queued_cmd
4181 * @qc: Command to complete
4182 *
4183 * Designed to free unused ata_queued_cmd object
4184 * in case something prevents using it.
4185 *
4186 * LOCKING:
0cba632b 4187 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4188 */
4189void ata_qc_free(struct ata_queued_cmd *qc)
4190{
4ba946e9
TH		 4191 struct ata_port *ap = qc->ap;
4192 unsigned int tag;
4193
a4631474 4194 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4195
4ba946e9
TH		 4196 qc->flags = 0;
4197 tag = qc->tag;
4198 if (likely(ata_tag_valid(tag))) {
4199 if (tag == ap->active_tag)
4200 ap->active_tag = ATA_TAG_POISON;
4201 qc->tag = ATA_TAG_POISON;
4202 clear_bit(tag, &ap->qactive);
4203 }
1da177e4
LT		 4204}
4205
76014427 4206void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4207{
a4631474
TH		 4208 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4209 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4210
4211 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4212 ata_sg_clean(qc);
4213
3f3791d3
AL		 4214 /* atapi: mark qc as inactive to prevent the interrupt handler
4215 * from completing the command twice later, before the error handler
4216 * is called. (when rc != 0 and atapi request sense is needed)
4217 */
4218 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4219
1da177e4 4220 /* call completion callback */
77853bf2 4221 qc->complete_fn(qc);
1da177e4
LT		 4222}
4223
4224static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4225{
4226 struct ata_port *ap = qc->ap;
4227
4228 switch (qc->tf.protocol) {
4229 case ATA_PROT_DMA:
4230 case ATA_PROT_ATAPI_DMA:
4231 return 1;
4232
4233 case ATA_PROT_ATAPI:
4234 case ATA_PROT_PIO:
1da177e4
LT		 4235 if (ap->flags & ATA_FLAG_PIO_DMA)
4236 return 1;
4237
4238 /* fall through */
4239
4240 default:
4241 return 0;
4242 }
4243
4244 /* never reached */
4245}
4246
4247/**
4248 * ata_qc_issue - issue taskfile to device
4249 * @qc: command to issue to device
4250 *
4251 * Prepare an ATA command to submission to device.
4252 * This includes mapping the data into a DMA-able
4253 * area, filling in the S/G table, and finally
4254 * writing the taskfile to hardware, starting the command.
4255 *
4256 * LOCKING:
4257 * spin_lock_irqsave(host_set lock)
1da177e4 4258 */
8e0e694a 4259void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4260{
4261 struct ata_port *ap = qc->ap;
4262
e4a70e76
TH		 4263 qc->ap->active_tag = qc->tag;
4264 qc->flags |= ATA_QCFLAG_ACTIVE;
4265
1da177e4
LT		 4266 if (ata_should_dma_map(qc)) {
4267 if (qc->flags & ATA_QCFLAG_SG) {
4268 if (ata_sg_setup(qc))
8e436af9 4269 goto sg_err;
1da177e4
LT		 4270 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4271 if (ata_sg_setup_one(qc))
8e436af9 4272 goto sg_err;
1da177e4
LT		 4273 }
4274 } else {
4275 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4276 }
4277
4278 ap->ops->qc_prep(qc);
4279
8e0e694a
TH		 4280 qc->err_mask |= ap->ops->qc_issue(qc);
4281 if (unlikely(qc->err_mask))
4282 goto err;
4283 return;
1da177e4 4284
8e436af9
TH		 4285sg_err:
4286 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4287 qc->err_mask |= AC_ERR_SYSTEM;
4288err:
4289 ata_qc_complete(qc);
1da177e4
LT		 4290}
4291
4292/**
4293 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4294 * @qc: command to issue to device
4295 *
4296 * Using various libata functions and hooks, this function
4297 * starts an ATA command. ATA commands are grouped into
4298 * classes called "protocols", and issuing each type of protocol
4299 * is slightly different.
4300 *
0baab86b
EF		 4301 * May be used as the qc_issue() entry in ata_port_operations.
4302 *
1da177e4
LT		 4303 * LOCKING:
4304 * spin_lock_irqsave(host_set lock)
4305 *
4306 * RETURNS:
9a3d9eb0 4307 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4308 */
4309
9a3d9eb0 4310unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4311{
4312 struct ata_port *ap = qc->ap;
4313
4314 ata_dev_select(ap, qc->dev->devno, 1, 0);
4315
4316 switch (qc->tf.protocol) {
4317 case ATA_PROT_NODATA:
e5338254 4318 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4319 break;
4320
4321 case ATA_PROT_DMA:
4322 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4323 ap->ops->bmdma_setup(qc); /* set up bmdma */
4324 ap->ops->bmdma_start(qc); /* initiate bmdma */
4325 break;
4326
4327 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4328 ata_qc_set_polling(qc);
e5338254 4329 ata_tf_to_host(ap, &qc->tf);
14be71f4 4330 ap->hsm_task_state = HSM_ST;
8061f5f0 4331 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4332 break;
4333
4334 case ATA_PROT_ATAPI:
4335 ata_qc_set_polling(qc);
e5338254 4336 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4337 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4338 break;
4339
4340 case ATA_PROT_ATAPI_NODATA:
c1389503 4341 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4342 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4343 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4344 break;
4345
4346 case ATA_PROT_ATAPI_DMA:
c1389503 4347 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4348 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4349 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4350 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4351 break;
4352
4353 default:
4354 WARN_ON(1);
9a3d9eb0 4355 return AC_ERR_SYSTEM;
1da177e4
LT		 4356 }
4357
4358 return 0;
4359}
4360
1da177e4
LT		 4361/**
4362 * ata_host_intr - Handle host interrupt for given (port, task)
4363 * @ap: Port on which interrupt arrived (possibly...)
4364 * @qc: Taskfile currently active in engine
4365 *
4366 * Handle host interrupt for given queued command. Currently,
4367 * only DMA interrupts are handled. All other commands are
4368 * handled via polling with interrupts disabled (nIEN bit).
4369 *
4370 * LOCKING:
4371 * spin_lock_irqsave(host_set lock)
4372 *
4373 * RETURNS:
4374 * One if interrupt was handled, zero if not (shared irq).
4375 */
4376
4377inline unsigned int ata_host_intr (struct ata_port *ap,
4378 struct ata_queued_cmd *qc)
4379{
4380 u8 status, host_stat;
4381
4382 switch (qc->tf.protocol) {
4383
4384 case ATA_PROT_DMA:
4385 case ATA_PROT_ATAPI_DMA:
4386 case ATA_PROT_ATAPI:
4387 /* check status of DMA engine */
4388 host_stat = ap->ops->bmdma_status(ap);
4389 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4390
4391 /* if it's not our irq... */
4392 if (!(host_stat & ATA_DMA_INTR))
4393 goto idle_irq;
4394
4395 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4396 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4397
4398 /* fall through */
4399
4400 case ATA_PROT_ATAPI_NODATA:
4401 case ATA_PROT_NODATA:
4402 /* check altstatus */
4403 status = ata_altstatus(ap);
4404 if (status & ATA_BUSY)
4405 goto idle_irq;
4406
4407 /* check main status, clearing INTRQ */
4408 status = ata_chk_status(ap);
4409 if (unlikely(status & ATA_BUSY))
4410 goto idle_irq;
4411 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4412 ap->id, qc->tf.protocol, status);
4413
4414 /* ack bmdma irq events */
4415 ap->ops->irq_clear(ap);
4416
4417 /* complete taskfile transaction */
a22e2eb0
AL		 4418 qc->err_mask |= ac_err_mask(status);
4419 ata_qc_complete(qc);
1da177e4
LT		 4420 break;
4421
4422 default:
4423 goto idle_irq;
4424 }
4425
4426 return 1; /* irq handled */
4427
4428idle_irq:
4429 ap->stats.idle_irq++;
4430
4431#ifdef ATA_IRQ_TRAP
4432 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4433 ata_irq_ack(ap, 0); /* debug trap */
4434 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4435 return 1;
1da177e4
LT		 4436 }
4437#endif
4438 return 0; /* irq not handled */
4439}
4440
4441/**
4442 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4443 * @irq: irq line (unused)
4444 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4445 * @regs: unused
4446 *
0cba632b
JG		 4447 * Default interrupt handler for PCI IDE devices. Calls
4448 * ata_host_intr() for each port that is not disabled.
4449 *
1da177e4 4450 * LOCKING:
0cba632b 4451 * Obtains host_set lock during operation.
1da177e4
LT		 4452 *
4453 * RETURNS:
0cba632b 4454 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4455 */
4456
4457irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4458{
4459 struct ata_host_set *host_set = dev_instance;
4460 unsigned int i;
4461 unsigned int handled = 0;
4462 unsigned long flags;
4463
4464 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4465 spin_lock_irqsave(&host_set->lock, flags);
4466
4467 for (i = 0; i < host_set->n_ports; i++) {
4468 struct ata_port *ap;
4469
4470 ap = host_set->ports[i];
c1389503 4471 if (ap &&
198e0fed 4472 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4473 struct ata_queued_cmd *qc;
4474
4475 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4476 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4477 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4478 handled |= ata_host_intr(ap, qc);
4479 }
4480 }
4481
4482 spin_unlock_irqrestore(&host_set->lock, flags);
4483
4484 return IRQ_RETVAL(handled);
4485}
4486
0baab86b 4487
9b847548
JA		 4488/*
4489 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4490 * without filling any other registers
4491 */
4492static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4493 u8 cmd)
4494{
4495 struct ata_taskfile tf;
4496 int err;
4497
4498 ata_tf_init(ap, &tf, dev->devno);
4499
4500 tf.command = cmd;
4501 tf.flags |= ATA_TFLAG_DEVICE;
4502 tf.protocol = ATA_PROT_NODATA;
4503
4504 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4505 if (err)
4506 printk(KERN_ERR "%s: ata command failed: %d\n",
4507 __FUNCTION__, err);
4508
4509 return err;
4510}
4511
4512static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4513{
4514 u8 cmd;
4515
4516 if (!ata_try_flush_cache(dev))
4517 return 0;
4518
4519 if (ata_id_has_flush_ext(dev->id))
4520 cmd = ATA_CMD_FLUSH_EXT;
4521 else
4522 cmd = ATA_CMD_FLUSH;
4523
4524 return ata_do_simple_cmd(ap, dev, cmd);
4525}
4526
4527static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4528{
4529 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4530}
4531
4532static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4533{
4534 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4535}
4536
4537/**
4538 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4539 * @ap: port the device is connected to
4540 * @dev: the device to resume
9b847548
JA		 4541 *
4542 * Kick the drive back into action, by sending it an idle immediate
4543 * command and making sure its transfer mode matches between drive
4544 * and host.
4545 *
4546 */
4547int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4548{
4549 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4550 struct ata_device *failed_dev;
9b847548 4551 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4552 while (ata_set_mode(ap, &failed_dev))
4553 ata_dev_disable(ap, failed_dev);
9b847548 4554 }
e1211e3f 4555 if (!ata_dev_enabled(dev))
9b847548
JA		 4556 return 0;
4557 if (dev->class == ATA_DEV_ATA)
4558 ata_start_drive(ap, dev);
4559
4560 return 0;
4561}
4562
4563/**
4564 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4565 * @ap: port the device is connected to
4566 * @dev: the device to suspend
9b847548
JA		 4567 *
4568 * Flush the cache on the drive, if appropriate, then issue a
4569 * standbynow command.
9b847548 4570 */
082776e4 4571int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4572{
e1211e3f 4573 if (!ata_dev_enabled(dev))
9b847548
JA		 4574 return 0;
4575 if (dev->class == ATA_DEV_ATA)
4576 ata_flush_cache(ap, dev);
4577
082776e4
NC		 4578 if (state.event != PM_EVENT_FREEZE)
4579 ata_standby_drive(ap, dev);
9b847548
JA		 4580 ap->flags |= ATA_FLAG_SUSPENDED;
4581 return 0;
4582}
4583
c893a3ae
RD		 4584/**
4585 * ata_port_start - Set port up for dma.
4586 * @ap: Port to initialize
4587 *
4588 * Called just after data structures for each port are
4589 * initialized. Allocates space for PRD table.
4590 *
4591 * May be used as the port_start() entry in ata_port_operations.
4592 *
4593 * LOCKING:
4594 * Inherited from caller.
4595 */
4596
1da177e4
LT		 4597int ata_port_start (struct ata_port *ap)
4598{
2f1f610b 4599 struct device *dev = ap->dev;
6037d6bb 4600 int rc;
1da177e4
LT		 4601
4602 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4603 if (!ap->prd)
4604 return -ENOMEM;
4605
6037d6bb
JG		 4606 rc = ata_pad_alloc(ap, dev);
4607 if (rc) {
cedc9a47 4608 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4609 return rc;
cedc9a47
JG		 4610 }
4611
1da177e4
LT		 4612 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4613
4614 return 0;
4615}
4616
0baab86b
EF		 4617
4618/**
4619 * ata_port_stop - Undo ata_port_start()
4620 * @ap: Port to shut down
4621 *
4622 * Frees the PRD table.
4623 *
4624 * May be used as the port_stop() entry in ata_port_operations.
4625 *
4626 * LOCKING:
6f0ef4fa 4627 * Inherited from caller.
0baab86b
EF		 4628 */
4629
1da177e4
LT		 4630void ata_port_stop (struct ata_port *ap)
4631{
2f1f610b 4632 struct device *dev = ap->dev;
1da177e4
LT		 4633
4634 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4635 ata_pad_free(ap, dev);
1da177e4
LT		 4636}
4637
aa8f0dc6
JG		 4638void ata_host_stop (struct ata_host_set *host_set)
4639{
4640 if (host_set->mmio_base)
4641 iounmap(host_set->mmio_base);
4642}
4643
4644
1da177e4
LT		 4645/**
4646 * ata_host_remove - Unregister SCSI host structure with upper layers
4647 * @ap: Port to unregister
4648 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4649 *
4650 * LOCKING:
6f0ef4fa 4651 * Inherited from caller.
1da177e4
LT		 4652 */
4653
4654static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4655{
4656 struct Scsi_Host *sh = ap->host;
4657
4658 DPRINTK("ENTER\n");
4659
4660 if (do_unregister)
4661 scsi_remove_host(sh);
4662
4663 ap->ops->port_stop(ap);
4664}
4665
4666/**
4667 * ata_host_init - Initialize an ata_port structure
4668 * @ap: Structure to initialize
4669 * @host: associated SCSI mid-layer structure
4670 * @host_set: Collection of hosts to which @ap belongs
4671 * @ent: Probe information provided by low-level driver
4672 * @port_no: Port number associated with this ata_port
4673 *
0cba632b
JG		 4674 * Initialize a new ata_port structure, and its associated
4675 * scsi_host.
4676 *
1da177e4 4677 * LOCKING:
0cba632b 4678 * Inherited from caller.
1da177e4
LT		 4679 */
4680
4681static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4682 struct ata_host_set *host_set,
057ace5e 4683 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4684{
4685 unsigned int i;
4686
4687 host->max_id = 16;
4688 host->max_lun = 1;
4689 host->max_channel = 1;
4690 host->unique_id = ata_unique_id++;
4691 host->max_cmd_len = 12;
12413197 4692
198e0fed 4693 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4694 ap->id = host->unique_id;
4695 ap->host = host;
4696 ap->ctl = ATA_DEVCTL_OBS;
4697 ap->host_set = host_set;
2f1f610b 4698 ap->dev = ent->dev;
1da177e4
LT		 4699 ap->port_no = port_no;
4700 ap->hard_port_no =
4701 ent->legacy_mode ? ent->hard_port_no : port_no;
4702 ap->pio_mask = ent->pio_mask;
4703 ap->mwdma_mask = ent->mwdma_mask;
4704 ap->udma_mask = ent->udma_mask;
4705 ap->flags |= ent->host_flags;
4706 ap->ops = ent->port_ops;
4707 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4708 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4709 ap->active_tag = ATA_TAG_POISON;
4710 ap->last_ctl = 0xFF;
4711
86e45b6b 4712 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4713 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4714
acf356b1
TH		 4715 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4716 struct ata_device *dev = &ap->device[i];
4717 dev->devno = i;
4718 dev->pio_mask = UINT_MAX;
4719 dev->mwdma_mask = UINT_MAX;
4720 dev->udma_mask = UINT_MAX;
4721 }
1da177e4
LT		 4722
4723#ifdef ATA_IRQ_TRAP
4724 ap->stats.unhandled_irq = 1;
4725 ap->stats.idle_irq = 1;
4726#endif
4727
4728 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4729}
4730
4731/**
4732 * ata_host_add - Attach low-level ATA driver to system
4733 * @ent: Information provided by low-level driver
4734 * @host_set: Collections of ports to which we add
4735 * @port_no: Port number associated with this host
4736 *
0cba632b
JG		 4737 * Attach low-level ATA driver to system.
4738 *
1da177e4 4739 * LOCKING:
0cba632b 4740 * PCI/etc. bus probe sem.
1da177e4
LT		 4741 *
4742 * RETURNS:
0cba632b 4743 * New ata_port on success, for NULL on error.
1da177e4
LT		 4744 */
4745
057ace5e 4746static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4747 struct ata_host_set *host_set,
4748 unsigned int port_no)
4749{
4750 struct Scsi_Host *host;
4751 struct ata_port *ap;
4752 int rc;
4753
4754 DPRINTK("ENTER\n");
aec5c3c1
TH		 4755
4756 if (!ent->port_ops->probe_reset &&
4757 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4758 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4759 port_no);
4760 return NULL;
4761 }
4762
1da177e4
LT		 4763 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4764 if (!host)
4765 return NULL;
4766
30afc84c
TH		 4767 host->transportt = &ata_scsi_transport_template;
4768
1da177e4
LT		 4769 ap = (struct ata_port *) &host->hostdata[0];
4770
4771 ata_host_init(ap, host, host_set, ent, port_no);
4772
4773 rc = ap->ops->port_start(ap);
4774 if (rc)
4775 goto err_out;
4776
4777 return ap;
4778
4779err_out:
4780 scsi_host_put(host);
4781 return NULL;
4782}
4783
4784/**
0cba632b
JG		 4785 * ata_device_add - Register hardware device with ATA and SCSI layers
4786 * @ent: Probe information describing hardware device to be registered
4787 *
4788 * This function processes the information provided in the probe
4789 * information struct @ent, allocates the necessary ATA and SCSI
4790 * host information structures, initializes them, and registers
4791 * everything with requisite kernel subsystems.
4792 *
4793 * This function requests irqs, probes the ATA bus, and probes
4794 * the SCSI bus.
1da177e4
LT		 4795 *
4796 * LOCKING:
0cba632b 4797 * PCI/etc. bus probe sem.
1da177e4
LT		 4798 *
4799 * RETURNS:
0cba632b 4800 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4801 */
4802
057ace5e 4803int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4804{
4805 unsigned int count = 0, i;
4806 struct device *dev = ent->dev;
4807 struct ata_host_set *host_set;
4808
4809 DPRINTK("ENTER\n");
4810 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4811 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4812 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4813 if (!host_set)
4814 return 0;
1da177e4
LT		 4815 spin_lock_init(&host_set->lock);
4816
4817 host_set->dev = dev;
4818 host_set->n_ports = ent->n_ports;
4819 host_set->irq = ent->irq;
4820 host_set->mmio_base = ent->mmio_base;
4821 host_set->private_data = ent->private_data;
4822 host_set->ops = ent->port_ops;
5444a6f4 4823 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4824
4825 /* register each port bound to this device */
4826 for (i = 0; i < ent->n_ports; i++) {
4827 struct ata_port *ap;
4828 unsigned long xfer_mode_mask;
4829
4830 ap = ata_host_add(ent, host_set, i);
4831 if (!ap)
4832 goto err_out;
4833
4834 host_set->ports[i] = ap;
4835 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4836 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4837 (ap->pio_mask << ATA_SHIFT_PIO);
4838
4839 /* print per-port info to dmesg */
4840 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4841 "bmdma 0x%lX irq %lu\n",
4842 ap->id,
4843 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4844 ata_mode_string(xfer_mode_mask),
4845 ap->ioaddr.cmd_addr,
4846 ap->ioaddr.ctl_addr,
4847 ap->ioaddr.bmdma_addr,
4848 ent->irq);
4849
4850 ata_chk_status(ap);
4851 host_set->ops->irq_clear(ap);
4852 count++;
4853 }
4854
57f3bda8
RD		 4855 if (!count)
4856 goto err_free_ret;
1da177e4
LT		 4857
4858 /* obtain irq, that is shared between channels */
4859 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4860 DRV_NAME, host_set))
4861 goto err_out;
4862
4863 /* perform each probe synchronously */
4864 DPRINTK("probe begin\n");
4865 for (i = 0; i < count; i++) {
4866 struct ata_port *ap;
4867 int rc;
4868
4869 ap = host_set->ports[i];
4870
c893a3ae 4871 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4872 rc = ata_bus_probe(ap);
c893a3ae 4873 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4874
4875 if (rc) {
4876 /* FIXME: do something useful here?
4877 * Current libata behavior will
4878 * tear down everything when
4879 * the module is removed
4880 * or the h/w is unplugged.
4881 */
4882 }
4883
4884 rc = scsi_add_host(ap->host, dev);
4885 if (rc) {
4886 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4887 ap->id);
4888 /* FIXME: do something useful here */
4889 /* FIXME: handle unconditional calls to
4890 * scsi_scan_host and ata_host_remove, below,
4891 * at the very least
4892 */
4893 }
4894 }
4895
4896 /* probes are done, now scan each port's disk(s) */
c893a3ae 4897 DPRINTK("host probe begin\n");
1da177e4
LT		 4898 for (i = 0; i < count; i++) {
4899 struct ata_port *ap = host_set->ports[i];
4900
644dd0cc 4901 ata_scsi_scan_host(ap);
1da177e4
LT		 4902 }
4903
4904 dev_set_drvdata(dev, host_set);
4905
4906 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4907 return ent->n_ports; /* success */
4908
4909err_out:
4910 for (i = 0; i < count; i++) {
4911 ata_host_remove(host_set->ports[i], 1);
4912 scsi_host_put(host_set->ports[i]->host);
4913 }
57f3bda8 4914err_free_ret:
1da177e4
LT		 4915 kfree(host_set);
4916 VPRINTK("EXIT, returning 0\n");
4917 return 0;
4918}
4919
17b14451
AC		 4920/**
4921 * ata_host_set_remove - PCI layer callback for device removal
4922 * @host_set: ATA host set that was removed
4923 *
2e9edbf8 4924 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4925 * objects.
4926 *
4927 * LOCKING:
4928 * Inherited from calling layer (may sleep).
4929 */
4930
17b14451
AC		 4931void ata_host_set_remove(struct ata_host_set *host_set)
4932{
4933 struct ata_port *ap;
4934 unsigned int i;
4935
4936 for (i = 0; i < host_set->n_ports; i++) {
4937 ap = host_set->ports[i];
4938 scsi_remove_host(ap->host);
4939 }
4940
4941 free_irq(host_set->irq, host_set);
4942
4943 for (i = 0; i < host_set->n_ports; i++) {
4944 ap = host_set->ports[i];
4945
4946 ata_scsi_release(ap->host);
4947
4948 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4949 struct ata_ioports *ioaddr = &ap->ioaddr;
4950
4951 if (ioaddr->cmd_addr == 0x1f0)
4952 release_region(0x1f0, 8);
4953 else if (ioaddr->cmd_addr == 0x170)
4954 release_region(0x170, 8);
4955 }
4956
4957 scsi_host_put(ap->host);
4958 }
4959
4960 if (host_set->ops->host_stop)
4961 host_set->ops->host_stop(host_set);
4962
4963 kfree(host_set);
4964}
4965
1da177e4
LT		 4966/**
4967 * ata_scsi_release - SCSI layer callback hook for host unload
4968 * @host: libata host to be unloaded
4969 *
4970 * Performs all duties necessary to shut down a libata port...
4971 * Kill port kthread, disable port, and release resources.
4972 *
4973 * LOCKING:
4974 * Inherited from SCSI layer.
4975 *
4976 * RETURNS:
4977 * One.
4978 */
4979
4980int ata_scsi_release(struct Scsi_Host *host)
4981{
4982 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4983 int i;
1da177e4
LT		 4984
4985 DPRINTK("ENTER\n");
4986
4987 ap->ops->port_disable(ap);
4988 ata_host_remove(ap, 0);
d9572b1d
TH		 4989 for (i = 0; i < ATA_MAX_DEVICES; i++)
4990 kfree(ap->device[i].id);
1da177e4
LT		 4991
4992 DPRINTK("EXIT\n");
4993 return 1;
4994}
4995
4996/**
4997 * ata_std_ports - initialize ioaddr with standard port offsets.
4998 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4999 *
5000 * Utility function which initializes data_addr, error_addr,
5001 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5002 * device_addr, status_addr, and command_addr to standard offsets
5003 * relative to cmd_addr.
5004 *
5005 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5006 */
0baab86b 5007
1da177e4
LT		 5008void ata_std_ports(struct ata_ioports *ioaddr)
5009{
5010 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5011 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5012 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5013 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5014 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5015 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5016 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5017 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5018 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5019 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5020}
5021
0baab86b 5022
374b1873
JG		 5023#ifdef CONFIG_PCI
5024
5025void ata_pci_host_stop (struct ata_host_set *host_set)
5026{
5027 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5028
5029 pci_iounmap(pdev, host_set->mmio_base);
5030}
5031
1da177e4
LT		 5032/**
5033 * ata_pci_remove_one - PCI layer callback for device removal
5034 * @pdev: PCI device that was removed
5035 *
5036 * PCI layer indicates to libata via this hook that
6f0ef4fa 5037 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5038 * Handle this by unregistering all objects associated
5039 * with this PCI device. Free those objects. Then finally
5040 * release PCI resources and disable device.
5041 *
5042 * LOCKING:
5043 * Inherited from PCI layer (may sleep).
5044 */
5045
5046void ata_pci_remove_one (struct pci_dev *pdev)
5047{
5048 struct device *dev = pci_dev_to_dev(pdev);
5049 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5050
17b14451 5051 ata_host_set_remove(host_set);
1da177e4
LT		 5052 pci_release_regions(pdev);
5053 pci_disable_device(pdev);
5054 dev_set_drvdata(dev, NULL);
5055}
5056
5057/* move to PCI subsystem */
057ace5e 5058int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5059{
5060 unsigned long tmp = 0;
5061
5062 switch (bits->width) {
5063 case 1: {
5064 u8 tmp8 = 0;
5065 pci_read_config_byte(pdev, bits->reg, &tmp8);
5066 tmp = tmp8;
5067 break;
5068 }
5069 case 2: {
5070 u16 tmp16 = 0;
5071 pci_read_config_word(pdev, bits->reg, &tmp16);
5072 tmp = tmp16;
5073 break;
5074 }
5075 case 4: {
5076 u32 tmp32 = 0;
5077 pci_read_config_dword(pdev, bits->reg, &tmp32);
5078 tmp = tmp32;
5079 break;
5080 }
5081
5082 default:
5083 return -EINVAL;
5084 }
5085
5086 tmp &= bits->mask;
5087
5088 return (tmp == bits->val) ? 1 : 0;
5089}
9b847548
JA		 5090
5091int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5092{
5093 pci_save_state(pdev);
5094 pci_disable_device(pdev);
5095 pci_set_power_state(pdev, PCI_D3hot);
5096 return 0;
5097}
5098
5099int ata_pci_device_resume(struct pci_dev *pdev)
5100{
5101 pci_set_power_state(pdev, PCI_D0);
5102 pci_restore_state(pdev);
5103 pci_enable_device(pdev);
5104 pci_set_master(pdev);
5105 return 0;
5106}
1da177e4
LT		 5107#endif /* CONFIG_PCI */
5108
5109
1da177e4
LT		 5110static int __init ata_init(void)
5111{
5112 ata_wq = create_workqueue("ata");
5113 if (!ata_wq)
5114 return -ENOMEM;
5115
5116 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5117 return 0;
5118}
5119
5120static void __exit ata_exit(void)
5121{
5122 destroy_workqueue(ata_wq);
5123}
5124
5125module_init(ata_init);
5126module_exit(ata_exit);
5127
67846b30
JG		 5128static unsigned long ratelimit_time;
5129static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5130
5131int ata_ratelimit(void)
5132{
5133 int rc;
5134 unsigned long flags;
5135
5136 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5137
5138 if (time_after(jiffies, ratelimit_time)) {
5139 rc = 1;
5140 ratelimit_time = jiffies + (HZ/5);
5141 } else
5142 rc = 0;
5143
5144 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5145
5146 return rc;
5147}
5148
1da177e4
LT		 5149/*
5150 * libata is essentially a library of internal helper functions for
5151 * low-level ATA host controller drivers. As such, the API/ABI is
5152 * likely to change as new drivers are added and updated.
5153 * Do not depend on ABI/API stability.
5154 */
5155
5156EXPORT_SYMBOL_GPL(ata_std_bios_param);
5157EXPORT_SYMBOL_GPL(ata_std_ports);
5158EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5159EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5160EXPORT_SYMBOL_GPL(ata_sg_init);
5161EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5162EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5163EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5164EXPORT_SYMBOL_GPL(ata_eng_timeout);
5165EXPORT_SYMBOL_GPL(ata_tf_load);
5166EXPORT_SYMBOL_GPL(ata_tf_read);
5167EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5168EXPORT_SYMBOL_GPL(ata_std_dev_select);
5169EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5170EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5171EXPORT_SYMBOL_GPL(ata_check_status);
5172EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5173EXPORT_SYMBOL_GPL(ata_exec_command);
5174EXPORT_SYMBOL_GPL(ata_port_start);
5175EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5176EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5177EXPORT_SYMBOL_GPL(ata_interrupt);
5178EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5179EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5180EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5181EXPORT_SYMBOL_GPL(ata_bmdma_start);
5182EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5183EXPORT_SYMBOL_GPL(ata_bmdma_status);
5184EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5185EXPORT_SYMBOL_GPL(ata_port_probe);
5186EXPORT_SYMBOL_GPL(sata_phy_reset);
5187EXPORT_SYMBOL_GPL(__sata_phy_reset);
5188EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5189EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5190EXPORT_SYMBOL_GPL(ata_std_softreset);
5191EXPORT_SYMBOL_GPL(sata_std_hardreset);
5192EXPORT_SYMBOL_GPL(ata_std_postreset);
5193EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5194EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5195EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5196EXPORT_SYMBOL_GPL(ata_dev_classify);
5197EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5198EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5199EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5200EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5201EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5202EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5203EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5204EXPORT_SYMBOL_GPL(ata_scsi_error);
5205EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5206EXPORT_SYMBOL_GPL(ata_scsi_release);
5207EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5208EXPORT_SYMBOL_GPL(ata_id_string);
5209EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5210EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5211EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5212EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5213
1bc4ccff 5214EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5215EXPORT_SYMBOL_GPL(ata_timing_compute);
5216EXPORT_SYMBOL_GPL(ata_timing_merge);
5217
1da177e4
LT		 5218#ifdef CONFIG_PCI
5219EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5220EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5221EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5222EXPORT_SYMBOL_GPL(ata_pci_init_one);
5223EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5224EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5225EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5226EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5227EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5228#endif /* CONFIG_PCI */
9b847548
JA		 5229
5230EXPORT_SYMBOL_GPL(ata_device_suspend);
5231EXPORT_SYMBOL_GPL(ata_device_resume);
5232EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5233EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Clone of davem's net-next-2.6 tree