[net-next-2.6.git] / drivers / scsi / gvp11.c

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/blkdev.h>
#include <linux/init.h>
#include <linux/interrupt.h>

#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/amigaints.h>
#include <asm/amigahw.h>
#include <linux/zorro.h>
#include <asm/irq.h>
#include <linux/spinlock.h>

#include "scsi.h"
#include <scsi/scsi_host.h>
#include "wd33c93.h"
#include "gvp11.h"

#include <linux/stat.h>


#define DMA(ptr)	((gvp11_scsiregs *)((ptr)->base))
#define HDATA(ptr)	((struct WD33C93_hostdata *)((ptr)->hostdata))

static irqreturn_t gvp11_intr(int irq, void *_instance)
{
	unsigned long flags;
	unsigned int status;
	struct Scsi_Host *instance = (struct Scsi_Host *)_instance;

	status = DMA(instance)->CNTR;
	if (!(status & GVP11_DMAC_INT_PENDING))
		return IRQ_NONE;

	spin_lock_irqsave(instance->host_lock, flags);
	wd33c93_intr(instance);
	spin_unlock_irqrestore(instance->host_lock, flags);
	return IRQ_HANDLED;
}

static int gvp11_xfer_mask = 0;

void gvp11_setup(char *str, int *ints)
{
	gvp11_xfer_mask = ints[1];
}

static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
{
	unsigned short cntr = GVP11_DMAC_INT_ENABLE;
	unsigned long addr = virt_to_bus(cmd->SCp.ptr);
	int bank_mask;
	static int scsi_alloc_out_of_range = 0;

	/* use bounce buffer if the physical address is bad */
	if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
		HDATA(cmd->device->host)->dma_bounce_len =
			(cmd->SCp.this_residual + 511) & ~0x1ff;

		if (!scsi_alloc_out_of_range) {
			HDATA(cmd->device->host)->dma_bounce_buffer =
				kmalloc(HDATA(cmd->device->host)->dma_bounce_len,
					GFP_KERNEL);
			HDATA(cmd->device->host)->dma_buffer_pool =
				BUF_SCSI_ALLOCED;
		}

		if (scsi_alloc_out_of_range ||
		    !HDATA(cmd->device->host)->dma_bounce_buffer) {
			HDATA(cmd->device->host)->dma_bounce_buffer =
				amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
						 "GVP II SCSI Bounce Buffer");

			if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
				HDATA(cmd->device->host)->dma_bounce_len = 0;
				return 1;
			}

			HDATA(cmd->device->host)->dma_buffer_pool =
				BUF_CHIP_ALLOCED;
		}

		/* check if the address of the bounce buffer is OK */
		addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);

		if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
			/* fall back to Chip RAM if address out of range */
			if (HDATA(cmd->device->host)->dma_buffer_pool ==
			    BUF_SCSI_ALLOCED) {
				kfree(HDATA(cmd->device->host)->dma_bounce_buffer);
				scsi_alloc_out_of_range = 1;
			} else {
				amiga_chip_free(HDATA(cmd->device->host)->dma_bounce_buffer);
			}

			HDATA(cmd->device->host)->dma_bounce_buffer =
				amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
						 "GVP II SCSI Bounce Buffer");

			if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
				HDATA(cmd->device->host)->dma_bounce_len = 0;
				return 1;
			}

			addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
			HDATA(cmd->device->host)->dma_buffer_pool =
				BUF_CHIP_ALLOCED;
		}

		if (!dir_in) {
			/* copy to bounce buffer for a write */
			memcpy(HDATA(cmd->device->host)->dma_bounce_buffer,
			       cmd->SCp.ptr, cmd->SCp.this_residual);
		}
	}

	/* setup dma direction */
	if (!dir_in)
		cntr |= GVP11_DMAC_DIR_WRITE;

	HDATA(cmd->device->host)->dma_dir = dir_in;
	DMA(cmd->device->host)->CNTR = cntr;

	/* setup DMA *physical* address */
	DMA(cmd->device->host)->ACR = addr;

	if (dir_in) {
		/* invalidate any cache */
		cache_clear(addr, cmd->SCp.this_residual);
	} else {
		/* push any dirty cache */
		cache_push(addr, cmd->SCp.this_residual);
	}

	if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0))
		DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18);

	/* start DMA */
	DMA(cmd->device->host)->ST_DMA = 1;

	/* return success */
	return 0;
}

static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
		     int status)
{
	/* stop DMA */
	DMA(instance)->SP_DMA = 1;
	/* remove write bit from CONTROL bits */
	DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;

	/* copy from a bounce buffer, if necessary */
	if (status && HDATA(instance)->dma_bounce_buffer) {
		if (HDATA(instance)->dma_dir && SCpnt)
			memcpy(SCpnt->SCp.ptr,
			       HDATA(instance)->dma_bounce_buffer,
			       SCpnt->SCp.this_residual);

		if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED)
			kfree(HDATA(instance)->dma_bounce_buffer);
		else
			amiga_chip_free(HDATA(instance)->dma_bounce_buffer);

		HDATA(instance)->dma_bounce_buffer = NULL;
		HDATA(instance)->dma_bounce_len = 0;
	}
}

#define CHECK_WD33C93

int __init gvp11_detect(struct scsi_host_template *tpnt)
{
	static unsigned char called = 0;
	struct Scsi_Host *instance;
	unsigned long address;
	unsigned int epc;
	struct zorro_dev *z = NULL;
	unsigned int default_dma_xfer_mask;
	wd33c93_regs regs;
	int num_gvp11 = 0;
#ifdef CHECK_WD33C93
	volatile unsigned char *sasr_3393, *scmd_3393;
	unsigned char save_sasr;
	unsigned char q, qq;
#endif

	if (!MACH_IS_AMIGA || called)
		return 0;
	called = 1;

	tpnt->proc_name = "GVP11";
	tpnt->proc_info = &wd33c93_proc_info;

	while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
		/*
		 * This should (hopefully) be the correct way to identify
		 * all the different GVP SCSI controllers (except for the
		 * SERIES I though).
		 */

		if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI ||
		    z->id == ZORRO_PROD_GVP_SERIES_II)
			default_dma_xfer_mask = ~0x00ffffff;
		else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI ||
			 z->id == ZORRO_PROD_GVP_A530_SCSI ||
			 z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
			default_dma_xfer_mask = ~0x01ffffff;
		else if (z->id == ZORRO_PROD_GVP_A1291 ||
			 z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
			default_dma_xfer_mask = ~0x07ffffff;
		else
			continue;

		/*
		 * Rumors state that some GVP ram boards use the same product
		 * code as the SCSI controllers. Therefore if the board-size
		 * is not 64KB we asume it is a ram board and bail out.
		 */
		if (z->resource.end - z->resource.start != 0xffff)
			continue;

		address = z->resource.start;
		if (!request_mem_region(address, 256, "wd33c93"))
			continue;

#ifdef CHECK_WD33C93

		/*
		 * These darn GVP boards are a problem - it can be tough to tell
		 * whether or not they include a SCSI controller. This is the
		 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
		 * probes for a WD33c93 chip: If we find one, it's extremely
		 * likely that this card supports SCSI, regardless of Product_
		 * Code, Board_Size, etc.
		 */

		/* Get pointers to the presumed register locations and save contents */

		sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
		scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
		save_sasr = *sasr_3393;

		/* First test the AuxStatus Reg */

		q = *sasr_3393;	/* read it */
		if (q & 0x08)	/* bit 3 should always be clear */
			goto release;
		*sasr_3393 = WD_AUXILIARY_STATUS;	/* setup indirect address */
		if (*sasr_3393 == WD_AUXILIARY_STATUS) {	/* shouldn't retain the write */
			*sasr_3393 = save_sasr;	/* Oops - restore this byte */
			goto release;
		}
		if (*sasr_3393 != q) {	/* should still read the same */
			*sasr_3393 = save_sasr;	/* Oops - restore this byte */
			goto release;
		}
		if (*scmd_3393 != q)	/* and so should the image at 0x1f */
			goto release;

		/*
		 * Ok, we probably have a wd33c93, but let's check a few other places
		 * for good measure. Make sure that this works for both 'A and 'B
		 * chip versions.
		 */

		*sasr_3393 = WD_SCSI_STATUS;
		q = *scmd_3393;
		*sasr_3393 = WD_SCSI_STATUS;
		*scmd_3393 = ~q;
		*sasr_3393 = WD_SCSI_STATUS;
		qq = *scmd_3393;
		*sasr_3393 = WD_SCSI_STATUS;
		*scmd_3393 = q;
		if (qq != q)	/* should be read only */
			goto release;
		*sasr_3393 = 0x1e;	/* this register is unimplemented */
		q = *scmd_3393;
		*sasr_3393 = 0x1e;
		*scmd_3393 = ~q;
		*sasr_3393 = 0x1e;
		qq = *scmd_3393;
		*sasr_3393 = 0x1e;
		*scmd_3393 = q;
		if (qq != q || qq != 0xff)	/* should be read only, all 1's */
			goto release;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		q = *scmd_3393;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		*scmd_3393 = ~q;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		qq = *scmd_3393;
		*sasr_3393 = WD_TIMEOUT_PERIOD;
		*scmd_3393 = q;
		if (qq != (~q & 0xff))	/* should be read/write */
			goto release;
#endif

		instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
		if (instance == NULL)
			goto release;
		instance->base = ZTWO_VADDR(address);
		instance->irq = IRQ_AMIGA_PORTS;
		instance->unique_id = z->slotaddr;

		if (gvp11_xfer_mask)
			HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask;
		else
			HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask;

		DMA(instance)->secret2 = 1;
		DMA(instance)->secret1 = 0;
		DMA(instance)->secret3 = 15;
		while (DMA(instance)->CNTR & GVP11_DMAC_BUSY)
			;
		DMA(instance)->CNTR = 0;

		DMA(instance)->BANK = 0;

		epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);

		/*
		 * Check for 14MHz SCSI clock
		 */
		regs.SASR = &(DMA(instance)->SASR);
		regs.SCMD = &(DMA(instance)->SCMD);
		HDATA(instance)->no_sync = 0xff;
		HDATA(instance)->fast = 0;
		HDATA(instance)->dma_mode = CTRL_DMA;
		wd33c93_init(instance, regs, dma_setup, dma_stop,
			     (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
						     : WD33C93_FS_12_15);

		if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
				"GVP11 SCSI", instance))
			goto unregister;
		DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
		num_gvp11++;
		continue;

unregister:
		scsi_unregister(instance);
release:
		release_mem_region(address, 256);
	}

	return num_gvp11;
}

static int gvp11_bus_reset(struct scsi_cmnd *cmd)
{
	/* FIXME perform bus-specific reset */

	/* FIXME 2: shouldn't we no-op this function (return
	   FAILED), and fall back to host reset function,
	   wd33c93_host_reset ? */

	spin_lock_irq(cmd->device->host->host_lock);
	wd33c93_host_reset(cmd);
	spin_unlock_irq(cmd->device->host->host_lock);

	return SUCCESS;
}


#define HOSTS_C

#include "gvp11.h"

static struct scsi_host_template driver_template = {
	.proc_name		= "GVP11",
	.name			= "GVP Series II SCSI",
	.detect			= gvp11_detect,
	.release		= gvp11_release,
	.queuecommand		= wd33c93_queuecommand,
	.eh_abort_handler	= wd33c93_abort,
	.eh_bus_reset_handler	= gvp11_bus_reset,
	.eh_host_reset_handler	= wd33c93_host_reset,
	.can_queue		= CAN_QUEUE,
	.this_id		= 7,
	.sg_tablesize		= SG_ALL,
	.cmd_per_lun		= CMD_PER_LUN,
	.use_clustering		= DISABLE_CLUSTERING
};


#include "scsi_module.c"

int gvp11_release(struct Scsi_Host *instance)
{
#ifdef MODULE
	DMA(instance)->CNTR = 0;
	release_mem_region(ZTWO_PADDR(instance->base), 256);
	free_irq(IRQ_AMIGA_PORTS, instance);
#endif
	return 1;
}

MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	#include <linux/types.h>
1da177e4 LT	2	#include <linux/mm.h>
5a0e3ad6	3	#include <linux/slab.h>
1da177e4	4	#include <linux/blkdev.h>
1da177e4 LT	5	#include <linux/init.h>
	6	#include <linux/interrupt.h>
	7
	8	#include <asm/setup.h>
	9	#include <asm/page.h>
	10	#include <asm/pgtable.h>
	11	#include <asm/amigaints.h>
	12	#include <asm/amigahw.h>
	13	#include <linux/zorro.h>
	14	#include <asm/irq.h>
	15	#include <linux/spinlock.h>
	16
	17	#include "scsi.h"
	18	#include <scsi/scsi_host.h>
	19	#include "wd33c93.h"
	20	#include "gvp11.h"
	21
bb17b787	22	#include <linux/stat.h>
1da177e4	23
1da177e4	24
bb17b787 GU	25	#define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base))
	26	#define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata))
	27
	28	static irqreturn_t gvp11_intr(int irq, void *_instance)
1da177e4	29	{
bb17b787 GU	30	unsigned long flags;
	31	unsigned int status;
	32	struct Scsi_Host instance = (struct Scsi_Host )_instance;
	33
	34	status = DMA(instance)->CNTR;
	35	if (!(status & GVP11_DMAC_INT_PENDING))
	36	return IRQ_NONE;
	37
	38	spin_lock_irqsave(instance->host_lock, flags);
	39	wd33c93_intr(instance);
	40	spin_unlock_irqrestore(instance->host_lock, flags);
	41	return IRQ_HANDLED;
1da177e4 LT	42	}
	43
	44	static int gvp11_xfer_mask = 0;
	45
bb17b787	46	void gvp11_setup(char str, int ints)
1da177e4	47	{
bb17b787	48	gvp11_xfer_mask = ints[1];
1da177e4 LT	49	}
1da177e4 LT	50
65396410	51	static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
1da177e4	52	{
bb17b787 GU	53	unsigned short cntr = GVP11_DMAC_INT_ENABLE;
	54	unsigned long addr = virt_to_bus(cmd->SCp.ptr);
	55	int bank_mask;
	56	static int scsi_alloc_out_of_range = 0;
1da177e4	57
bb17b787 GU	58	/* use bounce buffer if the physical address is bad */
	59	if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
	60	HDATA(cmd->device->host)->dma_bounce_len =
	61	(cmd->SCp.this_residual + 511) & ~0x1ff;
	62
	63	if (!scsi_alloc_out_of_range) {
	64	HDATA(cmd->device->host)->dma_bounce_buffer =
	65	kmalloc(HDATA(cmd->device->host)->dma_bounce_len,
	66	GFP_KERNEL);
	67	HDATA(cmd->device->host)->dma_buffer_pool =
	68	BUF_SCSI_ALLOCED;
	69	}
1da177e4	70
bb17b787 GU	71	if (scsi_alloc_out_of_range \|\|
	72	!HDATA(cmd->device->host)->dma_bounce_buffer) {
	73	HDATA(cmd->device->host)->dma_bounce_buffer =
	74	amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
	75	"GVP II SCSI Bounce Buffer");
1da177e4	76
bb17b787 GU	77	if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
	78	HDATA(cmd->device->host)->dma_bounce_len = 0;
	79	return 1;
	80	}
1da177e4	81
bb17b787 GU	82	HDATA(cmd->device->host)->dma_buffer_pool =
	83	BUF_CHIP_ALLOCED;
	84	}
1da177e4	85
bb17b787 GU	86	/* check if the address of the bounce buffer is OK */
	87	addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
	88
	89	if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
	90	/* fall back to Chip RAM if address out of range */
	91	if (HDATA(cmd->device->host)->dma_buffer_pool ==
	92	BUF_SCSI_ALLOCED) {
	93	kfree(HDATA(cmd->device->host)->dma_bounce_buffer);
	94	scsi_alloc_out_of_range = 1;
	95	} else {
	96	amiga_chip_free(HDATA(cmd->device->host)->dma_bounce_buffer);
	97	}
	98
	99	HDATA(cmd->device->host)->dma_bounce_buffer =
	100	amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
	101	"GVP II SCSI Bounce Buffer");
	102
	103	if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
	104	HDATA(cmd->device->host)->dma_bounce_len = 0;
	105	return 1;
	106	}
	107
	108	addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
	109	HDATA(cmd->device->host)->dma_buffer_pool =
	110	BUF_CHIP_ALLOCED;
	111	}
	112
	113	if (!dir_in) {
	114	/* copy to bounce buffer for a write */
	115	memcpy(HDATA(cmd->device->host)->dma_bounce_buffer,
	116	cmd->SCp.ptr, cmd->SCp.this_residual);
	117	}
1da177e4	118	}
1da177e4	119
bb17b787 GU	120	/* setup dma direction */
	121	if (!dir_in)
	122	cntr \|= GVP11_DMAC_DIR_WRITE;
1da177e4	123
bb17b787 GU	124	HDATA(cmd->device->host)->dma_dir = dir_in;
bb17b787 GU	125	DMA(cmd->device->host)->CNTR = cntr;
1da177e4	126
bb17b787 GU	127	/* setup DMA physical address */
bb17b787 GU	128	DMA(cmd->device->host)->ACR = addr;
1da177e4	129
bb17b787 GU	130	if (dir_in) {
	131	/* invalidate any cache */
	132	cache_clear(addr, cmd->SCp.this_residual);
	133	} else {
	134	/* push any dirty cache */
	135	cache_push(addr, cmd->SCp.this_residual);
	136	}
1da177e4	137
bb17b787 GU	138	if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0))
bb17b787 GU	139	DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18);
1da177e4	140
bb17b787 GU	141	/* start DMA */
bb17b787 GU	142	DMA(cmd->device->host)->ST_DMA = 1;
1da177e4	143
bb17b787 GU	144	/* return success */
bb17b787 GU	145	return 0;
1da177e4 LT	146	}
1da177e4 LT	147
65396410 HK	148	static void dma_stop(struct Scsi_Host instance, struct scsi_cmnd SCpnt,
65396410 HK	149	int status)
1da177e4	150	{
bb17b787 GU	151	/* stop DMA */
	152	DMA(instance)->SP_DMA = 1;
	153	/* remove write bit from CONTROL bits */
	154	DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
	155
	156	/* copy from a bounce buffer, if necessary */
	157	if (status && HDATA(instance)->dma_bounce_buffer) {
	158	if (HDATA(instance)->dma_dir && SCpnt)
	159	memcpy(SCpnt->SCp.ptr,
	160	HDATA(instance)->dma_bounce_buffer,
	161	SCpnt->SCp.this_residual);
	162
	163	if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED)
	164	kfree(HDATA(instance)->dma_bounce_buffer);
	165	else
	166	amiga_chip_free(HDATA(instance)->dma_bounce_buffer);
	167
	168	HDATA(instance)->dma_bounce_buffer = NULL;
	169	HDATA(instance)->dma_bounce_len = 0;
	170	}
1da177e4 LT	171	}
	172
	173	#define CHECK_WD33C93
	174
d0be4a7d	175	int __init gvp11_detect(struct scsi_host_template *tpnt)
1da177e4	176	{
bb17b787 GU	177	static unsigned char called = 0;
	178	struct Scsi_Host *instance;
	179	unsigned long address;
	180	unsigned int epc;
	181	struct zorro_dev *z = NULL;
	182	unsigned int default_dma_xfer_mask;
	183	wd33c93_regs regs;
	184	int num_gvp11 = 0;
1da177e4	185	#ifdef CHECK_WD33C93
bb17b787 GU	186	volatile unsigned char sasr_3393, scmd_3393;
	187	unsigned char save_sasr;
	188	unsigned char q, qq;
1da177e4 LT	189	#endif
1da177e4 LT	190
bb17b787 GU	191	if (!MACH_IS_AMIGA \|\| called)
	192	return 0;
	193	called = 1;
	194
	195	tpnt->proc_name = "GVP11";
	196	tpnt->proc_info = &wd33c93_proc_info;
	197
	198	while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
	199	/*
	200	* This should (hopefully) be the correct way to identify
	201	* all the different GVP SCSI controllers (except for the
	202	* SERIES I though).
	203	*/
	204
	205	if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI \|\|
	206	z->id == ZORRO_PROD_GVP_SERIES_II)
	207	default_dma_xfer_mask = ~0x00ffffff;
	208	else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI \|\|
	209	z->id == ZORRO_PROD_GVP_A530_SCSI \|\|
	210	z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
	211	default_dma_xfer_mask = ~0x01ffffff;
	212	else if (z->id == ZORRO_PROD_GVP_A1291 \|\|
	213	z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
	214	default_dma_xfer_mask = ~0x07ffffff;
	215	else
	216	continue;
	217
	218	/*
	219	* Rumors state that some GVP ram boards use the same product
	220	* code as the SCSI controllers. Therefore if the board-size
	221	* is not 64KB we asume it is a ram board and bail out.
	222	*/
	223	if (z->resource.end - z->resource.start != 0xffff)
	224	continue;
	225
	226	address = z->resource.start;
	227	if (!request_mem_region(address, 256, "wd33c93"))
	228	continue;
1da177e4 LT	229
	230	#ifdef CHECK_WD33C93
	231
bb17b787 GU	232	/*
	233	* These darn GVP boards are a problem - it can be tough to tell
	234	* whether or not they include a SCSI controller. This is the
	235	* ultimate Yet-Another-GVP-Detection-Hack in that it actually
	236	* probes for a WD33c93 chip: If we find one, it's extremely
	237	* likely that this card supports SCSI, regardless of Product_
	238	* Code, Board_Size, etc.
	239	*/
	240
	241	/* Get pointers to the presumed register locations and save contents */
	242
	243	sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
	244	scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
	245	save_sasr = *sasr_3393;
	246
	247	/* First test the AuxStatus Reg */
	248
	249	q = sasr_3393; / read it */
	250	if (q & 0x08) /* bit 3 should always be clear */
	251	goto release;
	252	sasr_3393 = WD_AUXILIARY_STATUS; / setup indirect address */
	253	if (sasr_3393 == WD_AUXILIARY_STATUS) { / shouldn't retain the write */
	254	sasr_3393 = save_sasr; / Oops - restore this byte */
	255	goto release;
1da177e4	256	}
bb17b787 GU	257	if (sasr_3393 != q) { / should still read the same */
	258	sasr_3393 = save_sasr; / Oops - restore this byte */
	259	goto release;
1da177e4	260	}
bb17b787 GU	261	if (scmd_3393 != q) / and so should the image at 0x1f */
	262	goto release;
	263
	264	/*
	265	* Ok, we probably have a wd33c93, but let's check a few other places
	266	* for good measure. Make sure that this works for both 'A and 'B
	267	* chip versions.
	268	*/
	269
	270	*sasr_3393 = WD_SCSI_STATUS;
	271	q = *scmd_3393;
	272	*sasr_3393 = WD_SCSI_STATUS;
	273	*scmd_3393 = ~q;
	274	*sasr_3393 = WD_SCSI_STATUS;
	275	qq = *scmd_3393;
	276	*sasr_3393 = WD_SCSI_STATUS;
	277	*scmd_3393 = q;
	278	if (qq != q) /* should be read only */
	279	goto release;
	280	sasr_3393 = 0x1e; / this register is unimplemented */
	281	q = *scmd_3393;
	282	*sasr_3393 = 0x1e;
	283	*scmd_3393 = ~q;
	284	*sasr_3393 = 0x1e;
	285	qq = *scmd_3393;
	286	*sasr_3393 = 0x1e;
	287	*scmd_3393 = q;
	288	if (qq != q \|\| qq != 0xff) /* should be read only, all 1's */
	289	goto release;
	290	*sasr_3393 = WD_TIMEOUT_PERIOD;
	291	q = *scmd_3393;
	292	*sasr_3393 = WD_TIMEOUT_PERIOD;
	293	*scmd_3393 = ~q;
	294	*sasr_3393 = WD_TIMEOUT_PERIOD;
	295	qq = *scmd_3393;
	296	*sasr_3393 = WD_TIMEOUT_PERIOD;
	297	*scmd_3393 = q;
	298	if (qq != (~q & 0xff)) /* should be read/write */
	299	goto release;
1da177e4 LT	300	#endif
1da177e4 LT	301
bb17b787 GU	302	instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
	303	if (instance == NULL)
	304	goto release;
	305	instance->base = ZTWO_VADDR(address);
	306	instance->irq = IRQ_AMIGA_PORTS;
	307	instance->unique_id = z->slotaddr;
	308
	309	if (gvp11_xfer_mask)
	310	HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask;
	311	else
	312	HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask;
	313
	314	DMA(instance)->secret2 = 1;
	315	DMA(instance)->secret1 = 0;
	316	DMA(instance)->secret3 = 15;
	317	while (DMA(instance)->CNTR & GVP11_DMAC_BUSY)
	318	;
	319	DMA(instance)->CNTR = 0;
	320
	321	DMA(instance)->BANK = 0;
	322
	323	epc = (unsigned short )(ZTWO_VADDR(address) + 0x8000);
	324
	325	/*
	326	* Check for 14MHz SCSI clock
	327	*/
	328	regs.SASR = &(DMA(instance)->SASR);
	329	regs.SCMD = &(DMA(instance)->SCMD);
	330	HDATA(instance)->no_sync = 0xff;
	331	HDATA(instance)->fast = 0;
	332	HDATA(instance)->dma_mode = CTRL_DMA;
	333	wd33c93_init(instance, regs, dma_setup, dma_stop,
	334	(epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
	335	: WD33C93_FS_12_15);
	336
	337	if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
	338	"GVP11 SCSI", instance))
	339	goto unregister;
	340	DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
	341	num_gvp11++;
	342	continue;
1da177e4	343
d38f47a9	344	unregister:
bb17b787	345	scsi_unregister(instance);
1da177e4	346	release:
bb17b787 GU	347	release_mem_region(address, 256);
bb17b787 GU	348	}
1da177e4	349
bb17b787	350	return num_gvp11;
1da177e4 LT	351	}
1da177e4 LT	352
65396410	353	static int gvp11_bus_reset(struct scsi_cmnd *cmd)
1da177e4 LT	354	{
1da177e4 LT	355	/* FIXME perform bus-specific reset */
68b3aa7c	356
df0ae249 JG	357	/* FIXME 2: shouldn't we no-op this function (return
	358	FAILED), and fall back to host reset function,
	359	wd33c93_host_reset ? */
	360
68b3aa7c	361	spin_lock_irq(cmd->device->host->host_lock);
1da177e4	362	wd33c93_host_reset(cmd);
68b3aa7c JG	363	spin_unlock_irq(cmd->device->host->host_lock);
68b3aa7c JG	364
1da177e4 LT	365	return SUCCESS;
	366	}
	367
	368
	369	#define HOSTS_C
	370
	371	#include "gvp11.h"
	372
d0be4a7d	373	static struct scsi_host_template driver_template = {
1da177e4 LT	374	.proc_name = "GVP11",
	375	.name = "GVP Series II SCSI",
	376	.detect = gvp11_detect,
	377	.release = gvp11_release,
	378	.queuecommand = wd33c93_queuecommand,
	379	.eh_abort_handler = wd33c93_abort,
	380	.eh_bus_reset_handler = gvp11_bus_reset,
	381	.eh_host_reset_handler = wd33c93_host_reset,
	382	.can_queue = CAN_QUEUE,
	383	.this_id = 7,
	384	.sg_tablesize = SG_ALL,
	385	.cmd_per_lun = CMD_PER_LUN,
	386	.use_clustering = DISABLE_CLUSTERING
	387	};
	388
	389
	390	#include "scsi_module.c"
	391
	392	int gvp11_release(struct Scsi_Host *instance)
	393	{
	394	#ifdef MODULE
bb17b787 GU	395	DMA(instance)->CNTR = 0;
	396	release_mem_region(ZTWO_PADDR(instance->base), 256);
	397	free_irq(IRQ_AMIGA_PORTS, instance);
1da177e4	398	#endif
bb17b787	399	return 1;
1da177e4 LT	400	}
	401
	402	MODULE_LICENSE("GPL");