[net-next-2.6.git] / drivers / scsi / bfa / bfi.h

/*
 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
 * All rights reserved
 * www.brocade.com
 *
 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License (GPL) Version 2 as
 * published by the Free Software Foundation
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */

#ifndef __BFI_H__
#define __BFI_H__

#include "bfa_defs.h"
#include "bfa_defs_svc.h"

#pragma pack(1)

/*
 * BFI FW image type
 */
#define	BFI_FLASH_CHUNK_SZ			256	/*  Flash chunk size */
#define	BFI_FLASH_CHUNK_SZ_WORDS	(BFI_FLASH_CHUNK_SZ/sizeof(u32))
enum {
	BFI_IMAGE_CB_FC,
	BFI_IMAGE_CT_FC,
	BFI_IMAGE_CT_CNA,
	BFI_IMAGE_MAX,
};

/*
 * Msg header common to all msgs
 */
struct bfi_mhdr_s {
	u8		msg_class;	/*  @ref bfi_mclass_t		    */
	u8		msg_id;		/*  msg opcode with in the class   */
	union {
		struct {
			u8	rsvd;
			u8	lpu_id;	/*  msg destination		    */
		} h2i;
		u16	i2htok;	/*  token in msgs to host	    */
	} mtag;
};

#define bfi_h2i_set(_mh, _mc, _op, _lpuid) do {		\
	(_mh).msg_class		= (_mc);      \
	(_mh).msg_id		= (_op);      \
	(_mh).mtag.h2i.lpu_id	= (_lpuid);      \
} while (0)

#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {		\
	(_mh).msg_class		= (_mc);      \
	(_mh).msg_id		= (_op);      \
	(_mh).mtag.i2htok	= (_i2htok);      \
} while (0)

/*
 * Message opcodes: 0-127 to firmware, 128-255 to host
 */
#define BFI_I2H_OPCODE_BASE	128
#define BFA_I2HM(_x)		((_x) + BFI_I2H_OPCODE_BASE)

/*
 ****************************************************************************
 *
 * Scatter Gather Element and Page definition
 *
 ****************************************************************************
 */

#define BFI_SGE_INLINE	1
#define BFI_SGE_INLINE_MAX	(BFI_SGE_INLINE + 1)

/*
 * SG Flags
 */
enum {
	BFI_SGE_DATA		= 0,	/*  data address, not last	     */
	BFI_SGE_DATA_CPL	= 1,	/*  data addr, last in current page */
	BFI_SGE_DATA_LAST	= 3,	/*  data address, last		     */
	BFI_SGE_LINK		= 2,	/*  link address		     */
	BFI_SGE_PGDLEN		= 2,	/*  cumulative data length for page */
};

/*
 * DMA addresses
 */
union bfi_addr_u {
	struct {
		u32	addr_lo;
		u32	addr_hi;
	} a32;
};

/*
 * Scatter Gather Element
 */
struct bfi_sge_s {
#ifdef __BIGENDIAN
	u32	flags:2,
			rsvd:2,
			sg_len:28;
#else
	u32	sg_len:28,
			rsvd:2,
			flags:2;
#endif
	union bfi_addr_u sga;
};

/*
 * Scatter Gather Page
 */
#define BFI_SGPG_DATA_SGES		7
#define BFI_SGPG_SGES_MAX		(BFI_SGPG_DATA_SGES + 1)
#define BFI_SGPG_RSVD_WD_LEN	8
struct bfi_sgpg_s {
	struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
	u32	rsvd[BFI_SGPG_RSVD_WD_LEN];
};

/*
 * Large Message structure - 128 Bytes size Msgs
 */
#define BFI_LMSG_SZ		128
#define BFI_LMSG_PL_WSZ	\
			((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)

struct bfi_msg_s {
	struct bfi_mhdr_s mhdr;
	u32	pl[BFI_LMSG_PL_WSZ];
};

/*
 * Mailbox message structure
 */
#define BFI_MBMSG_SZ		7
struct bfi_mbmsg_s {
	struct bfi_mhdr_s	mh;
	u32		pl[BFI_MBMSG_SZ];
};

/*
 * Message Classes
 */
enum bfi_mclass {
	BFI_MC_IOC		= 1,	/*  IO Controller (IOC)	    */
	BFI_MC_FCPORT		= 5,	/*  FC port			    */
	BFI_MC_IOCFC		= 6,	/*  FC - IO Controller (IOC)	    */
	BFI_MC_LL               = 7,    /*  Link Layer                      */
	BFI_MC_UF		= 8,	/*  Unsolicited frame receive	    */
	BFI_MC_FCXP		= 9,	/*  FC Transport		    */
	BFI_MC_LPS		= 10,	/*  lport fc login services	    */
	BFI_MC_RPORT		= 11,	/*  Remote port		    */
	BFI_MC_ITNIM		= 12,	/*  I-T nexus (Initiator mode)	    */
	BFI_MC_IOIM_READ	= 13,	/*  read IO (Initiator mode)	    */
	BFI_MC_IOIM_WRITE	= 14,	/*  write IO (Initiator mode)	    */
	BFI_MC_IOIM_IO		= 15,	/*  IO (Initiator mode)	    */
	BFI_MC_IOIM		= 16,	/*  IO (Initiator mode)	    */
	BFI_MC_IOIM_IOCOM	= 17,	/*  good IO completion		    */
	BFI_MC_TSKIM		= 18,	/*  Initiator Task management	    */
	BFI_MC_PORT		= 21,	/*  Physical port		    */
	BFI_MC_MAX		= 32
};

#define BFI_IOC_MAX_CQS		4
#define BFI_IOC_MAX_CQS_ASIC	8
#define BFI_IOC_MSGLEN_MAX	32	/* 32 bytes */

#define BFI_BOOT_TYPE_OFF		8
#define BFI_BOOT_LOADER_OFF		12

#define BFI_BOOT_TYPE_NORMAL		0
#define	BFI_BOOT_TYPE_FLASH		1
#define	BFI_BOOT_TYPE_MEMTEST		2

#define BFI_BOOT_LOADER_OS		0
#define BFI_BOOT_LOADER_BIOS		1
#define BFI_BOOT_LOADER_UEFI		2

/*
 *----------------------------------------------------------------------
 *				IOC
 *----------------------------------------------------------------------
 */

enum bfi_ioc_h2i_msgs {
	BFI_IOC_H2I_ENABLE_REQ		= 1,
	BFI_IOC_H2I_DISABLE_REQ		= 2,
	BFI_IOC_H2I_GETATTR_REQ		= 3,
	BFI_IOC_H2I_DBG_SYNC		= 4,
	BFI_IOC_H2I_DBG_DUMP		= 5,
};

enum bfi_ioc_i2h_msgs {
	BFI_IOC_I2H_ENABLE_REPLY	= BFA_I2HM(1),
	BFI_IOC_I2H_DISABLE_REPLY	= BFA_I2HM(2),
	BFI_IOC_I2H_GETATTR_REPLY	= BFA_I2HM(3),
	BFI_IOC_I2H_READY_EVENT		= BFA_I2HM(4),
	BFI_IOC_I2H_HBEAT		= BFA_I2HM(5),
};

/*
 * BFI_IOC_H2I_GETATTR_REQ message
 */
struct bfi_ioc_getattr_req_s {
	struct bfi_mhdr_s	mh;
	union bfi_addr_u	attr_addr;
};

struct bfi_ioc_attr_s {
	wwn_t		mfg_pwwn;	/*  Mfg port wwn	   */
	wwn_t		mfg_nwwn;	/*  Mfg node wwn	   */
	mac_t		mfg_mac;	/*  Mfg mac		   */
	u16	rsvd_a;
	wwn_t		pwwn;
	wwn_t		nwwn;
	mac_t		mac;		/*  PBC or Mfg mac	   */
	u16	rsvd_b;
	mac_t		fcoe_mac;
	u16	rsvd_c;
	char		brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
	u8		pcie_gen;
	u8		pcie_lanes_orig;
	u8		pcie_lanes;
	u8		rx_bbcredit;	/*  receive buffer credits */
	u32	adapter_prop;	/*  adapter properties     */
	u16	maxfrsize;	/*  max receive frame size */
	char		asic_rev;
	u8		rsvd_d;
	char		fw_version[BFA_VERSION_LEN];
	char		optrom_version[BFA_VERSION_LEN];
	struct		bfa_mfg_vpd_s	vpd;
	u32	card_type;	/*  card type			*/
};

/*
 * BFI_IOC_I2H_GETATTR_REPLY message
 */
struct bfi_ioc_getattr_reply_s {
	struct	bfi_mhdr_s	mh;	/*  Common msg header		*/
	u8			status;	/*  cfg reply status		*/
	u8			rsvd[3];
};

/*
 * Firmware memory page offsets
 */
#define BFI_IOC_SMEM_PG0_CB	(0x40)
#define BFI_IOC_SMEM_PG0_CT	(0x180)

/*
 * Firmware statistic offset
 */
#define BFI_IOC_FWSTATS_OFF	(0x6B40)
#define BFI_IOC_FWSTATS_SZ	(4096)

/*
 * Firmware trace offset
 */
#define BFI_IOC_TRC_OFF		(0x4b00)
#define BFI_IOC_TRC_ENTS	256

#define BFI_IOC_FW_SIGNATURE	(0xbfadbfad)
#define BFI_IOC_MD5SUM_SZ	4
struct bfi_ioc_image_hdr_s {
	u32	signature;	/*  constant signature */
	u32	rsvd_a;
	u32	exec;		/*  exec vector	*/
	u32	param;		/*  parameters		*/
	u32	rsvd_b[4];
	u32	md5sum[BFI_IOC_MD5SUM_SZ];
};

/*
 *  BFI_IOC_I2H_READY_EVENT message
 */
struct bfi_ioc_rdy_event_s {
	struct bfi_mhdr_s	mh;		/*  common msg header */
	u8			init_status;	/*  init event status */
	u8			rsvd[3];
};

struct bfi_ioc_hbeat_s {
	struct bfi_mhdr_s  mh;		/*  common msg header		*/
	u32	   hb_count;	/*  current heart beat count	*/
};

/*
 * IOC hardware/firmware state
 */
enum bfi_ioc_state {
	BFI_IOC_UNINIT		= 0,	/*  not initialized		     */
	BFI_IOC_INITING		= 1,	/*  h/w is being initialized	     */
	BFI_IOC_HWINIT		= 2,	/*  h/w is initialized		     */
	BFI_IOC_CFG		= 3,	/*  IOC configuration in progress   */
	BFI_IOC_OP		= 4,	/*  IOC is operational		     */
	BFI_IOC_DISABLING	= 5,	/*  IOC is being disabled	     */
	BFI_IOC_DISABLED	= 6,	/*  IOC is disabled		     */
	BFI_IOC_CFG_DISABLED	= 7,	/*  IOC is being disabled;transient */
	BFI_IOC_FAIL		= 8,	/*  IOC heart-beat failure	     */
	BFI_IOC_MEMTEST		= 9,	/*  IOC is doing memtest	     */
};

#define BFI_IOC_ENDIAN_SIG  0x12345678

enum {
	BFI_ADAPTER_TYPE_FC	= 0x01,		/*  FC adapters	   */
	BFI_ADAPTER_TYPE_MK	= 0x0f0000,	/*  adapter type mask     */
	BFI_ADAPTER_TYPE_SH	= 16,	        /*  adapter type shift    */
	BFI_ADAPTER_NPORTS_MK	= 0xff00,	/*  number of ports mask  */
	BFI_ADAPTER_NPORTS_SH	= 8,	        /*  number of ports shift */
	BFI_ADAPTER_SPEED_MK	= 0xff,		/*  adapter speed mask    */
	BFI_ADAPTER_SPEED_SH	= 0,	        /*  adapter speed shift   */
	BFI_ADAPTER_PROTO	= 0x100000,	/*  prototype adapaters   */
	BFI_ADAPTER_TTV		= 0x200000,	/*  TTV debug capable     */
	BFI_ADAPTER_UNSUPP	= 0x400000,	/*  unknown adapter type  */
};

#define BFI_ADAPTER_GETP(__prop, __adap_prop)			\
	(((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >>	\
		BFI_ADAPTER_ ## __prop ## _SH)
#define BFI_ADAPTER_SETP(__prop, __val)				\
	((__val) << BFI_ADAPTER_ ## __prop ## _SH)
#define BFI_ADAPTER_IS_PROTO(__adap_type)			\
	((__adap_type) & BFI_ADAPTER_PROTO)
#define BFI_ADAPTER_IS_TTV(__adap_type)				\
	((__adap_type) & BFI_ADAPTER_TTV)
#define BFI_ADAPTER_IS_UNSUPP(__adap_type)			\
	((__adap_type) & BFI_ADAPTER_UNSUPP)
#define BFI_ADAPTER_IS_SPECIAL(__adap_type)			\
	((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO |	\
			BFI_ADAPTER_UNSUPP))

/*
 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
 */
struct bfi_ioc_ctrl_req_s {
	struct bfi_mhdr_s	mh;
	u8			ioc_class;
	u8			rsvd[3];
	u32		tv_sec;
};
#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;

/*
 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
 */
struct bfi_ioc_ctrl_reply_s {
	struct bfi_mhdr_s	mh;		/*  Common msg header     */
	u8			status;		/*  enable/disable status */
	u8			rsvd[3];
};
#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;

#define BFI_IOC_MSGSZ   8
/*
 * H2I Messages
 */
union bfi_ioc_h2i_msg_u {
	struct bfi_mhdr_s		mh;
	struct bfi_ioc_ctrl_req_s	enable_req;
	struct bfi_ioc_ctrl_req_s	disable_req;
	struct bfi_ioc_getattr_req_s	getattr_req;
	u32			mboxmsg[BFI_IOC_MSGSZ];
};

/*
 * I2H Messages
 */
union bfi_ioc_i2h_msg_u {
	struct bfi_mhdr_s		mh;
	struct bfi_ioc_rdy_event_s	rdy_event;
	u32			mboxmsg[BFI_IOC_MSGSZ];
};


/*
 *----------------------------------------------------------------------
 *				PBC
 *----------------------------------------------------------------------
 */

#define BFI_PBC_MAX_BLUNS	8
#define BFI_PBC_MAX_VPORTS	16

/*
 * PBC boot lun configuration
 */
struct bfi_pbc_blun_s {
	wwn_t		tgt_pwwn;
	lun_t		tgt_lun;
};

/*
 * PBC virtual port configuration
 */
struct bfi_pbc_vport_s {
	wwn_t		vp_pwwn;
	wwn_t		vp_nwwn;
};

/*
 * BFI pre-boot configuration information
 */
struct bfi_pbc_s {
	u8		port_enabled;
	u8		boot_enabled;
	u8		nbluns;
	u8		nvports;
	u8		port_speed;
	u8		rsvd_a;
	u16	hss;
	wwn_t		pbc_pwwn;
	wwn_t		pbc_nwwn;
	struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
	struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
};

/*
 *----------------------------------------------------------------------
 *				MSGQ
 *----------------------------------------------------------------------
 */
#define BFI_MSGQ_FULL(_q)	(((_q->pi + 1) % _q->q_depth) == _q->ci)
#define BFI_MSGQ_EMPTY(_q)	(_q->pi == _q->ci)
#define BFI_MSGQ_UPDATE_CI(_q)	(_q->ci = (_q->ci + 1) % _q->q_depth)
#define BFI_MSGQ_UPDATE_PI(_q)	(_q->pi = (_q->pi + 1) % _q->q_depth)

/* q_depth must be power of 2 */
#define BFI_MSGQ_FREE_CNT(_q)	((_q->ci - _q->pi - 1) & (_q->q_depth - 1))

enum bfi_msgq_h2i_msgs_e {
	BFI_MSGQ_H2I_INIT_REQ	= 1,
	BFI_MSGQ_H2I_DOORBELL	= 2,
	BFI_MSGQ_H2I_SHUTDOWN	= 3,
};

enum bfi_msgq_i2h_msgs_e {
	BFI_MSGQ_I2H_INIT_RSP	= 1,
	BFI_MSGQ_I2H_DOORBELL	= 2,
};


/* Messages(commands/responsed/AENS will have the following header */
struct bfi_msgq_mhdr_s {
	u8		msg_class;
	u8		msg_id;
	u16	msg_token;
	u16	num_entries;
	u8		enet_id;
	u8		rsvd[1];
};

#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {        \
	(_mh).msg_class		= (_mc);      \
	(_mh).msg_id		= (_mid);      \
	(_mh).msg_token		= (_tok);      \
	(_mh).enet_id		= (_enet_id);      \
} while (0)

/*
 * Mailbox  for messaging interface
 *
*/
#define BFI_MSGQ_CMD_ENTRY_SIZE		(64)    /* TBD */
#define BFI_MSGQ_RSP_ENTRY_SIZE		(64)    /* TBD */
#define BFI_MSGQ_MSG_SIZE_MAX		(2048)  /* TBD */

struct bfi_msgq_s {
	union bfi_addr_u addr;
	u16 q_depth;     /* Total num of entries in the queue */
	u8 rsvd[2];
};

/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
struct bfi_msgq_cfg_req_s {
	struct bfi_mhdr_s mh;
	struct bfi_msgq_s cmdq;
	struct bfi_msgq_s rspq;
};

/* BFI_ENET_MSGQ_CFG_RSP */
struct bfi_msgq_cfg_rsp_s {
	struct bfi_mhdr_s mh;
	u8 cmd_status;
	u8 rsvd[3];
};


/* BFI_MSGQ_H2I_DOORBELL */
struct bfi_msgq_h2i_db_s {
	struct bfi_mhdr_s mh;
	u16 cmdq_pi;
	u16 rspq_ci;
};

/* BFI_MSGQ_I2H_DOORBELL */
struct bfi_msgq_i2h_db_s {
	struct bfi_mhdr_s mh;
	u16 rspq_pi;
	u16 cmdq_ci;
};

#pragma pack()

/* BFI port specific */
#pragma pack(1)

enum bfi_port_h2i {
	BFI_PORT_H2I_ENABLE_REQ         = (1),
	BFI_PORT_H2I_DISABLE_REQ        = (2),
	BFI_PORT_H2I_GET_STATS_REQ      = (3),
	BFI_PORT_H2I_CLEAR_STATS_REQ    = (4),
};

enum bfi_port_i2h {
	BFI_PORT_I2H_ENABLE_RSP         = BFA_I2HM(1),
	BFI_PORT_I2H_DISABLE_RSP        = BFA_I2HM(2),
	BFI_PORT_I2H_GET_STATS_RSP      = BFA_I2HM(3),
	BFI_PORT_I2H_CLEAR_STATS_RSP    = BFA_I2HM(4),
};

/*
 * Generic REQ type
 */
struct bfi_port_generic_req_s {
	struct bfi_mhdr_s  mh;          /*  msg header		*/
	u32     msgtag;         /*  msgtag for reply                */
	u32     rsvd;
};

/*
 * Generic RSP type
 */
struct bfi_port_generic_rsp_s {
	struct bfi_mhdr_s  mh;          /*  common msg header               */
	u8              status;         /*  port enable status              */
	u8              rsvd[3];
	u32     msgtag;         /*  msgtag for reply                */
};

/*
 * BFI_PORT_H2I_GET_STATS_REQ
 */
struct bfi_port_get_stats_req_s {
	struct bfi_mhdr_s  mh;          /*  common msg header               */
	union bfi_addr_u   dma_addr;
};

union bfi_port_h2i_msg_u {
	struct bfi_mhdr_s               mh;
	struct bfi_port_generic_req_s   enable_req;
	struct bfi_port_generic_req_s   disable_req;
	struct bfi_port_get_stats_req_s getstats_req;
	struct bfi_port_generic_req_s   clearstats_req;
};

union bfi_port_i2h_msg_u {
	struct bfi_mhdr_s               mh;
	struct bfi_port_generic_rsp_s   enable_rsp;
	struct bfi_port_generic_rsp_s   disable_rsp;
	struct bfi_port_generic_rsp_s   getstats_rsp;
	struct bfi_port_generic_rsp_s   clearstats_rsp;
};

#pragma pack()

#endif /* __BFI_H__ */
Commit	Line	Data
a36c61f9 KG	1	/*
	2	* Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
	3	* All rights reserved
	4	* www.brocade.com
	5	*
	6	* Linux driver for Brocade Fibre Channel Host Bus Adapter.
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License (GPL) Version 2 as
	10	* published by the Free Software Foundation
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*/
	17
	18	#ifndef __BFI_H__
	19	#define __BFI_H__
	20
	21	#include "bfa_defs.h"
	22	#include "bfa_defs_svc.h"
	23
	24	#pragma pack(1)
	25
acdc79a6	26	/*
a36c61f9 KG	27	* BFI FW image type
	28	*/
	29	#define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
	30	#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
	31	enum {
	32	BFI_IMAGE_CB_FC,
	33	BFI_IMAGE_CT_FC,
	34	BFI_IMAGE_CT_CNA,
	35	BFI_IMAGE_MAX,
	36	};
	37
acdc79a6	38	/*
a36c61f9 KG	39	* Msg header common to all msgs
	40	*/
	41	struct bfi_mhdr_s {
	42	u8 msg_class; /* @ref bfi_mclass_t */
	43	u8 msg_id; /* msg opcode with in the class */
	44	union {
	45	struct {
	46	u8 rsvd;
	47	u8 lpu_id; /* msg destination */
	48	} h2i;
	49	u16 i2htok; /* token in msgs to host */
	50	} mtag;
	51	};
	52
	53	#define bfi_h2i_set(_mh, _mc, _op, _lpuid) do { \
	54	(_mh).msg_class = (_mc); \
	55	(_mh).msg_id = (_op); \
	56	(_mh).mtag.h2i.lpu_id = (_lpuid); \
	57	} while (0)
	58
	59	#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
	60	(_mh).msg_class = (_mc); \
	61	(_mh).msg_id = (_op); \
	62	(_mh).mtag.i2htok = (_i2htok); \
	63	} while (0)
	64
	65	/*
	66	* Message opcodes: 0-127 to firmware, 128-255 to host
	67	*/
	68	#define BFI_I2H_OPCODE_BASE 128
	69	#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
	70
acdc79a6	71	/*
a36c61f9 KG	72	****************************************************************************
	73	*
	74	* Scatter Gather Element and Page definition
	75	*
	76	****************************************************************************
	77	*/
	78
	79	#define BFI_SGE_INLINE 1
	80	#define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
	81
acdc79a6	82	/*
a36c61f9 KG	83	* SG Flags
	84	*/
	85	enum {
	86	BFI_SGE_DATA = 0, /* data address, not last */
	87	BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
	88	BFI_SGE_DATA_LAST = 3, /* data address, last */
	89	BFI_SGE_LINK = 2, /* link address */
	90	BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
	91	};
	92
acdc79a6	93	/*
a36c61f9 KG	94	* DMA addresses
	95	*/
	96	union bfi_addr_u {
	97	struct {
	98	u32 addr_lo;
	99	u32 addr_hi;
	100	} a32;
	101	};
	102
acdc79a6	103	/*
a36c61f9 KG	104	* Scatter Gather Element
	105	*/
	106	struct bfi_sge_s {
	107	#ifdef __BIGENDIAN
	108	u32 flags:2,
	109	rsvd:2,
	110	sg_len:28;
	111	#else
	112	u32 sg_len:28,
	113	rsvd:2,
	114	flags:2;
	115	#endif
	116	union bfi_addr_u sga;
	117	};
	118
acdc79a6	119	/*
a36c61f9 KG	120	* Scatter Gather Page
	121	*/
	122	#define BFI_SGPG_DATA_SGES 7
	123	#define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
	124	#define BFI_SGPG_RSVD_WD_LEN 8
	125	struct bfi_sgpg_s {
	126	struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
	127	u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
	128	};
	129
	130	/*
	131	* Large Message structure - 128 Bytes size Msgs
	132	*/
	133	#define BFI_LMSG_SZ 128
	134	#define BFI_LMSG_PL_WSZ \
	135	((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
	136
	137	struct bfi_msg_s {
	138	struct bfi_mhdr_s mhdr;
	139	u32 pl[BFI_LMSG_PL_WSZ];
	140	};
	141
acdc79a6	142	/*
a36c61f9 KG	143	* Mailbox message structure
	144	*/
	145	#define BFI_MBMSG_SZ 7
	146	struct bfi_mbmsg_s {
	147	struct bfi_mhdr_s mh;
	148	u32 pl[BFI_MBMSG_SZ];
	149	};
	150
acdc79a6	151	/*
a36c61f9 KG	152	* Message Classes
	153	*/
	154	enum bfi_mclass {
	155	BFI_MC_IOC = 1, /* IO Controller (IOC) */
	156	BFI_MC_FCPORT = 5, /* FC port */
	157	BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
	158	BFI_MC_LL = 7, /* Link Layer */
	159	BFI_MC_UF = 8, /* Unsolicited frame receive */
	160	BFI_MC_FCXP = 9, /* FC Transport */
	161	BFI_MC_LPS = 10, /* lport fc login services */
	162	BFI_MC_RPORT = 11, /* Remote port */
	163	BFI_MC_ITNIM = 12, /* I-T nexus (Initiator mode) */
	164	BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
	165	BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
	166	BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
	167	BFI_MC_IOIM = 16, /* IO (Initiator mode) */
	168	BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
	169	BFI_MC_TSKIM = 18, /* Initiator Task management */
	170	BFI_MC_PORT = 21, /* Physical port */
	171	BFI_MC_MAX = 32
	172	};
	173
	174	#define BFI_IOC_MAX_CQS 4
	175	#define BFI_IOC_MAX_CQS_ASIC 8
	176	#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
	177
	178	#define BFI_BOOT_TYPE_OFF 8
	179	#define BFI_BOOT_LOADER_OFF 12
	180
	181	#define BFI_BOOT_TYPE_NORMAL 0
	182	#define BFI_BOOT_TYPE_FLASH 1
	183	#define BFI_BOOT_TYPE_MEMTEST 2
	184
	185	#define BFI_BOOT_LOADER_OS 0
	186	#define BFI_BOOT_LOADER_BIOS 1
	187	#define BFI_BOOT_LOADER_UEFI 2
	188
acdc79a6	189	/*
a36c61f9 KG	190	*----------------------------------------------------------------------
	191	* IOC
	192	*----------------------------------------------------------------------
	193	*/
	194
	195	enum bfi_ioc_h2i_msgs {
	196	BFI_IOC_H2I_ENABLE_REQ = 1,
	197	BFI_IOC_H2I_DISABLE_REQ = 2,
	198	BFI_IOC_H2I_GETATTR_REQ = 3,
	199	BFI_IOC_H2I_DBG_SYNC = 4,
	200	BFI_IOC_H2I_DBG_DUMP = 5,
	201	};
	202
	203	enum bfi_ioc_i2h_msgs {
	204	BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
	205	BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
	206	BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
	207	BFI_IOC_I2H_READY_EVENT = BFA_I2HM(4),
	208	BFI_IOC_I2H_HBEAT = BFA_I2HM(5),
	209	};
	210
acdc79a6	211	/*
a36c61f9 KG	212	* BFI_IOC_H2I_GETATTR_REQ message
	213	*/
	214	struct bfi_ioc_getattr_req_s {
	215	struct bfi_mhdr_s mh;
	216	union bfi_addr_u attr_addr;
	217	};
	218
	219	struct bfi_ioc_attr_s {
	220	wwn_t mfg_pwwn; /* Mfg port wwn */
	221	wwn_t mfg_nwwn; /* Mfg node wwn */
	222	mac_t mfg_mac; /* Mfg mac */
	223	u16 rsvd_a;
	224	wwn_t pwwn;
	225	wwn_t nwwn;
	226	mac_t mac; /* PBC or Mfg mac */
	227	u16 rsvd_b;
	228	mac_t fcoe_mac;
	229	u16 rsvd_c;
	230	char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
	231	u8 pcie_gen;
	232	u8 pcie_lanes_orig;
	233	u8 pcie_lanes;
	234	u8 rx_bbcredit; /* receive buffer credits */
	235	u32 adapter_prop; /* adapter properties */
	236	u16 maxfrsize; /* max receive frame size */
	237	char asic_rev;
	238	u8 rsvd_d;
	239	char fw_version[BFA_VERSION_LEN];
	240	char optrom_version[BFA_VERSION_LEN];
	241	struct bfa_mfg_vpd_s vpd;
	242	u32 card_type; /* card type */
	243	};
	244
acdc79a6	245	/*
a36c61f9 KG	246	* BFI_IOC_I2H_GETATTR_REPLY message
	247	*/
	248	struct bfi_ioc_getattr_reply_s {
	249	struct bfi_mhdr_s mh; /* Common msg header */
	250	u8 status; /* cfg reply status */
	251	u8 rsvd[3];
	252	};
	253
acdc79a6	254	/*
a36c61f9 KG	255	* Firmware memory page offsets
	256	*/
	257	#define BFI_IOC_SMEM_PG0_CB (0x40)
	258	#define BFI_IOC_SMEM_PG0_CT (0x180)
	259
acdc79a6	260	/*
a36c61f9 KG	261	* Firmware statistic offset
	262	*/
	263	#define BFI_IOC_FWSTATS_OFF (0x6B40)
	264	#define BFI_IOC_FWSTATS_SZ (4096)
	265
acdc79a6	266	/*
a36c61f9 KG	267	* Firmware trace offset
	268	*/
	269	#define BFI_IOC_TRC_OFF (0x4b00)
	270	#define BFI_IOC_TRC_ENTS 256
	271
	272	#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
	273	#define BFI_IOC_MD5SUM_SZ 4
	274	struct bfi_ioc_image_hdr_s {
	275	u32 signature; /* constant signature */
	276	u32 rsvd_a;
	277	u32 exec; /* exec vector */
	278	u32 param; /* parameters */
	279	u32 rsvd_b[4];
	280	u32 md5sum[BFI_IOC_MD5SUM_SZ];
	281	};
	282
acdc79a6	283	/*
a36c61f9 KG	284	* BFI_IOC_I2H_READY_EVENT message
	285	*/
	286	struct bfi_ioc_rdy_event_s {
	287	struct bfi_mhdr_s mh; /* common msg header */
	288	u8 init_status; /* init event status */
	289	u8 rsvd[3];
	290	};
	291
	292	struct bfi_ioc_hbeat_s {
	293	struct bfi_mhdr_s mh; /* common msg header */
	294	u32 hb_count; /* current heart beat count */
	295	};
	296
acdc79a6	297	/*
a36c61f9 KG	298	* IOC hardware/firmware state
	299	*/
	300	enum bfi_ioc_state {
	301	BFI_IOC_UNINIT = 0, /* not initialized */
	302	BFI_IOC_INITING = 1, /* h/w is being initialized */
	303	BFI_IOC_HWINIT = 2, /* h/w is initialized */
	304	BFI_IOC_CFG = 3, /* IOC configuration in progress */
	305	BFI_IOC_OP = 4, /* IOC is operational */
	306	BFI_IOC_DISABLING = 5, /* IOC is being disabled */
	307	BFI_IOC_DISABLED = 6, /* IOC is disabled */
	308	BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
	309	BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
	310	BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
	311	};
	312
	313	#define BFI_IOC_ENDIAN_SIG 0x12345678
	314
	315	enum {
	316	BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
	317	BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
	318	BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
	319	BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
	320	BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
	321	BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
	322	BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
	323	BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
	324	BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
	325	BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
	326	};
	327
	328	#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
	329	(((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
	330	BFI_ADAPTER_ ## __prop ## _SH)
	331	#define BFI_ADAPTER_SETP(__prop, __val) \
	332	((__val) << BFI_ADAPTER_ ## __prop ## _SH)
	333	#define BFI_ADAPTER_IS_PROTO(__adap_type) \
	334	((__adap_type) & BFI_ADAPTER_PROTO)
	335	#define BFI_ADAPTER_IS_TTV(__adap_type) \
	336	((__adap_type) & BFI_ADAPTER_TTV)
	337	#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
	338	((__adap_type) & BFI_ADAPTER_UNSUPP)
	339	#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
	340	((__adap_type) & (BFI_ADAPTER_TTV \| BFI_ADAPTER_PROTO \| \
	341	BFI_ADAPTER_UNSUPP))
	342
acdc79a6	343	/*
a36c61f9 KG	344	* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
	345	*/
	346	struct bfi_ioc_ctrl_req_s {
	347	struct bfi_mhdr_s mh;
	348	u8 ioc_class;
	349	u8 rsvd[3];
	350	u32 tv_sec;
	351	};
	352	#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
	353	#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
	354
acdc79a6	355	/*
a36c61f9 KG	356	* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
	357	*/
	358	struct bfi_ioc_ctrl_reply_s {
	359	struct bfi_mhdr_s mh; /* Common msg header */
	360	u8 status; /* enable/disable status */
	361	u8 rsvd[3];
	362	};
	363	#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
	364	#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
	365
	366	#define BFI_IOC_MSGSZ 8
acdc79a6	367	/*
a36c61f9 KG	368	* H2I Messages
	369	*/
	370	union bfi_ioc_h2i_msg_u {
	371	struct bfi_mhdr_s mh;
	372	struct bfi_ioc_ctrl_req_s enable_req;
	373	struct bfi_ioc_ctrl_req_s disable_req;
	374	struct bfi_ioc_getattr_req_s getattr_req;
	375	u32 mboxmsg[BFI_IOC_MSGSZ];
	376	};
	377
acdc79a6	378	/*
a36c61f9 KG	379	* I2H Messages
	380	*/
	381	union bfi_ioc_i2h_msg_u {
	382	struct bfi_mhdr_s mh;
	383	struct bfi_ioc_rdy_event_s rdy_event;
	384	u32 mboxmsg[BFI_IOC_MSGSZ];
	385	};
	386
	387
acdc79a6	388	/*
a36c61f9 KG	389	*----------------------------------------------------------------------
	390	* PBC
	391	*----------------------------------------------------------------------
	392	*/
	393
	394	#define BFI_PBC_MAX_BLUNS 8
	395	#define BFI_PBC_MAX_VPORTS 16
	396
acdc79a6	397	/*
a36c61f9 KG	398	* PBC boot lun configuration
	399	*/
	400	struct bfi_pbc_blun_s {
	401	wwn_t tgt_pwwn;
	402	lun_t tgt_lun;
	403	};
	404
acdc79a6	405	/*
a36c61f9 KG	406	* PBC virtual port configuration
	407	*/
	408	struct bfi_pbc_vport_s {
	409	wwn_t vp_pwwn;
	410	wwn_t vp_nwwn;
	411	};
	412
acdc79a6	413	/*
a36c61f9 KG	414	* BFI pre-boot configuration information
	415	*/
	416	struct bfi_pbc_s {
	417	u8 port_enabled;
	418	u8 boot_enabled;
	419	u8 nbluns;
	420	u8 nvports;
	421	u8 port_speed;
	422	u8 rsvd_a;
	423	u16 hss;
	424	wwn_t pbc_pwwn;
	425	wwn_t pbc_nwwn;
	426	struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
	427	struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
	428	};
	429
acdc79a6	430	/*
a36c61f9 KG	431	*----------------------------------------------------------------------
	432	* MSGQ
	433	*----------------------------------------------------------------------
	434	*/
	435	#define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
	436	#define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
	437	#define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
	438	#define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
	439
	440	/* q_depth must be power of 2 */
	441	#define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
	442
	443	enum bfi_msgq_h2i_msgs_e {
	444	BFI_MSGQ_H2I_INIT_REQ = 1,
	445	BFI_MSGQ_H2I_DOORBELL = 2,
	446	BFI_MSGQ_H2I_SHUTDOWN = 3,
	447	};
	448
	449	enum bfi_msgq_i2h_msgs_e {
	450	BFI_MSGQ_I2H_INIT_RSP = 1,
	451	BFI_MSGQ_I2H_DOORBELL = 2,
	452	};
	453
	454
	455	/* Messages(commands/responsed/AENS will have the following header */
	456	struct bfi_msgq_mhdr_s {
	457	u8 msg_class;
	458	u8 msg_id;
	459	u16 msg_token;
	460	u16 num_entries;
	461	u8 enet_id;
	462	u8 rsvd[1];
	463	};
	464
	465	#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
	466	(_mh).msg_class = (_mc); \
	467	(_mh).msg_id = (_mid); \
	468	(_mh).msg_token = (_tok); \
	469	(_mh).enet_id = (_enet_id); \
	470	} while (0)
	471
	472	/*
	473	* Mailbox for messaging interface
	474	*
	475	*/
	476	#define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
	477	#define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
	478	#define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
	479
	480	struct bfi_msgq_s {
	481	union bfi_addr_u addr;
	482	u16 q_depth; /* Total num of entries in the queue */
	483	u8 rsvd[2];
	484	};
	485
	486	/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
	487	struct bfi_msgq_cfg_req_s {
	488	struct bfi_mhdr_s mh;
	489	struct bfi_msgq_s cmdq;
	490	struct bfi_msgq_s rspq;
	491	};
	492
	493	/* BFI_ENET_MSGQ_CFG_RSP */
	494	struct bfi_msgq_cfg_rsp_s {
495	struct bfi_mhdr_s mh;
496	u8 cmd_status;
497	u8 rsvd[3];
498	};
499
500
501	/* BFI_MSGQ_H2I_DOORBELL */
502	struct bfi_msgq_h2i_db_s {
503	struct bfi_mhdr_s mh;
504	u16 cmdq_pi;
505	u16 rspq_ci;
506	};
507
508	/* BFI_MSGQ_I2H_DOORBELL */
509	struct bfi_msgq_i2h_db_s {
510	struct bfi_mhdr_s mh;
511	u16 rspq_pi;
512	u16 cmdq_ci;
513	};
514
515	#pragma pack()
516
517	/* BFI port specific */
518	#pragma pack(1)
519
520	enum bfi_port_h2i {
521	BFI_PORT_H2I_ENABLE_REQ = (1),
522	BFI_PORT_H2I_DISABLE_REQ = (2),
523	BFI_PORT_H2I_GET_STATS_REQ = (3),
524	BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
525	};
526
527	enum bfi_port_i2h {
528	BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
529	BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
530	BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
531	BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
532	};
533
acdc79a6	534	/*
a36c61f9 KG	535	* Generic REQ type
	536	*/
	537	struct bfi_port_generic_req_s {
	538	struct bfi_mhdr_s mh; /* msg header */
	539	u32 msgtag; /* msgtag for reply */
	540	u32 rsvd;
	541	};
	542
acdc79a6	543	/*
a36c61f9 KG	544	* Generic RSP type
	545	*/
	546	struct bfi_port_generic_rsp_s {
	547	struct bfi_mhdr_s mh; /* common msg header */
	548	u8 status; /* port enable status */
	549	u8 rsvd[3];
	550	u32 msgtag; /* msgtag for reply */
	551	};
	552
acdc79a6	553	/*
a36c61f9 KG	554	* BFI_PORT_H2I_GET_STATS_REQ
	555	*/
	556	struct bfi_port_get_stats_req_s {
	557	struct bfi_mhdr_s mh; /* common msg header */
	558	union bfi_addr_u dma_addr;
	559	};
	560
	561	union bfi_port_h2i_msg_u {
	562	struct bfi_mhdr_s mh;
	563	struct bfi_port_generic_req_s enable_req;
	564	struct bfi_port_generic_req_s disable_req;
	565	struct bfi_port_get_stats_req_s getstats_req;
	566	struct bfi_port_generic_req_s clearstats_req;
	567	};
	568
	569	union bfi_port_i2h_msg_u {
	570	struct bfi_mhdr_s mh;
	571	struct bfi_port_generic_rsp_s enable_rsp;
	572	struct bfi_port_generic_rsp_s disable_rsp;
	573	struct bfi_port_generic_rsp_s getstats_rsp;
	574	struct bfi_port_generic_rsp_s clearstats_rsp;
	575	};
	576
	577	#pragma pack()
	578
	579	#endif /* __BFI_H__ */