[net-next-2.6.git] / drivers / rtc / rtc-twl.c

/*
 * rtc-twl4030.c -- TWL4030 Real Time Clock interface
 *
 * Copyright (C) 2007 MontaVista Software, Inc
 * Author: Alexandre Rusev <source@mvista.com>
 *
 * Based on original TI driver twl4030-rtc.c
 *   Copyright (C) 2006 Texas Instruments, Inc.
 *
 * Based on rtc-omap.c
 *   Copyright (C) 2003 MontaVista Software, Inc.
 *   Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
 *   Copyright (C) 2006 David Brownell
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>

#include <linux/i2c/twl.h>


/*
 * RTC block register offsets (use TWL_MODULE_RTC)
 */
#define REG_SECONDS_REG                          0x00
#define REG_MINUTES_REG                          0x01
#define REG_HOURS_REG                            0x02
#define REG_DAYS_REG                             0x03
#define REG_MONTHS_REG                           0x04
#define REG_YEARS_REG                            0x05
#define REG_WEEKS_REG                            0x06

#define REG_ALARM_SECONDS_REG                    0x07
#define REG_ALARM_MINUTES_REG                    0x08
#define REG_ALARM_HOURS_REG                      0x09
#define REG_ALARM_DAYS_REG                       0x0A
#define REG_ALARM_MONTHS_REG                     0x0B
#define REG_ALARM_YEARS_REG                      0x0C

#define REG_RTC_CTRL_REG                         0x0D
#define REG_RTC_STATUS_REG                       0x0E
#define REG_RTC_INTERRUPTS_REG                   0x0F

#define REG_RTC_COMP_LSB_REG                     0x10
#define REG_RTC_COMP_MSB_REG                     0x11

/* RTC_CTRL_REG bitfields */
#define BIT_RTC_CTRL_REG_STOP_RTC_M              0x01
#define BIT_RTC_CTRL_REG_ROUND_30S_M             0x02
#define BIT_RTC_CTRL_REG_AUTO_COMP_M             0x04
#define BIT_RTC_CTRL_REG_MODE_12_24_M            0x08
#define BIT_RTC_CTRL_REG_TEST_MODE_M             0x10
#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M        0x20
#define BIT_RTC_CTRL_REG_GET_TIME_M              0x40

/* RTC_STATUS_REG bitfields */
#define BIT_RTC_STATUS_REG_RUN_M                 0x02
#define BIT_RTC_STATUS_REG_1S_EVENT_M            0x04
#define BIT_RTC_STATUS_REG_1M_EVENT_M            0x08
#define BIT_RTC_STATUS_REG_1H_EVENT_M            0x10
#define BIT_RTC_STATUS_REG_1D_EVENT_M            0x20
#define BIT_RTC_STATUS_REG_ALARM_M               0x40
#define BIT_RTC_STATUS_REG_POWER_UP_M            0x80

/* RTC_INTERRUPTS_REG bitfields */
#define BIT_RTC_INTERRUPTS_REG_EVERY_M           0x03
#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M        0x04
#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M        0x08


/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
#define ALL_TIME_REGS		6

/*----------------------------------------------------------------------*/

/*
 * Supports 1 byte read from TWL4030 RTC register.
 */
static int twl4030_rtc_read_u8(u8 *data, u8 reg)
{
	int ret;

	ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
	if (ret < 0)
		pr_err("twl4030_rtc: Could not read TWL4030"
		       "register %X - error %d\n", reg, ret);
	return ret;
}

/*
 * Supports 1 byte write to TWL4030 RTC registers.
 */
static int twl4030_rtc_write_u8(u8 data, u8 reg)
{
	int ret;

	ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
	if (ret < 0)
		pr_err("twl4030_rtc: Could not write TWL4030"
		       "register %X - error %d\n", reg, ret);
	return ret;
}

/*
 * Cache the value for timer/alarm interrupts register; this is
 * only changed by callers holding rtc ops lock (or resume).
 */
static unsigned char rtc_irq_bits;

/*
 * Enable 1/second update and/or alarm interrupts.
 */
static int set_rtc_irq_bit(unsigned char bit)
{
	unsigned char val;
	int ret;

	val = rtc_irq_bits | bit;
	val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
	if (ret == 0)
		rtc_irq_bits = val;

	return ret;
}

/*
 * Disable update and/or alarm interrupts.
 */
static int mask_rtc_irq_bit(unsigned char bit)
{
	unsigned char val;
	int ret;

	val = rtc_irq_bits & ~bit;
	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
	if (ret == 0)
		rtc_irq_bits = val;

	return ret;
}

static int twl4030_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
{
	int ret;

	if (enabled)
		ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	else
		ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);

	return ret;
}

static int twl4030_rtc_update_irq_enable(struct device *dev, unsigned enabled)
{
	int ret;

	if (enabled)
		ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
	else
		ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);

	return ret;
}

/*
 * Gets current TWL4030 RTC time and date parameters.
 *
 * The RTC's time/alarm representation is not what gmtime(3) requires
 * Linux to use:
 *
 *  - Months are 1..12 vs Linux 0-11
 *  - Years are 0..99 vs Linux 1900..N (we assume 21st century)
 */
static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	unsigned char rtc_data[ALL_TIME_REGS + 1];
	int ret;
	u8 save_control;

	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		return ret;

	save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;

	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		return ret;

	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
			       REG_SECONDS_REG, ALL_TIME_REGS);

	if (ret < 0) {
		dev_err(dev, "rtc_read_time error %d\n", ret);
		return ret;
	}

	tm->tm_sec = bcd2bin(rtc_data[0]);
	tm->tm_min = bcd2bin(rtc_data[1]);
	tm->tm_hour = bcd2bin(rtc_data[2]);
	tm->tm_mday = bcd2bin(rtc_data[3]);
	tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
	tm->tm_year = bcd2bin(rtc_data[5]) + 100;

	return ret;
}

static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned char save_control;
	unsigned char rtc_data[ALL_TIME_REGS + 1];
	int ret;

	rtc_data[1] = bin2bcd(tm->tm_sec);
	rtc_data[2] = bin2bcd(tm->tm_min);
	rtc_data[3] = bin2bcd(tm->tm_hour);
	rtc_data[4] = bin2bcd(tm->tm_mday);
	rtc_data[5] = bin2bcd(tm->tm_mon + 1);
	rtc_data[6] = bin2bcd(tm->tm_year - 100);

	/* Stop RTC while updating the TC registers */
	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		goto out;

	save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
	twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		goto out;

	/* update all the time registers in one shot */
	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
			REG_SECONDS_REG, ALL_TIME_REGS);
	if (ret < 0) {
		dev_err(dev, "rtc_set_time error %d\n", ret);
		goto out;
	}

	/* Start back RTC */
	save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);

out:
	return ret;
}

/*
 * Gets current TWL4030 RTC alarm time.
 */
static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	unsigned char rtc_data[ALL_TIME_REGS + 1];
	int ret;

	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
			       REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
	if (ret < 0) {
		dev_err(dev, "rtc_read_alarm error %d\n", ret);
		return ret;
	}

	/* some of these fields may be wildcard/"match all" */
	alm->time.tm_sec = bcd2bin(rtc_data[0]);
	alm->time.tm_min = bcd2bin(rtc_data[1]);
	alm->time.tm_hour = bcd2bin(rtc_data[2]);
	alm->time.tm_mday = bcd2bin(rtc_data[3]);
	alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
	alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;

	/* report cached alarm enable state */
	if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
		alm->enabled = 1;

	return ret;
}

static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	unsigned char alarm_data[ALL_TIME_REGS + 1];
	int ret;

	ret = twl4030_rtc_alarm_irq_enable(dev, 0);
	if (ret)
		goto out;

	alarm_data[1] = bin2bcd(alm->time.tm_sec);
	alarm_data[2] = bin2bcd(alm->time.tm_min);
	alarm_data[3] = bin2bcd(alm->time.tm_hour);
	alarm_data[4] = bin2bcd(alm->time.tm_mday);
	alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
	alarm_data[6] = bin2bcd(alm->time.tm_year - 100);

	/* update all the alarm registers in one shot */
	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
			REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
	if (ret) {
		dev_err(dev, "rtc_set_alarm error %d\n", ret);
		goto out;
	}

	if (alm->enabled)
		ret = twl4030_rtc_alarm_irq_enable(dev, 1);
out:
	return ret;
}

static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
{
	unsigned long events = 0;
	int ret = IRQ_NONE;
	int res;
	u8 rd_reg;

#ifdef CONFIG_LOCKDEP
	/* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
	 * we don't want and can't tolerate.  Although it might be
	 * friendlier not to borrow this thread context...
	 */
	local_irq_enable();
#endif

	res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
	if (res)
		goto out;
	/*
	 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
	 * only one (ALARM or RTC) interrupt source may be enabled
	 * at time, we also could check our results
	 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
	 */
	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
		events |= RTC_IRQF | RTC_AF;
	else
		events |= RTC_IRQF | RTC_UF;

	res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
				   REG_RTC_STATUS_REG);
	if (res)
		goto out;

	/* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
	 * needs 2 reads to clear the interrupt. One read is done in
	 * do_twl4030_pwrirq(). Doing the second read, to clear
	 * the bit.
	 *
	 * FIXME the reason PWR_ISR1 needs an extra read is that
	 * RTC_IF retriggered until we cleared REG_ALARM_M above.
	 * But re-reading like this is a bad hack; by doing so we
	 * risk wrongly clearing status for some other IRQ (losing
	 * the interrupt).  Be smarter about handling RTC_UF ...
	 */
	res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
			&rd_reg, TWL4030_INT_PWR_ISR1);
	if (res)
		goto out;

	/* Notify RTC core on event */
	rtc_update_irq(rtc, 1, events);

	ret = IRQ_HANDLED;
out:
	return ret;
}

static struct rtc_class_ops twl4030_rtc_ops = {
	.read_time	= twl4030_rtc_read_time,
	.set_time	= twl4030_rtc_set_time,
	.read_alarm	= twl4030_rtc_read_alarm,
	.set_alarm	= twl4030_rtc_set_alarm,
	.alarm_irq_enable = twl4030_rtc_alarm_irq_enable,
	.update_irq_enable = twl4030_rtc_update_irq_enable,
};

/*----------------------------------------------------------------------*/

static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	int ret = 0;
	int irq = platform_get_irq(pdev, 0);
	u8 rd_reg;

	if (irq <= 0)
		return -EINVAL;

	rtc = rtc_device_register(pdev->name,
				  &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc)) {
		ret = PTR_ERR(rtc);
		dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
			PTR_ERR(rtc));
		goto out0;

	}

	platform_set_drvdata(pdev, rtc);

	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
	if (ret < 0)
		goto out1;

	if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
		dev_warn(&pdev->dev, "Power up reset detected.\n");

	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
		dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");

	/* Clear RTC Power up reset and pending alarm interrupts */
	ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
	if (ret < 0)
		goto out1;

	ret = request_irq(irq, twl4030_rtc_interrupt,
				IRQF_TRIGGER_RISING,
				dev_name(&rtc->dev), rtc);
	if (ret < 0) {
		dev_err(&pdev->dev, "IRQ is not free.\n");
		goto out1;
	}

	/* Check RTC module status, Enable if it is off */
	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
	if (ret < 0)
		goto out2;

	if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
		dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
		rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
		ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
		if (ret < 0)
			goto out2;
	}

	/* init cached IRQ enable bits */
	ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
	if (ret < 0)
		goto out2;

	return ret;

out2:
	free_irq(irq, rtc);
out1:
	rtc_device_unregister(rtc);
out0:
	return ret;
}

/*
 * Disable all TWL4030 RTC module interrupts.
 * Sets status flag to free.
 */
static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
{
	/* leave rtc running, but disable irqs */
	struct rtc_device *rtc = platform_get_drvdata(pdev);
	int irq = platform_get_irq(pdev, 0);

	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);

	free_irq(irq, rtc);

	rtc_device_unregister(rtc);
	platform_set_drvdata(pdev, NULL);
	return 0;
}

static void twl4030_rtc_shutdown(struct platform_device *pdev)
{
	/* mask timer interrupts, but leave alarm interrupts on to enable
	   power-on when alarm is triggered */
	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
}

#ifdef CONFIG_PM

static unsigned char irqstat;

static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	irqstat = rtc_irq_bits;

	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
	return 0;
}

static int twl4030_rtc_resume(struct platform_device *pdev)
{
	set_rtc_irq_bit(irqstat);
	return 0;
}

#else
#define twl4030_rtc_suspend NULL
#define twl4030_rtc_resume  NULL
#endif

MODULE_ALIAS("platform:twl4030_rtc");

static struct platform_driver twl4030rtc_driver = {
	.probe		= twl4030_rtc_probe,
	.remove		= __devexit_p(twl4030_rtc_remove),
	.shutdown	= twl4030_rtc_shutdown,
	.suspend	= twl4030_rtc_suspend,
	.resume		= twl4030_rtc_resume,
	.driver		= {
		.owner	= THIS_MODULE,
		.name	= "twl4030_rtc",
	},
};

static int __init twl4030_rtc_init(void)
{
	return platform_driver_register(&twl4030rtc_driver);
}
module_init(twl4030_rtc_init);

static void __exit twl4030_rtc_exit(void)
{
	platform_driver_unregister(&twl4030rtc_driver);
}
module_exit(twl4030_rtc_exit);

MODULE_AUTHOR("Texas Instruments, MontaVista Software");
MODULE_LICENSE("GPL");
Commit	Line	Data
f96411ab DB	1	/*
	2	* rtc-twl4030.c -- TWL4030 Real Time Clock interface
	3	*
	4	* Copyright (C) 2007 MontaVista Software, Inc
	5	* Author: Alexandre Rusev <source@mvista.com>
	6	*
	7	* Based on original TI driver twl4030-rtc.c
	8	* Copyright (C) 2006 Texas Instruments, Inc.
	9	*
	10	* Based on rtc-omap.c
	11	* Copyright (C) 2003 MontaVista Software, Inc.
	12	* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
	13	* Copyright (C) 2006 David Brownell
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License
	17	* as published by the Free Software Foundation; either version
	18	* 2 of the License, or (at your option) any later version.
	19	*/
	20
	21	#include <linux/kernel.h>
2fac6674	22	#include <linux/errno.h>
f96411ab DB	23	#include <linux/init.h>
	24	#include <linux/module.h>
	25	#include <linux/types.h>
	26	#include <linux/rtc.h>
	27	#include <linux/bcd.h>
	28	#include <linux/platform_device.h>
	29	#include <linux/interrupt.h>
	30
b07682b6	31	#include <linux/i2c/twl.h>
f96411ab DB	32
	33
	34	/*
	35	* RTC block register offsets (use TWL_MODULE_RTC)
	36	*/
	37	#define REG_SECONDS_REG 0x00
	38	#define REG_MINUTES_REG 0x01
	39	#define REG_HOURS_REG 0x02
	40	#define REG_DAYS_REG 0x03
	41	#define REG_MONTHS_REG 0x04
	42	#define REG_YEARS_REG 0x05
	43	#define REG_WEEKS_REG 0x06
	44
	45	#define REG_ALARM_SECONDS_REG 0x07
	46	#define REG_ALARM_MINUTES_REG 0x08
	47	#define REG_ALARM_HOURS_REG 0x09
	48	#define REG_ALARM_DAYS_REG 0x0A
	49	#define REG_ALARM_MONTHS_REG 0x0B
	50	#define REG_ALARM_YEARS_REG 0x0C
	51
	52	#define REG_RTC_CTRL_REG 0x0D
	53	#define REG_RTC_STATUS_REG 0x0E
	54	#define REG_RTC_INTERRUPTS_REG 0x0F
	55
	56	#define REG_RTC_COMP_LSB_REG 0x10
	57	#define REG_RTC_COMP_MSB_REG 0x11
	58
	59	/* RTC_CTRL_REG bitfields */
	60	#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
	61	#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
	62	#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
	63	#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
	64	#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
	65	#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
	66	#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
	67
	68	/* RTC_STATUS_REG bitfields */
	69	#define BIT_RTC_STATUS_REG_RUN_M 0x02
	70	#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
	71	#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
	72	#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
	73	#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
	74	#define BIT_RTC_STATUS_REG_ALARM_M 0x40
	75	#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
	76
	77	/* RTC_INTERRUPTS_REG bitfields */
	78	#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
	79	#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
	80	#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
	81
	82
	83	/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
	84	#define ALL_TIME_REGS 6
	85
	86	/----------------------------------------------------------------------/
	87
	88	/*
	89	* Supports 1 byte read from TWL4030 RTC register.
	90	*/
	91	static int twl4030_rtc_read_u8(u8 *data, u8 reg)
	92	{
	93	int ret;
	94
	95	ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
96	if (ret < 0)
97	pr_err("twl4030_rtc: Could not read TWL4030"
98	"register %X - error %d\n", reg, ret);
99	return ret;
100	}
101
102	/*
103	* Supports 1 byte write to TWL4030 RTC registers.
104	*/
105	static int twl4030_rtc_write_u8(u8 data, u8 reg)
106	{
107	int ret;
108
109	ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
110	if (ret < 0)
111	pr_err("twl4030_rtc: Could not write TWL4030"
112	"register %X - error %d\n", reg, ret);
113	return ret;
114	}
115
116	/*
117	* Cache the value for timer/alarm interrupts register; this is
118	* only changed by callers holding rtc ops lock (or resume).
119	*/
120	static unsigned char rtc_irq_bits;
121
122	/*
a748384b	123	* Enable 1/second update and/or alarm interrupts.
f96411ab DB	124	*/
	125	static int set_rtc_irq_bit(unsigned char bit)
	126	{
	127	unsigned char val;
	128	int ret;
	129
	130	val = rtc_irq_bits \| bit;
a748384b	131	val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
f96411ab DB	132	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
	133	if (ret == 0)
	134	rtc_irq_bits = val;
	135
	136	return ret;
	137	}
	138
	139	/*
a748384b	140	* Disable update and/or alarm interrupts.
f96411ab DB	141	*/
	142	static int mask_rtc_irq_bit(unsigned char bit)
	143	{
	144	unsigned char val;
	145	int ret;
	146
	147	val = rtc_irq_bits & ~bit;
	148	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
	149	if (ret == 0)
	150	rtc_irq_bits = val;
	151
	152	return ret;
	153	}
	154
a748384b	155	static int twl4030_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
f96411ab DB	156	{
	157	int ret;
	158
	159	if (enabled)
	160	ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	161	else
	162	ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	163
	164	return ret;
	165	}
	166
a748384b	167	static int twl4030_rtc_update_irq_enable(struct device *dev, unsigned enabled)
f96411ab DB	168	{
	169	int ret;
	170
	171	if (enabled)
	172	ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
	173	else
	174	ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
	175
	176	return ret;
	177	}
	178
	179	/*
	180	* Gets current TWL4030 RTC time and date parameters.
	181	*
	182	* The RTC's time/alarm representation is not what gmtime(3) requires
	183	* Linux to use:
	184	*
	185	* - Months are 1..12 vs Linux 0-11
	186	* - Years are 0..99 vs Linux 1900..N (we assume 21st century)
	187	*/
	188	static int twl4030_rtc_read_time(struct device dev, struct rtc_time tm)
	189	{
	190	unsigned char rtc_data[ALL_TIME_REGS + 1];
	191	int ret;
	192	u8 save_control;
	193
	194	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
	195	if (ret < 0)
	196	return ret;
	197
	198	save_control \|= BIT_RTC_CTRL_REG_GET_TIME_M;
	199
	200	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
	201	if (ret < 0)
	202	return ret;
	203
	204	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
	205	REG_SECONDS_REG, ALL_TIME_REGS);
	206
	207	if (ret < 0) {
	208	dev_err(dev, "rtc_read_time error %d\n", ret);
	209	return ret;
	210	}
	211
	212	tm->tm_sec = bcd2bin(rtc_data[0]);
	213	tm->tm_min = bcd2bin(rtc_data[1]);
	214	tm->tm_hour = bcd2bin(rtc_data[2]);
	215	tm->tm_mday = bcd2bin(rtc_data[3]);
	216	tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
	217	tm->tm_year = bcd2bin(rtc_data[5]) + 100;
	218
	219	return ret;
	220	}
	221
	222	static int twl4030_rtc_set_time(struct device dev, struct rtc_time tm)
	223	{
	224	unsigned char save_control;
	225	unsigned char rtc_data[ALL_TIME_REGS + 1];
	226	int ret;
	227
	228	rtc_data[1] = bin2bcd(tm->tm_sec);
	229	rtc_data[2] = bin2bcd(tm->tm_min);
	230	rtc_data[3] = bin2bcd(tm->tm_hour);
	231	rtc_data[4] = bin2bcd(tm->tm_mday);
232	rtc_data[5] = bin2bcd(tm->tm_mon + 1);
233	rtc_data[6] = bin2bcd(tm->tm_year - 100);
234
235	/* Stop RTC while updating the TC registers */
236	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
237	if (ret < 0)
238	goto out;
239
240	save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
241	twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
242	if (ret < 0)
243	goto out;
244
245	/* update all the time registers in one shot */
246	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
247	REG_SECONDS_REG, ALL_TIME_REGS);
248	if (ret < 0) {
249	dev_err(dev, "rtc_set_time error %d\n", ret);
250	goto out;
251	}
252
253	/* Start back RTC */
254	save_control \|= BIT_RTC_CTRL_REG_STOP_RTC_M;
255	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
256
257	out:
258	return ret;
259	}
260
261	/*
262	* Gets current TWL4030 RTC alarm time.
263	*/
264	static int twl4030_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
265	{
266	unsigned char rtc_data[ALL_TIME_REGS + 1];
267	int ret;
268
269	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
270	REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
271	if (ret < 0) {
272	dev_err(dev, "rtc_read_alarm error %d\n", ret);
273	return ret;
274	}
275
276	/* some of these fields may be wildcard/"match all" */
277	alm->time.tm_sec = bcd2bin(rtc_data[0]);
278	alm->time.tm_min = bcd2bin(rtc_data[1]);
279	alm->time.tm_hour = bcd2bin(rtc_data[2]);
280	alm->time.tm_mday = bcd2bin(rtc_data[3]);
281	alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
282	alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
283
284	/* report cached alarm enable state */
285	if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
286	alm->enabled = 1;
287
288	return ret;
289	}
290
291	static int twl4030_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
292	{
293	unsigned char alarm_data[ALL_TIME_REGS + 1];
294	int ret;
295
a748384b	296	ret = twl4030_rtc_alarm_irq_enable(dev, 0);
f96411ab DB	297	if (ret)
	298	goto out;
	299
	300	alarm_data[1] = bin2bcd(alm->time.tm_sec);
	301	alarm_data[2] = bin2bcd(alm->time.tm_min);
	302	alarm_data[3] = bin2bcd(alm->time.tm_hour);
	303	alarm_data[4] = bin2bcd(alm->time.tm_mday);
	304	alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
	305	alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
	306
	307	/* update all the alarm registers in one shot */
	308	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
	309	REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
	310	if (ret) {
	311	dev_err(dev, "rtc_set_alarm error %d\n", ret);
	312	goto out;
	313	}
	314
	315	if (alm->enabled)
a748384b	316	ret = twl4030_rtc_alarm_irq_enable(dev, 1);
f96411ab DB	317	out:
	318	return ret;
	319	}
	320
f96411ab DB	321	static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
	322	{
	323	unsigned long events = 0;
	324	int ret = IRQ_NONE;
	325	int res;
	326	u8 rd_reg;
	327
	328	#ifdef CONFIG_LOCKDEP
	329	/* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
	330	* we don't want and can't tolerate. Although it might be
	331	* friendlier not to borrow this thread context...
	332	*/
	333	local_irq_enable();
	334	#endif
	335
	336	res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
	337	if (res)
	338	goto out;
	339	/*
	340	* Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
	341	* only one (ALARM or RTC) interrupt source may be enabled
	342	* at time, we also could check our results
	343	* by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
	344	*/
	345	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
	346	events \|= RTC_IRQF \| RTC_AF;
	347	else
	348	events \|= RTC_IRQF \| RTC_UF;
	349
	350	res = twl4030_rtc_write_u8(rd_reg \| BIT_RTC_STATUS_REG_ALARM_M,
	351	REG_RTC_STATUS_REG);
	352	if (res)
	353	goto out;
	354
	355	/* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
	356	* needs 2 reads to clear the interrupt. One read is done in
	357	* do_twl4030_pwrirq(). Doing the second read, to clear
	358	* the bit.
	359	*
	360	* FIXME the reason PWR_ISR1 needs an extra read is that
	361	* RTC_IF retriggered until we cleared REG_ALARM_M above.
	362	* But re-reading like this is a bad hack; by doing so we
	363	* risk wrongly clearing status for some other IRQ (losing
	364	* the interrupt). Be smarter about handling RTC_UF ...
	365	*/
	366	res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
	367	&rd_reg, TWL4030_INT_PWR_ISR1);
	368	if (res)
	369	goto out;
	370
	371	/* Notify RTC core on event */
	372	rtc_update_irq(rtc, 1, events);
	373
	374	ret = IRQ_HANDLED;
	375	out:
	376	return ret;
	377	}
	378
	379	static struct rtc_class_ops twl4030_rtc_ops = {
f96411ab DB	380	.read_time = twl4030_rtc_read_time,
	381	.set_time = twl4030_rtc_set_time,
	382	.read_alarm = twl4030_rtc_read_alarm,
	383	.set_alarm = twl4030_rtc_set_alarm,
a748384b AZ	384	.alarm_irq_enable = twl4030_rtc_alarm_irq_enable,
a748384b AZ	385	.update_irq_enable = twl4030_rtc_update_irq_enable,
f96411ab DB	386	};
	387
	388	/----------------------------------------------------------------------/
	389
	390	static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
	391	{
	392	struct rtc_device *rtc;
	393	int ret = 0;
	394	int irq = platform_get_irq(pdev, 0);
	395	u8 rd_reg;
	396
2fac6674 AV	397	if (irq <= 0)
2fac6674 AV	398	return -EINVAL;
f96411ab DB	399
	400	rtc = rtc_device_register(pdev->name,
	401	&pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
	402	if (IS_ERR(rtc)) {
a748384b	403	ret = PTR_ERR(rtc);
f96411ab DB	404	dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
	405	PTR_ERR(rtc));
	406	goto out0;
	407
	408	}
	409
	410	platform_set_drvdata(pdev, rtc);
	411
	412	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
f96411ab DB	413	if (ret < 0)
	414	goto out1;
	415
	416	if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
	417	dev_warn(&pdev->dev, "Power up reset detected.\n");
	418
	419	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
	420	dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
	421
	422	/* Clear RTC Power up reset and pending alarm interrupts */
	423	ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
	424	if (ret < 0)
	425	goto out1;
	426
	427	ret = request_irq(irq, twl4030_rtc_interrupt,
	428	IRQF_TRIGGER_RISING,
744bcb13	429	dev_name(&rtc->dev), rtc);
f96411ab DB	430	if (ret < 0) {
	431	dev_err(&pdev->dev, "IRQ is not free.\n");
	432	goto out1;
	433	}
	434
	435	/* Check RTC module status, Enable if it is off */
	436	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
	437	if (ret < 0)
	438	goto out2;
	439
	440	if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
	441	dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
	442	rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
	443	ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
	444	if (ret < 0)
	445	goto out2;
	446	}
	447
	448	/* init cached IRQ enable bits */
	449	ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
	450	if (ret < 0)
	451	goto out2;
	452
	453	return ret;
	454
f96411ab DB	455	out2:
	456	free_irq(irq, rtc);
	457	out1:
	458	rtc_device_unregister(rtc);
	459	out0:
	460	return ret;
	461	}
	462
	463	/*
	464	* Disable all TWL4030 RTC module interrupts.
	465	* Sets status flag to free.
	466	*/
	467	static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
	468	{
	469	/* leave rtc running, but disable irqs */
	470	struct rtc_device *rtc = platform_get_drvdata(pdev);
	471	int irq = platform_get_irq(pdev, 0);
	472
	473	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	474	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
	475
	476	free_irq(irq, rtc);
	477
	478	rtc_device_unregister(rtc);
	479	platform_set_drvdata(pdev, NULL);
	480	return 0;
	481	}
	482
	483	static void twl4030_rtc_shutdown(struct platform_device *pdev)
	484	{
cafa1d8b MH	485	/* mask timer interrupts, but leave alarm interrupts on to enable
	486	power-on when alarm is triggered */
	487	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
f96411ab DB	488	}
	489
	490	#ifdef CONFIG_PM
	491
	492	static unsigned char irqstat;
	493
	494	static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	495	{
	496	irqstat = rtc_irq_bits;
	497
f993004d	498	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
f96411ab DB	499	return 0;
	500	}
	501
	502	static int twl4030_rtc_resume(struct platform_device *pdev)
	503	{
	504	set_rtc_irq_bit(irqstat);
	505	return 0;
	506	}
	507
	508	#else
	509	#define twl4030_rtc_suspend NULL
	510	#define twl4030_rtc_resume NULL
	511	#endif
	512
	513	MODULE_ALIAS("platform:twl4030_rtc");
	514
	515	static struct platform_driver twl4030rtc_driver = {
	516	.probe = twl4030_rtc_probe,
	517	.remove = __devexit_p(twl4030_rtc_remove),
	518	.shutdown = twl4030_rtc_shutdown,
	519	.suspend = twl4030_rtc_suspend,
	520	.resume = twl4030_rtc_resume,
	521	.driver = {
	522	.owner = THIS_MODULE,
	523	.name = "twl4030_rtc",
	524	},
	525	};
	526
	527	static int __init twl4030_rtc_init(void)
	528	{
	529	return platform_driver_register(&twl4030rtc_driver);
	530	}
	531	module_init(twl4030_rtc_init);
	532
	533	static void __exit twl4030_rtc_exit(void)
	534	{
	535	platform_driver_unregister(&twl4030rtc_driver);
	536	}
	537	module_exit(twl4030_rtc_exit);
	538
	539	MODULE_AUTHOR("Texas Instruments, MontaVista Software");
	540	MODULE_LICENSE("GPL");