[net-next-2.6.git] / drivers / rtc / rtc-pl031.c

/*
 * drivers/rtc/rtc-pl031.c
 *
 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
 *
 * Author: Deepak Saxena <dsaxena@plexity.net>
 *
 * Copyright 2006 (c) MontaVista Software, Inc.
 *
 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
 * Copyright 2010 (c) ST-Ericsson AB
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/amba/bus.h>
#include <linux/io.h>
#include <linux/bcd.h>
#include <linux/delay.h>
#include <linux/slab.h>

/*
 * Register definitions
 */
#define	RTC_DR		0x00	/* Data read register */
#define	RTC_MR		0x04	/* Match register */
#define	RTC_LR		0x08	/* Data load register */
#define	RTC_CR		0x0c	/* Control register */
#define	RTC_IMSC	0x10	/* Interrupt mask and set register */
#define	RTC_RIS		0x14	/* Raw interrupt status register */
#define	RTC_MIS		0x18	/* Masked interrupt status register */
#define	RTC_ICR		0x1c	/* Interrupt clear register */
/* ST variants have additional timer functionality */
#define RTC_TDR		0x20	/* Timer data read register */
#define RTC_TLR		0x24	/* Timer data load register */
#define RTC_TCR		0x28	/* Timer control register */
#define RTC_YDR		0x30	/* Year data read register */
#define RTC_YMR		0x34	/* Year match register */
#define RTC_YLR		0x38	/* Year data load register */

#define RTC_CR_CWEN	(1 << 26)	/* Clockwatch enable bit */

#define RTC_TCR_EN	(1 << 1) /* Periodic timer enable bit */

/* Common bit definitions for Interrupt status and control registers */
#define RTC_BIT_AI	(1 << 0) /* Alarm interrupt bit */
#define RTC_BIT_PI	(1 << 1) /* Periodic interrupt bit. ST variants only. */

/* Common bit definations for ST v2 for reading/writing time */
#define RTC_SEC_SHIFT 0
#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
#define RTC_MIN_SHIFT 6
#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
#define RTC_HOUR_SHIFT 12
#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
#define RTC_WDAY_SHIFT 17
#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
#define RTC_MDAY_SHIFT 20
#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
#define RTC_MON_SHIFT 25
#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */

#define RTC_TIMER_FREQ 32768

struct pl031_local {
	struct rtc_device *rtc;
	void __iomem *base;
	u8 hw_designer;
	u8 hw_revision:4;
};

static int pl031_alarm_irq_enable(struct device *dev,
	unsigned int enabled)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long imsc;

	/* Clear any pending alarm interrupts. */
	writel(RTC_BIT_AI, ldata->base + RTC_ICR);

	imsc = readl(ldata->base + RTC_IMSC);

	if (enabled == 1)
		writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
	else
		writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);

	return 0;
}

/*
 * Convert Gregorian date to ST v2 RTC format.
 */
static int pl031_stv2_tm_to_time(struct device *dev,
				 struct rtc_time *tm, unsigned long *st_time,
	unsigned long *bcd_year)
{
	int year = tm->tm_year + 1900;
	int wday = tm->tm_wday;

	/* wday masking is not working in hardware so wday must be valid */
	if (wday < -1 || wday > 6) {
		dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
		return -EINVAL;
	} else if (wday == -1) {
		/* wday is not provided, calculate it here */
		unsigned long time;
		struct rtc_time calc_tm;

		rtc_tm_to_time(tm, &time);
		rtc_time_to_tm(time, &calc_tm);
		wday = calc_tm.tm_wday;
	}

	*bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);

	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
			|	(tm->tm_mday << RTC_MDAY_SHIFT)
			|	((wday + 1) << RTC_WDAY_SHIFT)
			|	(tm->tm_hour << RTC_HOUR_SHIFT)
			|	(tm->tm_min << RTC_MIN_SHIFT)
			|	(tm->tm_sec << RTC_SEC_SHIFT);

	return 0;
}

/*
 * Convert ST v2 RTC format to Gregorian date.
 */
static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
	struct rtc_time *tm)
{
	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
	tm->tm_mon  = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
	tm->tm_min  = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
	tm->tm_sec  = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);

	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	tm->tm_year -= 1900;

	return 0;
}

static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
			readl(ldata->base + RTC_YDR), tm);

	return 0;
}

static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	unsigned long bcd_year;
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
	if (ret == 0) {
		writel(bcd_year, ldata->base + RTC_YLR);
		writel(time, ldata->base + RTC_LR);
	}

	return ret;
}

static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
			readl(ldata->base + RTC_YMR), &alarm->time);

	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;

	return ret;
}

static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long time;
	unsigned long bcd_year;
	int ret;

	/* At the moment, we can only deal with non-wildcarded alarm times. */
	ret = rtc_valid_tm(&alarm->time);
	if (ret == 0) {
		ret = pl031_stv2_tm_to_time(dev, &alarm->time,
					    &time, &bcd_year);
		if (ret == 0) {
			writel(bcd_year, ldata->base + RTC_YMR);
			writel(time, ldata->base + RTC_MR);

			pl031_alarm_irq_enable(dev, alarm->enabled);
		}
	}

	return ret;
}

static irqreturn_t pl031_interrupt(int irq, void *dev_id)
{
	struct pl031_local *ldata = dev_id;
	unsigned long rtcmis;
	unsigned long events = 0;

	rtcmis = readl(ldata->base + RTC_MIS);
	if (rtcmis) {
		writel(rtcmis, ldata->base + RTC_ICR);

		if (rtcmis & RTC_BIT_AI)
			events |= (RTC_AF | RTC_IRQF);

		/* Timer interrupt is only available in ST variants */
		if ((rtcmis & RTC_BIT_PI) &&
			(ldata->hw_designer == AMBA_VENDOR_ST))
			events |= (RTC_PF | RTC_IRQF);

		rtc_update_irq(ldata->rtc, 1, events);

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int pl031_read_time(struct device *dev, struct rtc_time *tm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);

	return 0;
}

static int pl031_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = rtc_tm_to_time(tm, &time);

	if (ret == 0)
		writel(time, ldata->base + RTC_LR);

	return ret;
}

static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);

	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;

	return 0;
}

static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long time;
	int ret;

	/* At the moment, we can only deal with non-wildcarded alarm times. */
	ret = rtc_valid_tm(&alarm->time);
	if (ret == 0) {
		ret = rtc_tm_to_time(&alarm->time, &time);
		if (ret == 0) {
			writel(time, ldata->base + RTC_MR);
			pl031_alarm_irq_enable(dev, alarm->enabled);
		}
	}

	return ret;
}

/* Periodic interrupt is only available in ST variants. */
static int pl031_irq_set_state(struct device *dev, int enabled)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	if (enabled == 1) {
		/* Clear any pending timer interrupt. */
		writel(RTC_BIT_PI, ldata->base + RTC_ICR);

		writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
			ldata->base + RTC_IMSC);

		/* Now start the timer */
		writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
			ldata->base + RTC_TCR);

	} else {
		writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
			ldata->base + RTC_IMSC);

		/* Also stop the timer */
		writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
			ldata->base + RTC_TCR);
	}
	/* Wait at least 1 RTC32 clock cycle to ensure next access
	 * to RTC_TCR will succeed.
	 */
	udelay(40);

	return 0;
}

static int pl031_irq_set_freq(struct device *dev, int freq)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	/* Cant set timer if it is already enabled */
	if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) {
		dev_err(dev, "can't change frequency while timer enabled\n");
		return -EINVAL;
	}

	/* If self start bit in RTC_TCR is set timer will start here,
	 * but we never set that bit. Instead we start the timer when
	 * set_state is called with enabled == 1.
	 */
	writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR);

	return 0;
}

static int pl031_remove(struct amba_device *adev)
{
	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);

	amba_set_drvdata(adev, NULL);
	free_irq(adev->irq[0], ldata->rtc);
	rtc_device_unregister(ldata->rtc);
	iounmap(ldata->base);
	kfree(ldata);
	amba_release_regions(adev);

	return 0;
}

static int pl031_probe(struct amba_device *adev, struct amba_id *id)
{
	int ret;
	struct pl031_local *ldata;
	struct rtc_class_ops *ops = id->data;

	ret = amba_request_regions(adev, NULL);
	if (ret)
		goto err_req;

	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
	if (!ldata) {
		ret = -ENOMEM;
		goto out;
	}

	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));

	if (!ldata->base) {
		ret = -ENOMEM;
		goto out_no_remap;
	}

	amba_set_drvdata(adev, ldata);

	ldata->hw_designer = amba_manf(adev);
	ldata->hw_revision = amba_rev(adev);

	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
	dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);

	/* Enable the clockwatch on ST Variants */
	if ((ldata->hw_designer == AMBA_VENDOR_ST) &&
	    (ldata->hw_revision > 1))
		writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
		       ldata->base + RTC_CR);

	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
					THIS_MODULE);
	if (IS_ERR(ldata->rtc)) {
		ret = PTR_ERR(ldata->rtc);
		goto out_no_rtc;
	}

	if (request_irq(adev->irq[0], pl031_interrupt,
			IRQF_DISABLED, "rtc-pl031", ldata)) {
		ret = -EIO;
		goto out_no_irq;
	}

	return 0;

out_no_irq:
	rtc_device_unregister(ldata->rtc);
out_no_rtc:
	iounmap(ldata->base);
	amba_set_drvdata(adev, NULL);
out_no_remap:
	kfree(ldata);
out:
	amba_release_regions(adev);
err_req:

	return ret;
}

/* Operations for the original ARM version */
static struct rtc_class_ops arm_pl031_ops = {
	.read_time = pl031_read_time,
	.set_time = pl031_set_time,
	.read_alarm = pl031_read_alarm,
	.set_alarm = pl031_set_alarm,
	.alarm_irq_enable = pl031_alarm_irq_enable,
};

/* The First ST derivative */
static struct rtc_class_ops stv1_pl031_ops = {
	.read_time = pl031_read_time,
	.set_time = pl031_set_time,
	.read_alarm = pl031_read_alarm,
	.set_alarm = pl031_set_alarm,
	.alarm_irq_enable = pl031_alarm_irq_enable,
	.irq_set_state = pl031_irq_set_state,
	.irq_set_freq = pl031_irq_set_freq,
};

/* And the second ST derivative */
static struct rtc_class_ops stv2_pl031_ops = {
	.read_time = pl031_stv2_read_time,
	.set_time = pl031_stv2_set_time,
	.read_alarm = pl031_stv2_read_alarm,
	.set_alarm = pl031_stv2_set_alarm,
	.alarm_irq_enable = pl031_alarm_irq_enable,
	.irq_set_state = pl031_irq_set_state,
	.irq_set_freq = pl031_irq_set_freq,
};

static struct amba_id pl031_ids[] = {
	{
		.id = 0x00041031,
		.mask = 0x000fffff,
		.data = &arm_pl031_ops,
	},
	/* ST Micro variants */
	{
		.id = 0x00180031,
		.mask = 0x00ffffff,
		.data = &stv1_pl031_ops,
	},
	{
		.id = 0x00280031,
		.mask = 0x00ffffff,
		.data = &stv2_pl031_ops,
	},
	{0, 0},
};

static struct amba_driver pl031_driver = {
	.drv = {
		.name = "rtc-pl031",
	},
	.id_table = pl031_ids,
	.probe = pl031_probe,
	.remove = pl031_remove,
};

static int __init pl031_init(void)
{
	return amba_driver_register(&pl031_driver);
}

static void __exit pl031_exit(void)
{
	amba_driver_unregister(&pl031_driver);
}

module_init(pl031_init);
module_exit(pl031_exit);

MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
8ae6e163 DS	1	/*
	2	* drivers/rtc/rtc-pl031.c
	3	*
	4	* Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
	5	*
	6	* Author: Deepak Saxena <dsaxena@plexity.net>
	7	*
	8	* Copyright 2006 (c) MontaVista Software, Inc.
	9	*
c72881e8 LW	10	* Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
	11	* Copyright 2010 (c) ST-Ericsson AB
	12	*
8ae6e163 DS	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License
	15	* as published by the Free Software Foundation; either version
	16	* 2 of the License, or (at your option) any later version.
	17	*/
8ae6e163 DS	18	#include <linux/module.h>
	19	#include <linux/rtc.h>
	20	#include <linux/init.h>
8ae6e163	21	#include <linux/interrupt.h>
8ae6e163	22	#include <linux/amba/bus.h>
2dba8518	23	#include <linux/io.h>
c72881e8 LW	24	#include <linux/bcd.h>
c72881e8 LW	25	#include <linux/delay.h>
5a0e3ad6	26	#include <linux/slab.h>
8ae6e163 DS	27
	28	/*
	29	* Register definitions
	30	*/
	31	#define RTC_DR 0x00 /* Data read register */
	32	#define RTC_MR 0x04 /* Match register */
	33	#define RTC_LR 0x08 /* Data load register */
	34	#define RTC_CR 0x0c /* Control register */
	35	#define RTC_IMSC 0x10 /* Interrupt mask and set register */
	36	#define RTC_RIS 0x14 /* Raw interrupt status register */
	37	#define RTC_MIS 0x18 /* Masked interrupt status register */
	38	#define RTC_ICR 0x1c /* Interrupt clear register */
c72881e8 LW	39	/* ST variants have additional timer functionality */
	40	#define RTC_TDR 0x20 /* Timer data read register */
	41	#define RTC_TLR 0x24 /* Timer data load register */
	42	#define RTC_TCR 0x28 /* Timer control register */
	43	#define RTC_YDR 0x30 /* Year data read register */
	44	#define RTC_YMR 0x34 /* Year match register */
	45	#define RTC_YLR 0x38 /* Year data load register */
	46
	47	#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
	48
	49	#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
	50
	51	/* Common bit definitions for Interrupt status and control registers */
	52	#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
	53	#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
	54
	55	/* Common bit definations for ST v2 for reading/writing time */
	56	#define RTC_SEC_SHIFT 0
	57	#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
	58	#define RTC_MIN_SHIFT 6
	59	#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
	60	#define RTC_HOUR_SHIFT 12
	61	#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
	62	#define RTC_WDAY_SHIFT 17
	63	#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
	64	#define RTC_MDAY_SHIFT 20
	65	#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
	66	#define RTC_MON_SHIFT 25
	67	#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
	68
	69	#define RTC_TIMER_FREQ 32768
8ae6e163 DS	70
	71	struct pl031_local {
	72	struct rtc_device *rtc;
	73	void __iomem *base;
c72881e8 LW	74	u8 hw_designer;
c72881e8 LW	75	u8 hw_revision:4;
8ae6e163 DS	76	};
8ae6e163 DS	77
c72881e8 LW	78	static int pl031_alarm_irq_enable(struct device *dev,
	79	unsigned int enabled)
	80	{
	81	struct pl031_local *ldata = dev_get_drvdata(dev);
	82	unsigned long imsc;
	83
	84	/* Clear any pending alarm interrupts. */
	85	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
	86
	87	imsc = readl(ldata->base + RTC_IMSC);
	88
	89	if (enabled == 1)
	90	writel(imsc \| RTC_BIT_AI, ldata->base + RTC_IMSC);
	91	else
	92	writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
	93
	94	return 0;
	95	}
	96
	97	/*
	98	* Convert Gregorian date to ST v2 RTC format.
	99	*/
	100	static int pl031_stv2_tm_to_time(struct device *dev,
	101	struct rtc_time tm, unsigned long st_time,
	102	unsigned long *bcd_year)
	103	{
	104	int year = tm->tm_year + 1900;
	105	int wday = tm->tm_wday;
	106
	107	/* wday masking is not working in hardware so wday must be valid */
	108	if (wday < -1 \|\| wday > 6) {
	109	dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
	110	return -EINVAL;
	111	} else if (wday == -1) {
	112	/* wday is not provided, calculate it here */
	113	unsigned long time;
	114	struct rtc_time calc_tm;
	115
	116	rtc_tm_to_time(tm, &time);
	117	rtc_time_to_tm(time, &calc_tm);
	118	wday = calc_tm.tm_wday;
	119	}
	120
	121	*bcd_year = (bin2bcd(year % 100) \| bin2bcd(year / 100) << 8);
	122
	123	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
	124	\| (tm->tm_mday << RTC_MDAY_SHIFT)
	125	\| ((wday + 1) << RTC_WDAY_SHIFT)
	126	\| (tm->tm_hour << RTC_HOUR_SHIFT)
	127	\| (tm->tm_min << RTC_MIN_SHIFT)
	128	\| (tm->tm_sec << RTC_SEC_SHIFT);
	129
	130	return 0;
	131	}
	132
	133	/*
	134	* Convert ST v2 RTC format to Gregorian date.
	135	*/
	136	static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
	137	struct rtc_time *tm)
	138	{
	139	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
	140	tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
	141	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
142	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
143	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
144	tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
145	tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
146
147	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
148	tm->tm_year -= 1900;
149
150	return 0;
151	}
152
153	static int pl031_stv2_read_time(struct device dev, struct rtc_time tm)
154	{
155	struct pl031_local *ldata = dev_get_drvdata(dev);
156
157	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
158	readl(ldata->base + RTC_YDR), tm);
159
160	return 0;
161	}
162
163	static int pl031_stv2_set_time(struct device dev, struct rtc_time tm)
164	{
165	unsigned long time;
166	unsigned long bcd_year;
167	struct pl031_local *ldata = dev_get_drvdata(dev);
168	int ret;
169
170	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
171	if (ret == 0) {
172	writel(bcd_year, ldata->base + RTC_YLR);
173	writel(time, ldata->base + RTC_LR);
174	}
175
176	return ret;
177	}
178
179	static int pl031_stv2_read_alarm(struct device dev, struct rtc_wkalrm alarm)
8ae6e163	180	{
c72881e8 LW	181	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 LW	182	int ret;
8ae6e163	183
c72881e8 LW	184	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
c72881e8 LW	185	readl(ldata->base + RTC_YMR), &alarm->time);
8ae6e163	186
c72881e8 LW	187	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	188	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
	189
	190	return ret;
8ae6e163 DS	191	}
8ae6e163 DS	192
c72881e8	193	static int pl031_stv2_set_alarm(struct device dev, struct rtc_wkalrm alarm)
8ae6e163 DS	194	{
8ae6e163 DS	195	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 LW	196	unsigned long time;
	197	unsigned long bcd_year;
	198	int ret;
	199
	200	/* At the moment, we can only deal with non-wildcarded alarm times. */
	201	ret = rtc_valid_tm(&alarm->time);
	202	if (ret == 0) {
	203	ret = pl031_stv2_tm_to_time(dev, &alarm->time,
	204	&time, &bcd_year);
	205	if (ret == 0) {
	206	writel(bcd_year, ldata->base + RTC_YMR);
	207	writel(time, ldata->base + RTC_MR);
	208
	209	pl031_alarm_irq_enable(dev, alarm->enabled);
	210	}
	211	}
	212
	213	return ret;
	214	}
	215
	216	static irqreturn_t pl031_interrupt(int irq, void *dev_id)
	217	{
	218	struct pl031_local *ldata = dev_id;
	219	unsigned long rtcmis;
	220	unsigned long events = 0;
	221
	222	rtcmis = readl(ldata->base + RTC_MIS);
	223	if (rtcmis) {
	224	writel(rtcmis, ldata->base + RTC_ICR);
	225
	226	if (rtcmis & RTC_BIT_AI)
	227	events \|= (RTC_AF \| RTC_IRQF);
	228
	229	/* Timer interrupt is only available in ST variants */
	230	if ((rtcmis & RTC_BIT_PI) &&
	231	(ldata->hw_designer == AMBA_VENDOR_ST))
	232	events \|= (RTC_PF \| RTC_IRQF);
	233
	234	rtc_update_irq(ldata->rtc, 1, events);
8ae6e163	235
c72881e8	236	return IRQ_HANDLED;
8ae6e163 DS	237	}
8ae6e163 DS	238
c72881e8	239	return IRQ_NONE;
8ae6e163 DS	240	}
	241
	242	static int pl031_read_time(struct device dev, struct rtc_time tm)
	243	{
	244	struct pl031_local *ldata = dev_get_drvdata(dev);
	245
2934d6a8	246	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
8ae6e163 DS	247
	248	return 0;
	249	}
	250
	251	static int pl031_set_time(struct device dev, struct rtc_time tm)
	252	{
	253	unsigned long time;
	254	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8	255	int ret;
8ae6e163	256
c72881e8	257	ret = rtc_tm_to_time(tm, &time);
8ae6e163	258
c72881e8 LW	259	if (ret == 0)
	260	writel(time, ldata->base + RTC_LR);
	261
	262	return ret;
8ae6e163 DS	263	}
	264
	265	static int pl031_read_alarm(struct device dev, struct rtc_wkalrm alarm)
	266	{
	267	struct pl031_local *ldata = dev_get_drvdata(dev);
	268
2934d6a8	269	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
c72881e8 LW	270
	271	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	272	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
8ae6e163 DS	273
	274	return 0;
	275	}
	276
	277	static int pl031_set_alarm(struct device dev, struct rtc_wkalrm alarm)
	278	{
	279	struct pl031_local *ldata = dev_get_drvdata(dev);
	280	unsigned long time;
c72881e8 LW	281	int ret;
	282
	283	/* At the moment, we can only deal with non-wildcarded alarm times. */
	284	ret = rtc_valid_tm(&alarm->time);
	285	if (ret == 0) {
	286	ret = rtc_tm_to_time(&alarm->time, &time);
	287	if (ret == 0) {
	288	writel(time, ldata->base + RTC_MR);
	289	pl031_alarm_irq_enable(dev, alarm->enabled);
	290	}
	291	}
	292
	293	return ret;
	294	}
	295
	296	/* Periodic interrupt is only available in ST variants. */
	297	static int pl031_irq_set_state(struct device *dev, int enabled)
	298	{
	299	struct pl031_local *ldata = dev_get_drvdata(dev);
	300
	301	if (enabled == 1) {
	302	/* Clear any pending timer interrupt. */
	303	writel(RTC_BIT_PI, ldata->base + RTC_ICR);
	304
	305	writel(readl(ldata->base + RTC_IMSC) \| RTC_BIT_PI,
	306	ldata->base + RTC_IMSC);
8ae6e163	307
c72881e8 LW	308	/* Now start the timer */
	309	writel(readl(ldata->base + RTC_TCR) \| RTC_TCR_EN,
	310	ldata->base + RTC_TCR);
8ae6e163	311
c72881e8 LW	312	} else {
	313	writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
	314	ldata->base + RTC_IMSC);
	315
	316	/* Also stop the timer */
	317	writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
	318	ldata->base + RTC_TCR);
	319	}
	320	/* Wait at least 1 RTC32 clock cycle to ensure next access
	321	* to RTC_TCR will succeed.
	322	*/
	323	udelay(40);
8ae6e163 DS	324
	325	return 0;
	326	}
	327
c72881e8 LW	328	static int pl031_irq_set_freq(struct device *dev, int freq)
	329	{
	330	struct pl031_local *ldata = dev_get_drvdata(dev);
	331
	332	/* Cant set timer if it is already enabled */
	333	if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) {
	334	dev_err(dev, "can't change frequency while timer enabled\n");
	335	return -EINVAL;
	336	}
	337
	338	/* If self start bit in RTC_TCR is set timer will start here,
	339	* but we never set that bit. Instead we start the timer when
	340	* set_state is called with enabled == 1.
	341	*/
	342	writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR);
	343
	344	return 0;
	345	}
8ae6e163 DS	346
	347	static int pl031_remove(struct amba_device *adev)
	348	{
	349	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
	350
2dba8518 RK	351	amba_set_drvdata(adev, NULL);
	352	free_irq(adev->irq[0], ldata->rtc);
	353	rtc_device_unregister(ldata->rtc);
	354	iounmap(ldata->base);
	355	kfree(ldata);
	356	amba_release_regions(adev);
8ae6e163 DS	357
	358	return 0;
	359	}
	360
03fbdb15	361	static int pl031_probe(struct amba_device adev, struct amba_id id)
8ae6e163 DS	362	{
	363	int ret;
	364	struct pl031_local *ldata;
c72881e8	365	struct rtc_class_ops *ops = id->data;
8ae6e163	366
2dba8518 RK	367	ret = amba_request_regions(adev, NULL);
	368	if (ret)
	369	goto err_req;
8ae6e163	370
c72881e8	371	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
8ae6e163 DS	372	if (!ldata) {
	373	ret = -ENOMEM;
	374	goto out;
	375	}
8ae6e163	376
dc890c2d	377	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
c72881e8	378
8ae6e163 DS	379	if (!ldata->base) {
	380	ret = -ENOMEM;
	381	goto out_no_remap;
	382	}
	383
2dba8518 RK	384	amba_set_drvdata(adev, ldata);
2dba8518 RK	385
c72881e8 LW	386	ldata->hw_designer = amba_manf(adev);
	387	ldata->hw_revision = amba_rev(adev);
	388
	389	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
	390	dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);
8ae6e163	391
c72881e8 LW	392	/* Enable the clockwatch on ST Variants */
	393	if ((ldata->hw_designer == AMBA_VENDOR_ST) &&
	394	(ldata->hw_revision > 1))
	395	writel(readl(ldata->base + RTC_CR) \| RTC_CR_CWEN,
	396	ldata->base + RTC_CR);
	397
	398	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
	399	THIS_MODULE);
8ae6e163 DS	400	if (IS_ERR(ldata->rtc)) {
	401	ret = PTR_ERR(ldata->rtc);
	402	goto out_no_rtc;
	403	}
	404
c72881e8	405	if (request_irq(adev->irq[0], pl031_interrupt,
47016434	406	IRQF_DISABLED, "rtc-pl031", ldata)) {
c72881e8 LW	407	ret = -EIO;
	408	goto out_no_irq;
	409	}
	410
8ae6e163 DS	411	return 0;
8ae6e163 DS	412
8ae6e163	413	out_no_irq:
c72881e8 LW	414	rtc_device_unregister(ldata->rtc);
c72881e8 LW	415	out_no_rtc:
8ae6e163	416	iounmap(ldata->base);
2dba8518	417	amba_set_drvdata(adev, NULL);
8ae6e163	418	out_no_remap:
8ae6e163 DS	419	kfree(ldata);
8ae6e163 DS	420	out:
2dba8518 RK	421	amba_release_regions(adev);
2dba8518 RK	422	err_req:
c72881e8	423
8ae6e163 DS	424	return ret;
	425	}
	426
c72881e8 LW	427	/* Operations for the original ARM version */
	428	static struct rtc_class_ops arm_pl031_ops = {
	429	.read_time = pl031_read_time,
	430	.set_time = pl031_set_time,
	431	.read_alarm = pl031_read_alarm,
	432	.set_alarm = pl031_set_alarm,
	433	.alarm_irq_enable = pl031_alarm_irq_enable,
	434	};
	435
	436	/* The First ST derivative */
	437	static struct rtc_class_ops stv1_pl031_ops = {
	438	.read_time = pl031_read_time,
	439	.set_time = pl031_set_time,
	440	.read_alarm = pl031_read_alarm,
	441	.set_alarm = pl031_set_alarm,
	442	.alarm_irq_enable = pl031_alarm_irq_enable,
	443	.irq_set_state = pl031_irq_set_state,
	444	.irq_set_freq = pl031_irq_set_freq,
	445	};
	446
	447	/* And the second ST derivative */
	448	static struct rtc_class_ops stv2_pl031_ops = {
	449	.read_time = pl031_stv2_read_time,
	450	.set_time = pl031_stv2_set_time,
	451	.read_alarm = pl031_stv2_read_alarm,
	452	.set_alarm = pl031_stv2_set_alarm,
	453	.alarm_irq_enable = pl031_alarm_irq_enable,
	454	.irq_set_state = pl031_irq_set_state,
	455	.irq_set_freq = pl031_irq_set_freq,
	456	};
	457
2c39c9e1	458	static struct amba_id pl031_ids[] = {
8ae6e163	459	{
2934d6a8 LW	460	.id = 0x00041031,
2934d6a8 LW	461	.mask = 0x000fffff,
c72881e8 LW	462	.data = &arm_pl031_ops,
	463	},
	464	/* ST Micro variants */
	465	{
	466	.id = 0x00180031,
	467	.mask = 0x00ffffff,
	468	.data = &stv1_pl031_ops,
	469	},
	470	{
	471	.id = 0x00280031,
	472	.mask = 0x00ffffff,
	473	.data = &stv2_pl031_ops,
2934d6a8	474	},
8ae6e163 DS	475	{0, 0},
	476	};
	477
	478	static struct amba_driver pl031_driver = {
	479	.drv = {
	480	.name = "rtc-pl031",
	481	},
	482	.id_table = pl031_ids,
	483	.probe = pl031_probe,
	484	.remove = pl031_remove,
	485	};
	486
	487	static int __init pl031_init(void)
	488	{
	489	return amba_driver_register(&pl031_driver);
	490	}
	491
	492	static void __exit pl031_exit(void)
	493	{
	494	amba_driver_unregister(&pl031_driver);
	495	}
	496
	497	module_init(pl031_init);
	498	module_exit(pl031_exit);
	499
	500	MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
	501	MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
	502	MODULE_LICENSE("GPL");