[net-next-2.6.git] / drivers / pcmcia / omap_cf.c

/*
 * omap_cf.c -- OMAP 16xx CompactFlash controller driver
 *
 * Copyright (c) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>

#include <pcmcia/ss.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <asm/arch/mux.h>
#include <asm/arch/tc.h>


/* NOTE:  don't expect this to support many I/O cards.  The 16xx chips have
 * hard-wired timings to support Compact Flash memory cards; they won't work
 * with various other devices (like WLAN adapters) without some external
 * logic to help out.
 *
 * NOTE:  CF controller docs disagree with address space docs as to where
 * CF_BASE really lives; this is a doc erratum.
 */
#define	CF_BASE	0xfffe2800

/* status; read after IRQ */
#define CF_STATUS_REG		__REG16(CF_BASE + 0x00)
#	define	CF_STATUS_BAD_READ	(1 << 2)
#	define	CF_STATUS_BAD_WRITE	(1 << 1)
#	define	CF_STATUS_CARD_DETECT	(1 << 0)

/* which chipselect (CS0..CS3) is used for CF (active low) */
#define CF_CFG_REG		__REG16(CF_BASE + 0x02)

/* card reset */
#define CF_CONTROL_REG		__REG16(CF_BASE + 0x04)
#	define	CF_CONTROL_RESET	(1 << 0)

#define omap_cf_present() (!(CF_STATUS_REG & CF_STATUS_CARD_DETECT))

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "omap_cf";

struct omap_cf_socket {
	struct pcmcia_socket	socket;

	struct timer_list	timer;
	unsigned		present:1;
	unsigned		active:1;

	struct platform_device	*pdev;
	unsigned long		phys_cf;
	u_int			irq;
	struct resource		iomem;
};

#define	POLL_INTERVAL		(2 * HZ)

#define	SZ_2K			(2 * SZ_1K)

/*--------------------------------------------------------------------------*/

static int omap_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

/* the timer is primarily to kick this socket's pccardd */
static void omap_cf_timer(unsigned long _cf)
{
	struct omap_cf_socket	*cf = (void *) _cf;
	unsigned		present = omap_cf_present();

	if (present != cf->present) {
		cf->present = present;
		pr_debug("%s: card %s\n", driver_name,
			present ? "present" : "gone");
		pcmcia_parse_events(&cf->socket, SS_DETECT);
	}

	if (cf->active)
		mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
}

/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
 * claim the card's IRQ.  It may also detect some card insertions, but
 * not removals; it can't always eliminate timer irqs.
 */
static irqreturn_t omap_cf_irq(int irq, void *_cf)
{
	omap_cf_timer((unsigned long)_cf);
	return IRQ_HANDLED;
}

static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	if (!sp)
		return -EINVAL;

	/* NOTE CF is always 3VCARD */
	if (omap_cf_present()) {
		struct omap_cf_socket	*cf;

		*sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
		cf = container_of(s, struct omap_cf_socket, socket);
		s->irq.AssignedIRQ = 0;
		s->pci_irq = cf->irq;
	} else
		*sp = 0;
	return 0;
}

static int
omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	u16		control;

	/* REVISIT some non-OSK boards may support power switching */
	switch (s->Vcc) {
	case 0:
	case 33:
		break;
	default:
		return -EINVAL;
	}

	control = CF_CONTROL_REG;
	if (s->flags & SS_RESET)
		CF_CONTROL_REG = CF_CONTROL_RESET;
	else
		CF_CONTROL_REG = 0;

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int omap_cf_ss_suspend(struct pcmcia_socket *s)
{
	pr_debug("%s: %s\n", driver_name, __FUNCTION__);
	return omap_cf_set_socket(s, &dead_socket);
}

/* regions are 2K each:  mem, attrib, io (and reserved-for-ide) */

static int
omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct omap_cf_socket	*cf;

	cf = container_of(s, struct omap_cf_socket, socket);
	io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	io->start = cf->phys_cf + SZ_4K;
	io->stop = io->start + SZ_2K - 1;
	return 0;
}

static int
omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct omap_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;
	cf = container_of(s, struct omap_cf_socket, socket);
	map->static_start = cf->phys_cf;
	map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	if (map->flags & MAP_ATTRIB)
		map->static_start += SZ_2K;
	return 0;
}

static struct pccard_operations omap_cf_ops = {
	.init			= omap_cf_ss_init,
	.suspend		= omap_cf_ss_suspend,
	.get_status		= omap_cf_get_status,
	.set_socket		= omap_cf_set_socket,
	.set_io_map		= omap_cf_set_io_map,
	.set_mem_map		= omap_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

/*
 * NOTE:  right now the only board-specific platform_data is
 * "what chipselect is used".  Boards could want more.
 */

static int __devinit omap_cf_probe(struct device *dev)
{
	unsigned		seg;
	struct omap_cf_socket	*cf;
	struct platform_device	*pdev = to_platform_device(dev);
	int			irq;
	int			status;

	seg = (int) dev->platform_data;
	if (seg == 0 || seg > 3)
		return -ENODEV;

	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return -EINVAL;

	cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;
	init_timer(&cf->timer);
	cf->timer.function = omap_cf_timer;
	cf->timer.data = (unsigned long) cf;

	cf->pdev = pdev;
	dev_set_drvdata(dev, cf);

	/* this primarily just shuts up irq handling noise */
	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
			driver_name, cf);
	if (status < 0)
		goto fail0;
	cf->irq = irq;
	cf->socket.pci_irq = irq;

	switch (seg) {
	/* NOTE: CS0 could be configured too ... */
	case 1:
		cf->phys_cf = OMAP_CS1_PHYS;
		break;
	case 2:
		cf->phys_cf = OMAP_CS2_PHYS;
		break;
	case 3:
		cf->phys_cf = omap_cs3_phys();
		break;
	default:
		goto  fail1;
	}
	cf->iomem.start = cf->phys_cf;
	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	cf->iomem.flags = IORESOURCE_MEM;

	/* pcmcia layer only remaps "real" memory */
	cf->socket.io_offset = (unsigned long)
			ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	if (!cf->socket.io_offset)
		goto fail1;

	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
		goto fail1;

	/* NOTE:  CF conflicts with MMC1 */
	omap_cfg_reg(W11_1610_CF_CD1);
	omap_cfg_reg(P11_1610_CF_CD2);
	omap_cfg_reg(R11_1610_CF_IOIS16);
	omap_cfg_reg(V10_1610_CF_IREQ);
	omap_cfg_reg(W10_1610_CF_RESET);

	CF_CFG_REG = ~(1 << seg);

	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);

	/* NOTE:  better EMIFS setup might support more cards; but the
	 * TRM only shows how to affect regular flash signals, not their
	 * CF/PCMCIA variants...
	 */
	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
			seg, EMIFS_CCS(seg), EMIFS_ACS(seg));
	EMIFS_CCS(seg) = 0x0004a1b3;	/* synch mode 4 etc */
	EMIFS_ACS(seg) = 0x00000000;	/* OE hold/setup */

	/* CF uses armxor_ck, which is "always" available */

	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
		CF_STATUS_REG, CF_CFG_REG, CF_CONTROL_REG,
		omap_cf_present() ? "present" : "(not present)");

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.dev = dev;
	cf->socket.ops = &omap_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = &cf->iomem;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	cf->active = 1;
	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	return 0;

fail2:
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(cf->phys_cf, SZ_8K);
fail1:
	free_irq(irq, cf);
fail0:
	kfree(cf);
	return status;
}

static int __devexit omap_cf_remove(struct device *dev)
{
	struct omap_cf_socket *cf = dev_get_drvdata(dev);

	cf->active = 0;
	pcmcia_unregister_socket(&cf->socket);
	del_timer_sync(&cf->timer);
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(cf->phys_cf, SZ_8K);
	free_irq(cf->irq, cf);
	kfree(cf);
	return 0;
}

static struct device_driver omap_cf_driver = {
	.name		= (char *) driver_name,
	.bus		= &platform_bus_type,
	.probe		= omap_cf_probe,
	.remove		= __devexit_p(omap_cf_remove),
	.suspend	= pcmcia_socket_dev_suspend,
	.resume		= pcmcia_socket_dev_resume,
};

static int __init omap_cf_init(void)
{
	if (cpu_is_omap16xx())
		return driver_register(&omap_cf_driver);
	return -ENODEV;
}

static void __exit omap_cf_exit(void)
{
	if (cpu_is_omap16xx())
		driver_unregister(&omap_cf_driver);
}

module_init(omap_cf_init);
module_exit(omap_cf_exit);

MODULE_DESCRIPTION("OMAP CF Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
f74e48a5 DB	1	/*
	2	* omap_cf.c -- OMAP 16xx CompactFlash controller driver
	3	*
	4	* Copyright (c) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/sched.h>
d052d1be	15	#include <linux/platform_device.h>
f74e48a5 DB	16	#include <linux/errno.h>
	17	#include <linux/init.h>
	18	#include <linux/delay.h>
	19	#include <linux/interrupt.h>
	20
	21	#include <pcmcia/ss.h>
	22
	23	#include <asm/hardware.h>
	24	#include <asm/io.h>
f74e48a5 DB	25	#include <asm/sizes.h>
	26
	27	#include <asm/arch/mux.h>
	28	#include <asm/arch/tc.h>
	29
	30
	31	/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
	32	* hard-wired timings to support Compact Flash memory cards; they won't work
	33	* with various other devices (like WLAN adapters) without some external
	34	* logic to help out.
	35	*
	36	* NOTE: CF controller docs disagree with address space docs as to where
	37	* CF_BASE really lives; this is a doc erratum.
	38	*/
	39	#define CF_BASE 0xfffe2800
	40
	41	/* status; read after IRQ */
	42	#define CF_STATUS_REG __REG16(CF_BASE + 0x00)
	43	# define CF_STATUS_BAD_READ (1 << 2)
	44	# define CF_STATUS_BAD_WRITE (1 << 1)
	45	# define CF_STATUS_CARD_DETECT (1 << 0)
	46
	47	/* which chipselect (CS0..CS3) is used for CF (active low) */
	48	#define CF_CFG_REG __REG16(CF_BASE + 0x02)
	49
	50	/* card reset */
	51	#define CF_CONTROL_REG __REG16(CF_BASE + 0x04)
	52	# define CF_CONTROL_RESET (1 << 0)
	53
	54	#define omap_cf_present() (!(CF_STATUS_REG & CF_STATUS_CARD_DETECT))
	55
	56	/--------------------------------------------------------------------------/
	57
	58	static const char driver_name[] = "omap_cf";
	59
	60	struct omap_cf_socket {
	61	struct pcmcia_socket socket;
	62
	63	struct timer_list timer;
	64	unsigned present:1;
	65	unsigned active:1;
	66
	67	struct platform_device *pdev;
	68	unsigned long phys_cf;
	69	u_int irq;
dcb9c392	70	struct resource iomem;
f74e48a5 DB	71	};
	72
	73	#define POLL_INTERVAL (2 * HZ)
	74
	75	#define SZ_2K (2 * SZ_1K)
	76
	77	/--------------------------------------------------------------------------/
	78
	79	static int omap_cf_ss_init(struct pcmcia_socket *s)
	80	{
	81	return 0;
	82	}
	83
	84	/* the timer is primarily to kick this socket's pccardd */
	85	static void omap_cf_timer(unsigned long _cf)
	86	{
	87	struct omap_cf_socket cf = (void ) _cf;
	88	unsigned present = omap_cf_present();
	89
	90	if (present != cf->present) {
	91	cf->present = present;
	92	pr_debug("%s: card %s\n", driver_name,
	93	present ? "present" : "gone");
	94	pcmcia_parse_events(&cf->socket, SS_DETECT);
	95	}
	96
	97	if (cf->active)
	98	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	99	}
	100
	101	/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
	102	* claim the card's IRQ. It may also detect some card insertions, but
	103	* not removals; it can't always eliminate timer irqs.
	104	*/
7d12e780	105	static irqreturn_t omap_cf_irq(int irq, void *_cf)
f74e48a5 DB	106	{
	107	omap_cf_timer((unsigned long)_cf);
	108	return IRQ_HANDLED;
	109	}
	110
	111	static int omap_cf_get_status(struct pcmcia_socket s, u_int sp)
	112	{
	113	if (!sp)
	114	return -EINVAL;
	115
dcb9c392	116	/* NOTE CF is always 3VCARD */
f74e48a5 DB	117	if (omap_cf_present()) {
	118	struct omap_cf_socket *cf;
	119
	120	*sp = SS_READY \| SS_DETECT \| SS_POWERON \| SS_3VCARD;
	121	cf = container_of(s, struct omap_cf_socket, socket);
dcb9c392 DB	122	s->irq.AssignedIRQ = 0;
dcb9c392 DB	123	s->pci_irq = cf->irq;
f74e48a5 DB	124	} else
	125	*sp = 0;
	126	return 0;
	127	}
	128
	129	static int
	130	omap_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
	131	{
	132	u16 control;
	133
dcb9c392	134	/* REVISIT some non-OSK boards may support power switching */
f74e48a5 DB	135	switch (s->Vcc) {
	136	case 0:
	137	case 33:
	138	break;
	139	default:
	140	return -EINVAL;
	141	}
	142
	143	control = CF_CONTROL_REG;
	144	if (s->flags & SS_RESET)
	145	CF_CONTROL_REG = CF_CONTROL_RESET;
	146	else
	147	CF_CONTROL_REG = 0;
	148
	149	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	150	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	151
	152	return 0;
	153	}
	154
	155	static int omap_cf_ss_suspend(struct pcmcia_socket *s)
	156	{
	157	pr_debug("%s: %s\n", driver_name, __FUNCTION__);
	158	return omap_cf_set_socket(s, &dead_socket);
	159	}
	160
	161	/* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
	162
	163	static int
	164	omap_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	165	{
	166	struct omap_cf_socket *cf;
	167
	168	cf = container_of(s, struct omap_cf_socket, socket);
	169	io->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	170	io->start = cf->phys_cf + SZ_4K;
	171	io->stop = io->start + SZ_2K - 1;
	172	return 0;
	173	}
	174
	175	static int
	176	omap_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
	177	{
	178	struct omap_cf_socket *cf;
	179
	180	if (map->card_start)
	181	return -EINVAL;
	182	cf = container_of(s, struct omap_cf_socket, socket);
	183	map->static_start = cf->phys_cf;
	184	map->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	185	if (map->flags & MAP_ATTRIB)
	186	map->static_start += SZ_2K;
	187	return 0;
	188	}
	189
	190	static struct pccard_operations omap_cf_ops = {
	191	.init = omap_cf_ss_init,
	192	.suspend = omap_cf_ss_suspend,
	193	.get_status = omap_cf_get_status,
	194	.set_socket = omap_cf_set_socket,
	195	.set_io_map = omap_cf_set_io_map,
	196	.set_mem_map = omap_cf_set_mem_map,
	197	};
	198
199	/--------------------------------------------------------------------------/
200
201	/*
202	* NOTE: right now the only board-specific platform_data is
203	* "what chipselect is used". Boards could want more.
204	*/
205
dcb9c392	206	static int __devinit omap_cf_probe(struct device *dev)
f74e48a5 DB	207	{
	208	unsigned seg;
	209	struct omap_cf_socket *cf;
	210	struct platform_device *pdev = to_platform_device(dev);
	211	int irq;
	212	int status;
	213
	214	seg = (int) dev->platform_data;
	215	if (seg == 0 \|\| seg > 3)
	216	return -ENODEV;
	217
	218	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	219	irq = platform_get_irq(pdev, 0);
48944738	220	if (irq < 0)
f74e48a5 DB	221	return -EINVAL;
	222
	223	cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
	224	if (!cf)
	225	return -ENOMEM;
	226	init_timer(&cf->timer);
	227	cf->timer.function = omap_cf_timer;
	228	cf->timer.data = (unsigned long) cf;
	229
	230	cf->pdev = pdev;
	231	dev_set_drvdata(dev, cf);
	232
	233	/* this primarily just shuts up irq handling noise */
dace1453	234	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
f74e48a5 DB	235	driver_name, cf);
	236	if (status < 0)
	237	goto fail0;
	238	cf->irq = irq;
	239	cf->socket.pci_irq = irq;
	240
	241	switch (seg) {
	242	/* NOTE: CS0 could be configured too ... */
	243	case 1:
	244	cf->phys_cf = OMAP_CS1_PHYS;
	245	break;
	246	case 2:
	247	cf->phys_cf = OMAP_CS2_PHYS;
	248	break;
	249	case 3:
	250	cf->phys_cf = omap_cs3_phys();
	251	break;
	252	default:
	253	goto fail1;
	254	}
dcb9c392 DB	255	cf->iomem.start = cf->phys_cf;
	256	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	257	cf->iomem.flags = IORESOURCE_MEM;
f74e48a5 DB	258
	259	/* pcmcia layer only remaps "real" memory */
	260	cf->socket.io_offset = (unsigned long)
	261	ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	262	if (!cf->socket.io_offset)
	263	goto fail1;
	264
	265	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
	266	goto fail1;
	267
	268	/* NOTE: CF conflicts with MMC1 */
	269	omap_cfg_reg(W11_1610_CF_CD1);
	270	omap_cfg_reg(P11_1610_CF_CD2);
	271	omap_cfg_reg(R11_1610_CF_IOIS16);
	272	omap_cfg_reg(V10_1610_CF_IREQ);
	273	omap_cfg_reg(W10_1610_CF_RESET);
	274
	275	CF_CFG_REG = ~(1 << seg);
	276
	277	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
	278
	279	/* NOTE: better EMIFS setup might support more cards; but the
	280	* TRM only shows how to affect regular flash signals, not their
	281	* CF/PCMCIA variants...
	282	*/
	283	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
	284	seg, EMIFS_CCS(seg), EMIFS_ACS(seg));
	285	EMIFS_CCS(seg) = 0x0004a1b3; /* synch mode 4 etc */
	286	EMIFS_ACS(seg) = 0x00000000; /* OE hold/setup */
	287
	288	/* CF uses armxor_ck, which is "always" available */
	289
	290	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
	291	CF_STATUS_REG, CF_CFG_REG, CF_CONTROL_REG,
	292	omap_cf_present() ? "present" : "(not present)");
	293
	294	cf->socket.owner = THIS_MODULE;
	295	cf->socket.dev.dev = dev;
	296	cf->socket.ops = &omap_cf_ops;
	297	cf->socket.resource_ops = &pccard_static_ops;
	298	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	299	\| SS_CAP_MEM_ALIGN;
	300	cf->socket.map_size = SZ_2K;
dcb9c392	301	cf->socket.io[0].res = &cf->iomem;
f74e48a5 DB	302
	303	status = pcmcia_register_socket(&cf->socket);
	304	if (status < 0)
	305	goto fail2;
	306
	307	cf->active = 1;
	308	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	309	return 0;
	310
	311	fail2:
	312	iounmap((void __iomem *) cf->socket.io_offset);
	313	release_mem_region(cf->phys_cf, SZ_8K);
	314	fail1:
	315	free_irq(irq, cf);
	316	fail0:
	317	kfree(cf);
	318	return status;
	319	}
	320
	321	static int __devexit omap_cf_remove(struct device *dev)
	322	{
	323	struct omap_cf_socket *cf = dev_get_drvdata(dev);
	324
	325	cf->active = 0;
	326	pcmcia_unregister_socket(&cf->socket);
	327	del_timer_sync(&cf->timer);
	328	iounmap((void __iomem *) cf->socket.io_offset);
	329	release_mem_region(cf->phys_cf, SZ_8K);
	330	free_irq(cf->irq, cf);
	331	kfree(cf);
	332	return 0;
	333	}
	334
f74e48a5 DB	335	static struct device_driver omap_cf_driver = {
	336	.name = (char *) driver_name,
	337	.bus = &platform_bus_type,
	338	.probe = omap_cf_probe,
	339	.remove = __devexit_p(omap_cf_remove),
dcb9c392 DB	340	.suspend = pcmcia_socket_dev_suspend,
dcb9c392 DB	341	.resume = pcmcia_socket_dev_resume,
f74e48a5 DB	342	};
	343
	344	static int __init omap_cf_init(void)
	345	{
	346	if (cpu_is_omap16xx())
dcb9c392 DB	347	return driver_register(&omap_cf_driver);
dcb9c392 DB	348	return -ENODEV;
f74e48a5 DB	349	}
	350
	351	static void __exit omap_cf_exit(void)
	352	{
	353	if (cpu_is_omap16xx())
	354	driver_unregister(&omap_cf_driver);
	355	}
	356
	357	module_init(omap_cf_init);
	358	module_exit(omap_cf_exit);
	359
	360	MODULE_DESCRIPTION("OMAP CF Driver");
	361	MODULE_LICENSE("GPL");