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c7f48656 RW |
1 | /* |
2 | * PCIe Native PME support | |
3 | * | |
4 | * Copyright (C) 2007 - 2009 Intel Corp | |
5 | * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com> | |
6 | * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc. | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License V2. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/pci.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/errno.h> | |
5a0e3ad6 | 17 | #include <linux/slab.h> |
c7f48656 RW |
18 | #include <linux/init.h> |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/pcieport_if.h> | |
22 | #include <linux/acpi.h> | |
23 | #include <linux/pci-acpi.h> | |
24 | #include <linux/pm_runtime.h> | |
25 | ||
271fb719 RW |
26 | #include "../pci.h" |
27 | #include "portdrv.h" | |
c7f48656 RW |
28 | |
29 | #define PCI_EXP_RTSTA_PME 0x10000 /* PME status */ | |
30 | #define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */ | |
31 | ||
c39fae14 RW |
32 | /* |
33 | * If this switch is set, MSI will not be used for PCIe PME signaling. This | |
34 | * causes the PCIe port driver to use INTx interrupts only, but it turns out | |
35 | * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based | |
36 | * wake-up from system sleep states. | |
37 | */ | |
38 | bool pcie_pme_msi_disabled; | |
39 | ||
c7f48656 RW |
40 | static int __init pcie_pme_setup(char *str) |
41 | { | |
28eb5f27 RW |
42 | if (!strncmp(str, "nomsi", 5)) |
43 | pcie_pme_msi_disabled = true; | |
b27759f8 | 44 | |
c7f48656 RW |
45 | return 1; |
46 | } | |
47 | __setup("pcie_pme=", pcie_pme_setup); | |
48 | ||
c7f48656 RW |
49 | struct pcie_pme_service_data { |
50 | spinlock_t lock; | |
51 | struct pcie_device *srv; | |
52 | struct work_struct work; | |
53 | bool noirq; /* Don't enable the PME interrupt used by this service. */ | |
54 | }; | |
55 | ||
56 | /** | |
57 | * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation. | |
58 | * @dev: PCIe root port or event collector. | |
59 | * @enable: Enable or disable the interrupt. | |
60 | */ | |
28eb5f27 | 61 | void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable) |
c7f48656 RW |
62 | { |
63 | int rtctl_pos; | |
64 | u16 rtctl; | |
65 | ||
b16694f7 | 66 | rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL; |
c7f48656 RW |
67 | |
68 | pci_read_config_word(dev, rtctl_pos, &rtctl); | |
69 | if (enable) | |
70 | rtctl |= PCI_EXP_RTCTL_PMEIE; | |
71 | else | |
72 | rtctl &= ~PCI_EXP_RTCTL_PMEIE; | |
73 | pci_write_config_word(dev, rtctl_pos, rtctl); | |
74 | } | |
75 | ||
76 | /** | |
77 | * pcie_pme_clear_status - Clear root port PME interrupt status. | |
78 | * @dev: PCIe root port or event collector. | |
79 | */ | |
80 | static void pcie_pme_clear_status(struct pci_dev *dev) | |
81 | { | |
82 | int rtsta_pos; | |
83 | u32 rtsta; | |
84 | ||
b16694f7 | 85 | rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA; |
c7f48656 RW |
86 | |
87 | pci_read_config_dword(dev, rtsta_pos, &rtsta); | |
88 | rtsta |= PCI_EXP_RTSTA_PME; | |
89 | pci_write_config_dword(dev, rtsta_pos, rtsta); | |
90 | } | |
91 | ||
92 | /** | |
93 | * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#. | |
94 | * @bus: PCI bus to scan. | |
95 | * | |
96 | * Scan given PCI bus and all buses under it for devices asserting PME#. | |
97 | */ | |
98 | static bool pcie_pme_walk_bus(struct pci_bus *bus) | |
99 | { | |
100 | struct pci_dev *dev; | |
101 | bool ret = false; | |
102 | ||
103 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
104 | /* Skip PCIe devices in case we started from a root port. */ | |
552be54c | 105 | if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) { |
c7f48656 | 106 | pm_request_resume(&dev->dev); |
c125e96f | 107 | pci_wakeup_event(dev); |
c7f48656 RW |
108 | ret = true; |
109 | } | |
110 | ||
111 | if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate)) | |
112 | ret = true; | |
113 | } | |
114 | ||
115 | return ret; | |
116 | } | |
117 | ||
118 | /** | |
119 | * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME. | |
120 | * @bus: Secondary bus of the bridge. | |
121 | * @devfn: Device/function number to check. | |
122 | * | |
123 | * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band | |
124 | * PCIe PME message. In such that case the bridge should use the Requester ID | |
125 | * of device/function number 0 on its secondary bus. | |
126 | */ | |
127 | static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn) | |
128 | { | |
129 | struct pci_dev *dev; | |
130 | bool found = false; | |
131 | ||
132 | if (devfn) | |
133 | return false; | |
134 | ||
135 | dev = pci_dev_get(bus->self); | |
136 | if (!dev) | |
137 | return false; | |
138 | ||
552be54c | 139 | if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) { |
c7f48656 RW |
140 | down_read(&pci_bus_sem); |
141 | if (pcie_pme_walk_bus(bus)) | |
142 | found = true; | |
143 | up_read(&pci_bus_sem); | |
144 | } | |
145 | ||
146 | pci_dev_put(dev); | |
147 | return found; | |
148 | } | |
149 | ||
150 | /** | |
151 | * pcie_pme_handle_request - Find device that generated PME and handle it. | |
152 | * @port: Root port or event collector that generated the PME interrupt. | |
153 | * @req_id: PCIe Requester ID of the device that generated the PME. | |
154 | */ | |
155 | static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id) | |
156 | { | |
157 | u8 busnr = req_id >> 8, devfn = req_id & 0xff; | |
158 | struct pci_bus *bus; | |
159 | struct pci_dev *dev; | |
160 | bool found = false; | |
161 | ||
162 | /* First, check if the PME is from the root port itself. */ | |
163 | if (port->devfn == devfn && port->bus->number == busnr) { | |
164 | if (pci_check_pme_status(port)) { | |
165 | pm_request_resume(&port->dev); | |
166 | found = true; | |
167 | } else { | |
168 | /* | |
169 | * Apparently, the root port generated the PME on behalf | |
170 | * of a non-PCIe device downstream. If this is done by | |
171 | * a root port, the Requester ID field in its status | |
172 | * register may contain either the root port's, or the | |
173 | * source device's information (PCI Express Base | |
174 | * Specification, Rev. 2.0, Section 6.1.9). | |
175 | */ | |
176 | down_read(&pci_bus_sem); | |
177 | found = pcie_pme_walk_bus(port->subordinate); | |
178 | up_read(&pci_bus_sem); | |
179 | } | |
180 | goto out; | |
181 | } | |
182 | ||
183 | /* Second, find the bus the source device is on. */ | |
184 | bus = pci_find_bus(pci_domain_nr(port->bus), busnr); | |
185 | if (!bus) | |
186 | goto out; | |
187 | ||
188 | /* Next, check if the PME is from a PCIe-PCI bridge. */ | |
189 | found = pcie_pme_from_pci_bridge(bus, devfn); | |
190 | if (found) | |
191 | goto out; | |
192 | ||
193 | /* Finally, try to find the PME source on the bus. */ | |
194 | down_read(&pci_bus_sem); | |
195 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
196 | pci_dev_get(dev); | |
197 | if (dev->devfn == devfn) { | |
198 | found = true; | |
199 | break; | |
200 | } | |
201 | pci_dev_put(dev); | |
202 | } | |
203 | up_read(&pci_bus_sem); | |
204 | ||
205 | if (found) { | |
206 | /* The device is there, but we have to check its PME status. */ | |
207 | found = pci_check_pme_status(dev); | |
c125e96f | 208 | if (found) { |
c7f48656 | 209 | pm_request_resume(&dev->dev); |
c125e96f RW |
210 | pci_wakeup_event(dev); |
211 | } | |
c7f48656 RW |
212 | pci_dev_put(dev); |
213 | } else if (devfn) { | |
214 | /* | |
215 | * The device is not there, but we can still try to recover by | |
216 | * assuming that the PME was reported by a PCIe-PCI bridge that | |
217 | * used devfn different from zero. | |
218 | */ | |
219 | dev_dbg(&port->dev, "PME interrupt generated for " | |
220 | "non-existent device %02x:%02x.%d\n", | |
221 | busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); | |
222 | found = pcie_pme_from_pci_bridge(bus, 0); | |
223 | } | |
224 | ||
225 | out: | |
226 | if (!found) | |
227 | dev_dbg(&port->dev, "Spurious native PME interrupt!\n"); | |
228 | } | |
229 | ||
230 | /** | |
231 | * pcie_pme_work_fn - Work handler for PCIe PME interrupt. | |
232 | * @work: Work structure giving access to service data. | |
233 | */ | |
234 | static void pcie_pme_work_fn(struct work_struct *work) | |
235 | { | |
236 | struct pcie_pme_service_data *data = | |
237 | container_of(work, struct pcie_pme_service_data, work); | |
238 | struct pci_dev *port = data->srv->port; | |
239 | int rtsta_pos; | |
240 | u32 rtsta; | |
241 | ||
b16694f7 | 242 | rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA; |
c7f48656 RW |
243 | |
244 | spin_lock_irq(&data->lock); | |
245 | ||
246 | for (;;) { | |
247 | if (data->noirq) | |
248 | break; | |
249 | ||
250 | pci_read_config_dword(port, rtsta_pos, &rtsta); | |
251 | if (rtsta & PCI_EXP_RTSTA_PME) { | |
252 | /* | |
253 | * Clear PME status of the port. If there are other | |
254 | * pending PMEs, the status will be set again. | |
255 | */ | |
256 | pcie_pme_clear_status(port); | |
257 | ||
258 | spin_unlock_irq(&data->lock); | |
259 | pcie_pme_handle_request(port, rtsta & 0xffff); | |
260 | spin_lock_irq(&data->lock); | |
261 | ||
262 | continue; | |
263 | } | |
264 | ||
265 | /* No need to loop if there are no more PMEs pending. */ | |
266 | if (!(rtsta & PCI_EXP_RTSTA_PENDING)) | |
267 | break; | |
268 | ||
269 | spin_unlock_irq(&data->lock); | |
270 | cpu_relax(); | |
271 | spin_lock_irq(&data->lock); | |
272 | } | |
273 | ||
274 | if (!data->noirq) | |
275 | pcie_pme_interrupt_enable(port, true); | |
276 | ||
277 | spin_unlock_irq(&data->lock); | |
278 | } | |
279 | ||
280 | /** | |
281 | * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt. | |
282 | * @irq: Interrupt vector. | |
283 | * @context: Interrupt context pointer. | |
284 | */ | |
285 | static irqreturn_t pcie_pme_irq(int irq, void *context) | |
286 | { | |
287 | struct pci_dev *port; | |
288 | struct pcie_pme_service_data *data; | |
289 | int rtsta_pos; | |
290 | u32 rtsta; | |
291 | unsigned long flags; | |
292 | ||
293 | port = ((struct pcie_device *)context)->port; | |
294 | data = get_service_data((struct pcie_device *)context); | |
295 | ||
b16694f7 | 296 | rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA; |
c7f48656 RW |
297 | |
298 | spin_lock_irqsave(&data->lock, flags); | |
299 | pci_read_config_dword(port, rtsta_pos, &rtsta); | |
300 | ||
301 | if (!(rtsta & PCI_EXP_RTSTA_PME)) { | |
302 | spin_unlock_irqrestore(&data->lock, flags); | |
303 | return IRQ_NONE; | |
304 | } | |
305 | ||
306 | pcie_pme_interrupt_enable(port, false); | |
307 | spin_unlock_irqrestore(&data->lock, flags); | |
308 | ||
309 | /* We don't use pm_wq, because it's freezable. */ | |
310 | schedule_work(&data->work); | |
311 | ||
312 | return IRQ_HANDLED; | |
313 | } | |
314 | ||
315 | /** | |
316 | * pcie_pme_set_native - Set the PME interrupt flag for given device. | |
317 | * @dev: PCI device to handle. | |
318 | * @ign: Ignored. | |
319 | */ | |
320 | static int pcie_pme_set_native(struct pci_dev *dev, void *ign) | |
321 | { | |
322 | dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n"); | |
323 | ||
324 | device_set_run_wake(&dev->dev, true); | |
325 | dev->pme_interrupt = true; | |
326 | return 0; | |
327 | } | |
328 | ||
329 | /** | |
330 | * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port. | |
331 | * @port: PCIe root port or event collector to handle. | |
332 | * | |
333 | * For each device below given root port, including the port itself (or for each | |
334 | * root complex integrated endpoint if @port is a root complex event collector) | |
335 | * set the flag indicating that it can signal run-time wake-up events via PCIe | |
336 | * PME interrupts. | |
337 | */ | |
338 | static void pcie_pme_mark_devices(struct pci_dev *port) | |
339 | { | |
340 | pcie_pme_set_native(port, NULL); | |
341 | if (port->subordinate) { | |
342 | pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL); | |
343 | } else { | |
344 | struct pci_bus *bus = port->bus; | |
345 | struct pci_dev *dev; | |
346 | ||
347 | /* Check if this is a root port event collector. */ | |
348 | if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus) | |
349 | return; | |
350 | ||
351 | down_read(&pci_bus_sem); | |
352 | list_for_each_entry(dev, &bus->devices, bus_list) | |
552be54c | 353 | if (pci_is_pcie(dev) |
c7f48656 RW |
354 | && dev->pcie_type == PCI_EXP_TYPE_RC_END) |
355 | pcie_pme_set_native(dev, NULL); | |
356 | up_read(&pci_bus_sem); | |
357 | } | |
358 | } | |
359 | ||
360 | /** | |
361 | * pcie_pme_probe - Initialize PCIe PME service for given root port. | |
362 | * @srv: PCIe service to initialize. | |
363 | */ | |
364 | static int pcie_pme_probe(struct pcie_device *srv) | |
365 | { | |
366 | struct pci_dev *port; | |
367 | struct pcie_pme_service_data *data; | |
368 | int ret; | |
369 | ||
c7f48656 RW |
370 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
371 | if (!data) | |
372 | return -ENOMEM; | |
373 | ||
374 | spin_lock_init(&data->lock); | |
375 | INIT_WORK(&data->work, pcie_pme_work_fn); | |
376 | data->srv = srv; | |
377 | set_service_data(srv, data); | |
378 | ||
379 | port = srv->port; | |
380 | pcie_pme_interrupt_enable(port, false); | |
381 | pcie_pme_clear_status(port); | |
382 | ||
383 | ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv); | |
384 | if (ret) { | |
385 | kfree(data); | |
386 | } else { | |
387 | pcie_pme_mark_devices(port); | |
388 | pcie_pme_interrupt_enable(port, true); | |
389 | } | |
390 | ||
391 | return ret; | |
392 | } | |
393 | ||
394 | /** | |
395 | * pcie_pme_suspend - Suspend PCIe PME service device. | |
396 | * @srv: PCIe service device to suspend. | |
397 | */ | |
398 | static int pcie_pme_suspend(struct pcie_device *srv) | |
399 | { | |
400 | struct pcie_pme_service_data *data = get_service_data(srv); | |
401 | struct pci_dev *port = srv->port; | |
402 | ||
403 | spin_lock_irq(&data->lock); | |
404 | pcie_pme_interrupt_enable(port, false); | |
405 | pcie_pme_clear_status(port); | |
406 | data->noirq = true; | |
407 | spin_unlock_irq(&data->lock); | |
408 | ||
409 | synchronize_irq(srv->irq); | |
410 | ||
411 | return 0; | |
412 | } | |
413 | ||
414 | /** | |
415 | * pcie_pme_resume - Resume PCIe PME service device. | |
416 | * @srv - PCIe service device to resume. | |
417 | */ | |
418 | static int pcie_pme_resume(struct pcie_device *srv) | |
419 | { | |
420 | struct pcie_pme_service_data *data = get_service_data(srv); | |
421 | struct pci_dev *port = srv->port; | |
422 | ||
423 | spin_lock_irq(&data->lock); | |
424 | data->noirq = false; | |
425 | pcie_pme_clear_status(port); | |
426 | pcie_pme_interrupt_enable(port, true); | |
427 | spin_unlock_irq(&data->lock); | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
432 | /** | |
433 | * pcie_pme_remove - Prepare PCIe PME service device for removal. | |
434 | * @srv - PCIe service device to resume. | |
435 | */ | |
436 | static void pcie_pme_remove(struct pcie_device *srv) | |
437 | { | |
438 | pcie_pme_suspend(srv); | |
439 | free_irq(srv->irq, srv); | |
440 | kfree(get_service_data(srv)); | |
441 | } | |
442 | ||
443 | static struct pcie_port_service_driver pcie_pme_driver = { | |
444 | .name = "pcie_pme", | |
445 | .port_type = PCI_EXP_TYPE_ROOT_PORT, | |
446 | .service = PCIE_PORT_SERVICE_PME, | |
447 | ||
448 | .probe = pcie_pme_probe, | |
449 | .suspend = pcie_pme_suspend, | |
450 | .resume = pcie_pme_resume, | |
451 | .remove = pcie_pme_remove, | |
452 | }; | |
453 | ||
454 | /** | |
455 | * pcie_pme_service_init - Register the PCIe PME service driver. | |
456 | */ | |
457 | static int __init pcie_pme_service_init(void) | |
458 | { | |
28eb5f27 | 459 | return pcie_port_service_register(&pcie_pme_driver); |
c7f48656 RW |
460 | } |
461 | ||
462 | module_init(pcie_pme_service_init); |